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-rw-r--r--arch/arm/plat-samsung/devs.c17
-rw-r--r--arch/arm/plat-samsung/dma-ops.c2
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h10
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/dma-pl330.h16
-rw-r--r--arch/arm/plat-samsung/include/plat/s5p-clock.h6
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h2
-rw-r--r--arch/arm/plat-samsung/irq-vic-timer.c16
8 files changed, 57 insertions, 14 deletions
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index cd0b9da9bbc..cd5aac08a26 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -515,8 +515,10 @@ void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
{
struct s3c2410_platform_i2c *npd;
- if (!pd)
+ if (!pd) {
pd = &default_i2c_data;
+ pd->bus_num = 0;
+ }
npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
&s3c_device_i2c0);
@@ -789,17 +791,6 @@ struct platform_device s3c_device_iis = {
};
#endif /* CONFIG_PLAT_S3C24XX */
-#ifdef CONFIG_CPU_S3C2440
-struct platform_device s3c2412_device_iis = {
- .name = "s3c2412-iis",
- .id = -1,
- .dev = {
- .dma_mask = &samsung_device_dma_mask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- }
-};
-#endif /* CONFIG_CPU_S3C2440 */
-
/* IDE CFCON */
#ifdef CONFIG_SAMSUNG_DEV_IDE
@@ -1123,7 +1114,7 @@ static struct resource s5p_pmu_resource[] = {
DEFINE_RES_IRQ(IRQ_PMU)
};
-struct platform_device s5p_device_pmu = {
+static struct platform_device s5p_device_pmu = {
.name = "arm-pmu",
.id = ARM_PMU_DEVICE_CPU,
.num_resources = ARRAY_SIZE(s5p_pmu_resource),
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c
index 0747c77a2fd..301d9c319d0 100644
--- a/arch/arm/plat-samsung/dma-ops.c
+++ b/arch/arm/plat-samsung/dma-ops.c
@@ -116,7 +116,7 @@ static inline int samsung_dmadev_flush(unsigned ch)
return dmaengine_terminate_all((struct dma_chan *)ch);
}
-struct samsung_dma_ops dmadev_ops = {
+static struct samsung_dma_ops dmadev_ops = {
.request = samsung_dmadev_request,
.release = samsung_dmadev_release,
.prepare = samsung_dmadev_prepare,
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 73cb3cfd068..787ceaca0be 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -42,6 +42,9 @@ extern unsigned long samsung_cpu_id;
#define EXYNOS4412_CPU_ID 0xE4412200
#define EXYNOS4_CPU_MASK 0xFFFE0000
+#define EXYNOS5250_SOC_ID 0x43520000
+#define EXYNOS5_SOC_MASK 0xFFFFF000
+
#define IS_SAMSUNG_CPU(name, id, mask) \
static inline int is_samsung_##name(void) \
{ \
@@ -58,6 +61,7 @@ IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
+IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -120,6 +124,12 @@ IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
#define EXYNOS4210_REV_1_0 (0x10)
#define EXYNOS4210_REV_1_1 (0x11)
+#if defined(CONFIG_SOC_EXYNOS5250)
+# define soc_is_exynos5250() is_samsung_exynos5250()
+#else
+# define soc_is_exynos5250() 0
+#endif
+
#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
#ifndef MHZ
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 5e7972de3ed..2155d4af62a 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -26,6 +26,8 @@ struct s3c24xx_uart_resources {
extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
extern struct s3c24xx_uart_resources s5p_uart_resources[];
+extern struct s3c24xx_uart_resources exynos4_uart_resources[];
+extern struct s3c24xx_uart_resources exynos5_uart_resources[];
extern struct platform_device *s3c24xx_uart_devs[];
extern struct platform_device *s3c24xx_uart_src[];
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h
index c5eaad529de..0670f37aaae 100644
--- a/arch/arm/plat-samsung/include/plat/dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h
@@ -82,6 +82,22 @@ enum dma_ch {
DMACH_SLIMBUS4_TX,
DMACH_SLIMBUS5_RX,
DMACH_SLIMBUS5_TX,
+ DMACH_MIPI_HSI0,
+ DMACH_MIPI_HSI1,
+ DMACH_MIPI_HSI2,
+ DMACH_MIPI_HSI3,
+ DMACH_MIPI_HSI4,
+ DMACH_MIPI_HSI5,
+ DMACH_MIPI_HSI6,
+ DMACH_MIPI_HSI7,
+ DMACH_MTOM_0,
+ DMACH_MTOM_1,
+ DMACH_MTOM_2,
+ DMACH_MTOM_3,
+ DMACH_MTOM_4,
+ DMACH_MTOM_5,
+ DMACH_MTOM_6,
+ DMACH_MTOM_7,
/* END Marker, also used to denote a reserved channel */
DMACH_MAX,
};
diff --git a/arch/arm/plat-samsung/include/plat/s5p-clock.h b/arch/arm/plat-samsung/include/plat/s5p-clock.h
index 984bf9e7bc8..1de4b32f98e 100644
--- a/arch/arm/plat-samsung/include/plat/s5p-clock.h
+++ b/arch/arm/plat-samsung/include/plat/s5p-clock.h
@@ -18,6 +18,8 @@
#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
#define clk_fin_apll clk_ext_xtal_mux
+#define clk_fin_bpll clk_ext_xtal_mux
+#define clk_fin_cpll clk_ext_xtal_mux
#define clk_fin_mpll clk_ext_xtal_mux
#define clk_fin_epll clk_ext_xtal_mux
#define clk_fin_dpll clk_ext_xtal_mux
@@ -29,6 +31,8 @@ extern struct clk clk_xusbxti;
extern struct clk clk_48m;
extern struct clk s5p_clk_27m;
extern struct clk clk_fout_apll;
+extern struct clk clk_fout_bpll;
+extern struct clk clk_fout_cpll;
extern struct clk clk_fout_mpll;
extern struct clk clk_fout_epll;
extern struct clk clk_fout_dpll;
@@ -37,6 +41,8 @@ extern struct clk clk_arm;
extern struct clk clk_vpll;
extern struct clksrc_sources clk_src_apll;
+extern struct clksrc_sources clk_src_bpll;
+extern struct clksrc_sources clk_src_cpll;
extern struct clksrc_sources clk_src_mpll;
extern struct clksrc_sources clk_src_epll;
extern struct clksrc_sources clk_src_dpll;
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index ee48e12a1e7..7e068d182c3 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -37,7 +37,9 @@ static void arch_detect_cpu(void);
/* how many bytes we allow into the FIFO at a time in FIFO mode */
#define FIFO_MAX (14)
+#ifdef S3C_PA_UART
#define uart_base S3C_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT)
+#endif
static __inline__ void
uart_wr(unsigned int reg, unsigned int val)
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index 51583cd3016..f980cf3d2ba 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -19,6 +19,7 @@
#include <linux/io.h>
#include <mach/map.h>
+#include <plat/cpu.h>
#include <plat/irq-vic-timer.h>
#include <plat/regs-timer.h>
@@ -57,6 +58,21 @@ void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq)
struct irq_chip_type *ct;
unsigned int i;
+#ifdef CONFIG_ARCH_EXYNOS
+ if (soc_is_exynos5250()) {
+ pirq[0] = EXYNOS5_IRQ_TIMER0_VIC;
+ pirq[1] = EXYNOS5_IRQ_TIMER1_VIC;
+ pirq[2] = EXYNOS5_IRQ_TIMER2_VIC;
+ pirq[3] = EXYNOS5_IRQ_TIMER3_VIC;
+ pirq[4] = EXYNOS5_IRQ_TIMER4_VIC;
+ } else {
+ pirq[0] = EXYNOS4_IRQ_TIMER0_VIC;
+ pirq[1] = EXYNOS4_IRQ_TIMER1_VIC;
+ pirq[2] = EXYNOS4_IRQ_TIMER2_VIC;
+ pirq[3] = EXYNOS4_IRQ_TIMER3_VIC;
+ pirq[4] = EXYNOS4_IRQ_TIMER4_VIC;
+ }
+#endif
s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq,
S3C64XX_TINT_CSTAT, handle_level_irq);
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-10-11 22:22:52 +0000