diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-pxa/generic.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-pxa/generic.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/hardware.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-pxa/include/mach/reset.h | 18 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa25x.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa27x.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa2xx.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa3xx.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-pxa/reset.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-pxa/spitz.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-pxa/tosa.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/generic.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/reset.h | 18 |
13 files changed, 91 insertions, 8 deletions
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 2834b7fff78..ceaed007636 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -26,9 +26,19 @@ #include <asm/mach/map.h> #include <mach/pxa-regs.h> +#include <mach/reset.h> #include "generic.h" +void clear_reset_status(unsigned int mask) +{ + if (cpu_is_pxa2xx()) + pxa2xx_clear_reset_status(mask); + + if (cpu_is_pxa3xx()) + pxa3xx_clear_reset_status(mask); +} + /* * Get the clock frequency as reflected by CCCR and the turbo flag. * We assume these values have been applied via a fcs. diff --git a/arch/arm/mach-pxa/generic.h b/arch/arm/mach-pxa/generic.h index 5bb7ae75783..041c048320e 100644 --- a/arch/arm/mach-pxa/generic.h +++ b/arch/arm/mach-pxa/generic.h @@ -47,12 +47,20 @@ extern unsigned pxa27x_get_memclk_frequency_10khz(void); #define pxa27x_get_memclk_frequency_10khz() (0) #endif +#if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x) +extern void pxa2xx_clear_reset_status(unsigned int); +#else +static inline void pxa2xx_clear_reset_status(unsigned int mask) {} +#endif + #ifdef CONFIG_PXA3xx extern unsigned pxa3xx_get_clk_frequency_khz(int); extern unsigned pxa3xx_get_memclk_frequency_10khz(void); +extern void pxa3xx_clear_reset_status(unsigned int); #else #define pxa3xx_get_clk_frequency_khz(x) (0) #define pxa3xx_get_memclk_frequency_10khz() (0) +static inline void pxa3xx_clear_reset_status(unsigned int mask) {} #endif extern struct sysdev_class pxa_irq_sysclass; diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h index f8fb1e75997..e89df4d0d23 100644 --- a/arch/arm/mach-pxa/include/mach/hardware.h +++ b/arch/arm/mach-pxa/include/mach/hardware.h @@ -224,11 +224,6 @@ extern void pxa_gpio_set_value(unsigned gpio, int value); */ extern unsigned int get_memclk_frequency_10khz(void); -/* - * register GPIO as reset generator - */ -extern int init_gpio_reset(int gpio); - #endif #if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h new file mode 100644 index 00000000000..9489a48871a --- /dev/null +++ b/arch/arm/mach-pxa/include/mach/reset.h @@ -0,0 +1,18 @@ +#ifndef __ASM_ARCH_RESET_H +#define __ASM_ARCH_RESET_H + +#define RESET_STATUS_HARDWARE (1 << 0) /* Hardware Reset */ +#define RESET_STATUS_WATCHDOG (1 << 1) /* Watchdog Reset */ +#define RESET_STATUS_LOWPOWER (1 << 2) /* Low Power/Sleep Exit */ +#define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */ +#define RESET_STATUS_ALL (0xf) + +extern unsigned int reset_status; +extern void clear_reset_status(unsigned int mask); + +/* + * register GPIO as reset generator + */ +extern int init_gpio_reset(int gpio); + +#endif /* __ASM_ARCH_RESET_H */ diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 3c2d22de9a1..9e5d8a8c642 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c @@ -28,6 +28,7 @@ #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa25x.h> +#include <mach/reset.h> #include <mach/pm.h> #include <mach/dma.h> @@ -348,6 +349,9 @@ static int __init pxa25x_init(void) clks_register(&pxa25x_hwuart_clk, 1); if (cpu_is_pxa21x() || cpu_is_pxa25x()) { + + reset_status = RCSR; + clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); if ((ret = pxa_init_dma(16))) diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 6bec43484ba..f9f6a9c31f4 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -24,6 +24,7 @@ #include <mach/pxa-regs.h> #include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa27x.h> +#include <mach/reset.h> #include <mach/ohci.h> #include <mach/pm.h> #include <mach/dma.h> @@ -384,6 +385,9 @@ static int __init pxa27x_init(void) int i, ret = 0; if (cpu_is_pxa27x()) { + + reset_status = RCSR; + clks_register(pxa27x_clks, ARRAY_SIZE(pxa27x_clks)); if ((ret = pxa_init_dma(32))) diff --git a/arch/arm/mach-pxa/pxa2xx.c b/arch/arm/mach-pxa/pxa2xx.c index 00b4de6d6bd..73d04d81c75 100644 --- a/arch/arm/mach-pxa/pxa2xx.c +++ b/arch/arm/mach-pxa/pxa2xx.c @@ -14,10 +14,19 @@ #include <linux/kernel.h> #include <linux/device.h> +#include <mach/hardware.h> +#include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa2xx.h> #include <mach/mfp-pxa25x.h> +#include <mach/reset.h> #include <mach/irda.h> +void pxa2xx_clear_reset_status(unsigned int mask) +{ + /* RESET_STATUS_* has a 1:1 mapping with RCSR */ + RCSR = mask; +} + static unsigned long pxa2xx_mfp_fir[] = { GPIO46_FICP_RXD, GPIO47_FICP_TXD, diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 37b07212b5a..03cbc38103e 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c @@ -24,6 +24,7 @@ #include <mach/hardware.h> #include <mach/pxa3xx-regs.h> +#include <mach/reset.h> #include <mach/ohci.h> #include <mach/pm.h> #include <mach/dma.h> @@ -109,6 +110,12 @@ unsigned int pxa3xx_get_memclk_frequency_10khz(void) return (clk / 10000); } +void pxa3xx_clear_reset_status(unsigned int mask) +{ + /* RESET_STATUS_* has a 1:1 mapping with ARSR */ + ARSR = mask; +} + /* * Return the current AC97 clock frequency. */ @@ -532,6 +539,9 @@ static int __init pxa3xx_init(void) int i, ret = 0; if (cpu_is_pxa3xx()) { + + reset_status = ARSR; + /* * clear RDH bit every time after reset * diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index fabead71d68..9996c612c3d 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -11,7 +11,10 @@ #include <asm/proc-fns.h> #include <mach/pxa-regs.h> -#include <mach/pxa2xx-regs.h> +#include <mach/reset.h> + +unsigned int reset_status; +EXPORT_SYMBOL(reset_status); static void do_hw_reset(void); @@ -77,8 +80,7 @@ static void do_hw_reset(void) void arch_reset(char mode) { - if (cpu_is_pxa2xx()) - RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; + clear_reset_status(RESET_STATUS_ALL); switch (mode) { case 's': diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 26b9fa56cff..cd39005c98f 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -39,6 +39,7 @@ #include <mach/pxa2xx-regs.h> #include <mach/pxa2xx-gpio.h> #include <mach/pxa27x-udc.h> +#include <mach/reset.h> #include <mach/irda.h> #include <mach/mmc.h> #include <mach/ohci.h> diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 38bc59c4411..5dab30eafdd 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c @@ -36,6 +36,7 @@ #include <asm/mach-types.h> #include <mach/pxa2xx-regs.h> #include <mach/mfp-pxa25x.h> +#include <mach/reset.h> #include <mach/irda.h> #include <mach/i2c.h> #include <mach/mmc.h> diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c index 5a08fe20a31..1362994c78a 100644 --- a/arch/arm/mach-sa1100/generic.c +++ b/arch/arm/mach-sa1100/generic.c @@ -31,6 +31,9 @@ #include "generic.h" +unsigned int reset_status; +EXPORT_SYMBOL(reset_status); + #define NR_FREQS 16 /* diff --git a/arch/arm/mach-sa1100/include/mach/reset.h b/arch/arm/mach-sa1100/include/mach/reset.h new file mode 100644 index 00000000000..f61957e6842 --- /dev/null +++ b/arch/arm/mach-sa1100/include/mach/reset.h @@ -0,0 +1,18 @@ +#ifndef __ASM_ARCH_RESET_H +#define __ASM_ARCH_RESET_H + +#include "hardware.h" + +#define RESET_STATUS_HARDWARE (1 << 0) /* Hardware Reset */ +#define RESET_STATUS_WATCHDOG (1 << 1) /* Watchdog Reset */ +#define RESET_STATUS_LOWPOWER (1 << 2) /* Exit from Low Power/Sleep */ +#define RESET_STATUS_GPIO (1 << 3) /* GPIO Reset */ +#define RESET_STATUS_ALL (0xf) + +extern unsigned int reset_status; +static inline void clear_reset_status(unsigned int mask) +{ + RCSR = mask; +} + +#endif /* __ASM_ARCH_RESET_H */ |