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-rw-r--r--arch/arm/mach-omap2/clock24xx.c2
-rw-r--r--arch/arm/mach-omap2/clock34xx.c4
-rw-r--r--arch/arm/plat-omap/clock.c16
3 files changed, 12 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c
index 2ce8c0296e8..4564ae32ae0 100644
--- a/arch/arm/mach-omap2/clock24xx.c
+++ b/arch/arm/mach-omap2/clock24xx.c
@@ -441,7 +441,6 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate)
omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked());
omap2xxx_sdrc_reprogram(done_rate, 0);
}
- omap2_dpllcore_recalc(&dpll_ck);
ret = 0;
dpll_exit:
@@ -570,7 +569,6 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate)
local_irq_restore(flags);
}
- omap2_dpllcore_recalc(&dpll_ck);
return 0;
}
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index 06a81febe45..75eb2546bb0 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -614,8 +614,6 @@ static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
omap3_noncore_dpll_program(clk, dd->last_rounded_m, dd->last_rounded_n,
freqsel);
- omap3_dpll_recalc(clk);
-
return 0;
}
@@ -693,8 +691,6 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate)
sp->actim_ctrlb, new_div);
local_irq_enable();
- omap2_clksel_recalc(clk);
-
return 0;
}
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 5272a2212ab..54da27af0bd 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -140,8 +140,12 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
spin_lock_irqsave(&clockfw_lock, flags);
if (arch_clock->clk_set_rate)
ret = arch_clock->clk_set_rate(clk, rate);
- if (ret == 0 && (clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
+ if (ret == 0) {
+ if (clk->recalc)
+ clk->recalc(clk);
+ if (clk->flags & RATE_PROPAGATES)
+ propagate_rate(clk);
+ }
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;
@@ -159,8 +163,12 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
spin_lock_irqsave(&clockfw_lock, flags);
if (arch_clock->clk_set_parent)
ret = arch_clock->clk_set_parent(clk, parent);
- if (ret == 0 && (clk->flags & RATE_PROPAGATES))
- propagate_rate(clk);
+ if (ret == 0) {
+ if (clk->recalc)
+ clk->recalc(clk);
+ if (clk->flags & RATE_PROPAGATES)
+ propagate_rate(clk);
+ }
spin_unlock_irqrestore(&clockfw_lock, flags);
return ret;