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-rw-r--r--arch/avr32/boards/atstk1000/Makefile2
-rw-r--r--arch/avr32/boards/atstk1000/atstk1002.c52
-rw-r--r--arch/avr32/boards/atstk1000/spi.c27
-rw-r--r--arch/avr32/kernel/cpu.c1
-rw-r--r--arch/avr32/kernel/irq.c1
-rw-r--r--arch/avr32/kernel/setup.c10
-rw-r--r--arch/avr32/kernel/syscall_table.S22
-rw-r--r--arch/avr32/kernel/time.c11
-rw-r--r--arch/avr32/kernel/vmlinux.lds.c2
-rw-r--r--arch/avr32/lib/libgcc.h33
-rw-r--r--arch/avr32/lib/longlong.h98
-rw-r--r--arch/avr32/mach-at32ap/Makefile2
-rw-r--r--arch/avr32/mach-at32ap/at32ap7000.c172
-rw-r--r--arch/avr32/mach-at32ap/clock.c6
-rw-r--r--arch/avr32/mach-at32ap/extint.c36
-rw-r--r--arch/avr32/mach-at32ap/pio.c255
-rw-r--r--arch/avr32/mm/cache.c32
-rw-r--r--arch/avr32/mm/tlb.c2
18 files changed, 503 insertions, 261 deletions
diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile
index df949948053..8e0992201bb 100644
--- a/arch/avr32/boards/atstk1000/Makefile
+++ b/arch/avr32/boards/atstk1000/Makefile
@@ -1,2 +1,2 @@
-obj-y += setup.o spi.o flash.o
+obj-y += setup.o flash.o
obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c
index 32b361f31c2..5974768a59e 100644
--- a/arch/avr32/boards/atstk1000/atstk1002.c
+++ b/arch/avr32/boards/atstk1000/atstk1002.c
@@ -14,11 +14,17 @@
#include <linux/platform_device.h>
#include <linux/string.h>
#include <linux/types.h>
+#include <linux/spi/spi.h>
#include <asm/io.h>
#include <asm/setup.h>
+#include <asm/arch/at32ap7000.h>
#include <asm/arch/board.h>
#include <asm/arch/init.h>
+#include <asm/arch/portmux.h>
+
+
+#define SW2_DEFAULT /* MMCI and UART_A available */
struct eth_addr {
u8 addr[6];
@@ -29,6 +35,15 @@ static struct eth_addr __initdata hw_addr[2];
static struct eth_platform_data __initdata eth_data[2];
extern struct lcdc_platform_data atstk1000_fb0_data;
+static struct spi_board_info spi0_board_info[] __initdata = {
+ {
+ /* QVGA display */
+ .modalias = "ltv350qv",
+ .max_speed_hz = 16000000,
+ .chip_select = 1,
+ },
+};
+
/*
* The next two functions should go away as the boot loader is
* supposed to initialize the macb address registers with a valid
@@ -86,24 +101,53 @@ static void __init set_hw_addr(struct platform_device *pdev)
void __init setup_board(void)
{
- at32_map_usart(1, 0); /* /dev/ttyS0 */
- at32_map_usart(2, 1); /* /dev/ttyS1 */
- at32_map_usart(3, 2); /* /dev/ttyS2 */
+#ifdef SW2_DEFAULT
+ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */
+#else
+ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */
+#endif
+ /* USART 2/unused: expansion connector */
+ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */
at32_setup_serial_console(0);
}
static int __init atstk1002_init(void)
{
+ /*
+ * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
+ * SDRAM-specific pins so that nobody messes with them.
+ */
+ at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */
+ at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */
+ at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */
+ at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */
+ at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */
+ at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */
+ at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */
+ at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */
+ at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */
+ at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */
+ at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */
+ at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */
+ at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */
+ at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */
+ at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */
+ at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */
+ at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */
+
at32_add_system_devices();
+#ifdef SW2_DEFAULT
at32_add_device_usart(0);
+#else
at32_add_device_usart(1);
+#endif
at32_add_device_usart(2);
set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
- at32_add_device_spi(0);
+ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
at32_add_device_lcdc(0, &atstk1000_fb0_data);
return 0;
diff --git a/arch/avr32/boards/atstk1000/spi.c b/arch/avr32/boards/atstk1000/spi.c
deleted file mode 100644
index 567726c82c6..00000000000
--- a/arch/avr32/boards/atstk1000/spi.c
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * ATSTK1000 SPI devices
- *
- * Copyright (C) 2005 Atmel Norway
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/device.h>
-#include <linux/spi/spi.h>
-
-static struct spi_board_info spi_board_info[] __initdata = {
- {
- .modalias = "ltv350qv",
- .max_speed_hz = 16000000,
- .bus_num = 0,
- .chip_select = 1,
- },
-};
-
-static int board_init_spi(void)
-{
- spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info));
- return 0;
-}
-arch_initcall(board_init_spi);
diff --git a/arch/avr32/kernel/cpu.c b/arch/avr32/kernel/cpu.c
index 342452ba204..2e72fd2699d 100644
--- a/arch/avr32/kernel/cpu.c
+++ b/arch/avr32/kernel/cpu.c
@@ -9,6 +9,7 @@
#include <linux/sysdev.h>
#include <linux/seq_file.h>
#include <linux/cpu.h>
+#include <linux/module.h>
#include <linux/percpu.h>
#include <linux/param.h>
#include <linux/errno.h>
diff --git a/arch/avr32/kernel/irq.c b/arch/avr32/kernel/irq.c
index 856f3548e66..fd311248c14 100644
--- a/arch/avr32/kernel/irq.c
+++ b/arch/avr32/kernel/irq.c
@@ -57,6 +57,7 @@ int show_interrupts(struct seq_file *p, void *v)
seq_printf(p, "%3d: ", i);
for_each_online_cpu(cpu)
seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[i]);
+ seq_printf(p, " %8s", irq_desc[i].chip->name ? : "-");
seq_printf(p, " %s", action->name);
for (action = action->next; action; action = action->next)
seq_printf(p, ", %s", action->name);
diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c
index a3421160100..a1a7c3c3f52 100644
--- a/arch/avr32/kernel/setup.c
+++ b/arch/avr32/kernel/setup.c
@@ -16,6 +16,7 @@
#include <linux/module.h>
#include <linux/root_dev.h>
#include <linux/cpu.h>
+#include <linux/kernel.h>
#include <asm/sections.h>
#include <asm/processor.h>
@@ -44,7 +45,7 @@ struct avr32_cpuinfo boot_cpu_data = {
};
EXPORT_SYMBOL(boot_cpu_data);
-static char command_line[COMMAND_LINE_SIZE];
+static char __initdata command_line[COMMAND_LINE_SIZE];
/*
* Should be more than enough, but if you have a _really_ complex
@@ -174,8 +175,7 @@ static int __init parse_tag_mem_range(struct tag *tag,
* Copy the data so the bootmem init code doesn't need to care
* about it.
*/
- if (mem_range_next_free >=
- (sizeof(mem_range_cache) / sizeof(mem_range_cache[0])))
+ if (mem_range_next_free >= ARRAY_SIZE(mem_range_cache))
panic("Physical memory map too complex!\n");
new = &mem_range_cache[mem_range_next_free++];
@@ -202,7 +202,7 @@ __tagtable(ATAG_MEM, parse_tag_mem);
static int __init parse_tag_cmdline(struct tag *tag)
{
- strlcpy(saved_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE);
+ strlcpy(boot_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE);
return 0;
}
__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
@@ -294,7 +294,7 @@ void __init setup_arch (char **cmdline_p)
init_mm.end_data = (unsigned long) &_edata;
init_mm.brk = (unsigned long) &_end;
- strlcpy(command_line, saved_command_line, COMMAND_LINE_SIZE);
+ strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE);
*cmdline_p = command_line;
parse_early_param();
diff --git a/arch/avr32/kernel/syscall_table.S b/arch/avr32/kernel/syscall_table.S
index db8f8b55ffd..7c279586fbb 100644
--- a/arch/avr32/kernel/syscall_table.S
+++ b/arch/avr32/kernel/syscall_table.S
@@ -8,14 +8,6 @@
* published by the Free Software Foundation.
*/
-#if !defined(CONFIG_NFSD) && !defined(CONFIG_NFSD_MODULE)
-#define sys_nfsservctl sys_ni_syscall
-#endif
-
-#if !defined(CONFIG_SYSV_IPC)
-# define sys_ipc sys_ni_syscall
-#endif
-
.section .rodata,"a",@progbits
.type sys_call_table,@object
.global sys_call_table
@@ -129,7 +121,7 @@ sys_call_table:
.long sys_getitimer /* 105 */
.long sys_swapoff
.long sys_sysinfo
- .long sys_ipc
+ .long sys_ni_syscall /* was sys_ipc briefly */
.long sys_sendfile
.long sys_setdomainname /* 110 */
.long sys_newuname
@@ -287,4 +279,16 @@ sys_call_table:
.long sys_tee
.long sys_vmsplice
.long __sys_epoll_pwait /* 265 */
+ .long sys_msgget
+ .long sys_msgsnd
+ .long sys_msgrcv
+ .long sys_msgctl
+ .long sys_semget /* 270 */
+ .long sys_semop
+ .long sys_semctl
+ .long sys_semtimedop
+ .long sys_shmat
+ .long sys_shmget /* 275 */
+ .long sys_shmdt
+ .long sys_shmctl
.long sys_ni_syscall /* r8 is saturated at nr_syscalls */
diff --git a/arch/avr32/kernel/time.c b/arch/avr32/kernel/time.c
index 5a247ba71a7..c10833f2ee0 100644
--- a/arch/avr32/kernel/time.c
+++ b/arch/avr32/kernel/time.c
@@ -37,7 +37,7 @@ static struct clocksource clocksource_avr32 = {
.read = read_cycle_count,
.mask = CLOCKSOURCE_MASK(32),
.shift = 16,
- .is_continuous = 1,
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
/*
@@ -110,15 +110,6 @@ static void avr32_hpt_init(unsigned int count)
}
/*
- * Scheduler clock - returns current time in nanosec units.
- */
-unsigned long long sched_clock(void)
-{
- /* There must be better ways...? */
- return (unsigned long long)jiffies * (1000000000 / HZ);
-}
-
-/*
* local_timer_interrupt() does profiling and process accounting on a
* per-CPU basis.
*
diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c
index 5c4424e362b..ef13b7c7893 100644
--- a/arch/avr32/kernel/vmlinux.lds.c
+++ b/arch/avr32/kernel/vmlinux.lds.c
@@ -46,10 +46,12 @@ SECTIONS
__security_initcall_start = .;
*(.security_initcall.init)
__security_initcall_end = .;
+#ifdef CONFIG_BLK_DEV_INITRD
. = ALIGN(32);
__initramfs_start = .;
*(.init.ramfs)
__initramfs_end = .;
+#endif
. = ALIGN(4096);
__init_end = .;
}
diff --git a/arch/avr32/lib/libgcc.h b/arch/avr32/lib/libgcc.h
deleted file mode 100644
index 5a091b5e361..00000000000
--- a/arch/avr32/lib/libgcc.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* Definitions for various functions 'borrowed' from gcc-3.4.3 */
-
-#define BITS_PER_UNIT 8
-
-typedef int QItype __attribute__ ((mode (QI)));
-typedef unsigned int UQItype __attribute__ ((mode (QI)));
-typedef int HItype __attribute__ ((mode (HI)));
-typedef unsigned int UHItype __attribute__ ((mode (HI)));
-typedef int SItype __attribute__ ((mode (SI)));
-typedef unsigned int USItype __attribute__ ((mode (SI)));
-typedef int DItype __attribute__ ((mode (DI)));
-typedef unsigned int UDItype __attribute__ ((mode (DI)));
-typedef float SFtype __attribute__ ((mode (SF)));
-typedef float DFtype __attribute__ ((mode (DF)));
-typedef int word_type __attribute__ ((mode (__word__)));
-
-#define W_TYPE_SIZE (4 * BITS_PER_UNIT)
-#define Wtype SItype
-#define UWtype USItype
-#define HWtype SItype
-#define UHWtype USItype
-#define DWtype DItype
-#define UDWtype UDItype
-#define __NW(a,b) __ ## a ## si ## b
-#define __NDW(a,b) __ ## a ## di ## b
-
-struct DWstruct {Wtype high, low;};
-
-typedef union
-{
- struct DWstruct s;
- DWtype ll;
-} DWunion;
diff --git a/arch/avr32/lib/longlong.h b/arch/avr32/lib/longlong.h
deleted file mode 100644
index cd5e369ac43..00000000000
--- a/arch/avr32/lib/longlong.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/* longlong.h -- definitions for mixed size 32/64 bit arithmetic.
- Copyright (C) 1991, 1992, 1994, 1995, 1996, 1997, 1998, 1999, 2000
- Free Software Foundation, Inc.
-
- This definition file is free software; you can redistribute it
- and/or modify it under the terms of the GNU General Public
- License as published by the Free Software Foundation; either
- version 2, or (at your option) any later version.
-
- This definition file is distributed in the hope that it will be
- useful, but WITHOUT ANY WARRANTY; without even the implied
- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
- See the GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
-
-/* Borrowed from gcc-3.4.3 */
-
-#define __BITS4 (W_TYPE_SIZE / 4)
-#define __ll_B ((UWtype) 1 << (W_TYPE_SIZE / 2))
-#define __ll_lowpart(t) ((UWtype) (t) & (__ll_B - 1))
-#define __ll_highpart(t) ((UWtype) (t) >> (W_TYPE_SIZE / 2))
-
-#define count_leading_zeros(count, x) ((count) = __builtin_clz(x))
-
-#define __udiv_qrnnd_c(q, r, n1, n0, d) \
- do { \
- UWtype __d1, __d0, __q1, __q0; \
- UWtype __r1, __r0, __m; \
- __d1 = __ll_highpart (d); \
- __d0 = __ll_lowpart (d); \
- \
- __r1 = (n1) % __d1; \
- __q1 = (n1) / __d1; \
- __m = (UWtype) __q1 * __d0; \
- __r1 = __r1 * __ll_B | __ll_highpart (n0); \
- if (__r1 < __m) \
- { \
- __q1--, __r1 += (d); \
- if (__r1 >= (d)) /* i.e. we didn't get carry when adding to __r1 */\
- if (__r1 < __m) \
- __q1--, __r1 += (d); \
- } \
- __r1 -= __m; \
- \
- __r0 = __r1 % __d1; \
- __q0 = __r1 / __d1; \
- __m = (UWtype) __q0 * __d0; \
- __r0 = __r0 * __ll_B | __ll_lowpart (n0); \
- if (__r0 < __m) \
- { \
- __q0--, __r0 += (d); \
- if (__r0 >= (d)) \
- if (__r0 < __m) \
- __q0--, __r0 += (d); \
- } \
- __r0 -= __m; \
- \
- (q) = (UWtype) __q1 * __ll_B | __q0; \
- (r) = __r0; \
- } while (0)
-
-#define udiv_qrnnd __udiv_qrnnd_c
-
-#define sub_ddmmss(sh, sl, ah, al, bh, bl) \
- do { \
- UWtype __x; \
- __x = (al) - (bl); \
- (sh) = (ah) - (bh) - (__x > (al)); \
- (sl) = __x; \
- } while (0)
-
-#define umul_ppmm(w1, w0, u, v) \
- do { \
- UWtype __x0, __x1, __x2, __x3; \
- UHWtype __ul, __vl, __uh, __vh; \
- \
- __ul = __ll_lowpart (u); \
- __uh = __ll_highpart (u); \
- __vl = __ll_lowpart (v); \
- __vh = __ll_highpart (v); \
- \
- __x0 = (UWtype) __ul * __vl; \
- __x1 = (UWtype) __ul * __vh; \
- __x2 = (UWtype) __uh * __vl; \
- __x3 = (UWtype) __uh * __vh; \
- \
- __x1 += __ll_highpart (__x0);/* this can't give carry */ \
- __x1 += __x2; /* but this indeed can */ \
- if (__x1 < __x2) /* did we get it? */ \
- __x3 += __ll_B; /* yes, add it in the proper pos. */ \
- \
- (w1) = __x3 + __ll_highpart (__x1); \
- (w0) = __ll_lowpart (__x1) * __ll_B + __ll_lowpart (__x0); \
- } while (0)
diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile
index f62eb691551..b21bea9af8b 100644
--- a/arch/avr32/mach-at32ap/Makefile
+++ b/arch/avr32/mach-at32ap/Makefile
@@ -1,2 +1,2 @@
-obj-y += at32ap.o clock.o pio.o intc.o extint.o hsmc.o
+obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c
index 48f4ef38c70..bc235507c5c 100644
--- a/arch/avr32/mach-at32ap/at32ap7000.c
+++ b/arch/avr32/mach-at32ap/at32ap7000.c
@@ -8,6 +8,7 @@
#include <linux/clk.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
#include <asm/io.h>
@@ -310,8 +311,6 @@ static void genclk_mode(struct clk *clk, int enabled)
{
u32 control;
- BUG_ON(clk->index > 7);
-
control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
if (enabled)
control |= SM_BIT(CEN);
@@ -325,11 +324,6 @@ static unsigned long genclk_get_rate(struct clk *clk)
u32 control;
unsigned long div = 1;
- BUG_ON(clk->index > 7);
-
- if (!clk->parent)
- return 0;
-
control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
if (control & SM_BIT(DIVEN))
div = 2 * (SM_BFEXT(DIV, control) + 1);
@@ -342,11 +336,6 @@ static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply)
u32 control;
unsigned long parent_rate, actual_rate, div;
- BUG_ON(clk->index > 7);
-
- if (!clk->parent)
- return 0;
-
parent_rate = clk->parent->get_rate(clk->parent);
control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
@@ -373,11 +362,8 @@ int genclk_set_parent(struct clk *clk, struct clk *parent)
{
u32 control;
- BUG_ON(clk->index > 7);
-
printk("clk %s: new parent %s (was %s)\n",
- clk->name, parent->name,
- clk->parent ? clk->parent->name : "(null)");
+ clk->name, parent->name, clk->parent->name);
control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
@@ -399,6 +385,22 @@ int genclk_set_parent(struct clk *clk, struct clk *parent)
return 0;
}
+static void __init genclk_init_parent(struct clk *clk)
+{
+ u32 control;
+ struct clk *parent;
+
+ BUG_ON(clk->index > 7);
+
+ control = sm_readl(&system_manager, PM_GCCTRL + 4 * clk->index);
+ if (control & SM_BIT(OSCSEL))
+ parent = (control & SM_BIT(PLLSEL)) ? &pll1 : &osc1;
+ else
+ parent = (control & SM_BIT(PLLSEL)) ? &pll0 : &osc0;
+
+ clk->parent = parent;
+}
+
/* --------------------------------------------------------------------
* System peripherals
* -------------------------------------------------------------------- */
@@ -496,9 +498,16 @@ static struct resource pio3_resource[] = {
DEFINE_DEV(pio, 3);
DEV_CLK(mck, pio3, pba, 13);
+static struct resource pio4_resource[] = {
+ PBMEM(0xffe03800),
+ IRQ(17),
+};
+DEFINE_DEV(pio, 4);
+DEV_CLK(mck, pio4, pba, 14);
+
void __init at32_add_system_devices(void)
{
- system_manager.eim_first_irq = NR_INTERNAL_IRQS;
+ system_manager.eim_first_irq = EIM_IRQ_BASE;
platform_device_register(&at32_sm_device);
platform_device_register(&at32_intc0_device);
@@ -509,6 +518,7 @@ void __init at32_add_system_devices(void)
platform_device_register(&pio1_device);
platform_device_register(&pio2_device);
platform_device_register(&pio3_device);
+ platform_device_register(&pio4_device);
}
/* --------------------------------------------------------------------
@@ -521,7 +531,7 @@ static struct atmel_uart_data atmel_usart0_data = {
};
static struct resource atmel_usart0_resource[] = {
PBMEM(0xffe00c00),
- IRQ(7),
+ IRQ(6),
};
DEFINE_DEV_DATA(atmel_usart, 0);
DEV_CLK(usart, atmel_usart0, pba, 4);
@@ -583,7 +593,7 @@ static inline void configure_usart3_pins(void)
select_peripheral(PB(17), PERIPH_B, 0); /* TXD */
}
-static struct platform_device *at32_usarts[4];
+static struct platform_device *__initdata at32_usarts[4];
void __init at32_map_usart(unsigned int hw_id, unsigned int line)
{
@@ -728,32 +738,79 @@ at32_add_device_eth(unsigned int id, struct eth_platform_data *data)
/* --------------------------------------------------------------------
* SPI
* -------------------------------------------------------------------- */
-static struct resource spi0_resource[] = {
+static struct resource atmel_spi0_resource[] = {
PBMEM(0xffe00000),
IRQ(3),
};
-DEFINE_DEV(spi, 0);
-DEV_CLK(mck, spi0, pba, 0);
+DEFINE_DEV(atmel_spi, 0);
+DEV_CLK(spi_clk, atmel_spi0, pba, 0);
+
+static struct resource atmel_spi1_resource[] = {
+ PBMEM(0xffe00400),
+ IRQ(4),
+};
+DEFINE_DEV(atmel_spi, 1);
+DEV_CLK(spi_clk, atmel_spi1, pba, 1);
-struct platform_device *__init at32_add_device_spi(unsigned int id)
+static void
+at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b,
+ unsigned int n, const u8 *pins)
{
+ unsigned int pin, mode;
+
+ for (; n; n--, b++) {
+ b->bus_num = bus_num;
+ if (b->chip_select >= 4)
+ continue;
+ pin = (unsigned)b->controller_data;
+ if (!pin) {
+ pin = pins[b->chip_select];
+ b->controller_data = (void *)pin;
+ }
+ mode = AT32_GPIOF_OUTPUT;
+ if (!(b->mode & SPI_CS_HIGH))
+ mode |= AT32_GPIOF_HIGH;
+ at32_select_gpio(pin, mode);
+ }
+}
+
+struct platform_device *__init
+at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n)
+{
+ /*
+ * Manage the chipselects as GPIOs, normally using the same pins
+ * the SPI controller expects; but boards can use other pins.
+ */
+ static u8 __initdata spi0_pins[] =
+ { GPIO_PIN_PA(3), GPIO_PIN_PA(4),
+ GPIO_PIN_PA(5), GPIO_PIN_PA(20), };
+ static u8 __initdata spi1_pins[] =
+ { GPIO_PIN_PB(2), GPIO_PIN_PB(3),
+ GPIO_PIN_PB(4), GPIO_PIN_PA(27), };
struct platform_device *pdev;
switch (id) {
case 0:
- pdev = &spi0_device;
+ pdev = &atmel_spi0_device;
select_peripheral(PA(0), PERIPH_A, 0); /* MISO */
select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */
select_peripheral(PA(2), PERIPH_A, 0); /* SCK */
- select_peripheral(PA(3), PERIPH_A, 0); /* NPCS0 */
- select_peripheral(PA(4), PERIPH_A, 0); /* NPCS1 */
- select_peripheral(PA(5), PERIPH_A, 0); /* NPCS2 */
+ at32_spi_setup_slaves(0, b, n, spi0_pins);
+ break;
+
+ case 1:
+ pdev = &atmel_spi1_device;
+ select_peripheral(PB(0), PERIPH_B, 0); /* MISO */
+ select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */
+ select_peripheral(PB(5), PERIPH_B, 0); /* SCK */
+ at32_spi_setup_slaves(1, b, n, spi1_pins);
break;
default:
return NULL;
}
+ spi_register_board_info(b, n);
platform_device_register(pdev);
return pdev;
}
@@ -837,6 +894,50 @@ at32_add_device_lcdc(unsigned int id, struct lcdc_platform_data *data)
return pdev;
}
+/* --------------------------------------------------------------------
+ * GCLK
+ * -------------------------------------------------------------------- */
+static struct clk gclk0 = {
+ .name = "gclk0",
+ .mode = genclk_mode,
+ .get_rate = genclk_get_rate,
+ .set_rate = genclk_set_rate,
+ .set_parent = genclk_set_parent,
+ .index = 0,
+};
+static struct clk gclk1 = {
+ .name = "gclk1",
+ .mode = genclk_mode,
+ .get_rate = genclk_get_rate,
+ .set_rate = genclk_set_rate,
+ .set_parent = genclk_set_parent,
+ .index = 1,
+};
+static struct clk gclk2 = {
+ .name = "gclk2",
+ .mode = genclk_mode,
+ .get_rate = genclk_get_rate,
+ .set_rate = genclk_set_rate,
+ .set_parent = genclk_set_parent,
+ .index = 2,
+};
+static struct clk gclk3 = {
+ .name = "gclk3",
+ .mode = genclk_mode,
+ .get_rate = genclk_get_rate,
+ .set_rate = genclk_set_rate,
+ .set_parent = genclk_set_parent,
+ .index = 3,
+};
+static struct clk gclk4 = {
+ .name = "gclk4",
+ .mode = genclk_mode,
+ .get_rate = genclk_get_rate,
+ .set_rate = genclk_set_rate,
+ .set_parent = genclk_set_parent,
+ .index = 4,
+};
+
struct clk *at32_clock_list[] = {
&osc32k,
&osc0,
@@ -860,6 +961,7 @@ struct clk *at32_clock_list[] = {
&pio1_mck,
&pio2_mck,
&pio3_mck,
+ &pio4_mck,
&atmel_usart0_usart,
&atmel_usart1_usart,
&atmel_usart2_usart,
@@ -868,9 +970,15 @@ struct clk *at32_clock_list[] = {
&macb0_pclk,
&macb1_hclk,
&macb1_pclk,
- &spi0_mck,
+ &atmel_spi0_spi_clk,
+ &atmel_spi1_spi_clk,
&lcdc0_hclk,
&lcdc0_pixclk,
+ &gclk0,
+ &gclk1,
+ &gclk2,
+ &gclk3,
+ &gclk4,
};
unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list);
@@ -880,6 +988,7 @@ void __init at32_portmux_init(void)
at32_init_pio(&pio1_device);
at32_init_pio(&pio2_device);
at32_init_pio(&pio3_device);
+ at32_init_pio(&pio4_device);
}
void __init at32_clock_init(void)
@@ -898,6 +1007,13 @@ void __init at32_clock_init(void)
if (sm_readl(sm, PM_PLL1) & SM_BIT(PLLOSC))
pll1.parent = &osc1;
+ genclk_init_parent(&gclk0);
+ genclk_init_parent(&gclk1);
+ genclk_init_parent(&gclk2);
+ genclk_init_parent(&gclk3);
+ genclk_init_parent(&gclk4);
+ genclk_init_parent(&lcdc0_pixclk);
+
/*
* Turn on all clocks that have at least one user already, and
* turn off everything else. We only do this for module
diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c
index ecbd4a21e43..00c435452d7 100644
--- a/arch/avr32/mach-at32ap/clock.c
+++ b/arch/avr32/mach-at32ap/clock.c
@@ -63,7 +63,11 @@ EXPORT_SYMBOL(clk_enable);
static void __clk_disable(struct clk *clk)
{
- BUG_ON(clk->users == 0);
+ if (clk->users == 0) {
+ printk(KERN_ERR "%s: mismatched disable\n", clk->name);
+ WARN_ON(1);
+ return;
+ }
if (--clk->users == 0 && clk->mode)
clk->mode(clk, 0);
diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c
index b59272e81b9..4a60eccfebd 100644
--- a/arch/avr32/mach-at32ap/extint.c
+++ b/arch/avr32/mach-at32ap/extint.c
@@ -55,20 +55,11 @@ static int eim_set_irq_type(unsigned int irq, unsigned int flow_type)
unsigned long flags;
int ret = 0;
+ flow_type &= IRQ_TYPE_SENSE_MASK;
if (flow_type == IRQ_TYPE_NONE)
flow_type = IRQ_TYPE_LEVEL_LOW;
desc = &irq_desc[irq];
- desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
- desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
-
- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) {
- desc->status |= IRQ_LEVEL;
- set_irq_handler(irq, handle_level_irq);
- } else {
- set_irq_handler(irq, handle_edge_irq);
- }
-
spin_lock_irqsave(&sm->lock, flags);
mode = sm_readl(sm, EIM_MODE);
@@ -97,9 +88,16 @@ static int eim_set_irq_type(unsigned int irq, unsigned int flow_type)
break;
}
- sm_writel(sm, EIM_MODE, mode);
- sm_writel(sm, EIM_EDGE, edge);
- sm_writel(sm, EIM_LEVEL, level);
+ if (ret == 0) {
+ sm_writel(sm, EIM_MODE, mode);
+ sm_writel(sm, EIM_EDGE, edge);
+ sm_writel(sm, EIM_LEVEL, level);
+
+ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+ flow_type |= IRQ_LEVEL;
+ desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+ desc->status |= flow_type;
+ }
spin_unlock_irqrestore(&sm->lock, flags);
@@ -122,8 +120,6 @@ static void demux_eim_irq(unsigned int irq, struct irq_desc *desc)
unsigned long status, pending;
unsigned int i, ext_irq;
- spin_lock(&sm->lock);
-
status = sm_readl(sm, EIM_ISR);
pending = status & sm_readl(sm, EIM_IMR);
@@ -133,10 +129,11 @@ static void demux_eim_irq(unsigned int irq, struct irq_desc *desc)
ext_irq = i + sm->eim_first_irq;
ext_desc = irq_desc + ext_irq;
- ext_desc->handle_irq(ext_irq, ext_desc);
+ if (ext_desc->status & IRQ_LEVEL)
+ handle_level_irq(ext_irq, ext_desc);
+ else
+ handle_edge_irq(ext_irq, ext_desc);
}
-
- spin_unlock(&sm->lock);
}
static int __init eim_init(void)
@@ -168,8 +165,9 @@ static int __init eim_init(void)
sm->eim_chip = &eim_chip;
for (i = 0; i < nr_irqs; i++) {
+ /* NOTE the handler we set here is ignored by the demux */
set_irq_chip_and_handler(sm->eim_first_irq + i, &eim_chip,
- handle_edge_irq);
+ handle_level_irq);
set_irq_chip_data(sm->eim_first_irq + i, sm);
}
diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c
index f1280ed8ed6..9ba5654cde1 100644
--- a/arch/avr32/mach-at32ap/pio.c
+++ b/arch/avr32/mach-at32ap/pio.c
@@ -12,7 +12,9 @@
#include <linux/debugfs.h>
#include <linux/fs.h>
#include <linux/platform_device.h>
+#include <linux/irq.h>
+#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/portmux.h>
@@ -26,7 +28,8 @@ struct pio_device {
const struct platform_device *pdev;
struct clk *clk;
u32 pinmux_mask;
- char name[32];
+ u32 gpio_mask;
+ char name[8];
};
static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
@@ -76,6 +79,9 @@ void __init at32_select_periph(unsigned int pin, unsigned int periph,
if (!(flags & AT32_GPIOF_PULLUP))
pio_writel(pio, PUDR, mask);
+ /* gpio_request NOT allowed */
+ set_bit(pin_index, &pio->gpio_mask);
+
return;
fail:
@@ -99,19 +105,52 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags)
goto fail;
}
- pio_writel(pio, PUER, mask);
- if (flags & AT32_GPIOF_HIGH)
- pio_writel(pio, SODR, mask);
- else
- pio_writel(pio, CODR, mask);
- if (flags & AT32_GPIOF_OUTPUT)
+ if (flags & AT32_GPIOF_OUTPUT) {
+ if (flags & AT32_GPIOF_HIGH)
+ pio_writel(pio, SODR, mask);
+ else
+ pio_writel(pio, CODR, mask);
+ pio_writel(pio, PUDR, mask);
pio_writel(pio, OER, mask);
- else
+ } else {
+ if (flags & AT32_GPIOF_PULLUP)
+ pio_writel(pio, PUER, mask);
+ else
+ pio_writel(pio, PUDR, mask);
+ if (flags & AT32_GPIOF_DEGLITCH)
+ pio_writel(pio, IFER, mask);
+ else
+ pio_writel(pio, IFDR, mask);
pio_writel(pio, ODR, mask);
+ }
pio_writel(pio, PER, mask);
- if (!(flags & AT32_GPIOF_PULLUP))
- pio_writel(pio, PUDR, mask);
+
+ /* gpio_request now allowed */
+ clear_bit(pin_index, &pio->gpio_mask);
+
+ return;
+
+fail:
+ dump_stack();
+}
+
+/* Reserve a pin, preventing anyone else from changing its configuration. */
+void __init at32_reserve_pin(unsigned int pin)
+{
+ struct pio_device *pio;
+ unsigned int pin_index = pin & 0x1f;
+
+ pio = gpio_to_pio(pin);
+ if (unlikely(!pio)) {
+ printk("pio: invalid pin %u\n", pin);
+ goto fail;
+ }
+
+ if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
+ printk("%s: pin %u is busy\n", pio->name, pin_index);
+ goto fail;
+ }
return;
@@ -119,20 +158,197 @@ fail:
dump_stack();
}
+/*--------------------------------------------------------------------------*/
+
+/* GPIO API */
+
+int gpio_request(unsigned int gpio, const char *label)
+{
+ struct pio_device *pio;
+ unsigned int pin;
+
+ pio = gpio_to_pio(gpio);
+ if (!pio)
+ return -ENODEV;
+
+ pin = gpio & 0x1f;
+ if (test_and_set_bit(pin, &pio->gpio_mask))
+ return -EBUSY;
+
+ return 0;
+}
+EXPORT_SYMBOL(gpio_request);
+
+void gpio_free(unsigned int gpio)
+{
+ struct pio_device *pio;
+ unsigned int pin;
+
+ pio = gpio_to_pio(gpio);
+ if (!pio) {
+ printk(KERN_ERR
+ "gpio: attempted to free invalid pin %u\n", gpio);
+ return;
+ }
+
+ pin = gpio & 0x1f;
+ if (!test_and_clear_bit(pin, &pio->gpio_mask))
+ printk(KERN_ERR "gpio: freeing free or non-gpio pin %s-%u\n",
+ pio->name, pin);
+}
+EXPORT_SYMBOL(gpio_free);
+
+int gpio_direction_input(unsigned int gpio)
+{
+ struct pio_device *pio;
+ unsigned int pin;
+
+ pio = gpio_to_pio(gpio);
+ if (!pio)
+ return -ENODEV;
+
+ pin = gpio & 0x1f;
+ pio_writel(pio, ODR, 1 << pin);
+
+ return 0;
+}
+EXPORT_SYMBOL(gpio_direction_input);
+
+int gpio_direction_output(unsigned int gpio)
+{
+ struct pio_device *pio;
+ unsigned int pin;
+
+ pio = gpio_to_pio(gpio);
+ if (!pio)
+ return -ENODEV;
+
+ pin = gpio & 0x1f;
+ pio_writel(pio, OER, 1 << pin);
+
+ return 0;
+}
+EXPORT_SYMBOL(gpio_direction_output);
+
+int gpio_get_value(unsigned int gpio)
+{
+ struct pio_device *pio = &pio_dev[gpio >> 5];
+
+ return (pio_readl(pio, PDSR) >> (gpio & 0x1f)) & 1;
+}
+EXPORT_SYMBOL(gpio_get_value);
+
+void gpio_set_value(unsigned int gpio, int value)
+{
+ struct pio_device *pio = &pio_dev[gpio >> 5];
+ u32 mask;
+
+ mask = 1 << (gpio & 0x1f);
+ if (value)
+ pio_writel(pio, SODR, mask);
+ else
+ pio_writel(pio, CODR, mask);
+}
+EXPORT_SYMBOL(gpio_set_value);
+
+/*--------------------------------------------------------------------------*/
+
+/* GPIO IRQ support */
+
+static void gpio_irq_mask(unsigned irq)
+{
+ unsigned gpio = irq_to_gpio(irq);
+ struct pio_device *pio = &pio_dev[gpio >> 5];
+
+ pio_writel(pio, IDR, 1 << (gpio & 0x1f));
+}
+
+static void gpio_irq_unmask(unsigned irq)
+{
+ unsigned gpio = irq_to_gpio(irq);
+ struct pio_device *pio = &pio_dev[gpio >> 5];
+
+ pio_writel(pio, IER, 1 << (gpio & 0x1f));
+}
+
+static int gpio_irq_type(unsigned irq, unsigned type)
+{
+ if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
+ return -EINVAL;
+
+ return 0;
+}
+
+static struct irq_chip gpio_irqchip = {
+ .name = "gpio",
+ .mask = gpio_irq_mask,
+ .unmask = gpio_irq_unmask,
+ .set_type = gpio_irq_type,
+};
+
+static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
+{
+ struct pio_device *pio = get_irq_chip_data(irq);
+ unsigned gpio_irq;
+
+ gpio_irq = (unsigned) get_irq_data(irq);
+ for (;;) {
+ u32 isr;
+ struct irq_desc *d;
+
+ /* ack pending GPIO interrupts */
+ isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
+ if (!isr)
+ break;
+ do {
+ int i;
+
+ i = ffs(isr) - 1;
+ isr &= ~(1 << i);
+
+ i += gpio_irq;
+ d = &irq_desc[i];
+
+ d->handle_irq(i, d);
+ } while (isr);
+ }
+}
+
+static void __init
+gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
+{
+ unsigned i;
+
+ set_irq_chip_data(irq, pio);
+ set_irq_data(irq, (void *) gpio_irq);
+
+ for (i = 0; i < 32; i++, gpio_irq++) {
+ set_irq_chip_data(gpio_irq, pio);
+ set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
+ handle_simple_irq);
+ }
+
+ set_irq_chained_handler(irq, gpio_irq_handler);
+}
+
+/*--------------------------------------------------------------------------*/
+
static int __init pio_probe(struct platform_device *pdev)
{
struct pio_device *pio = NULL;
+ int irq = platform_get_irq(pdev, 0);
+ int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
pio = &pio_dev[pdev->id];
BUG_ON(!pio->regs);
- /* TODO: Interrupts */
+ gpio_irq_setup(pio, irq, gpio_irq_base);
platform_set_drvdata(pdev, pio);
- printk(KERN_INFO "%s: Atmel Port Multiplexer at 0x%p (irq %d)\n",
- pio->name, pio->regs, platform_get_irq(pdev, 0));
+ printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
+ pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
return 0;
}
@@ -148,7 +364,7 @@ static int __init pio_init(void)
{
return platform_driver_register(&pio_driver);
}
-subsys_initcall(pio_init);
+postcore_initcall(pio_init);
void __init at32_init_pio(struct platform_device *pdev)
{
@@ -184,6 +400,13 @@ void __init at32_init_pio(struct platform_device *pdev)
pio->pdev = pdev;
pio->regs = ioremap(regs->start, regs->end - regs->start + 1);
- pio_writel(pio, ODR, ~0UL);
- pio_writel(pio, PER, ~0UL);
+ /*
+ * request_gpio() is only valid for pins that have been
+ * explicitly configured as GPIO and not previously requested
+ */
+ pio->gpio_mask = ~0UL;
+
+ /* start with irqs disabled and acked */
+ pio_writel(pio, IDR, ~0UL);
+ (void) pio_readl(pio, ISR);
}
diff --git a/arch/avr32/mm/cache.c b/arch/avr32/mm/cache.c
index 450515b245a..fb13f72e9a0 100644
--- a/arch/avr32/mm/cache.c
+++ b/arch/avr32/mm/cache.c
@@ -22,18 +22,34 @@
void invalidate_dcache_region(void *start, size_t size)
{
- unsigned long v, begin, end, linesz;
+ unsigned long v, begin, end, linesz, mask;
+ int flush = 0;
linesz = boot_cpu_data.dcache.linesz;
+ mask = linesz - 1;
+
+ /* when first and/or last cachelines are shared, flush them
+ * instead of invalidating ... never discard valid data!
+ */
+ begin = (unsigned long)start;
+ end = begin + size - 1;
+
+ if (begin & mask) {
+ flush_dcache_line(start);
+ begin += linesz;
+ flush = 1;
+ }
+ if ((end & mask) != mask) {
+ flush_dcache_line((void *)end);
+ end -= linesz;
+ flush = 1;
+ }
- //printk("invalidate dcache: %p + %u\n", start, size);
-
- /* You asked for it, you got it */
- begin = (unsigned long)start & ~(linesz - 1);
- end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
-
- for (v = begin; v < end; v += linesz)
+ /* remaining cachelines only need invalidation */
+ for (v = begin; v <= end; v += linesz)
invalidate_dcache_line((void *)v);
+ if (flush)
+ flush_write_buffer();
}
void clean_dcache_region(void *start, size_t size)
diff --git a/arch/avr32/mm/tlb.c b/arch/avr32/mm/tlb.c
index 7b073052203..56672018e42 100644
--- a/arch/avr32/mm/tlb.c
+++ b/arch/avr32/mm/tlb.c
@@ -360,7 +360,7 @@ static int tlb_open(struct inode *inode, struct file *file)
return seq_open(file, &tlb_ops);
}
-static struct file_operations proc_tlb_operations = {
+static const struct file_operations proc_tlb_operations = {
.open = tlb_open,
.read = seq_read,
.llseek = seq_lseek,
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-12-26 04:31:40 +0000