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Diffstat (limited to 'arch/blackfin/mach-bf548/boards/cm_bf548.c')
-rw-r--r--arch/blackfin/mach-bf548/boards/cm_bf548.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/arch/blackfin/mach-bf548/boards/cm_bf548.c b/arch/blackfin/mach-bf548/boards/cm_bf548.c
index f5a3c30a41b..e565aae11d7 100644
--- a/arch/blackfin/mach-bf548/boards/cm_bf548.c
+++ b/arch/blackfin/mach-bf548/boards/cm_bf548.c
@@ -291,6 +291,8 @@ static struct platform_device bfin_sir3_device = {
#endif
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
+#include <linux/smsc911x.h>
+
static struct resource smsc911x_resources[] = {
{
.name = "smsc911x-memory",
@@ -304,11 +306,22 @@ static struct resource smsc911x_resources[] = {
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
},
};
+
+static struct smsc911x_platform_config smsc911x_config = {
+ .flags = SMSC911X_USE_16BIT,
+ .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
+ .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
+ .phy_interface = PHY_INTERFACE_MODE_MII,
+};
+
static struct platform_device smsc911x_device = {
.name = "smsc911x",
.id = 0,
.num_resources = ARRAY_SIZE(smsc911x_resources),
.resource = smsc911x_resources,
+ .dev = {
+ .platform_data = &smsc911x_config,
+ },
};
#endif
@@ -473,7 +486,7 @@ static struct mtd_partition para_partitions[] = {
.offset = 0,
}, {
.name = "linux kernel(nor)",
- .size = 0x400000,
+ .size = 0x100000,
.offset = MTDPART_OFS_APPEND,
}, {
.name = "file system(nor)",
@@ -642,7 +655,7 @@ static struct resource bfin_spi1_resource[] = {
/* SPI controller data */
static struct bfin5xx_spi_master bf54x_spi_master_info0 = {
- .num_chipselect = 8,
+ .num_chipselect = 3,
.enable_dma = 1, /* master has the ability to do dma transfer */
.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
};
@@ -658,7 +671,7 @@ static struct platform_device bf54x_spi_master0 = {
};
static struct bfin5xx_spi_master bf54x_spi_master_info1 = {
- .num_chipselect = 8,
+ .num_chipselect = 3,
.enable_dma = 1, /* master has the ability to do dma transfer */
.pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
};