diff options
Diffstat (limited to 'arch/blackfin/mach-bf561')
22 files changed, 660 insertions, 501 deletions
diff --git a/arch/blackfin/mach-bf561/atomic.S b/arch/blackfin/mach-bf561/atomic.S index 9439bc6bd01..f99f174b129 100644 --- a/arch/blackfin/mach-bf561/atomic.S +++ b/arch/blackfin/mach-bf561/atomic.S @@ -1,23 +1,8 @@ /* - * File: arch/blackfin/mach-bf561/atomic.S - * Author: Philippe Gerum <rpm@xenomai.org> + * Copyright 2007-2008 Analog Devices Inc. + * Philippe Gerum <rpm@xenomai.org> * - * Copyright 2007 Analog Devices Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #include <linux/linkage.h> @@ -34,6 +19,16 @@ \reg\().h = _corelock; .endm +.macro safe_testset addr:req, scratch:req +#if ANOMALY_05000477 + cli \scratch; + testset (\addr); + sti \scratch; +#else + testset (\addr); +#endif +.endm + /* * r0 = address of atomic data to flush and invalidate (32bit). * @@ -48,7 +43,7 @@ ENTRY(_get_core_lock) cli r0; coreslot_loadaddr p0; .Lretry_corelock: - testset (p0); + safe_testset p0, r2; if cc jump .Ldone_corelock; SSYNC(r2); jump .Lretry_corelock @@ -71,7 +66,7 @@ ENTRY(_get_core_lock_noflush) cli r0; coreslot_loadaddr p0; .Lretry_corelock_noflush: - testset (p0); + safe_testset p0, r2; if cc jump .Ldone_corelock_noflush; SSYNC(r2); jump .Lretry_corelock_noflush diff --git a/arch/blackfin/mach-bf561/boards/Kconfig b/arch/blackfin/mach-bf561/boards/Kconfig index e4bc6d7c5a6..1aa529b9f8b 100644 --- a/arch/blackfin/mach-bf561/boards/Kconfig +++ b/arch/blackfin/mach-bf561/boards/Kconfig @@ -19,4 +19,11 @@ config BFIN561_BLUETECHNIX_CM help CM-BF561 support for EVAL- and DEV-Board. +config BFIN561_ACVILON + bool "BF561-ACVILON" + help + BF561-ACVILON System On Module support (SO-DIMM 144). + For more information about Acvilon BF561 SoM + please go to http://www.niistt.ru/ + endchoice diff --git a/arch/blackfin/mach-bf561/boards/Makefile b/arch/blackfin/mach-bf561/boards/Makefile index 3a152559e95..a5879f7857a 100644 --- a/arch/blackfin/mach-bf561/boards/Makefile +++ b/arch/blackfin/mach-bf561/boards/Makefile @@ -2,6 +2,7 @@ # arch/blackfin/mach-bf561/boards/Makefile # +obj-$(CONFIG_BFIN561_ACVILON) += acvilon.o obj-$(CONFIG_BFIN561_BLUETECHNIX_CM) += cm_bf561.o obj-$(CONFIG_BFIN561_EZKIT) += ezkit.o obj-$(CONFIG_BFIN561_TEPLA) += tepla.o diff --git a/arch/blackfin/mach-bf561/boards/acvilon.c b/arch/blackfin/mach-bf561/boards/acvilon.c new file mode 100644 index 00000000000..07e8dc8770d --- /dev/null +++ b/arch/blackfin/mach-bf561/boards/acvilon.c @@ -0,0 +1,551 @@ +/* + * File: arch/blackfin/mach-bf561/acvilon.c + * Based on: arch/blackfin/mach-bf561/ezkit.c + * Author: + * + * Created: + * Description: + * + * Modified: + * Copyright 2004-2006 Analog Devices Inc. + * Copyright 2009 CJSC "NII STT" + * + * Bugs: + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + * + * For more information about Acvilon BF561 SoM please + * go to http://www.niistt.ru/ + * + */ + +#include <linux/device.h> +#include <linux/platform_device.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> +#include <linux/mtd/nand.h> +#include <linux/mtd/plat-ram.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> +#include <linux/irq.h> +#include <linux/interrupt.h> +#include <linux/i2c-pca-platform.h> +#include <linux/delay.h> +#include <linux/io.h> +#include <asm/dma.h> +#include <asm/bfin5xx_spi.h> +#include <asm/portmux.h> +#include <asm/dpmc.h> +#include <asm/cacheflush.h> +#include <linux/i2c.h> + +/* + * Name the Board for the /proc/cpuinfo + */ +const char bfin_board_name[] = "Acvilon board"; + +#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE) +#include <linux/usb/isp1760.h> +static struct resource bfin_isp1760_resources[] = { + [0] = { + .start = 0x20000000, + .end = 0x20000000 + 0x000fffff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_PF15, + .end = IRQ_PF15, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, + }, +}; + +static struct isp1760_platform_data isp1760_priv = { + .is_isp1761 = 0, + .port1_disable = 0, + .bus_width_16 = 1, + .port1_otg = 0, + .analog_oc = 0, + .dack_polarity_high = 0, + .dreq_polarity_high = 0, +}; + +static struct platform_device bfin_isp1760_device = { + .name = "isp1760-hcd", + .id = 0, + .dev = { + .platform_data = &isp1760_priv, + }, + .num_resources = ARRAY_SIZE(bfin_isp1760_resources), + .resource = bfin_isp1760_resources, +}; +#endif + +static struct resource bfin_i2c_pca_resources[] = { + { + .name = "pca9564-regs", + .start = 0x2C000000, + .end = 0x2C000000 + 16, + .flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT, + }, { + + .start = IRQ_PF8, + .end = IRQ_PF8, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, + }, +}; + +struct i2c_pca9564_pf_platform_data pca9564_platform_data = { + .gpio = -1, + .i2c_clock_speed = 330000, + .timeout = 10000 +}; + +/* PCA9564 I2C Bus driver */ +static struct platform_device bfin_i2c_pca_device = { + .name = "i2c-pca-platform", + .id = 0, + .num_resources = ARRAY_SIZE(bfin_i2c_pca_resources), + .resource = bfin_i2c_pca_resources, + .dev = { + .platform_data = &pca9564_platform_data, + } +}; + +/* I2C devices fitted. */ +static struct i2c_board_info acvilon_i2c_devs[] __initdata = { + { + I2C_BOARD_INFO("ds1339", 0x68), + }, + { + I2C_BOARD_INFO("tcn75", 0x49), + }, +}; + +#if defined(CONFIG_MTD_PLATRAM) || defined(CONFIG_MTD_PLATRAM_MODULE) +static struct platdata_mtd_ram mtd_ram_data = { + .mapname = "rootfs(RAM)", + .bankwidth = 4, +}; + +static struct resource mtd_ram_resource = { + .start = 0x4000000, + .end = 0x5ffffff, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device mtd_ram_device = { + .name = "mtd-ram", + .id = 0, + .dev = { + .platform_data = &mtd_ram_data, + }, + .num_resources = 1, + .resource = &mtd_ram_resource, +}; +#endif + +#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) +#include <linux/smsc911x.h> +static struct resource smsc911x_resources[] = { + { + .name = "smsc911x-memory", + .start = 0x28000000, + .end = 0x28000000 + 0xFF, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_PF7, + .end = IRQ_PF7, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, + }, +}; + +static struct smsc911x_platform_config smsc911x_config = { + .flags = SMSC911X_USE_32BIT, + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, + .phy_interface = PHY_INTERFACE_MODE_MII, +}; + +static struct platform_device smsc911x_device = { + .name = "smsc911x", + .id = 0, + .num_resources = ARRAY_SIZE(smsc911x_resources), + .resource = smsc911x_resources, + .dev = { + .platform_data = &smsc911x_config, + }, +}; +#endif + +#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) +#ifdef CONFIG_SERIAL_BFIN_UART0 +static struct resource bfin_uart0_resources[] = { + { + .start = BFIN_UART_THR, + .end = BFIN_UART_GCTL + 2, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_UART_RX, + .end = IRQ_UART_RX + 1, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_UART_ERROR, + .end = IRQ_UART_ERROR, + .flags = IORESOURCE_IRQ, + }, + { + .start = CH_UART_TX, + .end = CH_UART_TX, + .flags = IORESOURCE_DMA, + }, + { + .start = CH_UART_RX, + .end = CH_UART_RX, + .flags = IORESOURCE_DMA, + }, +}; + +unsigned short bfin_uart0_peripherals[] = { + P_UART0_TX, P_UART0_RX, 0 +}; + +static struct platform_device bfin_uart0_device = { + .name = "bfin-uart", + .id = 0, + .num_resources = ARRAY_SIZE(bfin_uart0_resources), + .resource = bfin_uart0_resources, + .dev = { + /* Passed to driver */ + .platform_data = &bfin_uart0_peripherals, + }, +}; +#endif +#endif + +#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) + +#ifdef CONFIG_MTD_PARTITIONS +const char *part_probes[] = { "cmdlinepart", NULL }; + +static struct mtd_partition bfin_plat_nand_partitions[] = { + { + .name = "params(nand)", + .size = 32 * 1024 * 1024, + .offset = 0, + }, { + .name = "userfs(nand)", + .size = MTDPART_SIZ_FULL, + .offset = MTDPART_OFS_APPEND, + }, +}; +#endif + +#define BFIN_NAND_PLAT_CLE 2 +#define BFIN_NAND_PLAT_ALE 3 + +static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, + unsigned int ctrl) +{ + struct nand_chip *this = mtd->priv; + + if (cmd == NAND_CMD_NONE) + return; + + if (ctrl & NAND_CLE) + writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE)); + else + writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE)); +} + +#define BFIN_NAND_PLAT_READY GPIO_PF10 +static int bfin_plat_nand_dev_ready(struct mtd_info *mtd) +{ + return gpio_get_value(BFIN_NAND_PLAT_READY); +} + +static struct platform_nand_data bfin_plat_nand_data = { + .chip = { + .chip_delay = 30, +#ifdef CONFIG_MTD_PARTITIONS + .part_probe_types = part_probes, + .partitions = bfin_plat_nand_partitions, + .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions), +#endif + }, + .ctrl = { + .cmd_ctrl = bfin_plat_nand_cmd_ctrl, + .dev_ready = bfin_plat_nand_dev_ready, + }, +}; + +#define MAX(x, y) (x > y ? x : y) +static struct resource bfin_plat_nand_resources = { + .start = 0x24000000, + .end = 0x24000000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)), + .flags = IORESOURCE_IO, +}; + +static struct platform_device bfin_async_nand_device = { + .name = "gen_nand", + .id = -1, + .num_resources = 1, + .resource = &bfin_plat_nand_resources, + .dev = { + .platform_data = &bfin_plat_nand_data, + }, +}; + +static void bfin_plat_nand_init(void) +{ + gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat"); +} +#else +static void bfin_plat_nand_init(void) +{ +} +#endif + +#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) +static struct mtd_partition bfin_spi_dataflash_partitions[] = { + { + .name = "bootloader", + .size = 0x4200, + .offset = 0, + .mask_flags = MTD_CAP_ROM}, + { + .name = "u-boot", + .size = 0x42000, + .offset = MTDPART_OFS_APPEND, + }, + { + .name = "u-boot(params)", + .size = 0x4200, + .offset = MTDPART_OFS_APPEND, + }, + { + .name = "kernel", + .size = 0x294000, + .offset = MTDPART_OFS_APPEND, + }, + { + .name = "params", + .size = 0x42000, + .offset = MTDPART_OFS_APPEND, + }, + { + .name = "rootfs", + .size = MTDPART_SIZ_FULL, + .offset = MTDPART_OFS_APPEND, + } +}; + +static struct flash_platform_data bfin_spi_dataflash_data = { + .name = "SPI Dataflash", + .parts = bfin_spi_dataflash_partitions, + .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions), +}; + +/* DataFlash chip */ +static struct bfin5xx_spi_chip data_flash_chip_info = { + .enable_dma = 0, /* use dma transfer with this chip */ + .bits_per_word = 8, +}; +#endif + +#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) +static struct bfin5xx_spi_chip spidev_chip_info = { + .enable_dma = 0, + .bits_per_word = 8, +}; +#endif + +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) +/* SPI (0) */ +static struct resource bfin_spi0_resource[] = { + [0] = { + .start = SPI0_REGBASE, + .end = SPI0_REGBASE + 0xFF, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = CH_SPI, + .end = CH_SPI, + .flags = IORESOURCE_DMA, + }, + [2] = { + .start = IRQ_SPI, + .end = IRQ_SPI, + .flags = IORESOURCE_IRQ, + }, +}; + +/* SPI controller data */ +static struct bfin5xx_spi_master bfin_spi0_info = { + .num_chipselect = 8, + .enable_dma = 1, /* master has the ability to do dma transfer */ + .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0}, +}; + +static struct platform_device bfin_spi0_device = { + .name = "bfin-spi", + .id = 0, /* Bus number */ + .num_resources = ARRAY_SIZE(bfin_spi0_resource), + .resource = bfin_spi0_resource, + .dev = { + .platform_data = &bfin_spi0_info, /* Passed to driver */ + }, +}; +#endif + +static struct spi_board_info bfin_spi_board_info[] __initdata = { +#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) + { + .modalias = "spidev", + .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 0, + .chip_select = 3, + .controller_data = &spidev_chip_info, + }, +#endif +#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE) + { /* DataFlash chip */ + .modalias = "mtd_dataflash", + .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 0, /* Framework bus number */ + .chip_select = 2, /* Framework chip select */ + .platform_data = &bfin_spi_dataflash_data, + .controller_data = &data_flash_chip_info, + .mode = SPI_MODE_3, + }, +#endif +}; + +static struct resource bfin_gpios_resources = { + .start = 31, +/* .end = MAX_BLACKFIN_GPIOS - 1, */ + .end = 32, + .flags = IORESOURCE_IRQ, +}; + +static struct platform_device bfin_gpios_device = { + .name = "simple-gpio", + .id = -1, + .num_resources = 1, + .resource = &bfin_gpios_resources, +}; + +static const unsigned int cclk_vlev_datasheet[] = { + VRPAIR(VLEV_085, 250000000), + VRPAIR(VLEV_090, 300000000), + VRPAIR(VLEV_095, 313000000), + VRPAIR(VLEV_100, 350000000), + VRPAIR(VLEV_105, 400000000), + VRPAIR(VLEV_110, 444000000), + VRPAIR(VLEV_115, 450000000), + VRPAIR(VLEV_120, 475000000), + VRPAIR(VLEV_125, 500000000), + VRPAIR(VLEV_130, 600000000), +}; + +static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = { + .tuple_tab = cclk_vlev_datasheet, + .tabsize = ARRAY_SIZE(cclk_vlev_datasheet), + .vr_settling_time = 25 /* us */ , +}; + +static struct platform_device bfin_dpmc = { + .name = "bfin dpmc", + .dev = { + .platform_data = &bfin_dmpc_vreg_data, + }, +}; + +static struct platform_device *acvilon_devices[] __initdata = { + &bfin_dpmc, + +#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE) + &bfin_spi0_device, +#endif + +#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) +#ifdef CONFIG_SERIAL_BFIN_UART0 + &bfin_uart0_device, +#endif +#endif + + &bfin_gpios_device, + +#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) + &smsc911x_device, +#endif + + &bfin_i2c_pca_device, + +#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE) + &bfin_async_nand_device, +#endif + +#if defined(CONFIG_MTD_PLATRAM) || defined(CONFIG_MTD_PLATRAM_MODULE) + &mtd_ram_device, +#endif + +}; + +static int __init acvilon_init(void) +{ + int ret; + + printk(KERN_INFO "%s(): registering device resources\n", __func__); + + bfin_plat_nand_init(); + ret = + platform_add_devices(acvilon_devices, ARRAY_SIZE(acvilon_devices)); + if (ret < 0) + return ret; + + i2c_register_board_info(0, acvilon_i2c_devs, + ARRAY_SIZE(acvilon_i2c_devs)); + + bfin_write_FIO0_FLAG_C(1 << 14); + msleep(5); + bfin_write_FIO0_FLAG_S(1 << 14); + + spi_register_board_info(bfin_spi_board_info, + ARRAY_SIZE(bfin_spi_board_info)); + return 0; +} + +arch_initcall(acvilon_init); + +static struct platform_device *acvilon_early_devices[] __initdata = { +#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) +#ifdef CONFIG_SERIAL_BFIN_UART0 + &bfin_uart0_device, +#endif +#endif +}; + +void __init native_machine_early_platform_add_devices(void) +{ + printk(KERN_INFO "register early platform devices\n"); + early_platform_add_devices(acvilon_early_devices, + ARRAY_SIZE(acvilon_early_devices)); +} diff --git a/arch/blackfin/mach-bf561/boards/cm_bf561.c b/arch/blackfin/mach-bf561/boards/cm_bf561.c index 6577ecfcf11..dfc8d5b7798 100644 --- a/arch/blackfin/mach-bf561/boards/cm_bf561.c +++ b/arch/blackfin/mach-bf561/boards/cm_bf561.c @@ -1,30 +1,10 @@ /* - * File: arch/blackfin/mach-bf533/boards/cm_bf561.c - * Based on: arch/blackfin/mach-bf533/boards/ezkit.c - * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005 + * Copyright 2004-2009 Analog Devices Inc. + * 2008-2009 Bluetechnix + * 2005 National ICT Australia (NICTA) + * Aidan Williams <aidan@nicta.com.au> * - * Created: 2006 - * Description: Board description file - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #include <linux/device.h> @@ -285,19 +265,6 @@ static struct platform_device net2272_bfin_device = { }; #endif -static struct resource bfin_gpios_resources = { - .start = 0, - .end = MAX_BLACKFIN_GPIOS - 1, - .flags = IORESOURCE_IRQ, -}; - -static struct platform_device bfin_gpios_device = { - .name = "simple-gpio", - .id = -1, - .num_resources = 1, - .resource = &bfin_gpios_resources, -}; - #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE) static struct resource isp1362_hcd_resources[] = { { @@ -532,8 +499,6 @@ static struct platform_device *cm_bf561_devices[] __initdata = { #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) ¶_flash_device, #endif - - &bfin_gpios_device, }; static int __init cm_bf561_init(void) diff --git a/arch/blackfin/mach-bf561/boards/ezkit.c b/arch/blackfin/mach-bf561/boards/ezkit.c index caed96bb957..ffd3e6a80d1 100644 --- a/arch/blackfin/mach-bf561/boards/ezkit.c +++ b/arch/blackfin/mach-bf561/boards/ezkit.c @@ -1,30 +1,9 @@ /* - * File: arch/blackfin/mach-bf561/ezkit.c - * Based on: - * Author: + * Copyright 2004-2009 Analog Devices Inc. + * 2005 National ICT Australia (NICTA) + * Aidan Williams <aidan@nicta.com.au> * - * Created: - * Description: - * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #include <linux/device.h> @@ -70,7 +49,7 @@ static struct isp1760_platform_data isp1760_priv = { }; static struct platform_device bfin_isp1760_device = { - .name = "isp1760-hcd", + .name = "isp1760", .id = 0, .dev = { .platform_data = &isp1760_priv, @@ -180,28 +159,6 @@ static struct platform_device smc91x_device = { }; #endif -#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) -static struct resource ax88180_resources[] = { - [0] = { - .start = 0x2c000000, - .end = 0x2c000000 + 0x8000, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_PF10, - .end = IRQ_PF10, - .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL), - }, -}; - -static struct platform_device ax88180_device = { - .name = "ax88180", - .id = -1, - .num_resources = ARRAY_SIZE(ax88180_resources), - .resource = ax88180_resources, -}; -#endif - #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE) static struct resource bfin_uart_resources[] = { { @@ -387,19 +344,6 @@ static struct platform_device bfin_device_gpiokeys = { }; #endif -static struct resource bfin_gpios_resources = { - .start = 0, - .end = MAX_BLACKFIN_GPIOS - 1, - .flags = IORESOURCE_IRQ, -}; - -static struct platform_device bfin_gpios_device = { - .name = "simple-gpio", - .id = -1, - .num_resources = 1, - .resource = &bfin_gpios_resources, -}; - #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) #include <linux/i2c-gpio.h> @@ -455,10 +399,6 @@ static struct platform_device *ezkit_devices[] __initdata = { &smc91x_device, #endif -#if defined(CONFIG_AX88180) || defined(CONFIG_AX88180_MODULE) - &ax88180_device, -#endif - #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE) &net2272_bfin_device, #endif @@ -493,8 +433,6 @@ static struct platform_device *ezkit_devices[] __initdata = { &isp1362_hcd_device, #endif - &bfin_gpios_device, - #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE) &ezkit_flash_device, #endif diff --git a/arch/blackfin/mach-bf561/boards/tepla.c b/arch/blackfin/mach-bf561/boards/tepla.c index 6f77dbe952f..8ba7252455e 100644 --- a/arch/blackfin/mach-bf561/boards/tepla.c +++ b/arch/blackfin/mach-bf561/boards/tepla.c @@ -1,15 +1,13 @@ /* - * File: arch/blackfin/mach-bf561/tepla.c + * Copyright 2004-2007 Analog Devices Inc. + * 2005 National ICT Australia (NICTA) + * Aidan Williams <aidan@nicta.com.au> * - * Copyright 2004-2007 Analog Devices Inc. - * Only SMSC91C1111 was registered, may do more later. + * Thanks to Jamey Hicks. * - * Copyright 2005 National ICT Australia (NICTA), Aidan Williams <aidan@nicta.com.au> - * Thanks to Jamey Hicks. + * Only SMSC91C1111 was registered, may do more later. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. + * Licensed under the GPL-2 */ #include <linux/device.h> diff --git a/arch/blackfin/mach-bf561/coreb.c b/arch/blackfin/mach-bf561/coreb.c index 1e60a92dd60..deb2271d09a 100644 --- a/arch/blackfin/mach-bf561/coreb.c +++ b/arch/blackfin/mach-bf561/coreb.c @@ -22,8 +22,8 @@ #define CMD_COREB_STOP 3 #define CMD_COREB_RESET 4 -static int -coreb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) +static long +coreb_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { int ret = 0; @@ -49,8 +49,8 @@ coreb_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned l } static const struct file_operations coreb_fops = { - .owner = THIS_MODULE, - .ioctl = coreb_ioctl, + .owner = THIS_MODULE, + .unlocked_ioctl = coreb_ioctl, }; static struct miscdevice coreb_dev = { diff --git a/arch/blackfin/mach-bf561/dma.c b/arch/blackfin/mach-bf561/dma.c index 42b0037afe6..c938c3c7355 100644 --- a/arch/blackfin/mach-bf561/dma.c +++ b/arch/blackfin/mach-bf561/dma.c @@ -1,31 +1,11 @@ /* - * File: arch/blackfin/mach-bf561/dma.c - * Based on: - * Author: + * the simple DMA Implementation for Blackfin * - * Created: - * Description: This file contains the simple DMA Implementation for Blackfin + * Copyright 2007-2008 Analog Devices Inc. * - * Modified: - * Copyright 2004-2007 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ + #include <linux/module.h> #include <asm/blackfin.h> diff --git a/arch/blackfin/mach-bf561/include/mach/anomaly.h b/arch/blackfin/mach-bf561/include/mach/anomaly.h index 70da495c966..5ddc981e993 100644 --- a/arch/blackfin/mach-bf561/include/mach/anomaly.h +++ b/arch/blackfin/mach-bf561/include/mach/anomaly.h @@ -1,9 +1,13 @@ /* - * File: include/asm-blackfin/mach-bf561/anomaly.h - * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * DO NOT EDIT THIS FILE + * This file is under version control at + * svn://sources.blackfin.uclinux.org/toolchain/trunk/proc-defs/header-frags/ + * and can be replaced with that version at any time + * DO NOT EDIT THIS FILE * - * Copyright (C) 2004-2009 Analog Devices Inc. - * Licensed under the GPL-2 or later. + * Copyright 2004-2009 Analog Devices Inc. + * Licensed under the ADI BSD license. + * https://docs.blackfin.uclinux.org/doku.php?id=adi_bsd */ /* This file should be up to date with: @@ -213,7 +217,11 @@ /* Disabling Peripherals with DMA Running May Cause DMA System Instability */ #define ANOMALY_05000278 (__SILICON_REVISION__ < 5) /* False Hardware Error Exception when ISR Context Is Not Restored */ -#define ANOMALY_05000281 (__SILICON_REVISION__ < 5) +/* Temporarily walk around for bug 5423 till this issue is confirmed by + * official anomaly document. It looks 05000281 still exists on bf561 + * v0.5. + */ +#define ANOMALY_05000281 (__SILICON_REVISION__ <= 5) /* System MMR Write Is Stalled Indefinitely when Killed in a Particular Stage */ #define ANOMALY_05000283 (1) /* Reads Will Receive Incorrect Data under Certain Conditions */ @@ -280,6 +288,12 @@ #define ANOMALY_05000443 (1) /* False Hardware Error when RETI Points to Invalid Memory */ #define ANOMALY_05000461 (1) +/* Interrupted 32-Bit SPORT Data Register Access Results In Underflow */ +#define ANOMALY_05000473 (1) +/* Core Hang With L2/L3 Configured in Writeback Cache Mode */ +#define ANOMALY_05000475 (__SILICON_REVISION__ < 4) +/* TESTSET Instruction Cannot Be Interrupted */ +#define ANOMALY_05000477 (1) /* Anomalies that don't exist on this proc */ #define ANOMALY_05000119 (0) @@ -304,5 +318,6 @@ #define ANOMALY_05000450 (0) #define ANOMALY_05000465 (0) #define ANOMALY_05000467 (0) +#define ANOMALY_05000474 (0) #endif diff --git a/arch/blackfin/mach-bf561/include/mach/bf561.h b/arch/blackfin/mach-bf561/include/mach/bf561.h index 9968362a2ee..9f9a367e6a2 100644 --- a/arch/blackfin/mach-bf561/include/mach/bf561.h +++ b/arch/blackfin/mach-bf561/include/mach/bf561.h @@ -1,30 +1,9 @@ /* - * File: include/asm-blackfin/mach-bf561/bf561.h - * Based on: - * Author: + * SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 * - * Created: - * Description: SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 + * Copyright 2005-2008 Analog Devices Inc. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #ifndef __MACH_BF561_H__ diff --git a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h index fd5e8878b8c..e33e158bc16 100644 --- a/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h +++ b/arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h @@ -1,32 +1,7 @@ /* - * file: include/asm-blackfin/mach-bf561/bfin_serial_5xx.h - * based on: - * author: + * Copyright 2006-2009 Analog Devices Inc. * - * created: - * description: - * blackfin serial driver head file - * rev: - * - * modified: - * - * - * bugs: enter bugs at http://blackfin.uclinux.org/ - * - * this program is free software; you can redistribute it and/or modify - * it under the terms of the gnu general public license as published by - * the free software foundation; either version 2, or (at your option) - * any later version. - * - * this program is distributed in the hope that it will be useful, - * but without any warranty; without even the implied warranty of - * merchantability or fitness for a particular purpose. see the - * gnu general public license for more details. - * - * you should have received a copy of the gnu general public license - * along with this program; see the file copying. - * if not, write to the free software foundation, - * 59 temple place - suite 330, boston, ma 02111-1307, usa. + * Licensed under the GPL-2 or later. */ #include <linux/serial.h> diff --git a/arch/blackfin/mach-bf561/include/mach/blackfin.h b/arch/blackfin/mach-bf561/include/mach/blackfin.h index 8be31358ef8..67d6bdcd3fa 100644 --- a/arch/blackfin/mach-bf561/include/mach/blackfin.h +++ b/arch/blackfin/mach-bf561/include/mach/blackfin.h @@ -1,31 +1,7 @@ /* - * File: include/asm-blackfin/mach-bf561/blackfin.h - * Based on: - * Author: + * Copyright 2005-2009 Analog Devices Inc. * - * Created: - * Description: - * - * Rev: - * - * Modified: - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. - * If not, write to the Free Software Foundation, - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * Licensed under the GPL-2 or later. */ #ifndef _MACH_BLACKFIN_H_ diff --git a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h index 9d9858c2be6..81ecdb71c6a 100644 --- a/arch/blackfin/mach-bf561/include/mach/cdefBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/cdefBF561.h @@ -1,31 +1,7 @@ /* - * File: include/asm-blackfin/mach-bf561/cdefBF561.h - * Based on: - * Author: + * Copyright 2005-2009 Analog Devices Inc. * - * Created: - * Description: C POINTERS TO SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 - * - * Rev: - * - * Modified: - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. - * If not, write to the Free Software Foundation, - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * Licensed under the GPL-2 or later. */ #ifndef _CDEF_BF561_H diff --git a/arch/blackfin/mach-bf561/include/mach/defBF561.h b/arch/blackfin/mach-bf561/include/mach/defBF561.h index 5fc0f05026e..4c8e36b7fb3 100644 --- a/arch/blackfin/mach-bf561/include/mach/defBF561.h +++ b/arch/blackfin/mach-bf561/include/mach/defBF561.h @@ -1,32 +1,7 @@ - /* - * File: include/asm-blackfin/mach-bf561/defBF561.h - * Based on: - * Author: - * - * Created: - * Description: - * SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF561 - * Rev: - * - * Modified: - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. + * Copyright 2005-2009 Analog Devices Inc. * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. - * If not, write to the Free Software Foundation, - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * Licensed under the ADI BSD license or the GPL-2 (or later) */ #ifndef _DEF_BF561_H @@ -909,65 +884,11 @@ /* System MMR Register Bits */ /******************************************************************************* */ -/* ********************* PLL AND RESET MASKS ************************ */ - -/* PLL_CTL Masks */ -#define PLL_CLKIN 0x00000000 /* Pass CLKIN to PLL */ -#define PLL_CLKIN_DIV2 0x00000001 /* Pass CLKIN/2 to PLL */ -#define PLL_OFF 0x00000002 /* Shut off PLL clocks */ -#define STOPCK_OFF 0x00000008 /* Core clock off */ -#define PDWN 0x00000020 /* Put the PLL in a Deep Sleep state */ -#define BYPASS 0x00000100 /* Bypass the PLL */ - /* CHIPID Masks */ #define CHIPID_VERSION 0xF0000000 #define CHIPID_FAMILY 0x0FFFF000 #define CHIPID_MANUFACTURE 0x00000FFE -/* VR_CTL Masks */ -#define FREQ 0x0003 /* Switching Oscillator Frequency For Regulator */ -#define HIBERNATE 0x0000 /* Powerdown/Bypass On-Board Regulation */ -#define FREQ_333 0x0001 /* Switching Frequency Is 333 kHz */ -#define FREQ_667 0x0002 /* Switching Frequency Is 667 kHz */ -#define FREQ_1000 0x0003 /* Switching Frequency Is 1 MHz */ - -#define GAIN 0x000C /* Voltage Level Gain */ -#define GAIN_5 0x0000 /* GAIN = 5*/ -#define GAIN_10 0x0004 /* GAIN = 1*/ -#define GAIN_20 0x0008 /* GAIN = 2*/ -#define GAIN_50 0x000C /* GAIN = 5*/ - -#define VLEV 0x00F0 /* Internal Voltage Level */ -#define VLEV_085 0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */ -#define VLEV_090 0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */ -#define VLEV_095 0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */ -#define VLEV_100 0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */ -#define VLEV_105 0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */ -#define VLEV_110 0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */ -#define VLEV_115 0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */ -#define VLEV_120 0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */ -#define VLEV_125 0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */ -#define VLEV_130 0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */ - -#define WAKE 0x0100 /* Enable RTC/Reset Wakeup From Hibernate */ -#define SCKELOW 0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */ - -/* PLL_DIV Masks */ -#define SCLK_DIV(x) (x) /* SCLK = VCO / x */ - -#define CSEL 0x30 /* Core Select */ -#define SSEL 0xf /* System Select */ -#define CCLK_DIV1 0x00000000 /* CCLK = VCO / 1 */ -#define CCLK_DIV2 0x00000010 /* CCLK = VCO / 2 */ -#define CCLK_DIV4 0x00000020 /* CCLK = VCO / 4 */ -#define CCLK_DIV8 0x00000030 /* CCLK = VCO / 8 */ - -/* PLL_STAT Masks */ -#define ACTIVE_PLLENABLED 0x0001 /* Processor In Active Mode With PLL Enabled */ -#define FULL_ON 0x0002 /* Processor In Full On Mode */ -#define ACTIVE_PLLDISABLED 0x0004 /* Processor In Active Mode With PLL Disabled */ -#define PLL_LOCKED 0x0020 /* PLL_LOCKCNT Has Been Reached */ - /* SICA_SYSCR Masks */ #define COREB_SRAM_INIT 0x0020 @@ -1175,53 +1096,6 @@ /* ********** DMA CONTROLLER MASKS *********************8 */ -/* DMAx_CONFIG, MDMA_yy_CONFIG, IMDMA_yy_CONFIG Masks */ -#define DMAEN 0x00000001 /* Channel Enable */ -#define WNR 0x00000002 /* Channel Direction (W/R*) */ -#define WDSIZE_8 0x00000000 /* Word Size 8 bits */ -#define WDSIZE_16 0x00000004 /* Word Size 16 bits */ -#define WDSIZE_32 0x00000008 /* Word Size 32 bits */ -#define DMA2D 0x00000010 /* 2D/1D* Mode */ -#define RESTART 0x00000020 /* Restart */ -#define DI_SEL 0x00000040 /* Data Interrupt Select */ -#define DI_EN 0x00000080 /* Data Interrupt Enable */ -#define NDSIZE_0 0x0000 /* Next Descriptor Size = 0 (Stop/Autobuffer) */ -#define NDSIZE_1 0x0100 /* Next Descriptor Size = 1 */ -#define NDSIZE_2 0x0200 /* Next Descriptor Size = 2 */ -#define NDSIZE_3 0x0300 /* Next Descriptor Size = 3 */ -#define NDSIZE_4 0x0400 /* Next Descriptor Size = 4 */ -#define NDSIZE_5 0x0500 /* Next Descriptor Size = 5 */ -#define NDSIZE_6 0x0600 /* Next Descriptor Size = 6 */ -#define NDSIZE_7 0x0700 /* Next Descriptor Size = 7 */ -#define NDSIZE_8 0x0800 /* Next Descriptor Size = 8 */ -#define NDSIZE_9 0x0900 /* Next Descriptor Size = 9 */ -#define NDSIZE 0x00000900 /* Next Descriptor Size */ -#define DMAFLOW 0x00007000 /* Flow Control */ -#define DMAFLOW_STOP 0x0000 /* Stop Mode */ -#define DMAFLOW_AUTO 0x1000 /* Autobuffer Mode */ -#define DMAFLOW_ARRAY 0x4000 /* Descriptor Array Mode */ -#define DMAFLOW_SMALL 0x6000 /* Small Model Descriptor List Mode */ -#define DMAFLOW_LARGE 0x7000 /* Large Model Descriptor List Mode */ - -#define DMAEN_P 0 /* Channel Enable */ -#define WNR_P 1 /* Channel Direction (W/R*) */ -#define DMA2D_P 4 /* 2D/1D* Mode */ -#define RESTART_P 5 /* Restart */ -#define DI_SEL_P 6 /* Data Interrupt Select */ -#define DI_EN_P 7 /* Data Interrupt Enable */ - -/* DMAx_IRQ_STATUS, MDMA_yy_IRQ_STATUS, IMDMA_yy_IRQ_STATUS Masks */ - -#define DMA_DONE 0x00000001 /* DMA Done Indicator */ -#define DMA_ERR 0x00000002 /* DMA Error Indicator */ -#define DFETCH 0x00000004 /* Descriptor Fetch Indicator */ -#define DMA_RUN 0x00000008 /* DMA Running Indicator */ - -#define DMA_DONE_P 0 /* DMA Done Indicator */ -#define DMA_ERR_P 1 /* DMA Error Indicator */ -#define DFETCH_P 2 /* Descriptor Fetch Indicator */ -#define DMA_RUN_P 3 /* DMA Running Indicator */ - /* DMAx_PERIPHERAL_MAP, MDMA_yy_PERIPHERAL_MAP, IMDMA_yy_PERIPHERAL_MAP Masks */ #define CTYPE 0x00000040 /* DMA Channel Type Indicator */ diff --git a/arch/blackfin/mach-bf561/include/mach/gpio.h b/arch/blackfin/mach-bf561/include/mach/gpio.h index 7882f79e1ad..a651a8cf805 100644 --- a/arch/blackfin/mach-bf561/include/mach/gpio.h +++ b/arch/blackfin/mach-bf561/include/mach/gpio.h @@ -1,7 +1,4 @@ /* - * File: arch/blackfin/mach-bf561/include/mach/gpio.h - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * * Copyright (C) 2008 Analog Devices Inc. * Licensed under the GPL-2 or later. */ diff --git a/arch/blackfin/mach-bf561/include/mach/irq.h b/arch/blackfin/mach-bf561/include/mach/irq.h index 6698389c556..7b208db267b 100644 --- a/arch/blackfin/mach-bf561/include/mach/irq.h +++ b/arch/blackfin/mach-bf561/include/mach/irq.h @@ -1,32 +1,7 @@ - /* - * File: include/asm-blackfin/mach-bf561/irq.h - * Based on: - * Author: - * - * Created: - * Description: - * - * Rev: - * - * Modified: - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * Copyright 2005-2008 Analog Devices Inc. * - * You should have received a copy of the GNU General Public License - * along with this program; see the file COPYING. - * If not, write to the Free Software Foundation, - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * Licensed under the GPL-2 or later. */ #ifndef _BF561_IRQ_H_ diff --git a/arch/blackfin/mach-bf561/include/mach/portmux.h b/arch/blackfin/mach-bf561/include/mach/portmux.h index 2e5ad6347de..3a7b46bbe84 100644 --- a/arch/blackfin/mach-bf561/include/mach/portmux.h +++ b/arch/blackfin/mach-bf561/include/mach/portmux.h @@ -1,3 +1,9 @@ +/* + * Copyright 2007-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + #ifndef _MACH_PORTMUX_H_ #define _MACH_PORTMUX_H_ diff --git a/arch/blackfin/mach-bf561/include/mach/smp.h b/arch/blackfin/mach-bf561/include/mach/smp.h index f9e65ebe81b..390c7f4ae7b 100644 --- a/arch/blackfin/mach-bf561/include/mach/smp.h +++ b/arch/blackfin/mach-bf561/include/mach/smp.h @@ -1,3 +1,9 @@ +/* + * Copyright 2007-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + #ifndef _MACH_BF561_SMP #define _MACH_BF561_SMP diff --git a/arch/blackfin/mach-bf561/ints-priority.c b/arch/blackfin/mach-bf561/ints-priority.c index 9d2f2334472..b4424172ad9 100644 --- a/arch/blackfin/mach-bf561/ints-priority.c +++ b/arch/blackfin/mach-bf561/ints-priority.c @@ -1,30 +1,9 @@ /* - * File: arch/blackfin/mach-bf561/ints-priority.c - * Based on: arch/blackfin/mach-bf537/ints-priority.c - * Author: Michael Hennerich + * Set up the interrupt priorities * - * Created: - * Description: Set up the interrupt priorities + * Copyright 2005-2009 Analog Devices Inc. * - * Modified: - * Copyright 2004-2006 Analog Devices Inc. - * - * Bugs: Enter bugs at http://blackfin.uclinux.org/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #include <linux/module.h> diff --git a/arch/blackfin/mach-bf561/secondary.S b/arch/blackfin/mach-bf561/secondary.S index f72a6af20c4..8e6050369c0 100644 --- a/arch/blackfin/mach-bf561/secondary.S +++ b/arch/blackfin/mach-bf561/secondary.S @@ -1,26 +1,10 @@ /* - * File: arch/blackfin/mach-bf561/secondary.S - * Based on: arch/blackfin/mach-bf561/head.S - * Author: Philippe Gerum <rpm@xenomai.org> + * BF561 coreB bootstrap file * - * Copyright 2007 Analog Devices Inc. + * Copyright 2007-2009 Analog Devices Inc. + * Philippe Gerum <rpm@xenomai.org> * - * Description: BF561 coreB bootstrap file - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #include <linux/linkage.h> diff --git a/arch/blackfin/mach-bf561/smp.c b/arch/blackfin/mach-bf561/smp.c index 8c10701c251..0192532e96a 100644 --- a/arch/blackfin/mach-bf561/smp.c +++ b/arch/blackfin/mach-bf561/smp.c @@ -1,23 +1,8 @@ /* - * File: arch/blackfin/mach-bf561/smp.c - * Author: Philippe Gerum <rpm@xenomai.org> + * Copyright 2007-2009 Analog Devices Inc. + * Philippe Gerum <rpm@xenomai.org> * - * Copyright 2007 Analog Devices Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, see the file COPYING, or write - * to the Free Software Foundation, Inc., - * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * Licensed under the GPL-2 or later. */ #include <linux/init.h> @@ -67,8 +52,6 @@ int __init setup_profiling_timer(unsigned int multiplier) /* not supported */ void __cpuinit platform_secondary_init(unsigned int cpu) { - local_irq_disable(); - /* Clone setup for peripheral interrupt sources from CoreA. */ bfin_write_SICB_IMASK0(bfin_read_SICA_IMASK0()); bfin_write_SICB_IMASK1(bfin_read_SICA_IMASK1()); @@ -85,11 +68,6 @@ void __cpuinit platform_secondary_init(unsigned int cpu) bfin_write_SICB_IAR7(bfin_read_SICA_IAR7()); SSYNC(); - local_irq_enable(); - - /* Calibrate loops per jiffy value. */ - calibrate_delay(); - /* Store CPU-private information to the cpu_data array. */ bfin_setup_cpudata(cpu); @@ -123,9 +101,13 @@ int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle barrier(); } - spin_unlock(&boot_lock); - - return cpu_isset(cpu, cpu_callin_map) ? 0 : -ENOSYS; + if (cpu_isset(cpu, cpu_callin_map)) { + cpu_set(cpu, cpu_online_map); + /* release the lock and let coreb run */ + spin_unlock(&boot_lock); + return 0; + } else + panic("CPU%u: processor failed to boot\n", cpu); } void __init platform_request_ipi(irq_handler_t handler) |