diff options
Diffstat (limited to 'arch/blackfin/mach-bf609/include')
-rw-r--r-- | arch/blackfin/mach-bf609/include/mach/defBF60x_base.h | 10 | ||||
-rw-r--r-- | arch/blackfin/mach-bf609/include/mach/gpio.h | 8 | ||||
-rw-r--r-- | arch/blackfin/mach-bf609/include/mach/irq.h | 2 | ||||
-rw-r--r-- | arch/blackfin/mach-bf609/include/mach/portmux.h | 6 |
4 files changed, 15 insertions, 11 deletions
diff --git a/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h b/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h index f1a6afae1a7..35caa7bc192 100644 --- a/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h +++ b/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h @@ -839,6 +839,16 @@ #define PORTG_LOCK 0xFFC03344 /* PORTG Port x GPIO Lock Register */ #define PORTG_REVID 0xFFC0337C /* PORTG Port x GPIO Revision ID */ +/* ================================================== + Pads Controller Registers + ================================================== */ + +/* ========================= + PADS0 + ========================= */ +#define PADS0_EMAC_PTP_CLKSEL 0xFFC03404 /* PADS0 Clock Selection for EMAC and PTP */ +#define PADS0_TWI_VSEL 0xFFC03408 /* PADS0 TWI Voltage Selection */ +#define PADS0_PORTS_HYST 0xFFC03440 /* PADS0 Hysteresis Enable Register */ /* ========================= PINT Registers diff --git a/arch/blackfin/mach-bf609/include/mach/gpio.h b/arch/blackfin/mach-bf609/include/mach/gpio.h index c32c8cc8db2..07182513e79 100644 --- a/arch/blackfin/mach-bf609/include/mach/gpio.h +++ b/arch/blackfin/mach-bf609/include/mach/gpio.h @@ -152,14 +152,6 @@ struct gpio_port_t { unsigned long revid; }; -struct gpio_port_s { - unsigned short fer; - unsigned short data; - unsigned short dir; - unsigned short inen; - unsigned int mux; -}; - #endif #include <mach-common/ports-a.h> diff --git a/arch/blackfin/mach-bf609/include/mach/irq.h b/arch/blackfin/mach-bf609/include/mach/irq.h index fa0843d5d77..d1cb6a86f80 100644 --- a/arch/blackfin/mach-bf609/include/mach/irq.h +++ b/arch/blackfin/mach-bf609/include/mach/irq.h @@ -298,7 +298,7 @@ extern u8 sec_int_priority[]; /* - * bfin pint registers layout + * gpio pint registers layout */ struct bfin_pint_regs { u32 mask_set; diff --git a/arch/blackfin/mach-bf609/include/mach/portmux.h b/arch/blackfin/mach-bf609/include/mach/portmux.h index 2e1a51c2509..c48bb71a55c 100644 --- a/arch/blackfin/mach-bf609/include/mach/portmux.h +++ b/arch/blackfin/mach-bf609/include/mach/portmux.h @@ -7,8 +7,6 @@ #ifndef _MACH_PORTMUX_H_ #define _MACH_PORTMUX_H_ -#define MAX_RESOURCES MAX_BLACKFIN_GPIOS - /* EMAC RMII Port Mux */ #define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0)) #define P_MII0_MDIO (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0)) @@ -21,6 +19,7 @@ #define P_MII0_CRS (P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(0)) #define P_MII0_ERxER (P_DEFINED | P_IDENT(GPIO_PC4) | P_FUNCT(0)) #define P_MII0_TxCLK (P_DEFINED | P_IDENT(GPIO_PB14) | P_FUNCT(0)) +#define P_MII0_PTPPPS (P_DEFINED | P_IDENT(GPIO_PB15) | P_FUNCT(0)) #define P_RMII0 {\ P_MII0_ETxD0, \ @@ -32,6 +31,7 @@ P_MII0_TxCLK, \ P_MII0_PHYINT, \ P_MII0_CRS, \ + P_MII0_PTPPPS, \ P_MII0_MDC, \ P_MII0_MDIO, 0} @@ -46,6 +46,7 @@ #define P_MII1_CRS (P_DEFINED | P_IDENT(GPIO_PE13) | P_FUNCT(0)) #define P_MII1_ERxER (P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(0)) #define P_MII1_TxCLK (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(0)) +#define P_MII1_PTPPPS (P_DEFINED | P_IDENT(GPIO_PC9) | P_FUNCT(0)) #define P_RMII1 {\ P_MII1_ETxD0, \ @@ -57,6 +58,7 @@ P_MII1_TxCLK, \ P_MII1_PHYINT, \ P_MII1_CRS, \ + P_MII1_PTPPPS, \ P_MII1_MDC, \ P_MII1_MDIO, 0} |