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-rw-r--r--arch/ia64/kernel/head.S28
1 files changed, 26 insertions, 2 deletions
diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S
index db540e58c78..8bdea8eb62e 100644
--- a/arch/ia64/kernel/head.S
+++ b/arch/ia64/kernel/head.S
@@ -359,7 +359,31 @@ start_ap:
mov ar.rsc=0 // place RSE in enforced lazy mode
;;
loadrs // clear the dirty partition
- mov IA64_KR(PER_CPU_DATA)=r0 // clear physical per-CPU base
+ movl r19=__phys_per_cpu_start
+ mov r18=PERCPU_PAGE_SIZE
+ ;;
+#ifndef CONFIG_SMP
+ add r19=r19,r18
+ ;;
+#else
+(isAP) br.few 2f
+ mov r20=r19
+ sub r19=r19,r18
+ ;;
+ shr.u r18=r18,3
+1:
+ ld8 r21=[r20],8;;
+ st8[r19]=r21,8
+ adds r18=-1,r18;;
+ cmp4.lt p7,p6=0,r18
+(p7) br.cond.dptk.few 1b
+2:
+#endif
+ tpa r19=r19
+ ;;
+ .pred.rel.mutex isBP,isAP
+(isBP) mov IA64_KR(PER_CPU_DATA)=r19 // per-CPU base for cpu0
+(isAP) mov IA64_KR(PER_CPU_DATA)=r0 // clear physical per-CPU base
;;
mov ar.bspstore=r2 // establish the new RSE stack
;;
@@ -1123,7 +1147,7 @@ SET_REG(b5);
* p15 - used to track flag status.
*
* If you patch this code to use more registers, do not forget to update
- * the clobber lists for spin_lock() in include/asm-ia64/spinlock.h.
+ * the clobber lists for spin_lock() in arch/ia64/include/asm/spinlock.h.
*/
#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)