diff options
Diffstat (limited to 'arch/ia64/sn/kernel')
| -rw-r--r-- | arch/ia64/sn/kernel/bte.c | 4 | ||||
| -rw-r--r-- | arch/ia64/sn/kernel/bte_error.c | 8 | ||||
| -rw-r--r-- | arch/ia64/sn/kernel/io_common.c | 13 | ||||
| -rw-r--r-- | arch/ia64/sn/kernel/xp_nofault.S | 10 |
4 files changed, 21 insertions, 14 deletions
diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c index b362d6d6a8c..9456d403402 100644 --- a/arch/ia64/sn/kernel/bte.c +++ b/arch/ia64/sn/kernel/bte.c @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. */ #include <linux/module.h> @@ -227,7 +227,7 @@ retry_bteop: BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na)); if (transfer_stat & IBLS_ERROR) { - bte_status = transfer_stat & ~IBLS_ERROR; + bte_status = BTE_GET_ERROR_STATUS(transfer_stat); } else { bte_status = BTE_SUCCESS; } diff --git a/arch/ia64/sn/kernel/bte_error.c b/arch/ia64/sn/kernel/bte_error.c index 27c5936ccfe..4cb09f3f1ef 100644 --- a/arch/ia64/sn/kernel/bte_error.c +++ b/arch/ia64/sn/kernel/bte_error.c @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. */ #include <linux/types.h> @@ -148,7 +148,11 @@ int shub2_bte_error_handler(unsigned long _nodepda) for (i = 0; i < BTES_PER_NODE; i++) { bte = &err_nodepda->bte_if[i]; status = BTE_LNSTAT_LOAD(bte); - if ((status & IBLS_ERROR) || !(status & IBLS_BUSY)) + if (status & IBLS_ERROR) { + bte->bh_error = BTE_SHUB2_ERROR(status); + continue; + } + if (!(status & IBLS_BUSY)) continue; mod_timer(recovery_timer, jiffies + (HZ * 5)); BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda, diff --git a/arch/ia64/sn/kernel/io_common.c b/arch/ia64/sn/kernel/io_common.c index 4594770e685..c4eb84f9e78 100644 --- a/arch/ia64/sn/kernel/io_common.c +++ b/arch/ia64/sn/kernel/io_common.c @@ -347,7 +347,7 @@ sn_common_bus_fixup(struct pci_bus *bus, if (controller->node >= num_online_nodes()) { struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus); - printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u" + printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u " "L_IO=%lx L_MEM=%lx BASE=%lx\n", b->bs_asic_type, b->bs_xid, b->bs_persist_busnum, b->bs_legacy_io, b->bs_legacy_mem, b->bs_base); @@ -545,19 +545,18 @@ sn_io_late_init(void) nasid = NASID_GET(bussoft->bs_base); cnode = nasid_to_cnodeid(nasid); if ((bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) || - (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCE)) { - /* TIO PCI Bridge: find nearest node with CPUs */ + (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCE) || + (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_PIC)) { + /* PCI Bridge: find nearest node with CPUs */ int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode); if (e < 0) { near_cnode = (cnodeid_t)-1; /* use any node */ - printk(KERN_WARNING "pcibr_bus_fixup: failed " - "to find near node with CPUs to TIO " + printk(KERN_WARNING "sn_io_late_init: failed " + "to find near node with CPUs for " "node %d, err=%d\n", cnode, e); } PCI_CONTROLLER(bus)->node = near_cnode; - } else if (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_PIC) { - PCI_CONTROLLER(bus)->node = cnode; } } diff --git a/arch/ia64/sn/kernel/xp_nofault.S b/arch/ia64/sn/kernel/xp_nofault.S index 54e8973b6e9..98e7c7dbfdd 100644 --- a/arch/ia64/sn/kernel/xp_nofault.S +++ b/arch/ia64/sn/kernel/xp_nofault.S @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2004-2005 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2004-2007 Silicon Graphics, Inc. All Rights Reserved. */ @@ -14,6 +14,11 @@ * PIO read fails, the MCA handler will force the error to look * corrected and vector to the xp_error_PIOR which will return an error. * + * The definition of "consumption" and the time it takes for an MCA + * to surface is processor implementation specific. This code + * is sufficient on Itanium through the Montvale processor family. + * It may need to be adjusted for future processor implementations. + * * extern int xp_nofault_PIOR(void *remote_register); */ @@ -22,11 +27,10 @@ xp_nofault_PIOR: mov r8=r0 // Stage a success return value ld8.acq r9=[r32];; // PIO Read the specified register adds r9=1,r9;; // Add to force consumption - or r9=r9,r9;; // Or to force consumption + srlz.i;; // Allow time for MCA to surface br.ret.sptk.many b0;; // Return success .global xp_error_PIOR xp_error_PIOR: mov r8=1 // Return value of 1 br.ret.sptk.many b0;; // Return failure - |