diff options
Diffstat (limited to 'arch/ia64/sn')
| -rw-r--r-- | arch/ia64/sn/kernel/bte.c | 4 | ||||
| -rw-r--r-- | arch/ia64/sn/kernel/bte_error.c | 8 | ||||
| -rw-r--r-- | arch/ia64/sn/pci/tioce_provider.c | 2 |
3 files changed, 9 insertions, 5 deletions
diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c index b362d6d6a8c..9456d403402 100644 --- a/arch/ia64/sn/kernel/bte.c +++ b/arch/ia64/sn/kernel/bte.c @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. */ #include <linux/module.h> @@ -227,7 +227,7 @@ retry_bteop: BTE_LNSTAT_LOAD(bte), *bte->most_rcnt_na)); if (transfer_stat & IBLS_ERROR) { - bte_status = transfer_stat & ~IBLS_ERROR; + bte_status = BTE_GET_ERROR_STATUS(transfer_stat); } else { bte_status = BTE_SUCCESS; } diff --git a/arch/ia64/sn/kernel/bte_error.c b/arch/ia64/sn/kernel/bte_error.c index 27c5936ccfe..4cb09f3f1ef 100644 --- a/arch/ia64/sn/kernel/bte_error.c +++ b/arch/ia64/sn/kernel/bte_error.c @@ -3,7 +3,7 @@ * License. See the file "COPYING" in the main directory of this archive * for more details. * - * Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved. + * Copyright (c) 2000-2007 Silicon Graphics, Inc. All Rights Reserved. */ #include <linux/types.h> @@ -148,7 +148,11 @@ int shub2_bte_error_handler(unsigned long _nodepda) for (i = 0; i < BTES_PER_NODE; i++) { bte = &err_nodepda->bte_if[i]; status = BTE_LNSTAT_LOAD(bte); - if ((status & IBLS_ERROR) || !(status & IBLS_BUSY)) + if (status & IBLS_ERROR) { + bte->bh_error = BTE_SHUB2_ERROR(status); + continue; + } + if (!(status & IBLS_BUSY)) continue; mod_timer(recovery_timer, jiffies + (HZ * 5)); BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda, diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index cee9379d44e..e1a3e19d3d9 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c @@ -41,7 +41,7 @@ * } else * do desired mmr access * - * According to hw, we can use reads instead of writes to the above addres + * According to hw, we can use reads instead of writes to the above address * * Note this WAR can only to be used for accessing internal MMR's in the * TIOCE Coretalk Address Range 0x0 - 0x07ff_ffff. This includes the |