diff options
Diffstat (limited to 'arch/m68knommu')
23 files changed, 1722 insertions, 529 deletions
diff --git a/arch/m68knommu/Kconfig b/arch/m68knommu/Kconfig index 117f183f0b4..8520df9cee6 100644 --- a/arch/m68knommu/Kconfig +++ b/arch/m68knommu/Kconfig @@ -71,21 +71,31 @@ config M5206e help Motorola ColdFire 5206e processor support. +config M523x + bool "MCF523x" + help + Freescale Coldfire 5230/1/2/4/5 processor support + config M5249 bool "MCF5249" help Motorola ColdFire 5249 processor support. -config M527x - bool "MCF527x" +config M5271 + bool "MCF5271" help - Freescale (Motorola) ColdFire 5270/5271/5274/5275 processor support. + Freescale (Motorola) ColdFire 5270/5271 processor support. config M5272 bool "MCF5272" help Motorola ColdFire 5272 processor support. +config M5275 + bool "MCF5275" + help + Freescale (Motorola) ColdFire 5274/5275 processor support. + config M528x bool "MCF528x" help @@ -103,9 +113,14 @@ config M5407 endchoice +config M527x + bool + depends on (M5271 || M5275) + default y + config COLDFIRE bool - depends on (M5206 || M5206e || M5249 || M527x || M5272 || M528x || M5307 || M5407) + depends on (M5206 || M5206e || M523x || M5249 || M527x || M5272 || M528x || M5307 || M5407) default y choice @@ -183,6 +198,11 @@ config CLOCK_60MHz help Select a 60MHz CPU clock frequency. +config CLOCK_62_5MHz + bool "62.5MHz" + help + Select a 62.5MHz CPU clock frequency. + config CLOCK_64MHz bool "64MHz" help @@ -302,6 +322,12 @@ config ELITE help Support for the Motorola M5206eLITE board. +config M5235EVB + bool "Freescale M5235EVB support" + depends on M523x + help + Support for the Freescale M5235EVB board. + config M5249C3 bool "Motorola M5249C3 board support" depends on M5249 @@ -310,13 +336,13 @@ config M5249C3 config M5271EVB bool "Freescale (Motorola) M5271EVB board support" - depends on M527x + depends on M5271 help Support for the Freescale (Motorola) M5271EVB board. config M5275EVB bool "Freescale (Motorola) M5275EVB board support" - depends on M527x + depends on M5275 help Support for the Freescale (Motorola) M5275EVB board. @@ -343,6 +369,12 @@ config COBRA5282 depends on M528x help Support for the senTec COBRA5282 board. + +config SOM5282EM + bool "EMAC.Inc SOM5282EM board support" + depends on M528x + help + Support for the EMAC.Inc SOM5282EM module. config ARN5307 bool "Arnewsh 5307 board support" @@ -410,6 +442,12 @@ config CPU16B help Support for the SNEHA CPU16B board. +config MOD5272 + bool "Netburner MOD-5272 board support" + depends on M5272 + help + Support for the Netburner MOD-5272 board. + config ROMFS_FROM_ROM bool " ROMFS image not RAM resident" depends on (NETtel || SNAPGEAR) @@ -430,7 +468,7 @@ config ARNEWSH config MOTOROLA bool default y - depends on (M5206eC3 || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3) + depends on (M5206eC3 || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5407C3) config HW_FEITH bool @@ -441,6 +479,11 @@ config senTec bool default y depends on (COBRA5272 || COBRA5282) + +config EMAC_INC + bool + default y + depends on (SOM5282EM) config SNEHA bool @@ -455,6 +498,15 @@ config LARGE_ALLOCS a lot of RAM, and you need to able to allocate very large contiguous chunks. If unsure, say N. +config 4KSTACKS + bool "Use 4Kb for kernel stacks instead of 8Kb" + default y + help + If you say Y here the kernel will use a 4Kb stacksize for the + kernel stack attached to each process/thread. This facilitates + running more threads on a system and also reduces the pressure + on the VM subsystem for higher order allocations. + choice prompt "RAM size" default AUTO diff --git a/arch/m68knommu/Makefile b/arch/m68knommu/Makefile index a254aa9d499..b8fdf191b8f 100644 --- a/arch/m68knommu/Makefile +++ b/arch/m68knommu/Makefile @@ -14,6 +14,7 @@ platform-$(CONFIG_M68VZ328) := 68VZ328 platform-$(CONFIG_M68360) := 68360 platform-$(CONFIG_M5206) := 5206 platform-$(CONFIG_M5206e) := 5206e +platform-$(CONFIG_M523x) := 523x platform-$(CONFIG_M5249) := 5249 platform-$(CONFIG_M527x) := 527x platform-$(CONFIG_M5272) := 5272 @@ -29,6 +30,7 @@ board-$(CONFIG_UCQUICC) := uCquicc board-$(CONFIG_DRAGEN2) := de2 board-$(CONFIG_ARNEWSH) := ARNEWSH board-$(CONFIG_MOTOROLA) := MOTOROLA +board-$(CONFIG_M5235EVB) := M5235EVB board-$(CONFIG_M5271EVB) := M5271EVB board-$(CONFIG_M5275EVB) := M5275EVB board-$(CONFIG_M5282EVB) := M5282EVB @@ -39,6 +41,7 @@ board-$(CONFIG_SECUREEDGEMP3) := MP3 board-$(CONFIG_CLEOPATRA) := CLEOPATRA board-$(CONFIG_senTec) := senTec board-$(CONFIG_SNEHA) := SNEHA +board-$(CONFIG_MOD5272) := MOD5272 BOARD := $(board-y) model-$(CONFIG_RAMKERNEL) := ram @@ -53,6 +56,7 @@ MODEL := $(model-y) # cpuclass-$(CONFIG_M5206) := 5307 cpuclass-$(CONFIG_M5206e) := 5307 +cpuclass-$(CONFIG_M523x) := 5307 cpuclass-$(CONFIG_M5249) := 5307 cpuclass-$(CONFIG_M527x) := 5307 cpuclass-$(CONFIG_M5272) := 5307 @@ -76,6 +80,7 @@ export PLATFORM BOARD MODEL CPUCLASS # cflags-$(CONFIG_M5206) := -m5200 -Wa,-S -Wa,-m5200 cflags-$(CONFIG_M5206e) := -m5200 -Wa,-S -Wa,-m5200 +cflags-$(CONFIG_M523x) := -m5307 -Wa,-S -Wa,-m5307 cflags-$(CONFIG_M5249) := -m5200 -Wa,-S -Wa,-m5200 cflags-$(CONFIG_M527x) := -m5307 -Wa,-S -Wa,-m5307 cflags-$(CONFIG_M5272) := -m5307 -Wa,-S -Wa,-m5307 @@ -97,21 +102,11 @@ CFLAGS += -DUTS_SYSNAME=\"uClinux\" head-y := arch/m68knommu/platform/$(cpuclass-y)/head.o -CLEAN_FILES := include/asm-$(ARCH)/asm-offsets.h \ - arch/$(ARCH)/kernel/asm-offsets.s - core-y += arch/m68knommu/kernel/ \ arch/m68knommu/mm/ \ $(CLASSDIR) \ arch/m68knommu/platform/$(PLATFORM)/ libs-y += arch/m68knommu/lib/ -prepare: include/asm-$(ARCH)/asm-offsets.h - archclean: - $(call descend arch/$(ARCH)/boot, subdirclean) - -include/asm-$(ARCH)/asm-offsets.h: arch/$(ARCH)/kernel/asm-offsets.s \ - include/asm include/linux/version.h \ - include/config/MARKER - $(call filechk,gen-asm-offsets) + $(Q)$(MAKE) $(clean)=arch/m68knommu/boot diff --git a/arch/m68knommu/defconfig b/arch/m68knommu/defconfig index e4bd31be966..87f2d6587c5 100644 --- a/arch/m68knommu/defconfig +++ b/arch/m68knommu/defconfig @@ -1,24 +1,48 @@ # # Automatically generated make config: don't edit +# Linux kernel version: 2.6.13-uc0 +# Wed Aug 31 15:03:26 2005 # +CONFIG_M68KNOMMU=y # CONFIG_MMU is not set # CONFIG_FPU is not set CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_RWSEM_XCHGADD_ALGORITHM is not set +CONFIG_GENERIC_CALIBRATE_DELAY=y # # Code maturity level options # CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 # # General setup # -# CONFIG_SYSVIPC is not set +CONFIG_LOCALVERSION="" +# CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_SYSCTL is not set -CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_AUDIT is not set +# CONFIG_HOTPLUG is not set +# CONFIG_KOBJECT_UEVENT is not set +# CONFIG_IKCONFIG is not set +CONFIG_EMBEDDED=y +# CONFIG_KALLSYMS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y +# CONFIG_FUTEX is not set +# CONFIG_EPOLL is not set +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 +CONFIG_BASE_SMALL=0 # # Loadable module support @@ -34,9 +58,11 @@ CONFIG_LOG_BUF_SHIFT=14 # CONFIG_M68360 is not set # CONFIG_M5206 is not set # CONFIG_M5206e is not set +# CONFIG_M523x is not set # CONFIG_M5249 is not set -# CONFIG_M527x is not set +# CONFIG_M5271 is not set CONFIG_M5272=y +# CONFIG_M5275 is not set # CONFIG_M528x is not set # CONFIG_M5307 is not set # CONFIG_M5407 is not set @@ -54,6 +80,8 @@ CONFIG_COLDFIRE=y # CONFIG_CLOCK_50MHz is not set # CONFIG_CLOCK_54MHz is not set # CONFIG_CLOCK_60MHz is not set +# CONFIG_CLOCK_62_5MHz is not set +# CONFIG_CLOCK_64MHz is not set CONFIG_CLOCK_66MHz=y # CONFIG_CLOCK_70MHz is not set # CONFIG_CLOCK_100MHz is not set @@ -65,13 +93,19 @@ CONFIG_CLOCK_66MHz=y # Platform # CONFIG_M5272C3=y +# CONFIG_COBRA5272 is not set +# CONFIG_CANCam is not set +# CONFIG_SCALES is not set # CONFIG_NETtel is not set +# CONFIG_CPU16B is not set +# CONFIG_MOD5272 is not set CONFIG_MOTOROLA=y # CONFIG_LARGE_ALLOCS is not set -# CONFIG_RAMAUTO is not set +CONFIG_4KSTACKS=y +CONFIG_RAMAUTO=y # CONFIG_RAM4MB is not set # CONFIG_RAM8MB is not set -CONFIG_RAM16MB=y +# CONFIG_RAM16MB is not set # CONFIG_RAM32MB is not set CONFIG_RAMAUTOBIT=y # CONFIG_RAM8BIT is not set @@ -79,20 +113,34 @@ CONFIG_RAMAUTOBIT=y # CONFIG_RAM32BIT is not set CONFIG_RAMKERNEL=y # CONFIG_ROMKERNEL is not set -# CONFIG_HIMEMKERNEL is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y # # Bus options (PCI, PCMCIA, EISA, MCA, ISA) # # CONFIG_PCI is not set -# CONFIG_HOTPLUG is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +# CONFIG_PCCARD is not set + +# +# PCI Hotplug Support +# # # Executable file formats # -CONFIG_KCORE_AOUT=y CONFIG_BINFMT_FLAT=y # CONFIG_BINFMT_ZFLAT is not set +# CONFIG_BINFMT_SHARED_FLAT is not set +# CONFIG_BINFMT_MISC is not set # # Power management options @@ -100,12 +148,82 @@ CONFIG_BINFMT_FLAT=y # CONFIG_PM is not set # +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_IP_TCPDIAG is not set +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_FW_LOADER is not set + +# # Memory Technology Devices (MTD) # CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set -CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y # CONFIG_MTD_REDBOOT_PARTS is not set # CONFIG_MTD_CMDLINE_PARTS is not set @@ -116,35 +234,50 @@ CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set # CONFIG_NFTL is not set +# CONFIG_INFTL is not set # # RAM/ROM/Flash chip drivers # # CONFIG_MTD_CFI is not set # CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set CONFIG_MTD_RAM=y # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_OBSOLETE_CHIPS is not set # # Mapping drivers for chip access # +# CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_UCLINUX=y +# CONFIG_MTD_SNAPGEARuC is not set +# CONFIG_MTD_PLATRAM is not set # # Self-contained MTD device drivers # # CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set # CONFIG_MTD_BLKMTD is not set +# CONFIG_MTD_BLOCK2MTD is not set # # Disk-On-Chip Device Drivers # -# CONFIG_MTD_DOC1000 is not set # CONFIG_MTD_DOC2000 is not set # CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set # # NAND Flash Device Drivers @@ -159,21 +292,32 @@ CONFIG_MTD_UCLINUX=y # # Plug and Play support # -# CONFIG_PNP is not set # # Block devices # # CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 # CONFIG_BLK_DEV_INITRD is not set -# CONFIG_BLK_DEV_BLKMEM is not set +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CDROM_PKTCDVD is not set # -# ATA/IDE/MFM/RLL support +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support # # CONFIG_IDE is not set @@ -190,249 +334,230 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 # # Fusion MPT device support # +# CONFIG_FUSION is not set # -# I2O device support -# - -# -# Networking support -# -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -# CONFIG_NETFILTER is not set -# CONFIG_FILTER is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_INET_ECN is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_XFRM_USER is not set -# CONFIG_IPV6 is not set - -# -# SCTP Configuration (EXPERIMENTAL) +# IEEE 1394 (FireWire) support # -CONFIG_IPV6_SCTP__=y -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_LLC is not set -# CONFIG_DECNET is not set -# CONFIG_BRIDGE is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_HW_FLOWCONTROL is not set # -# QoS and/or fair queueing +# I2O device support # -# CONFIG_NET_SCHED is not set # -# Network testing +# Network device support # -# CONFIG_NET_PKTGEN is not set CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set -# CONFIG_ETHERTAP is not set # # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y # CONFIG_MII is not set +# CONFIG_NET_VENDOR_SMC is not set +# CONFIG_NE2000 is not set +# CONFIG_NET_PCI is not set CONFIG_FEC=y +# CONFIG_FEC2 is not set # # Ethernet (1000 Mbit) # + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set CONFIG_PPP=y # CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set # CONFIG_PPP_ASYNC is not set # CONFIG_PPP_SYNC_TTY is not set # CONFIG_PPP_DEFLATE is not set # CONFIG_PPP_BSDCOMP is not set # CONFIG_PPPOE is not set # CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set # -# Wireless LAN (non-hamradio) +# ISDN subsystem # -# CONFIG_NET_RADIO is not set +# CONFIG_ISDN is not set # -# Token Ring devices (depends on LLC=y) +# Telephony Support # -# CONFIG_SHAPER is not set +# CONFIG_PHONE is not set # -# Wan interfaces +# Input device support # -# CONFIG_WAN is not set +# CONFIG_INPUT is not set # -# Amateur Radio support +# Hardware I/O ports # -# CONFIG_HAMRADIO is not set +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set # -# IrDA (infrared) support +# Character devices # -# CONFIG_IRDA is not set +# CONFIG_VT is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_LEDMAN is not set +# CONFIG_RESETSWITCH is not set # -# ISDN subsystem +# Serial drivers # -# CONFIG_ISDN_BOOL is not set +# CONFIG_SERIAL_8250 is not set # -# Telephony Support +# Non-8250 serial port support # -# CONFIG_PHONE is not set +CONFIG_SERIAL_COLDFIRE=y +# CONFIG_UNIX98_PTYS is not set +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 # -# Input device support +# IPMI # -CONFIG_INPUT=y +# CONFIG_IPMI_HANDLER is not set # -# Userland interfaces +# Watchdog Cards # -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_TSDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set +# CONFIG_WATCHDOG is not set +# CONFIG_MCFWATCHDOG is not set +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set # -# Input I/O drivers +# Ftape, the floppy tape device driver # -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set +# CONFIG_RAW_DRIVER is not set # -# Input Device Drivers +# TPM devices # -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -CONFIG_INPUT_MOUSE=y -CONFIG_MOUSE_PS2=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set +# CONFIG_MCF_QSPI is not set +# CONFIG_M41T11M6 is not set # -# Character devices +# I2C support # -# CONFIG_VT is not set -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_RESETSWITCH is not set +# CONFIG_I2C is not set +# CONFIG_I2C_SENSOR is not set # -# Serial drivers +# Dallas's 1-wire bus # -# CONFIG_SERIAL_8250 is not set +# CONFIG_W1 is not set # -# Non-8250 serial port support +# Hardware Monitoring support # -CONFIG_SERIAL_COLDFIRE=y -# CONFIG_UNIX98_PTYS is not set +# CONFIG_HWMON is not set # -# I2C support +# Misc devices # -# CONFIG_I2C is not set # -# I2C Hardware Sensors Mainboard support +# Multimedia devices # +# CONFIG_VIDEO_DEV is not set # -# I2C Hardware Sensors Chip support +# Digital Video Broadcasting Devices # +# CONFIG_DVB is not set # -# Mice +# Graphics support # -# CONFIG_BUSMOUSE is not set -# CONFIG_QIC02_TAPE is not set +# CONFIG_FB is not set # -# IPMI +# SPI support # -# CONFIG_IPMI_HANDLER is not set +# CONFIG_SPI is not set # -# Watchdog Cards +# Sound # -# CONFIG_WATCHDOG is not set -# CONFIG_NVRAM is not set -# CONFIG_RTC is not set -# CONFIG_GEN_RTC is not set -# CONFIG_DTLK is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set +# CONFIG_SOUND is not set # -# Ftape, the floppy tape device driver +# USB support # -# CONFIG_FTAPE is not set -# CONFIG_AGP is not set -# CONFIG_DRM is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_HANGCHECK_TIMER is not set +# CONFIG_USB_ARCH_HAS_HCD is not set +# CONFIG_USB_ARCH_HAS_OHCI is not set # -# Multimedia devices +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# InfiniBand support +# + +# +# SN Devices # -# CONFIG_VIDEO_DEV is not set # # File systems # CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT3_FS is not set # CONFIG_JBD is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set + +# +# XFS support +# # CONFIG_XFS_FS is not set # CONFIG_MINIX_FS is not set CONFIG_ROMFS_FS=y +CONFIG_MAGIC_ROM_PTR=y +# CONFIG_INOTIFY is not set # CONFIG_QUOTA is not set +# CONFIG_DNOTIFY is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set @@ -445,15 +570,17 @@ CONFIG_ROMFS_FS=y # # DOS/FAT/NT Filesystems # -# CONFIG_FAT_FS is not set +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set # CONFIG_NTFS_FS is not set # # Pseudo filesystems # CONFIG_PROC_FS=y -# CONFIG_DEVFS_FS is not set +CONFIG_SYSFS=y # CONFIG_TMPFS is not set +# CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y # @@ -462,6 +589,7 @@ CONFIG_RAMFS=y # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set @@ -479,12 +607,10 @@ CONFIG_RAMFS=y # # CONFIG_NFS_FS is not set # CONFIG_NFSD is not set -# CONFIG_EXPORTFS is not set # CONFIG_SMB_FS is not set # CONFIG_CIFS is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set -# CONFIG_INTERMEZZO_FS is not set # CONFIG_AFS_FS is not set # @@ -494,30 +620,19 @@ CONFIG_RAMFS=y CONFIG_MSDOS_PARTITION=y # -# Graphics support -# -# CONFIG_FB is not set - -# -# Sound -# -# CONFIG_SOUND is not set - -# -# USB support -# - -# -# Bluetooth support +# Native Language Support # -# CONFIG_BT is not set +# CONFIG_NLS is not set # # Kernel hacking # +# CONFIG_PRINTK_TIME is not set +# CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 # CONFIG_FULLDEBUG is not set -# CONFIG_MAGIC_SYSRQ is not set # CONFIG_HIGHPROFILE is not set +# CONFIG_BOOTPARAM is not set # CONFIG_DUMPTOFLASH is not set # CONFIG_NO_KERNEL_MSG is not set # CONFIG_BDM_DISABLE is not set @@ -525,6 +640,7 @@ CONFIG_MSDOS_PARTITION=y # # Security options # +# CONFIG_KEYS is not set # CONFIG_SECURITY is not set # @@ -533,6 +649,12 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_CRYPTO is not set # +# Hardware crypto devices +# + +# # Library routines # +# CONFIG_CRC_CCITT is not set # CONFIG_CRC32 is not set +# CONFIG_LIBCRC32C is not set diff --git a/arch/m68knommu/kernel/setup.c b/arch/m68knommu/kernel/setup.c index 557238596dc..a220345e974 100644 --- a/arch/m68knommu/kernel/setup.c +++ b/arch/m68knommu/kernel/setup.c @@ -6,7 +6,7 @@ * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com} * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com> * Copyright (C) 1995 Hamish Macdonald - * Copyright (C) 2000 Lineo Inc. (www.lineo.com) + * Copyright (C) 2000 Lineo Inc. (www.lineo.com) * Copyright (C) 2001 Lineo, Inc. <www.lineo.com> * * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca> @@ -23,6 +23,7 @@ #include <linux/interrupt.h> #include <linux/fs.h> #include <linux/fb.h> +#include <linux/module.h> #include <linux/console.h> #include <linux/genhd.h> #include <linux/errno.h> @@ -45,6 +46,9 @@ unsigned long rom_length; unsigned long memory_start; unsigned long memory_end; +EXPORT_SYMBOL(memory_start); +EXPORT_SYMBOL(memory_end); + char command_line[COMMAND_LINE_SIZE]; /* setup some dummy routines */ @@ -103,15 +107,21 @@ void (*mach_power_off)( void ) = NULL; #if defined(CONFIG_M5206e) #define CPU "COLDFIRE(m5206e)" #endif +#if defined(CONFIG_M523x) + #define CPU "COLDFIRE(m523x)" +#endif #if defined(CONFIG_M5249) #define CPU "COLDFIRE(m5249)" #endif -#if defined(CONFIG_M527x) - #define CPU "COLDFIRE(m5270/5271/5274/5275)" +#if defined(CONFIG_M5271) + #define CPU "COLDFIRE(m5270/5271)" #endif #if defined(CONFIG_M5272) #define CPU "COLDFIRE(m5272)" #endif +#if defined(CONFIG_M5275) + #define CPU "COLDFIRE(m5274/5275)" +#endif #if defined(CONFIG_M528x) #define CPU "COLDFIRE(m5280/5282)" #endif @@ -152,7 +162,7 @@ void setup_arch(char **cmdline_p) init_mm.start_code = (unsigned long) &_stext; init_mm.end_code = (unsigned long) &_etext; init_mm.end_data = (unsigned long) &_edata; - init_mm.brk = (unsigned long) 0; + init_mm.brk = (unsigned long) 0; config_BSP(&command_line[0], sizeof(command_line)); @@ -171,7 +181,7 @@ void setup_arch(char **cmdline_p) #endif #ifdef CONFIG_ELITE printk(KERN_INFO "Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n"); -#endif +#endif #ifdef CONFIG_TELOS printk(KERN_INFO "Modified for Omnia ToolVox by James D. Schettine, james@telos-systems.com\n"); #endif @@ -200,6 +210,9 @@ void setup_arch(char **cmdline_p) #ifdef CONFIG_DRAGEN2 printk(KERN_INFO "DragonEngine II board support by Georges Menie\n"); #endif +#ifdef CONFIG_M5235EVB + printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)"); +#endif #ifdef DEBUG printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x " @@ -223,7 +236,7 @@ void setup_arch(char **cmdline_p) saved_command_line[COMMAND_LINE_SIZE-1] = 0; #ifdef DEBUG - if (strlen(*cmdline_p)) + if (strlen(*cmdline_p)) printk(KERN_DEBUG "Command line: '%s'\n", *cmdline_p); #endif diff --git a/arch/m68knommu/kernel/signal.c b/arch/m68knommu/kernel/signal.c index 30dceb59a46..43a2726c0d0 100644 --- a/arch/m68knommu/kernel/signal.c +++ b/arch/m68knommu/kernel/signal.c @@ -732,13 +732,12 @@ handle_signal(int sig, struct k_sigaction *ka, siginfo_t *info, if (ka->sa.sa_flags & SA_ONESHOT) ka->sa.sa_handler = SIG_DFL; - if (!(ka->sa.sa_flags & SA_NODEFER)) { - spin_lock_irq(¤t->sighand->siglock); - sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); + spin_lock_irq(¤t->sighand->siglock); + sigorsets(¤t->blocked,¤t->blocked,&ka->sa.sa_mask); + if (!(ka->sa.sa_flags & SA_NODEFER)) sigaddset(¤t->blocked,sig); - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - } + recalc_sigpending(); + spin_unlock_irq(¤t->sighand->siglock); } /* diff --git a/arch/m68knommu/kernel/time.c b/arch/m68knommu/kernel/time.c index 5c3ca671627..b17c1ecba96 100644 --- a/arch/m68knommu/kernel/time.c +++ b/arch/m68knommu/kernel/time.c @@ -68,7 +68,7 @@ static irqreturn_t timer_interrupt(int irq, void *dummy, struct pt_regs * regs) * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be * called as close as possible to 500 ms before the new second starts. */ - if ((time_status & STA_UNSYNC) == 0 && + if (ntp_synced() && xtime.tv_sec > last_rtc_update + 660 && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { @@ -178,10 +178,7 @@ int do_settimeofday(struct timespec *tv) set_normalized_timespec(&xtime, sec, nsec); set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); - time_adjust = 0; /* stop active adjtime() */ - time_status |= STA_UNSYNC; - time_maxerror = NTP_PHASE_LIMIT; - time_esterror = NTP_PHASE_LIMIT; + ntp_clear(); write_sequnlock_irq(&xtime_lock); clock_was_set(); return 0; diff --git a/arch/m68knommu/kernel/traps.c b/arch/m68knommu/kernel/traps.c index ad7dc6347f1..5bc06846286 100644 --- a/arch/m68knommu/kernel/traps.c +++ b/arch/m68knommu/kernel/traps.c @@ -21,6 +21,7 @@ #include <linux/signal.h> #include <linux/kernel.h> #include <linux/mm.h> +#include <linux/module.h> #include <linux/types.h> #include <linux/a.out.h> #include <linux/user.h> @@ -38,7 +39,7 @@ #include <asm/machdep.h> #include <asm/siginfo.h> -static char *vec_names[] = { +static char const * const vec_names[] = { "RESET SP", "RESET PC", "BUS ERROR", "ADDRESS ERROR", "ILLEGAL INSTRUCTION", "ZERO DIVIDE", "CHK", "TRAPcc", "PRIVILEGE VIOLATION", "TRACE", "LINE 1010", "LINE 1111", @@ -106,17 +107,20 @@ asmlinkage void buserr_c(struct frame *fp) int kstack_depth_to_print = 48; -void show_stack(struct task_struct *task, unsigned long *esp) +void show_stack(struct task_struct *task, unsigned long *stack) { - unsigned long *stack, *endstack, addr; + unsigned long *endstack, addr; extern char _start, _etext; int i; - if (esp == NULL) - esp = (unsigned long *) &esp; + if (!stack) { + if (task) + stack = (unsigned long *)task->thread.ksp; + else + stack = (unsigned long *)&stack; + } - stack = esp; - addr = (unsigned long) esp; + addr = (unsigned long) stack; endstack = (unsigned long *) PAGE_ALIGN(addr); printk(KERN_EMERG "Stack from %08lx:", (unsigned long)stack); @@ -306,6 +310,8 @@ void dump_stack(void) show_stack(current, &stack); } +EXPORT_SYMBOL(dump_stack); + #ifdef CONFIG_M68KFPU_EMU asmlinkage void fpemu_signal(int signal, int code, void *addr) { diff --git a/arch/m68knommu/kernel/vmlinux.lds.S b/arch/m68knommu/kernel/vmlinux.lds.S index 31cb12892da..47f06787190 100644 --- a/arch/m68knommu/kernel/vmlinux.lds.S +++ b/arch/m68knommu/kernel/vmlinux.lds.S @@ -107,7 +107,7 @@ */ #if defined(CONFIG_ELITE) #define RAM_START 0x30020000 -#define RAM_END 0xe0000 +#define RAM_LENGTH 0xe0000 #endif /* @@ -118,7 +118,8 @@ #if defined(CONFIG_M5206eC3) || defined(CONFIG_M5249C3) || \ defined(CONFIG_M5272C3) || defined(CONFIG_M5307C3) || \ defined(CONFIG_ARN5307) || defined(CONFIG_M5407C3) || \ - defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) + defined(CONFIG_M5271EVB) || defined(CONFIG_M5275EVB) || \ + defined(CONFIG_M5235EVB) #define RAM_START 0x20000 #define RAM_LENGTH 0x3e0000 #endif @@ -145,6 +146,16 @@ #define RAM_LENGTH 0x3f0000 #endif + +/* + * The EMAC SoM-5282EM module. + */ +#if defined(CONFIG_SOM5282EM) +#define RAM_START 0x10000 +#define RAM_LENGTH 0xff0000 +#endif + + /* * These flash boot boards use all of ram for operation. Again the * actual memory size is not important here, assume at least 4MiB. @@ -158,7 +169,7 @@ #endif /* - * Sneha Boards mimimun memmory + * Sneha Boards mimimun memory * The end of RAM will vary depending on how much ram is fitted, * but this isn't important here, we assume at least 4MiB. */ @@ -167,6 +178,12 @@ #define RAM_LENGTH 0x3e0000 #endif +#if defined(CONFIG_MOD5272) +#define RAM_START 0x02000000 +#define RAM_LENGTH 0x00800000 +#define RAMVEC_START 0x20000000 +#define RAMVEC_LENGTH 0x00000400 +#endif #if defined(CONFIG_RAMKERNEL) #define TEXT ram diff --git a/arch/m68knommu/platform/523x/Makefile b/arch/m68knommu/platform/523x/Makefile new file mode 100644 index 00000000000..c1578b01616 --- /dev/null +++ b/arch/m68knommu/platform/523x/Makefile @@ -0,0 +1,19 @@ +# +# Makefile for the m68knommu linux kernel. +# + +# +# If you want to play with the HW breakpoints then you will +# need to add define this, which will give you a stack backtrace +# on the console port whenever a DBG interrupt occurs. You have to +# set up you HW breakpoints to trigger a DBG interrupt: +# +# EXTRA_CFLAGS += -DTRAP_DBG_INTERRUPT +# EXTRA_AFLAGS += -DTRAP_DBG_INTERRUPT +# + +ifdef CONFIG_FULLDEBUG +AFLAGS += -DDEBUGGER_COMPATIBLE_CACHE=1 +endif + +obj-y := config.o diff --git a/arch/m68knommu/platform/523x/config.c b/arch/m68knommu/platform/523x/config.c new file mode 100644 index 00000000000..22767ce506e --- /dev/null +++ b/arch/m68knommu/platform/523x/config.c @@ -0,0 +1,82 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/523x/config.c + * + * Sub-architcture dependant initialization code for the Freescale + * 523x CPUs. + * + * Copyright (C) 1999-2005, Greg Ungerer (gerg@snapgear.com) + * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com) + */ + +/***************************************************************************/ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/sched.h> +#include <linux/param.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <asm/dma.h> +#include <asm/traps.h> +#include <asm/machdep.h> +#include <asm/coldfire.h> +#include <asm/mcfsim.h> +#include <asm/mcfdma.h> + +/***************************************************************************/ + +void coldfire_pit_tick(void); +void coldfire_pit_init(irqreturn_t (*handler)(int, void *, struct pt_regs *)); +unsigned long coldfire_pit_offset(void); +void coldfire_trap_init(void); +void coldfire_reset(void); + +/***************************************************************************/ + +/* + * DMA channel base address table. + */ +unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = { + MCF_MBAR + MCFDMA_BASE0, +}; + +unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS]; + +/***************************************************************************/ + +void mcf_disableall(void) +{ + *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff; + *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff; +} + +/***************************************************************************/ + +void mcf_autovector(unsigned int vec) +{ + /* Everything is auto-vectored on the 5272 */ +} + +/***************************************************************************/ + +void config_BSP(char *commandp, int size) +{ + mcf_disableall(); + +#ifdef CONFIG_BOOTPARAM + strncpy(commandp, CONFIG_BOOTPARAM_STRING, size); + commandp[size-1] = 0; +#else + memset(commandp, 0, size); +#endif + + mach_sched_init = coldfire_pit_init; + mach_tick = coldfire_pit_tick; + mach_gettimeoffset = coldfire_pit_offset; + mach_trap_init = coldfire_trap_init; + mach_reset = coldfire_reset; +} + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/5272/config.c b/arch/m68knommu/platform/5272/config.c index 5cb28690f89..cf36e7d007b 100644 --- a/arch/m68knommu/platform/5272/config.c +++ b/arch/m68knommu/platform/5272/config.c @@ -104,11 +104,11 @@ int mcf_timerirqpending(int timer) void config_BSP(char *commandp, int size) { -#if 0 - volatile unsigned long *pivrp; +#if defined (CONFIG_MOD5272) + volatile unsigned char *pivrp; /* Set base of device vectors to be 64 */ - pivrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_PIVR); + pivrp = (volatile unsigned char *) (MCF_MBAR + MCFSIM_PIVR); *pivrp = 0x40; #endif diff --git a/arch/m68knommu/platform/5307/Makefile b/arch/m68knommu/platform/5307/Makefile index 84b6b70641e..6fe5a2b8fb0 100644 --- a/arch/m68knommu/platform/5307/Makefile +++ b/arch/m68knommu/platform/5307/Makefile @@ -19,6 +19,7 @@ endif obj-$(CONFIG_COLDFIRE) += entry.o vectors.o ints.o obj-$(CONFIG_M5206) += timers.o obj-$(CONFIG_M5206e) += timers.o +obj-$(CONFIG_M523x) += pit.o obj-$(CONFIG_M5249) += timers.o obj-$(CONFIG_M527x) += pit.o obj-$(CONFIG_M5272) += timers.o diff --git a/arch/m68knommu/platform/5307/head.S b/arch/m68knommu/platform/5307/head.S index c7d7a395c4c..7f4ba837901 100644 --- a/arch/m68knommu/platform/5307/head.S +++ b/arch/m68knommu/platform/5307/head.S @@ -39,14 +39,18 @@ * Memory size exceptions for special cases. Some boards may be set * for auto memory sizing, but we can't do it that way for some reason. * For example the 5206eLITE board has static RAM, and auto-detecting - * the SDRAM will do you no good at all. + * the SDRAM will do you no good at all. Same goes for the MOD5272. */ #ifdef CONFIG_RAMAUTO #if defined(CONFIG_M5206eLITE) -#define MEM_SIZE 0x00100000 /* 1MiB default memory */ +#define MEM_SIZE 0x00100000 /* 1MiB default memory */ +#endif +#if defined(CONFIG_MOD5272) +#define MEM_SIZE 0x00800000 /* 8MiB default memory */ #endif #endif /* CONFIG_RAMAUTO */ + /* * If we don't have a fixed memory size now, then lets build in code * to auto detect the DRAM size. Obviously this is the prefered @@ -100,11 +104,15 @@ /* * Most ColdFire boards have their DRAM starting at address 0. - * Notable exception is the 5206eLITE board. + * Notable exception is the 5206eLITE board, another is the MOD5272. */ #if defined(CONFIG_M5206eLITE) #define MEM_BASE 0x30000000 #endif +#if defined(CONFIG_MOD5272) +#define MEM_BASE 0x02000000 +#define VBR_BASE 0x20000000 /* vectors in SRAM */ +#endif #ifndef MEM_BASE #define MEM_BASE 0x00000000 /* memory base at address 0 */ @@ -188,6 +196,7 @@ _start: movel %a7,_rambase GET_MEM_SIZE /* macro code determines size */ + addl %a7,%d0 movel %d0,_ramend /* set end ram addr */ /* diff --git a/arch/m68knommu/platform/68328/config.c b/arch/m68knommu/platform/68328/config.c index fd7c93f8648..bcfa5d7fe1e 100644 --- a/arch/m68knommu/platform/68328/config.c +++ b/arch/m68knommu/platform/68328/config.c @@ -1,5 +1,7 @@ +/***************************************************************************/ + /* - * linux/arch/$(ARCH)/platform/$(PLATFORM)/config.c + * linux/arch/m68knommu/platform/68328/config.c * * Copyright (C) 1993 Hamish Macdonald * Copyright (C) 1999 D. Jeff Dionne @@ -11,6 +13,8 @@ * VZ Support/Fixes Evan Stawnyczy <e@lineo.ca> */ +/***************************************************************************/ + #include <asm/dbg.h> #include <stdarg.h> #include <linux/config.h> @@ -29,76 +33,16 @@ #include <asm/machdep.h> #include <asm/MC68328.h> +/***************************************************************************/ -void BSP_sched_init(irqreturn_t (*timer_routine)(int, void *, struct pt_regs *)) -{ - -#ifdef CONFIG_XCOPILOT_BUGS - /* - * The only thing I know is that CLK32 is not available on Xcopilot - * I have little idea about what frequency SYSCLK has on Xcopilot. - * The values for prescaler and compare registers were simply - * taken from the original source - */ - - /* Restart mode, Enable int, SYSCLK, Enable timer */ - TCTL2 = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_SYSCLK | TCTL_TEN; - /* Set prescaler */ - TPRER2 = 2; - /* Set compare register */ - TCMP2 = 0xd7e4; -#else - /* Restart mode, Enable int, 32KHz, Enable timer */ - TCTL2 = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; - /* Set prescaler (Divide 32KHz by 32)*/ - TPRER2 = 31; - /* Set compare register 32Khz / 32 / 10 = 100 */ - TCMP2 = 10; -#endif - - request_irq(TMR2_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL); -} - -void BSP_tick(void) -{ - /* Reset Timer2 */ - TSTAT2 &= 0; -} +void m68328_timer_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *)); +void m68328_timer_tick(void); +unsigned long m68328_timer_gettimeoffset(void); +void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); -unsigned long BSP_gettimeoffset (void) -{ - return 0; -} +/***************************************************************************/ -void BSP_gettod (int *yearp, int *monp, int *dayp, - int *hourp, int *minp, int *secp) -{ -} - -int BSP_hwclk(int op, struct hwclk_time *t) -{ - if (!op) { - /* read */ - } else { - /* write */ - } - return 0; -} - -int BSP_set_clock_mmss (unsigned long nowtime) -{ -#if 0 - short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; - - tod->second1 = real_seconds / 10; - tod->second2 = real_seconds % 10; - tod->minute1 = real_minutes / 10; - tod->minute2 = real_minutes % 10; -#endif - return 0; -} - -void BSP_reset (void) +void m68328_reset (void) { local_irq_disable(); asm volatile ("moveal #0x10c00000, %a0;\n\t" @@ -108,18 +52,22 @@ void BSP_reset (void) "jmp (%a0);"); } +/***************************************************************************/ + void config_BSP(char *command, int len) { printk(KERN_INFO "\n68328 support D. Jeff Dionne <jeff@uclinux.org>\n"); printk(KERN_INFO "68328 support Kenneth Albanowski <kjahds@kjshds.com>\n"); printk(KERN_INFO "68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n"); - mach_sched_init = BSP_sched_init; - mach_tick = BSP_tick; - mach_gettimeoffset = BSP_gettimeoffset; - mach_gettod = BSP_gettod; + mach_sched_init = m68328_timer_init; + mach_tick = m68328_timer_tick; + mach_gettimeoffset = m68328_timer_gettimeoffset; + mach_gettod = m68328_timer_gettod; mach_hwclk = NULL; mach_set_clock_mmss = NULL; - mach_reset = BSP_reset; + mach_reset = m68328_reset; *command = '\0'; } + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/68328/entry.S b/arch/m68knommu/platform/68328/entry.S index 0f5d1fe8eb5..7d8990d784a 100644 --- a/arch/m68knommu/platform/68328/entry.S +++ b/arch/m68knommu/platform/68328/entry.S @@ -79,7 +79,7 @@ ENTRY(system_call) movel %sp@(PT_ORIG_D0),%d0 movel %sp,%d1 /* get thread_info pointer */ - andl #0xffffe000,%d1 + andl #-THREAD_SIZE,%d1 movel %d1,%a2 btst #TIF_SYSCALL_TRACE,%a2@(TI_FLAGS) jne do_trace @@ -105,7 +105,7 @@ Luser_return: andw #ALLOWINT,%sr movel %sp,%d1 /* get thread_info pointer */ - andl #0xffffe000,%d1 + andl #-THREAD_SIZE,%d1 movel %d1,%a2 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ andl #_TIF_WORK_MASK,%d1 diff --git a/arch/m68knommu/platform/68328/head-de2.S b/arch/m68knommu/platform/68328/head-de2.S new file mode 100644 index 00000000000..94c5a1609a7 --- /dev/null +++ b/arch/m68knommu/platform/68328/head-de2.S @@ -0,0 +1,135 @@ +#include <linux/config.h> + +#if defined(CONFIG_RAM32MB) +#define MEM_END 0x02000000 /* Memory size 32Mb */ +#elif defined(CONFIG_RAM16MB) +#define MEM_END 0x01000000 /* Memory size 16Mb */ +#else +#define MEM_END 0x00800000 /* Memory size 8Mb */ +#endif + +#undef CRT_DEBUG + +.macro PUTC CHAR +#ifdef CRT_DEBUG + moveq #\CHAR, %d7 + jsr putc +#endif +.endm + + .global _start + .global _rambase + .global _ramvec + .global _ramstart + .global _ramend + + .data + +/* + * Set up the usable of RAM stuff + */ +_rambase: + .long 0 +_ramvec: + .long 0 +_ramstart: + .long 0 +_ramend: + .long 0 + + .text + +_start: + +/* + * Setup initial stack + */ + /* disable all interrupts */ + movew #0x2700, %sr + movel #-1, 0xfffff304 + movel #MEM_END-4, %sp + + PUTC '\r' + PUTC '\n' + PUTC 'A' + PUTC 'B' + +/* + * Determine end of RAM + */ + + movel #MEM_END, %a0 + movel %a0, _ramend + + PUTC 'C' + +/* + * Move ROM filesystem above bss :-) + */ + + moveal #_sbss, %a0 /* romfs at the start of bss */ + moveal #_ebss, %a1 /* Set up destination */ + movel %a0, %a2 /* Copy of bss start */ + + movel 8(%a0), %d1 /* Get size of ROMFS */ + addql #8, %d1 /* Allow for rounding */ + andl #0xfffffffc, %d1 /* Whole words */ + + addl %d1, %a0 /* Copy from end */ + addl %d1, %a1 /* Copy from end */ + movel %a1, _ramstart /* Set start of ram */ + +1: + movel -(%a0), %d0 /* Copy dword */ + movel %d0, -(%a1) + cmpl %a0, %a2 /* Check if at end */ + bne 1b + + PUTC 'D' + +/* + * Initialize BSS segment to 0 + */ + + lea _sbss, %a0 + lea _ebss, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +2: cmpal %a0, %a1 + beq 1f + clrl (%a0)+ + bra 2b +1: + + PUTC 'E' + +/* + * Load the current task pointer and stack + */ + + lea init_thread_union, %a0 + lea 0x2000(%a0), %sp + + PUTC 'F' + PUTC '\r' + PUTC '\n' + +/* + * Go + */ + + jmp start_kernel + +/* + * Local functions + */ + +#ifdef CRT_DEBUG +putc: + moveb %d7, 0xfffff907 +1: + movew 0xfffff906, %d7 + andw #0x2000, %d7 + beq 1b + rts +#endif diff --git a/arch/m68knommu/platform/68328/timers.c b/arch/m68knommu/platform/68328/timers.c new file mode 100644 index 00000000000..68c2cd6b003 --- /dev/null +++ b/arch/m68knommu/platform/68328/timers.c @@ -0,0 +1,106 @@ +/***************************************************************************/ + +/* + * linux/arch/m68knommu/platform/68328/timers.c + * + * Copyright (C) 1993 Hamish Macdonald + * Copyright (C) 1999 D. Jeff Dionne + * Copyright (C) 2001 Georges Menie, Ken Desmet + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +/***************************************************************************/ + +#include <linux/config.h> +#include <linux/types.h> +#include <linux/kernel.h> +#include <linux/mm.h> +#include <asm/setup.h> +#include <asm/system.h> +#include <asm/pgtable.h> +#include <asm/irq.h> +#include <asm/machdep.h> +#include <asm/MC68VZ328.h> + +/***************************************************************************/ + +#if defined(CONFIG_DRAGEN2) +/* with a 33.16 MHz clock, this will give usec resolution to the time functions */ +#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK +#define CLOCK_PRE 7 +#define TICKS_PER_JIFFY 41450 + +#elif defined(CONFIG_XCOPILOT_BUGS) +/* + * The only thing I know is that CLK32 is not available on Xcopilot + * I have little idea about what frequency SYSCLK has on Xcopilot. + * The values for prescaler and compare registers were simply + * taken from the original source + */ +#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK +#define CLOCK_PRE 2 +#define TICKS_PER_JIFFY 0xd7e4 + +#else +/* default to using the 32Khz clock */ +#define CLOCK_SOURCE TCTL_CLKSOURCE_32KHZ +#define CLOCK_PRE 31 +#define TICKS_PER_JIFFY 10 +#endif + +/***************************************************************************/ + +void m68328_timer_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *)) +{ + /* disable timer 1 */ + TCTL = 0; + + /* set ISR */ + if (request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL)) + panic("Unable to attach timer interrupt\n"); + + /* Restart mode, Enable int, Set clock source */ + TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE; + TPRER = CLOCK_PRE; + TCMP = TICKS_PER_JIFFY; + + /* Enable timer 1 */ + TCTL |= TCTL_TEN; +} + +/***************************************************************************/ + +void m68328_timer_tick(void) +{ + /* Reset Timer1 */ + TSTAT &= 0; +} +/***************************************************************************/ + +unsigned long m68328_timer_gettimeoffset(void) +{ + unsigned long ticks = TCN, offset = 0; + + /* check for pending interrupt */ + if (ticks < (TICKS_PER_JIFFY >> 1) && (ISR & (1 << TMR_IRQ_NUM))) + offset = 1000000 / HZ; + ticks = (ticks * 1000000 / HZ) / TICKS_PER_JIFFY; + return ticks + offset; +} + +/***************************************************************************/ + +void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec) +{ + long now = RTCTIME; + + *year = *mon = *day = 1; + *hour = (now >> 24) % 24; + *min = (now >> 16) % 60; + *sec = now % 60; +} + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/68360/entry.S b/arch/m68knommu/platform/68360/entry.S index f7bc80a60e0..8ff48adf24a 100644 --- a/arch/m68knommu/platform/68360/entry.S +++ b/arch/m68knommu/platform/68360/entry.S @@ -96,7 +96,7 @@ Luser_return: andw #ALLOWINT,%sr movel %sp,%d1 /* get thread_info pointer */ - andl #0xffffe000,%d1 + andl #-THREAD_SIZE,%d1 movel %d1,%a2 move %a2@(TI_FLAGS),%d1 /* thread_info->flags */ andl #_TIF_WORK_MASK,%d1 diff --git a/arch/m68knommu/platform/68360/head-ram.S b/arch/m68knommu/platform/68360/head-ram.S new file mode 100644 index 00000000000..a5c639a51ee --- /dev/null +++ b/arch/m68knommu/platform/68360/head-ram.S @@ -0,0 +1,408 @@ +/* arch/m68knommu/platform/68360/head-ram.S + * + * Startup code for Motorola 68360 + * + * Copyright 2001 (C) SED Systems, a Division of Calian Ltd. + * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S + * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7 + * uClinux Kernel + * Copyright (C) Michael Leslie <mleslie@lineo.com> + * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S + * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>, + * + */ +#define ASSEMBLY +#include <linux/config.h> + +.global _stext +.global _start + +.global _rambase +.global __ramvec +.global _ramvec +.global _ramstart +.global _ramend + +.global _quicc_base +.global _periph_base + +#define REGB 0x1000 +#define PEPAR (_dprbase + REGB + 0x0016) +#define GMR (_dprbase + REGB + 0x0040) +#define OR0 (_dprbase + REGB + 0x0054) +#define BR0 (_dprbase + REGB + 0x0050) +#define OR1 (_dprbase + REGB + 0x0064) +#define BR1 (_dprbase + REGB + 0x0060) +#define OR4 (_dprbase + REGB + 0x0094) +#define BR4 (_dprbase + REGB + 0x0090) +#define OR6 (_dprbase + REGB + 0x00b4) +#define BR6 (_dprbase + REGB + 0x00b0) +#define OR7 (_dprbase + REGB + 0x00c4) +#define BR7 (_dprbase + REGB + 0x00c0) + +#define MCR (_dprbase + REGB + 0x0000) +#define AVR (_dprbase + REGB + 0x0008) + +#define SYPCR (_dprbase + REGB + 0x0022) + +#define PLLCR (_dprbase + REGB + 0x0010) +#define CLKOCR (_dprbase + REGB + 0x000C) +#define CDVCR (_dprbase + REGB + 0x0014) + +#define BKAR (_dprbase + REGB + 0x0030) +#define BKCR (_dprbase + REGB + 0x0034) +#define SWIV (_dprbase + REGB + 0x0023) +#define PICR (_dprbase + REGB + 0x0026) +#define PITR (_dprbase + REGB + 0x002A) + +/* Define for all memory configuration */ +#define MCU_SIM_GMR 0x00000000 +#define SIM_OR_MASK 0x0fffffff + +/* Defines for chip select zero - the flash */ +#define SIM_OR0_MASK 0x20000002 +#define SIM_BR0_MASK 0x00000001 + + +/* Defines for chip select one - the RAM */ +#define SIM_OR1_MASK 0x10000000 +#define SIM_BR1_MASK 0x00000001 + +#define MCU_SIM_MBAR_ADRS 0x0003ff00 +#define MCU_SIM_MBAR_BA_MASK 0xfffff000 +#define MCU_SIM_MBAR_AS_MASK 0x00000001 + +#define MCU_SIM_PEPAR 0x00B4 + +#define MCU_DISABLE_INTRPTS 0x2700 +#define MCU_SIM_AVR 0x00 + +#define MCU_SIM_MCR 0x00005cff + +#define MCU_SIM_CLKOCR 0x00 +#define MCU_SIM_PLLCR 0x8000 +#define MCU_SIM_CDVCR 0x0000 + +#define MCU_SIM_SYPCR 0x0000 +#define MCU_SIM_SWIV 0x00 +#define MCU_SIM_PICR 0x0000 +#define MCU_SIM_PITR 0x0000 + + +#include <asm/m68360_regs.h> + + +/* + * By the time this RAM specific code begins to execute, DPRAM + * and DRAM should already be mapped and accessible. + */ + + .text +_start: +_stext: + nop + ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ + /* We should not need to setup the boot stack the reset should do it. */ + movea.l #__ramend, %sp /*set up stack at the end of DRAM:*/ + +set_mbar_register: + moveq.l #0x07, %d1 /* Setup MBAR */ + movec %d1, %dfc + + lea.l MCU_SIM_MBAR_ADRS, %a0 + move.l #_dprbase, %d0 + andi.l #MCU_SIM_MBAR_BA_MASK, %d0 + ori.l #MCU_SIM_MBAR_AS_MASK, %d0 + moves.l %d0, %a0@ + + moveq.l #0x05, %d1 + movec.l %d1, %dfc + + /* Now we can begin to access registers in DPRAM */ + +set_sim_mcr: + /* Set Module Configuration Register */ + move.l #MCU_SIM_MCR, MCR + + /* to do: Determine cause of reset */ + + /* + * configure system clock MC68360 p. 6-40 + * (value +1)*osc/128 = system clock + */ +set_sim_clock: + move.w #MCU_SIM_PLLCR, PLLCR + move.b #MCU_SIM_CLKOCR, CLKOCR + move.w #MCU_SIM_CDVCR, CDVCR + + /* Wait for the PLL to settle */ + move.w #16384, %d0 +pll_settle_wait: + subi.w #1, %d0 + bne pll_settle_wait + + /* Setup the system protection register, and watchdog timer register */ + move.b #MCU_SIM_SWIV, SWIV + move.w #MCU_SIM_PICR, PICR + move.w #MCU_SIM_PITR, PITR + move.w #MCU_SIM_SYPCR, SYPCR + + /* Clear DPRAM - system + parameter */ + movea.l #_dprbase, %a0 + movea.l #_dprbase+0x2000, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +clear_dpram: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi clear_dpram + +configure_memory_controller: + /* Set up Global Memory Register (GMR) */ + move.l #MCU_SIM_GMR, %d0 + move.l %d0, GMR + +configure_chip_select_0: + move.l #__ramend, %d0 + subi.l #__ramstart, %d0 + subq.l #0x01, %d0 + eori.l #SIM_OR_MASK, %d0 + ori.l #SIM_OR0_MASK, %d0 + move.l %d0, OR0 + + move.l #__ramstart, %d0 + ori.l #SIM_BR0_MASK, %d0 + move.l %d0, BR0 + +configure_chip_select_1: + move.l #__rom_end, %d0 + subi.l #__rom_start, %d0 + subq.l #0x01, %d0 + eori.l #SIM_OR_MASK, %d0 + ori.l #SIM_OR1_MASK, %d0 + move.l %d0, OR1 + + move.l #__rom_start, %d0 + ori.l #SIM_BR1_MASK, %d0 + move.l %d0, BR1 + + move.w #MCU_SIM_PEPAR, PEPAR + + /* point to vector table: */ + move.l #_romvec, %a0 + move.l #_ramvec, %a1 +copy_vectors: + move.l %a0@, %d0 + move.l %d0, %a1@ + move.l %a0@, %a1@ + addq.l #0x04, %a0 + addq.l #0x04, %a1 + cmp.l #_start, %a0 + blt copy_vectors + + move.l #_ramvec, %a1 + movec %a1, %vbr + + + /* Copy data segment from ROM to RAM */ + moveal #_stext, %a0 + moveal #_sdata, %a1 + moveal #_edata, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +LD1: + move.l %a0@, %d0 + addq.l #0x04, %a0 + move.l %d0, %a1@ + addq.l #0x04, %a1 + cmp.l #_edata, %a1 + blt LD1 + + moveal #_sbss, %a0 + moveal #_ebss, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +L1: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi L1 + +load_quicc: + move.l #_dprbase, _quicc_base + +store_ram_size: + /* Set ram size information */ + move.l #_sdata, _rambase + move.l #_ebss, _ramstart + move.l #__ramend, %d0 + sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ + move.l %d0, _ramend /* Different from __ramend.*/ + +store_flash_size: + /* Set rom size information */ + move.l #__rom_end, %d0 + sub.l #__rom_start, %d0 + move.l %d0, rom_length + + pea 0 + pea env + pea %sp@(4) + pea 0 + + lea init_thread_union, %a2 + lea 0x2000(%a2), %sp + +lp: + jsr start_kernel + +_exit: + jmp _exit + + + .data + .align 4 +env: + .long 0 +_quicc_base: + .long 0 +_periph_base: + .long 0 +_ramvec: + .long 0 +_rambase: + .long 0 +_ramstart: + .long 0 +_ramend: + .long 0 +_dprbase: + .long 0xffffe000 + + .text + + /* + * These are the exception vectors at boot up, they are copied into RAM + * and then overwritten as needed. + */ + +.section ".data.initvect","awx" + .long __ramend /* Reset: Initial Stack Pointer - 0. */ + .long _start /* Reset: Initial Program Counter - 1. */ + .long buserr /* Bus Error - 2. */ + .long trap /* Address Error - 3. */ + .long trap /* Illegal Instruction - 4. */ + .long trap /* Divide by zero - 5. */ + .long trap /* CHK, CHK2 Instructions - 6. */ + .long trap /* TRAPcc, TRAPV Instructions - 7. */ + .long trap /* Privilege Violation - 8. */ + .long trap /* Trace - 9. */ + .long trap /* Line 1010 Emulator - 10. */ + .long trap /* Line 1111 Emualtor - 11. */ + .long trap /* Harware Breakpoint - 12. */ + .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */ + .long trap /* Format Error - 14. */ + .long trap /* Uninitialized Interrupt - 15. */ + .long trap /* (Unassigned, Reserver) - 16. */ + .long trap /* (Unassigned, Reserver) - 17. */ + .long trap /* (Unassigned, Reserver) - 18. */ + .long trap /* (Unassigned, Reserver) - 19. */ + .long trap /* (Unassigned, Reserver) - 20. */ + .long trap /* (Unassigned, Reserver) - 21. */ + .long trap /* (Unassigned, Reserver) - 22. */ + .long trap /* (Unassigned, Reserver) - 23. */ + .long trap /* Spurious Interrupt - 24. */ + .long trap /* Level 1 Interrupt Autovector - 25. */ + .long trap /* Level 2 Interrupt Autovector - 26. */ + .long trap /* Level 3 Interrupt Autovector - 27. */ + .long trap /* Level 4 Interrupt Autovector - 28. */ + .long trap /* Level 5 Interrupt Autovector - 29. */ + .long trap /* Level 6 Interrupt Autovector - 30. */ + .long trap /* Level 7 Interrupt Autovector - 31. */ + .long system_call /* Trap Instruction Vectors 0 - 32. */ + .long trap /* Trap Instruction Vectors 1 - 33. */ + .long trap /* Trap Instruction Vectors 2 - 34. */ + .long trap /* Trap Instruction Vectors 3 - 35. */ + .long trap /* Trap Instruction Vectors 4 - 36. */ + .long trap /* Trap Instruction Vectors 5 - 37. */ + .long trap /* Trap Instruction Vectors 6 - 38. */ + .long trap /* Trap Instruction Vectors 7 - 39. */ + .long trap /* Trap Instruction Vectors 8 - 40. */ + .long trap /* Trap Instruction Vectors 9 - 41. */ + .long trap /* Trap Instruction Vectors 10 - 42. */ + .long trap /* Trap Instruction Vectors 11 - 43. */ + .long trap /* Trap Instruction Vectors 12 - 44. */ + .long trap /* Trap Instruction Vectors 13 - 45. */ + .long trap /* Trap Instruction Vectors 14 - 46. */ + .long trap /* Trap Instruction Vectors 15 - 47. */ + .long 0 /* (Reserved for Coprocessor) - 48. */ + .long 0 /* (Reserved for Coprocessor) - 49. */ + .long 0 /* (Reserved for Coprocessor) - 50. */ + .long 0 /* (Reserved for Coprocessor) - 51. */ + .long 0 /* (Reserved for Coprocessor) - 52. */ + .long 0 /* (Reserved for Coprocessor) - 53. */ + .long 0 /* (Reserved for Coprocessor) - 54. */ + .long 0 /* (Reserved for Coprocessor) - 55. */ + .long 0 /* (Reserved for Coprocessor) - 56. */ + .long 0 /* (Reserved for Coprocessor) - 57. */ + .long 0 /* (Reserved for Coprocessor) - 58. */ + .long 0 /* (Unassigned, Reserved) - 59. */ + .long 0 /* (Unassigned, Reserved) - 60. */ + .long 0 /* (Unassigned, Reserved) - 61. */ + .long 0 /* (Unassigned, Reserved) - 62. */ + .long 0 /* (Unassigned, Reserved) - 63. */ + /* The assignment of these vectors to the CPM is */ + /* dependent on the configuration of the CPM vba */ + /* fields. */ + .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */ + .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */ + .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */ + .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */ + .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */ + .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */ + .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */ + .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */ + .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */ + .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */ + .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */ + .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */ + .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */ + .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */ + .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */ + .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */ + .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */ + .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */ + .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */ + .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */ + .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */ + .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */ + .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */ + .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */ + .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */ + .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */ + .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */ + .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */ + .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */ + .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */ + .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */ + .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */ + /* I don't think anything uses the vectors after here. */ + .long 0 /* (User-Defined Vectors 34) - 96. */ + .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */ + .long 0,0,0 /* (User-Defined Vectors 190 - 192). */ +.text +ignore: rte diff --git a/arch/m68knommu/platform/68360/head-rom.S b/arch/m68knommu/platform/68360/head-rom.S new file mode 100644 index 00000000000..0da357a4cfe --- /dev/null +++ b/arch/m68knommu/platform/68360/head-rom.S @@ -0,0 +1,420 @@ +/* arch/m68knommu/platform/68360/head-rom.S + * + * Startup code for Motorola 68360 + * + * Copyright (C) SED Systems, a Division of Calian Ltd. + * Based on: arch/m68knommu/platform/68328/pilot/crt0_rom.S + * Based on: arch/m68knommu/platform/68360/uCquicc/crt0_rom.S, 2.0.38.1.pre7 + * uClinux Kernel + * Copyright (C) Michael Leslie <mleslie@lineo.com> + * Based on: arch/m68knommu/platform/68EZ328/ucsimm/crt0_rom.S + * Copyright (C) 1998 D. Jeff Dionne <jeff@uclinux.org>, + * + */ +#include <linux/config.h> + +.global _stext +.global _sbss +.global _start + +.global _rambase +.global __ramvec +.global _ramvec +.global _ramstart +.global _ramend + +.global _quicc_base +.global _periph_base + +#define REGB 0x1000 +#define PEPAR (_dprbase + REGB + 0x0016) +#define GMR (_dprbase + REGB + 0x0040) +#define OR0 (_dprbase + REGB + 0x0054) +#define BR0 (_dprbase + REGB + 0x0050) + +#define OR1 (_dprbase + REGB + 0x0064) +#define BR1 (_dprbase + REGB + 0x0060) + +#define OR2 (_dprbase + REGB + 0x0074) +#define BR2 (_dprbase + REGB + 0x0070) + +#define OR3 (_dprbase + REGB + 0x0084) +#define BR3 (_dprbase + REGB + 0x0080) + +#define OR4 (_dprbase + REGB + 0x0094) +#define BR4 (_dprbase + REGB + 0x0090) + +#define OR5 (_dprbase + REGB + 0x00A4) +#define BR5 (_dprbase + REGB + 0x00A0) + +#define OR6 (_dprbase + REGB + 0x00b4) +#define BR6 (_dprbase + REGB + 0x00b0) + +#define OR7 (_dprbase + REGB + 0x00c4) +#define BR7 (_dprbase + REGB + 0x00c0) + +#define MCR (_dprbase + REGB + 0x0000) +#define AVR (_dprbase + REGB + 0x0008) + +#define SYPCR (_dprbase + REGB + 0x0022) + +#define PLLCR (_dprbase + REGB + 0x0010) +#define CLKOCR (_dprbase + REGB + 0x000C) +#define CDVCR (_dprbase + REGB + 0x0014) + +#define BKAR (_dprbase + REGB + 0x0030) +#define BKCR (_dprbase + REGB + 0x0034) +#define SWIV (_dprbase + REGB + 0x0023) +#define PICR (_dprbase + REGB + 0x0026) +#define PITR (_dprbase + REGB + 0x002A) + +/* Define for all memory configuration */ +#define MCU_SIM_GMR 0x00000000 +#define SIM_OR_MASK 0x0fffffff + +/* Defines for chip select zero - the flash */ +#define SIM_OR0_MASK 0x20000000 +#define SIM_BR0_MASK 0x00000001 + +/* Defines for chip select one - the RAM */ +#define SIM_OR1_MASK 0x10000000 +#define SIM_BR1_MASK 0x00000001 + +#define MCU_SIM_MBAR_ADRS 0x0003ff00 +#define MCU_SIM_MBAR_BA_MASK 0xfffff000 +#define MCU_SIM_MBAR_AS_MASK 0x00000001 + +#define MCU_SIM_PEPAR 0x00B4 + +#define MCU_DISABLE_INTRPTS 0x2700 +#define MCU_SIM_AVR 0x00 + +#define MCU_SIM_MCR 0x00005cff + +#define MCU_SIM_CLKOCR 0x00 +#define MCU_SIM_PLLCR 0x8000 +#define MCU_SIM_CDVCR 0x0000 + +#define MCU_SIM_SYPCR 0x0000 +#define MCU_SIM_SWIV 0x00 +#define MCU_SIM_PICR 0x0000 +#define MCU_SIM_PITR 0x0000 + + +#include <asm/m68360_regs.h> + + +/* + * By the time this RAM specific code begins to execute, DPRAM + * and DRAM should already be mapped and accessible. + */ + + .text +_start: +_stext: + nop + ori.w #MCU_DISABLE_INTRPTS, %sr /* disable interrupts: */ + /* We should not need to setup the boot stack the reset should do it. */ + movea.l #__ramend, %sp /* set up stack at the end of DRAM:*/ + + +set_mbar_register: + moveq.l #0x07, %d1 /* Setup MBAR */ + movec %d1, %dfc + + lea.l MCU_SIM_MBAR_ADRS, %a0 + move.l #_dprbase, %d0 + andi.l #MCU_SIM_MBAR_BA_MASK, %d0 + ori.l #MCU_SIM_MBAR_AS_MASK, %d0 + moves.l %d0, %a0@ + + moveq.l #0x05, %d1 + movec.l %d1, %dfc + + /* Now we can begin to access registers in DPRAM */ + +set_sim_mcr: + /* Set Module Configuration Register */ + move.l #MCU_SIM_MCR, MCR + + /* to do: Determine cause of reset */ + + /* + * configure system clock MC68360 p. 6-40 + * (value +1)*osc/128 = system clock + * or + * (value + 1)*osc = system clock + * You do not need to divide the oscillator by 128 unless you want to. + */ +set_sim_clock: + move.w #MCU_SIM_PLLCR, PLLCR + move.b #MCU_SIM_CLKOCR, CLKOCR + move.w #MCU_SIM_CDVCR, CDVCR + + /* Wait for the PLL to settle */ + move.w #16384, %d0 +pll_settle_wait: + subi.w #1, %d0 + bne pll_settle_wait + + /* Setup the system protection register, and watchdog timer register */ + move.b #MCU_SIM_SWIV, SWIV + move.w #MCU_SIM_PICR, PICR + move.w #MCU_SIM_PITR, PITR + move.w #MCU_SIM_SYPCR, SYPCR + + /* Clear DPRAM - system + parameter */ + movea.l #_dprbase, %a0 + movea.l #_dprbase+0x2000, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +clear_dpram: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi clear_dpram + +configure_memory_controller: + /* Set up Global Memory Register (GMR) */ + move.l #MCU_SIM_GMR, %d0 + move.l %d0, GMR + +configure_chip_select_0: + move.l #0x00400000, %d0 + subq.l #0x01, %d0 + eori.l #SIM_OR_MASK, %d0 + ori.l #SIM_OR0_MASK, %d0 + move.l %d0, OR0 + + move.l #__rom_start, %d0 + ori.l #SIM_BR0_MASK, %d0 + move.l %d0, BR0 + + move.l #0x0, BR1 + move.l #0x0, BR2 + move.l #0x0, BR3 + move.l #0x0, BR4 + move.l #0x0, BR5 + move.l #0x0, BR6 + move.l #0x0, BR7 + + move.w #MCU_SIM_PEPAR, PEPAR + + /* point to vector table: */ + move.l #_romvec, %a0 + move.l #_ramvec, %a1 +copy_vectors: + move.l %a0@, %d0 + move.l %d0, %a1@ + move.l %a0@, %a1@ + addq.l #0x04, %a0 + addq.l #0x04, %a1 + cmp.l #_start, %a0 + blt copy_vectors + + move.l #_ramvec, %a1 + movec %a1, %vbr + + + /* Copy data segment from ROM to RAM */ + moveal #_etext, %a0 + moveal #_sdata, %a1 + moveal #_edata, %a2 + + /* Copy %a0 to %a1 until %a1 == %a2 */ +LD1: + move.l %a0@, %d0 + addq.l #0x04, %a0 + move.l %d0, %a1@ + addq.l #0x04, %a1 + cmp.l #_edata, %a1 + blt LD1 + + moveal #_sbss, %a0 + moveal #_ebss, %a1 + + /* Copy 0 to %a0 until %a0 == %a1 */ +L1: + movel #0, %a0@+ + cmpal %a0, %a1 + bhi L1 + +load_quicc: + move.l #_dprbase, _quicc_base + +store_ram_size: + /* Set ram size information */ + move.l #_sdata, _rambase + move.l #_ebss, _ramstart + move.l #__ramend, %d0 + sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ + move.l %d0, _ramend /* Different from __ramend.*/ + +store_flash_size: + /* Set rom size information */ + move.l #__rom_end, %d0 + sub.l #__rom_start, %d0 + move.l %d0, rom_length + + pea 0 + pea env + pea %sp@(4) + pea 0 + + lea init_thread_union, %a2 + lea 0x2000(%a2), %sp + +lp: + jsr start_kernel + +_exit: + jmp _exit + + + .data + .align 4 +env: + .long 0 +_quicc_base: + .long 0 +_periph_base: + .long 0 +_ramvec: + .long 0 +_rambase: + .long 0 +_ramstart: + .long 0 +_ramend: + .long 0 +_dprbase: + .long 0xffffe000 + + + .text + + /* + * These are the exception vectors at boot up, they are copied into RAM + * and then overwritten as needed. + */ + +.section ".data.initvect","awx" + .long __ramend /* Reset: Initial Stack Pointer - 0. */ + .long _start /* Reset: Initial Program Counter - 1. */ + .long buserr /* Bus Error - 2. */ + .long trap /* Address Error - 3. */ + .long trap /* Illegal Instruction - 4. */ + .long trap /* Divide by zero - 5. */ + .long trap /* CHK, CHK2 Instructions - 6. */ + .long trap /* TRAPcc, TRAPV Instructions - 7. */ + .long trap /* Privilege Violation - 8. */ + .long trap /* Trace - 9. */ + .long trap /* Line 1010 Emulator - 10. */ + .long trap /* Line 1111 Emualtor - 11. */ + .long trap /* Harware Breakpoint - 12. */ + .long trap /* (Reserved for Coprocessor Protocol Violation)- 13. */ + .long trap /* Format Error - 14. */ + .long trap /* Uninitialized Interrupt - 15. */ + .long trap /* (Unassigned, Reserver) - 16. */ + .long trap /* (Unassigned, Reserver) - 17. */ + .long trap /* (Unassigned, Reserver) - 18. */ + .long trap /* (Unassigned, Reserver) - 19. */ + .long trap /* (Unassigned, Reserver) - 20. */ + .long trap /* (Unassigned, Reserver) - 21. */ + .long trap /* (Unassigned, Reserver) - 22. */ + .long trap /* (Unassigned, Reserver) - 23. */ + .long trap /* Spurious Interrupt - 24. */ + .long trap /* Level 1 Interrupt Autovector - 25. */ + .long trap /* Level 2 Interrupt Autovector - 26. */ + .long trap /* Level 3 Interrupt Autovector - 27. */ + .long trap /* Level 4 Interrupt Autovector - 28. */ + .long trap /* Level 5 Interrupt Autovector - 29. */ + .long trap /* Level 6 Interrupt Autovector - 30. */ + .long trap /* Level 7 Interrupt Autovector - 31. */ + .long system_call /* Trap Instruction Vectors 0 - 32. */ + .long trap /* Trap Instruction Vectors 1 - 33. */ + .long trap /* Trap Instruction Vectors 2 - 34. */ + .long trap /* Trap Instruction Vectors 3 - 35. */ + .long trap /* Trap Instruction Vectors 4 - 36. */ + .long trap /* Trap Instruction Vectors 5 - 37. */ + .long trap /* Trap Instruction Vectors 6 - 38. */ + .long trap /* Trap Instruction Vectors 7 - 39. */ + .long trap /* Trap Instruction Vectors 8 - 40. */ + .long trap /* Trap Instruction Vectors 9 - 41. */ + .long trap /* Trap Instruction Vectors 10 - 42. */ + .long trap /* Trap Instruction Vectors 11 - 43. */ + .long trap /* Trap Instruction Vectors 12 - 44. */ + .long trap /* Trap Instruction Vectors 13 - 45. */ + .long trap /* Trap Instruction Vectors 14 - 46. */ + .long trap /* Trap Instruction Vectors 15 - 47. */ + .long 0 /* (Reserved for Coprocessor) - 48. */ + .long 0 /* (Reserved for Coprocessor) - 49. */ + .long 0 /* (Reserved for Coprocessor) - 50. */ + .long 0 /* (Reserved for Coprocessor) - 51. */ + .long 0 /* (Reserved for Coprocessor) - 52. */ + .long 0 /* (Reserved for Coprocessor) - 53. */ + .long 0 /* (Reserved for Coprocessor) - 54. */ + .long 0 /* (Reserved for Coprocessor) - 55. */ + .long 0 /* (Reserved for Coprocessor) - 56. */ + .long 0 /* (Reserved for Coprocessor) - 57. */ + .long 0 /* (Reserved for Coprocessor) - 58. */ + .long 0 /* (Unassigned, Reserved) - 59. */ + .long 0 /* (Unassigned, Reserved) - 60. */ + .long 0 /* (Unassigned, Reserved) - 61. */ + .long 0 /* (Unassigned, Reserved) - 62. */ + .long 0 /* (Unassigned, Reserved) - 63. */ + /* The assignment of these vectors to the CPM is */ + /* dependent on the configuration of the CPM vba */ + /* fields. */ + .long 0 /* (User-Defined Vectors 1) CPM Error - 64. */ + .long 0 /* (User-Defined Vectors 2) CPM Parallel IO PC11- 65. */ + .long 0 /* (User-Defined Vectors 3) CPM Parallel IO PC10- 66. */ + .long 0 /* (User-Defined Vectors 4) CPM SMC2 / PIP - 67. */ + .long 0 /* (User-Defined Vectors 5) CPM SMC1 - 68. */ + .long 0 /* (User-Defined Vectors 6) CPM SPI - 69. */ + .long 0 /* (User-Defined Vectors 7) CPM Parallel IO PC9 - 70. */ + .long 0 /* (User-Defined Vectors 8) CPM Timer 4 - 71. */ + .long 0 /* (User-Defined Vectors 9) CPM Reserved - 72. */ + .long 0 /* (User-Defined Vectors 10) CPM Parallel IO PC8- 73. */ + .long 0 /* (User-Defined Vectors 11) CPM Parallel IO PC7- 74. */ + .long 0 /* (User-Defined Vectors 12) CPM Parallel IO PC6- 75. */ + .long 0 /* (User-Defined Vectors 13) CPM Timer 3 - 76. */ + .long 0 /* (User-Defined Vectors 14) CPM Reserved - 77. */ + .long 0 /* (User-Defined Vectors 15) CPM Parallel IO PC5- 78. */ + .long 0 /* (User-Defined Vectors 16) CPM Parallel IO PC4- 79. */ + .long 0 /* (User-Defined Vectors 17) CPM Reserved - 80. */ + .long 0 /* (User-Defined Vectors 18) CPM RISC Timer Tbl - 81. */ + .long 0 /* (User-Defined Vectors 19) CPM Timer 2 - 82. */ + .long 0 /* (User-Defined Vectors 21) CPM Reserved - 83. */ + .long 0 /* (User-Defined Vectors 22) CPM IDMA2 - 84. */ + .long 0 /* (User-Defined Vectors 23) CPM IDMA1 - 85. */ + .long 0 /* (User-Defined Vectors 24) CPM SDMA Bus Err - 86. */ + .long 0 /* (User-Defined Vectors 25) CPM Parallel IO PC3- 87. */ + .long 0 /* (User-Defined Vectors 26) CPM Parallel IO PC2- 88. */ + .long 0 /* (User-Defined Vectors 27) CPM Timer 1 - 89. */ + .long 0 /* (User-Defined Vectors 28) CPM Parallel IO PC1- 90. */ + .long 0 /* (User-Defined Vectors 29) CPM SCC 4 - 91. */ + .long 0 /* (User-Defined Vectors 30) CPM SCC 3 - 92. */ + .long 0 /* (User-Defined Vectors 31) CPM SCC 2 - 93. */ + .long 0 /* (User-Defined Vectors 32) CPM SCC 1 - 94. */ + .long 0 /* (User-Defined Vectors 33) CPM Parallel IO PC0- 95. */ + /* I don't think anything uses the vectors after here. */ + .long 0 /* (User-Defined Vectors 34) - 96. */ + .long 0,0,0,0,0 /* (User-Defined Vectors 35 - 39). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 40 - 49). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 50 - 59). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 60 - 69). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 70 - 79). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 80 - 89). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 90 - 99). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 100 - 109). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 110 - 119). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 120 - 129). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 130 - 139). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 140 - 149). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 150 - 159). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 160 - 169). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 170 - 179). */ + .long 0,0,0,0,0,0,0,0,0,0 /* (User-Defined Vectors 180 - 189). */ + .long 0,0,0 /* (User-Defined Vectors 190 - 192). */ +.text +ignore: rte diff --git a/arch/m68knommu/platform/68EZ328/config.c b/arch/m68knommu/platform/68EZ328/config.c index c21971971ff..d8d56e5de31 100644 --- a/arch/m68knommu/platform/68EZ328/config.c +++ b/arch/m68knommu/platform/68EZ328/config.c @@ -1,5 +1,7 @@ +/***************************************************************************/ + /* - * linux/arch/$(ARCH)/platform/$(PLATFORM)/config.c + * linux/arch/m68knommu/platform/68EZ328/config.c * * Copyright (C) 1993 Hamish Macdonald * Copyright (C) 1999 D. Jeff Dionne @@ -9,6 +11,8 @@ * for more details. */ +/***************************************************************************/ + #include <stdarg.h> #include <linux/config.h> #include <linux/types.h> @@ -20,68 +24,22 @@ #include <asm/setup.h> #include <asm/system.h> #include <asm/pgtable.h> -#include <asm/irq.h> #include <asm/machdep.h> #include <asm/MC68EZ328.h> #ifdef CONFIG_UCSIMM #include <asm/bootstd.h> #endif -#ifdef CONFIG_PILOT -#include "PalmV/romfs.h" -#endif - -void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) -{ - /* Restart mode, Enable int, 32KHz, Enable timer */ - TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; - /* Set prescaler (Divide 32KHz by 32)*/ - TPRER = 31; - /* Set compare register 32Khz / 32 / 10 = 100 */ - TCMP = 10; - - request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL); -} - -void BSP_tick(void) -{ - /* Reset Timer1 */ - TSTAT &= 0; -} - -unsigned long BSP_gettimeoffset (void) -{ - return 0; -} -void BSP_gettod (int *yearp, int *monp, int *dayp, - int *hourp, int *minp, int *secp) -{ -} +/***************************************************************************/ -int BSP_hwclk(int op, struct hwclk_time *t) -{ - if (!op) { - /* read */ - } else { - /* write */ - } - return 0; -} +void m68328_timer_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *)); +void m68328_timer_tick(void); +unsigned long m68328_timer_gettimeoffset(void); +void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); -int BSP_set_clock_mmss (unsigned long nowtime) -{ -#if 0 - short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; +/***************************************************************************/ - tod->second1 = real_seconds / 10; - tod->second2 = real_seconds % 10; - tod->minute1 = real_minutes / 10; - tod->minute2 = real_minutes % 10; -#endif - return 0; -} - -void BSP_reset (void) +void m68ez328_reset(void) { local_irq_disable(); asm volatile (" @@ -93,6 +51,8 @@ void BSP_reset (void) "); } +/***************************************************************************/ + unsigned char *cs8900a_hwaddr; static int errno; @@ -119,11 +79,13 @@ void config_BSP(char *command, int len) else command[0] = 0; #endif - mach_sched_init = BSP_sched_init; - mach_tick = BSP_tick; - mach_gettimeoffset = BSP_gettimeoffset; - mach_gettod = BSP_gettod; + mach_sched_init = m68328_timer_init; + mach_tick = m68328_timer_tick; + mach_gettimeoffset = m68328_timer_gettimeoffset; + mach_gettod = m68328_timer_gettod; mach_hwclk = NULL; mach_set_clock_mmss = NULL; - mach_reset = BSP_reset; + mach_reset = m68ez328_reset; } + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/68VZ328/de2/config.c b/arch/m68knommu/platform/68VZ328/config.c index d0586197f11..d926524cdf8 100644 --- a/arch/m68knommu/platform/68VZ328/de2/config.c +++ b/arch/m68knommu/platform/68VZ328/config.c @@ -1,5 +1,7 @@ +/***************************************************************************/ + /* - * linux/arch/m68knommu/platform/MC68VZ328/de2/config.c + * linux/arch/m68knommu/platform/68VZ328/config.c * * Copyright (C) 1993 Hamish Macdonald * Copyright (C) 1999 D. Jeff Dionne @@ -10,6 +12,8 @@ * for more details. */ +/***************************************************************************/ + #include <linux/config.h> #include <linux/types.h> #include <linux/kernel.h> @@ -25,66 +29,25 @@ #include <asm/irq.h> #include <asm/machdep.h> #include <asm/MC68VZ328.h> +#include <asm/bootstd.h> #ifdef CONFIG_INIT_LCD -#include "screen.h" +#include "bootlogo.h" #endif -/* with a 33.16 MHz clock, this will give usec resolution to the time functions */ -#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK -#define CLOCK_PRE 7 -#define TICKS_PER_JIFFY 41450 - -static void -dragen2_sched_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *)) -{ - /* disable timer 1 */ - TCTL = 0; - - /* set ISR */ - if (request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL)) - panic("Unable to attach timer interrupt\n"); - - /* Restart mode, Enable int, Set clock source */ - TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE; - TPRER = CLOCK_PRE; - TCMP = TICKS_PER_JIFFY; - - /* Enable timer 1 */ - TCTL |= TCTL_TEN; -} - -static void dragen2_tick(void) -{ - /* Reset Timer1 */ - TSTAT &= 0; -} - -static unsigned long dragen2_gettimeoffset(void) -{ - unsigned long ticks = TCN, offset = 0; - - /* check for pending interrupt */ - if (ticks < (TICKS_PER_JIFFY >> 1) && (ISR & (1 << TMR_IRQ_NUM))) - offset = 1000000 / HZ; - - ticks = (ticks * 1000000 / HZ) / TICKS_PER_JIFFY; +/***************************************************************************/ - return ticks + offset; -} +void m68328_timer_init(irqreturn_t (*timer_routine) (int, void *, struct pt_regs *)); +void m68328_timer_tick(void); +unsigned long m68328_timer_gettimeoffset(void); +void m68328_timer_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec); -static void dragen2_gettod(int *year, int *mon, int *day, int *hour, - int *min, int *sec) -{ - long now = RTCTIME; +/***************************************************************************/ +/* Init Drangon Engine hardware */ +/***************************************************************************/ +#if defined(CONFIG_DRAGEN2) - *year = *mon = *day = 1; - *hour = (now >> 24) % 24; - *min = (now >> 16) % 60; - *sec = now % 60; -} - -static void dragen2_reset(void) +static void m68vz328_reset(void) { local_irq_disable(); @@ -103,7 +66,7 @@ static void dragen2_reset(void) ); } -static void init_hardware(void) +static void init_hardware(char *command, int size) { #ifdef CONFIG_DIRECT_IO_ACCESS SCR = 0x10; /* allow user access to internal registers */ @@ -170,6 +133,60 @@ static void init_hardware(void) #endif } +/***************************************************************************/ +/* Init RT-Control uCdimm hardware */ +/***************************************************************************/ +#elif defined(CONFIG_UCDIMM) + +static void m68vz328_reset(void) +{ + local_irq_disable(); + asm volatile (" + moveal #0x10c00000, %a0; + moveb #0, 0xFFFFF300; + moveal 0(%a0), %sp; + moveal 4(%a0), %a0; + jmp (%a0); + "); +} + +unsigned char *cs8900a_hwaddr; +static int errno; + +_bsc0(char *, getserialnum) +_bsc1(unsigned char *, gethwaddr, int, a) +_bsc1(char *, getbenv, char *, a) + +static void init_hardware(char *command, int size) +{ + char *p; + + printk(KERN_INFO "uCdimm serial string [%s]\n", getserialnum()); + p = cs8900a_hwaddr = gethwaddr(0); + printk(KERN_INFO "uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", + p[0], p[1], p[2], p[3], p[4], p[5]); + p = getbenv("APPEND"); + if (p) + strcpy(p, command); + else + command[0] = 0; +} + +/***************************************************************************/ +#else + +static void m68vz328_reset(void) +{ +} + +static void init_hardware(char *command, int size) +{ +} + +/***************************************************************************/ +#endif +/***************************************************************************/ + void config_BSP(char *command, int size) { printk(KERN_INFO "68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n"); @@ -181,11 +198,13 @@ void config_BSP(char *command, int size) memset(command, 0, size); #endif - init_hardware(); + init_hardware(command, size); - mach_sched_init = (void *)dragen2_sched_init; - mach_tick = dragen2_tick; - mach_gettimeoffset = dragen2_gettimeoffset; - mach_reset = dragen2_reset; - mach_gettod = dragen2_gettod; + mach_sched_init = (void *) m68328_timer_init; + mach_tick = m68328_timer_tick; + mach_gettimeoffset = m68328_timer_gettimeoffset; + mach_gettod = m68328_timer_gettod; + mach_reset = m68vz328_reset; } + +/***************************************************************************/ diff --git a/arch/m68knommu/platform/68VZ328/ucdimm/config.c b/arch/m68knommu/platform/68VZ328/ucdimm/config.c deleted file mode 100644 index 2deadaffd81..00000000000 --- a/arch/m68knommu/platform/68VZ328/ucdimm/config.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - * linux/arch/m68knommu/platform/68VZ328/ucdimm/config.c - * - * Copyright (C) 1993 Hamish Macdonald - * Copyright (C) 1999 D. Jeff Dionne - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive - * for more details. - */ - -#include <stdarg.h> -#include <linux/config.h> -#include <linux/types.h> -#include <linux/kernel.h> -#include <linux/mm.h> -#include <linux/tty.h> -#include <linux/console.h> - -#include <asm/setup.h> -#include <asm/system.h> -#include <asm/pgtable.h> -#include <asm/irq.h> -#include <asm/machdep.h> -#include <asm/MC68VZ328.h> -#include <asm/bootstd.h> - -void BSP_sched_init(void (*timer_routine)(int, void *, struct pt_regs *)) -{ - /* Restart mode, Enable int, 32KHz, Enable timer */ - TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ | TCTL_TEN; - /* Set prescaler (Divide 32KHz by 32)*/ - TPRER = 31; - /* Set compare register 32Khz / 32 / 10 = 100 */ - TCMP = 10; - - request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL); -} - -void BSP_tick(void) -{ - /* Reset Timer1 */ - TSTAT &= 0; -} - -unsigned long BSP_gettimeoffset (void) -{ - return 0; -} - -void BSP_gettod (int *yearp, int *monp, int *dayp, - int *hourp, int *minp, int *secp) -{ -} - -int BSP_hwclk(int op, struct hwclk_time *t) -{ - if (!op) { - /* read */ - } else { - /* write */ - } - return 0; -} - -int BSP_set_clock_mmss (unsigned long nowtime) -{ -#if 0 - short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60; - - tod->second1 = real_seconds / 10; - tod->second2 = real_seconds % 10; - tod->minute1 = real_minutes / 10; - tod->minute2 = real_minutes % 10; -#endif - return 0; -} - -void BSP_reset (void) -{ - local_irq_disable(); - asm volatile (" - moveal #0x10c00000, %a0; - moveb #0, 0xFFFFF300; - moveal 0(%a0), %sp; - moveal 4(%a0), %a0; - jmp (%a0); - "); -} - -unsigned char *cs8900a_hwaddr; -static int errno; - -_bsc0(char *, getserialnum) -_bsc1(unsigned char *, gethwaddr, int, a) -_bsc1(char *, getbenv, char *, a) - -void config_BSP(char *command, int len) -{ - unsigned char *p; - - printk(KERN_INFO "\n68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n"); - - printk(KERN_INFO "uCdimm serial string [%s]\n",getserialnum()); - p = cs8900a_hwaddr = gethwaddr(0); - printk(KERN_INFO "uCdimm hwaddr %.2x:%.2x:%.2x:%.2x:%.2x:%.2x\n", - p[0], p[1], p[2], p[3], p[4], p[5]); - p = getbenv("APPEND"); - if (p) strcpy(p,command); - else command[0] = 0; - - mach_sched_init = BSP_sched_init; - mach_tick = BSP_tick; - mach_gettimeoffset = BSP_gettimeoffset; - mach_gettod = BSP_gettod; - mach_reset = BSP_reset; -} |