diff options
Diffstat (limited to 'arch/mips/alchemy')
| -rw-r--r-- | arch/mips/alchemy/common/dbdma.c | 8 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/irq.c | 34 | ||||
| -rw-r--r-- | arch/mips/alchemy/common/time.c | 2 | ||||
| -rw-r--r-- | arch/mips/alchemy/mtx-1/board_setup.c | 3 |
4 files changed, 31 insertions, 16 deletions
diff --git a/arch/mips/alchemy/common/dbdma.c b/arch/mips/alchemy/common/dbdma.c index 3ab6d80d150..19c1c82849f 100644 --- a/arch/mips/alchemy/common/dbdma.c +++ b/arch/mips/alchemy/common/dbdma.c @@ -175,7 +175,7 @@ static dbdev_tab_t dbdev_tab[] = { #define DBDEV_TAB_SIZE ARRAY_SIZE(dbdev_tab) #ifdef CONFIG_PM -static u32 au1xxx_dbdma_pm_regs[NUM_DBDMA_CHANS + 1][8]; +static u32 au1xxx_dbdma_pm_regs[NUM_DBDMA_CHANS + 1][6]; #endif @@ -993,14 +993,13 @@ void au1xxx_dbdma_suspend(void) au1xxx_dbdma_pm_regs[0][3] = au_readl(addr + 0x0c); /* save channel configurations */ - for (i = 1, addr = DDMA_CHANNEL_BASE; i < NUM_DBDMA_CHANS; i++) { + for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) { au1xxx_dbdma_pm_regs[i][0] = au_readl(addr + 0x00); au1xxx_dbdma_pm_regs[i][1] = au_readl(addr + 0x04); au1xxx_dbdma_pm_regs[i][2] = au_readl(addr + 0x08); au1xxx_dbdma_pm_regs[i][3] = au_readl(addr + 0x0c); au1xxx_dbdma_pm_regs[i][4] = au_readl(addr + 0x10); au1xxx_dbdma_pm_regs[i][5] = au_readl(addr + 0x14); - au1xxx_dbdma_pm_regs[i][6] = au_readl(addr + 0x18); /* halt channel */ au_writel(au1xxx_dbdma_pm_regs[i][0] & ~1, addr + 0x00); @@ -1027,14 +1026,13 @@ void au1xxx_dbdma_resume(void) au_writel(au1xxx_dbdma_pm_regs[0][3], addr + 0x0c); /* restore channel configurations */ - for (i = 1, addr = DDMA_CHANNEL_BASE; i < NUM_DBDMA_CHANS; i++) { + for (i = 1, addr = DDMA_CHANNEL_BASE; i <= NUM_DBDMA_CHANS; i++) { au_writel(au1xxx_dbdma_pm_regs[i][0], addr + 0x00); au_writel(au1xxx_dbdma_pm_regs[i][1], addr + 0x04); au_writel(au1xxx_dbdma_pm_regs[i][2], addr + 0x08); au_writel(au1xxx_dbdma_pm_regs[i][3], addr + 0x0c); au_writel(au1xxx_dbdma_pm_regs[i][4], addr + 0x10); au_writel(au1xxx_dbdma_pm_regs[i][5], addr + 0x14); - au_writel(au1xxx_dbdma_pm_regs[i][6], addr + 0x18); au_sync(); addr += 0x100; /* next channel base */ } diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c index c88c821b4c3..d670928afcf 100644 --- a/arch/mips/alchemy/common/irq.c +++ b/arch/mips/alchemy/common/irq.c @@ -354,6 +354,28 @@ static void au1x_ic1_ack(unsigned int irq_nr) au_sync(); } +static void au1x_ic0_maskack(unsigned int irq_nr) +{ + unsigned int bit = irq_nr - AU1000_INTC0_INT_BASE; + + au_writel(1 << bit, IC0_WAKECLR); + au_writel(1 << bit, IC0_MASKCLR); + au_writel(1 << bit, IC0_RISINGCLR); + au_writel(1 << bit, IC0_FALLINGCLR); + au_sync(); +} + +static void au1x_ic1_maskack(unsigned int irq_nr) +{ + unsigned int bit = irq_nr - AU1000_INTC1_INT_BASE; + + au_writel(1 << bit, IC1_WAKECLR); + au_writel(1 << bit, IC1_MASKCLR); + au_writel(1 << bit, IC1_RISINGCLR); + au_writel(1 << bit, IC1_FALLINGCLR); + au_sync(); +} + static int au1x_ic1_setwake(unsigned int irq, unsigned int on) { unsigned int bit = irq - AU1000_INTC1_INT_BASE; @@ -379,25 +401,21 @@ static int au1x_ic1_setwake(unsigned int irq, unsigned int on) /* * irq_chips for both ICs; this way the mask handlers can be * as short as possible. - * - * NOTE: the ->ack() callback is used by the handle_edge_irq - * flowhandler only, the ->mask_ack() one by handle_level_irq, - * so no need for an irq_chip for each type of irq (level/edge). */ static struct irq_chip au1x_ic0_chip = { .name = "Alchemy-IC0", - .ack = au1x_ic0_ack, /* edge */ + .ack = au1x_ic0_ack, .mask = au1x_ic0_mask, - .mask_ack = au1x_ic0_mask, /* level */ + .mask_ack = au1x_ic0_maskack, .unmask = au1x_ic0_unmask, .set_type = au1x_ic_settype, }; static struct irq_chip au1x_ic1_chip = { .name = "Alchemy-IC1", - .ack = au1x_ic1_ack, /* edge */ + .ack = au1x_ic1_ack, .mask = au1x_ic1_mask, - .mask_ack = au1x_ic1_mask, /* level */ + .mask_ack = au1x_ic1_maskack, .unmask = au1x_ic1_unmask, .set_type = au1x_ic_settype, .set_wake = au1x_ic1_setwake, diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index f34ff860194..379a664809b 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c @@ -88,7 +88,7 @@ static struct clock_event_device au1x_rtcmatch2_clockdev = { .irq = AU1000_RTC_MATCH2_INT, .set_next_event = au1x_rtcmatch2_set_next_event, .set_mode = au1x_rtcmatch2_set_mode, - .cpumask = CPU_MASK_ALL_PTR, + .cpumask = cpu_all_mask, }; static struct irqaction au1x_rtcmatch2_irqaction = { diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c index cc32c69a74a..45b61c9b82b 100644 --- a/arch/mips/alchemy/mtx-1/board_setup.c +++ b/arch/mips/alchemy/mtx-1/board_setup.c @@ -69,6 +69,7 @@ void __init board_setup(void) #else au_writel(0xf, Au1500_PCI_CFG); #endif + board_pci_idsel = mtx1_pci_idsel; #endif /* Initialize sys_pinfunc */ @@ -85,8 +86,6 @@ void __init board_setup(void) alchemy_gpio_direction_output(211, 1); /* green on */ alchemy_gpio_direction_output(212, 0); /* red off */ - board_pci_idsel = mtx1_pci_idsel; - printk(KERN_INFO "4G Systems MTX-1 Board\n"); } |