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-rw-r--r--arch/mips/include/asm/cpu.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index f21b7c04e95..52c4e914f95 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -94,6 +94,7 @@
#define PRID_IMP_24KE 0x9600
#define PRID_IMP_74K 0x9700
#define PRID_IMP_1004K 0x9900
+#define PRID_IMP_1074K 0x9a00
#define PRID_IMP_M14KC 0x9c00
/*
@@ -319,6 +320,8 @@ enum cpu_type_enum {
#define MIPS_CPU_VINT 0x00080000 /* CPU supports MIPSR2 vectored interrupts */
#define MIPS_CPU_VEIC 0x00100000 /* CPU supports MIPSR2 external interrupt controller mode */
#define MIPS_CPU_ULRI 0x00200000 /* CPU has ULRI feature */
+#define MIPS_CPU_PCI 0x00400000 /* CPU has Perf Ctr Int indicator */
+#define MIPS_CPU_RIXI 0x00800000 /* CPU has TLB Read/eXec Inhibit */
/*
* CPU ASE encodings
@@ -329,6 +332,7 @@ enum cpu_type_enum {
#define MIPS_ASE_SMARTMIPS 0x00000008 /* SmartMIPS */
#define MIPS_ASE_DSP 0x00000010 /* Signal Processing ASE */
#define MIPS_ASE_MIPSMT 0x00000020 /* CPU supports MIPS MT */
+#define MIPS_ASE_DSP2P 0x00000040 /* Signal Processing ASE Rev 2 */
#endif /* _ASM_CPU_H */