diff options
Diffstat (limited to 'arch/mips/include/asm/octeon/cvmx-pciercx-defs.h')
| -rw-r--r-- | arch/mips/include/asm/octeon/cvmx-pciercx-defs.h | 1288 |
1 files changed, 1245 insertions, 43 deletions
diff --git a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h index 7b1dc8b74e5..4bce393391e 100644 --- a/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h +++ b/arch/mips/include/asm/octeon/cvmx-pciercx-defs.h @@ -4,7 +4,7 @@ * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * - * Copyright (c) 2003-2011 Cavium Networks + * Copyright (c) 2003-2012 Cavium Networks * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as @@ -109,8 +109,13 @@ union cvmx_pciercx_cfg000 { uint32_t u32; struct cvmx_pciercx_cfg000_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t devid:16; uint32_t vendid:16; +#else + uint32_t vendid:16; + uint32_t devid:16; +#endif } s; struct cvmx_pciercx_cfg000_s cn52xx; struct cvmx_pciercx_cfg000_s cn52xxp1; @@ -122,11 +127,13 @@ union cvmx_pciercx_cfg000 { struct cvmx_pciercx_cfg000_s cn66xx; struct cvmx_pciercx_cfg000_s cn68xx; struct cvmx_pciercx_cfg000_s cn68xxp1; + struct cvmx_pciercx_cfg000_s cnf71xx; }; union cvmx_pciercx_cfg001 { uint32_t u32; struct cvmx_pciercx_cfg001_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t dpe:1; uint32_t sse:1; uint32_t rma:1; @@ -151,6 +158,32 @@ union cvmx_pciercx_cfg001 { uint32_t me:1; uint32_t msae:1; uint32_t isae:1; +#else + uint32_t isae:1; + uint32_t msae:1; + uint32_t me:1; + uint32_t scse:1; + uint32_t mwice:1; + uint32_t vps:1; + uint32_t per:1; + uint32_t ids_wcc:1; + uint32_t see:1; + uint32_t fbbe:1; + uint32_t i_dis:1; + uint32_t reserved_11_18:8; + uint32_t i_stat:1; + uint32_t cl:1; + uint32_t m66:1; + uint32_t reserved_22_22:1; + uint32_t fbb:1; + uint32_t mdpe:1; + uint32_t devt:2; + uint32_t sta:1; + uint32_t rta:1; + uint32_t rma:1; + uint32_t sse:1; + uint32_t dpe:1; +#endif } s; struct cvmx_pciercx_cfg001_s cn52xx; struct cvmx_pciercx_cfg001_s cn52xxp1; @@ -162,15 +195,23 @@ union cvmx_pciercx_cfg001 { struct cvmx_pciercx_cfg001_s cn66xx; struct cvmx_pciercx_cfg001_s cn68xx; struct cvmx_pciercx_cfg001_s cn68xxp1; + struct cvmx_pciercx_cfg001_s cnf71xx; }; union cvmx_pciercx_cfg002 { uint32_t u32; struct cvmx_pciercx_cfg002_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t bcc:8; uint32_t sc:8; uint32_t pi:8; uint32_t rid:8; +#else + uint32_t rid:8; + uint32_t pi:8; + uint32_t sc:8; + uint32_t bcc:8; +#endif } s; struct cvmx_pciercx_cfg002_s cn52xx; struct cvmx_pciercx_cfg002_s cn52xxp1; @@ -182,16 +223,25 @@ union cvmx_pciercx_cfg002 { struct cvmx_pciercx_cfg002_s cn66xx; struct cvmx_pciercx_cfg002_s cn68xx; struct cvmx_pciercx_cfg002_s cn68xxp1; + struct cvmx_pciercx_cfg002_s cnf71xx; }; union cvmx_pciercx_cfg003 { uint32_t u32; struct cvmx_pciercx_cfg003_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t bist:8; uint32_t mfd:1; uint32_t chf:7; uint32_t lt:8; uint32_t cls:8; +#else + uint32_t cls:8; + uint32_t lt:8; + uint32_t chf:7; + uint32_t mfd:1; + uint32_t bist:8; +#endif } s; struct cvmx_pciercx_cfg003_s cn52xx; struct cvmx_pciercx_cfg003_s cn52xxp1; @@ -203,12 +253,17 @@ union cvmx_pciercx_cfg003 { struct cvmx_pciercx_cfg003_s cn66xx; struct cvmx_pciercx_cfg003_s cn68xx; struct cvmx_pciercx_cfg003_s cn68xxp1; + struct cvmx_pciercx_cfg003_s cnf71xx; }; union cvmx_pciercx_cfg004 { uint32_t u32; struct cvmx_pciercx_cfg004_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_0_31:32; +#else uint32_t reserved_0_31:32; +#endif } s; struct cvmx_pciercx_cfg004_s cn52xx; struct cvmx_pciercx_cfg004_s cn52xxp1; @@ -220,12 +275,17 @@ union cvmx_pciercx_cfg004 { struct cvmx_pciercx_cfg004_s cn66xx; struct cvmx_pciercx_cfg004_s cn68xx; struct cvmx_pciercx_cfg004_s cn68xxp1; + struct cvmx_pciercx_cfg004_s cnf71xx; }; union cvmx_pciercx_cfg005 { uint32_t u32; struct cvmx_pciercx_cfg005_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_0_31:32; +#else uint32_t reserved_0_31:32; +#endif } s; struct cvmx_pciercx_cfg005_s cn52xx; struct cvmx_pciercx_cfg005_s cn52xxp1; @@ -237,15 +297,23 @@ union cvmx_pciercx_cfg005 { struct cvmx_pciercx_cfg005_s cn66xx; struct cvmx_pciercx_cfg005_s cn68xx; struct cvmx_pciercx_cfg005_s cn68xxp1; + struct cvmx_pciercx_cfg005_s cnf71xx; }; union cvmx_pciercx_cfg006 { uint32_t u32; struct cvmx_pciercx_cfg006_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t slt:8; uint32_t subbnum:8; uint32_t sbnum:8; uint32_t pbnum:8; +#else + uint32_t pbnum:8; + uint32_t sbnum:8; + uint32_t subbnum:8; + uint32_t slt:8; +#endif } s; struct cvmx_pciercx_cfg006_s cn52xx; struct cvmx_pciercx_cfg006_s cn52xxp1; @@ -257,11 +325,13 @@ union cvmx_pciercx_cfg006 { struct cvmx_pciercx_cfg006_s cn66xx; struct cvmx_pciercx_cfg006_s cn68xx; struct cvmx_pciercx_cfg006_s cn68xxp1; + struct cvmx_pciercx_cfg006_s cnf71xx; }; union cvmx_pciercx_cfg007 { uint32_t u32; struct cvmx_pciercx_cfg007_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t dpe:1; uint32_t sse:1; uint32_t rma:1; @@ -279,6 +349,25 @@ union cvmx_pciercx_cfg007 { uint32_t lio_base:4; uint32_t reserved_1_3:3; uint32_t io32a:1; +#else + uint32_t io32a:1; + uint32_t reserved_1_3:3; + uint32_t lio_base:4; + uint32_t io32b:1; + uint32_t reserved_9_11:3; + uint32_t lio_limi:4; + uint32_t reserved_16_20:5; + uint32_t m66:1; + uint32_t reserved_22_22:1; + uint32_t fbb:1; + uint32_t mdpe:1; + uint32_t devt:2; + uint32_t sta:1; + uint32_t rta:1; + uint32_t rma:1; + uint32_t sse:1; + uint32_t dpe:1; +#endif } s; struct cvmx_pciercx_cfg007_s cn52xx; struct cvmx_pciercx_cfg007_s cn52xxp1; @@ -290,15 +379,23 @@ union cvmx_pciercx_cfg007 { struct cvmx_pciercx_cfg007_s cn66xx; struct cvmx_pciercx_cfg007_s cn68xx; struct cvmx_pciercx_cfg007_s cn68xxp1; + struct cvmx_pciercx_cfg007_s cnf71xx; }; union cvmx_pciercx_cfg008 { uint32_t u32; struct cvmx_pciercx_cfg008_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t ml_addr:12; uint32_t reserved_16_19:4; uint32_t mb_addr:12; uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t mb_addr:12; + uint32_t reserved_16_19:4; + uint32_t ml_addr:12; +#endif } s; struct cvmx_pciercx_cfg008_s cn52xx; struct cvmx_pciercx_cfg008_s cn52xxp1; @@ -310,17 +407,27 @@ union cvmx_pciercx_cfg008 { struct cvmx_pciercx_cfg008_s cn66xx; struct cvmx_pciercx_cfg008_s cn68xx; struct cvmx_pciercx_cfg008_s cn68xxp1; + struct cvmx_pciercx_cfg008_s cnf71xx; }; union cvmx_pciercx_cfg009 { uint32_t u32; struct cvmx_pciercx_cfg009_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t lmem_limit:12; uint32_t reserved_17_19:3; uint32_t mem64b:1; uint32_t lmem_base:12; uint32_t reserved_1_3:3; uint32_t mem64a:1; +#else + uint32_t mem64a:1; + uint32_t reserved_1_3:3; + uint32_t lmem_base:12; + uint32_t mem64b:1; + uint32_t reserved_17_19:3; + uint32_t lmem_limit:12; +#endif } s; struct cvmx_pciercx_cfg009_s cn52xx; struct cvmx_pciercx_cfg009_s cn52xxp1; @@ -332,12 +439,17 @@ union cvmx_pciercx_cfg009 { struct cvmx_pciercx_cfg009_s cn66xx; struct cvmx_pciercx_cfg009_s cn68xx; struct cvmx_pciercx_cfg009_s cn68xxp1; + struct cvmx_pciercx_cfg009_s cnf71xx; }; union cvmx_pciercx_cfg010 { uint32_t u32; struct cvmx_pciercx_cfg010_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t umem_base:32; +#else + uint32_t umem_base:32; +#endif } s; struct cvmx_pciercx_cfg010_s cn52xx; struct cvmx_pciercx_cfg010_s cn52xxp1; @@ -349,12 +461,17 @@ union cvmx_pciercx_cfg010 { struct cvmx_pciercx_cfg010_s cn66xx; struct cvmx_pciercx_cfg010_s cn68xx; struct cvmx_pciercx_cfg010_s cn68xxp1; + struct cvmx_pciercx_cfg010_s cnf71xx; }; union cvmx_pciercx_cfg011 { uint32_t u32; struct cvmx_pciercx_cfg011_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t umem_limit:32; +#else + uint32_t umem_limit:32; +#endif } s; struct cvmx_pciercx_cfg011_s cn52xx; struct cvmx_pciercx_cfg011_s cn52xxp1; @@ -366,13 +483,19 @@ union cvmx_pciercx_cfg011 { struct cvmx_pciercx_cfg011_s cn66xx; struct cvmx_pciercx_cfg011_s cn68xx; struct cvmx_pciercx_cfg011_s cn68xxp1; + struct cvmx_pciercx_cfg011_s cnf71xx; }; union cvmx_pciercx_cfg012 { uint32_t u32; struct cvmx_pciercx_cfg012_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t uio_limit:16; uint32_t uio_base:16; +#else + uint32_t uio_base:16; + uint32_t uio_limit:16; +#endif } s; struct cvmx_pciercx_cfg012_s cn52xx; struct cvmx_pciercx_cfg012_s cn52xxp1; @@ -384,13 +507,19 @@ union cvmx_pciercx_cfg012 { struct cvmx_pciercx_cfg012_s cn66xx; struct cvmx_pciercx_cfg012_s cn68xx; struct cvmx_pciercx_cfg012_s cn68xxp1; + struct cvmx_pciercx_cfg012_s cnf71xx; }; union cvmx_pciercx_cfg013 { uint32_t u32; struct cvmx_pciercx_cfg013_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_8_31:24; uint32_t cp:8; +#else + uint32_t cp:8; + uint32_t reserved_8_31:24; +#endif } s; struct cvmx_pciercx_cfg013_s cn52xx; struct cvmx_pciercx_cfg013_s cn52xxp1; @@ -402,12 +531,17 @@ union cvmx_pciercx_cfg013 { struct cvmx_pciercx_cfg013_s cn66xx; struct cvmx_pciercx_cfg013_s cn68xx; struct cvmx_pciercx_cfg013_s cn68xxp1; + struct cvmx_pciercx_cfg013_s cnf71xx; }; union cvmx_pciercx_cfg014 { uint32_t u32; struct cvmx_pciercx_cfg014_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_0_31:32; +#else uint32_t reserved_0_31:32; +#endif } s; struct cvmx_pciercx_cfg014_s cn52xx; struct cvmx_pciercx_cfg014_s cn52xxp1; @@ -419,11 +553,13 @@ union cvmx_pciercx_cfg014 { struct cvmx_pciercx_cfg014_s cn66xx; struct cvmx_pciercx_cfg014_s cn68xx; struct cvmx_pciercx_cfg014_s cn68xxp1; + struct cvmx_pciercx_cfg014_s cnf71xx; }; union cvmx_pciercx_cfg015 { uint32_t u32; struct cvmx_pciercx_cfg015_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_28_31:4; uint32_t dtsees:1; uint32_t dts:1; @@ -439,6 +575,23 @@ union cvmx_pciercx_cfg015 { uint32_t pere:1; uint32_t inta:8; uint32_t il:8; +#else + uint32_t il:8; + uint32_t inta:8; + uint32_t pere:1; + uint32_t see:1; + uint32_t isae:1; + uint32_t vgae:1; + uint32_t vga16d:1; + uint32_t mam:1; + uint32_t sbrst:1; + uint32_t fbbe:1; + uint32_t pdt:1; + uint32_t sdt:1; + uint32_t dts:1; + uint32_t dtsees:1; + uint32_t reserved_28_31:4; +#endif } s; struct cvmx_pciercx_cfg015_s cn52xx; struct cvmx_pciercx_cfg015_s cn52xxp1; @@ -450,11 +603,13 @@ union cvmx_pciercx_cfg015 { struct cvmx_pciercx_cfg015_s cn66xx; struct cvmx_pciercx_cfg015_s cn68xx; struct cvmx_pciercx_cfg015_s cn68xxp1; + struct cvmx_pciercx_cfg015_s cnf71xx; }; union cvmx_pciercx_cfg016 { uint32_t u32; struct cvmx_pciercx_cfg016_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t pmes:5; uint32_t d2s:1; uint32_t d1s:1; @@ -465,6 +620,18 @@ union cvmx_pciercx_cfg016 { uint32_t pmsv:3; uint32_t ncp:8; uint32_t pmcid:8; +#else + uint32_t pmcid:8; + uint32_t ncp:8; + uint32_t pmsv:3; + uint32_t pme_clock:1; + uint32_t reserved_20_20:1; + uint32_t dsi:1; + uint32_t auxc:3; + uint32_t d1s:1; + uint32_t d2s:1; + uint32_t pmes:5; +#endif } s; struct cvmx_pciercx_cfg016_s cn52xx; struct cvmx_pciercx_cfg016_s cn52xxp1; @@ -476,11 +643,13 @@ union cvmx_pciercx_cfg016 { struct cvmx_pciercx_cfg016_s cn66xx; struct cvmx_pciercx_cfg016_s cn68xx; struct cvmx_pciercx_cfg016_s cn68xxp1; + struct cvmx_pciercx_cfg016_s cnf71xx; }; union cvmx_pciercx_cfg017 { uint32_t u32; struct cvmx_pciercx_cfg017_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t pmdia:8; uint32_t bpccee:1; uint32_t bd3h:1; @@ -493,6 +662,20 @@ union cvmx_pciercx_cfg017 { uint32_t nsr:1; uint32_t reserved_2_2:1; uint32_t ps:2; +#else + uint32_t ps:2; + uint32_t reserved_2_2:1; + uint32_t nsr:1; + uint32_t reserved_4_7:4; + uint32_t pmeens:1; + uint32_t pmds:4; + uint32_t pmedsia:2; + uint32_t pmess:1; + uint32_t reserved_16_21:6; + uint32_t bd3h:1; + uint32_t bpccee:1; + uint32_t pmdia:8; +#endif } s; struct cvmx_pciercx_cfg017_s cn52xx; struct cvmx_pciercx_cfg017_s cn52xxp1; @@ -504,11 +687,13 @@ union cvmx_pciercx_cfg017 { struct cvmx_pciercx_cfg017_s cn66xx; struct cvmx_pciercx_cfg017_s cn68xx; struct cvmx_pciercx_cfg017_s cn68xxp1; + struct cvmx_pciercx_cfg017_s cnf71xx; }; union cvmx_pciercx_cfg020 { uint32_t u32; struct cvmx_pciercx_cfg020_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_25_31:7; uint32_t pvm:1; uint32_t m64:1; @@ -517,8 +702,19 @@ union cvmx_pciercx_cfg020 { uint32_t msien:1; uint32_t ncp:8; uint32_t msicid:8; +#else + uint32_t msicid:8; + uint32_t ncp:8; + uint32_t msien:1; + uint32_t mmc:3; + uint32_t mme:3; + uint32_t m64:1; + uint32_t pvm:1; + uint32_t reserved_25_31:7; +#endif } s; struct cvmx_pciercx_cfg020_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_24_31:8; uint32_t m64:1; uint32_t mme:3; @@ -526,6 +722,15 @@ union cvmx_pciercx_cfg020 { uint32_t msien:1; uint32_t ncp:8; uint32_t msicid:8; +#else + uint32_t msicid:8; + uint32_t ncp:8; + uint32_t msien:1; + uint32_t mmc:3; + uint32_t mme:3; + uint32_t m64:1; + uint32_t reserved_24_31:8; +#endif } cn52xx; struct cvmx_pciercx_cfg020_cn52xx cn52xxp1; struct cvmx_pciercx_cfg020_cn52xx cn56xx; @@ -536,13 +741,19 @@ union cvmx_pciercx_cfg020 { struct cvmx_pciercx_cfg020_cn52xx cn66xx; struct cvmx_pciercx_cfg020_cn52xx cn68xx; struct cvmx_pciercx_cfg020_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg020_s cnf71xx; }; union cvmx_pciercx_cfg021 { uint32_t u32; struct cvmx_pciercx_cfg021_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t lmsi:30; uint32_t reserved_0_1:2; +#else + uint32_t reserved_0_1:2; + uint32_t lmsi:30; +#endif } s; struct cvmx_pciercx_cfg021_s cn52xx; struct cvmx_pciercx_cfg021_s cn52xxp1; @@ -554,12 +765,17 @@ union cvmx_pciercx_cfg021 { struct cvmx_pciercx_cfg021_s cn66xx; struct cvmx_pciercx_cfg021_s cn68xx; struct cvmx_pciercx_cfg021_s cn68xxp1; + struct cvmx_pciercx_cfg021_s cnf71xx; }; union cvmx_pciercx_cfg022 { uint32_t u32; struct cvmx_pciercx_cfg022_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t umsi:32; +#else + uint32_t umsi:32; +#endif } s; struct cvmx_pciercx_cfg022_s cn52xx; struct cvmx_pciercx_cfg022_s cn52xxp1; @@ -571,13 +787,19 @@ union cvmx_pciercx_cfg022 { struct cvmx_pciercx_cfg022_s cn66xx; struct cvmx_pciercx_cfg022_s cn68xx; struct cvmx_pciercx_cfg022_s cn68xxp1; + struct cvmx_pciercx_cfg022_s cnf71xx; }; union cvmx_pciercx_cfg023 { uint32_t u32; struct cvmx_pciercx_cfg023_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_16_31:16; uint32_t msimd:16; +#else + uint32_t msimd:16; + uint32_t reserved_16_31:16; +#endif } s; struct cvmx_pciercx_cfg023_s cn52xx; struct cvmx_pciercx_cfg023_s cn52xxp1; @@ -589,11 +811,13 @@ union cvmx_pciercx_cfg023 { struct cvmx_pciercx_cfg023_s cn66xx; struct cvmx_pciercx_cfg023_s cn68xx; struct cvmx_pciercx_cfg023_s cn68xxp1; + struct cvmx_pciercx_cfg023_s cnf71xx; }; union cvmx_pciercx_cfg028 { uint32_t u32; struct cvmx_pciercx_cfg028_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_30_31:2; uint32_t imn:5; uint32_t si:1; @@ -601,6 +825,15 @@ union cvmx_pciercx_cfg028 { uint32_t pciecv:4; uint32_t ncp:8; uint32_t pcieid:8; +#else + uint32_t pcieid:8; + uint32_t ncp:8; + uint32_t pciecv:4; + uint32_t dpt:4; + uint32_t si:1; + uint32_t imn:5; + uint32_t reserved_30_31:2; +#endif } s; struct cvmx_pciercx_cfg028_s cn52xx; struct cvmx_pciercx_cfg028_s cn52xxp1; @@ -612,11 +845,13 @@ union cvmx_pciercx_cfg028 { struct cvmx_pciercx_cfg028_s cn66xx; struct cvmx_pciercx_cfg028_s cn68xx; struct cvmx_pciercx_cfg028_s cn68xxp1; + struct cvmx_pciercx_cfg028_s cnf71xx; }; union cvmx_pciercx_cfg029 { uint32_t u32; struct cvmx_pciercx_cfg029_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_28_31:4; uint32_t cspls:2; uint32_t csplv:8; @@ -628,6 +863,19 @@ union cvmx_pciercx_cfg029 { uint32_t etfs:1; uint32_t pfs:2; uint32_t mpss:3; +#else + uint32_t mpss:3; + uint32_t pfs:2; + uint32_t etfs:1; + uint32_t el0al:3; + uint32_t el1al:3; + uint32_t reserved_12_14:3; + uint32_t rber:1; + uint32_t reserved_16_17:2; + uint32_t csplv:8; + uint32_t cspls:2; + uint32_t reserved_28_31:4; +#endif } s; struct cvmx_pciercx_cfg029_s cn52xx; struct cvmx_pciercx_cfg029_s cn52xxp1; @@ -639,11 +887,13 @@ union cvmx_pciercx_cfg029 { struct cvmx_pciercx_cfg029_s cn66xx; struct cvmx_pciercx_cfg029_s cn68xx; struct cvmx_pciercx_cfg029_s cn68xxp1; + struct cvmx_pciercx_cfg029_s cnf71xx; }; union cvmx_pciercx_cfg030 { uint32_t u32; struct cvmx_pciercx_cfg030_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_22_31:10; uint32_t tp:1; uint32_t ap_d:1; @@ -663,6 +913,27 @@ union cvmx_pciercx_cfg030 { uint32_t fe_en:1; uint32_t nfe_en:1; uint32_t ce_en:1; +#else + uint32_t ce_en:1; + uint32_t nfe_en:1; + uint32_t fe_en:1; + uint32_t ur_en:1; + uint32_t ro_en:1; + uint32_t mps:3; + uint32_t etf_en:1; + uint32_t pf_en:1; + uint32_t ap_en:1; + uint32_t ns_en:1; + uint32_t mrrs:3; + uint32_t reserved_15_15:1; + uint32_t ce_d:1; + uint32_t nfe_d:1; + uint32_t fe_d:1; + uint32_t ur_d:1; + uint32_t ap_d:1; + uint32_t tp:1; + uint32_t reserved_22_31:10; +#endif } s; struct cvmx_pciercx_cfg030_s cn52xx; struct cvmx_pciercx_cfg030_s cn52xxp1; @@ -674,11 +945,13 @@ union cvmx_pciercx_cfg030 { struct cvmx_pciercx_cfg030_s cn66xx; struct cvmx_pciercx_cfg030_s cn68xx; struct cvmx_pciercx_cfg030_s cn68xxp1; + struct cvmx_pciercx_cfg030_s cnf71xx; }; union cvmx_pciercx_cfg031 { uint32_t u32; struct cvmx_pciercx_cfg031_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t pnum:8; uint32_t reserved_23_23:1; uint32_t aspm:1; @@ -691,8 +964,23 @@ union cvmx_pciercx_cfg031 { uint32_t aslpms:2; uint32_t mlw:6; uint32_t mls:4; +#else + uint32_t mls:4; + uint32_t mlw:6; + uint32_t aslpms:2; + uint32_t l0el:3; + uint32_t l1el:3; + uint32_t cpm:1; + uint32_t sderc:1; + uint32_t dllarc:1; + uint32_t lbnc:1; + uint32_t aspm:1; + uint32_t reserved_23_23:1; + uint32_t pnum:8; +#endif } s; struct cvmx_pciercx_cfg031_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t pnum:8; uint32_t reserved_22_23:2; uint32_t lbnc:1; @@ -704,6 +992,19 @@ union cvmx_pciercx_cfg031 { uint32_t aslpms:2; uint32_t mlw:6; uint32_t mls:4; +#else + uint32_t mls:4; + uint32_t mlw:6; + uint32_t aslpms:2; + uint32_t l0el:3; + uint32_t l1el:3; + uint32_t cpm:1; + uint32_t sderc:1; + uint32_t dllarc:1; + uint32_t lbnc:1; + uint32_t reserved_22_23:2; + uint32_t pnum:8; +#endif } cn52xx; struct cvmx_pciercx_cfg031_cn52xx cn52xxp1; struct cvmx_pciercx_cfg031_cn52xx cn56xx; @@ -714,11 +1015,13 @@ union cvmx_pciercx_cfg031 { struct cvmx_pciercx_cfg031_s cn66xx; struct cvmx_pciercx_cfg031_s cn68xx; struct cvmx_pciercx_cfg031_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg031_s cnf71xx; }; union cvmx_pciercx_cfg032 { uint32_t u32; struct cvmx_pciercx_cfg032_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t lab:1; uint32_t lbm:1; uint32_t dlla:1; @@ -739,6 +1042,28 @@ union cvmx_pciercx_cfg032 { uint32_t rcb:1; uint32_t reserved_2_2:1; uint32_t aslpc:2; +#else + uint32_t aslpc:2; + uint32_t reserved_2_2:1; + uint32_t rcb:1; + uint32_t ld:1; + uint32_t rl:1; + uint32_t ccc:1; + uint32_t es:1; + uint32_t ecpm:1; + uint32_t hawd:1; + uint32_t lbm_int_enb:1; + uint32_t lab_int_enb:1; + uint32_t reserved_12_15:4; + uint32_t ls:4; + uint32_t nlw:6; + uint32_t reserved_26_26:1; + uint32_t lt:1; + uint32_t scc:1; + uint32_t dlla:1; + uint32_t lbm:1; + uint32_t lab:1; +#endif } s; struct cvmx_pciercx_cfg032_s cn52xx; struct cvmx_pciercx_cfg032_s cn52xxp1; @@ -750,11 +1075,13 @@ union cvmx_pciercx_cfg032 { struct cvmx_pciercx_cfg032_s cn66xx; struct cvmx_pciercx_cfg032_s cn68xx; struct cvmx_pciercx_cfg032_s cn68xxp1; + struct cvmx_pciercx_cfg032_s cnf71xx; }; union cvmx_pciercx_cfg033 { uint32_t u32; struct cvmx_pciercx_cfg033_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t ps_num:13; uint32_t nccs:1; uint32_t emip:1; @@ -767,6 +1094,20 @@ union cvmx_pciercx_cfg033 { uint32_t mrlsp:1; uint32_t pcp:1; uint32_t abp:1; +#else + uint32_t abp:1; + uint32_t pcp:1; + uint32_t mrlsp:1; + uint32_t aip:1; + uint32_t pip:1; + uint32_t hp_s:1; + uint32_t hp_c:1; + uint32_t sp_lv:8; + uint32_t sp_ls:2; + uint32_t emip:1; + uint32_t nccs:1; + uint32_t ps_num:13; +#endif } s; struct cvmx_pciercx_cfg033_s cn52xx; struct cvmx_pciercx_cfg033_s cn52xxp1; @@ -778,11 +1119,13 @@ union cvmx_pciercx_cfg033 { struct cvmx_pciercx_cfg033_s cn66xx; struct cvmx_pciercx_cfg033_s cn68xx; struct cvmx_pciercx_cfg033_s cn68xxp1; + struct cvmx_pciercx_cfg033_s cnf71xx; }; union cvmx_pciercx_cfg034 { uint32_t u32; struct cvmx_pciercx_cfg034_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_25_31:7; uint32_t dlls_c:1; uint32_t emis:1; @@ -805,6 +1148,30 @@ union cvmx_pciercx_cfg034 { uint32_t mrls_en:1; uint32_t pf_en:1; uint32_t abp_en:1; +#else + uint32_t abp_en:1; + uint32_t pf_en:1; + uint32_t mrls_en:1; + uint32_t pd_en:1; + uint32_t ccint_en:1; + uint32_t hpint_en:1; + uint32_t aic:2; + uint32_t pic:2; + uint32_t pcc:1; + uint32_t emic:1; + uint32_t dlls_en:1; + uint32_t reserved_13_15:3; + uint32_t abp_d:1; + uint32_t pf_d:1; + uint32_t mrls_c:1; + uint32_t pd_c:1; + uint32_t ccint_d:1; + uint32_t mrlss:1; + uint32_t pds:1; + uint32_t emis:1; + uint32_t dlls_c:1; + uint32_t reserved_25_31:7; +#endif } s; struct cvmx_pciercx_cfg034_s cn52xx; struct cvmx_pciercx_cfg034_s cn52xxp1; @@ -816,11 +1183,13 @@ union cvmx_pciercx_cfg034 { struct cvmx_pciercx_cfg034_s cn66xx; struct cvmx_pciercx_cfg034_s cn68xx; struct cvmx_pciercx_cfg034_s cn68xxp1; + struct cvmx_pciercx_cfg034_s cnf71xx; }; union cvmx_pciercx_cfg035 { uint32_t u32; struct cvmx_pciercx_cfg035_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_17_31:15; uint32_t crssv:1; uint32_t reserved_5_15:11; @@ -829,6 +1198,16 @@ union cvmx_pciercx_cfg035 { uint32_t sefee:1; uint32_t senfee:1; uint32_t secee:1; +#else + uint32_t secee:1; + uint32_t senfee:1; + uint32_t sefee:1; + uint32_t pmeie:1; + uint32_t crssve:1; + uint32_t reserved_5_15:11; + uint32_t crssv:1; + uint32_t reserved_17_31:15; +#endif } s; struct cvmx_pciercx_cfg035_s cn52xx; struct cvmx_pciercx_cfg035_s cn52xxp1; @@ -840,15 +1219,23 @@ union cvmx_pciercx_cfg035 { struct cvmx_pciercx_cfg035_s cn66xx; struct cvmx_pciercx_cfg035_s cn68xx; struct cvmx_pciercx_cfg035_s cn68xxp1; + struct cvmx_pciercx_cfg035_s cnf71xx; }; union cvmx_pciercx_cfg036 { uint32_t u32; struct cvmx_pciercx_cfg036_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_18_31:14; uint32_t pme_pend:1; uint32_t pme_stat:1; uint32_t pme_rid:16; +#else + uint32_t pme_rid:16; + uint32_t pme_stat:1; + uint32_t pme_pend:1; + uint32_t reserved_18_31:14; +#endif } s; struct cvmx_pciercx_cfg036_s cn52xx; struct cvmx_pciercx_cfg036_s cn52xxp1; @@ -860,14 +1247,17 @@ union cvmx_pciercx_cfg036 { struct cvmx_pciercx_cfg036_s cn66xx; struct cvmx_pciercx_cfg036_s cn68xx; struct cvmx_pciercx_cfg036_s cn68xxp1; + struct cvmx_pciercx_cfg036_s cnf71xx; }; union cvmx_pciercx_cfg037 { uint32_t u32; struct cvmx_pciercx_cfg037_s { - uint32_t reserved_14_31:18; - uint32_t tph:2; - uint32_t reserved_11_11:1; +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_20_31:12; + uint32_t obffs:2; + uint32_t reserved_12_17:6; + uint32_t ltrs:1; uint32_t noroprpr:1; uint32_t atom128s:1; uint32_t atom64s:1; @@ -876,16 +1266,37 @@ union cvmx_pciercx_cfg037 { uint32_t reserved_5_5:1; uint32_t ctds:1; uint32_t ctrs:4; +#else + uint32_t ctrs:4; + uint32_t ctds:1; + uint32_t reserved_5_5:1; + uint32_t atom_ops:1; + uint32_t atom32s:1; + uint32_t atom64s:1; + uint32_t atom128s:1; + uint32_t noroprpr:1; + uint32_t ltrs:1; + uint32_t reserved_12_17:6; + uint32_t obffs:2; + uint32_t reserved_20_31:12; +#endif } s; struct cvmx_pciercx_cfg037_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_5_31:27; uint32_t ctds:1; uint32_t ctrs:4; +#else + uint32_t ctrs:4; + uint32_t ctds:1; + uint32_t reserved_5_31:27; +#endif } cn52xx; struct cvmx_pciercx_cfg037_cn52xx cn52xxp1; struct cvmx_pciercx_cfg037_cn52xx cn56xx; struct cvmx_pciercx_cfg037_cn52xx cn56xxp1; struct cvmx_pciercx_cfg037_cn61xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_14_31:18; uint32_t tph:2; uint32_t reserved_11_11:1; @@ -897,10 +1308,24 @@ union cvmx_pciercx_cfg037 { uint32_t ari_fw:1; uint32_t ctds:1; uint32_t ctrs:4; +#else + uint32_t ctrs:4; + uint32_t ctds:1; + uint32_t ari_fw:1; + uint32_t atom_ops:1; + uint32_t atom32s:1; + uint32_t atom64s:1; + uint32_t atom128s:1; + uint32_t noroprpr:1; + uint32_t reserved_11_11:1; + uint32_t tph:2; + uint32_t reserved_14_31:18; +#endif } cn61xx; struct cvmx_pciercx_cfg037_cn52xx cn63xx; struct cvmx_pciercx_cfg037_cn52xx cn63xxp1; struct cvmx_pciercx_cfg037_cn66xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_14_31:18; uint32_t tph:2; uint32_t reserved_11_11:1; @@ -912,15 +1337,63 @@ union cvmx_pciercx_cfg037 { uint32_t ari:1; uint32_t ctds:1; uint32_t ctrs:4; +#else + uint32_t ctrs:4; + uint32_t ctds:1; + uint32_t ari:1; + uint32_t atom_ops:1; + uint32_t atom32s:1; + uint32_t atom64s:1; + uint32_t atom128s:1; + uint32_t noroprpr:1; + uint32_t reserved_11_11:1; + uint32_t tph:2; + uint32_t reserved_14_31:18; +#endif } cn66xx; struct cvmx_pciercx_cfg037_cn66xx cn68xx; struct cvmx_pciercx_cfg037_cn66xx cn68xxp1; + struct cvmx_pciercx_cfg037_cnf71xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_20_31:12; + uint32_t obffs:2; + uint32_t reserved_14_17:4; + uint32_t tphs:2; + uint32_t ltrs:1; + uint32_t noroprpr:1; + uint32_t atom128s:1; + uint32_t atom64s:1; + uint32_t atom32s:1; + uint32_t atom_ops:1; + uint32_t ari_fw:1; + uint32_t ctds:1; + uint32_t ctrs:4; +#else + uint32_t ctrs:4; + uint32_t ctds:1; + uint32_t ari_fw:1; + uint32_t atom_ops:1; + uint32_t atom32s:1; + uint32_t atom64s:1; + uint32_t atom128s:1; + uint32_t noroprpr:1; + uint32_t ltrs:1; + uint32_t tphs:2; + uint32_t reserved_14_17:4; + uint32_t obffs:2; + uint32_t reserved_20_31:12; +#endif + } cnf71xx; }; union cvmx_pciercx_cfg038 { uint32_t u32; struct cvmx_pciercx_cfg038_s { - uint32_t reserved_10_31:22; +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_15_31:17; + uint32_t obffe:2; + uint32_t reserved_11_12:2; + uint32_t ltre:1; uint32_t id0_cp:1; uint32_t id0_rq:1; uint32_t atom_op_eb:1; @@ -928,33 +1401,84 @@ union cvmx_pciercx_cfg038 { uint32_t ari:1; uint32_t ctd:1; uint32_t ctv:4; +#else + uint32_t ctv:4; + uint32_t ctd:1; + uint32_t ari:1; + uint32_t atom_op:1; + uint32_t atom_op_eb:1; + uint32_t id0_rq:1; + uint32_t id0_cp:1; + uint32_t ltre:1; + uint32_t reserved_11_12:2; + uint32_t obffe:2; + uint32_t reserved_15_31:17; +#endif } s; struct cvmx_pciercx_cfg038_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_5_31:27; uint32_t ctd:1; uint32_t ctv:4; +#else + uint32_t ctv:4; + uint32_t ctd:1; + uint32_t reserved_5_31:27; +#endif } cn52xx; struct cvmx_pciercx_cfg038_cn52xx cn52xxp1; struct cvmx_pciercx_cfg038_cn52xx cn56xx; struct cvmx_pciercx_cfg038_cn52xx cn56xxp1; - struct cvmx_pciercx_cfg038_s cn61xx; + struct cvmx_pciercx_cfg038_cn61xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_10_31:22; + uint32_t id0_cp:1; + uint32_t id0_rq:1; + uint32_t atom_op_eb:1; + uint32_t atom_op:1; + uint32_t ari:1; + uint32_t ctd:1; + uint32_t ctv:4; +#else + uint32_t ctv:4; + uint32_t ctd:1; + uint32_t ari:1; + uint32_t atom_op:1; + uint32_t atom_op_eb:1; + uint32_t id0_rq:1; + uint32_t id0_cp:1; + uint32_t reserved_10_31:22; +#endif + } cn61xx; struct cvmx_pciercx_cfg038_cn52xx cn63xx; struct cvmx_pciercx_cfg038_cn52xx cn63xxp1; - struct cvmx_pciercx_cfg038_s cn66xx; - struct cvmx_pciercx_cfg038_s cn68xx; - struct cvmx_pciercx_cfg038_s cn68xxp1; + struct cvmx_pciercx_cfg038_cn61xx cn66xx; + struct cvmx_pciercx_cfg038_cn61xx cn68xx; + struct cvmx_pciercx_cfg038_cn61xx cn68xxp1; + struct cvmx_pciercx_cfg038_s cnf71xx; }; union cvmx_pciercx_cfg039 { uint32_t u32; struct cvmx_pciercx_cfg039_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_9_31:23; uint32_t cls:1; uint32_t slsv:7; uint32_t reserved_0_0:1; +#else + uint32_t reserved_0_0:1; + uint32_t slsv:7; + uint32_t cls:1; + uint32_t reserved_9_31:23; +#endif } s; struct cvmx_pciercx_cfg039_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_0_31:32; +#else uint32_t reserved_0_31:32; +#endif } cn52xx; struct cvmx_pciercx_cfg039_cn52xx cn52xxp1; struct cvmx_pciercx_cfg039_cn52xx cn56xx; @@ -965,11 +1489,13 @@ union cvmx_pciercx_cfg039 { struct cvmx_pciercx_cfg039_s cn66xx; struct cvmx_pciercx_cfg039_s cn68xx; struct cvmx_pciercx_cfg039_s cn68xxp1; + struct cvmx_pciercx_cfg039_s cnf71xx; }; union cvmx_pciercx_cfg040 { uint32_t u32; struct cvmx_pciercx_cfg040_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_17_31:15; uint32_t cdl:1; uint32_t reserved_13_15:3; @@ -981,9 +1507,26 @@ union cvmx_pciercx_cfg040 { uint32_t hasd:1; uint32_t ec:1; uint32_t tls:4; +#else + uint32_t tls:4; + uint32_t ec:1; + uint32_t hasd:1; + uint32_t sde:1; + uint32_t tm:3; + uint32_t emc:1; + uint32_t csos:1; + uint32_t cde:1; + uint32_t reserved_13_15:3; + uint32_t cdl:1; + uint32_t reserved_17_31:15; +#endif } s; struct cvmx_pciercx_cfg040_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_0_31:32; +#else uint32_t reserved_0_31:32; +#endif } cn52xx; struct cvmx_pciercx_cfg040_cn52xx cn52xxp1; struct cvmx_pciercx_cfg040_cn52xx cn56xx; @@ -994,12 +1537,17 @@ union cvmx_pciercx_cfg040 { struct cvmx_pciercx_cfg040_s cn66xx; struct cvmx_pciercx_cfg040_s cn68xx; struct cvmx_pciercx_cfg040_s cn68xxp1; + struct cvmx_pciercx_cfg040_s cnf71xx; }; union cvmx_pciercx_cfg041 { uint32_t u32; struct cvmx_pciercx_cfg041_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_0_31:32; +#else uint32_t reserved_0_31:32; +#endif } s; struct cvmx_pciercx_cfg041_s cn52xx; struct cvmx_pciercx_cfg041_s cn52xxp1; @@ -1011,12 +1559,17 @@ union cvmx_pciercx_cfg041 { struct cvmx_pciercx_cfg041_s cn66xx; struct cvmx_pciercx_cfg041_s cn68xx; struct cvmx_pciercx_cfg041_s cn68xxp1; + struct cvmx_pciercx_cfg041_s cnf71xx; }; union cvmx_pciercx_cfg042 { uint32_t u32; struct cvmx_pciercx_cfg042_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_0_31:32; +#else uint32_t reserved_0_31:32; +#endif } s; struct cvmx_pciercx_cfg042_s cn52xx; struct cvmx_pciercx_cfg042_s cn52xxp1; @@ -1028,14 +1581,21 @@ union cvmx_pciercx_cfg042 { struct cvmx_pciercx_cfg042_s cn66xx; struct cvmx_pciercx_cfg042_s cn68xx; struct cvmx_pciercx_cfg042_s cn68xxp1; + struct cvmx_pciercx_cfg042_s cnf71xx; }; union cvmx_pciercx_cfg064 { uint32_t u32; struct cvmx_pciercx_cfg064_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t nco:12; uint32_t cv:4; uint32_t pcieec:16; +#else + uint32_t pcieec:16; + uint32_t cv:4; + uint32_t nco:12; +#endif } s; struct cvmx_pciercx_cfg064_s cn52xx; struct cvmx_pciercx_cfg064_s cn52xxp1; @@ -1047,14 +1607,18 @@ union cvmx_pciercx_cfg064 { struct cvmx_pciercx_cfg064_s cn66xx; struct cvmx_pciercx_cfg064_s cn68xx; struct cvmx_pciercx_cfg064_s cn68xxp1; + struct cvmx_pciercx_cfg064_s cnf71xx; }; union cvmx_pciercx_cfg065 { uint32_t u32; struct cvmx_pciercx_cfg065_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_25_31:7; uint32_t uatombs:1; - uint32_t reserved_21_23:3; + uint32_t reserved_23_23:1; + uint32_t ucies:1; + uint32_t reserved_21_21:1; uint32_t ures:1; uint32_t ecrces:1; uint32_t mtlps:1; @@ -1068,8 +1632,29 @@ union cvmx_pciercx_cfg065 { uint32_t sdes:1; uint32_t dlpes:1; uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpes:1; + uint32_t sdes:1; + uint32_t reserved_6_11:6; + uint32_t ptlps:1; + uint32_t fcpes:1; + uint32_t cts:1; + uint32_t cas:1; + uint32_t ucs:1; + uint32_t ros:1; + uint32_t mtlps:1; + uint32_t ecrces:1; + uint32_t ures:1; + uint32_t reserved_21_21:1; + uint32_t ucies:1; + uint32_t reserved_23_23:1; + uint32_t uatombs:1; + uint32_t reserved_25_31:7; +#endif } s; struct cvmx_pciercx_cfg065_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_21_31:11; uint32_t ures:1; uint32_t ecrces:1; @@ -1084,24 +1669,80 @@ union cvmx_pciercx_cfg065 { uint32_t sdes:1; uint32_t dlpes:1; uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpes:1; + uint32_t sdes:1; + uint32_t reserved_6_11:6; + uint32_t ptlps:1; + uint32_t fcpes:1; + uint32_t cts:1; + uint32_t cas:1; + uint32_t ucs:1; + uint32_t ros:1; + uint32_t mtlps:1; + uint32_t ecrces:1; + uint32_t ures:1; + uint32_t reserved_21_31:11; +#endif } cn52xx; struct cvmx_pciercx_cfg065_cn52xx cn52xxp1; struct cvmx_pciercx_cfg065_cn52xx cn56xx; struct cvmx_pciercx_cfg065_cn52xx cn56xxp1; - struct cvmx_pciercx_cfg065_s cn61xx; + struct cvmx_pciercx_cfg065_cn61xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_25_31:7; + uint32_t uatombs:1; + uint32_t reserved_21_23:3; + uint32_t ures:1; + uint32_t ecrces:1; + uint32_t mtlps:1; + uint32_t ros:1; + uint32_t ucs:1; + uint32_t cas:1; + uint32_t cts:1; + uint32_t fcpes:1; + uint32_t ptlps:1; + uint32_t reserved_6_11:6; + uint32_t sdes:1; + uint32_t dlpes:1; + uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpes:1; + uint32_t sdes:1; + uint32_t reserved_6_11:6; + uint32_t ptlps:1; + uint32_t fcpes:1; + uint32_t cts:1; + uint32_t cas:1; + uint32_t ucs:1; + uint32_t ros:1; + uint32_t mtlps:1; + uint32_t ecrces:1; + uint32_t ures:1; + uint32_t reserved_21_23:3; + uint32_t uatombs:1; + uint32_t reserved_25_31:7; +#endif + } cn61xx; struct cvmx_pciercx_cfg065_cn52xx cn63xx; struct cvmx_pciercx_cfg065_cn52xx cn63xxp1; - struct cvmx_pciercx_cfg065_s cn66xx; - struct cvmx_pciercx_cfg065_s cn68xx; + struct cvmx_pciercx_cfg065_cn61xx cn66xx; + struct cvmx_pciercx_cfg065_cn61xx cn68xx; struct cvmx_pciercx_cfg065_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg065_s cnf71xx; }; union cvmx_pciercx_cfg066 { uint32_t u32; struct cvmx_pciercx_cfg066_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_25_31:7; uint32_t uatombm:1; - uint32_t reserved_21_23:3; + uint32_t reserved_23_23:1; + uint32_t uciem:1; + uint32_t reserved_21_21:1; uint32_t urem:1; uint32_t ecrcem:1; uint32_t mtlpm:1; @@ -1115,8 +1756,29 @@ union cvmx_pciercx_cfg066 { uint32_t sdem:1; uint32_t dlpem:1; uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpem:1; + uint32_t sdem:1; + uint32_t reserved_6_11:6; + uint32_t ptlpm:1; + uint32_t fcpem:1; + uint32_t ctm:1; + uint32_t cam:1; + uint32_t ucm:1; + uint32_t rom:1; + uint32_t mtlpm:1; + uint32_t ecrcem:1; + uint32_t urem:1; + uint32_t reserved_21_21:1; + uint32_t uciem:1; + uint32_t reserved_23_23:1; + uint32_t uatombm:1; + uint32_t reserved_25_31:7; +#endif } s; struct cvmx_pciercx_cfg066_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_21_31:11; uint32_t urem:1; uint32_t ecrcem:1; @@ -1131,24 +1793,80 @@ union cvmx_pciercx_cfg066 { uint32_t sdem:1; uint32_t dlpem:1; uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpem:1; + uint32_t sdem:1; + uint32_t reserved_6_11:6; + uint32_t ptlpm:1; + uint32_t fcpem:1; + uint32_t ctm:1; + uint32_t cam:1; + uint32_t ucm:1; + uint32_t rom:1; + uint32_t mtlpm:1; + uint32_t ecrcem:1; + uint32_t urem:1; + uint32_t reserved_21_31:11; +#endif } cn52xx; struct cvmx_pciercx_cfg066_cn52xx cn52xxp1; struct cvmx_pciercx_cfg066_cn52xx cn56xx; struct cvmx_pciercx_cfg066_cn52xx cn56xxp1; - struct cvmx_pciercx_cfg066_s cn61xx; + struct cvmx_pciercx_cfg066_cn61xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_25_31:7; + uint32_t uatombm:1; + uint32_t reserved_21_23:3; + uint32_t urem:1; + uint32_t ecrcem:1; + uint32_t mtlpm:1; + uint32_t rom:1; + uint32_t ucm:1; + uint32_t cam:1; + uint32_t ctm:1; + uint32_t fcpem:1; + uint32_t ptlpm:1; + uint32_t reserved_6_11:6; + uint32_t sdem:1; + uint32_t dlpem:1; + uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpem:1; + uint32_t sdem:1; + uint32_t reserved_6_11:6; + uint32_t ptlpm:1; + uint32_t fcpem:1; + uint32_t ctm:1; + uint32_t cam:1; + uint32_t ucm:1; + uint32_t rom:1; + uint32_t mtlpm:1; + uint32_t ecrcem:1; + uint32_t urem:1; + uint32_t reserved_21_23:3; + uint32_t uatombm:1; + uint32_t reserved_25_31:7; +#endif + } cn61xx; struct cvmx_pciercx_cfg066_cn52xx cn63xx; struct cvmx_pciercx_cfg066_cn52xx cn63xxp1; - struct cvmx_pciercx_cfg066_s cn66xx; - struct cvmx_pciercx_cfg066_s cn68xx; + struct cvmx_pciercx_cfg066_cn61xx cn66xx; + struct cvmx_pciercx_cfg066_cn61xx cn68xx; struct cvmx_pciercx_cfg066_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg066_s cnf71xx; }; union cvmx_pciercx_cfg067 { uint32_t u32; struct cvmx_pciercx_cfg067_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_25_31:7; uint32_t uatombs:1; - uint32_t reserved_21_23:3; + uint32_t reserved_23_23:1; + uint32_t ucies:1; + uint32_t reserved_21_21:1; uint32_t ures:1; uint32_t ecrces:1; uint32_t mtlps:1; @@ -1162,8 +1880,29 @@ union cvmx_pciercx_cfg067 { uint32_t sdes:1; uint32_t dlpes:1; uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpes:1; + uint32_t sdes:1; + uint32_t reserved_6_11:6; + uint32_t ptlps:1; + uint32_t fcpes:1; + uint32_t cts:1; + uint32_t cas:1; + uint32_t ucs:1; + uint32_t ros:1; + uint32_t mtlps:1; + uint32_t ecrces:1; + uint32_t ures:1; + uint32_t reserved_21_21:1; + uint32_t ucies:1; + uint32_t reserved_23_23:1; + uint32_t uatombs:1; + uint32_t reserved_25_31:7; +#endif } s; struct cvmx_pciercx_cfg067_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_21_31:11; uint32_t ures:1; uint32_t ecrces:1; @@ -1178,22 +1917,77 @@ union cvmx_pciercx_cfg067 { uint32_t sdes:1; uint32_t dlpes:1; uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpes:1; + uint32_t sdes:1; + uint32_t reserved_6_11:6; + uint32_t ptlps:1; + uint32_t fcpes:1; + uint32_t cts:1; + uint32_t cas:1; + uint32_t ucs:1; + uint32_t ros:1; + uint32_t mtlps:1; + uint32_t ecrces:1; + uint32_t ures:1; + uint32_t reserved_21_31:11; +#endif } cn52xx; struct cvmx_pciercx_cfg067_cn52xx cn52xxp1; struct cvmx_pciercx_cfg067_cn52xx cn56xx; struct cvmx_pciercx_cfg067_cn52xx cn56xxp1; - struct cvmx_pciercx_cfg067_s cn61xx; + struct cvmx_pciercx_cfg067_cn61xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_25_31:7; + uint32_t uatombs:1; + uint32_t reserved_21_23:3; + uint32_t ures:1; + uint32_t ecrces:1; + uint32_t mtlps:1; + uint32_t ros:1; + uint32_t ucs:1; + uint32_t cas:1; + uint32_t cts:1; + uint32_t fcpes:1; + uint32_t ptlps:1; + uint32_t reserved_6_11:6; + uint32_t sdes:1; + uint32_t dlpes:1; + uint32_t reserved_0_3:4; +#else + uint32_t reserved_0_3:4; + uint32_t dlpes:1; + uint32_t sdes:1; + uint32_t reserved_6_11:6; + uint32_t ptlps:1; + uint32_t fcpes:1; + uint32_t cts:1; + uint32_t cas:1; + uint32_t ucs:1; + uint32_t ros:1; + uint32_t mtlps:1; + uint32_t ecrces:1; + uint32_t ures:1; + uint32_t reserved_21_23:3; + uint32_t uatombs:1; + uint32_t reserved_25_31:7; +#endif + } cn61xx; struct cvmx_pciercx_cfg067_cn52xx cn63xx; struct cvmx_pciercx_cfg067_cn52xx cn63xxp1; - struct cvmx_pciercx_cfg067_s cn66xx; - struct cvmx_pciercx_cfg067_s cn68xx; + struct cvmx_pciercx_cfg067_cn61xx cn66xx; + struct cvmx_pciercx_cfg067_cn61xx cn68xx; struct cvmx_pciercx_cfg067_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg067_s cnf71xx; }; union cvmx_pciercx_cfg068 { uint32_t u32; struct cvmx_pciercx_cfg068_s { - uint32_t reserved_14_31:18; +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_15_31:17; + uint32_t cies:1; uint32_t anfes:1; uint32_t rtts:1; uint32_t reserved_9_11:3; @@ -1202,23 +1996,60 @@ union cvmx_pciercx_cfg068 { uint32_t btlps:1; uint32_t reserved_1_5:5; uint32_t res:1; +#else + uint32_t res:1; + uint32_t reserved_1_5:5; + uint32_t btlps:1; + uint32_t bdllps:1; + uint32_t rnrs:1; + uint32_t reserved_9_11:3; + uint32_t rtts:1; + uint32_t anfes:1; + uint32_t cies:1; + uint32_t reserved_15_31:17; +#endif } s; - struct cvmx_pciercx_cfg068_s cn52xx; - struct cvmx_pciercx_cfg068_s cn52xxp1; - struct cvmx_pciercx_cfg068_s cn56xx; - struct cvmx_pciercx_cfg068_s cn56xxp1; - struct cvmx_pciercx_cfg068_s cn61xx; - struct cvmx_pciercx_cfg068_s cn63xx; - struct cvmx_pciercx_cfg068_s cn63xxp1; - struct cvmx_pciercx_cfg068_s cn66xx; - struct cvmx_pciercx_cfg068_s cn68xx; - struct cvmx_pciercx_cfg068_s cn68xxp1; + struct cvmx_pciercx_cfg068_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_14_31:18; + uint32_t anfes:1; + uint32_t rtts:1; + uint32_t reserved_9_11:3; + uint32_t rnrs:1; + uint32_t bdllps:1; + uint32_t btlps:1; + uint32_t reserved_1_5:5; + uint32_t res:1; +#else + uint32_t res:1; + uint32_t reserved_1_5:5; + uint32_t btlps:1; + uint32_t bdllps:1; + uint32_t rnrs:1; + uint32_t reserved_9_11:3; + uint32_t rtts:1; + uint32_t anfes:1; + uint32_t reserved_14_31:18; +#endif + } cn52xx; + struct cvmx_pciercx_cfg068_cn52xx cn52xxp1; + struct cvmx_pciercx_cfg068_cn52xx cn56xx; + struct cvmx_pciercx_cfg068_cn52xx cn56xxp1; + struct cvmx_pciercx_cfg068_cn52xx cn61xx; + struct cvmx_pciercx_cfg068_cn52xx cn63xx; + struct cvmx_pciercx_cfg068_cn52xx cn63xxp1; + struct cvmx_pciercx_cfg068_cn52xx cn66xx; + struct cvmx_pciercx_cfg068_cn52xx cn68xx; + struct cvmx_pciercx_cfg068_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg068_s cnf71xx; }; union cvmx_pciercx_cfg069 { uint32_t u32; struct cvmx_pciercx_cfg069_s { - uint32_t reserved_14_31:18; +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_15_31:17; + uint32_t ciem:1; uint32_t anfem:1; uint32_t rttm:1; uint32_t reserved_9_11:3; @@ -1227,28 +2058,72 @@ union cvmx_pciercx_cfg069 { uint32_t btlpm:1; uint32_t reserved_1_5:5; uint32_t rem:1; +#else + uint32_t rem:1; + uint32_t reserved_1_5:5; + uint32_t btlpm:1; + uint32_t bdllpm:1; + uint32_t rnrm:1; + uint32_t reserved_9_11:3; + uint32_t rttm:1; + uint32_t anfem:1; + uint32_t ciem:1; + uint32_t reserved_15_31:17; +#endif } s; - struct cvmx_pciercx_cfg069_s cn52xx; - struct cvmx_pciercx_cfg069_s cn52xxp1; - struct cvmx_pciercx_cfg069_s cn56xx; - struct cvmx_pciercx_cfg069_s cn56xxp1; - struct cvmx_pciercx_cfg069_s cn61xx; - struct cvmx_pciercx_cfg069_s cn63xx; - struct cvmx_pciercx_cfg069_s cn63xxp1; - struct cvmx_pciercx_cfg069_s cn66xx; - struct cvmx_pciercx_cfg069_s cn68xx; - struct cvmx_pciercx_cfg069_s cn68xxp1; + struct cvmx_pciercx_cfg069_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t reserved_14_31:18; + uint32_t anfem:1; + uint32_t rttm:1; + uint32_t reserved_9_11:3; + uint32_t rnrm:1; + uint32_t bdllpm:1; + uint32_t btlpm:1; + uint32_t reserved_1_5:5; + uint32_t rem:1; +#else + uint32_t rem:1; + uint32_t reserved_1_5:5; + uint32_t btlpm:1; + uint32_t bdllpm:1; + uint32_t rnrm:1; + uint32_t reserved_9_11:3; + uint32_t rttm:1; + uint32_t anfem:1; + uint32_t reserved_14_31:18; +#endif + } cn52xx; + struct cvmx_pciercx_cfg069_cn52xx cn52xxp1; + struct cvmx_pciercx_cfg069_cn52xx cn56xx; + struct cvmx_pciercx_cfg069_cn52xx cn56xxp1; + struct cvmx_pciercx_cfg069_cn52xx cn61xx; + struct cvmx_pciercx_cfg069_cn52xx cn63xx; + struct cvmx_pciercx_cfg069_cn52xx cn63xxp1; + struct cvmx_pciercx_cfg069_cn52xx cn66xx; + struct cvmx_pciercx_cfg069_cn52xx cn68xx; + struct cvmx_pciercx_cfg069_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg069_s cnf71xx; }; union cvmx_pciercx_cfg070 { uint32_t u32; struct cvmx_pciercx_cfg070_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_9_31:23; uint32_t ce:1; uint32_t cc:1; uint32_t ge:1; uint32_t gc:1; uint32_t fep:5; +#else + uint32_t fep:5; + uint32_t gc:1; + uint32_t ge:1; + uint32_t cc:1; + uint32_t ce:1; + uint32_t reserved_9_31:23; +#endif } s; struct cvmx_pciercx_cfg070_s cn52xx; struct cvmx_pciercx_cfg070_s cn52xxp1; @@ -1260,12 +2135,17 @@ union cvmx_pciercx_cfg070 { struct cvmx_pciercx_cfg070_s cn66xx; struct cvmx_pciercx_cfg070_s cn68xx; struct cvmx_pciercx_cfg070_s cn68xxp1; + struct cvmx_pciercx_cfg070_s cnf71xx; }; union cvmx_pciercx_cfg071 { uint32_t u32; struct cvmx_pciercx_cfg071_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t dword1:32; +#else + uint32_t dword1:32; +#endif } s; struct cvmx_pciercx_cfg071_s cn52xx; struct cvmx_pciercx_cfg071_s cn52xxp1; @@ -1277,12 +2157,17 @@ union cvmx_pciercx_cfg071 { struct cvmx_pciercx_cfg071_s cn66xx; struct cvmx_pciercx_cfg071_s cn68xx; struct cvmx_pciercx_cfg071_s cn68xxp1; + struct cvmx_pciercx_cfg071_s cnf71xx; }; union cvmx_pciercx_cfg072 { uint32_t u32; struct cvmx_pciercx_cfg072_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t dword2:32; +#else + uint32_t dword2:32; +#endif } s; struct cvmx_pciercx_cfg072_s cn52xx; struct cvmx_pciercx_cfg072_s cn52xxp1; @@ -1294,12 +2179,17 @@ union cvmx_pciercx_cfg072 { struct cvmx_pciercx_cfg072_s cn66xx; struct cvmx_pciercx_cfg072_s cn68xx; struct cvmx_pciercx_cfg072_s cn68xxp1; + struct cvmx_pciercx_cfg072_s cnf71xx; }; union cvmx_pciercx_cfg073 { uint32_t u32; struct cvmx_pciercx_cfg073_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t dword3:32; +#else + uint32_t dword3:32; +#endif } s; struct cvmx_pciercx_cfg073_s cn52xx; struct cvmx_pciercx_cfg073_s cn52xxp1; @@ -1311,12 +2201,17 @@ union cvmx_pciercx_cfg073 { struct cvmx_pciercx_cfg073_s cn66xx; struct cvmx_pciercx_cfg073_s cn68xx; struct cvmx_pciercx_cfg073_s cn68xxp1; + struct cvmx_pciercx_cfg073_s cnf71xx; }; union cvmx_pciercx_cfg074 { uint32_t u32; struct cvmx_pciercx_cfg074_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t dword4:32; +#else uint32_t dword4:32; +#endif } s; struct cvmx_pciercx_cfg074_s cn52xx; struct cvmx_pciercx_cfg074_s cn52xxp1; @@ -1328,15 +2223,23 @@ union cvmx_pciercx_cfg074 { struct cvmx_pciercx_cfg074_s cn66xx; struct cvmx_pciercx_cfg074_s cn68xx; struct cvmx_pciercx_cfg074_s cn68xxp1; + struct cvmx_pciercx_cfg074_s cnf71xx; }; union cvmx_pciercx_cfg075 { uint32_t u32; struct cvmx_pciercx_cfg075_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_3_31:29; uint32_t fere:1; uint32_t nfere:1; uint32_t cere:1; +#else + uint32_t cere:1; + uint32_t nfere:1; + uint32_t fere:1; + uint32_t reserved_3_31:29; +#endif } s; struct cvmx_pciercx_cfg075_s cn52xx; struct cvmx_pciercx_cfg075_s cn52xxp1; @@ -1348,11 +2251,13 @@ union cvmx_pciercx_cfg075 { struct cvmx_pciercx_cfg075_s cn66xx; struct cvmx_pciercx_cfg075_s cn68xx; struct cvmx_pciercx_cfg075_s cn68xxp1; + struct cvmx_pciercx_cfg075_s cnf71xx; }; union cvmx_pciercx_cfg076 { uint32_t u32; struct cvmx_pciercx_cfg076_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t aeimn:5; uint32_t reserved_7_26:20; uint32_t femr:1; @@ -1362,6 +2267,17 @@ union cvmx_pciercx_cfg076 { uint32_t efnfr:1; uint32_t multi_ecr:1; uint32_t ecr:1; +#else + uint32_t ecr:1; + uint32_t multi_ecr:1; + uint32_t efnfr:1; + uint32_t multi_efnfr:1; + uint32_t fuf:1; + uint32_t nfemr:1; + uint32_t femr:1; + uint32_t reserved_7_26:20; + uint32_t aeimn:5; +#endif } s; struct cvmx_pciercx_cfg076_s cn52xx; struct cvmx_pciercx_cfg076_s cn52xxp1; @@ -1373,13 +2289,19 @@ union cvmx_pciercx_cfg076 { struct cvmx_pciercx_cfg076_s cn66xx; struct cvmx_pciercx_cfg076_s cn68xx; struct cvmx_pciercx_cfg076_s cn68xxp1; + struct cvmx_pciercx_cfg076_s cnf71xx; }; union cvmx_pciercx_cfg077 { uint32_t u32; struct cvmx_pciercx_cfg077_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t efnfsi:16; uint32_t ecsi:16; +#else + uint32_t ecsi:16; + uint32_t efnfsi:16; +#endif } s; struct cvmx_pciercx_cfg077_s cn52xx; struct cvmx_pciercx_cfg077_s cn52xxp1; @@ -1391,13 +2313,19 @@ union cvmx_pciercx_cfg077 { struct cvmx_pciercx_cfg077_s cn66xx; struct cvmx_pciercx_cfg077_s cn68xx; struct cvmx_pciercx_cfg077_s cn68xxp1; + struct cvmx_pciercx_cfg077_s cnf71xx; }; union cvmx_pciercx_cfg448 { uint32_t u32; struct cvmx_pciercx_cfg448_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t rtl:16; uint32_t rtltl:16; +#else + uint32_t rtltl:16; + uint32_t rtl:16; +#endif } s; struct cvmx_pciercx_cfg448_s cn52xx; struct cvmx_pciercx_cfg448_s cn52xxp1; @@ -1409,12 +2337,17 @@ union cvmx_pciercx_cfg448 { struct cvmx_pciercx_cfg448_s cn66xx; struct cvmx_pciercx_cfg448_s cn68xx; struct cvmx_pciercx_cfg448_s cn68xxp1; + struct cvmx_pciercx_cfg448_s cnf71xx; }; union cvmx_pciercx_cfg449 { uint32_t u32; struct cvmx_pciercx_cfg449_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t omr:32; +#else uint32_t omr:32; +#endif } s; struct cvmx_pciercx_cfg449_s cn52xx; struct cvmx_pciercx_cfg449_s cn52xxp1; @@ -1426,17 +2359,27 @@ union cvmx_pciercx_cfg449 { struct cvmx_pciercx_cfg449_s cn66xx; struct cvmx_pciercx_cfg449_s cn68xx; struct cvmx_pciercx_cfg449_s cn68xxp1; + struct cvmx_pciercx_cfg449_s cnf71xx; }; union cvmx_pciercx_cfg450 { uint32_t u32; struct cvmx_pciercx_cfg450_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t lpec:8; uint32_t reserved_22_23:2; uint32_t link_state:6; uint32_t force_link:1; uint32_t reserved_8_14:7; uint32_t link_num:8; +#else + uint32_t link_num:8; + uint32_t reserved_8_14:7; + uint32_t force_link:1; + uint32_t link_state:6; + uint32_t reserved_22_23:2; + uint32_t lpec:8; +#endif } s; struct cvmx_pciercx_cfg450_s cn52xx; struct cvmx_pciercx_cfg450_s cn52xxp1; @@ -1448,11 +2391,13 @@ union cvmx_pciercx_cfg450 { struct cvmx_pciercx_cfg450_s cn66xx; struct cvmx_pciercx_cfg450_s cn68xx; struct cvmx_pciercx_cfg450_s cn68xxp1; + struct cvmx_pciercx_cfg450_s cnf71xx; }; union cvmx_pciercx_cfg451 { uint32_t u32; struct cvmx_pciercx_cfg451_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_31_31:1; uint32_t easpml1:1; uint32_t l1el:3; @@ -1460,14 +2405,32 @@ union cvmx_pciercx_cfg451 { uint32_t n_fts_cc:8; uint32_t n_fts:8; uint32_t ack_freq:8; +#else + uint32_t ack_freq:8; + uint32_t n_fts:8; + uint32_t n_fts_cc:8; + uint32_t l0el:3; + uint32_t l1el:3; + uint32_t easpml1:1; + uint32_t reserved_31_31:1; +#endif } s; struct cvmx_pciercx_cfg451_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_30_31:2; uint32_t l1el:3; uint32_t l0el:3; uint32_t n_fts_cc:8; uint32_t n_fts:8; uint32_t ack_freq:8; +#else + uint32_t ack_freq:8; + uint32_t n_fts:8; + uint32_t n_fts_cc:8; + uint32_t l0el:3; + uint32_t l1el:3; + uint32_t reserved_30_31:2; +#endif } cn52xx; struct cvmx_pciercx_cfg451_cn52xx cn52xxp1; struct cvmx_pciercx_cfg451_cn52xx cn56xx; @@ -1478,11 +2441,13 @@ union cvmx_pciercx_cfg451 { struct cvmx_pciercx_cfg451_s cn66xx; struct cvmx_pciercx_cfg451_s cn68xx; struct cvmx_pciercx_cfg451_s cn68xxp1; + struct cvmx_pciercx_cfg451_s cnf71xx; }; union cvmx_pciercx_cfg452 { uint32_t u32; struct cvmx_pciercx_cfg452_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_26_31:6; uint32_t eccrc:1; uint32_t reserved_22_24:3; @@ -1496,12 +2461,28 @@ union cvmx_pciercx_cfg452 { uint32_t le:1; uint32_t sd:1; uint32_t omr:1; +#else + uint32_t omr:1; + uint32_t sd:1; + uint32_t le:1; + uint32_t ra:1; + uint32_t reserved_4_4:1; + uint32_t dllle:1; + uint32_t reserved_6_6:1; + uint32_t flm:1; + uint32_t reserved_8_15:8; + uint32_t lme:6; + uint32_t reserved_22_24:3; + uint32_t eccrc:1; + uint32_t reserved_26_31:6; +#endif } s; struct cvmx_pciercx_cfg452_s cn52xx; struct cvmx_pciercx_cfg452_s cn52xxp1; struct cvmx_pciercx_cfg452_s cn56xx; struct cvmx_pciercx_cfg452_s cn56xxp1; struct cvmx_pciercx_cfg452_cn61xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_22_31:10; uint32_t lme:6; uint32_t reserved_8_15:8; @@ -1513,22 +2494,44 @@ union cvmx_pciercx_cfg452 { uint32_t le:1; uint32_t sd:1; uint32_t omr:1; +#else + uint32_t omr:1; + uint32_t sd:1; + uint32_t le:1; + uint32_t ra:1; + uint32_t reserved_4_4:1; + uint32_t dllle:1; + uint32_t reserved_6_6:1; + uint32_t flm:1; + uint32_t reserved_8_15:8; + uint32_t lme:6; + uint32_t reserved_22_31:10; +#endif } cn61xx; struct cvmx_pciercx_cfg452_s cn63xx; struct cvmx_pciercx_cfg452_s cn63xxp1; struct cvmx_pciercx_cfg452_cn61xx cn66xx; struct cvmx_pciercx_cfg452_cn61xx cn68xx; struct cvmx_pciercx_cfg452_cn61xx cn68xxp1; + struct cvmx_pciercx_cfg452_cn61xx cnf71xx; }; union cvmx_pciercx_cfg453 { uint32_t u32; struct cvmx_pciercx_cfg453_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t dlld:1; uint32_t reserved_26_30:5; uint32_t ack_nak:1; uint32_t fcd:1; uint32_t ilst:24; +#else + uint32_t ilst:24; + uint32_t fcd:1; + uint32_t ack_nak:1; + uint32_t reserved_26_30:5; + uint32_t dlld:1; +#endif } s; struct cvmx_pciercx_cfg453_s cn52xx; struct cvmx_pciercx_cfg453_s cn52xxp1; @@ -1540,11 +2543,13 @@ union cvmx_pciercx_cfg453 { struct cvmx_pciercx_cfg453_s cn66xx; struct cvmx_pciercx_cfg453_s cn68xx; struct cvmx_pciercx_cfg453_s cn68xxp1; + struct cvmx_pciercx_cfg453_s cnf71xx; }; union cvmx_pciercx_cfg454 { uint32_t u32; struct cvmx_pciercx_cfg454_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t cx_nfunc:3; uint32_t tmfcwt:5; uint32_t tmanlt:5; @@ -1552,8 +2557,18 @@ union cvmx_pciercx_cfg454 { uint32_t reserved_11_13:3; uint32_t nskps:3; uint32_t reserved_0_7:8; +#else + uint32_t reserved_0_7:8; + uint32_t nskps:3; + uint32_t reserved_11_13:3; + uint32_t tmrt:5; + uint32_t tmanlt:5; + uint32_t tmfcwt:5; + uint32_t cx_nfunc:3; +#endif } s; struct cvmx_pciercx_cfg454_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_29_31:3; uint32_t tmfcwt:5; uint32_t tmanlt:5; @@ -1562,28 +2577,49 @@ union cvmx_pciercx_cfg454 { uint32_t nskps:3; uint32_t reserved_4_7:4; uint32_t ntss:4; +#else + uint32_t ntss:4; + uint32_t reserved_4_7:4; + uint32_t nskps:3; + uint32_t reserved_11_13:3; + uint32_t tmrt:5; + uint32_t tmanlt:5; + uint32_t tmfcwt:5; + uint32_t reserved_29_31:3; +#endif } cn52xx; struct cvmx_pciercx_cfg454_cn52xx cn52xxp1; struct cvmx_pciercx_cfg454_cn52xx cn56xx; struct cvmx_pciercx_cfg454_cn52xx cn56xxp1; struct cvmx_pciercx_cfg454_cn61xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t cx_nfunc:3; uint32_t tmfcwt:5; uint32_t tmanlt:5; uint32_t tmrt:5; uint32_t reserved_8_13:6; uint32_t mfuncn:8; +#else + uint32_t mfuncn:8; + uint32_t reserved_8_13:6; + uint32_t tmrt:5; + uint32_t tmanlt:5; + uint32_t tmfcwt:5; + uint32_t cx_nfunc:3; +#endif } cn61xx; struct cvmx_pciercx_cfg454_cn52xx cn63xx; struct cvmx_pciercx_cfg454_cn52xx cn63xxp1; struct cvmx_pciercx_cfg454_cn61xx cn66xx; struct cvmx_pciercx_cfg454_cn61xx cn68xx; struct cvmx_pciercx_cfg454_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg454_cn61xx cnf71xx; }; union cvmx_pciercx_cfg455 { uint32_t u32; struct cvmx_pciercx_cfg455_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t m_cfg0_filt:1; uint32_t m_io_filt:1; uint32_t msg_ctrl:1; @@ -1603,6 +2639,27 @@ union cvmx_pciercx_cfg455 { uint32_t dfcwt:1; uint32_t reserved_11_14:4; uint32_t skpiv:11; +#else + uint32_t skpiv:11; + uint32_t reserved_11_14:4; + uint32_t dfcwt:1; + uint32_t m_fun:1; + uint32_t m_pois_filt:1; + uint32_t m_bar_match:1; + uint32_t m_cfg1_filt:1; + uint32_t m_lk_filt:1; + uint32_t m_cpl_tag_err:1; + uint32_t m_cpl_rid_err:1; + uint32_t m_cpl_fun_err:1; + uint32_t m_cpl_tc_err:1; + uint32_t m_cpl_attr_err:1; + uint32_t m_cpl_len_err:1; + uint32_t m_ecrc_filt:1; + uint32_t m_cpl_ecrc_filt:1; + uint32_t msg_ctrl:1; + uint32_t m_io_filt:1; + uint32_t m_cfg0_filt:1; +#endif } s; struct cvmx_pciercx_cfg455_s cn52xx; struct cvmx_pciercx_cfg455_s cn52xxp1; @@ -1614,21 +2671,36 @@ union cvmx_pciercx_cfg455 { struct cvmx_pciercx_cfg455_s cn66xx; struct cvmx_pciercx_cfg455_s cn68xx; struct cvmx_pciercx_cfg455_s cn68xxp1; + struct cvmx_pciercx_cfg455_s cnf71xx; }; union cvmx_pciercx_cfg456 { uint32_t u32; struct cvmx_pciercx_cfg456_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_4_31:28; uint32_t m_handle_flush:1; uint32_t m_dabort_4ucpl:1; uint32_t m_vend1_drp:1; uint32_t m_vend0_drp:1; +#else + uint32_t m_vend0_drp:1; + uint32_t m_vend1_drp:1; + uint32_t m_dabort_4ucpl:1; + uint32_t m_handle_flush:1; + uint32_t reserved_4_31:28; +#endif } s; struct cvmx_pciercx_cfg456_cn52xx { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_2_31:30; uint32_t m_vend1_drp:1; uint32_t m_vend0_drp:1; +#else + uint32_t m_vend0_drp:1; + uint32_t m_vend1_drp:1; + uint32_t reserved_2_31:30; +#endif } cn52xx; struct cvmx_pciercx_cfg456_cn52xx cn52xxp1; struct cvmx_pciercx_cfg456_cn52xx cn56xx; @@ -1639,12 +2711,17 @@ union cvmx_pciercx_cfg456 { struct cvmx_pciercx_cfg456_s cn66xx; struct cvmx_pciercx_cfg456_s cn68xx; struct cvmx_pciercx_cfg456_cn52xx cn68xxp1; + struct cvmx_pciercx_cfg456_s cnf71xx; }; union cvmx_pciercx_cfg458 { uint32_t u32; struct cvmx_pciercx_cfg458_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t dbg_info_l32:32; +#else uint32_t dbg_info_l32:32; +#endif } s; struct cvmx_pciercx_cfg458_s cn52xx; struct cvmx_pciercx_cfg458_s cn52xxp1; @@ -1656,12 +2733,17 @@ union cvmx_pciercx_cfg458 { struct cvmx_pciercx_cfg458_s cn66xx; struct cvmx_pciercx_cfg458_s cn68xx; struct cvmx_pciercx_cfg458_s cn68xxp1; + struct cvmx_pciercx_cfg458_s cnf71xx; }; union cvmx_pciercx_cfg459 { uint32_t u32; struct cvmx_pciercx_cfg459_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t dbg_info_u32:32; +#else uint32_t dbg_info_u32:32; +#endif } s; struct cvmx_pciercx_cfg459_s cn52xx; struct cvmx_pciercx_cfg459_s cn52xxp1; @@ -1673,14 +2755,21 @@ union cvmx_pciercx_cfg459 { struct cvmx_pciercx_cfg459_s cn66xx; struct cvmx_pciercx_cfg459_s cn68xx; struct cvmx_pciercx_cfg459_s cn68xxp1; + struct cvmx_pciercx_cfg459_s cnf71xx; }; union cvmx_pciercx_cfg460 { uint32_t u32; struct cvmx_pciercx_cfg460_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_20_31:12; uint32_t tphfcc:8; uint32_t tpdfcc:12; +#else + uint32_t tpdfcc:12; + uint32_t tphfcc:8; + uint32_t reserved_20_31:12; +#endif } s; struct cvmx_pciercx_cfg460_s cn52xx; struct cvmx_pciercx_cfg460_s cn52xxp1; @@ -1692,14 +2781,21 @@ union cvmx_pciercx_cfg460 { struct cvmx_pciercx_cfg460_s cn66xx; struct cvmx_pciercx_cfg460_s cn68xx; struct cvmx_pciercx_cfg460_s cn68xxp1; + struct cvmx_pciercx_cfg460_s cnf71xx; }; union cvmx_pciercx_cfg461 { uint32_t u32; struct cvmx_pciercx_cfg461_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_20_31:12; uint32_t tchfcc:8; uint32_t tcdfcc:12; +#else + uint32_t tcdfcc:12; + uint32_t tchfcc:8; + uint32_t reserved_20_31:12; +#endif } s; struct cvmx_pciercx_cfg461_s cn52xx; struct cvmx_pciercx_cfg461_s cn52xxp1; @@ -1711,14 +2807,21 @@ union cvmx_pciercx_cfg461 { struct cvmx_pciercx_cfg461_s cn66xx; struct cvmx_pciercx_cfg461_s cn68xx; struct cvmx_pciercx_cfg461_s cn68xxp1; + struct cvmx_pciercx_cfg461_s cnf71xx; }; union cvmx_pciercx_cfg462 { uint32_t u32; struct cvmx_pciercx_cfg462_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_20_31:12; uint32_t tchfcc:8; uint32_t tcdfcc:12; +#else + uint32_t tcdfcc:12; + uint32_t tchfcc:8; + uint32_t reserved_20_31:12; +#endif } s; struct cvmx_pciercx_cfg462_s cn52xx; struct cvmx_pciercx_cfg462_s cn52xxp1; @@ -1730,15 +2833,23 @@ union cvmx_pciercx_cfg462 { struct cvmx_pciercx_cfg462_s cn66xx; struct cvmx_pciercx_cfg462_s cn68xx; struct cvmx_pciercx_cfg462_s cn68xxp1; + struct cvmx_pciercx_cfg462_s cnf71xx; }; union cvmx_pciercx_cfg463 { uint32_t u32; struct cvmx_pciercx_cfg463_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_3_31:29; uint32_t rqne:1; uint32_t trbne:1; uint32_t rtlpfccnr:1; +#else + uint32_t rtlpfccnr:1; + uint32_t trbne:1; + uint32_t rqne:1; + uint32_t reserved_3_31:29; +#endif } s; struct cvmx_pciercx_cfg463_s cn52xx; struct cvmx_pciercx_cfg463_s cn52xxp1; @@ -1750,15 +2861,23 @@ union cvmx_pciercx_cfg463 { struct cvmx_pciercx_cfg463_s cn66xx; struct cvmx_pciercx_cfg463_s cn68xx; struct cvmx_pciercx_cfg463_s cn68xxp1; + struct cvmx_pciercx_cfg463_s cnf71xx; }; union cvmx_pciercx_cfg464 { uint32_t u32; struct cvmx_pciercx_cfg464_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t wrr_vc3:8; uint32_t wrr_vc2:8; uint32_t wrr_vc1:8; uint32_t wrr_vc0:8; +#else + uint32_t wrr_vc0:8; + uint32_t wrr_vc1:8; + uint32_t wrr_vc2:8; + uint32_t wrr_vc3:8; +#endif } s; struct cvmx_pciercx_cfg464_s cn52xx; struct cvmx_pciercx_cfg464_s cn52xxp1; @@ -1770,15 +2889,23 @@ union cvmx_pciercx_cfg464 { struct cvmx_pciercx_cfg464_s cn66xx; struct cvmx_pciercx_cfg464_s cn68xx; struct cvmx_pciercx_cfg464_s cn68xxp1; + struct cvmx_pciercx_cfg464_s cnf71xx; }; union cvmx_pciercx_cfg465 { uint32_t u32; struct cvmx_pciercx_cfg465_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t wrr_vc7:8; uint32_t wrr_vc6:8; uint32_t wrr_vc5:8; uint32_t wrr_vc4:8; +#else + uint32_t wrr_vc4:8; + uint32_t wrr_vc5:8; + uint32_t wrr_vc6:8; + uint32_t wrr_vc7:8; +#endif } s; struct cvmx_pciercx_cfg465_s cn52xx; struct cvmx_pciercx_cfg465_s cn52xxp1; @@ -1790,11 +2917,13 @@ union cvmx_pciercx_cfg465 { struct cvmx_pciercx_cfg465_s cn66xx; struct cvmx_pciercx_cfg465_s cn68xx; struct cvmx_pciercx_cfg465_s cn68xxp1; + struct cvmx_pciercx_cfg465_s cnf71xx; }; union cvmx_pciercx_cfg466 { uint32_t u32; struct cvmx_pciercx_cfg466_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t rx_queue_order:1; uint32_t type_ordering:1; uint32_t reserved_24_29:6; @@ -1802,6 +2931,15 @@ union cvmx_pciercx_cfg466 { uint32_t reserved_20_20:1; uint32_t header_credits:8; uint32_t data_credits:12; +#else + uint32_t data_credits:12; + uint32_t header_credits:8; + uint32_t reserved_20_20:1; + uint32_t queue_mode:3; + uint32_t reserved_24_29:6; + uint32_t type_ordering:1; + uint32_t rx_queue_order:1; +#endif } s; struct cvmx_pciercx_cfg466_s cn52xx; struct cvmx_pciercx_cfg466_s cn52xxp1; @@ -1813,16 +2951,25 @@ union cvmx_pciercx_cfg466 { struct cvmx_pciercx_cfg466_s cn66xx; struct cvmx_pciercx_cfg466_s cn68xx; struct cvmx_pciercx_cfg466_s cn68xxp1; + struct cvmx_pciercx_cfg466_s cnf71xx; }; union cvmx_pciercx_cfg467 { uint32_t u32; struct cvmx_pciercx_cfg467_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_24_31:8; uint32_t queue_mode:3; uint32_t reserved_20_20:1; uint32_t header_credits:8; uint32_t data_credits:12; +#else + uint32_t data_credits:12; + uint32_t header_credits:8; + uint32_t reserved_20_20:1; + uint32_t queue_mode:3; + uint32_t reserved_24_31:8; +#endif } s; struct cvmx_pciercx_cfg467_s cn52xx; struct cvmx_pciercx_cfg467_s cn52xxp1; @@ -1834,16 +2981,25 @@ union cvmx_pciercx_cfg467 { struct cvmx_pciercx_cfg467_s cn66xx; struct cvmx_pciercx_cfg467_s cn68xx; struct cvmx_pciercx_cfg467_s cn68xxp1; + struct cvmx_pciercx_cfg467_s cnf71xx; }; union cvmx_pciercx_cfg468 { uint32_t u32; struct cvmx_pciercx_cfg468_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_24_31:8; uint32_t queue_mode:3; uint32_t reserved_20_20:1; uint32_t header_credits:8; uint32_t data_credits:12; +#else + uint32_t data_credits:12; + uint32_t header_credits:8; + uint32_t reserved_20_20:1; + uint32_t queue_mode:3; + uint32_t reserved_24_31:8; +#endif } s; struct cvmx_pciercx_cfg468_s cn52xx; struct cvmx_pciercx_cfg468_s cn52xxp1; @@ -1855,15 +3011,23 @@ union cvmx_pciercx_cfg468 { struct cvmx_pciercx_cfg468_s cn66xx; struct cvmx_pciercx_cfg468_s cn68xx; struct cvmx_pciercx_cfg468_s cn68xxp1; + struct cvmx_pciercx_cfg468_s cnf71xx; }; union cvmx_pciercx_cfg490 { uint32_t u32; struct cvmx_pciercx_cfg490_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_26_31:6; uint32_t header_depth:10; uint32_t reserved_14_15:2; uint32_t data_depth:14; +#else + uint32_t data_depth:14; + uint32_t reserved_14_15:2; + uint32_t header_depth:10; + uint32_t reserved_26_31:6; +#endif } s; struct cvmx_pciercx_cfg490_s cn52xx; struct cvmx_pciercx_cfg490_s cn52xxp1; @@ -1875,15 +3039,23 @@ union cvmx_pciercx_cfg490 { struct cvmx_pciercx_cfg490_s cn66xx; struct cvmx_pciercx_cfg490_s cn68xx; struct cvmx_pciercx_cfg490_s cn68xxp1; + struct cvmx_pciercx_cfg490_s cnf71xx; }; union cvmx_pciercx_cfg491 { uint32_t u32; struct cvmx_pciercx_cfg491_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_26_31:6; uint32_t header_depth:10; uint32_t reserved_14_15:2; uint32_t data_depth:14; +#else + uint32_t data_depth:14; + uint32_t reserved_14_15:2; + uint32_t header_depth:10; + uint32_t reserved_26_31:6; +#endif } s; struct cvmx_pciercx_cfg491_s cn52xx; struct cvmx_pciercx_cfg491_s cn52xxp1; @@ -1895,15 +3067,23 @@ union cvmx_pciercx_cfg491 { struct cvmx_pciercx_cfg491_s cn66xx; struct cvmx_pciercx_cfg491_s cn68xx; struct cvmx_pciercx_cfg491_s cn68xxp1; + struct cvmx_pciercx_cfg491_s cnf71xx; }; union cvmx_pciercx_cfg492 { uint32_t u32; struct cvmx_pciercx_cfg492_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_26_31:6; uint32_t header_depth:10; uint32_t reserved_14_15:2; uint32_t data_depth:14; +#else + uint32_t data_depth:14; + uint32_t reserved_14_15:2; + uint32_t header_depth:10; + uint32_t reserved_26_31:6; +#endif } s; struct cvmx_pciercx_cfg492_s cn52xx; struct cvmx_pciercx_cfg492_s cn52xxp1; @@ -1915,11 +3095,13 @@ union cvmx_pciercx_cfg492 { struct cvmx_pciercx_cfg492_s cn66xx; struct cvmx_pciercx_cfg492_s cn68xx; struct cvmx_pciercx_cfg492_s cn68xxp1; + struct cvmx_pciercx_cfg492_s cnf71xx; }; union cvmx_pciercx_cfg515 { uint32_t u32; struct cvmx_pciercx_cfg515_s { +#ifdef __BIG_ENDIAN_BITFIELD uint32_t reserved_21_31:11; uint32_t s_d_e:1; uint32_t ctcrb:1; @@ -1927,6 +3109,15 @@ union cvmx_pciercx_cfg515 { uint32_t dsc:1; uint32_t le:9; uint32_t n_fts:8; +#else + uint32_t n_fts:8; + uint32_t le:9; + uint32_t dsc:1; + uint32_t cpyts:1; + uint32_t ctcrb:1; + uint32_t s_d_e:1; + uint32_t reserved_21_31:11; +#endif } s; struct cvmx_pciercx_cfg515_s cn61xx; struct cvmx_pciercx_cfg515_s cn63xx; @@ -1934,12 +3125,17 @@ union cvmx_pciercx_cfg515 { struct cvmx_pciercx_cfg515_s cn66xx; struct cvmx_pciercx_cfg515_s cn68xx; struct cvmx_pciercx_cfg515_s cn68xxp1; + struct cvmx_pciercx_cfg515_s cnf71xx; }; union cvmx_pciercx_cfg516 { uint32_t u32; struct cvmx_pciercx_cfg516_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t phy_stat:32; +#else uint32_t phy_stat:32; +#endif } s; struct cvmx_pciercx_cfg516_s cn52xx; struct cvmx_pciercx_cfg516_s cn52xxp1; @@ -1951,12 +3147,17 @@ union cvmx_pciercx_cfg516 { struct cvmx_pciercx_cfg516_s cn66xx; struct cvmx_pciercx_cfg516_s cn68xx; struct cvmx_pciercx_cfg516_s cn68xxp1; + struct cvmx_pciercx_cfg516_s cnf71xx; }; union cvmx_pciercx_cfg517 { uint32_t u32; struct cvmx_pciercx_cfg517_s { +#ifdef __BIG_ENDIAN_BITFIELD + uint32_t phy_ctrl:32; +#else uint32_t phy_ctrl:32; +#endif } s; struct cvmx_pciercx_cfg517_s cn52xx; struct cvmx_pciercx_cfg517_s cn52xxp1; @@ -1968,6 +3169,7 @@ union cvmx_pciercx_cfg517 { struct cvmx_pciercx_cfg517_s cn66xx; struct cvmx_pciercx_cfg517_s cn68xx; struct cvmx_pciercx_cfg517_s cn68xxp1; + struct cvmx_pciercx_cfg517_s cnf71xx; }; #endif |