diff options
Diffstat (limited to 'arch/mips/kernel')
28 files changed, 158 insertions, 161 deletions
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 761a779d5c4..3b27309d54b 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -82,7 +82,7 @@ void output_task_defines(void) { text("/* MIPS task_struct offsets. */"); offset("#define TASK_STATE ", struct task_struct, state); - offset("#define TASK_THREAD_INFO ", struct task_struct, thread_info); + offset("#define TASK_THREAD_INFO ", struct task_struct, stack); offset("#define TASK_FLAGS ", struct task_struct, flags); offset("#define TASK_MM ", struct task_struct, mm); offset("#define TASK_PID ", struct task_struct, pid); diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index ab755ea26c6..0fc90ba16ae 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -137,7 +137,6 @@ static inline void check_wait(void) case CPU_4KEC: case CPU_4KSC: case CPU_5KC: -/* case CPU_20KC:*/ case CPU_24K: case CPU_25KF: case CPU_34K: @@ -156,6 +155,17 @@ static inline void check_wait(void) if (allow_au1k_wait) cpu_wait = au1k_wait; break; + case CPU_20KC: + /* + * WAIT on Rev1.0 has E1, E2, E3 and E16. + * WAIT on Rev2.0 and Rev3.0 has E16. + * Rev3.1 WAIT is nop, why bother + */ + if ((c->processor_id & 0xff) <= 0x64) + break; + + cpu_wait = r4k_wait; + break; case CPU_RM9000: if ((c->processor_id & 0x00ff) >= 0x40) cpu_wait = r4k_wait; diff --git a/arch/mips/kernel/early_printk.c b/arch/mips/kernel/early_printk.c index 304efdc5682..9dccfa4752b 100644 --- a/arch/mips/kernel/early_printk.c +++ b/arch/mips/kernel/early_printk.c @@ -12,7 +12,8 @@ extern void prom_putchar(char); -static void early_console_write(struct console *con, const char *s, unsigned n) +static void __init +early_console_write(struct console *con, const char *s, unsigned n) { while (n-- && *s) { if (*s == '\n') @@ -22,19 +23,20 @@ static void early_console_write(struct console *con, const char *s, unsigned n) } } -static struct console early_console = { +static struct console early_console __initdata = { .name = "early", .write = early_console_write, .flags = CON_PRINTBUFFER | CON_BOOT, .index = -1 }; +static int early_console_initialized __initdata; + void __init setup_early_printk(void) { - register_console(&early_console); -} + if (early_console_initialized) + return; + early_console_initialized = 1; -void __init disable_early_printk(void) -{ - unregister_console(&early_console); + register_console(&early_console); } diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c index 3cc25c05d36..403d96f99e7 100644 --- a/arch/mips/kernel/irixelf.c +++ b/arch/mips/kernel/irixelf.c @@ -31,7 +31,6 @@ #include <linux/shm.h> #include <linux/personality.h> #include <linux/elfcore.h> -#include <linux/smp_lock.h> #include <asm/mipsregs.h> #include <asm/namei.h> diff --git a/arch/mips/kernel/irixioctl.c b/arch/mips/kernel/irixioctl.c index e2863821a3d..30f9eb09db3 100644 --- a/arch/mips/kernel/irixioctl.c +++ b/arch/mips/kernel/irixioctl.c @@ -9,7 +9,6 @@ #include <linux/fs.h> #include <linux/mm.h> #include <linux/smp.h> -#include <linux/smp_lock.h> #include <linux/sockios.h> #include <linux/syscalls.h> #include <linux/tty.h> diff --git a/arch/mips/kernel/irixsig.c b/arch/mips/kernel/irixsig.c index 2132485caa7..6980deb6dce 100644 --- a/arch/mips/kernel/irixsig.c +++ b/arch/mips/kernel/irixsig.c @@ -10,7 +10,6 @@ #include <linux/mm.h> #include <linux/errno.h> #include <linux/smp.h> -#include <linux/smp_lock.h> #include <linux/time.h> #include <linux/ptrace.h> #include <linux/resource.h> diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 2967537221e..410868b5ea5 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -132,11 +132,11 @@ struct irq_chip msc_edgeirq_type = { }; -void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) +void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqmap_t *imp, int nirq) { extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset); - _icctrl_msc = (unsigned long) ioremap (MIPS_MSC01_IC_REG_BASE, 0x40000); + _icctrl_msc = (unsigned long) ioremap (icubase, 0x40000); /* Reset interrupt controller - initialises all registers to 0 */ MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT); @@ -148,14 +148,14 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) switch (imp->im_type) { case MSC01_IRQ_EDGE: - set_irq_chip(base+n, &msc_edgeirq_type); + set_irq_chip(irqbase+n, &msc_edgeirq_type); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT); else MSCIC_WRITE(MSC01_IC_SUP+n*8, MSC01_IC_SUP_EDGE_BIT | imp->im_lvl); break; case MSC01_IRQ_LEVEL: - set_irq_chip(base+n, &msc_levelirq_type); + set_irq_chip(irqbase+n, &msc_levelirq_type); if (cpu_has_veic) MSCIC_WRITE(MSC01_IC_SUP+n*8, 0); else @@ -163,7 +163,7 @@ void __init init_msc_irqs(unsigned int base, msc_irqmap_t *imp, int nirq) } } - irq_base = base; + irq_base = irqbase; MSCIC_WRITE(MSC01_IC_GENA, MSC01_IC_GENA_GENA_BIT); /* Enable interrupt generation */ diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 2fe4c868a80..aeded6c17de 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c @@ -28,7 +28,7 @@ static unsigned long irq_map[NR_IRQS / BITS_PER_LONG]; -int __devinit allocate_irqno(void) +int allocate_irqno(void) { int irq; @@ -59,7 +59,7 @@ void __init alloc_legacy_irqno(void) BUG_ON(test_and_set_bit(i, irq_map)); } -void __devinit free_irqno(unsigned int irq) +void free_irqno(unsigned int irq) { smp_mb__before_clear_bit(); clear_bit(irq, irq_map); diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 37849edd064..06e04da211d 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c @@ -556,6 +556,16 @@ asmlinkage long sys32_sync_file_range(int fd, int __pad, flags); } +asmlinkage long sys32_fadvise64_64(int fd, int __pad, + unsigned long a2, unsigned long a3, + unsigned long a4, unsigned long a5, + int flags) +{ + return sys_fadvise64_64(fd, + merge_64(a2, a3), merge_64(a4, a5), + flags); +} + save_static_function(sys32_clone); __attribute_used__ noinline static int _sys32_clone(nabi_no_regargs struct pt_regs regs) diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 201ae194d1b..b5a7b46bbc4 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -22,7 +22,6 @@ #include <linux/ptrace.h> #include <linux/audit.h> #include <linux/smp.h> -#include <linux/smp_lock.h> #include <linux/user.h> #include <linux/security.h> #include <linux/signal.h> diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index cc566cf1224..06729596812 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -174,7 +174,7 @@ LEAF(_init_fpu) or t0, t1 mtc0 t0, CP0_STATUS #endif /* CONFIG_MIPS_MT_SMTC */ - fpu_enable_hazard + enable_fpu_hazard li t1, FPU_DEFAULT ctc1 t1, fcr31 diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 0c9a9ff8cd2..ae985d1fcca 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -657,7 +657,11 @@ einval: li v0, -EINVAL sys sys_getcpu 3 sys sys_epoll_pwait 6 sys sys_ioprio_set 3 - sys sys_ioprio_get 2 + sys sys_ioprio_get 2 /* 4315 */ + sys sys_utimensat 4 + sys sys_signalfd 3 + sys sys_timerfd 4 + sys sys_eventfd 1 .endm /* We pre-compute the number of _instruction_ bytes needed to diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 23f3b118f71..7bcd5a1a85f 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S @@ -473,4 +473,8 @@ sys_call_table: PTR sys_epoll_pwait PTR sys_ioprio_set PTR sys_ioprio_get + PTR sys_utimensat /* 5275 */ + PTR sys_signalfd + PTR sys_timerfd + PTR sys_eventfd .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 6eac2833742..532a2f3b42f 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -299,7 +299,7 @@ EXPORT(sysn32_call_table) PTR sys_ni_syscall /* res. for afs_syscall */ PTR sys_ni_syscall /* res. for security */ PTR sys_gettid - PTR sys32_readahead + PTR sys_readahead PTR sys_setxattr /* 6180 */ PTR sys_lsetxattr PTR sys_fsetxattr @@ -399,4 +399,8 @@ EXPORT(sysn32_call_table) PTR compat_sys_epoll_pwait PTR sys_ioprio_set PTR sys_ioprio_get + PTR compat_sys_utimensat + PTR compat_sys_signalfd /* 5280 */ + PTR compat_sys_timerfd + PTR sys_eventfd .size sysn32_call_table,.-sysn32_call_table diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 7e74b412a78..6bbe0f4ed8b 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -459,7 +459,7 @@ sys_call_table: PTR sys_remap_file_pages PTR sys_set_tid_address PTR sys_restart_syscall - PTR sys_fadvise64_64 + PTR sys32_fadvise64_64 PTR compat_sys_statfs64 /* 4255 */ PTR compat_sys_fstatfs64 PTR compat_sys_timer_create @@ -521,4 +521,8 @@ sys_call_table: PTR compat_sys_epoll_pwait PTR sys_ioprio_set PTR sys_ioprio_get /* 4315 */ + PTR compat_sys_utimensat + PTR compat_sys_signalfd + PTR compat_sys_timerfd + PTR sys_eventfd .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index 07d67309451..2a08ce41bf2 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c @@ -12,7 +12,6 @@ #include <linux/mm.h> #include <linux/personality.h> #include <linux/smp.h> -#include <linux/smp_lock.h> #include <linux/kernel.h> #include <linux/signal.h> #include <linux/errno.h> diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index b9a014411f8..486b8e5f52d 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c @@ -12,7 +12,6 @@ #include <linux/sched.h> #include <linux/mm.h> #include <linux/smp.h> -#include <linux/smp_lock.h> #include <linux/kernel.h> #include <linux/signal.h> #include <linux/syscalls.h> @@ -37,68 +36,6 @@ #include "signal-common.h" -#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) - -typedef struct compat_siginfo { - int si_signo; - int si_code; - int si_errno; - - union { - int _pad[SI_PAD_SIZE32]; - - /* kill() */ - struct { - compat_pid_t _pid; /* sender's pid */ - compat_uid_t _uid; /* sender's uid */ - } _kill; - - /* SIGCHLD */ - struct { - compat_pid_t _pid; /* which child */ - compat_uid_t _uid; /* sender's uid */ - int _status; /* exit code */ - compat_clock_t _utime; - compat_clock_t _stime; - } _sigchld; - - /* IRIX SIGCHLD */ - struct { - compat_pid_t _pid; /* which child */ - compat_clock_t _utime; - int _status; /* exit code */ - compat_clock_t _stime; - } _irix_sigchld; - - /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */ - struct { - s32 _addr; /* faulting insn/memory ref. */ - } _sigfault; - - /* SIGPOLL, SIGXFSZ (To do ...) */ - struct { - int _band; /* POLL_IN, POLL_OUT, POLL_MSG */ - int _fd; - } _sigpoll; - - /* POSIX.1b timers */ - struct { - timer_t _tid; /* timer id */ - int _overrun; /* overrun count */ - compat_sigval_t _sigval;/* same as below */ - int _sys_private; /* not to be passed to user */ - } _timer; - - /* POSIX.1b signals */ - struct { - compat_pid_t _pid; /* sender's pid */ - compat_uid_t _uid; /* sender's uid */ - compat_sigval_t _sigval; - } _rt; - - } _sifields; -} compat_siginfo_t; - /* * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... */ diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c index a9202fa9598..eb7e05926eb 100644 --- a/arch/mips/kernel/signal_n32.c +++ b/arch/mips/kernel/signal_n32.c @@ -19,7 +19,6 @@ #include <linux/sched.h> #include <linux/mm.h> #include <linux/smp.h> -#include <linux/smp_lock.h> #include <linux/kernel.h> #include <linux/signal.h> #include <linux/errno.h> @@ -73,7 +72,7 @@ struct ucontextn32 { struct rt_sigframe_n32 { u32 rs_ass[4]; /* argument save space for o32 */ u32 rs_code[2]; /* signal trampoline */ - struct siginfo rs_info; + struct compat_siginfo rs_info; struct ucontextn32 rs_uc; }; @@ -82,7 +81,7 @@ struct rt_sigframe_n32 { struct rt_sigframe_n32 { u32 rs_ass[4]; /* argument save space for o32 */ u32 rs_pad[2]; - struct siginfo rs_info; + struct compat_siginfo rs_info; struct ucontextn32 rs_uc; u32 rs_code[8] ____cacheline_aligned; /* signal trampoline */ }; @@ -188,7 +187,7 @@ static int setup_rt_frame_n32(struct k_sigaction * ka, install_sigtramp(frame->rs_code, __NR_N32_rt_sigreturn); /* Create siginfo. */ - err |= copy_siginfo_to_user(&frame->rs_info, info); + err |= copy_siginfo_to_user32(&frame->rs_info, info); /* Create the ucontext. */ err |= __put_user(0, &frame->rs_uc.uc_flags); diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 64b62bdfb4f..19b30d6f172 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c @@ -129,13 +129,13 @@ static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) static struct irqaction irq_resched = { .handler = ipi_resched_interrupt, - .flags = IRQF_DISABLED, + .flags = IRQF_DISABLED|IRQF_PERCPU, .name = "IPI_resched" }; static struct irqaction irq_call = { .handler = ipi_call_interrupt, - .flags = IRQF_DISABLED, + .flags = IRQF_DISABLED|IRQF_PERCPU, .name = "IPI_call" }; @@ -236,8 +236,6 @@ void __init plat_smp_setup(void) dvpe(); dmt(); - mips_mt_set_cpuoptions(); - /* Put MVPE's into 'configuration state' */ set_c0_mvpcontrol(MVPCONTROL_VPC); @@ -263,6 +261,8 @@ void __init plat_smp_setup(void) void __init plat_prepare_cpus(unsigned int max_cpus) { + mips_mt_set_cpuoptions(); + /* set up ipi interrupts */ if (cpu_has_vint) { set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); @@ -275,10 +275,7 @@ void __init plat_prepare_cpus(unsigned int max_cpus) setup_irq(cpu_ipi_resched_irq, &irq_resched); setup_irq(cpu_ipi_call_irq, &irq_call); - /* need to mark IPI's as IRQ_PER_CPU */ - irq_desc[cpu_ipi_resched_irq].status |= IRQ_PER_CPU; set_irq_handler(cpu_ipi_resched_irq, handle_percpu_irq); - irq_desc[cpu_ipi_call_irq].status |= IRQ_PER_CPU; set_irq_handler(cpu_ipi_call_irq, handle_percpu_irq); } @@ -326,8 +323,11 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) void prom_init_secondary(void) { + /* Enable per-cpu interrupts */ + + /* This is Malta specific: IPI,performance and timer inetrrupts */ write_c0_status((read_c0_status() & ~ST0_IM ) | - (STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP7)); + (STATUSF_IP0 | STATUSF_IP1 | STATUSF_IP6 | STATUSF_IP7)); } void prom_smp_finish(void) diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index c46e479c992..67edfa7ed93 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -68,7 +68,7 @@ extern ATTRIB_NORET void cpu_idle(void); * First C code run on the secondary CPUs after being started up by * the master. */ -asmlinkage void start_secondary(void) +asmlinkage __cpuinit void start_secondary(void) { unsigned int cpu; diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S index 921207c4a83..20938a4cb52 100644 --- a/arch/mips/kernel/smtc-asm.S +++ b/arch/mips/kernel/smtc-asm.S @@ -121,10 +121,7 @@ LEAF(self_ipi) subu t1,sp,PT_SIZE sw ra,PT_EPC(t1) sw a0,PT_PADSLOT4(t1) - LONG_L s0, TI_REGS($28) - LONG_S sp, TI_REGS($28) la t2,ipi_decode - LONG_S s0, TI_REGS($28) sw t2,PT_PADSLOT5(t1) /* Save pre-disable value of TCStatus */ sw t0,PT_TCSTATUS(t1) diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 5dcfab6b288..046b03b1705 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -13,9 +13,9 @@ #include <asm/system.h> #include <asm/hardirq.h> #include <asm/hazards.h> +#include <asm/irq.h> #include <asm/mmu_context.h> #include <asm/smp.h> -#include <asm/mips-boards/maltaint.h> #include <asm/mipsregs.h> #include <asm/cacheflush.h> #include <asm/time.h> @@ -560,7 +560,7 @@ void smtc_boot_secondary(int cpu, struct task_struct *idle) write_tc_gpr_sp(__KSTK_TOS(idle)); /* global pointer */ - write_tc_gpr_gp((unsigned long)idle->thread_info); + write_tc_gpr_gp((unsigned long)task_thread_info(idle)); smtc_status |= SMTC_MTC_ACTIVE; write_tc_c0_tchalt(0); @@ -611,12 +611,12 @@ void smtc_cpus_done(void) int setup_irq_smtc(unsigned int irq, struct irqaction * new, unsigned long hwmask) { +#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG unsigned int vpe = current_cpu_data.vpe_id; - irq_hwmask[irq] = hwmask; -#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG - vpemask[vpe][irq - MIPSCPU_INT_BASE] = 1; + vpemask[vpe][irq - MIPS_CPU_IRQ_BASE] = 1; #endif + irq_hwmask[irq] = hwmask; return setup_irq(irq, new); } @@ -822,7 +822,7 @@ void ipi_decode(struct smtc_ipi *pipi) switch (type_copy) { case SMTC_CLOCK_TICK: irq_enter(); - kstat_this_cpu.irqs[MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR]++; + kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++; /* Invoke Clock "Interrupt" */ ipi_timer_latch[dest_copy] = 0; #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG diff --git a/arch/mips/kernel/stacktrace.c b/arch/mips/kernel/stacktrace.c index a586aba337a..ebd9db8d1ec 100644 --- a/arch/mips/kernel/stacktrace.c +++ b/arch/mips/kernel/stacktrace.c @@ -31,8 +31,7 @@ static void save_raw_context_stack(struct stack_trace *trace, } } -static void save_context_stack(struct stack_trace *trace, - struct task_struct *task, struct pt_regs *regs) +static void save_context_stack(struct stack_trace *trace, struct pt_regs *regs) { unsigned long sp = regs->regs[29]; #ifdef CONFIG_KALLSYMS @@ -41,7 +40,7 @@ static void save_context_stack(struct stack_trace *trace, if (raw_show_trace || !__kernel_text_address(pc)) { unsigned long stack_page = - (unsigned long)task_stack_page(task); + (unsigned long)task_stack_page(current); if (stack_page && sp >= stack_page && sp <= stack_page + THREAD_SIZE - 32) save_raw_context_stack(trace, sp); @@ -54,7 +53,7 @@ static void save_context_stack(struct stack_trace *trace, trace->entries[trace->nr_entries++] = pc; if (trace->nr_entries >= trace->max_entries) break; - pc = unwind_stack(task, &sp, pc, &ra); + pc = unwind_stack(current, &sp, pc, &ra); } while (pc); #else save_raw_context_stack(trace, sp); @@ -64,22 +63,13 @@ static void save_context_stack(struct stack_trace *trace, /* * Save stack-backtrace addresses into a stack_trace buffer. */ -void save_stack_trace(struct stack_trace *trace, struct task_struct *task) +void save_stack_trace(struct stack_trace *trace) { struct pt_regs dummyregs; struct pt_regs *regs = &dummyregs; WARN_ON(trace->nr_entries || !trace->max_entries); - if (task && task != current) { - regs->regs[29] = task->thread.reg29; - regs->regs[31] = 0; - regs->cp0_epc = task->thread.reg31; - } else { - if (!task) - task = current; - prepare_frametrace(regs); - } - - save_context_stack(trace, task, regs); + prepare_frametrace(regs); + save_context_stack(trace, regs); } diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 26e1a7e78d1..9dd5a2df8ea 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c @@ -13,7 +13,6 @@ #include <linux/linkage.h> #include <linux/mm.h> #include <linux/smp.h> -#include <linux/smp_lock.h> #include <linux/mman.h> #include <linux/ptrace.h> #include <linux/sched.h> diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index e5e56bd498d..d48d1d5bea0 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -199,6 +199,35 @@ int (*perf_irq)(void) = null_perf_irq; EXPORT_SYMBOL(null_perf_irq); EXPORT_SYMBOL(perf_irq); +/* + * Timer interrupt + */ +int cp0_compare_irq; + +/* + * Performance counter IRQ or -1 if shared with timer + */ +int cp0_perfcount_irq; +EXPORT_SYMBOL_GPL(cp0_perfcount_irq); + +/* + * Possibly handle a performance counter interrupt. + * Return true if the timer interrupt should not be checked + */ +static inline int handle_perf_irq (int r2) +{ + /* + * The performance counter overflow interrupt may be shared with the + * timer interrupt (cp0_perfcount_irq < 0). If it is and a + * performance counter has overflowed (perf_irq() == IRQ_HANDLED) + * and we can't reliably determine if a counter interrupt has also + * happened (!r2) then don't check for a timer interrupt. + */ + return (cp0_perfcount_irq < 0) && + perf_irq() == IRQ_HANDLED && + !r2; +} + asmlinkage void ll_timer_interrupt(int irq) { int r2 = cpu_has_mips_r2; @@ -206,19 +235,13 @@ asmlinkage void ll_timer_interrupt(int irq) irq_enter(); kstat_this_cpu.irqs[irq]++; - /* - * Suckage alert: - * Before R2 of the architecture there was no way to see if a - * performance counter interrupt was pending, so we have to run the - * performance counter interrupt handler anyway. - */ - if (!r2 || (read_c0_cause() & (1 << 26))) - if (perf_irq()) - goto out; + if (handle_perf_irq(r2)) + goto out; - /* we keep interrupt disabled all the time */ - if (!r2 || (read_c0_cause() & (1 << 30))) - timer_interrupt(irq, NULL); + if (r2 && ((read_c0_cause() & (1 << 30)) == 0)) + goto out; + + timer_interrupt(irq, NULL); out: irq_exit(); @@ -258,7 +281,7 @@ unsigned int mips_hpt_frequency; static struct irqaction timer_irqaction = { .handler = timer_interrupt, - .flags = IRQF_DISABLED, + .flags = IRQF_DISABLED | IRQF_PERCPU, .name = "timer", }; @@ -306,7 +329,7 @@ static unsigned int __init calibrate_hpt(void) struct clocksource clocksource_mips = { .name = "MIPS", - .mask = 0xffffffff, + .mask = CLOCKSOURCE_MASK(32), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 493cb29b8a4..b1233644fcc 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -11,12 +11,12 @@ * Copyright (C) 2000, 01 MIPS Technologies, Inc. * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/mm.h> #include <linux/module.h> #include <linux/sched.h> #include <linux/smp.h> -#include <linux/smp_lock.h> #include <linux/spinlock.h> #include <linux/kallsyms.h> #include <linux/bootmem.h> @@ -928,12 +928,6 @@ asmlinkage void do_reserved(struct pt_regs *regs) (regs->cp0_cause & 0x7f) >> 2); } -asmlinkage void do_default_vi(struct pt_regs *regs) -{ - show_regs(regs); - panic("Caught unexpected vectored interrupt."); -} - /* * Some MIPS CPUs can enable/disable for cache parity detection, but do * it different ways. @@ -1129,7 +1123,13 @@ void mips_srs_free(int set) clear_bit(set, &sr->sr_allocated); } -static void *set_vi_srs_handler(int n, void *addr, int srs) +static asmlinkage void do_default_vi(void) +{ + show_regs(get_irq_regs()); + panic("Caught unexpected vectored interrupt."); +} + +static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs) { unsigned long handler; unsigned long old_handler = vi_handlers[n]; @@ -1191,8 +1191,8 @@ static void *set_vi_srs_handler(int n, void *addr, int srs) memcpy (b, &except_vec_vi, handler_len); #ifdef CONFIG_MIPS_MT_SMTC - if (n > 7) - printk("Vector index %d exceeds SMTC maximum\n", n); + BUG_ON(n > 7); /* Vector index %d exceeds SMTC maximum. */ + w = (u32 *)(b + mori_offset); *w = (*w & 0xffff0000) | (0x100 << n); #endif /* CONFIG_MIPS_MT_SMTC */ @@ -1218,7 +1218,7 @@ static void *set_vi_srs_handler(int n, void *addr, int srs) return (void *)old_handler; } -void *set_vi_handler(int n, void *addr) +void *set_vi_handler(int n, vi_handler_t addr) { return set_vi_srs_handler(n, addr, 0); } @@ -1350,9 +1350,6 @@ void __init per_cpu_trap_init(void) if (!secondaryTC) { #endif /* CONFIG_MIPS_MT_SMTC */ - /* - * Interrupt handling. - */ if (cpu_has_veic || cpu_has_vint) { write_c0_ebase (ebase); /* Setting vector spacing enables EI/VI mode */ @@ -1366,6 +1363,23 @@ void __init per_cpu_trap_init(void) } else set_c0_cause(CAUSEF_IV); } + + /* + * Before R2 both interrupt numbers were fixed to 7, so on R2 only: + * + * o read IntCtl.IPTI to determine the timer interrupt + * o read IntCtl.IPPCI to determine the performance counter interrupt + */ + if (cpu_has_mips_r2) { + cp0_compare_irq = (read_c0_intctl () >> 29) & 7; + cp0_perfcount_irq = -1; + } else { + cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; + cp0_perfcount_irq = (read_c0_intctl () >> 26) & 7; + if (cp0_perfcount_irq != cp0_compare_irq) + cp0_perfcount_irq = -1; + } + #ifdef CONFIG_MIPS_MT_SMTC } #endif /* CONFIG_MIPS_MT_SMTC */ @@ -1384,6 +1398,13 @@ void __init per_cpu_trap_init(void) cpu_cache_init(); tlb_init(); #ifdef CONFIG_MIPS_MT_SMTC + } else if (!secondaryTC) { + /* + * First TC in non-boot VPE must do subset of tlb_init() + * for MMU countrol registers. + */ + write_c0_pagemask(PM_DEFAULT_MASK); + write_c0_wired(0); } #endif /* CONFIG_MIPS_MT_SMTC */ } @@ -1532,8 +1553,7 @@ void __init trap_init(void) if (cpu_has_mipsmt) set_except_vector(25, handle_mt); - if (cpu_has_dsp) - set_except_vector(26, handle_dsp); + set_except_vector(26, handle_dsp); if (cpu_has_vce) /* Special exception: R4[04]00 uses also the divec space. */ diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index 24b7b053cfe..18c4a3c45a3 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c @@ -76,8 +76,7 @@ #include <linux/module.h> #include <linux/signal.h> #include <linux/smp.h> -#include <linux/smp_lock.h> - +#include <linux/sched.h> #include <asm/asm.h> #include <asm/branch.h> #include <asm/byteorder.h> diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index 043f637e3d1..9b9992cd562 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S @@ -27,7 +27,7 @@ SECTIONS /* read-only */ _text = .; /* Text and read-only data */ .text : { - *(.text) + TEXT_TEXT SCHED_TEXT LOCK_TEXT *(.fixup) @@ -62,7 +62,7 @@ SECTIONS . = ALIGN(_PAGE_SIZE); *(.data.init_task) - *(.data) + DATA_DATA CONSTRUCTORS } |