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-rw-r--r--arch/mips/kernel/apm.c1
-rw-r--r--arch/mips/kernel/cpu-probe.c6
-rw-r--r--arch/mips/kernel/entry.S15
-rw-r--r--arch/mips/kernel/gdb-low.S2
-rw-r--r--arch/mips/kernel/genex.S8
-rw-r--r--arch/mips/kernel/head.S3
-rw-r--r--arch/mips/kernel/i8259.c2
-rw-r--r--arch/mips/kernel/irixelf.c2
-rw-r--r--arch/mips/kernel/irq-msc01.c4
-rw-r--r--arch/mips/kernel/irq-mv6434x.c2
-rw-r--r--arch/mips/kernel/irq-rm7000.c2
-rw-r--r--arch/mips/kernel/irq-rm9000.c4
-rw-r--r--arch/mips/kernel/irq.c2
-rw-r--r--arch/mips/kernel/irq_cpu.c4
-rw-r--r--arch/mips/kernel/mips-mt.c1
-rw-r--r--arch/mips/kernel/scall32-o32.S17
-rw-r--r--arch/mips/kernel/scall64-64.S4
-rw-r--r--arch/mips/kernel/scall64-n32.S4
-rw-r--r--arch/mips/kernel/scall64-o32.S4
-rw-r--r--arch/mips/kernel/setup.c2
-rw-r--r--arch/mips/kernel/smp.c35
-rw-r--r--arch/mips/kernel/smtc-asm.S1
-rw-r--r--arch/mips/kernel/smtc.c60
-rw-r--r--arch/mips/kernel/time.c5
-rw-r--r--arch/mips/kernel/traps.c24
-rw-r--r--arch/mips/kernel/vpe.c1
26 files changed, 144 insertions, 71 deletions
diff --git a/arch/mips/kernel/apm.c b/arch/mips/kernel/apm.c
index 7bdbcd811b5..528e731049c 100644
--- a/arch/mips/kernel/apm.c
+++ b/arch/mips/kernel/apm.c
@@ -10,7 +10,6 @@
* [This document is available from Microsoft at:
* http://www.microsoft.com/hwdev/busbios/amp_12.htm]
*/
-#include <linux/config.h>
#include <linux/module.h>
#include <linux/poll.h>
#include <linux/timer.h>
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index ba08f055feb..aa2caa67299 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -459,7 +459,7 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
isa = (config0 & MIPS_CONF_AT) >> 13;
switch (isa) {
case 0:
- switch ((config0 >> 10) & 7) {
+ switch ((config0 & MIPS_CONF_AR) >> 10) {
case 0:
c->isa_level = MIPS_CPU_ISA_M32R1;
break;
@@ -471,7 +471,7 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
}
break;
case 2:
- switch ((config0 >> 10) & 7) {
+ switch ((config0 & MIPS_CONF_AR) >> 10) {
case 0:
c->isa_level = MIPS_CPU_ISA_M64R1;
break;
@@ -548,7 +548,7 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
return config3 & MIPS_CONF_M;
}
-static inline void decode_configs(struct cpuinfo_mips *c)
+static void __init decode_configs(struct cpuinfo_mips *c)
{
/* MIPS32 or MIPS64 compliant CPU. */
c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER |
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 01e7fa86aa4..766655f3525 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -113,6 +113,21 @@ FEXPORT(restore_all) # restore full frame
RESTORE_AT
RESTORE_STATIC
FEXPORT(restore_partial) # restore partial frame
+#ifdef CONFIG_TRACE_IRQFLAGS
+ SAVE_STATIC
+ SAVE_AT
+ SAVE_TEMP
+ LONG_L v0, PT_STATUS(sp)
+ and v0, 1
+ beqz v0, 1f
+ jal trace_hardirqs_on
+ b 2f
+1: jal trace_hardirqs_off
+2:
+ RESTORE_TEMP
+ RESTORE_AT
+ RESTORE_STATIC
+#endif
RESTORE_SOME
RESTORE_SP_AND_RET
.set at
diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S
index 666bc9014cb..2c446063636 100644
--- a/arch/mips/kernel/gdb-low.S
+++ b/arch/mips/kernel/gdb-low.S
@@ -7,6 +7,7 @@
#include <asm/asm.h>
#include <asm/errno.h>
+#include <asm/irqflags.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
@@ -120,6 +121,7 @@
LONG_S $31, GDB_FR_REG31(sp)
CLI /* disable interrupts */
+ TRACE_IRQS_OFF
/*
* Followed by the floating point registers
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index 5254a2222d2..37fda3dcdfc 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -13,6 +13,7 @@
#include <asm/asm.h>
#include <asm/asmmacro.h>
#include <asm/cacheops.h>
+#include <asm/irqflags.h>
#include <asm/regdef.h>
#include <asm/fpregdef.h>
#include <asm/mipsregs.h>
@@ -128,6 +129,7 @@ handle_vcei:
NESTED(handle_int, PT_SIZE, sp)
SAVE_ALL
CLI
+ TRACE_IRQS_OFF
PTR_LA ra, ret_from_irq
move a0, sp
@@ -216,6 +218,7 @@ NESTED(except_vec_vi_handler, 0, sp)
_ehb
#endif /* CONFIG_MIPS_MT_SMTC */
CLI
+ TRACE_IRQS_OFF
move a0, sp
jalr v0
j ret_from_irq
@@ -288,11 +291,13 @@ NESTED(nmi_handler, PT_SIZE, sp)
.endm
.macro __build_clear_sti
+ TRACE_IRQS_ON
STI
.endm
.macro __build_clear_cli
CLI
+ TRACE_IRQS_OFF
.endm
.macro __build_clear_fpe
@@ -300,6 +305,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
li a2, ~(0x3f << 12)
and a2, a1
ctc1 a2, fcr31
+ TRACE_IRQS_ON
STI
.endm
@@ -365,7 +371,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
BUILD_HANDLER mdmx mdmx sti silent /* #22 */
BUILD_HANDLER watch watch sti verbose /* #23 */
BUILD_HANDLER mcheck mcheck cli verbose /* #24 */
- BUILD_HANDLER mt mt sti verbose /* #25 */
+ BUILD_HANDLER mt mt sti silent /* #25 */
BUILD_HANDLER dsp dsp sti silent /* #26 */
BUILD_HANDLER reserved reserved sti verbose /* others */
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index 476c1eb33c9..8c6db0fc72f 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -5,7 +5,7 @@
*
* Copyright (C) 1994, 1995 Waldorf Electronics
* Written by Ralf Baechle and Andreas Busse
- * Copyright (C) 1994, 95, 96, 97, 98, 99, 2003 Ralf Baechle
+ * Copyright (C) 1994 - 99, 2003, 06 Ralf Baechle
* Copyright (C) 1996 Paul M. Antoine
* Modified for DECStation and hence R3000 support by Paul M. Antoine
* Further modifications by David S. Miller and Harald Koerfgen
@@ -18,6 +18,7 @@
#include <asm/asm.h>
#include <asm/asmmacro.h>
+#include <asm/irqflags.h>
#include <asm/regdef.h>
#include <asm/page.h>
#include <asm/mipsregs.h>
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 91ffb1233ca..ea36c8e8852 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -51,7 +51,7 @@ static unsigned int startup_8259A_irq(unsigned int irq)
return 0; /* never anything pending */
}
-static struct hw_interrupt_type i8259A_irq_type = {
+static struct irq_chip i8259A_irq_type = {
.typename = "XT-PIC",
.startup = startup_8259A_irq,
.shutdown = shutdown_8259A_irq,
diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c
index 10d3644e360..ab12c8f0151 100644
--- a/arch/mips/kernel/irixelf.c
+++ b/arch/mips/kernel/irixelf.c
@@ -999,8 +999,6 @@ static inline int maydump(struct vm_area_struct *vma)
return 1;
}
-#define roundup(x, y) ((((x)+((y)-1))/(y))*(y))
-
/* An ELF note in memory. */
struct memelfnote
{
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index f8cd1ac64d8..63dfeb41796 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -137,7 +137,7 @@ msc_bind_eic_interrupt (unsigned int irq, unsigned int set)
#define shutdown_msc_irq disable_msc_irq
-struct hw_interrupt_type msc_levelirq_type = {
+struct irq_chip msc_levelirq_type = {
.typename = "SOC-it-Level",
.startup = startup_msc_irq,
.shutdown = shutdown_msc_irq,
@@ -147,7 +147,7 @@ struct hw_interrupt_type msc_levelirq_type = {
.end = end_msc_irq,
};
-struct hw_interrupt_type msc_edgeirq_type = {
+struct irq_chip msc_edgeirq_type = {
.typename = "SOC-it-Edge",
.startup =startup_msc_irq,
.shutdown = shutdown_msc_irq,
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index f9c763a6554..b117e64da64 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -136,7 +136,7 @@ void ll_mv64340_irq(struct pt_regs *regs)
#define shutdown_mv64340_irq disable_mv64340_irq
-struct hw_interrupt_type mv64340_irq_type = {
+struct irq_chip mv64340_irq_type = {
.typename = "MV-64340",
.startup = startup_mv64340_irq,
.shutdown = shutdown_mv64340_irq,
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index 121da385a94..6b54c7109e2 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -71,7 +71,7 @@ static void rm7k_cpu_irq_end(unsigned int irq)
unmask_rm7k_irq(irq);
}
-static hw_irq_controller rm7k_irq_controller = {
+static struct irq_chip rm7k_irq_controller = {
.typename = "RM7000",
.startup = rm7k_cpu_irq_startup,
.shutdown = rm7k_cpu_irq_shutdown,
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index 25109c103e4..62f011ba97a 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -105,7 +105,7 @@ static void rm9k_cpu_irq_end(unsigned int irq)
unmask_rm9k_irq(irq);
}
-static hw_irq_controller rm9k_irq_controller = {
+static struct irq_chip rm9k_irq_controller = {
.typename = "RM9000",
.startup = rm9k_cpu_irq_startup,
.shutdown = rm9k_cpu_irq_shutdown,
@@ -115,7 +115,7 @@ static hw_irq_controller rm9k_irq_controller = {
.end = rm9k_cpu_irq_end,
};
-static hw_irq_controller rm9k_perfcounter_irq = {
+static struct irq_chip rm9k_perfcounter_irq = {
.typename = "RM9000",
.startup = rm9k_perfcounter_irq_startup,
.shutdown = rm9k_perfcounter_irq_shutdown,
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index cde5e5afa17..d955aaefbb8 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -136,7 +136,7 @@ void __init init_IRQ(void)
irq_desc[i].status = IRQ_DISABLED;
irq_desc[i].action = NULL;
irq_desc[i].depth = 1;
- irq_desc[i].chip = &no_irq_type;
+ irq_desc[i].chip = &no_irq_chip;
spin_lock_init(&irq_desc[i].lock);
#ifdef CONFIG_MIPS_MT_SMTC
irq_hwmask[i] = 0;
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index 0e455a8ad86..9bb21c7f214 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -94,7 +94,7 @@ static void mips_cpu_irq_end(unsigned int irq)
unmask_mips_irq(irq);
}
-static hw_irq_controller mips_cpu_irq_controller = {
+static struct irq_chip mips_cpu_irq_controller = {
.typename = "MIPS",
.startup = mips_cpu_irq_startup,
.shutdown = mips_cpu_irq_shutdown,
@@ -140,7 +140,7 @@ static void mips_mt_cpu_irq_ack(unsigned int irq)
#define mips_mt_cpu_irq_end mips_cpu_irq_end
-static hw_irq_controller mips_mt_cpu_irq_controller = {
+static struct irq_chip mips_mt_cpu_irq_controller = {
.typename = "MIPS",
.startup = mips_mt_cpu_irq_startup,
.shutdown = mips_mt_cpu_irq_shutdown,
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c
index 4dcc39f4295..c1373a6e668 100644
--- a/arch/mips/kernel/mips-mt.c
+++ b/arch/mips/kernel/mips-mt.c
@@ -7,6 +7,7 @@
#include <linux/sched.h>
#include <linux/cpumask.h>
#include <linux/interrupt.h>
+#include <linux/security.h>
#include <asm/cpu.h>
#include <asm/processor.h>
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 8f8101f878c..ba1bcd83c7d 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -3,13 +3,14 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (C) 1995, 96, 97, 98, 99, 2000, 01, 02 by Ralf Baechle
+ * Copyright (C) 1995-99, 2000- 02, 06 Ralf Baechle <ralf@linux-mips.org>
* Copyright (C) 2001 MIPS Technologies, Inc.
* Copyright (C) 2004 Thiemo Seufer
*/
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
+#include <asm/irqflags.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
@@ -27,6 +28,18 @@
NESTED(handle_sys, PT_SIZE, sp)
.set noat
SAVE_SOME
+#ifdef CONFIG_TRACE_IRQFLAGS
+ TRACE_IRQS_ON
+#ifdef CONFIG_64BIT
+ LONG_L $8, PT_R8(sp)
+ LONG_L $9, PT_R9(sp)
+#endif
+ LONG_L $7, PT_R7(sp)
+ LONG_L $6, PT_R6(sp)
+ LONG_L $5, PT_R5(sp)
+ LONG_L $4, PT_R4(sp)
+ LONG_L $2, PT_R2(sp)
+#endif
STI
.set at
@@ -647,6 +660,8 @@ einval: li v0, -EINVAL
sys sys_splice 4
sys sys_sync_file_range 7 /* 4305 */
sys sys_tee 4
+ sys sys_vmsplice 4
+ sys sys_move_pages 6
.endm
/* We pre-compute the number of _instruction_ bytes needed to
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index b4a34a625a2..939e172db95 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -10,6 +10,7 @@
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
+#include <asm/irqflags.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
@@ -33,6 +34,7 @@ NESTED(handle_sys64, PT_SIZE, sp)
*/
.set noat
SAVE_SOME
+ TRACE_IRQS_ON
STI
.set at
#endif
@@ -462,3 +464,5 @@ sys_call_table:
PTR sys_splice
PTR sys_sync_file_range
PTR sys_tee /* 5265 */
+ PTR sys_vmsplice
+ PTR sys_move_pages
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index df8c4f8ccd6..98abbc5a9f1 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -10,6 +10,7 @@
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
+#include <asm/irqflags.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
@@ -32,6 +33,7 @@ NESTED(handle_sysn32, PT_SIZE, sp)
#ifndef CONFIG_MIPS32_O32
.set noat
SAVE_SOME
+ TRACE_IRQS_ON
STI
.set at
#endif
@@ -388,3 +390,5 @@ EXPORT(sysn32_call_table)
PTR sys_splice
PTR sys_sync_file_range
PTR sys_tee
+ PTR sys_vmsplice /* 6271 */
+ PTR sys_move_pages
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index f04fe4f085c..505c9ee5400 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -16,6 +16,7 @@
#include <linux/errno.h>
#include <asm/asm.h>
#include <asm/asmmacro.h>
+#include <asm/irqflags.h>
#include <asm/mipsregs.h>
#include <asm/regdef.h>
#include <asm/stackframe.h>
@@ -27,6 +28,7 @@
NESTED(handle_sys, PT_SIZE, sp)
.set noat
SAVE_SOME
+ TRACE_IRQS_ON
STI
.set at
ld t1, PT_EPC(sp) # skip syscall on return
@@ -510,4 +512,6 @@ sys_call_table:
PTR sys_splice
PTR sys32_sync_file_range /* 4305 */
PTR sys_tee
+ PTR sys_vmsplice
+ PTR compat_sys_move_pages
.size sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index 5edd8d4bb66..8c2b596a136 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -24,7 +24,7 @@
#include <linux/user.h>
#include <linux/utsname.h>
#include <linux/a.out.h>
-#include <linux/tty.h>
+#include <linux/screen_info.h>
#include <linux/bootmem.h>
#include <linux/initrd.h>
#include <linux/major.h>
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 9096a5ea422..221895802dc 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -319,6 +319,32 @@ static void flush_tlb_mm_ipi(void *mm)
}
/*
+ * Special Variant of smp_call_function for use by TLB functions:
+ *
+ * o No return value
+ * o collapses to normal function call on UP kernels
+ * o collapses to normal function call on systems with a single shared
+ * primary cache.
+ * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
+ */
+static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
+{
+#ifndef CONFIG_MIPS_MT_SMTC
+ smp_call_function(func, info, 1, 1);
+#endif
+}
+
+static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
+{
+ preempt_disable();
+
+ smp_on_other_tlbs(func, info);
+ func(info);
+
+ preempt_enable();
+}
+
+/*
* The following tlb flush calls are invoked when old translations are
* being torn down, or pte attributes are changing. For single threaded
* address spaces, a new context is obtained on the current cpu, and tlb
@@ -336,7 +362,7 @@ void flush_tlb_mm(struct mm_struct *mm)
preempt_disable();
if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
- smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1, 1);
+ smp_on_other_tlbs(flush_tlb_mm_ipi, (void *)mm);
} else {
int i;
for (i = 0; i < num_online_cpus(); i++)
@@ -372,7 +398,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned l
fd.vma = vma;
fd.addr1 = start;
fd.addr2 = end;
- smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1, 1);
+ smp_on_other_tlbs(flush_tlb_range_ipi, (void *)&fd);
} else {
int i;
for (i = 0; i < num_online_cpus(); i++)
@@ -414,7 +440,7 @@ void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
fd.vma = vma;
fd.addr1 = page;
- smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1, 1);
+ smp_on_other_tlbs(flush_tlb_page_ipi, (void *)&fd);
} else {
int i;
for (i = 0; i < num_online_cpus(); i++)
@@ -434,8 +460,7 @@ static void flush_tlb_one_ipi(void *info)
void flush_tlb_one(unsigned long vaddr)
{
- smp_call_function(flush_tlb_one_ipi, (void *) vaddr, 1, 1);
- local_flush_tlb_one(vaddr);
+ smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
}
static DEFINE_PER_CPU(struct cpu, cpu_devices);
diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S
index 72c6d98f885..4cc3dea3661 100644
--- a/arch/mips/kernel/smtc-asm.S
+++ b/arch/mips/kernel/smtc-asm.S
@@ -96,6 +96,7 @@ FEXPORT(__smtc_ipi_vector)
/* Save all will redundantly recompute the SP, but use it for now */
SAVE_ALL
CLI
+ TRACE_IRQS_OFF
move a0,sp
/* Function to be invoked passed stack pad slot 5 */
lw t0,PT_PADSLOT5(sp)
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index a48d9e55308..604bcc5cb7c 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -127,7 +127,7 @@ static int __init stlb_disable(char *s)
static int __init asidmask_set(char *str)
{
get_option(&str, &asidmask);
- switch(asidmask) {
+ switch (asidmask) {
case 0x1:
case 0x3:
case 0x7:
@@ -249,7 +249,7 @@ void smtc_configure_tlb(void)
/*
* Only count if the MMU Type indicated is TLB
*/
- if(((read_vpe_c0_config() & MIPS_CONF_MT) >> 7) == 1) {
+ if (((read_vpe_c0_config() & MIPS_CONF_MT) >> 7) == 1) {
config1val = read_vpe_c0_config1();
tlbsiz += ((config1val >> 25) & 0x3f) + 1;
}
@@ -500,7 +500,7 @@ void mipsmt_prepare_cpus(void)
/* Set up coprocessor affinity CPU mask(s) */
for (tc = 0; tc < ntc; tc++) {
- if(cpu_data[tc].options & MIPS_CPU_FPU)
+ if (cpu_data[tc].options & MIPS_CPU_FPU)
cpu_set(tc, mt_fpu_cpumask);
}
@@ -577,13 +577,13 @@ void smtc_init_secondary(void)
{
/*
* Start timer on secondary VPEs if necessary.
- * mips_timer_setup should already have been invoked by init/main
+ * plat_timer_setup has already have been invoked by init/main
* on "boot" TC. Like per_cpu_trap_init() hack, this assumes that
* SMTC init code assigns TCs consdecutively and in ascending order
* to across available VPEs.
*/
- if(((read_c0_tcbind() & TCBIND_CURTC) != 0)
- && ((read_c0_tcbind() & TCBIND_CURVPE)
+ if (((read_c0_tcbind() & TCBIND_CURTC) != 0) &&
+ ((read_c0_tcbind() & TCBIND_CURVPE)
!= cpu_data[smp_processor_id() - 1].vpe_id)){
write_c0_compare (read_c0_count() + mips_hpt_frequency/HZ);
}
@@ -757,8 +757,8 @@ void smtc_send_ipi(int cpu, int type, unsigned int action)
write_tc_c0_tchalt(0);
UNLOCK_CORE_PRA();
/* Try to reduce redundant timer interrupt messages */
- if(type == SMTC_CLOCK_TICK) {
- if(atomic_postincrement(&ipi_timer_latch[cpu])!=0) {
+ if (type == SMTC_CLOCK_TICK) {
+ if (atomic_postincrement(&ipi_timer_latch[cpu])!=0){
smtc_ipi_nq(&freeIPIq, pipi);
return;
}
@@ -797,7 +797,7 @@ void post_direct_ipi(int cpu, struct smtc_ipi *pipi)
* CU bit of Status is indicator that TC was
* already running on a kernel stack...
*/
- if(tcstatus & ST0_CU0) {
+ if (tcstatus & ST0_CU0) {
/* Note that this "- 1" is pointer arithmetic */
kstack = ((struct pt_regs *)read_tc_gpr_sp()) - 1;
} else {
@@ -840,31 +840,31 @@ void ipi_decode(struct pt_regs *regs, struct smtc_ipi *pipi)
smtc_ipi_nq(&freeIPIq, pipi);
switch (type_copy) {
- case SMTC_CLOCK_TICK:
- /* Invoke Clock "Interrupt" */
- ipi_timer_latch[dest_copy] = 0;
+ case SMTC_CLOCK_TICK:
+ /* Invoke Clock "Interrupt" */
+ ipi_timer_latch[dest_copy] = 0;
#ifdef SMTC_IDLE_HOOK_DEBUG
- clock_hang_reported[dest_copy] = 0;
+ clock_hang_reported[dest_copy] = 0;
#endif /* SMTC_IDLE_HOOK_DEBUG */
- local_timer_interrupt(0, NULL, regs);
+ local_timer_interrupt(0, NULL, regs);
+ break;
+ case LINUX_SMP_IPI:
+ switch ((int)arg_copy) {
+ case SMP_RESCHEDULE_YOURSELF:
+ ipi_resched_interrupt(regs);
break;
- case LINUX_SMP_IPI:
- switch ((int)arg_copy) {
- case SMP_RESCHEDULE_YOURSELF:
- ipi_resched_interrupt(regs);
- break;
- case SMP_CALL_FUNCTION:
- ipi_call_interrupt(regs);
- break;
- default:
- printk("Impossible SMTC IPI Argument 0x%x\n",
- (int)arg_copy);
- break;
- }
+ case SMP_CALL_FUNCTION:
+ ipi_call_interrupt(regs);
break;
default:
- printk("Impossible SMTC IPI Type 0x%x\n", type_copy);
+ printk("Impossible SMTC IPI Argument 0x%x\n",
+ (int)arg_copy);
break;
+ }
+ break;
+ default:
+ printk("Impossible SMTC IPI Type 0x%x\n", type_copy);
+ break;
}
}
@@ -879,7 +879,7 @@ void deferred_smtc_ipi(struct pt_regs *regs)
* Test is not atomic, but much faster than a dequeue,
* and the vast majority of invocations will have a null queue.
*/
- if(IPIQ[q].head != NULL) {
+ if (IPIQ[q].head != NULL) {
while((pipi = smtc_ipi_dq(&IPIQ[q])) != NULL) {
/* ipi_decode() should be called with interrupts off */
local_irq_save(flags);
@@ -1254,7 +1254,7 @@ void smtc_flush_tlb_asid(unsigned long asid)
tlb_read();
ehb();
ehi = read_c0_entryhi();
- if((ehi & ASID_MASK) == asid) {
+ if ((ehi & ASID_MASK) == asid) {
/*
* Invalidate only entries with specified ASID,
* makiing sure all entries differ.
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 2393c11d5a2..170cb67f4ed 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -566,14 +566,13 @@ asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
* 2) setup xtime based on rtc_mips_get_time().
* 3) choose a appropriate gettimeoffset routine.
* 4) calculate a couple of cached variables for later usage
- * 5) board_timer_setup() -
+ * 5) plat_timer_setup() -
* a) (optional) over-write any choices made above by time_init().
* b) machine specific code should setup the timer irqaction.
* c) enable the timer interrupt
*/
void (*board_time_init)(void);
-void (*board_timer_setup)(struct irqaction *irq);
unsigned int mips_hpt_frequency;
@@ -718,7 +717,7 @@ void __init time_init(void)
* to be NULL function so that we are sure the high-level code
* is not invoked accidentally.
*/
- board_timer_setup(&timer_irqaction);
+ plat_timer_setup(&timer_irqaction);
}
#define FEBRUARY 2
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 8b95eca9ac7..954a198494e 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -569,6 +569,8 @@ asmlinkage void do_ov(struct pt_regs *regs)
*/
asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
{
+ die_if_kernel("FP exception in kernel code", regs);
+
if (fcr31 & FPU_CSR_UNI_X) {
int sig;
@@ -847,31 +849,29 @@ asmlinkage void do_mt(struct pt_regs *regs)
{
int subcode;
- die_if_kernel("MIPS MT Thread exception in kernel", regs);
-
subcode = (read_vpe_c0_vpecontrol() & VPECONTROL_EXCPT)
>> VPECONTROL_EXCPT_SHIFT;
switch (subcode) {
case 0:
- printk(KERN_ERR "Thread Underflow\n");
+ printk(KERN_DEBUG "Thread Underflow\n");
break;
case 1:
- printk(KERN_ERR "Thread Overflow\n");
+ printk(KERN_DEBUG "Thread Overflow\n");
break;
case 2:
- printk(KERN_ERR "Invalid YIELD Qualifier\n");
+ printk(KERN_DEBUG "Invalid YIELD Qualifier\n");
break;
case 3:
- printk(KERN_ERR "Gating Storage Exception\n");
+ printk(KERN_DEBUG "Gating Storage Exception\n");
break;
case 4:
- printk(KERN_ERR "YIELD Scheduler Exception\n");
+ printk(KERN_DEBUG "YIELD Scheduler Exception\n");
break;
case 5:
- printk(KERN_ERR "Gating Storage Schedulier Exception\n");
+ printk(KERN_DEBUG "Gating Storage Schedulier Exception\n");
break;
default:
- printk(KERN_ERR "*** UNKNOWN THREAD EXCEPTION %d ***\n",
+ printk(KERN_DEBUG "*** UNKNOWN THREAD EXCEPTION %d ***\n",
subcode);
break;
}
@@ -980,10 +980,10 @@ void ejtag_exception_handler(struct pt_regs *regs)
unsigned long depc, old_epc;
unsigned int debug;
- printk("SDBBP EJTAG debug exception - not handled yet, just ignored!\n");
+ printk(KERN_DEBUG "SDBBP EJTAG debug exception - not handled yet, just ignored!\n");
depc = read_c0_depc();
debug = read_c0_debug();
- printk("c0_depc = %0*lx, DEBUG = %08x\n", field, depc, debug);
+ printk(KERN_DEBUG "c0_depc = %0*lx, DEBUG = %08x\n", field, depc, debug);
if (debug & 0x80000000) {
/*
* In branch delay slot.
@@ -1001,7 +1001,7 @@ void ejtag_exception_handler(struct pt_regs *regs)
write_c0_depc(depc);
#if 0
- printk("\n\n----- Enable EJTAG single stepping ----\n\n");
+ printk(KERN_DEBUG "\n\n----- Enable EJTAG single stepping ----\n\n");
write_c0_debug(debug | 0x100);
#endif
}
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c
index 85d7df7b18e..9ee0ec2cd06 100644
--- a/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@ -28,7 +28,6 @@
* i.e cat spapp >/dev/vpe1.
*/
-#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/fs.h>