diff options
Diffstat (limited to 'arch/mips/loongson/common')
| -rw-r--r-- | arch/mips/loongson/common/Makefile | 5 | ||||
| -rw-r--r-- | arch/mips/loongson/common/dma-swiotlb.c | 136 | ||||
| -rw-r--r-- | arch/mips/loongson/common/env.c | 67 | ||||
| -rw-r--r-- | arch/mips/loongson/common/init.c | 11 | ||||
| -rw-r--r-- | arch/mips/loongson/common/machtype.c | 4 | ||||
| -rw-r--r-- | arch/mips/loongson/common/mem.c | 42 | ||||
| -rw-r--r-- | arch/mips/loongson/common/pci.c | 6 | ||||
| -rw-r--r-- | arch/mips/loongson/common/reset.c | 21 | ||||
| -rw-r--r-- | arch/mips/loongson/common/serial.c | 26 | ||||
| -rw-r--r-- | arch/mips/loongson/common/setup.c | 8 | ||||
| -rw-r--r-- | arch/mips/loongson/common/uart_base.c | 9 |
11 files changed, 300 insertions, 35 deletions
diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile index 9e4484ccbb0..0bb9cc9dc62 100644 --- a/arch/mips/loongson/common/Makefile +++ b/arch/mips/loongson/common/Makefile @@ -26,3 +26,8 @@ obj-$(CONFIG_CS5536) += cs5536/ # obj-$(CONFIG_LOONGSON_SUSPEND) += pm.o + +# +# Big Memory (SWIOTLB) Support +# +obj-$(CONFIG_SWIOTLB) += dma-swiotlb.o diff --git a/arch/mips/loongson/common/dma-swiotlb.c b/arch/mips/loongson/common/dma-swiotlb.c new file mode 100644 index 00000000000..c2be01f9157 --- /dev/null +++ b/arch/mips/loongson/common/dma-swiotlb.c @@ -0,0 +1,136 @@ +#include <linux/mm.h> +#include <linux/init.h> +#include <linux/dma-mapping.h> +#include <linux/scatterlist.h> +#include <linux/swiotlb.h> +#include <linux/bootmem.h> + +#include <asm/bootinfo.h> +#include <boot_param.h> +#include <dma-coherence.h> + +static void *loongson_dma_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp, struct dma_attrs *attrs) +{ + void *ret; + + if (dma_alloc_from_coherent(dev, size, dma_handle, &ret)) + return ret; + + /* ignore region specifiers */ + gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); + +#ifdef CONFIG_ISA + if (dev == NULL) + gfp |= __GFP_DMA; + else +#endif +#ifdef CONFIG_ZONE_DMA + if (dev->coherent_dma_mask < DMA_BIT_MASK(32)) + gfp |= __GFP_DMA; + else +#endif +#ifdef CONFIG_ZONE_DMA32 + if (dev->coherent_dma_mask < DMA_BIT_MASK(40)) + gfp |= __GFP_DMA32; + else +#endif + ; + gfp |= __GFP_NORETRY; + + ret = swiotlb_alloc_coherent(dev, size, dma_handle, gfp); + mb(); + return ret; +} + +static void loongson_dma_free_coherent(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle, struct dma_attrs *attrs) +{ + int order = get_order(size); + + if (dma_release_from_coherent(dev, order, vaddr)) + return; + + swiotlb_free_coherent(dev, size, vaddr, dma_handle); +} + +static dma_addr_t loongson_dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, + enum dma_data_direction dir, + struct dma_attrs *attrs) +{ + dma_addr_t daddr = swiotlb_map_page(dev, page, offset, size, + dir, attrs); + mb(); + return daddr; +} + +static int loongson_dma_map_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction dir, + struct dma_attrs *attrs) +{ + int r = swiotlb_map_sg_attrs(dev, sg, nents, dir, NULL); + mb(); + + return r; +} + +static void loongson_dma_sync_single_for_device(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction dir) +{ + swiotlb_sync_single_for_device(dev, dma_handle, size, dir); + mb(); +} + +static void loongson_dma_sync_sg_for_device(struct device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction dir) +{ + swiotlb_sync_sg_for_device(dev, sg, nents, dir); + mb(); +} + +static int loongson_dma_set_mask(struct device *dev, u64 mask) +{ + if (mask > DMA_BIT_MASK(loongson_sysconf.dma_mask_bits)) { + *dev->dma_mask = DMA_BIT_MASK(loongson_sysconf.dma_mask_bits); + return -EIO; + } + + *dev->dma_mask = mask; + + return 0; +} + +dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) +{ + return paddr; +} + +phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr) +{ + return daddr; +} + +static struct dma_map_ops loongson_dma_map_ops = { + .alloc = loongson_dma_alloc_coherent, + .free = loongson_dma_free_coherent, + .map_page = loongson_dma_map_page, + .unmap_page = swiotlb_unmap_page, + .map_sg = loongson_dma_map_sg, + .unmap_sg = swiotlb_unmap_sg_attrs, + .sync_single_for_cpu = swiotlb_sync_single_for_cpu, + .sync_single_for_device = loongson_dma_sync_single_for_device, + .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, + .sync_sg_for_device = loongson_dma_sync_sg_for_device, + .mapping_error = swiotlb_dma_mapping_error, + .dma_supported = swiotlb_dma_supported, + .set_dma_mask = loongson_dma_set_mask +}; + +void __init plat_swiotlb_setup(void) +{ + swiotlb_init(1); + mips_dma_map_ops = &loongson_dma_map_ops; +} diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c index 0a18fcf2d37..0c543eae49b 100644 --- a/arch/mips/loongson/common/env.c +++ b/arch/mips/loongson/common/env.c @@ -18,29 +18,30 @@ * option) any later version. */ #include <linux/module.h> - #include <asm/bootinfo.h> - #include <loongson.h> +#include <boot_param.h> -unsigned long cpu_clock_freq; +u32 cpu_clock_freq; EXPORT_SYMBOL(cpu_clock_freq); -unsigned long memsize, highmemsize; +struct efi_memory_map_loongson *loongson_memmap; +struct loongson_system_configuration loongson_sysconf; #define parse_even_earlier(res, option, p) \ do { \ unsigned int tmp __maybe_unused; \ \ if (strncmp(option, (char *)p, strlen(option)) == 0) \ - tmp = strict_strtol((char *)p + strlen(option"="), 10, &res); \ + tmp = kstrtou32((char *)p + strlen(option"="), 10, &res); \ } while (0) void __init prom_init_env(void) { /* pmon passes arguments in 32bit pointers */ - int *_prom_envp; - unsigned long bus_clock; unsigned int processor_id; + +#ifndef CONFIG_LEFI_FIRMWARE_INTERFACE + int *_prom_envp; long l; /* firmware arguments are initialized in head.S */ @@ -48,7 +49,6 @@ void __init prom_init_env(void) l = (long)*_prom_envp; while (l != 0) { - parse_even_earlier(bus_clock, "busclock", l); parse_even_earlier(cpu_clock_freq, "cpuclock", l); parse_even_earlier(memsize, "memsize", l); parse_even_earlier(highmemsize, "highmemsize", l); @@ -57,8 +57,48 @@ void __init prom_init_env(void) } if (memsize == 0) memsize = 256; - if (bus_clock == 0) - bus_clock = 66000000; + pr_info("memsize=%u, highmemsize=%u\n", memsize, highmemsize); +#else + struct boot_params *boot_p; + struct loongson_params *loongson_p; + struct efi_cpuinfo_loongson *ecpu; + struct irq_source_routing_table *eirq_source; + + /* firmware arguments are initialized in head.S */ + boot_p = (struct boot_params *)fw_arg2; + loongson_p = &(boot_p->efi.smbios.lp); + + ecpu = (struct efi_cpuinfo_loongson *) + ((u64)loongson_p + loongson_p->cpu_offset); + eirq_source = (struct irq_source_routing_table *) + ((u64)loongson_p + loongson_p->irq_offset); + loongson_memmap = (struct efi_memory_map_loongson *) + ((u64)loongson_p + loongson_p->memory_offset); + + cpu_clock_freq = ecpu->cpu_clock_freq; + loongson_sysconf.cputype = ecpu->cputype; + loongson_sysconf.nr_cpus = ecpu->nr_cpus; + if (ecpu->nr_cpus > NR_CPUS || ecpu->nr_cpus == 0) + loongson_sysconf.nr_cpus = NR_CPUS; + + loongson_sysconf.pci_mem_start_addr = eirq_source->pci_mem_start_addr; + loongson_sysconf.pci_mem_end_addr = eirq_source->pci_mem_end_addr; + loongson_sysconf.pci_io_base = eirq_source->pci_io_start_addr; + loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits; + if (loongson_sysconf.dma_mask_bits < 32 || + loongson_sysconf.dma_mask_bits > 64) + loongson_sysconf.dma_mask_bits = 32; + + loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm; + loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown; + loongson_sysconf.suspend_addr = boot_p->reset_system.DoSuspend; + + loongson_sysconf.ht_control_base = 0x90000EFDFB000000; + loongson_sysconf.vgabios_addr = boot_p->efi.smbios.vga_bios; + pr_debug("Shutdown Addr: %llx, Restart Addr: %llx, VBIOS Addr: %llx\n", + loongson_sysconf.poweroff_addr, loongson_sysconf.restart_addr, + loongson_sysconf.vgabios_addr); +#endif if (cpu_clock_freq == 0) { processor_id = (¤t_cpu_data)->processor_id; switch (processor_id & PRID_REV_MASK) { @@ -68,12 +108,13 @@ void __init prom_init_env(void) case PRID_REV_LOONGSON2F: cpu_clock_freq = 797000000; break; + case PRID_REV_LOONGSON3A: + cpu_clock_freq = 900000000; + break; default: cpu_clock_freq = 100000000; break; } } - - pr_info("busclock=%ld, cpuclock=%ld, memsize=%ld, highmemsize=%ld\n", - bus_clock, cpu_clock_freq, memsize, highmemsize); + pr_info("CpuClock = %u\n", cpu_clock_freq); } diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c index ae7af1fd5d5..f37fe5413b7 100644 --- a/arch/mips/loongson/common/init.c +++ b/arch/mips/loongson/common/init.c @@ -9,6 +9,7 @@ */ #include <linux/bootmem.h> +#include <asm/smp-ops.h> #include <loongson.h> @@ -17,10 +18,6 @@ unsigned long __maybe_unused _loongson_addrwincfg_base; void __init prom_init(void) { - /* init base address of io space */ - set_io_port_base((unsigned long) - ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE)); - #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG _loongson_addrwincfg_base = (unsigned long) ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE); @@ -28,10 +25,16 @@ void __init prom_init(void) prom_init_cmdline(); prom_init_env(); + + /* init base address of io space */ + set_io_port_base((unsigned long) + ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE)); + prom_init_memory(); /*init the uart base address */ prom_init_uart_base(); + register_smp_ops(&loongson3_smp_ops); } void __init prom_free_prom_memory(void) diff --git a/arch/mips/loongson/common/machtype.c b/arch/mips/loongson/common/machtype.c index 4becd4f9ef2..1a4797984b8 100644 --- a/arch/mips/loongson/common/machtype.c +++ b/arch/mips/loongson/common/machtype.c @@ -27,6 +27,10 @@ static const char *system_types[] = { [MACH_DEXXON_GDIUM2F10] "dexxon-gdium-2f", [MACH_LEMOTE_NAS] "lemote-nas-2f", [MACH_LEMOTE_LL2F] "lemote-lynloong-2f", + [MACH_LEMOTE_A1004] "lemote-3a-notebook-a1004", + [MACH_LEMOTE_A1101] "lemote-3a-itx-a1101", + [MACH_LEMOTE_A1201] "lemote-2gq-notebook-a1201", + [MACH_LEMOTE_A1205] "lemote-2gq-aio-a1205", [MACH_LOONGSON_END] NULL, }; diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson/common/mem.c index 8626a42f5b9..b01d52473da 100644 --- a/arch/mips/loongson/common/mem.c +++ b/arch/mips/loongson/common/mem.c @@ -11,9 +11,14 @@ #include <asm/bootinfo.h> #include <loongson.h> +#include <boot_param.h> #include <mem.h> #include <pci.h> +#ifndef CONFIG_LEFI_FIRMWARE_INTERFACE + +u32 memsize, highmemsize; + void __init prom_init_memory(void) { add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); @@ -49,6 +54,43 @@ void __init prom_init_memory(void) #endif /* !CONFIG_64BIT */ } +#else /* CONFIG_LEFI_FIRMWARE_INTERFACE */ + +void __init prom_init_memory(void) +{ + int i; + u32 node_id; + u32 mem_type; + + /* parse memory information */ + for (i = 0; i < loongson_memmap->nr_map; i++) { + node_id = loongson_memmap->map[i].node_id; + mem_type = loongson_memmap->map[i].mem_type; + + if (node_id == 0) { + switch (mem_type) { + case SYSTEM_RAM_LOW: + add_memory_region(loongson_memmap->map[i].mem_start, + (u64)loongson_memmap->map[i].mem_size << 20, + BOOT_MEM_RAM); + break; + case SYSTEM_RAM_HIGH: + add_memory_region(loongson_memmap->map[i].mem_start, + (u64)loongson_memmap->map[i].mem_size << 20, + BOOT_MEM_RAM); + break; + case MEM_RESERVED: + add_memory_region(loongson_memmap->map[i].mem_start, + (u64)loongson_memmap->map[i].mem_size << 20, + BOOT_MEM_RESERVED); + break; + } + } + } +} + +#endif /* CONFIG_LEFI_FIRMWARE_INTERFACE */ + /* override of arch/mips/mm/cache.c: __uncached_access */ int __uncached_access(struct file *file, unsigned long addr) { diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson/common/pci.c index fa778445972..003ab4e618b 100644 --- a/arch/mips/loongson/common/pci.c +++ b/arch/mips/loongson/common/pci.c @@ -11,6 +11,7 @@ #include <pci.h> #include <loongson.h> +#include <boot_param.h> static struct resource loongson_pci_mem_resource = { .name = "pci memory space", @@ -82,7 +83,10 @@ static int __init pcibios_init(void) setup_pcimap(); loongson_pci_controller.io_map_base = mips_io_port_base; - +#ifdef CONFIG_LEFI_FIRMWARE_INTERFACE + loongson_pci_mem_resource.start = loongson_sysconf.pci_mem_start_addr; + loongson_pci_mem_resource.end = loongson_sysconf.pci_mem_end_addr; +#endif register_pci_controller(&loongson_pci_controller); return 0; diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c index 65bfbb5d06f..a60715e1130 100644 --- a/arch/mips/loongson/common/reset.c +++ b/arch/mips/loongson/common/reset.c @@ -16,6 +16,7 @@ #include <asm/reboot.h> #include <loongson.h> +#include <boot_param.h> static inline void loongson_reboot(void) { @@ -37,17 +38,37 @@ static inline void loongson_reboot(void) static void loongson_restart(char *command) { +#ifndef CONFIG_LEFI_FIRMWARE_INTERFACE /* do preparation for reboot */ mach_prepare_reboot(); /* reboot via jumping to boot base address */ loongson_reboot(); +#else + void (*fw_restart)(void) = (void *)loongson_sysconf.restart_addr; + + fw_restart(); + while (1) { + if (cpu_wait) + cpu_wait(); + } +#endif } static void loongson_poweroff(void) { +#ifndef CONFIG_LEFI_FIRMWARE_INTERFACE mach_prepare_shutdown(); unreachable(); +#else + void (*fw_poweroff)(void) = (void *)loongson_sysconf.poweroff_addr; + + fw_poweroff(); + while (1) { + if (cpu_wait) + cpu_wait(); + } +#endif } static void loongson_halt(void) diff --git a/arch/mips/loongson/common/serial.c b/arch/mips/loongson/common/serial.c index 5f2b78ae97c..bd2b7095b6d 100644 --- a/arch/mips/loongson/common/serial.c +++ b/arch/mips/loongson/common/serial.c @@ -19,19 +19,19 @@ #include <loongson.h> #include <machine.h> -#define PORT(int) \ +#define PORT(int, clk) \ { \ .irq = int, \ - .uartclk = 1843200, \ + .uartclk = clk, \ .iotype = UPIO_PORT, \ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \ .regshift = 0, \ } -#define PORT_M(int) \ +#define PORT_M(int, clk) \ { \ .irq = MIPS_CPU_IRQ_BASE + (int), \ - .uartclk = 3686400, \ + .uartclk = clk, \ .iotype = UPIO_MEM, \ .membase = (void __iomem *)NULL, \ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \ @@ -40,13 +40,17 @@ static struct plat_serial8250_port uart8250_data[][2] = { [MACH_LOONGSON_UNKNOWN] {}, - [MACH_LEMOTE_FL2E] {PORT(4), {} }, - [MACH_LEMOTE_FL2F] {PORT(3), {} }, - [MACH_LEMOTE_ML2F7] {PORT_M(3), {} }, - [MACH_LEMOTE_YL2F89] {PORT_M(3), {} }, - [MACH_DEXXON_GDIUM2F10] {PORT_M(3), {} }, - [MACH_LEMOTE_NAS] {PORT_M(3), {} }, - [MACH_LEMOTE_LL2F] {PORT(3), {} }, + [MACH_LEMOTE_FL2E] {PORT(4, 1843200), {} }, + [MACH_LEMOTE_FL2F] {PORT(3, 1843200), {} }, + [MACH_LEMOTE_ML2F7] {PORT_M(3, 3686400), {} }, + [MACH_LEMOTE_YL2F89] {PORT_M(3, 3686400), {} }, + [MACH_DEXXON_GDIUM2F10] {PORT_M(3, 3686400), {} }, + [MACH_LEMOTE_NAS] {PORT_M(3, 3686400), {} }, + [MACH_LEMOTE_LL2F] {PORT(3, 1843200), {} }, + [MACH_LEMOTE_A1004] {PORT_M(2, 33177600), {} }, + [MACH_LEMOTE_A1101] {PORT_M(2, 25000000), {} }, + [MACH_LEMOTE_A1201] {PORT_M(2, 25000000), {} }, + [MACH_LEMOTE_A1205] {PORT_M(2, 25000000), {} }, [MACH_LOONGSON_END] {}, }; diff --git a/arch/mips/loongson/common/setup.c b/arch/mips/loongson/common/setup.c index 8223f8acfd5..bb4ac922e47 100644 --- a/arch/mips/loongson/common/setup.c +++ b/arch/mips/loongson/common/setup.c @@ -18,9 +18,6 @@ #include <linux/screen_info.h> #endif -void (*__wbflush)(void); -EXPORT_SYMBOL(__wbflush); - static void wbflush_loongson(void) { asm(".set\tpush\n\t" @@ -32,10 +29,11 @@ static void wbflush_loongson(void) ".set mips0\n\t"); } +void (*__wbflush)(void) = wbflush_loongson; +EXPORT_SYMBOL(__wbflush); + void __init plat_mem_setup(void) { - __wbflush = wbflush_loongson; - #ifdef CONFIG_VT #if defined(CONFIG_VGA_CONSOLE) conswitchp = &vga_con; diff --git a/arch/mips/loongson/common/uart_base.c b/arch/mips/loongson/common/uart_base.c index e192ad021ed..1e1eeea73fd 100644 --- a/arch/mips/loongson/common/uart_base.c +++ b/arch/mips/loongson/common/uart_base.c @@ -35,9 +35,16 @@ void prom_init_loongson_uart_base(void) case MACH_DEXXON_GDIUM2F10: case MACH_LEMOTE_NAS: default: - /* The CPU provided serial port */ + /* The CPU provided serial port (LPC) */ loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8; break; + case MACH_LEMOTE_A1004: + case MACH_LEMOTE_A1101: + case MACH_LEMOTE_A1201: + case MACH_LEMOTE_A1205: + /* The CPU provided serial port (CPU) */ + loongson_uart_base = LOONGSON_REG_BASE + 0x1e0; + break; } _loongson_uart_base = |