diff options
Diffstat (limited to 'arch/mips/mipssim')
| -rw-r--r-- | arch/mips/mipssim/Makefile | 2 | ||||
| -rw-r--r-- | arch/mips/mipssim/sim_int.c | 2 | ||||
| -rw-r--r-- | arch/mips/mipssim/sim_mem.c | 4 | ||||
| -rw-r--r-- | arch/mips/mipssim/sim_setup.c | 4 | ||||
| -rw-r--r-- | arch/mips/mipssim/sim_smp.c | 6 | ||||
| -rw-r--r-- | arch/mips/mipssim/sim_time.c | 76 |
6 files changed, 11 insertions, 83 deletions
diff --git a/arch/mips/mipssim/Makefile b/arch/mips/mipssim/Makefile index dc0bfda1142..75568b584df 100644 --- a/arch/mips/mipssim/Makefile +++ b/arch/mips/mipssim/Makefile @@ -22,3 +22,5 @@ obj-y := sim_platform.o sim_setup.o sim_mem.o sim_time.o sim_int.o \ obj-$(CONFIG_EARLY_PRINTK) += sim_console.o obj-$(CONFIG_SMP) += sim_smp.o + +EXTRA_CFLAGS += -Werror diff --git a/arch/mips/mipssim/sim_int.c b/arch/mips/mipssim/sim_int.c index 5cbc3509ab5..46067ad542d 100644 --- a/arch/mips/mipssim/sim_int.c +++ b/arch/mips/mipssim/sim_int.c @@ -25,7 +25,7 @@ static inline int clz(unsigned long x) { - __asm__ ( + __asm__( " .set push \n" " .set mips32 \n" " clz %0, %1 \n" diff --git a/arch/mips/mipssim/sim_mem.c b/arch/mips/mipssim/sim_mem.c index 2312483eb83..953d836a771 100644 --- a/arch/mips/mipssim/sim_mem.c +++ b/arch/mips/mipssim/sim_mem.c @@ -69,7 +69,7 @@ struct prom_pmemblock * __init prom_getmdesc(void) return &mdesc[0]; } -static int __init prom_memtype_classify (unsigned int type) +static int __init prom_memtype_classify(unsigned int type) { switch (type) { case simmem_free: @@ -90,7 +90,7 @@ void __init prom_meminit(void) long type; unsigned long base, size; - type = prom_memtype_classify (p->type); + type = prom_memtype_classify(p->type); base = p->base; size = p->size; diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c index 60e66906be6..452c129d02c 100644 --- a/arch/mips/mipssim/sim_setup.c +++ b/arch/mips/mipssim/sim_setup.c @@ -22,10 +22,10 @@ #include <linux/io.h> #include <linux/irq.h> #include <linux/ioport.h> -#include <linux/serial.h> #include <linux/tty.h> #include <linux/serial.h> #include <linux/serial_core.h> +#include <linux/serial_8250.h> #include <asm/cpu.h> #include <asm/bootinfo.h> @@ -36,7 +36,6 @@ #include <asm/mips-boards/simint.h> -extern void sim_time_init(void); static void __init serial_init(void); unsigned int _isbonito = 0; @@ -54,7 +53,6 @@ void __init plat_mem_setup(void) serial_init(); - board_time_init = sim_time_init; pr_info("Linux started...\n"); #ifdef CONFIG_MIPS_MT_SMP diff --git a/arch/mips/mipssim/sim_smp.c b/arch/mips/mipssim/sim_smp.c index 38fa807b99f..ccbbccac23e 100644 --- a/arch/mips/mipssim/sim_smp.c +++ b/arch/mips/mipssim/sim_smp.c @@ -53,7 +53,7 @@ void core_send_ipi(int cpu, unsigned int action) * Platform "CPU" startup hook */ -void prom_boot_secondary(int cpu, struct task_struct *idle) +void __cpuinit prom_boot_secondary(int cpu, struct task_struct *idle) { #ifdef CONFIG_MIPS_MT_SMTC smtc_boot_secondary(cpu, idle); @@ -64,7 +64,7 @@ void prom_boot_secondary(int cpu, struct task_struct *idle) * Post-config but pre-boot cleanup entry point */ -void prom_init_secondary(void) +void __cpuinit prom_init_secondary(void) { #ifdef CONFIG_MIPS_MT_SMTC void smtc_init_secondary(void); @@ -103,7 +103,7 @@ void plat_prepare_cpus(unsigned int max_cpus) * SMP initialization finalization entry point */ -void prom_smp_finish(void) +void __cpuinit prom_smp_finish(void) { #ifdef CONFIG_MIPS_MT_SMTC smtc_smp_finish(); diff --git a/arch/mips/mipssim/sim_time.c b/arch/mips/mipssim/sim_time.c index a0f5a5dca1b..e7fa0d1078a 100644 --- a/arch/mips/mipssim/sim_time.c +++ b/arch/mips/mipssim/sim_time.c @@ -23,77 +23,6 @@ unsigned long cpu_khz; -irqreturn_t sim_timer_interrupt(int irq, void *dev_id) -{ -#ifdef CONFIG_SMP - int cpu = smp_processor_id(); - - /* - * CPU 0 handles the global timer interrupt job - * resets count/compare registers to trigger next timer int. - */ -#ifndef CONFIG_MIPS_MT_SMTC - if (cpu == 0) { - timer_interrupt(irq, dev_id); - } else { - /* Everyone else needs to reset the timer int here as - ll_local_timer_interrupt doesn't */ - /* - * FIXME: need to cope with counter underflow. - * More support needs to be added to kernel/time for - * counter/timer interrupts on multiple CPU's - */ - write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ)); - } -#else /* SMTC */ - /* - * In SMTC system, one Count/Compare set exists per VPE. - * Which TC within a VPE gets the interrupt is essentially - * random - we only know that it shouldn't be one with - * IXMT set. Whichever TC gets the interrupt needs to - * send special interprocessor interrupts to the other - * TCs to make sure that they schedule, etc. - * - * That code is specific to the SMTC kernel, not to - * the simulation platform, so it's invoked from - * the general MIPS timer_interrupt routine. - * - * We have a problem in that the interrupt vector code - * had to turn off the timer IM bit to avoid redundant - * entries, but we may never get to mips_cpu_irq_end - * to turn it back on again if the scheduler gets - * involved. So we clear the pending timer here, - * and re-enable the mask... - */ - - int vpflags = dvpe(); - write_c0_compare (read_c0_count() - 1); - clear_c0_cause(0x100 << cp0_compare_irq); - set_c0_status(0x100 << cp0_compare_irq); - irq_enable_hazard(); - evpe(vpflags); - - if (cpu_data[cpu].vpe_id == 0) - timer_interrupt(irq, dev_id); - else - write_c0_compare (read_c0_count() + ( mips_hpt_frequency/HZ)); - smtc_timer_broadcast(cpu_data[cpu].vpe_id); - -#endif /* CONFIG_MIPS_MT_SMTC */ - - /* - * every CPU should do profiling and process accounting - */ - local_timer_interrupt (irq, dev_id); - - return IRQ_HANDLED; -#else - return timer_interrupt (irq, dev_id); -#endif -} - - - /* * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect */ @@ -146,7 +75,7 @@ static unsigned int __init estimate_cpu_frequency(void) return count; } -void __init sim_time_init(void) +void __init plat_time_init(void) { unsigned int est_freq, flags; @@ -155,7 +84,7 @@ void __init sim_time_init(void) /* Set Data mode - binary. */ CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); - est_freq = estimate_cpu_frequency (); + est_freq = estimate_cpu_frequency(); printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000, (est_freq % 1000000) * 100 / 1000000); @@ -185,7 +114,6 @@ void __init plat_timer_setup(struct irqaction *irq) } /* we are using the cpu counter for timer interrupts */ - irq->handler = sim_timer_interrupt; setup_irq(mips_cpu_timer_irq, irq); #ifdef CONFIG_SMP |