diff options
Diffstat (limited to 'arch/mips/mti-malta/malta-int.c')
| -rw-r--r-- | arch/mips/mti-malta/malta-int.c | 43 |
1 files changed, 40 insertions, 3 deletions
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index 7b13a4caeea..647b8638318 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c @@ -273,16 +273,19 @@ asmlinkage void plat_irq_dispatch(void) unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; int irq; + if (unlikely(!pending)) { + spurious_interrupt(); + return; + } + irq = irq_ffs(pending); if (irq == MIPSCPU_INT_I8259A) malta_hw0_irqdispatch(); else if (gic_present && ((1 << irq) & ipi_map[smp_processor_id()])) malta_ipi_irqdispatch(); - else if (irq >= 0) - do_IRQ(MIPS_CPU_IRQ_BASE + irq); else - spurious_interrupt(); + do_IRQ(MIPS_CPU_IRQ_BASE + irq); } #ifdef CONFIG_MIPS_MT_SMP @@ -747,3 +750,37 @@ int malta_be_handler(struct pt_regs *regs, int is_fixup) return retval; } + +void gic_enable_interrupt(int irq_vec) +{ + GIC_SET_INTR_MASK(irq_vec); +} + +void gic_disable_interrupt(int irq_vec) +{ + GIC_CLR_INTR_MASK(irq_vec); +} + +void gic_irq_ack(struct irq_data *d) +{ + int irq = (d->irq - gic_irq_base); + + GIC_CLR_INTR_MASK(irq); + + if (gic_irq_flags[irq] & GIC_TRIG_EDGE) + GICWRITE(GIC_REG(SHARED, GIC_SH_WEDGE), irq); +} + +void gic_finish_irq(struct irq_data *d) +{ + /* Enable interrupts. */ + GIC_SET_INTR_MASK(d->irq - gic_irq_base); +} + +void __init gic_platform_init(int irqs, struct irq_chip *irq_controller) +{ + int i; + + for (i = gic_irq_base; i < (gic_irq_base + irqs); i++) + irq_set_chip(i, irq_controller); +} |