diff options
Diffstat (limited to 'arch/mips/netlogic/xlr')
| -rw-r--r-- | arch/mips/netlogic/xlr/setup.c | 4 | ||||
| -rw-r--r-- | arch/mips/netlogic/xlr/smp.c | 2 | ||||
| -rw-r--r-- | arch/mips/netlogic/xlr/smpboot.S | 16 |
3 files changed, 14 insertions, 8 deletions
diff --git a/arch/mips/netlogic/xlr/setup.c b/arch/mips/netlogic/xlr/setup.c index 482802569e7..cee25ddd088 100644 --- a/arch/mips/netlogic/xlr/setup.c +++ b/arch/mips/netlogic/xlr/setup.c @@ -53,7 +53,7 @@ unsigned long netlogic_io_base = (unsigned long)(DEFAULT_NETLOGIC_IO_BASE); unsigned long nlm_common_ebase = 0x0; struct psb_info nlm_prom_info; -static void nlm_early_serial_setup(void) +static void __init nlm_early_serial_setup(void) { struct uart_port s; nlm_reg_t *uart_base; @@ -101,7 +101,7 @@ void __init prom_free_prom_memory(void) /* Nothing yet */ } -static void build_arcs_cmdline(int *argv) +static void __init build_arcs_cmdline(int *argv) { int i, remain, len; char *arg; diff --git a/arch/mips/netlogic/xlr/smp.c b/arch/mips/netlogic/xlr/smp.c index d842bce5c94..e2372121307 100644 --- a/arch/mips/netlogic/xlr/smp.c +++ b/arch/mips/netlogic/xlr/smp.c @@ -191,7 +191,7 @@ struct plat_smp_ops nlm_smp_ops = { unsigned long secondary_entry_point; -int nlm_wakeup_secondary_cpus(u32 wakeup_mask) +int __cpuinit nlm_wakeup_secondary_cpus(u32 wakeup_mask) { unsigned int tid, pid, ipi, i, boot_cpu; void *reset_vec; diff --git a/arch/mips/netlogic/xlr/smpboot.S b/arch/mips/netlogic/xlr/smpboot.S index b8e074402c9..8cb7889ce0c 100644 --- a/arch/mips/netlogic/xlr/smpboot.S +++ b/arch/mips/netlogic/xlr/smpboot.S @@ -32,17 +32,19 @@ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +#include <linux/init.h> + #include <asm/asm.h> #include <asm/asm-offsets.h> #include <asm/regdef.h> #include <asm/mipsregs.h> - -/* Don't jump to linux function from Bootloader stack. Change it - * here. Kernel might allocate bootloader memory before all the CPUs are - * brought up (eg: Inode cache region) and we better don't overwrite this - * memory +/* + * Early code for secondary CPUs. This will get them out of the bootloader + * code and into linux. Needed because the bootloader area will be taken + * and initialized by linux. */ + __CPUINIT NESTED(prom_pre_boot_secondary_cpus, 16, sp) .set mips64 mfc0 t0, $15, 1 # read ebase @@ -73,7 +75,11 @@ NESTED(prom_pre_boot_secondary_cpus, 16, sp) jr t0 nop END(prom_pre_boot_secondary_cpus) + __FINIT +/* + * NMI code, used for CPU wakeup, copied to reset entry + */ NESTED(nlm_boot_smp_nmi, 0, sp) .set push .set noat |