diff options
Diffstat (limited to 'arch/mips')
205 files changed, 3494 insertions, 2153 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index d8af858fe3f..9d839a9c4b1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -165,6 +165,7 @@ config MIPS_COBALT select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL select SYS_SUPPORTS_LITTLE_ENDIAN + select GENERIC_HARDIRQS_NO__DO_IRQ config MACH_DECSTATION bool "DECstations" @@ -225,6 +226,7 @@ config MACH_JAZZ select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL select SYS_SUPPORTS_100HZ + select GENERIC_HARDIRQS_NO__DO_IRQ help This a family of machines based on the MIPS R4030 chipset which was used by several vendors to build RISC/os and Windows NT workstations. @@ -459,6 +461,11 @@ config PNX8550_JBS select PNX8550 select SYS_SUPPORTS_LITTLE_ENDIAN +config PNX8550_STB810 + bool "Support for Philips PNX8550 based STB810 board" + select PNX8550 + select SYS_SUPPORTS_LITTLE_ENDIAN + config DDB5477 bool "NEC DDB Vrc-5477" select DDB5XXX_COMMON @@ -482,6 +489,7 @@ config MACH_VR41XX select SYS_HAS_CPU_VR41XX select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL + select GENERIC_HARDIRQS_NO__DO_IRQ config PMC_YOSEMITE bool "PMC-Sierra Yosemite eval board" @@ -515,6 +523,7 @@ config QEMU select SYS_SUPPORTS_BIG_ENDIAN select SYS_SUPPORTS_LITTLE_ENDIAN select ARCH_SPARSEMEM_ENABLE + select GENERIC_HARDIRQS_NO__DO_IRQ help Qemu is a software emulator which among other architectures also can simulate a MIPS32 4Kc system. This patch adds support for the @@ -566,6 +575,7 @@ config SGI_IP27 select DMA_IP27 select EARLY_PRINTK select HW_HAS_PCI + select NR_CPUS_DEFAULT_64 select PCI_DOMAINS select SYS_HAS_CPU_R10000 select SYS_SUPPORTS_64BIT_KERNEL @@ -603,6 +613,7 @@ config SIBYTE_BIGSUR bool "Sibyte BCM91480B-BigSur" select BOOT_ELF32 select DMA_COHERENT + select NR_CPUS_DEFAULT_4 select PCI_DOMAINS select SIBYTE_BCM1x80 select SWAP_IO_SPACE @@ -614,6 +625,7 @@ config SIBYTE_SWARM bool "Sibyte BCM91250A-SWARM" select BOOT_ELF32 select DMA_COHERENT + select NR_CPUS_DEFAULT_2 select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -626,6 +638,7 @@ config SIBYTE_SENTOSA depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT + select NR_CPUS_DEFAULT_2 select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -659,6 +672,7 @@ config SIBYTE_PTSWARM depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT + select NR_CPUS_DEFAULT_2 select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -671,6 +685,7 @@ config SIBYTE_LITTLESUR depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT + select NR_CPUS_DEFAULT_2 select SIBYTE_SB1250 select SWAP_IO_SPACE select SYS_HAS_CPU_SB1 @@ -701,8 +716,8 @@ config SIBYTE_CRHONE select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN -config SNI_RM200_PCI - bool "SNI RM200 PCI" +config SNI_RM + bool "SNI RM200/300/400" select ARC if CPU_LITTLE_ENDIAN select ARC32 if CPU_LITTLE_ENDIAN select ARCH_MAY_HAVE_PC_FDC @@ -725,8 +740,8 @@ config SNI_RM200_PCI select SYS_SUPPORTS_HIGHMEM select SYS_SUPPORTS_LITTLE_ENDIAN help - The SNI RM200 PCI was a MIPS-based platform manufactured by Siemens - Nixdorf Informationssysteme (SNI), parent company of Pyramid + The SNI RM200/300/400 are MIPS-based machines manufactured by + Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid Technology and now in turn merged with Fujitsu. Say Y here to support this machine type. @@ -754,6 +769,7 @@ config TOSHIBA_RBTX4927 select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN select TOSHIBA_BOARDS + select GENERIC_HARDIRQS_NO__DO_IRQ help This Toshiba board is based on the TX4927 processor. Say Y here to support this machine type @@ -773,29 +789,13 @@ config TOSHIBA_RBTX4938 select SYS_SUPPORTS_LITTLE_ENDIAN select SYS_SUPPORTS_BIG_ENDIAN select TOSHIBA_BOARDS + select GENERIC_HARDIRQS_NO__DO_IRQ help This Toshiba board is based on the TX4938 processor. Say Y here to support this machine type endchoice -config KEXEC - bool "Kexec system call (EXPERIMENTAL)" - depends on EXPERIMENTAL - help - kexec is a system call that implements the ability to shutdown your - current kernel, and to start another kernel. It is like a reboot - but it is indepedent of the system firmware. And like a reboot - you can start any kernel with it, not just Linux. - - The name comes from the similiarity to the exec system call. - - It is an ongoing process to be certain the hardware in a machine - is properly shutdown, so do not be surprised if this code does not - initially work for you. It may help to enable device hotplugging - support. As of this writing the exact hardware interface is - strongly in flux, so no good recommendation can be made. - source "arch/mips/ddb5xxx/Kconfig" source "arch/mips/gt64120/ev64120/Kconfig" source "arch/mips/jazz/Kconfig" @@ -819,6 +819,14 @@ config RWSEM_GENERIC_SPINLOCK config RWSEM_XCHGADD_ALGORITHM bool +config ARCH_HAS_ILOG2_U32 + bool + default n + +config ARCH_HAS_ILOG2_U64 + bool + default n + config GENERIC_FIND_NEXT_BIT bool default y @@ -926,6 +934,9 @@ config CPU_LITTLE_ENDIAN endchoice +config SYS_SUPPORTS_APM_EMULATION + bool + config SYS_SUPPORTS_BIG_ENDIAN bool @@ -993,6 +1004,7 @@ config SOC_AU1X00 bool select SYS_HAS_CPU_MIPS32_R1 select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_APM_EMULATION config PNX8550 bool @@ -1062,16 +1074,16 @@ config HAVE_STD_PC_SERIAL_PORT config ARC_CONSOLE bool "ARC console support" - depends on SGI_IP22 || SNI_RM200_PCI + depends on SGI_IP22 || SNI_RM config ARC_MEMORY bool - depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP32 + depends on MACH_JAZZ || SNI_RM || SGI_IP32 default y config ARC_PROMLIB bool - depends on MACH_JAZZ || SNI_RM200_PCI || SGI_IP22 || SGI_IP32 + depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP32 default y config ARC64 @@ -1522,6 +1534,8 @@ config MIPS_MT_SMTC select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_SRS select MIPS_MT + select NR_CPUS_DEFAULT_2 + select NR_CPUS_DEFAULT_8 select SMP select SYS_SUPPORTS_SMP help @@ -1549,6 +1563,20 @@ config MIPS_MT_FPAFF depends on MIPS_MT default y +config MIPS_MT_SMTC_INSTANT_REPLAY + bool "Low-latency Dispatch of Deferred SMTC IPIs" + depends on MIPS_MT_SMTC + default y + help + SMTC pseudo-interrupts between TCs are deferred and queued + if the target TC is interrupt-inhibited (IXMT). In the first + SMTC prototypes, these queued IPIs were serviced on return + to user mode, or on entry into the kernel idle loop. The + INSTANT_REPLAY option dispatches them as part of local_irq_restore() + processing, which adds runtime overhead (hence the option to turn + it off), but ensures that IPIs are handled promptly even under + heavy I/O interrupt load. + config MIPS_VPE_LOADER_TOM bool "Load VPE program into memory hidden from linux" depends on MIPS_VPE_LOADER @@ -1723,13 +1751,34 @@ config SMP config SYS_SUPPORTS_SMP bool +config NR_CPUS_DEFAULT_2 + bool + +config NR_CPUS_DEFAULT_4 + bool + +config NR_CPUS_DEFAULT_8 + bool + +config NR_CPUS_DEFAULT_16 + bool + +config NR_CPUS_DEFAULT_32 + bool + +config NR_CPUS_DEFAULT_64 + bool + config NR_CPUS int "Maximum number of CPUs (2-64)" range 2 64 depends on SMP - default "64" if SGI_IP27 - default "2" - default "8" if MIPS_MT_SMTC + default "2" if NR_CPUS_DEFAULT_2 + default "4" if NR_CPUS_DEFAULT_4 + default "8" if NR_CPUS_DEFAULT_8 + default "16" if NR_CPUS_DEFAULT_16 + default "32" if NR_CPUS_DEFAULT_32 + default "64" if NR_CPUS_DEFAULT_64 help This allows you to specify the maximum number of CPUs which this kernel will support. The maximum supported value is 32 for 32-bit @@ -1826,6 +1875,40 @@ config MIPS_INSANE_LARGE This will result in additional memory usage, so it is not recommended for normal users. +config KEXEC + bool "Kexec system call (EXPERIMENTAL)" + depends on EXPERIMENTAL + help + kexec is a system call that implements the ability to shutdown your + current kernel, and to start another kernel. It is like a reboot + but it is indepedent of the system firmware. And like a reboot + you can start any kernel with it, not just Linux. + + The name comes from the similiarity to the exec system call. + + It is an ongoing process to be certain the hardware in a machine + is properly shutdown, so do not be surprised if this code does not + initially work for you. It may help to enable device hotplugging + support. As of this writing the exact hardware interface is + strongly in flux, so no good recommendation can be made. + +config SECCOMP + bool "Enable seccomp to safely compute untrusted bytecode" + depends on PROC_FS && BROKEN + default y + help + This kernel feature is useful for number crunching applications + that may need to compute untrusted bytecode during their + execution. By using pipes or other transports made available to + the process as file descriptors supporting the read/write + syscalls, it's possible to isolate those applications in + their own address space using seccomp. Once seccomp is + enabled via /proc/<pid>/seccomp, it cannot be disabled + and the task is only allowed to execute a few safe syscalls + defined by each seccomp mode. + + If unsure, say Y. Only embedded should say N here. + endmenu config RWSEM_GENERIC_SPINLOCK @@ -1992,52 +2075,11 @@ config BINFMT_ELF32 bool default y if MIPS32_O32 || MIPS32_N32 -config SECCOMP - bool "Enable seccomp to safely compute untrusted bytecode" - depends on PROC_FS && BROKEN - default y - help - This kernel feature is useful for number crunching applications - that may need to compute untrusted bytecode during their - execution. By using pipes or other transports made available to - the process as file descriptors supporting the read/write - syscalls, it's possible to isolate those applications in - their own address space using seccomp. Once seccomp is - enabled via /proc/<pid>/seccomp, it cannot be disabled - and the task is only allowed to execute a few safe syscalls - defined by each seccomp mode. +endmenu - If unsure, say Y. Only embedded should say N here. +menu "Power management options" -config PM - bool "Power Management support (EXPERIMENTAL)" - depends on EXPERIMENTAL && SOC_AU1X00 - -config APM - tristate "Advanced Power Management Emulation" - depends on PM - ---help--- - APM is a BIOS specification for saving power using several different - techniques. This is mostly useful for battery powered systems with - APM compliant BIOSes. If you say Y here, the system time will be - reset after a RESUME operation, the /proc/apm device will provide - battery status information, and user-space programs will receive - notification of APM "events" (e.g. battery status change). - - In order to use APM, you will need supporting software. For location - and more information, read <file:Documentation/pm.txt> and the - Battery Powered Linux mini-HOWTO, available from - <http://www.tldp.org/docs.html#howto>. - - This driver does not spin down disk drives (see the hdparm(8) - manpage ("man 8 hdparm") for that), and it doesn't turn off - VESA-compliant "green" monitors. - - Generally, if you don't have a battery in your machine, there isn't - much point in using this driver and you should say N. If you get - random kernel OOPSes or reboots that don't seem to be related to - anything, try disabling/enabling this option (or disabling/enabling - APM in your BIOS). +source "kernel/power/Kconfig" endmenu diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 5d6afb52d90..9351f1c04a9 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug @@ -22,10 +22,10 @@ config CMDLINE string "Default kernel command string" default "" help - On some platforms, there is currently no way for the boot loader to - pass arguments to the kernel. For these platforms, you can supply - some command-line options at build time by entering them here. In - other cases you can specify kernel args so that you don't have + On some platforms, there is currently no way for the boot loader to + pass arguments to the kernel. For these platforms, you can supply + some command-line options at build time by entering them here. In + other cases you can specify kernel args so that you don't have to set them up in board prom initialization routines. config DEBUG_STACK_USAGE diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 641aa30b363..c68b5d3e5d1 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -463,6 +463,11 @@ libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/ #cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550 load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000 +# Philips PNX8550 STB810 board +# +libs-$(CONFIG_PNX8550_STB810) += arch/mips/philips/pnx8550/stb810/ +load-$(CONFIG_PNX8550_STB810) += 0xffffffff80060000 + # NEC EMMA2RH boards # core-$(CONFIG_EMMA2RH) += arch/mips/emma2rh/common/ @@ -569,11 +574,11 @@ libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/ load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 # -# SNI RM200 PCI +# SNI RM # -core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/ -cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200 -load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000 +core-$(CONFIG_SNI_RM) += arch/mips/sni/ +cflags-$(CONFIG_SNI_RM) += -Iinclude/asm-mips/mach-rm +load-$(CONFIG_SNI_RM) += 0xffffffff80600000 # # Toshiba JMR-TX3927 board @@ -618,7 +623,7 @@ LDFLAGS += -m $(ld-emul) ifdef CONFIG_MIPS CHECKFLAGS += $(shell $(CC) $(CFLAGS) -dM -E -xc /dev/null | \ - egrep -vw '__GNUC_(MAJOR|MINOR|PATCHLEVEL)__' | \ + egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \ sed -e 's/^\#define /-D/' -e "s/ /='/" -e "s/$$/'/") ifdef CONFIG_64BIT CHECKFLAGS += -m64 @@ -695,7 +700,7 @@ ifdef CONFIG_QEMU all: vmlinux.bin endif -ifdef CONFIG_SNI_RM200_PCI +ifdef CONFIG_SNI_RM all: vmlinux.ecoff endif diff --git a/arch/mips/arc/identify.c b/arch/mips/arc/identify.c index 3ba7c47f9f2..4b907369b0f 100644 --- a/arch/mips/arc/identify.c +++ b/arch/mips/arc/identify.c @@ -77,7 +77,7 @@ static struct smatch * __init string_to_mach(const char *s) { int i; - for (i = 0; i < (sizeof(mach_table) / sizeof (mach_table[0])); i++) { + for (i = 0; i < ARRAY_SIZE(mach_table); i++) { if (!strcmp(s, mach_table[i].arcname)) return &mach_table[i]; } diff --git a/arch/mips/arc/memory.c b/arch/mips/arc/memory.c index 8a9ef58cc39..456cb81a32d 100644 --- a/arch/mips/arc/memory.c +++ b/arch/mips/arc/memory.c @@ -141,30 +141,20 @@ void __init prom_meminit(void) } } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - unsigned long freed = 0; unsigned long addr; int i; if (prom_flags & PROM_FLAG_DONT_FREE_TEMP) - return 0; + return; for (i = 0; i < boot_mem_map.nr_map; i++) { if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) continue; addr = boot_mem_map.map[i].addr; - while (addr < boot_mem_map.map[i].addr - + boot_mem_map.map[i].size) { - ClearPageReserved(virt_to_page(__va(addr))); - init_page_count(virt_to_page(__va(addr))); - free_page((unsigned long)__va(addr)); - addr += PAGE_SIZE; - freed += PAGE_SIZE; - } + free_init_pages("prom memory", + addr, addr + boot_mem_map.map[i].size); } - printk(KERN_INFO "Freeing prom memory: %ldkb freed\n", freed >> 10); - - return freed; } diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index 9cf7b671583..ea6e99fbe2f 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -233,7 +233,7 @@ void restore_local_and_enable(int controller, unsigned long mask) static struct irq_chip rise_edge_irq_type = { - .typename = "Au1000 Rise Edge", + .name = "Au1000 Rise Edge", .ack = mask_and_ack_rise_edge_irq, .mask = local_disable_irq, .mask_ack = mask_and_ack_rise_edge_irq, @@ -242,7 +242,7 @@ static struct irq_chip rise_edge_irq_type = { }; static struct irq_chip fall_edge_irq_type = { - .typename = "Au1000 Fall Edge", + .name = "Au1000 Fall Edge", .ack = mask_and_ack_fall_edge_irq, .mask = local_disable_irq, .mask_ack = mask_and_ack_fall_edge_irq, @@ -251,7 +251,7 @@ static struct irq_chip fall_edge_irq_type = { }; static struct irq_chip either_edge_irq_type = { - .typename = "Au1000 Rise or Fall Edge", + .name = "Au1000 Rise or Fall Edge", .ack = mask_and_ack_either_edge_irq, .mask = local_disable_irq, .mask_ack = mask_and_ack_either_edge_irq, @@ -260,7 +260,7 @@ static struct irq_chip either_edge_irq_type = { }; static struct irq_chip level_irq_type = { - .typename = "Au1000 Level", + .name = "Au1000 Level", .ack = mask_and_ack_level_irq, .mask = local_disable_irq, .mask_ack = mask_and_ack_level_irq, diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c index da591f67489..6c25e6c09f7 100644 --- a/arch/mips/au1000/common/pci.c +++ b/arch/mips/au1000/common/pci.c @@ -39,15 +39,15 @@ /* TBD */ static struct resource pci_io_resource = { - .start = PCI_IO_START, - .end = PCI_IO_END, + .start = (resource_size_t)PCI_IO_START, + .end = (resource_size_t)PCI_IO_END, .name = "PCI IO space", .flags = IORESOURCE_IO }; static struct resource pci_mem_resource = { - .start = PCI_MEM_START, - .end = PCI_MEM_END, + .start = (resource_size_t)PCI_MEM_START, + .end = (resource_size_t)PCI_MEM_END, .name = "PCI memory space", .flags = IORESOURCE_MEM }; @@ -76,13 +76,17 @@ static int __init au1x_pci_setup(void) } #ifdef CONFIG_DMA_NONCOHERENT - /* - * Set the NC bit in controller for Au1500 pre-AC silicon - */ - u32 prid = read_c0_prid(); - if ( (prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { - au_writel( 1<<16 | au_readl(Au1500_PCI_CFG), Au1500_PCI_CFG); - printk("Non-coherent PCI accesses enabled\n"); + { + /* + * Set the NC bit in controller for Au1500 pre-AC silicon + */ + u32 prid = read_c0_prid(); + + if ((prid & 0xFF000000) == 0x01000000 && prid < 0x01030202) { + au_writel((1 << 16) | au_readl(Au1500_PCI_CFG), + Au1500_PCI_CFG); + printk("Non-coherent PCI accesses enabled\n"); + } } #endif diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/au1000/common/prom.c index 6fce60af005..a8637cdb5b4 100644 --- a/arch/mips/au1000/common/prom.c +++ b/arch/mips/au1000/common/prom.c @@ -149,9 +149,8 @@ int get_ethernet_addr(char *ethernet_addr) return 0; } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } EXPORT_SYMBOL(prom_getcmdline); diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index 919172db560..13fe187f35d 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c @@ -141,17 +141,20 @@ void __init plat_mem_setup(void) /* This routine should be valid for all Au1x based boards */ phys_t __fixup_bigphys_addr(phys_t phys_addr, phys_t size) { - u32 start, end; - /* Don't fixup 36 bit addresses */ - if ((phys_addr >> 32) != 0) return phys_addr; + if ((phys_addr >> 32) != 0) + return phys_addr; #ifdef CONFIG_PCI - start = (u32)Au1500_PCI_MEM_START; - end = (u32)Au1500_PCI_MEM_END; - /* check for pci memory window */ - if ((phys_addr >= start) && ((phys_addr + size) < end)) { - return (phys_t)((phys_addr - start) + Au1500_PCI_MEM_START); + { + u32 start, end; + + start = (u32)Au1500_PCI_MEM_START; + end = (u32)Au1500_PCI_MEM_END; + /* check for pci memory window */ + if ((phys_addr >= start) && ((phys_addr + size) < end)) + return (phys_t) + ((phys_addr - start) + Au1500_PCI_MEM_START); } #endif diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c index 2d1533f116c..6bc1f8e1b60 100644 --- a/arch/mips/au1000/pb1100/board_setup.c +++ b/arch/mips/au1000/pb1100/board_setup.c @@ -47,8 +47,7 @@ void board_reset (void) void __init board_setup(void) { - u32 pin_func; - u32 sys_freqctrl, sys_clksrc; + volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL; // set AUX clock to 12MHz * 8 = 96 MHz au_writel(8, SYS_AUXPLL); @@ -56,58 +55,62 @@ void __init board_setup(void) udelay(100); #ifdef CONFIG_USB_OHCI - // configure pins GPIO[14:9] as GPIO - pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); - - /* zero and disable FREQ2 */ - sys_freqctrl = au_readl(SYS_FREQCTRL0); - sys_freqctrl &= ~0xFFF00000; - au_writel(sys_freqctrl, SYS_FREQCTRL0); - - /* zero and disable USBH/USBD/IrDA clock */ - sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~0x0000001F; - au_writel(sys_clksrc, SYS_CLKSRC); - - sys_freqctrl = au_readl(SYS_FREQCTRL0); - sys_freqctrl &= ~0xFFF00000; - - sys_clksrc = au_readl(SYS_CLKSRC); - sys_clksrc &= ~0x0000001F; - - // FREQ2 = aux/2 = 48 MHz - sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); - au_writel(sys_freqctrl, SYS_FREQCTRL0); - - /* - * Route 48MHz FREQ2 into USBH/USBD/IrDA - */ - sys_clksrc |= ((4<<2) | (0<<1) | 0 ); - au_writel(sys_clksrc, SYS_CLKSRC); - - /* setup the static bus controller */ - au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ - au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ - au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ - - // get USB Functionality pin state (device vs host drive pins) - pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); - // 2nd USB port is USB host - pin_func |= 0x8000; - au_writel(pin_func, SYS_PINFUNC); + { + u32 pin_func, sys_freqctrl, sys_clksrc; + + // configure pins GPIO[14:9] as GPIO + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80); + + /* zero and disable FREQ2 */ + sys_freqctrl = au_readl(SYS_FREQCTRL0); + sys_freqctrl &= ~0xFFF00000; + au_writel(sys_freqctrl, SYS_FREQCTRL0); + + /* zero and disable USBH/USBD/IrDA clock */ + sys_clksrc = au_readl(SYS_CLKSRC); + sys_clksrc &= ~0x0000001F; + au_writel(sys_clksrc, SYS_CLKSRC); + + sys_freqctrl = au_readl(SYS_FREQCTRL0); + sys_freqctrl &= ~0xFFF00000; + + sys_clksrc = au_readl(SYS_CLKSRC); + sys_clksrc &= ~0x0000001F; + + // FREQ2 = aux/2 = 48 MHz + sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20)); + au_writel(sys_freqctrl, SYS_FREQCTRL0); + + /* + * Route 48MHz FREQ2 into USBH/USBD/IrDA + */ + sys_clksrc |= ((4<<2) | (0<<1) | 0 ); + au_writel(sys_clksrc, SYS_CLKSRC); + + /* setup the static bus controller */ + au_writel(0x00000002, MEM_STCFG3); /* type = PCMCIA */ + au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ + au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */ + + // get USB Functionality pin state (device vs host drive pins) + pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000); + // 2nd USB port is USB host + pin_func |= 0x8000; + au_writel(pin_func, SYS_PINFUNC); + } #endif // defined (CONFIG_USB_OHCI) /* Enable sys bus clock divider when IDLE state or no bus activity. */ au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); // Enable the RTC if not already enabled - if (!(readb(0xac000028) & 0x20)) { - writeb(readb(0xac000028) | 0x20, 0xac000028); + if (!(readb(base + 0x28) & 0x20)) { + writeb(readb(base + 0x28) | 0x20, base + 0x28); au_sync(); } // Put the clock in BCD mode - if (readb(0xac00002C) & 0x4) { /* reg B */ - writeb(readb(0xac00002c) & ~0x4, 0xac00002c); + if (readb(base + 0x2C) & 0x4) { /* reg B */ + writeb(readb(base + 0x2c) & ~0x4, base + 0x2c); au_sync(); } } diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c index 91983ba407c..b73b2d18bf5 100644 --- a/arch/mips/au1000/pb1200/irqmap.c +++ b/arch/mips/au1000/pb1200/irqmap.c @@ -137,33 +137,20 @@ static void pb1200_shutdown_irq( unsigned int irq_nr ) return; } -static inline void pb1200_mask_and_ack_irq(unsigned int irq_nr) -{ - pb1200_disable_irq( irq_nr ); -} - -static void pb1200_end_irq(unsigned int irq_nr) -{ - if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { - pb1200_enable_irq(irq_nr); - } -} - static struct irq_chip external_irq_type = { #ifdef CONFIG_MIPS_PB1200 - "Pb1200 Ext", + .name = "Pb1200 Ext", #endif #ifdef CONFIG_MIPS_DB1200 - "Db1200 Ext", + .name = "Db1200 Ext", #endif - pb1200_startup_irq, - pb1200_shutdown_irq, - pb1200_enable_irq, - pb1200_disable_irq, - pb1200_mask_and_ack_irq, - pb1200_end_irq, - NULL + .startup = pb1200_startup_irq, + .shutdown = pb1200_shutdown_irq, + .ack = pb1200_disable_irq, + .mask = pb1200_disable_irq, + .mask_ack = pb1200_disable_irq, + .unmask = pb1200_enable_irq, }; void _board_init_irq(void) @@ -172,7 +159,8 @@ void _board_init_irq(void) for (irq_nr = PB1200_INT_BEGIN; irq_nr <= PB1200_INT_END; irq_nr++) { - irq_desc[irq_nr].chip = &external_irq_type; + set_irq_chip_and_handler(irq_nr, &external_irq_type, + handle_level_irq); pb1200_disable_irq(irq_nr); } diff --git a/arch/mips/basler/excite/excite_irq.c b/arch/mips/basler/excite/excite_irq.c index 2e2061a286c..1ecab635042 100644 --- a/arch/mips/basler/excite/excite_irq.c +++ b/arch/mips/basler/excite/excite_irq.c @@ -47,9 +47,9 @@ extern asmlinkage void excite_handle_int(void); */ void __init arch_init_irq(void) { - mips_cpu_irq_init(0); - rm7k_cpu_irq_init(8); - rm9k_cpu_irq_init(12); + mips_cpu_irq_init(); + rm7k_cpu_irq_init(); + rm9k_cpu_irq_init(); #ifdef CONFIG_KGDB excite_kgdb_init(); diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c index 4c46f0e7378..fe93b846923 100644 --- a/arch/mips/cobalt/irq.c +++ b/arch/mips/cobalt/irq.c @@ -104,7 +104,7 @@ void __init arch_init_irq(void) GT_WRITE(GT_INTRMASK_OFS, 0); init_i8259_irqs(); /* 0 ... 15 */ - mips_cpu_irq_init(COBALT_CPU_IRQ); /* 16 ... 23 */ + mips_cpu_irq_init(); /* 16 ... 23 */ /* * Mask all cpu interrupts diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index e8f0f20b852..a4b69b543bd 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c @@ -204,8 +204,7 @@ void __init prom_init(void) add_memory_region(0x0, memsz, BOOT_MEM_RAM); } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { /* Nothing to do! */ - return 0; } diff --git a/arch/mips/configs/atlas_defconfig b/arch/mips/configs/atlas_defconfig index 35931bedc3d..ac189168752 100644 --- a/arch/mips/configs/atlas_defconfig +++ b/arch/mips/configs/atlas_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_ATLAS=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig index ba3bf733d27..9554257c6f3 100644 --- a/arch/mips/configs/bigsur_defconfig +++ b/arch/mips/configs/bigsur_defconfig @@ -57,7 +57,7 @@ CONFIG_SIBYTE_BIGSUR=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig index e5358121d2d..49590d44371 100644 --- a/arch/mips/configs/capcella_defconfig +++ b/arch/mips/configs/capcella_defconfig @@ -59,7 +59,7 @@ CONFIG_MACH_VR41XX=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig index adf1e8c98c6..0607fc23908 100644 --- a/arch/mips/configs/cobalt_defconfig +++ b/arch/mips/configs/cobalt_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_COBALT=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig index 4fd29ffdfb8..1a57b337548 100644 --- a/arch/mips/configs/db1000_defconfig +++ b/arch/mips/configs/db1000_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_DB1000=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig index 025b960ba99..0055ec41f20 100644 --- a/arch/mips/configs/db1100_defconfig +++ b/arch/mips/configs/db1100_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_DB1100=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig index 80c9dd98f89..c41823b81be 100644 --- a/arch/mips/configs/db1200_defconfig +++ b/arch/mips/configs/db1200_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_DB1200=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig index 6caa90b0e17..7d6d9218788 100644 --- a/arch/mips/configs/db1500_defconfig +++ b/arch/mips/configs/db1500_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_DB1500=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig index c6cae86c6ab..c681c91763a 100644 --- a/arch/mips/configs/db1550_defconfig +++ b/arch/mips/configs/db1550_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_DB1550=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig index 72f24001c99..dd4bb008021 100644 --- a/arch/mips/configs/ddb5477_defconfig +++ b/arch/mips/configs/ddb5477_defconfig @@ -59,7 +59,7 @@ CONFIG_DDB5477=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig index fe1387eb83c..8a31ce4be12 100644 --- a/arch/mips/configs/decstation_defconfig +++ b/arch/mips/configs/decstation_defconfig @@ -59,7 +59,7 @@ CONFIG_MACH_DECSTATION=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig index 6133c28beb8..6fa4f914f6e 100644 --- a/arch/mips/configs/e55_defconfig +++ b/arch/mips/configs/e55_defconfig @@ -59,7 +59,7 @@ CONFIG_MACH_VR41XX=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/emma2rh_defconfig b/arch/mips/configs/emma2rh_defconfig index a484b7d396f..4c9d0405a5d 100644 --- a/arch/mips/configs/emma2rh_defconfig +++ b/arch/mips/configs/emma2rh_defconfig @@ -59,7 +59,7 @@ CONFIG_MARKEINS=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig index 21bfcdebf8f..d5b49735683 100644 --- a/arch/mips/configs/ev64120_defconfig +++ b/arch/mips/configs/ev64120_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_EV64120=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig index 1a5b06cfb4d..697140c6562 100644 --- a/arch/mips/configs/excite_defconfig +++ b/arch/mips/configs/excite_defconfig @@ -60,7 +60,7 @@ CONFIG_BASLER_EXCITE=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 21d53e0c9ee..f9812d1e457 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig @@ -59,7 +59,7 @@ CONFIG_SGI_IP22=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index e3e94c7e5ee..96090f28373 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -59,7 +59,7 @@ CONFIG_SGI_IP27=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index b4ab2bea972..61e069a0f1a 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig @@ -59,7 +59,7 @@ CONFIG_SGI_IP32=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig index 9d4d17ace12..88966666f4c 100644 --- a/arch/mips/configs/jaguar-atx_defconfig +++ b/arch/mips/configs/jaguar-atx_defconfig @@ -59,7 +59,7 @@ CONFIG_MOMENCO_JAGUAR_ATX=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig index 382083ebea0..835764d834f 100644 --- a/arch/mips/configs/jazz_defconfig +++ b/arch/mips/configs/jazz_defconfig @@ -57,7 +57,7 @@ CONFIG_MACH_JAZZ=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index d03746667a9..50fd9557e64 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set CONFIG_TOSHIBA_JMR3927=y # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig index 1db8249b4c0..05f539f84f5 100644 --- a/arch/mips/configs/lasat200_defconfig +++ b/arch/mips/configs/lasat200_defconfig @@ -59,7 +59,7 @@ CONFIG_LASAT=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index 101e80347dc..96e941084c0 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig @@ -57,7 +57,7 @@ CONFIG_MIPS_MALTA=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set @@ -644,7 +644,85 @@ CONFIG_CONNECTOR=m # # Memory Technology Devices (MTD) # -# CONFIG_MTD is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set + +# +# RAM/ROM/Flash chip drivers +# +CONFIG_MTD_CFI=y +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_GEN_PROBE=y +# CONFIG_MTD_CFI_ADV_OPTIONS is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_CFI_UTIL=y +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +# CONFIG_MTD_NAND is not set + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set # # Parallel port support diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig index a3cbd23bf21..03efcfd0503 100644 --- a/arch/mips/configs/mipssim_defconfig +++ b/arch/mips/configs/mipssim_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_SIM=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig index 6570b47426c..e4221aafbc4 100644 --- a/arch/mips/configs/mpc30x_defconfig +++ b/arch/mips/configs/mpc30x_defconfig @@ -59,7 +59,7 @@ CONFIG_MACH_VR41XX=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig index 440d65f93a9..32b1afdd1c2 100644 --- a/arch/mips/configs/ocelot_3_defconfig +++ b/arch/mips/configs/ocelot_3_defconfig @@ -59,7 +59,7 @@ CONFIG_MOMENCO_OCELOT_3=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig index c2c7ae77da3..ebe75c1c71a 100644 --- a/arch/mips/configs/ocelot_c_defconfig +++ b/arch/mips/configs/ocelot_c_defconfig @@ -59,7 +59,7 @@ CONFIG_MOMENCO_OCELOT_C=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig index 67efe270e0c..5a9603c1290 100644 --- a/arch/mips/configs/ocelot_defconfig +++ b/arch/mips/configs/ocelot_defconfig @@ -59,7 +59,7 @@ CONFIG_MOMENCO_OCELOT=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig index a10f34de5f7..46a942c253c 100644 --- a/arch/mips/configs/ocelot_g_defconfig +++ b/arch/mips/configs/ocelot_g_defconfig @@ -59,7 +59,7 @@ CONFIG_MOMENCO_OCELOT_G=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig index 9e672f63a0a..7d3c688181d 100644 --- a/arch/mips/configs/pb1100_defconfig +++ b/arch/mips/configs/pb1100_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_PB1100=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig index d0c0f4af1bf..a77805af081 100644 --- a/arch/mips/configs/pb1500_defconfig +++ b/arch/mips/configs/pb1500_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_PB1500=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig index 3db7427d1b5..8318d74d6ad 100644 --- a/arch/mips/configs/pb1550_defconfig +++ b/arch/mips/configs/pb1550_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_PB1550=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig index 280a8001eac..fcb8fea3052 100644 --- a/arch/mips/configs/pnx8550-jbs_defconfig +++ b/arch/mips/configs/pnx8550-jbs_defconfig @@ -57,7 +57,7 @@ CONFIG_PNX8550_JBS=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig new file mode 100644 index 00000000000..f38a2c12303 --- /dev/null +++ b/arch/mips/configs/pnx8550-stb810_defconfig @@ -0,0 +1,1229 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.19 +# Thu Dec 7 16:35:12 2006 +# +CONFIG_MIPS=y + +# +# Machine selection +# +# CONFIG_MIPS_MTX1 is not set +# CONFIG_MIPS_BOSPORUS is not set +# CONFIG_MIPS_PB1000 is not set +# CONFIG_MIPS_PB1100 is not set +# CONFIG_MIPS_PB1500 is not set +# CONFIG_MIPS_PB1550 is not set +# CONFIG_MIPS_PB1200 is not set +# CONFIG_MIPS_DB1000 is not set +# CONFIG_MIPS_DB1100 is not set +# CONFIG_MIPS_DB1500 is not set +# CONFIG_MIPS_DB1550 is not set +# CONFIG_MIPS_DB1200 is not set +# CONFIG_MIPS_MIRAGE is not set +# CONFIG_BASLER_EXCITE is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MIPS_EV64120 is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_LASAT is not set +# CONFIG_MIPS_ATLAS is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SEAD is not set +# CONFIG_WR_PPMC is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_MOMENCO_JAGUAR_ATX is not set +# CONFIG_MOMENCO_OCELOT is not set +# CONFIG_MOMENCO_OCELOT_3 is not set +# CONFIG_MOMENCO_OCELOT_C is not set +# CONFIG_MOMENCO_OCELOT_G is not set +# CONFIG_MIPS_XXS1500 is not set +# CONFIG_PNX8550_V2PCI is not set +# CONFIG_PNX8550_JBS is not set +CONFIG_PNX8550_STB810=y +# CONFIG_DDB5477 is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_QEMU is not set +# CONFIG_MARKEINS is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_PTSWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SNI_RM200_PCI is not set +# CONFIG_TOSHIBA_JMR3927 is not set +# CONFIG_TOSHIBA_RBTX4927 is not set +# CONFIG_TOSHIBA_RBTX4938 is not set +# CONFIG_KEXEC is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_TIME=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DMA_NEED_PCI_MAP_STATE=y +# CONFIG_CPU_BIG_ENDIAN is not set +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_PNX8550=y +CONFIG_SOC_PNX8550=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 + +# +# CPU selection +# +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPSR1=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y + +# +# Kernel type +# +CONFIG_32BIT=y +# CONFIG_64BIT is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +# CONFIG_MIPS_VPE_LOADER is not set +# CONFIG_64BIT_PHYS_ADDR is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_RESOURCES_64BIT is not set +# CONFIG_HZ_48 is not set +# CONFIG_HZ_100 is not set +# CONFIG_HZ_128 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_256 is not set +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_1024 is not set +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_HZ=250 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_SYSFS_DEPRECATED=y +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +CONFIG_SYSCTL=y +CONFIG_EMBEDDED=y +# CONFIG_SYSCTL_SYSCALL is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +# CONFIG_HOTPLUG is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y +# CONFIG_MODULE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y + +# +# Block layer +# +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +# CONFIG_PCI_MULTITHREAD_PROBE is not set +# CONFIG_PCI_DEBUG is not set +CONFIG_MMU=y + +# +# PCCARD (PCMCIA/CardBus) support +# + +# +# PCI Hotplug Support +# + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_MISC is not set +CONFIG_TRAD_SIGNALS=y + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +CONFIG_XFRM=y +# CONFIG_XFRM_USER is not set +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +# CONFIG_DEBUG_DRIVER is not set +# CONFIG_SYS_HYPERVISOR is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +# CONFIG_MTD is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_UB is not set +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=8192 +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +CONFIG_BLK_DEV_INITRD=y +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# Misc devices +# +# CONFIG_SGI_IOC4 is not set +# CONFIG_TIFM_CORE is not set + +# +# ATA/ATAPI/MFM/RLL support +# +CONFIG_IDE=y +CONFIG_IDE_MAX_HWIFS=4 +CONFIG_BLK_DEV_IDE=y + +# +# Please see Documentation/ide.txt for help/info on IDE drives +# +# CONFIG_BLK_DEV_IDE_SATA is not set +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set +CONFIG_BLK_DEV_IDECD=m +# CONFIG_BLK_DEV_IDETAPE is not set +# CONFIG_BLK_DEV_IDEFLOPPY is not set +CONFIG_BLK_DEV_IDESCSI=y +# CONFIG_IDE_TASK_IOCTL is not set + +# +# IDE chipset support/bugfixes +# +CONFIG_IDE_GENERIC=y +CONFIG_BLK_DEV_IDEPCI=y +CONFIG_IDEPCI_SHARE_IRQ=y +CONFIG_BLK_DEV_OFFBOARD=y +CONFIG_BLK_DEV_GENERIC=y +# CONFIG_BLK_DEV_OPTI621 is not set +CONFIG_BLK_DEV_IDEDMA_PCI=y +# CONFIG_BLK_DEV_IDEDMA_FORCED is not set +# CONFIG_IDEDMA_PCI_AUTO is not set +# CONFIG_BLK_DEV_AEC62XX is not set +# CONFIG_BLK_DEV_ALI15X3 is not set +# CONFIG_BLK_DEV_AMD74XX is not set +# CONFIG_BLK_DEV_CMD64X is not set +# CONFIG_BLK_DEV_TRIFLEX is not set +# CONFIG_BLK_DEV_CY82C693 is not set +# CONFIG_BLK_DEV_CS5520 is not set +# CONFIG_BLK_DEV_CS5530 is not set +# CONFIG_BLK_DEV_HPT34X is not set +CONFIG_BLK_DEV_HPT366=y +# CONFIG_BLK_DEV_JMICRON is not set +# CONFIG_BLK_DEV_SC1200 is not set +# CONFIG_BLK_DEV_PIIX is not set +# CONFIG_BLK_DEV_IT821X is not set +# CONFIG_BLK_DEV_NS87415 is not set +# CONFIG_BLK_DEV_PDC202XX_OLD is not set +# CONFIG_BLK_DEV_PDC202XX_NEW is not set +# CONFIG_BLK_DEV_SVWKS is not set +# CONFIG_BLK_DEV_SIIMAGE is not set +# CONFIG_BLK_DEV_SLC90E66 is not set +# CONFIG_BLK_DEV_TRM290 is not set +# CONFIG_BLK_DEV_VIA82CXXX is not set +# CONFIG_IDE_ARM is not set +CONFIG_BLK_DEV_IDEDMA=y +# CONFIG_IDEDMA_IVB is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +# CONFIG_SCSI_NETLINK is not set +CONFIG_SCSI_PROC_FS=y + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +# CONFIG_CHR_DEV_SG is not set +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +CONFIG_SCSI_CONSTANTS=y +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transports +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +CONFIG_SCSI_ISCSI_ATTRS=m +# CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set + +# +# SCSI low-level drivers +# +CONFIG_ISCSI_TCP=m +# CONFIG_BLK_DEV_3W_XXXX_RAID is not set +# CONFIG_SCSI_3W_9XXX is not set +# CONFIG_SCSI_ACARD is not set +# CONFIG_SCSI_AACRAID is not set +# CONFIG_SCSI_AIC7XXX is not set +# CONFIG_SCSI_AIC7XXX_OLD is not set +# CONFIG_SCSI_AIC79XX is not set +# CONFIG_SCSI_AIC94XX is not set +# CONFIG_SCSI_DPT_I2O is not set +# CONFIG_SCSI_ARCMSR is not set +# CONFIG_MEGARAID_NEWGEN is not set +# CONFIG_MEGARAID_LEGACY is not set +# CONFIG_MEGARAID_SAS is not set +# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_DMX3191D is not set +# CONFIG_SCSI_FUTURE_DOMAIN is not set +# CONFIG_SCSI_IPS is not set +# CONFIG_SCSI_INITIO is not set +# CONFIG_SCSI_INIA100 is not set +# CONFIG_SCSI_STEX is not set +# CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_QLOGIC_1280 is not set +# CONFIG_SCSI_QLA_FC is not set +# CONFIG_SCSI_QLA_ISCSI is not set +# CONFIG_SCSI_LPFC is not set +# CONFIG_SCSI_DC395x is not set +# CONFIG_SCSI_DC390T is not set +# CONFIG_SCSI_NSP32 is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set +# CONFIG_FUSION_SAS is not set + +# +# IEEE 1394 (FireWire) support +# +# CONFIG_IEEE1394 is not set + +# +# I2O device support +# +# CONFIG_I2O is not set + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# ARCnet devices +# +# CONFIG_ARCNET is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_DM9000 is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +CONFIG_NATSEMI=y +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set + +# +# Ethernet (1000 Mbit) +# +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set + +# +# Ethernet (10000 Mbit) +# +# CONFIG_CHELSIO_T1 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set +# CONFIG_MYRI10GE is not set +# CONFIG_NETXEN_NIC is not set + +# +# Token Ring devices +# +# CONFIG_TR is not set + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Telephony Support +# +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_I8042 is not set +# CONFIG_SERIO_SERPORT is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_PNX8XXX is not set +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +CONFIG_HW_RANDOM=y +# CONFIG_RTC is not set +# CONFIG_GEN_RTC is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_DRM is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set +# CONFIG_SENSORS_F71805F is not set +# CONFIG_SENSORS_VT1211 is not set +# CONFIG_HWMON_DEBUG_CHIP is not set + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +CONFIG_FIRMWARE_EDID=y +# CONFIG_FB is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +# CONFIG_SOUND is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +# CONFIG_USB_DEVICEFS is not set +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_MULTITHREAD_PROBE is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_EHCI_HCD is not set +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_UHCI_HCD is not set +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_DPCM=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET_MII is not set +# CONFIG_USB_USBNET is not set +CONFIG_USB_MON=y + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGET is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +# CONFIG_USB_GADGET is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# InfiniBand support +# +# CONFIG_INFINIBAND is not set + +# +# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# + +# +# Real Time Clock +# +# CONFIG_RTC_CLASS is not set + +# +# DMA Engine support +# +# CONFIG_DMA_ENGINE is not set + +# +# DMA Clients +# + +# +# DMA Devices +# + +# +# File systems +# +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4DEV_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +# CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_DNOTIFY is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +CONFIG_NFSD=m +# CONFIG_NFSD_V3 is not set +# CONFIG_NFSD_TCP is not set +CONFIG_ROOT_NFS=y +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_EXPORTFS=m +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +# CONFIG_NLS_CODEPAGE_437 is not set +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +# CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +CONFIG_DEBUG_SLAB=y +# CONFIG_DEBUG_SLAB_LEAK is not set +# CONFIG_DEBUG_RT_MUTEXES is not set +# CONFIG_RT_MUTEX_TESTER is not set +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_MUTEXES is not set +# CONFIG_DEBUG_RWSEMS is not set +# CONFIG_DEBUG_LOCK_ALLOC is not set +# CONFIG_PROVE_LOCKING is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set +# CONFIG_DEBUG_KOBJECT is not set +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +# CONFIG_DEBUG_LIST is not set +CONFIG_FORCED_INLINING=y +CONFIG_HEADERS_CHECK=y +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_CROSSCOMPILE=y +CONFIG_CMDLINE="console=ttyS1,38400n8 kgdb=ttyS0 root=/dev/nfs ip=bootp" +# CONFIG_DEBUG_STACK_USAGE is not set +# CONFIG_KGDB is not set +# CONFIG_RUNTIME_DEBUG is not set +# CONFIG_MIPS_UNCACHED is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_MANAGER=m +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=m +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_TGR192 is not set +CONFIG_CRYPTO_ECB=m +CONFIG_CRYPTO_CBC=m +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_CRC32C=m +# CONFIG_CRYPTO_TEST is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_CRC_CCITT=m +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +CONFIG_LIBCRC32C=m +CONFIG_PLIST=y diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig index 64b9fbf44a6..5bc3248e50e 100644 --- a/arch/mips/configs/pnx8550-v2pci_defconfig +++ b/arch/mips/configs/pnx8550-v2pci_defconfig @@ -57,7 +57,7 @@ CONFIG_PNX8550_V2PCI=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/qemu_defconfig b/arch/mips/configs/qemu_defconfig index 9b0dab822bd..aa61f0f030a 100644 --- a/arch/mips/configs/qemu_defconfig +++ b/arch/mips/configs/qemu_defconfig @@ -59,7 +59,7 @@ CONFIG_QEMU=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig index dd029603602..f9e8f41d17f 100644 --- a/arch/mips/configs/rbhma4500_defconfig +++ b/arch/mips/configs/rbhma4500_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set CONFIG_TOSHIBA_RBTX4938=y diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index d8a498d64d6..496aa67b9f8 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -CONFIG_SNI_RM200_PCI=y +CONFIG_SNI_RM=y # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 805a4fe450f..e33c17200b3 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig @@ -59,7 +59,7 @@ CONFIG_SIBYTE_SWARM=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/sead_defconfig b/arch/mips/configs/sead_defconfig index 6fcb656d8d8..83fb932f9d4 100644 --- a/arch/mips/configs/sead_defconfig +++ b/arch/mips/configs/sead_defconfig @@ -59,7 +59,7 @@ CONFIG_MIPS_SEAD=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig index dc312f19ada..e9d4eae45bf 100644 --- a/arch/mips/configs/tb0226_defconfig +++ b/arch/mips/configs/tb0226_defconfig @@ -59,7 +59,7 @@ CONFIG_MACH_VR41XX=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/tb0229_defconfig b/arch/mips/configs/tb0229_defconfig index 85615d99b01..c19597fb0c3 100644 --- a/arch/mips/configs/tb0229_defconfig +++ b/arch/mips/configs/tb0229_defconfig @@ -59,7 +59,7 @@ CONFIG_MACH_VR41XX=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig index f7e8194809a..97d94f96990 100644 --- a/arch/mips/configs/tb0287_defconfig +++ b/arch/mips/configs/tb0287_defconfig @@ -57,7 +57,7 @@ CONFIG_MACH_VR41XX=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig index 863f6a7cadf..553734a47b6 100644 --- a/arch/mips/configs/workpad_defconfig +++ b/arch/mips/configs/workpad_defconfig @@ -59,7 +59,7 @@ CONFIG_MACH_VR41XX=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig index c10267d61cc..d3dfb702bb7 100644 --- a/arch/mips/configs/wrppmc_defconfig +++ b/arch/mips/configs/wrppmc_defconfig @@ -59,7 +59,7 @@ CONFIG_WR_PPMC=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig index 4d3c1329f3c..b9f74d6745e 100644 --- a/arch/mips/configs/yosemite_defconfig +++ b/arch/mips/configs/yosemite_defconfig @@ -59,7 +59,7 @@ CONFIG_PMC_YOSEMITE=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/ddb5xxx/common/prom.c b/arch/mips/ddb5xxx/common/prom.c index efef0f57ce1..54a857b5e3b 100644 --- a/arch/mips/ddb5xxx/common/prom.c +++ b/arch/mips/ddb5xxx/common/prom.c @@ -59,9 +59,8 @@ void __init prom_init(void) #endif } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } #if defined(CONFIG_DDB5477) diff --git a/arch/mips/ddb5xxx/ddb5477/irq.c b/arch/mips/ddb5xxx/ddb5477/irq.c index a8bd2e66705..2b23234a5b9 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq.c +++ b/arch/mips/ddb5xxx/ddb5477/irq.c @@ -17,6 +17,7 @@ #include <linux/ptrace.h> #include <asm/i8259.h> +#include <asm/irq_cpu.h> #include <asm/system.h> #include <asm/mipsregs.h> #include <asm/debug.h> @@ -73,7 +74,6 @@ set_pci_int_attr(u32 pci, u32 intn, u32 active, u32 trigger) } extern void vrc5477_irq_init(u32 base); -extern void mips_cpu_irq_init(u32 base); static struct irqaction irq_cascade = { no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL }; void __init arch_init_irq(void) @@ -125,7 +125,7 @@ void __init arch_init_irq(void) /* init all controllers */ init_i8259_irqs(); - mips_cpu_irq_init(CPU_IRQ_BASE); + mips_cpu_irq_init(); vrc5477_irq_init(VRC5477_IRQ_BASE); @@ -146,8 +146,7 @@ u8 i8259_interrupt_ack(void) irq = *(volatile u8 *) KSEG1ADDR(DDB_PCI_IACK_BASE); ddb_out32(DDB_PCIINIT10, reg); - /* i8259.c set the base vector to be 0x0 */ - return irq + I8259_IRQ_BASE; + return irq; } /* * the first level int-handler will jump here if it is a vrc5477 irq @@ -177,7 +176,7 @@ static void vrc5477_irq_dispatch(void) /* check for i8259 interrupts */ if (intStatus & (1 << VRC5477_I8259_CASCADE)) { int i8259_irq = i8259_interrupt_ack(); - do_IRQ(I8259_IRQ_BASE + i8259_irq); + do_IRQ(i8259_irq); return; } } diff --git a/arch/mips/ddb5xxx/ddb5477/irq_5477.c b/arch/mips/ddb5xxx/ddb5477/irq_5477.c index 96249aa5df5..98c3b15eb36 100644 --- a/arch/mips/ddb5xxx/ddb5477/irq_5477.c +++ b/arch/mips/ddb5xxx/ddb5477/irq_5477.c @@ -82,7 +82,7 @@ vrc5477_irq_end(unsigned int irq) } struct irq_chip vrc5477_irq_controller = { - .typename = "vrc5477_irq", + .name = "vrc5477_irq", .ack = vrc5477_irq_ack, .mask = vrc5477_irq_disable, .mask_ack = vrc5477_irq_ack, diff --git a/arch/mips/dec/Makefile b/arch/mips/dec/Makefile index ed181fdc3ac..8b790c2900d 100644 --- a/arch/mips/dec/Makefile +++ b/arch/mips/dec/Makefile @@ -6,6 +6,7 @@ obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \ kn02-irq.o kn02xa-berr.o reset.o setup.o time.o obj-$(CONFIG_PROM_CONSOLE) += promcon.o +obj-$(CONFIG_TC) += tc.o obj-$(CONFIG_CPU_HAS_WB) += wbflush.o EXTRA_AFLAGS := $(CFLAGS) diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c index 4c7cb4048d3..3acb133668d 100644 --- a/arch/mips/dec/ioasic-irq.c +++ b/arch/mips/dec/ioasic-irq.c @@ -62,7 +62,7 @@ static inline void end_ioasic_irq(unsigned int irq) } static struct irq_chip ioasic_irq_type = { - .typename = "IO-ASIC", + .name = "IO-ASIC", .ack = ack_ioasic_irq, .mask = mask_ioasic_irq, .mask_ack = ack_ioasic_irq, @@ -84,7 +84,7 @@ static inline void end_ioasic_dma_irq(unsigned int irq) } static struct irq_chip ioasic_dma_irq_type = { - .typename = "IO-ASIC-DMA", + .name = "IO-ASIC-DMA", .ack = ack_ioasic_dma_irq, .mask = mask_ioasic_dma_irq, .mask_ack = ack_ioasic_dma_irq, diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index 916e46b8ccd..02439dc0ba8 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -58,7 +58,7 @@ static void ack_kn02_irq(unsigned int irq) } static struct irq_chip kn02_irq_type = { - .typename = "KN02-CSR", + .name = "KN02-CSR", .ack = ack_kn02_irq, .mask = mask_kn02_irq, .mask_ack = ack_kn02_irq, diff --git a/arch/mips/dec/prom/identify.c b/arch/mips/dec/prom/identify.c index 81d5e878ddc..c4e3c1ea0d4 100644 --- a/arch/mips/dec/prom/identify.c +++ b/arch/mips/dec/prom/identify.c @@ -88,6 +88,7 @@ static inline void prom_init_kn02(void) { dec_kn_slot_base = KN02_SLOT_BASE; dec_kn_slot_size = KN02_SLOT_SIZE; + dec_tc_bus = 1; dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + KN02_RTC); } @@ -96,6 +97,7 @@ static inline void prom_init_kn02xa(void) { dec_kn_slot_base = KN02XA_SLOT_BASE; dec_kn_slot_size = IOASIC_SLOT_SIZE; + dec_tc_bus = 1; ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); @@ -105,6 +107,7 @@ static inline void prom_init_kn03(void) { dec_kn_slot_base = KN03_SLOT_BASE; dec_kn_slot_size = IOASIC_SLOT_SIZE; + dec_tc_bus = 1; ioasic_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_IOCTL); dec_rtc_base = (void *)CKSEG1ADDR(dec_kn_slot_base + IOASIC_TOY); diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c index 3027ce78279..5a557e268f7 100644 --- a/arch/mips/dec/prom/memory.c +++ b/arch/mips/dec/prom/memory.c @@ -92,9 +92,9 @@ void __init prom_meminit(u32 magic) rex_setup_memory_region(); } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - unsigned long addr, end; + unsigned long end; /* * Free everything below the kernel itself but leave @@ -114,16 +114,5 @@ unsigned long __init prom_free_prom_memory(void) #endif end = __pa(&_text); - addr = PAGE_SIZE; - while (addr < end) { - ClearPageReserved(virt_to_page(__va(addr))); - init_page_count(virt_to_page(__va(addr))); - free_page((unsigned long)__va(addr)); - addr += PAGE_SIZE; - } - - printk("Freeing unused PROM memory: %ldk freed\n", - (end - PAGE_SIZE) >> 10); - - return end - PAGE_SIZE; + free_init_pages("unused PROM memory", PAGE_SIZE, end); } diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index d34032ac492..b8a5e75ba0a 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c @@ -53,6 +53,8 @@ unsigned long dec_kn_slot_base, dec_kn_slot_size; EXPORT_SYMBOL(dec_kn_slot_base); EXPORT_SYMBOL(dec_kn_slot_size); +int dec_tc_bus; + spinlock_t ioasic_ssr_lock; volatile u32 *ioasic_base; @@ -234,7 +236,7 @@ static void __init dec_init_kn01(void) memcpy(&cpu_mask_nr_tbl, &kn01_cpu_mask_nr_tbl, sizeof(kn01_cpu_mask_nr_tbl)); - mips_cpu_irq_init(DEC_CPU_IRQ_BASE); + mips_cpu_irq_init(); } /* dec_init_kn01 */ @@ -309,7 +311,7 @@ static void __init dec_init_kn230(void) memcpy(&cpu_mask_nr_tbl, &kn230_cpu_mask_nr_tbl, sizeof(kn230_cpu_mask_nr_tbl)); - mips_cpu_irq_init(DEC_CPU_IRQ_BASE); + mips_cpu_irq_init(); } /* dec_init_kn230 */ @@ -403,7 +405,7 @@ static void __init dec_init_kn02(void) memcpy(&asic_mask_nr_tbl, &kn02_asic_mask_nr_tbl, sizeof(kn02_asic_mask_nr_tbl)); - mips_cpu_irq_init(DEC_CPU_IRQ_BASE); + mips_cpu_irq_init(); init_kn02_irqs(KN02_IRQ_BASE); } /* dec_init_kn02 */ @@ -504,7 +506,7 @@ static void __init dec_init_kn02ba(void) memcpy(&asic_mask_nr_tbl, &kn02ba_asic_mask_nr_tbl, sizeof(kn02ba_asic_mask_nr_tbl)); - mips_cpu_irq_init(DEC_CPU_IRQ_BASE); + mips_cpu_irq_init(); init_ioasic_irqs(IO_IRQ_BASE); } /* dec_init_kn02ba */ @@ -601,7 +603,7 @@ static void __init dec_init_kn02ca(void) memcpy(&asic_mask_nr_tbl, &kn02ca_asic_mask_nr_tbl, sizeof(kn02ca_asic_mask_nr_tbl)); - mips_cpu_irq_init(DEC_CPU_IRQ_BASE); + mips_cpu_irq_init(); init_ioasic_irqs(IO_IRQ_BASE); } /* dec_init_kn02ca */ @@ -702,7 +704,7 @@ static void __init dec_init_kn03(void) memcpy(&asic_mask_nr_tbl, &kn03_asic_mask_nr_tbl, sizeof(kn03_asic_mask_nr_tbl)); - mips_cpu_irq_init(DEC_CPU_IRQ_BASE); + mips_cpu_irq_init(); init_ioasic_irqs(IO_IRQ_BASE); } /* dec_init_kn03 */ diff --git a/arch/mips/dec/tc.c b/arch/mips/dec/tc.c new file mode 100644 index 00000000000..732027c7983 --- /dev/null +++ b/arch/mips/dec/tc.c @@ -0,0 +1,95 @@ +/* + * TURBOchannel architecture calls. + * + * Copyright (c) Harald Koerfgen, 1998 + * Copyright (c) 2001, 2003, 2005, 2006 Maciej W. Rozycki + * Copyright (c) 2005 James Simmons + * + * This file is subject to the terms and conditions of the GNU + * General Public License. See the file "COPYING" in the main + * directory of this archive for more details. + */ +#include <linux/compiler.h> +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/string.h> +#include <linux/tc.h> +#include <linux/types.h> + +#include <asm/addrspace.h> +#include <asm/bootinfo.h> +#include <asm/paccess.h> + +#include <asm/dec/interrupts.h> +#include <asm/dec/prom.h> +#include <asm/dec/system.h> + +/* + * Protected read byte from TURBOchannel slot space. + */ +int tc_preadb(u8 *valp, void __iomem *addr) +{ + return get_dbe(*valp, (u8 *)addr); +} + +/* + * Get TURBOchannel bus information as specified by the spec, plus + * the slot space base address and the number of slots. + */ +int __init tc_bus_get_info(struct tc_bus *tbus) +{ + if (!dec_tc_bus) + return -ENXIO; + + memcpy(&tbus->info, rex_gettcinfo(), sizeof(tbus->info)); + tbus->slot_base = CPHYSADDR((long)rex_slot_address(0)); + + switch (mips_machtype) { + case MACH_DS5000_200: + tbus->num_tcslots = 7; + break; + case MACH_DS5000_2X0: + case MACH_DS5900: + tbus->ext_slot_base = 0x20000000; + tbus->ext_slot_size = 0x20000000; + /* fall through */ + case MACH_DS5000_1XX: + tbus->num_tcslots = 3; + break; + case MACH_DS5000_XX: + tbus->num_tcslots = 2; + default: + break; + } + return 0; +} + +/* + * Get the IRQ for the specified slot. + */ +void __init tc_device_get_irq(struct tc_dev *tdev) +{ + switch (tdev->slot) { + case 0: + tdev->interrupt = dec_interrupt[DEC_IRQ_TC0]; + break; + case 1: + tdev->interrupt = dec_interrupt[DEC_IRQ_TC1]; + break; + case 2: + tdev->interrupt = dec_interrupt[DEC_IRQ_TC2]; + break; + /* + * Yuck! DS5000/200 onboard devices + */ + case 5: + tdev->interrupt = dec_interrupt[DEC_IRQ_TC5]; + break; + case 6: + tdev->interrupt = dec_interrupt[DEC_IRQ_TC6]; + break; + default: + tdev->interrupt = -1; + break; + } +} diff --git a/arch/mips/defconfig b/arch/mips/defconfig index 21d53e0c9ee..f9812d1e457 100644 --- a/arch/mips/defconfig +++ b/arch/mips/defconfig @@ -59,7 +59,7 @@ CONFIG_SGI_IP22=y # CONFIG_SIBYTE_LITTLESUR is not set # CONFIG_SIBYTE_CRHINE is not set # CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SNI_RM200_PCI is not set +# CONFIG_SNI_RM is not set # CONFIG_TOSHIBA_JMR3927 is not set # CONFIG_TOSHIBA_RBTX4927 is not set # CONFIG_TOSHIBA_RBTX4938 is not set diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c index 8d880f0b06e..96df37b7775 100644 --- a/arch/mips/emma2rh/common/irq_emma2rh.c +++ b/arch/mips/emma2rh/common/irq_emma2rh.c @@ -57,7 +57,7 @@ static void emma2rh_irq_disable(unsigned int irq) } struct irq_chip emma2rh_irq_controller = { - .typename = "emma2rh_irq", + .name = "emma2rh_irq", .ack = emma2rh_irq_disable, .mask = emma2rh_irq_disable, .mask_ack = emma2rh_irq_disable, diff --git a/arch/mips/emma2rh/markeins/irq.c b/arch/mips/emma2rh/markeins/irq.c index c93369cb411..3299b6dfe76 100644 --- a/arch/mips/emma2rh/markeins/irq.c +++ b/arch/mips/emma2rh/markeins/irq.c @@ -106,7 +106,7 @@ void __init arch_init_irq(void) emma2rh_irq_init(EMMA2RH_IRQ_BASE); emma2rh_sw_irq_init(EMMA2RH_SW_IRQ_BASE); emma2rh_gpio_irq_init(EMMA2RH_GPIO_IRQ_BASE); - mips_cpu_irq_init(CPU_IRQ_BASE); + mips_cpu_irq_init(); /* setup cascade interrupts */ setup_irq(EMMA2RH_IRQ_BASE + EMMA2RH_SW_CASCADE, &irq_cascade); diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c index 2116d9be5fa..fba5c156f47 100644 --- a/arch/mips/emma2rh/markeins/irq_markeins.c +++ b/arch/mips/emma2rh/markeins/irq_markeins.c @@ -49,7 +49,7 @@ static void emma2rh_sw_irq_disable(unsigned int irq) } struct irq_chip emma2rh_sw_irq_controller = { - .typename = "emma2rh_sw_irq", + .name = "emma2rh_sw_irq", .ack = emma2rh_sw_irq_disable, .mask = emma2rh_sw_irq_disable, .mask_ack = emma2rh_sw_irq_disable, @@ -115,7 +115,7 @@ static void emma2rh_gpio_irq_end(unsigned int irq) } struct irq_chip emma2rh_gpio_irq_controller = { - .typename = "emma2rh_gpio_irq", + .name = "emma2rh_gpio_irq", .ack = emma2rh_gpio_irq_ack, .mask = emma2rh_gpio_irq_disable, .mask_ack = emma2rh_gpio_irq_ack, diff --git a/arch/mips/gt64120/ev64120/irq.c b/arch/mips/gt64120/ev64120/irq.c index b3e5796c81d..04572b9c964 100644 --- a/arch/mips/gt64120/ev64120/irq.c +++ b/arch/mips/gt64120/ev64120/irq.c @@ -88,7 +88,7 @@ static void end_ev64120_irq(unsigned int irq) } static struct irq_chip ev64120_irq_type = { - .typename = "EV64120", + .name = "EV64120", .ack = disable_ev64120_irq, .mask = disable_ev64120_irq, .mask_ack = disable_ev64120_irq, diff --git a/arch/mips/gt64120/ev64120/setup.c b/arch/mips/gt64120/ev64120/setup.c index 99c8d42212e..477848c22a2 100644 --- a/arch/mips/gt64120/ev64120/setup.c +++ b/arch/mips/gt64120/ev64120/setup.c @@ -59,9 +59,8 @@ extern void galileo_machine_power_off(void); */ extern struct pci_ops galileo_pci_ops; -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } /* diff --git a/arch/mips/gt64120/momenco_ocelot/dbg_io.c b/arch/mips/gt64120/momenco_ocelot/dbg_io.c index 2128684584f..32d6fb4ee67 100644 --- a/arch/mips/gt64120/momenco_ocelot/dbg_io.c +++ b/arch/mips/gt64120/momenco_ocelot/dbg_io.c @@ -1,6 +1,4 @@ -#ifdef CONFIG_KGDB - #include <asm/serial.h> /* For the serial port location and base baud */ /* --- CONFIG --- */ @@ -121,5 +119,3 @@ int putDebugChar(uint8 byte) UART16550_WRITE(OFS_SEND_BUFFER, byte); return 1; } - -#endif diff --git a/arch/mips/gt64120/momenco_ocelot/irq.c b/arch/mips/gt64120/momenco_ocelot/irq.c index d9294401ccb..2585d9dbda3 100644 --- a/arch/mips/gt64120/momenco_ocelot/irq.c +++ b/arch/mips/gt64120/momenco_ocelot/irq.c @@ -90,6 +90,6 @@ void __init arch_init_irq(void) clear_c0_status(ST0_IM); local_irq_disable(); - mips_cpu_irq_init(0); - rm7k_cpu_irq_init(8); + mips_cpu_irq_init(); + rm7k_cpu_irq_init(); } diff --git a/arch/mips/gt64120/momenco_ocelot/prom.c b/arch/mips/gt64120/momenco_ocelot/prom.c index 8677b6d3ada..78f393b2afd 100644 --- a/arch/mips/gt64120/momenco_ocelot/prom.c +++ b/arch/mips/gt64120/momenco_ocelot/prom.c @@ -67,7 +67,6 @@ void __init prom_init(void) add_memory_region(0, 64 << 20, BOOT_MEM_RAM); } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } diff --git a/arch/mips/gt64120/wrppmc/irq.c b/arch/mips/gt64120/wrppmc/irq.c index eedfc24e1ea..d3d96591780 100644 --- a/arch/mips/gt64120/wrppmc/irq.c +++ b/arch/mips/gt64120/wrppmc/irq.c @@ -63,7 +63,7 @@ void gt64120_init_pic(void) void __init arch_init_irq(void) { /* IRQ 0 - 7 are for MIPS common irq_cpu controller */ - mips_cpu_irq_init(0); + mips_cpu_irq_init(); gt64120_init_pic(); } diff --git a/arch/mips/gt64120/wrppmc/setup.c b/arch/mips/gt64120/wrppmc/setup.c index 429afc400cb..121188d5ec4 100644 --- a/arch/mips/gt64120/wrppmc/setup.c +++ b/arch/mips/gt64120/wrppmc/setup.c @@ -93,9 +93,8 @@ void __init wrppmc_early_printk(const char *fmt, ...) } #endif /* WRPPMC_EARLY_DEBUG */ -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } #ifdef CONFIG_SERIAL_8250 diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c index f8d417b5c2b..295892e4ce5 100644 --- a/arch/mips/jazz/irq.c +++ b/arch/mips/jazz/irq.c @@ -40,7 +40,7 @@ void disable_r4030_irq(unsigned int irq) } static struct irq_chip r4030_irq_type = { - .typename = "R4030", + .name = "R4030", .ack = disable_r4030_irq, .mask = disable_r4030_irq, .mask_ack = disable_r4030_irq, diff --git a/arch/mips/jmr3927/common/prom.c b/arch/mips/jmr3927/common/prom.c index 5d5838f41d2..aa481b774c4 100644 --- a/arch/mips/jmr3927/common/prom.c +++ b/arch/mips/jmr3927/common/prom.c @@ -75,7 +75,6 @@ void __init prom_init_cmdline(void) *cp = '\0'; } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index 3da49c5aaf4..7d2c203cb40 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c @@ -439,7 +439,7 @@ void __init arch_init_irq(void) } static struct irq_chip jmr3927_irq_controller = { - .typename = "jmr3927_irq", + .name = "jmr3927_irq", .ack = jmr3927_irq_ack, .mask = jmr3927_irq_disable, .mask_ack = jmr3927_irq_ack, diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index 138f25efe38..7ca3d6d07b3 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c @@ -434,7 +434,7 @@ void __init tx3927_setup(void) /* DMA */ tx3927_dmaptr->mcr = 0; - for (i = 0; i < sizeof(tx3927_dmaptr->ch) / sizeof(tx3927_dmaptr->ch[0]); i++) { + for (i = 0; i < ARRAY_SIZE(tx3927_dmaptr->ch); i++) { /* reset channel */ tx3927_dmaptr->ch[i].ccr = TX3927_DMA_CCR_CHRST; tx3927_dmaptr->ch[i].ccr = 0; diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index bbbb8d7cb89..1bf2c844891 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile @@ -14,8 +14,6 @@ binfmt_irix-objs := irixelf.o irixinv.o irixioctl.o irixsig.o \ obj-$(CONFIG_STACKTRACE) += stacktrace.o obj-$(CONFIG_MODULES) += mips_ksyms.o module.o -obj-$(CONFIG_APM) += apm.o - obj-$(CONFIG_CPU_R3000) += r2300_fpu.o r2300_switch.o obj-$(CONFIG_CPU_TX39XX) += r2300_fpu.o r2300_switch.o obj-$(CONFIG_CPU_TX49XX) += r4k_fpu.o r4k_switch.o diff --git a/arch/mips/kernel/apm.c b/arch/mips/kernel/apm.c deleted file mode 100644 index 528e731049c..00000000000 --- a/arch/mips/kernel/apm.c +++ /dev/null @@ -1,604 +0,0 @@ -/* - * bios-less APM driver for MIPS Linux - * Jamey Hicks <jamey@crl.dec.com> - * adapted from the APM BIOS driver for Linux by Stephen Rothwell (sfr@linuxcare.com) - * - * APM 1.2 Reference: - * Intel Corporation, Microsoft Corporation. Advanced Power Management - * (APM) BIOS Interface Specification, Revision 1.2, February 1996. - * - * [This document is available from Microsoft at: - * http://www.microsoft.com/hwdev/busbios/amp_12.htm] - */ -#include <linux/module.h> -#include <linux/poll.h> -#include <linux/timer.h> -#include <linux/slab.h> -#include <linux/proc_fs.h> -#include <linux/miscdevice.h> -#include <linux/apm_bios.h> -#include <linux/capability.h> -#include <linux/sched.h> -#include <linux/pm.h> -#include <linux/device.h> -#include <linux/kernel.h> -#include <linux/list.h> -#include <linux/init.h> -#include <linux/completion.h> - -#include <asm/apm.h> /* apm_power_info */ -#include <asm/system.h> - -/* - * The apm_bios device is one of the misc char devices. - * This is its minor number. - */ -#define APM_MINOR_DEV 134 - -/* - * See Documentation/Config.help for the configuration options. - * - * Various options can be changed at boot time as follows: - * (We allow underscores for compatibility with the modules code) - * apm=on/off enable/disable APM - */ - -/* - * Maximum number of events stored - */ -#define APM_MAX_EVENTS 16 - -struct apm_queue { - unsigned int event_head; - unsigned int event_tail; - apm_event_t events[APM_MAX_EVENTS]; -}; - -/* - * The per-file APM data - */ -struct apm_user { - struct list_head list; - - unsigned int suser: 1; - unsigned int writer: 1; - unsigned int reader: 1; - - int suspend_result; - unsigned int suspend_state; -#define SUSPEND_NONE 0 /* no suspend pending */ -#define SUSPEND_PENDING 1 /* suspend pending read */ -#define SUSPEND_READ 2 /* suspend read, pending ack */ -#define SUSPEND_ACKED 3 /* suspend acked */ -#define SUSPEND_DONE 4 /* suspend completed */ - - struct apm_queue queue; -}; - -/* - * Local variables - */ -static int suspends_pending; -static int apm_disabled; -static int mips_apm_active; - -static DECLARE_WAIT_QUEUE_HEAD(apm_waitqueue); -static DECLARE_WAIT_QUEUE_HEAD(apm_suspend_waitqueue); - -/* - * This is a list of everyone who has opened /dev/apm_bios - */ -static DECLARE_RWSEM(user_list_lock); -static LIST_HEAD(apm_user_list); - -/* - * kapmd info. kapmd provides us a process context to handle - * "APM" events within - specifically necessary if we're going - * to be suspending the system. - */ -static DECLARE_WAIT_QUEUE_HEAD(kapmd_wait); -static DECLARE_COMPLETION(kapmd_exit); -static DEFINE_SPINLOCK(kapmd_queue_lock); -static struct apm_queue kapmd_queue; - - -static const char driver_version[] = "1.13"; /* no spaces */ - - - -/* - * Compatibility cruft until the IPAQ people move over to the new - * interface. - */ -static void __apm_get_power_status(struct apm_power_info *info) -{ -} - -/* - * This allows machines to provide their own "apm get power status" function. - */ -void (*apm_get_power_status)(struct apm_power_info *) = __apm_get_power_status; -EXPORT_SYMBOL(apm_get_power_status); - - -/* - * APM event queue management. - */ -static inline int queue_empty(struct apm_queue *q) -{ - return q->event_head == q->event_tail; -} - -static inline apm_event_t queue_get_event(struct apm_queue *q) -{ - q->event_tail = (q->event_tail + 1) % APM_MAX_EVENTS; - return q->events[q->event_tail]; -} - -static void queue_add_event(struct apm_queue *q, apm_event_t event) -{ - q->event_head = (q->event_head + 1) % APM_MAX_EVENTS; - if (q->event_head == q->event_tail) { - static int notified; - - if (notified++ == 0) - printk(KERN_ERR "apm: an event queue overflowed\n"); - q->event_tail = (q->event_tail + 1) % APM_MAX_EVENTS; - } - q->events[q->event_head] = event; -} - -static void queue_event_one_user(struct apm_user *as, apm_event_t event) -{ - if (as->suser && as->writer) { - switch (event) { - case APM_SYS_SUSPEND: - case APM_USER_SUSPEND: - /* - * If this user already has a suspend pending, - * don't queue another one. - */ - if (as->suspend_state != SUSPEND_NONE) - return; - - as->suspend_state = SUSPEND_PENDING; - suspends_pending++; - break; - } - } - queue_add_event(&as->queue, event); -} - -static void queue_event(apm_event_t event, struct apm_user *sender) -{ - struct apm_user *as; - - down_read(&user_list_lock); - list_for_each_entry(as, &apm_user_list, list) { - if (as != sender && as->reader) - queue_event_one_user(as, event); - } - up_read(&user_list_lock); - wake_up_interruptible(&apm_waitqueue); -} - -static void apm_suspend(void) -{ - struct apm_user *as; - int err = pm_suspend(PM_SUSPEND_MEM); - - /* - * Anyone on the APM queues will think we're still suspended. - * Send a message so everyone knows we're now awake again. - */ - queue_event(APM_NORMAL_RESUME, NULL); - - /* - * Finally, wake up anyone who is sleeping on the suspend. - */ - down_read(&user_list_lock); - list_for_each_entry(as, &apm_user_list, list) { - as->suspend_result = err; - as->suspend_state = SUSPEND_DONE; - } - up_read(&user_list_lock); - - wake_up(&apm_suspend_waitqueue); -} - -static ssize_t apm_read(struct file *fp, char __user *buf, size_t count, loff_t *ppos) -{ - struct apm_user *as = fp->private_data; - apm_event_t event; - int i = count, ret = 0; - - if (count < sizeof(apm_event_t)) - return -EINVAL; - - if (queue_empty(&as->queue) && fp->f_flags & O_NONBLOCK) - return -EAGAIN; - - wait_event_interruptible(apm_waitqueue, !queue_empty(&as->queue)); - - while ((i >= sizeof(event)) && !queue_empty(&as->queue)) { - event = queue_get_event(&as->queue); - - ret = -EFAULT; - if (copy_to_user(buf, &event, sizeof(event))) - break; - - if (event == APM_SYS_SUSPEND || event == APM_USER_SUSPEND) - as->suspend_state = SUSPEND_READ; - - buf += sizeof(event); - i -= sizeof(event); - } - - if (i < count) - ret = count - i; - - return ret; -} - -static unsigned int apm_poll(struct file *fp, poll_table * wait) -{ - struct apm_user *as = fp->private_data; - - poll_wait(fp, &apm_waitqueue, wait); - return queue_empty(&as->queue) ? 0 : POLLIN | POLLRDNORM; -} - -/* - * apm_ioctl - handle APM ioctl - * - * APM_IOC_SUSPEND - * This IOCTL is overloaded, and performs two functions. It is used to: - * - initiate a suspend - * - acknowledge a suspend read from /dev/apm_bios. - * Only when everyone who has opened /dev/apm_bios with write permission - * has acknowledge does the actual suspend happen. - */ -static int -apm_ioctl(struct inode * inode, struct file *filp, unsigned int cmd, unsigned long arg) -{ - struct apm_user *as = filp->private_data; - unsigned long flags; - int err = -EINVAL; - - if (!as->suser || !as->writer) - return -EPERM; - - switch (cmd) { - case APM_IOC_SUSPEND: - as->suspend_result = -EINTR; - - if (as->suspend_state == SUSPEND_READ) { - /* - * If we read a suspend command from /dev/apm_bios, - * then the corresponding APM_IOC_SUSPEND ioctl is - * interpreted as an acknowledge. - */ - as->suspend_state = SUSPEND_ACKED; - suspends_pending--; - } else { - /* - * Otherwise it is a request to suspend the system. - * Queue an event for all readers, and expect an - * acknowledge from all writers who haven't already - * acknowledged. - */ - queue_event(APM_USER_SUSPEND, as); - } - - /* - * If there are no further acknowledges required, suspend - * the system. - */ - if (suspends_pending == 0) - apm_suspend(); - - /* - * Wait for the suspend/resume to complete. If there are - * pending acknowledges, we wait here for them. - * - * Note that we need to ensure that the PM subsystem does - * not kick us out of the wait when it suspends the threads. - */ - flags = current->flags; - current->flags |= PF_NOFREEZE; - - /* - * Note: do not allow a thread which is acking the suspend - * to escape until the resume is complete. - */ - if (as->suspend_state == SUSPEND_ACKED) - wait_event(apm_suspend_waitqueue, - as->suspend_state == SUSPEND_DONE); - else - wait_event_interruptible(apm_suspend_waitqueue, - as->suspend_state == SUSPEND_DONE); - - current->flags = flags; - err = as->suspend_result; - as->suspend_state = SUSPEND_NONE; - break; - } - - return err; -} - -static int apm_release(struct inode * inode, struct file * filp) -{ - struct apm_user *as = filp->private_data; - filp->private_data = NULL; - - down_write(&user_list_lock); - list_del(&as->list); - up_write(&user_list_lock); - - /* - * We are now unhooked from the chain. As far as new - * events are concerned, we no longer exist. However, we - * need to balance suspends_pending, which means the - * possibility of sleeping. - */ - if (as->suspend_state != SUSPEND_NONE) { - suspends_pending -= 1; - if (suspends_pending == 0) - apm_suspend(); - } - - kfree(as); - return 0; -} - -static int apm_open(struct inode * inode, struct file * filp) -{ - struct apm_user *as; - - as = (struct apm_user *)kzalloc(sizeof(*as), GFP_KERNEL); - if (as) { - /* - * XXX - this is a tiny bit broken, when we consider BSD - * process accounting. If the device is opened by root, we - * instantly flag that we used superuser privs. Who knows, - * we might close the device immediately without doing a - * privileged operation -- cevans - */ - as->suser = capable(CAP_SYS_ADMIN); - as->writer = (filp->f_mode & FMODE_WRITE) == FMODE_WRITE; - as->reader = (filp->f_mode & FMODE_READ) == FMODE_READ; - - down_write(&user_list_lock); - list_add(&as->list, &apm_user_list); - up_write(&user_list_lock); - - filp->private_data = as; - } - - return as ? 0 : -ENOMEM; -} - -static struct file_operations apm_bios_fops = { - .owner = THIS_MODULE, - .read = apm_read, - .poll = apm_poll, - .ioctl = apm_ioctl, - .open = apm_open, - .release = apm_release, -}; - -static struct miscdevice apm_device = { - .minor = APM_MINOR_DEV, - .name = "apm_bios", - .fops = &apm_bios_fops -}; - - -#ifdef CONFIG_PROC_FS -/* - * Arguments, with symbols from linux/apm_bios.h. - * - * 0) Linux driver version (this will change if format changes) - * 1) APM BIOS Version. Usually 1.0, 1.1 or 1.2. - * 2) APM flags from APM Installation Check (0x00): - * bit 0: APM_16_BIT_SUPPORT - * bit 1: APM_32_BIT_SUPPORT - * bit 2: APM_IDLE_SLOWS_CLOCK - * bit 3: APM_BIOS_DISABLED - * bit 4: APM_BIOS_DISENGAGED - * 3) AC line status - * 0x00: Off-line - * 0x01: On-line - * 0x02: On backup power (BIOS >= 1.1 only) - * 0xff: Unknown - * 4) Battery status - * 0x00: High - * 0x01: Low - * 0x02: Critical - * 0x03: Charging - * 0x04: Selected battery not present (BIOS >= 1.2 only) - * 0xff: Unknown - * 5) Battery flag - * bit 0: High - * bit 1: Low - * bit 2: Critical - * bit 3: Charging - * bit 7: No system battery - * 0xff: Unknown - * 6) Remaining battery life (percentage of charge): - * 0-100: valid - * -1: Unknown - * 7) Remaining battery life (time units): - * Number of remaining minutes or seconds - * -1: Unknown - * 8) min = minutes; sec = seconds - */ -static int apm_get_info(char *buf, char **start, off_t fpos, int length) -{ - struct apm_power_info info; - char *units; - int ret; - - info.ac_line_status = 0xff; - info.battery_status = 0xff; - info.battery_flag = 0xff; - info.battery_life = -1; - info.time = -1; - info.units = -1; - - if (apm_get_power_status) - apm_get_power_status(&info); - - switch (info.units) { - default: units = "?"; break; - case 0: units = "min"; break; - case 1: units = "sec"; break; - } - - ret = sprintf(buf, "%s 1.2 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n", - driver_version, APM_32_BIT_SUPPORT, - info.ac_line_status, info.battery_status, - info.battery_flag, info.battery_life, - info.time, units); - - return ret; -} -#endif - -static int kapmd(void *arg) -{ - daemonize("kapmd"); - current->flags |= PF_NOFREEZE; - - do { - apm_event_t event; - - wait_event_interruptible(kapmd_wait, - !queue_empty(&kapmd_queue) || !mips_apm_active); - - if (!mips_apm_active) - break; - - spin_lock_irq(&kapmd_queue_lock); - event = 0; - if (!queue_empty(&kapmd_queue)) - event = queue_get_event(&kapmd_queue); - spin_unlock_irq(&kapmd_queue_lock); - - switch (event) { - case 0: - break; - - case APM_LOW_BATTERY: - case APM_POWER_STATUS_CHANGE: - queue_event(event, NULL); - break; - - case APM_USER_SUSPEND: - case APM_SYS_SUSPEND: - queue_event(event, NULL); - if (suspends_pending == 0) - apm_suspend(); - break; - - case APM_CRITICAL_SUSPEND: - apm_suspend(); - break; - } - } while (1); - - complete_and_exit(&kapmd_exit, 0); -} - -static int __init apm_init(void) -{ - int ret; - - if (apm_disabled) { - printk(KERN_NOTICE "apm: disabled on user request.\n"); - return -ENODEV; - } - - mips_apm_active = 1; - - ret = kernel_thread(kapmd, NULL, CLONE_KERNEL); - if (ret < 0) { - mips_apm_active = 0; - return ret; - } - -#ifdef CONFIG_PROC_FS - create_proc_info_entry("apm", 0, NULL, apm_get_info); -#endif - - ret = misc_register(&apm_device); - if (ret != 0) { - remove_proc_entry("apm", NULL); - - mips_apm_active = 0; - wake_up(&kapmd_wait); - wait_for_completion(&kapmd_exit); - } - - return ret; -} - -static void __exit apm_exit(void) -{ - misc_deregister(&apm_device); - remove_proc_entry("apm", NULL); - - mips_apm_active = 0; - wake_up(&kapmd_wait); - wait_for_completion(&kapmd_exit); -} - -module_init(apm_init); -module_exit(apm_exit); - -MODULE_AUTHOR("Stephen Rothwell"); -MODULE_DESCRIPTION("Advanced Power Management"); -MODULE_LICENSE("GPL"); - -#ifndef MODULE -static int __init apm_setup(char *str) -{ - while ((str != NULL) && (*str != '\0')) { - if (strncmp(str, "off", 3) == 0) - apm_disabled = 1; - if (strncmp(str, "on", 2) == 0) - apm_disabled = 0; - str = strchr(str, ','); - if (str != NULL) - str += strspn(str, ", \t"); - } - return 1; -} - -__setup("apm=", apm_setup); -#endif - -/** - * apm_queue_event - queue an APM event for kapmd - * @event: APM event - * - * Queue an APM event for kapmd to process and ultimately take the - * appropriate action. Only a subset of events are handled: - * %APM_LOW_BATTERY - * %APM_POWER_STATUS_CHANGE - * %APM_USER_SUSPEND - * %APM_SYS_SUSPEND - * %APM_CRITICAL_SUSPEND - */ -void apm_queue_event(apm_event_t event) -{ - unsigned long flags; - - spin_lock_irqsave(&kapmd_queue_lock, flags); - queue_add_event(&kapmd_queue, event); - spin_unlock_irqrestore(&kapmd_queue_lock, flags); - - wake_up_interruptible(&kapmd_wait); -} -EXPORT_SYMBOL(apm_queue_event); diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index ff88b06f89d..ea7df4b8da3 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -234,10 +234,6 @@ void output_mm_defines(void) constant("#define _PMD_SHIFT ", PMD_SHIFT); constant("#define _PGDIR_SHIFT ", PGDIR_SHIFT); linefeed; - constant("#define _PGD_ORDER ", PGD_ORDER); - constant("#define _PMD_ORDER ", PMD_ORDER); - constant("#define _PTE_ORDER ", PTE_ORDER); - linefeed; constant("#define _PTRS_PER_PGD ", PTRS_PER_PGD); constant("#define _PTRS_PER_PMD ", PTRS_PER_PMD); constant("#define _PTRS_PER_PTE ", PTRS_PER_PTE); diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 442839e9578..f59ef271d24 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -565,7 +565,7 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) if (config3 & MIPS_CONF3_VEIC) c->options |= MIPS_CPU_VEIC; if (config3 & MIPS_CONF3_MT) - c->ases |= MIPS_ASE_MIPSMT; + c->ases |= MIPS_ASE_MIPSMT; return config3 & MIPS_CONF_M; } diff --git a/arch/mips/kernel/gdb-stub.c b/arch/mips/kernel/gdb-stub.c index 719d26968cb..7bc88204926 100644 --- a/arch/mips/kernel/gdb-stub.c +++ b/arch/mips/kernel/gdb-stub.c @@ -505,13 +505,13 @@ void show_gdbregs(struct gdb_regs * regs) */ printk("$0 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", regs->reg0, regs->reg1, regs->reg2, regs->reg3, - regs->reg4, regs->reg5, regs->reg6, regs->reg7); + regs->reg4, regs->reg5, regs->reg6, regs->reg7); printk("$8 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", regs->reg8, regs->reg9, regs->reg10, regs->reg11, - regs->reg12, regs->reg13, regs->reg14, regs->reg15); + regs->reg12, regs->reg13, regs->reg14, regs->reg15); printk("$16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", regs->reg16, regs->reg17, regs->reg18, regs->reg19, - regs->reg20, regs->reg21, regs->reg22, regs->reg23); + regs->reg20, regs->reg21, regs->reg22, regs->reg23); printk("$24: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n", regs->reg24, regs->reg25, regs->reg26, regs->reg27, regs->reg28, regs->reg29, regs->reg30, regs->reg31); diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S index a2e095adaa3..6f57ca44291 100644 --- a/arch/mips/kernel/head.S +++ b/arch/mips/kernel/head.S @@ -138,7 +138,7 @@ EXPORT(stext) # used for profiling EXPORT(_stext) -#if defined(CONFIG_QEMU) || defined(CONFIG_MIPS_SIM) +#ifdef CONFIG_MIPS_SIM /* * Give us a fighting chance of running if execution beings at the * kernel load address. This is needed because this platform does @@ -231,28 +231,3 @@ NESTED(smp_bootstrap, 16, sp) #endif /* CONFIG_SMP */ __FINIT - - .comm kernelsp, NR_CPUS * 8, 8 - .comm pgd_current, NR_CPUS * 8, 8 - - .comm fw_arg0, SZREG, SZREG # firmware arguments - .comm fw_arg1, SZREG, SZREG - .comm fw_arg2, SZREG, SZREG - .comm fw_arg3, SZREG, SZREG - - .macro page name, order - .comm \name, (_PAGE_SIZE << \order), (_PAGE_SIZE << \order) - .endm - - /* - * On 64-bit we've got three-level pagetables with a slightly - * different layout ... - */ - page swapper_pg_dir, _PGD_ORDER -#ifdef CONFIG_64BIT -#if defined(CONFIG_MODULES) && !defined(CONFIG_BUILD_ELF64) - page module_pg_dir, _PGD_ORDER -#endif - page invalid_pmd_table, _PMD_ORDER -#endif - page invalid_pte_table, _PTE_ORDER diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index b59a676c6d0..b33ba6cd7f5 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c @@ -54,9 +54,11 @@ static unsigned int cached_irq_mask = 0xffff; void disable_8259A_irq(unsigned int irq) { - unsigned int mask = 1 << irq; + unsigned int mask; unsigned long flags; + irq -= I8259A_IRQ_BASE; + mask = 1 << irq; spin_lock_irqsave(&i8259A_lock, flags); cached_irq_mask |= mask; if (irq & 8) @@ -68,9 +70,11 @@ void disable_8259A_irq(unsigned int irq) void enable_8259A_irq(unsigned int irq) { - unsigned int mask = ~(1 << irq); + unsigned int mask; unsigned long flags; + irq -= I8259A_IRQ_BASE; + mask = ~(1 << irq); spin_lock_irqsave(&i8259A_lock, flags); cached_irq_mask &= mask; if (irq & 8) @@ -82,10 +86,12 @@ void enable_8259A_irq(unsigned int irq) int i8259A_irq_pending(unsigned int irq) { - unsigned int mask = 1 << irq; + unsigned int mask; unsigned long flags; int ret; + irq -= I8259A_IRQ_BASE; + mask = 1 << irq; spin_lock_irqsave(&i8259A_lock, flags); if (irq < 8) ret = inb(PIC_MASTER_CMD) & mask; @@ -134,9 +140,11 @@ static inline int i8259A_irq_real(unsigned int irq) */ void mask_and_ack_8259A(unsigned int irq) { - unsigned int irqmask = 1 << irq; + unsigned int irqmask; unsigned long flags; + irq -= I8259A_IRQ_BASE; + irqmask = 1 << irq; spin_lock_irqsave(&i8259A_lock, flags); /* * Lightweight spurious IRQ detection. We do not want @@ -169,8 +177,8 @@ handle_real_irq: outb(0x60+irq,PIC_MASTER_CMD); /* 'Specific EOI to master */ } #ifdef CONFIG_MIPS_MT_SMTC - if (irq_hwmask[irq] & ST0_IM) - set_c0_status(irq_hwmask[irq] & ST0_IM); + if (irq_hwmask[irq] & ST0_IM) + set_c0_status(irq_hwmask[irq] & ST0_IM); #endif /* CONFIG_MIPS_MT_SMTC */ spin_unlock_irqrestore(&i8259A_lock, flags); return; @@ -322,8 +330,8 @@ void __init init_i8259_irqs (void) init_8259A(0); - for (i = 0; i < 16; i++) + for (i = I8259A_IRQ_BASE; i < I8259A_IRQ_BASE + 16; i++) set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq); - setup_irq(PIC_CASCADE_IR, &irq2); + setup_irq(I8259A_IRQ_BASE + PIC_CASCADE_IR, &irq2); } diff --git a/arch/mips/kernel/irixelf.c b/arch/mips/kernel/irixelf.c index 1bbefbf4337..3cc25c05d36 100644 --- a/arch/mips/kernel/irixelf.c +++ b/arch/mips/kernel/irixelf.c @@ -10,6 +10,8 @@ * Copyright (C) 1996 - 2004 David S. Miller <dm@engr.sgi.com> * Copyright (C) 2004 - 2005 Steven J. Hill <sjhill@realitydiluted.com> */ +#undef DEBUG + #include <linux/module.h> #include <linux/fs.h> #include <linux/stat.h> @@ -40,8 +42,6 @@ #include <linux/elf.h> -#undef DEBUG - static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs); static int load_irix_library(struct file *); static int irix_core_dump(long signr, struct pt_regs * regs, @@ -52,72 +52,102 @@ static struct linux_binfmt irix_format = { irix_core_dump, PAGE_SIZE }; -#ifdef DEBUG /* Debugging routines. */ static char *get_elf_p_type(Elf32_Word p_type) { - int i = (int) p_type; - - switch(i) { - case PT_NULL: return("PT_NULL"); break; - case PT_LOAD: return("PT_LOAD"); break; - case PT_DYNAMIC: return("PT_DYNAMIC"); break; - case PT_INTERP: return("PT_INTERP"); break; - case PT_NOTE: return("PT_NOTE"); break; - case PT_SHLIB: return("PT_SHLIB"); break; - case PT_PHDR: return("PT_PHDR"); break; - case PT_LOPROC: return("PT_LOPROC/REGINFO"); break; - case PT_HIPROC: return("PT_HIPROC"); break; - default: return("PT_BOGUS"); break; +#ifdef DEBUG + switch (p_type) { + case PT_NULL: + return "PT_NULL"; + break; + + case PT_LOAD: + return "PT_LOAD"; + break; + + case PT_DYNAMIC: + return "PT_DYNAMIC"; + break; + + case PT_INTERP: + return "PT_INTERP"; + break; + + case PT_NOTE: + return "PT_NOTE"; + break; + + case PT_SHLIB: + return "PT_SHLIB"; + break; + + case PT_PHDR: + return "PT_PHDR"; + break; + + case PT_LOPROC: + return "PT_LOPROC/REGINFO"; + break; + + case PT_HIPROC: + return "PT_HIPROC"; + break; + + default: + return "PT_BOGUS"; + break; } +#endif } static void print_elfhdr(struct elfhdr *ehp) { int i; - printk("ELFHDR: e_ident<"); - for(i = 0; i < (EI_NIDENT - 1); i++) printk("%x ", ehp->e_ident[i]); - printk("%x>\n", ehp->e_ident[i]); - printk(" e_type[%04x] e_machine[%04x] e_version[%08lx]\n", - (unsigned short) ehp->e_type, (unsigned short) ehp->e_machine, - (unsigned long) ehp->e_version); - printk(" e_entry[%08lx] e_phoff[%08lx] e_shoff[%08lx] " - "e_flags[%08lx]\n", - (unsigned long) ehp->e_entry, (unsigned long) ehp->e_phoff, - (unsigned long) ehp->e_shoff, (unsigned long) ehp->e_flags); - printk(" e_ehsize[%04x] e_phentsize[%04x] e_phnum[%04x]\n", - (unsigned short) ehp->e_ehsize, (unsigned short) ehp->e_phentsize, - (unsigned short) ehp->e_phnum); - printk(" e_shentsize[%04x] e_shnum[%04x] e_shstrndx[%04x]\n", - (unsigned short) ehp->e_shentsize, (unsigned short) ehp->e_shnum, - (unsigned short) ehp->e_shstrndx); + pr_debug("ELFHDR: e_ident<"); + for (i = 0; i < (EI_NIDENT - 1); i++) + pr_debug("%x ", ehp->e_ident[i]); + pr_debug("%x>\n", ehp->e_ident[i]); + pr_debug(" e_type[%04x] e_machine[%04x] e_version[%08lx]\n", + (unsigned short) ehp->e_type, (unsigned short) ehp->e_machine, + (unsigned long) ehp->e_version); + pr_debug(" e_entry[%08lx] e_phoff[%08lx] e_shoff[%08lx] " + "e_flags[%08lx]\n", + (unsigned long) ehp->e_entry, (unsigned long) ehp->e_phoff, + (unsigned long) ehp->e_shoff, (unsigned long) ehp->e_flags); + pr_debug(" e_ehsize[%04x] e_phentsize[%04x] e_phnum[%04x]\n", + (unsigned short) ehp->e_ehsize, + (unsigned short) ehp->e_phentsize, + (unsigned short) ehp->e_phnum); + pr_debug(" e_shentsize[%04x] e_shnum[%04x] e_shstrndx[%04x]\n", + (unsigned short) ehp->e_shentsize, + (unsigned short) ehp->e_shnum, + (unsigned short) ehp->e_shstrndx); } static void print_phdr(int i, struct elf_phdr *ep) { - printk("PHDR[%d]: p_type[%s] p_offset[%08lx] p_vaddr[%08lx] " - "p_paddr[%08lx]\n", i, get_elf_p_type(ep->p_type), - (unsigned long) ep->p_offset, (unsigned long) ep->p_vaddr, - (unsigned long) ep->p_paddr); - printk(" p_filesz[%08lx] p_memsz[%08lx] p_flags[%08lx] " - "p_align[%08lx]\n", (unsigned long) ep->p_filesz, - (unsigned long) ep->p_memsz, (unsigned long) ep->p_flags, - (unsigned long) ep->p_align); + pr_debug("PHDR[%d]: p_type[%s] p_offset[%08lx] p_vaddr[%08lx] " + "p_paddr[%08lx]\n", i, get_elf_p_type(ep->p_type), + (unsigned long) ep->p_offset, (unsigned long) ep->p_vaddr, + (unsigned long) ep->p_paddr); + pr_debug(" p_filesz[%08lx] p_memsz[%08lx] p_flags[%08lx] " + "p_align[%08lx]\n", (unsigned long) ep->p_filesz, + (unsigned long) ep->p_memsz, (unsigned long) ep->p_flags, + (unsigned long) ep->p_align); } static void dump_phdrs(struct elf_phdr *ep, int pnum) { int i; - for(i = 0; i < pnum; i++, ep++) { - if((ep->p_type == PT_LOAD) || - (ep->p_type == PT_INTERP) || - (ep->p_type == PT_PHDR)) + for (i = 0; i < pnum; i++, ep++) { + if ((ep->p_type == PT_LOAD) || + (ep->p_type == PT_INTERP) || + (ep->p_type == PT_PHDR)) print_phdr(i, ep); } } -#endif /* DEBUG */ static void set_brk(unsigned long start, unsigned long end) { @@ -156,11 +186,10 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc, elf_addr_t *envp; elf_addr_t *sp, *csp; -#ifdef DEBUG - printk("create_irix_tables: p[%p] argc[%d] envc[%d] " - "load_addr[%08x] interp_load_addr[%08x]\n", - p, argc, envc, load_addr, interp_load_addr); -#endif + pr_debug("create_irix_tables: p[%p] argc[%d] envc[%d] " + "load_addr[%08x] interp_load_addr[%08x]\n", + p, argc, envc, load_addr, interp_load_addr); + sp = (elf_addr_t *) (~15UL & (unsigned long) p); csp = sp; csp -= exec ? DLINFO_ITEMS*2 : 2; @@ -181,7 +210,7 @@ static unsigned long * create_irix_tables(char * p, int argc, int envc, sp -= 2; NEW_AUX_ENT(0, AT_NULL, 0); - if(exec) { + if (exec) { sp -= 11*2; NEW_AUX_ENT (0, AT_PHDR, load_addr + exec->e_phoff); @@ -245,9 +274,7 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex, last_bss = 0; error = load_addr = 0; -#ifdef DEBUG print_elfhdr(interp_elf_ex); -#endif /* First of all, some simple consistency checks */ if ((interp_elf_ex->e_type != ET_EXEC && @@ -258,7 +285,7 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex, } /* Now read in all of the header information */ - if(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum > PAGE_SIZE) { + if (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum > PAGE_SIZE) { printk("IRIX interp header bigger than a page (%d)\n", (sizeof(struct elf_phdr) * interp_elf_ex->e_phnum)); return 0xffffffff; @@ -267,15 +294,15 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex, elf_phdata = kmalloc(sizeof(struct elf_phdr) * interp_elf_ex->e_phnum, GFP_KERNEL); - if(!elf_phdata) { - printk("Cannot kmalloc phdata for IRIX interp.\n"); - return 0xffffffff; + if (!elf_phdata) { + printk("Cannot kmalloc phdata for IRIX interp.\n"); + return 0xffffffff; } /* If the size of this structure has changed, then punt, since * we will be doing the wrong thing. */ - if(interp_elf_ex->e_phentsize != 32) { + if (interp_elf_ex->e_phentsize != 32) { printk("IRIX interp e_phentsize == %d != 32 ", interp_elf_ex->e_phentsize); kfree(elf_phdata); @@ -286,61 +313,71 @@ static unsigned int load_irix_interp(struct elfhdr * interp_elf_ex, (char *) elf_phdata, sizeof(struct elf_phdr) * interp_elf_ex->e_phnum); -#ifdef DEBUG dump_phdrs(elf_phdata, interp_elf_ex->e_phnum); -#endif eppnt = elf_phdata; - for(i=0; i<interp_elf_ex->e_phnum; i++, eppnt++) { - if(eppnt->p_type == PT_LOAD) { - int elf_type = MAP_PRIVATE | MAP_DENYWRITE; - int elf_prot = 0; - unsigned long vaddr = 0; - if (eppnt->p_flags & PF_R) elf_prot = PROT_READ; - if (eppnt->p_flags & PF_W) elf_prot |= PROT_WRITE; - if (eppnt->p_flags & PF_X) elf_prot |= PROT_EXEC; - elf_type |= MAP_FIXED; - vaddr = eppnt->p_vaddr; - - pr_debug("INTERP do_mmap(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ", - interpreter, vaddr, - (unsigned long) (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)), - (unsigned long) elf_prot, (unsigned long) elf_type, - (unsigned long) (eppnt->p_offset & 0xfffff000)); - down_write(¤t->mm->mmap_sem); - error = do_mmap(interpreter, vaddr, - eppnt->p_filesz + (eppnt->p_vaddr & 0xfff), - elf_prot, elf_type, - eppnt->p_offset & 0xfffff000); - up_write(¤t->mm->mmap_sem); - - if(error < 0 && error > -1024) { - printk("Aieee IRIX interp mmap error=%d\n", error); - break; /* Real error */ - } - pr_debug("error=%08lx ", (unsigned long) error); - if(!load_addr && interp_elf_ex->e_type == ET_DYN) { - load_addr = error; - pr_debug("load_addr = error "); - } - - /* Find the end of the file mapping for this phdr, and keep - * track of the largest address we see for this. - */ - k = eppnt->p_vaddr + eppnt->p_filesz; - if(k > elf_bss) elf_bss = k; - - /* Do the same thing for the memory mapping - between - * elf_bss and last_bss is the bss section. - */ - k = eppnt->p_memsz + eppnt->p_vaddr; - if(k > last_bss) last_bss = k; - pr_debug("\n"); - } + for (i = 0; i < interp_elf_ex->e_phnum; i++, eppnt++) { + if (eppnt->p_type == PT_LOAD) { + int elf_type = MAP_PRIVATE | MAP_DENYWRITE; + int elf_prot = 0; + unsigned long vaddr = 0; + if (eppnt->p_flags & PF_R) + elf_prot = PROT_READ; + if (eppnt->p_flags & PF_W) + elf_prot |= PROT_WRITE; + if (eppnt->p_flags & PF_X) + elf_prot |= PROT_EXEC; + elf_type |= MAP_FIXED; + vaddr = eppnt->p_vaddr; + + pr_debug("INTERP do_mmap" + "(%p, %08lx, %08lx, %08lx, %08lx, %08lx) ", + interpreter, vaddr, + (unsigned long) + (eppnt->p_filesz + (eppnt->p_vaddr & 0xfff)), + (unsigned long) + elf_prot, (unsigned long) elf_type, + (unsigned long) + (eppnt->p_offset & 0xfffff000)); + + down_write(¤t->mm->mmap_sem); + error = do_mmap(interpreter, vaddr, + eppnt->p_filesz + (eppnt->p_vaddr & 0xfff), + elf_prot, elf_type, + eppnt->p_offset & 0xfffff000); + up_write(¤t->mm->mmap_sem); + + if (error < 0 && error > -1024) { + printk("Aieee IRIX interp mmap error=%d\n", + error); + break; /* Real error */ + } + pr_debug("error=%08lx ", (unsigned long) error); + if (!load_addr && interp_elf_ex->e_type == ET_DYN) { + load_addr = error; + pr_debug("load_addr = error "); + } + + /* + * Find the end of the file mapping for this phdr, and + * keep track of the largest address we see for this. + */ + k = eppnt->p_vaddr + eppnt->p_filesz; + if (k > elf_bss) + elf_bss = k; + + /* Do the same thing for the memory mapping - between + * elf_bss and last_bss is the bss section. + */ + k = eppnt->p_memsz + eppnt->p_vaddr; + if (k > last_bss) + last_bss = k; + pr_debug("\n"); + } } /* Now use mmap to map the library into memory. */ - if(error < 0 && error > -1024) { + if (error < 0 && error > -1024) { pr_debug("got error %d\n", error); kfree(elf_phdata); return 0xffffffff; @@ -377,7 +414,7 @@ static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm) return -ENOEXEC; /* First of all, some simple consistency checks */ - if((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) || + if ((ehp->e_type != ET_EXEC && ehp->e_type != ET_DYN) || !bprm->file->f_op->mmap) { return -ENOEXEC; } @@ -388,7 +425,7 @@ static int verify_binary(struct elfhdr *ehp, struct linux_binprm *bprm) * XXX all registers as 64bits on cpu's capable of this at * XXX exception time plus frob the XTLB exception vector. */ - if((ehp->e_flags & EF_MIPS_ABI2)) + if ((ehp->e_flags & EF_MIPS_ABI2)) return -ENOEXEC; return 0; @@ -410,7 +447,7 @@ static inline int look_for_irix_interpreter(char **name, struct file *file = NULL; *name = NULL; - for(i = 0; i < pnum; i++, epp++) { + for (i = 0; i < pnum; i++, epp++) { if (epp->p_type != PT_INTERP) continue; @@ -467,8 +504,8 @@ static inline void map_executable(struct file *fp, struct elf_phdr *epp, int pnu unsigned int tmp; int i, prot; - for(i = 0; i < pnum; i++, epp++) { - if(epp->p_type != PT_LOAD) + for (i = 0; i < pnum; i++, epp++) { + if (epp->p_type != PT_LOAD) continue; /* Map it. */ @@ -483,23 +520,23 @@ static inline void map_executable(struct file *fp, struct elf_phdr *epp, int pnu up_write(¤t->mm->mmap_sem); /* Fixup location tracking vars. */ - if((epp->p_vaddr & 0xfffff000) < *estack) + if ((epp->p_vaddr & 0xfffff000) < *estack) *estack = (epp->p_vaddr & 0xfffff000); - if(!*laddr) + if (!*laddr) *laddr = epp->p_vaddr - epp->p_offset; - if(epp->p_vaddr < *scode) + if (epp->p_vaddr < *scode) *scode = epp->p_vaddr; tmp = epp->p_vaddr + epp->p_filesz; - if(tmp > *ebss) + if (tmp > *ebss) *ebss = tmp; - if((epp->p_flags & PF_X) && *ecode < tmp) + if ((epp->p_flags & PF_X) && *ecode < tmp) *ecode = tmp; - if(*edata < tmp) + if (*edata < tmp) *edata = tmp; tmp = epp->p_vaddr + epp->p_memsz; - if(tmp > *ebrk) + if (tmp > *ebrk) *ebrk = tmp; } @@ -513,12 +550,12 @@ static inline int map_interpreter(struct elf_phdr *epp, struct elfhdr *ihp, int i; *eentry = 0xffffffff; - for(i = 0; i < pnum; i++, epp++) { - if(epp->p_type != PT_INTERP) + for (i = 0; i < pnum; i++, epp++) { + if (epp->p_type != PT_INTERP) continue; /* We should have fielded this error elsewhere... */ - if(*eentry != 0xffffffff) + if (*eentry != 0xffffffff) return -1; set_fs(old_fs); @@ -604,9 +641,7 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) if (elf_ex.e_shnum > 20) goto out; -#ifdef DEBUG print_elfhdr(&elf_ex); -#endif /* Now read in all of the header information */ size = elf_ex.e_phentsize * elf_ex.e_phnum; @@ -622,13 +657,11 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) if (retval < 0) goto out_free_ph; -#ifdef DEBUG dump_phdrs(elf_phdata, elf_ex.e_phnum); -#endif /* Set some things for later. */ - for(i = 0; i < elf_ex.e_phnum; i++) { - switch(elf_phdata[i].p_type) { + for (i = 0; i < elf_ex.e_phnum; i++) { + switch (elf_phdata[i].p_type) { case PT_INTERP: has_interp = 1; elf_ihdr = &elf_phdata[i]; @@ -667,7 +700,7 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) if (elf_interpreter) { retval = verify_irix_interpreter(&interp_elf_ex); - if(retval) + if (retval) goto out_free_interp; } @@ -706,12 +739,12 @@ static int load_irix_binary(struct linux_binprm * bprm, struct pt_regs * regs) &load_addr, &start_code, &elf_bss, &end_code, &end_data, &elf_brk); - if(elf_interpreter) { + if (elf_interpreter) { retval = map_interpreter(elf_phdata, &interp_elf_ex, interpreter, &interp_load_addr, elf_ex.e_phnum, old_fs, &elf_entry); kfree(elf_interpreter); - if(retval) { + if (retval) { set_fs(old_fs); printk("Unable to load IRIX ELF interpreter\n"); send_sig(SIGSEGV, current, 0); @@ -809,12 +842,12 @@ static int load_irix_library(struct file *file) return -ENOEXEC; /* First of all, some simple consistency checks. */ - if(elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 || + if (elf_ex.e_type != ET_EXEC || elf_ex.e_phnum > 2 || !file->f_op->mmap) return -ENOEXEC; /* Now read in all of the header information. */ - if(sizeof(struct elf_phdr) * elf_ex.e_phnum > PAGE_SIZE) + if (sizeof(struct elf_phdr) * elf_ex.e_phnum > PAGE_SIZE) return -ENOEXEC; elf_phdata = kmalloc(sizeof(struct elf_phdr) * elf_ex.e_phnum, GFP_KERNEL); @@ -825,15 +858,15 @@ static int load_irix_library(struct file *file) sizeof(struct elf_phdr) * elf_ex.e_phnum); j = 0; - for(i=0; i<elf_ex.e_phnum; i++) - if((elf_phdata + i)->p_type == PT_LOAD) j++; + for (i=0; i<elf_ex.e_phnum; i++) + if ((elf_phdata + i)->p_type == PT_LOAD) j++; - if(j != 1) { + if (j != 1) { kfree(elf_phdata); return -ENOEXEC; } - while(elf_phdata->p_type != PT_LOAD) elf_phdata++; + while (elf_phdata->p_type != PT_LOAD) elf_phdata++; /* Now use mmap to map the library into memory. */ down_write(¤t->mm->mmap_sem); @@ -889,9 +922,7 @@ unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt) return -EFAULT; } -#ifdef DEBUG dump_phdrs(user_phdrp, cnt); -#endif for (i = 0; i < cnt; i++, hp++) { if (__get_user(type, &hp->p_type)) @@ -905,14 +936,14 @@ unsigned long irix_mapelf(int fd, struct elf_phdr __user *user_phdrp, int cnt) filp = fget(fd); if (!filp) return -EACCES; - if(!filp->f_op) { + if (!filp->f_op) { printk("irix_mapelf: Bogon filp!\n"); fput(filp); return -EACCES; } hp = user_phdrp; - for(i = 0; i < cnt; i++, hp++) { + for (i = 0; i < cnt; i++, hp++) { int prot; retval = __get_user(vaddr, &hp->p_vaddr); @@ -1015,8 +1046,6 @@ static int notesize(struct memelfnote *en) return sz; } -/* #define DEBUG */ - #define DUMP_WRITE(addr, nr) \ if (!dump_write(file, (addr), (nr))) \ goto end_coredump; @@ -1093,9 +1122,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) segs++; } -#ifdef DEBUG - printk("irix_core_dump: %d segs taking %d bytes\n", segs, size); -#endif + pr_debug("irix_core_dump: %d segs taking %d bytes\n", segs, size); /* Set up header. */ memcpy(elf.e_ident, ELFMAG, SELFMAG); @@ -1145,7 +1172,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) psinfo.pr_pid = prstatus.pr_pid = current->pid; psinfo.pr_ppid = prstatus.pr_ppid = current->parent->pid; psinfo.pr_pgrp = prstatus.pr_pgrp = process_group(current); - psinfo.pr_sid = prstatus.pr_sid = current->signal->session; + psinfo.pr_sid = prstatus.pr_sid = process_session(current); if (current->pid == current->tgid) { /* * This is the record for the group leader. Add in the @@ -1221,7 +1248,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) struct elf_phdr phdr; int sz = 0; - for(i = 0; i < numnote; i++) + for (i = 0; i < numnote; i++) sz += notesize(¬es[i]); phdr.p_type = PT_NOTE; @@ -1241,7 +1268,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) dataoff = offset = roundup(offset, PAGE_SIZE); /* Write program headers for segments dump. */ - for(vma = current->mm->mmap, i = 0; + for (vma = current->mm->mmap, i = 0; i < segs && vma != NULL; vma = vma->vm_next) { struct elf_phdr phdr; size_t sz; @@ -1267,7 +1294,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) DUMP_WRITE(&phdr, sizeof(phdr)); } - for(i = 0; i < numnote; i++) + for (i = 0; i < numnote; i++) if (!writenote(¬es[i], file)) goto end_coredump; @@ -1275,7 +1302,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) DUMP_SEEK(dataoff); - for(i = 0, vma = current->mm->mmap; + for (i = 0, vma = current->mm->mmap; i < segs && vma != NULL; vma = vma->vm_next) { unsigned long addr = vma->vm_start; @@ -1284,9 +1311,7 @@ static int irix_core_dump(long signr, struct pt_regs * regs, struct file *file) if (!maydump(vma)) continue; i++; -#ifdef DEBUG - printk("elf_core_dump: writing %08lx %lx\n", addr, len); -#endif + pr_debug("elf_core_dump: writing %08lx %lx\n", addr, len); DUMP_WRITE((void __user *)addr, len); } diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index bcaad669608..2967537221e 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -112,7 +112,7 @@ msc_bind_eic_interrupt (unsigned int irq, unsigned int set) } struct irq_chip msc_levelirq_type = { - .typename = "SOC-it-Level", + .name = "SOC-it-Level", .ack = level_mask_and_ack_msc_irq, .mask = mask_msc_irq, .mask_ack = level_mask_and_ack_msc_irq, @@ -122,7 +122,7 @@ struct irq_chip msc_levelirq_type = { }; struct irq_chip msc_edgeirq_type = { - .typename = "SOC-it-Edge", + .name = "SOC-it-Edge", .ack = edge_mask_and_ack_msc_irq, .mask = mask_msc_irq, .mask_ack = edge_mask_and_ack_msc_irq, diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c index efbd219845b..3dd561832e4 100644 --- a/arch/mips/kernel/irq-mv6434x.c +++ b/arch/mips/kernel/irq-mv6434x.c @@ -23,13 +23,13 @@ static unsigned int irq_base; static inline int ls1bit32(unsigned int x) { - int b = 31, s; + int b = 31, s; - s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s; - s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s; - s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s; - s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s; - s = 1; if (x << 1 == 0) s = 0; b -= s; + s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s; + s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s; + s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s; + s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s; + s = 1; if (x << 1 == 0) s = 0; b -= s; return b; } @@ -92,7 +92,7 @@ void ll_mv64340_irq(void) } struct irq_chip mv64340_irq_type = { - .typename = "MV-64340", + .name = "MV-64340", .ack = mask_mv64340_irq, .mask = mask_mv64340_irq, .mask_ack = mask_mv64340_irq, diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 123324ba8c1..25073288348 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c @@ -17,28 +17,27 @@ #include <asm/mipsregs.h> #include <asm/system.h> -static int irq_base; - static inline void unmask_rm7k_irq(unsigned int irq) { - set_c0_intcontrol(0x100 << (irq - irq_base)); + set_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); } static inline void mask_rm7k_irq(unsigned int irq) { - clear_c0_intcontrol(0x100 << (irq - irq_base)); + clear_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); } static struct irq_chip rm7k_irq_controller = { - .typename = "RM7000", + .name = "RM7000", .ack = mask_rm7k_irq, .mask = mask_rm7k_irq, .mask_ack = mask_rm7k_irq, .unmask = unmask_rm7k_irq, }; -void __init rm7k_cpu_irq_init(int base) +void __init rm7k_cpu_irq_init(void) { + int base = RM7K_CPU_IRQ_BASE; int i; clear_c0_intcontrol(0x00000f00); /* Mask all */ @@ -46,6 +45,4 @@ void __init rm7k_cpu_irq_init(int base) for (i = base; i < base + 4; i++) set_irq_chip_and_handler(i, &rm7k_irq_controller, handle_level_irq); - - irq_base = base; } diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index 0e6f4c5349d..ae83d2df6f3 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c @@ -18,16 +18,14 @@ #include <asm/mipsregs.h> #include <asm/system.h> -static int irq_base; - static inline void unmask_rm9k_irq(unsigned int irq) { - set_c0_intcontrol(0x1000 << (irq - irq_base)); + set_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); } static inline void mask_rm9k_irq(unsigned int irq) { - clear_c0_intcontrol(0x1000 << (irq - irq_base)); + clear_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); } static inline void rm9k_cpu_irq_enable(unsigned int irq) @@ -39,15 +37,6 @@ static inline void rm9k_cpu_irq_enable(unsigned int irq) local_irq_restore(flags); } -static void rm9k_cpu_irq_disable(unsigned int irq) -{ - unsigned long flags; - - local_irq_save(flags); - mask_rm9k_irq(irq); - local_irq_restore(flags); -} - /* * Performance counter interrupts are global on all processors. */ @@ -81,7 +70,7 @@ static void rm9k_perfcounter_irq_shutdown(unsigned int irq) } static struct irq_chip rm9k_irq_controller = { - .typename = "RM9000", + .name = "RM9000", .ack = mask_rm9k_irq, .mask = mask_rm9k_irq, .mask_ack = mask_rm9k_irq, @@ -89,7 +78,7 @@ static struct irq_chip rm9k_irq_controller = { }; static struct irq_chip rm9k_perfcounter_irq = { - .typename = "RM9000", + .name = "RM9000", .startup = rm9k_perfcounter_irq_startup, .shutdown = rm9k_perfcounter_irq_shutdown, .ack = mask_rm9k_irq, @@ -102,8 +91,9 @@ unsigned int rm9000_perfcount_irq; EXPORT_SYMBOL(rm9000_perfcount_irq); -void __init rm9k_cpu_irq_init(int base) +void __init rm9k_cpu_irq_init(void) { + int base = RM9K_CPU_IRQ_BASE; int i; clear_c0_intcontrol(0x0000f000); /* Mask all */ @@ -115,6 +105,4 @@ void __init rm9k_cpu_irq_init(int base) rm9000_perfcount_irq = base + 1; set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, handle_level_irq); - - irq_base = base; } diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index fcc86b96ccf..7b66e03b589 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c @@ -25,7 +25,7 @@ * Don't even think about using this on SMP. You have been warned. * * This file exports one global function: - * void mips_cpu_irq_init(int irq_base); + * void mips_cpu_irq_init(void); */ #include <linux/init.h> #include <linux/interrupt.h> @@ -36,22 +36,20 @@ #include <asm/mipsmtregs.h> #include <asm/system.h> -static int mips_cpu_irq_base; - static inline void unmask_mips_irq(unsigned int irq) { - set_c0_status(0x100 << (irq - mips_cpu_irq_base)); + set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); irq_enable_hazard(); } static inline void mask_mips_irq(unsigned int irq) { - clear_c0_status(0x100 << (irq - mips_cpu_irq_base)); + clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); irq_disable_hazard(); } static struct irq_chip mips_cpu_irq_controller = { - .typename = "MIPS", + .name = "MIPS", .ack = mask_mips_irq, .mask = mask_mips_irq, .mask_ack = mask_mips_irq, @@ -70,7 +68,7 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) { unsigned int vpflags = dvpe(); - clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); + clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); unmask_mips_mt_irq(irq); @@ -84,13 +82,13 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) static void mips_mt_cpu_irq_ack(unsigned int irq) { unsigned int vpflags = dvpe(); - clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); + clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); mask_mips_mt_irq(irq); } static struct irq_chip mips_mt_cpu_irq_controller = { - .typename = "MIPS", + .name = "MIPS", .startup = mips_mt_cpu_irq_startup, .ack = mips_mt_cpu_irq_ack, .mask = mask_mips_mt_irq, @@ -99,8 +97,9 @@ static struct irq_chip mips_mt_cpu_irq_controller = { .eoi = unmask_mips_mt_irq, }; -void __init mips_cpu_irq_init(int irq_base) +void __init mips_cpu_irq_init(void) { + int irq_base = MIPS_CPU_IRQ_BASE; int i; /* Mask interrupts. */ @@ -118,6 +117,4 @@ void __init mips_cpu_irq_init(int irq_base) for (i = irq_base + 2; i < irq_base + 8; i++) set_irq_chip_and_handler(i, &mips_cpu_irq_controller, handle_level_irq); - - mips_cpu_irq_base = irq_base; } diff --git a/arch/mips/kernel/kspd.c b/arch/mips/kernel/kspd.c index 2c82412b9ef..5929f883e46 100644 --- a/arch/mips/kernel/kspd.c +++ b/arch/mips/kernel/kspd.c @@ -301,7 +301,7 @@ static void sp_cleanup(void) for (;;) { unsigned long set; i = j * __NFDBITS; - if (i >= fdt->max_fdset || i >= fdt->max_fds) + if (i >= fdt->max_fds) break; set = fdt->open_fds->fds_bits[j++]; while (set) { diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index b061c9aa630..0b8ce59429a 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c @@ -194,15 +194,15 @@ sysn32_waitid(int which, compat_pid_t pid, } struct sysinfo32 { - s32 uptime; - u32 loads[3]; - u32 totalram; - u32 freeram; - u32 sharedram; - u32 bufferram; - u32 totalswap; - u32 freeswap; - u16 procs; + s32 uptime; + u32 loads[3]; + u32 totalram; + u32 freeram; + u32 sharedram; + u32 bufferram; + u32 totalswap; + u32 freeswap; + u16 procs; u32 totalhigh; u32 freehigh; u32 mem_unit; @@ -440,14 +440,26 @@ sys32_ipc (u32 call, int first, int second, int third, u32 ptr, u32 fifth) } #ifdef CONFIG_MIPS32_N32 -asmlinkage long sysn32_semctl(int semid, int semnum, int cmd, union semun arg) +asmlinkage long sysn32_semctl(int semid, int semnum, int cmd, u32 arg) { /* compat_sys_semctl expects a pointer to union semun */ u32 __user *uptr = compat_alloc_user_space(sizeof(u32)); - if (put_user(ptr_to_compat(arg.__pad), uptr)) + if (put_user(arg, uptr)) return -EFAULT; return compat_sys_semctl(semid, semnum, cmd, uptr); } + +asmlinkage long sysn32_msgsnd(int msqid, u32 msgp, unsigned msgsz, int msgflg) +{ + return compat_sys_msgsnd(msqid, msgsz, msgflg, compat_ptr(msgp)); +} + +asmlinkage long sysn32_msgrcv(int msqid, u32 msgp, size_t msgsz, int msgtyp, + int msgflg) +{ + return compat_sys_msgrcv(msqid, msgsz, msgtyp, msgflg, IPC_64, + compat_ptr(msgp)); +} #endif struct sysctl_args32 @@ -546,7 +558,7 @@ extern asmlinkage long sys_ustat(dev_t dev, struct ustat __user * ubuf); asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32) { int err; - struct ustat tmp; + struct ustat tmp; struct ustat32 tmp32; mm_segment_t old_fs = get_fs(); @@ -557,11 +569,11 @@ asmlinkage int sys32_ustat(dev_t dev, struct ustat32 __user * ubuf32) if (err) goto out; - memset(&tmp32,0,sizeof(struct ustat32)); - tmp32.f_tfree = tmp.f_tfree; - tmp32.f_tinode = tmp.f_tinode; + memset(&tmp32,0,sizeof(struct ustat32)); + tmp32.f_tfree = tmp.f_tfree; + tmp32.f_tinode = tmp.f_tinode; - err = copy_to_user(ubuf32,&tmp32,sizeof(struct ustat32)) ? -EFAULT : 0; + err = copy_to_user(ubuf32,&tmp32,sizeof(struct ustat32)) ? -EFAULT : 0; out: return err; diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c index c1373a6e668..a32f6797353 100644 --- a/arch/mips/kernel/mips-mt.c +++ b/arch/mips/kernel/mips-mt.c @@ -96,6 +96,10 @@ asmlinkage long mipsmt_sys_sched_setaffinity(pid_t pid, unsigned int len, goto out_unlock; } + retval = security_task_setscheduler(p, 0, NULL); + if (retval) + goto out_unlock; + /* Record new user-specified CPU set for future reference */ p->thread.user_cpus_allowed = new_mask; @@ -141,8 +145,9 @@ asmlinkage long mipsmt_sys_sched_getaffinity(pid_t pid, unsigned int len, p = find_process_by_pid(pid); if (!p) goto out_unlock; - - retval = 0; + retval = security_task_getscheduler(p); + if (retval) + goto out_unlock; cpus_and(mask, p->thread.user_cpus_allowed, cpu_possible_map); diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c index f44a01357ad..2ef857c3ee5 100644 --- a/arch/mips/kernel/mips_ksyms.c +++ b/arch/mips/kernel/mips_ksyms.c @@ -46,5 +46,7 @@ EXPORT_SYMBOL(__strnlen_user_nocheck_asm); EXPORT_SYMBOL(__strnlen_user_asm); EXPORT_SYMBOL(csum_partial); +EXPORT_SYMBOL(csum_partial_copy_nocheck); +EXPORT_SYMBOL(__csum_partial_copy_user); EXPORT_SYMBOL(invalid_pte_table); diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 4ed37ba1973..5ddc2e9deec 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -31,13 +31,13 @@ static const char *cpu_name[] = { [CPU_R4000PC] = "R4000PC", [CPU_R4000SC] = "R4000SC", [CPU_R4000MC] = "R4000MC", - [CPU_R4200] = "R4200", + [CPU_R4200] = "R4200", [CPU_R4400PC] = "R4400PC", [CPU_R4400SC] = "R4400SC", [CPU_R4400MC] = "R4400MC", [CPU_R4600] = "R4600", [CPU_R6000] = "R6000", - [CPU_R6000A] = "R6000A", + [CPU_R6000A] = "R6000A", [CPU_R8000] = "R8000", [CPU_R10000] = "R10000", [CPU_R12000] = "R12000", @@ -46,14 +46,14 @@ static const char *cpu_name[] = { [CPU_R4650] = "R4650", [CPU_R4700] = "R4700", [CPU_R5000] = "R5000", - [CPU_R5000A] = "R5000A", + [CPU_R5000A] = "R5000A", [CPU_R4640] = "R4640", [CPU_NEVADA] = "Nevada", [CPU_RM7000] = "RM7000", [CPU_RM9000] = "RM9000", [CPU_R5432] = "R5432", [CPU_4KC] = "MIPS 4Kc", - [CPU_5KC] = "MIPS 5Kc", + [CPU_5KC] = "MIPS 5Kc", [CPU_R4310] = "R4310", [CPU_SB1] = "SiByte SB1", [CPU_SB1A] = "SiByte SB1A", diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index ec8209f3a0c..04e5b38d327 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -41,10 +41,6 @@ #include <asm/isadep.h> #include <asm/inst.h> #include <asm/stacktrace.h> -#ifdef CONFIG_MIPS_MT_SMTC -#include <asm/mipsmtregs.h> -extern void smtc_idle_loop_hook(void); -#endif /* CONFIG_MIPS_MT_SMTC */ /* * The idle thread. There's no useful work to be done, so just try to conserve @@ -57,6 +53,8 @@ ATTRIB_NORET void cpu_idle(void) while (1) { while (!need_resched()) { #ifdef CONFIG_MIPS_MT_SMTC + extern void smtc_idle_loop_hook(void); + smtc_idle_loop_hook(); #endif /* CONFIG_MIPS_MT_SMTC */ if (cpu_wait) diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S index 880fa6e841e..59c1577ecbb 100644 --- a/arch/mips/kernel/r4k_fpu.S +++ b/arch/mips/kernel/r4k_fpu.S @@ -114,6 +114,14 @@ LEAF(_save_fp_context32) */ LEAF(_restore_fp_context) EX lw t0, SC_FPC_CSR(a0) + + /* Fail if the CSR has exceptions pending */ + srl t1, t0, 5 + and t1, t0 + andi t1, 0x1f << 7 + bnez t1, fault + nop + #ifdef CONFIG_64BIT EX ldc1 $f1, SC_FPREGS+8(a0) EX ldc1 $f3, SC_FPREGS+24(a0) @@ -157,6 +165,14 @@ LEAF(_restore_fp_context) LEAF(_restore_fp_context32) /* Restore an o32 sigcontext. */ EX lw t0, SC32_FPC_CSR(a0) + + /* Fail if the CSR has exceptions pending */ + srl t1, t0, 5 + and t1, t0 + andi t1, 0x1f << 7 + bnez t1, fault + nop + EX ldc1 $f0, SC32_FPREGS+0(a0) EX ldc1 $f2, SC32_FPREGS+16(a0) EX ldc1 $f4, SC32_FPREGS+32(a0) @@ -177,9 +193,10 @@ LEAF(_restore_fp_context32) jr ra li v0, 0 # success END(_restore_fp_context32) - .set reorder #endif + .set reorder + .type fault@function .ent fault fault: li v0, -EFAULT # failure diff --git a/arch/mips/kernel/reset.c b/arch/mips/kernel/reset.c index 621037db229..060563a712b 100644 --- a/arch/mips/kernel/reset.c +++ b/arch/mips/kernel/reset.c @@ -23,6 +23,8 @@ void (*_machine_restart)(char *command); void (*_machine_halt)(void); void (*pm_power_off)(void); +EXPORT_SYMBOL(pm_power_off); + void machine_restart(char *command) { if (_machine_restart) diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c index 8c8c8324f77..8610f4a925e 100644 --- a/arch/mips/kernel/rtlx.c +++ b/arch/mips/kernel/rtlx.c @@ -63,7 +63,7 @@ extern void *vpe_get_shared(int index); static void rtlx_dispatch(void) { - do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ); + do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_RTLX_IRQ); } @@ -415,7 +415,7 @@ static unsigned int file_poll(struct file *file, poll_table * wait) int minor; unsigned int mask = 0; - minor = iminor(file->f_dentry->d_inode); + minor = iminor(file->f_path.dentry->d_inode); poll_wait(file, &channel_wqs[minor].rt_queue, wait); poll_wait(file, &channel_wqs[minor].lx_queue, wait); @@ -437,7 +437,7 @@ static unsigned int file_poll(struct file *file, poll_table * wait) static ssize_t file_read(struct file *file, char __user * buffer, size_t count, loff_t * ppos) { - int minor = iminor(file->f_dentry->d_inode); + int minor = iminor(file->f_path.dentry->d_inode); /* data available? */ if (!rtlx_read_poll(minor, (file->f_flags & O_NONBLOCK) ? 0 : 1)) { @@ -454,7 +454,7 @@ static ssize_t file_write(struct file *file, const char __user * buffer, struct rtlx_channel *rt; DECLARE_WAITQUEUE(wait, current); - minor = iminor(file->f_dentry->d_inode); + minor = iminor(file->f_path.dentry->d_inode); rt = &rtlx->channel[minor]; /* any space left... */ @@ -491,7 +491,7 @@ static struct irqaction rtlx_irq = { .name = "RTLX", }; -static int rtlx_irq_num = MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ; +static int rtlx_irq_num = MIPS_CPU_IRQ_BASE + MIPS_CPU_RTLX_IRQ; static char register_chrdev_failed[] __initdata = KERN_ERR "rtlx_module_init: unable to register device\n"; diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 34567d81f94..39add2341aa 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -187,8 +187,8 @@ EXPORT(sysn32_call_table) PTR sysn32_semctl PTR sys_shmdt /* 6065 */ PTR sys_msgget - PTR compat_sys_msgsnd - PTR compat_sys_msgrcv + PTR sysn32_msgsnd + PTR sysn32_msgrcv PTR compat_sys_msgctl PTR compat_sys_fcntl /* 6070 */ PTR sys_flock @@ -384,7 +384,7 @@ EXPORT(sysn32_call_table) PTR sys_readlinkat PTR sys_fchmodat PTR sys_faccessat - PTR sys_pselect6 + PTR compat_sys_pselect6 PTR sys_ppoll /* 6265 */ PTR sys_unshare PTR sys_splice diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index e91379c1be1..c58b8e0105e 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -506,7 +506,7 @@ sys_call_table: PTR sys_readlinkat PTR sys_fchmodat PTR sys_faccessat /* 4300 */ - PTR sys_pselect6 + PTR compat_sys_pselect6 PTR sys_ppoll PTR sys_unshare PTR sys_splice diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 89440a0d852..d2e01e7167b 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -271,8 +271,7 @@ static void __init bootmem_init(void) static void __init bootmem_init(void) { unsigned long reserved_end; - unsigned long highest = 0; - unsigned long mapstart = -1UL; + unsigned long mapstart = ~0UL; unsigned long bootmap_size; int i; @@ -284,6 +283,13 @@ static void __init bootmem_init(void) reserved_end = max(init_initrd(), PFN_UP(__pa_symbol(&_end))); /* + * max_low_pfn is not a number of pages. The number of pages + * of the system is given by 'max_low_pfn - min_low_pfn'. + */ + min_low_pfn = ~0UL; + max_low_pfn = 0; + + /* * Find the highest page frame number we have available. */ for (i = 0; i < boot_mem_map.nr_map; i++) { @@ -296,8 +302,10 @@ static void __init bootmem_init(void) end = PFN_DOWN(boot_mem_map.map[i].addr + boot_mem_map.map[i].size); - if (end > highest) - highest = end; + if (end > max_low_pfn) + max_low_pfn = end; + if (start < min_low_pfn) + min_low_pfn = start; if (end <= reserved_end) continue; if (start >= mapstart) @@ -305,22 +313,36 @@ static void __init bootmem_init(void) mapstart = max(reserved_end, start); } + if (min_low_pfn >= max_low_pfn) + panic("Incorrect memory mapping !!!"); + if (min_low_pfn > ARCH_PFN_OFFSET) { + printk(KERN_INFO + "Wasting %lu bytes for tracking %lu unused pages\n", + (min_low_pfn - ARCH_PFN_OFFSET) * sizeof(struct page), + min_low_pfn - ARCH_PFN_OFFSET); + } else if (min_low_pfn < ARCH_PFN_OFFSET) { + printk(KERN_INFO + "%lu free pages won't be used\n", + ARCH_PFN_OFFSET - min_low_pfn); + } + min_low_pfn = ARCH_PFN_OFFSET; + /* * Determine low and high memory ranges */ - if (highest > PFN_DOWN(HIGHMEM_START)) { + if (max_low_pfn > PFN_DOWN(HIGHMEM_START)) { #ifdef CONFIG_HIGHMEM highstart_pfn = PFN_DOWN(HIGHMEM_START); - highend_pfn = highest; + highend_pfn = max_low_pfn; #endif - highest = PFN_DOWN(HIGHMEM_START); + max_low_pfn = PFN_DOWN(HIGHMEM_START); } /* * Initialize the boot-time allocator with low memory only. */ - bootmap_size = init_bootmem(mapstart, highest); - + bootmap_size = init_bootmem_node(NODE_DATA(0), mapstart, + min_low_pfn, max_low_pfn); /* * Register fully available low RAM pages with the bootmem allocator. */ @@ -507,9 +529,9 @@ void __init setup_arch(char **cmdline_p) #if defined(CONFIG_VT) #if defined(CONFIG_VGA_CONSOLE) - conswitchp = &vga_con; + conswitchp = &vga_con; #elif defined(CONFIG_DUMMY_CONSOLE) - conswitchp = &dummy_con; + conswitchp = &dummy_con; #endif #endif @@ -541,3 +563,6 @@ int __init dsp_disable(char *s) } __setup("nodsp", dsp_disable); + +unsigned long kernelsp[NR_CPUS]; +unsigned long fw_arg0, fw_arg1, fw_arg2, fw_arg3; diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index b9d358e0521..9a44053cd9f 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c @@ -89,7 +89,7 @@ _sys_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) spin_lock_irq(¤t->sighand->siglock); current->saved_sigmask = current->blocked; current->blocked = newset; - recalc_sigpending(); + recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); current->state = TASK_INTERRUPTIBLE; @@ -124,7 +124,7 @@ asmlinkage int sys_sigaction(int sig, const struct sigaction __user *act, if (!ret && oact) { if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact))) - return -EFAULT; + return -EFAULT; err |= __put_user(old_ka.sa.sa_flags, &oact->sa_flags); err |= __put_user(old_ka.sa.sa_handler, &oact->sa_handler); err |= __put_user(old_ka.sa.sa_mask.sig[0], oact->sa_mask.sig); @@ -304,7 +304,7 @@ int setup_frame(struct k_sigaction * ka, struct pt_regs *regs, current->comm, current->pid, frame, regs->cp0_epc, frame->regs[31]); #endif - return 0; + return 0; give_sigsegv: force_sigsegv(signr, current); diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c index a67c18555ed..b28646b3cea 100644 --- a/arch/mips/kernel/signal_n32.c +++ b/arch/mips/kernel/signal_n32.c @@ -105,7 +105,7 @@ _sysn32_rt_sigsuspend(nabi_no_regargs struct pt_regs regs) spin_lock_irq(¤t->sighand->siglock); current->saved_sigmask = current->blocked; current->blocked = newset; - recalc_sigpending(); + recalc_sigpending(); spin_unlock_irq(¤t->sighand->siglock); current->state = TASK_INTERRUPTIBLE; @@ -184,7 +184,7 @@ int setup_rt_frame_n32(struct k_sigaction * ka, /* Create the ucontext. */ err |= __put_user(0, &frame->rs_uc.uc_flags); err |= __put_user(0, &frame->rs_uc.uc_link); - sp = (int) (long) current->sas_ss_sp; + sp = (int) (long) current->sas_ss_sp; err |= __put_user(sp, &frame->rs_uc.uc_stack.ss_sp); err |= __put_user(sas_ss_flags(regs->regs[29]), diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 1ee689c0e0c..64b62bdfb4f 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c @@ -35,7 +35,6 @@ #include <asm/mipsregs.h> #include <asm/mipsmtregs.h> #include <asm/mips_mt.h> -#include <asm/mips-boards/maltaint.h> /* This is f*cking wrong */ #define MIPS_CPU_IPI_RESCHED_IRQ 0 #define MIPS_CPU_IPI_CALL_IRQ 1 @@ -108,12 +107,12 @@ void __init sanitize_tlb_entries(void) static void ipi_resched_dispatch(void) { - do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ); + do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ); } static void ipi_call_dispatch(void) { - do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ); + do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ); } static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) @@ -270,8 +269,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus) set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); } - cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; - cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; + cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ; + cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ; setup_irq(cpu_ipi_resched_irq, &irq_resched); setup_irq(cpu_ipi_call_irq, &irq_call); diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index f2a8701e414..0555fc554f6 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -271,7 +271,7 @@ void __devinit smp_prepare_boot_cpu(void) * and keep control until "cpu_online(cpu)" is set. Note: cpu is * physical, not logical. */ -int __devinit __cpu_up(unsigned int cpu) +int __cpuinit __cpu_up(unsigned int cpu) { struct task_struct *idle; diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 802febed7df..9251ea82493 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -4,6 +4,7 @@ #include <linux/sched.h> #include <linux/cpumask.h> #include <linux/interrupt.h> +#include <linux/module.h> #include <asm/cpu.h> #include <asm/processor.h> @@ -25,16 +26,6 @@ * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set. */ -/* - * MIPSCPU_INT_BASE is identically defined in both - * asm-mips/mips-boards/maltaint.h and asm-mips/mips-boards/simint.h, - * but as yet there's no properly organized include structure that - * will ensure that the right *int.h file will be included for a - * given platform build. - */ - -#define MIPSCPU_INT_BASE 16 - #define MIPS_CPU_IPI_IRQ 1 #define LOCK_MT_PRA() \ @@ -76,15 +67,15 @@ unsigned int ipi_timer_latch[NR_CPUS]; #define IPIBUF_PER_CPU 4 -struct smtc_ipi_q IPIQ[NR_CPUS]; -struct smtc_ipi_q freeIPIq; +static struct smtc_ipi_q IPIQ[NR_CPUS]; +static struct smtc_ipi_q freeIPIq; /* Forward declarations */ void ipi_decode(struct smtc_ipi *); -void post_direct_ipi(int cpu, struct smtc_ipi *pipi); -void setup_cross_vpe_interrupts(void); +static void post_direct_ipi(int cpu, struct smtc_ipi *pipi); +static void setup_cross_vpe_interrupts(void); void init_smtc_stats(void); /* Global SMTC Status */ @@ -199,7 +190,7 @@ void __init sanitize_tlb_entries(void) * Configure shared TLB - VPC configuration bit must be set by caller */ -void smtc_configure_tlb(void) +static void smtc_configure_tlb(void) { int i,tlbsiz,vpes; unsigned long mvpconf0; @@ -261,6 +252,7 @@ void smtc_configure_tlb(void) } } write_c0_mvpcontrol(read_c0_mvpcontrol() | MVPCONTROL_STLB); + ehb(); /* * Setup kernel data structures to use software total, @@ -269,9 +261,12 @@ void smtc_configure_tlb(void) * of their initialization in smtc_cpu_setup(). */ - tlbsiz = tlbsiz & 0x3f; /* MIPS32 limits TLB indices to 64 */ - cpu_data[0].tlbsize = tlbsiz; + /* MIPS32 limits TLB indices to 64 */ + if (tlbsiz > 64) + tlbsiz = 64; + cpu_data[0].tlbsize = current_cpu_data.tlbsize = tlbsiz; smtc_status |= SMTC_TLB_SHARED; + local_flush_tlb_all(); printk("TLB of %d entry pairs shared by %d VPEs\n", tlbsiz, vpes); @@ -643,7 +638,7 @@ int setup_irq_smtc(unsigned int irq, struct irqaction * new, * the VPE. */ -void smtc_ipi_qdump(void) +static void smtc_ipi_qdump(void) { int i; @@ -681,28 +676,6 @@ static __inline__ int atomic_postincrement(unsigned int *pv) return result; } -/* No longer used in IPI dispatch, but retained for future recycling */ - -static __inline__ int atomic_postclear(unsigned int *pv) -{ - unsigned long result; - - unsigned long temp; - - __asm__ __volatile__( - "1: ll %0, %2 \n" - " or %1, $0, $0 \n" - " sc %1, %2 \n" - " beqz %1, 1b \n" - " sync \n" - : "=&r" (result), "=&r" (temp), "=m" (*pv) - : "m" (*pv) - : "memory"); - - return result; -} - - void smtc_send_ipi(int cpu, int type, unsigned int action) { int tcstatus; @@ -776,7 +749,7 @@ void smtc_send_ipi(int cpu, int type, unsigned int action) /* * Send IPI message to Halted TC, TargTC/TargVPE already having been set */ -void post_direct_ipi(int cpu, struct smtc_ipi *pipi) +static void post_direct_ipi(int cpu, struct smtc_ipi *pipi) { struct pt_regs *kstack; unsigned long tcstatus; @@ -916,7 +889,7 @@ void smtc_timer_broadcast(int vpe) * interrupts. */ -static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ; +static int cpu_ipi_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_IRQ; static irqreturn_t ipi_interrupt(int irq, void *dev_idm) { @@ -995,7 +968,7 @@ static void ipi_irq_dispatch(void) static struct irqaction irq_ipi; -void setup_cross_vpe_interrupts(void) +static void setup_cross_vpe_interrupts(void) { if (!cpu_has_vint) panic("SMTC Kernel requires Vectored Interupt support"); @@ -1016,6 +989,35 @@ void setup_cross_vpe_interrupts(void) * SMTC-specific hacks invoked from elsewhere in the kernel. */ +void smtc_ipi_replay(void) +{ + /* + * To the extent that we've ever turned interrupts off, + * we may have accumulated deferred IPIs. This is subtle. + * If we use the smtc_ipi_qdepth() macro, we'll get an + * exact number - but we'll also disable interrupts + * and create a window of failure where a new IPI gets + * queued after we test the depth but before we re-enable + * interrupts. So long as IXMT never gets set, however, + * we should be OK: If we pick up something and dispatch + * it here, that's great. If we see nothing, but concurrent + * with this operation, another TC sends us an IPI, IXMT + * is clear, and we'll handle it as a real pseudo-interrupt + * and not a pseudo-pseudo interrupt. + */ + if (IPIQ[smp_processor_id()].depth > 0) { + struct smtc_ipi *pipi; + extern void self_ipi(struct smtc_ipi *); + + while ((pipi = smtc_ipi_dq(&IPIQ[smp_processor_id()]))) { + self_ipi(pipi); + smtc_cpu_stats[smp_processor_id()].selfipis++; + } + } +} + +EXPORT_SYMBOL(smtc_ipi_replay); + void smtc_idle_loop_hook(void) { #ifdef SMTC_IDLE_HOOK_DEBUG @@ -1112,29 +1114,14 @@ void smtc_idle_loop_hook(void) if (pdb_msg != &id_ho_db_msg[0]) printk("CPU%d: %s", smp_processor_id(), id_ho_db_msg); #endif /* SMTC_IDLE_HOOK_DEBUG */ + /* - * To the extent that we've ever turned interrupts off, - * we may have accumulated deferred IPIs. This is subtle. - * If we use the smtc_ipi_qdepth() macro, we'll get an - * exact number - but we'll also disable interrupts - * and create a window of failure where a new IPI gets - * queued after we test the depth but before we re-enable - * interrupts. So long as IXMT never gets set, however, - * we should be OK: If we pick up something and dispatch - * it here, that's great. If we see nothing, but concurrent - * with this operation, another TC sends us an IPI, IXMT - * is clear, and we'll handle it as a real pseudo-interrupt - * and not a pseudo-pseudo interrupt. + * Replay any accumulated deferred IPIs. If "Instant Replay" + * is in use, there should never be any. */ - if (IPIQ[smp_processor_id()].depth > 0) { - struct smtc_ipi *pipi; - extern void self_ipi(struct smtc_ipi *); - - if ((pipi = smtc_ipi_dq(&IPIQ[smp_processor_id()])) != NULL) { - self_ipi(pipi); - smtc_cpu_stats[smp_processor_id()].selfipis++; - } - } +#ifndef CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY + smtc_ipi_replay(); +#endif /* CONFIG_MIPS_MT_SMTC_INSTANT_REPLAY */ } void smtc_soft_dump(void) @@ -1172,7 +1159,7 @@ void smtc_get_new_mmu_context(struct mm_struct *mm, unsigned long cpu) * It would be nice to be able to use a spinlock here, * but this is invoked from within TLB flush routines * that protect themselves with DVPE, so if a lock is - * held by another TC, it'll never be freed. + * held by another TC, it'll never be freed. * * DVPE/DMT must not be done with interrupts enabled, * so even so most callers will already have disabled @@ -1277,7 +1264,7 @@ void smtc_flush_tlb_asid(unsigned long asid) * Support for single-threading cache flush operations. */ -int halt_state_save[NR_CPUS]; +static int halt_state_save[NR_CPUS]; /* * To really, really be sure that nothing is being done diff --git a/arch/mips/kernel/sysirix.c b/arch/mips/kernel/sysirix.c index 93c74fefff7..93a148486f8 100644 --- a/arch/mips/kernel/sysirix.c +++ b/arch/mips/kernel/sysirix.c @@ -669,7 +669,7 @@ asmlinkage int irix_mount(char __user *dev_name, char __user *dir_name, struct irix_statfs { short f_type; - long f_bsize, f_frsize, f_blocks, f_bfree, f_files, f_ffree; + long f_bsize, f_frsize, f_blocks, f_bfree, f_files, f_ffree; char f_fname[6], f_fpack[6]; }; @@ -732,7 +732,7 @@ asmlinkage int irix_fstatfs(unsigned int fd, struct irix_statfs __user *buf) goto out; } - error = vfs_statfs(file->f_dentry, &kbuf); + error = vfs_statfs(file->f_path.dentry, &kbuf); if (error) goto out_f; @@ -959,7 +959,7 @@ static inline loff_t llseek(struct file *file, loff_t offset, int origin) fn = default_llseek; if (file->f_op && file->f_op->llseek) - fn = file->f_op->llseek; + fn = file->f_op->llseek; lock_kernel(); retval = fn(file, offset, origin); unlock_kernel(); @@ -1041,7 +1041,7 @@ asmlinkage unsigned long irix_mmap32(unsigned long addr, size_t len, int prot, unsigned long old_pos; long max_size = offset + len; - if (max_size > file->f_dentry->d_inode->i_size) { + if (max_size > file->f_path.dentry->d_inode->i_size) { old_pos = sys_lseek (fd, max_size - 1, 0); sys_write (fd, (void __user *) "", 1); sys_lseek (fd, old_pos, 0); @@ -1406,7 +1406,7 @@ asmlinkage int irix_fstatvfs(int fd, struct irix_statvfs __user *buf) error = -EBADF; goto out; } - error = vfs_statfs(file->f_dentry, &kbuf); + error = vfs_statfs(file->f_path.dentry, &kbuf); if (error) goto out_f; @@ -1526,7 +1526,7 @@ asmlinkage int irix_mmap64(struct pt_regs *regs) unsigned long old_pos; long max_size = off2 + len; - if (max_size > file->f_dentry->d_inode->i_size) { + if (max_size > file->f_path.dentry->d_inode->i_size) { old_pos = sys_lseek (fd, max_size - 1, 0); sys_write (fd, (void __user *) "", 1); sys_lseek (fd, old_pos, 0); @@ -1658,7 +1658,7 @@ asmlinkage int irix_fstatvfs64(int fd, struct irix_statvfs __user *buf) error = -EBADF; goto out; } - error = vfs_statfs(file->f_dentry, &kbuf); + error = vfs_statfs(file->f_path.dentry, &kbuf); if (error) goto out_f; diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 11aab6d6bfe..8aa544f73a5 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -94,10 +94,8 @@ static void c0_timer_ack(void) { unsigned int count; -#ifndef CONFIG_SOC_PNX8550 /* pnx8550 resets to zero */ /* Ack this timer interrupt and set the next one. */ expirelo += cycles_per_jiffy; -#endif write_c0_compare(expirelo); /* Check to see if we have missed any timer interrupts. */ diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index 79f0317d84a..cecff24cc97 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S @@ -112,6 +112,7 @@ SECTIONS /* .exit.text is discarded at runtime, not link time, to deal with references from .rodata */ .exit.text : { *(.exit.text) } + .exit.data : { *(.exit.data) } . = ALIGN(_PAGE_SIZE); __initramfs_start = .; .init.ramfs : { *(.init.ramfs) } @@ -139,7 +140,6 @@ SECTIONS /* Sections to be discarded */ /DISCARD/ : { - *(.exit.data) *(.exitcall.exit) /* ABI crap starts here */ diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 51ddd216689..459624969c9 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -139,13 +139,16 @@ struct tc { struct list_head list; }; -struct vpecontrol_ { +struct { /* Virtual processing elements */ struct list_head vpe_list; /* Thread contexts */ struct list_head tc_list; -} vpecontrol; +} vpecontrol = { + .vpe_list = LIST_HEAD_INIT(vpecontrol.vpe_list), + .tc_list = LIST_HEAD_INIT(vpecontrol.tc_list) +}; static void release_progmem(void *ptr); /* static __attribute_used__ void dump_vpe(struct vpe * v); */ @@ -519,7 +522,7 @@ static int (*reloc_handlers[]) (struct module *me, uint32_t *location, }; static char *rstrs[] = { - [R_MIPS_NONE] = "MIPS_NONE", + [R_MIPS_NONE] = "MIPS_NONE", [R_MIPS_32] = "MIPS_32", [R_MIPS_26] = "MIPS_26", [R_MIPS_HI16] = "MIPS_HI16", @@ -692,7 +695,7 @@ static void dump_tclist(void) } /* We are prepared so configure and start the VPE... */ -int vpe_run(struct vpe * v) +static int vpe_run(struct vpe * v) { struct vpe_notifications *n; unsigned long val, dmt_flag; @@ -710,16 +713,16 @@ int vpe_run(struct vpe * v) dvpe(); if (!list_empty(&v->tc)) { - if ((t = list_entry(v->tc.next, struct tc, tc)) == NULL) { - printk(KERN_WARNING "VPE loader: TC %d is already in use.\n", - t->index); - return -ENOEXEC; - } - } else { - printk(KERN_WARNING "VPE loader: No TC's associated with VPE %d\n", - v->minor); - return -ENOEXEC; - } + if ((t = list_entry(v->tc.next, struct tc, tc)) == NULL) { + printk(KERN_WARNING "VPE loader: TC %d is already in use.\n", + t->index); + return -ENOEXEC; + } + } else { + printk(KERN_WARNING "VPE loader: No TC's associated with VPE %d\n", + v->minor); + return -ENOEXEC; + } /* Put MVPE's into 'configuration state' */ set_c0_mvpcontrol(MVPCONTROL_VPC); @@ -772,14 +775,14 @@ int vpe_run(struct vpe * v) back_to_back_c0_hazard(); - /* Set up the XTC bit in vpeconf0 to point at our tc */ - write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC)) - | (t->index << VPECONF0_XTC_SHIFT)); + /* Set up the XTC bit in vpeconf0 to point at our tc */ + write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC)) + | (t->index << VPECONF0_XTC_SHIFT)); back_to_back_c0_hazard(); - /* enable this VPE */ - write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA); + /* enable this VPE */ + write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA); /* clear out any left overs from a previous program */ write_vpe_c0_status(0); @@ -829,7 +832,7 @@ static int find_vpe_symbols(struct vpe * v, Elf_Shdr * sechdrs, * contents of the program (p)buffer performing relocatations/etc, free's it * when finished. */ -int vpe_elfload(struct vpe * v) +static int vpe_elfload(struct vpe * v) { Elf_Ehdr *hdr; Elf_Shdr *sechdrs; @@ -1179,7 +1182,7 @@ static ssize_t vpe_write(struct file *file, const char __user * buffer, size_t ret = count; struct vpe *v; - minor = iminor(file->f_dentry->d_inode); + minor = iminor(file->f_path.dentry->d_inode); if ((v = get_vpe(minor)) == NULL) return -ENODEV; @@ -1388,8 +1391,6 @@ static int __init vpe_module_init(void) /* dump_mtregs(); */ - INIT_LIST_HEAD(&vpecontrol.vpe_list); - INIT_LIST_HEAD(&vpecontrol.tc_list); val = read_c0_mvpconf0(); for (i = 0; i < ((val & MVPCONF0_PTC) + 1); i++) { diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c index 2affa5ff171..9a622b9a105 100644 --- a/arch/mips/lasat/interrupt.c +++ b/arch/mips/lasat/interrupt.c @@ -45,7 +45,7 @@ void enable_lasat_irq(unsigned int irq_nr) } static struct irq_chip lasat_irq_type = { - .typename = "Lasat", + .name = "Lasat", .ack = disable_lasat_irq, .mask = disable_lasat_irq, .mask_ack = disable_lasat_irq, diff --git a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c index 88c7ab871ec..d47692f73a2 100644 --- a/arch/mips/lasat/prom.c +++ b/arch/mips/lasat/prom.c @@ -132,9 +132,8 @@ void __init prom_init(void) add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM); } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } const char *get_system_type(void) diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c index 6dd7ae1b7c2..12878359f2c 100644 --- a/arch/mips/lasat/sysctl.c +++ b/arch/mips/lasat/sysctl.c @@ -40,12 +40,12 @@ static DEFINE_MUTEX(lasat_info_mutex); /* Strategy function to write EEPROM after changing string entry */ int sysctl_lasatstring(ctl_table *table, int *name, int nlen, void *oldval, size_t *oldlenp, - void *newval, size_t newlen, void **context) + void *newval, size_t newlen) { int r; mutex_lock(&lasat_info_mutex); r = sysctl_string(table, name, - nlen, oldval, oldlenp, newval, newlen, context); + nlen, oldval, oldlenp, newval, newlen); if (r < 0) { mutex_unlock(&lasat_info_mutex); return r; @@ -119,11 +119,11 @@ int proc_dolasatrtc(ctl_table *table, int write, struct file *filp, /* Sysctl for setting the IP addresses */ int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen, void *oldval, size_t *oldlenp, - void *newval, size_t newlen, void **context) + void *newval, size_t newlen) { int r; mutex_lock(&lasat_info_mutex); - r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen, context); + r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); if (r < 0) { mutex_unlock(&lasat_info_mutex); return r; @@ -139,14 +139,14 @@ int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen, /* Same for RTC */ int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen, void *oldval, size_t *oldlenp, - void *newval, size_t newlen, void **context) + void *newval, size_t newlen) { int r; mutex_lock(&lasat_info_mutex); rtctmp = ds1603_read(); if (rtctmp < 0) rtctmp = 0; - r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen, context); + r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); if (r < 0) { mutex_unlock(&lasat_info_mutex); return r; @@ -251,13 +251,12 @@ int proc_lasat_ip(ctl_table *table, int write, struct file *filp, static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen, void *oldval, size_t *oldlenp, - void *newval, size_t newlen, - void **context) + void *newval, size_t newlen) { int r; mutex_lock(&lasat_info_mutex); - r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen, context); + r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen); if (r < 0) { mutex_unlock(&lasat_info_mutex); return r; @@ -286,11 +285,11 @@ int proc_lasat_eeprom_value(ctl_table *table, int write, struct file *filp, mutex_unlock(&lasat_info_mutex); return r; } - if (filp && filp->f_dentry) + if (filp && filp->f_path.dentry) { - if (!strcmp(filp->f_dentry->d_name.name, "prid")) + if (!strcmp(filp->f_path.dentry->d_name.name, "prid")) lasat_board_info.li_eeprom_info.prid = lasat_board_info.li_prid; - if (!strcmp(filp->f_dentry->d_name.name, "debugaccess")) + if (!strcmp(filp->f_path.dentry->d_name.name, "debugaccess")) lasat_board_info.li_eeprom_info.debugaccess = lasat_board_info.li_debugaccess; } lasat_write_eeprom_info(); diff --git a/arch/mips/lib-32/Makefile b/arch/mips/lib-32/Makefile index dcd4d2ed2ac..2036cf5e685 100644 --- a/arch/mips/lib-32/Makefile +++ b/arch/mips/lib-32/Makefile @@ -2,7 +2,7 @@ # Makefile for MIPS-specific library files.. # -lib-y += memset.o watch.o +lib-y += watch.o obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o diff --git a/arch/mips/lib-64/Makefile b/arch/mips/lib-64/Makefile index dcd4d2ed2ac..2036cf5e685 100644 --- a/arch/mips/lib-64/Makefile +++ b/arch/mips/lib-64/Makefile @@ -2,7 +2,7 @@ # Makefile for MIPS-specific library files.. # -lib-y += memset.o watch.o +lib-y += watch.o obj-$(CONFIG_CPU_MIPS32) += dump_tlb.o obj-$(CONFIG_CPU_MIPS64) += dump_tlb.o diff --git a/arch/mips/lib-64/memset.S b/arch/mips/lib-64/memset.S deleted file mode 100644 index e2c42c85113..00000000000 --- a/arch/mips/lib-64/memset.S +++ /dev/null @@ -1,142 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1998, 1999, 2000 by Ralf Baechle - * Copyright (C) 1999, 2000 Silicon Graphics, Inc. - */ -#include <asm/asm.h> -#include <asm/asm-offsets.h> -#include <asm/regdef.h> - -#define EX(insn,reg,addr,handler) \ -9: insn reg, addr; \ - .section __ex_table,"a"; \ - PTR 9b, handler; \ - .previous - - .macro f_fill64 dst, offset, val, fixup - EX(LONG_S, \val, (\offset + 0 * LONGSIZE)(\dst), \fixup) - EX(LONG_S, \val, (\offset + 1 * LONGSIZE)(\dst), \fixup) - EX(LONG_S, \val, (\offset + 2 * LONGSIZE)(\dst), \fixup) - EX(LONG_S, \val, (\offset + 3 * LONGSIZE)(\dst), \fixup) - EX(LONG_S, \val, (\offset + 4 * LONGSIZE)(\dst), \fixup) - EX(LONG_S, \val, (\offset + 5 * LONGSIZE)(\dst), \fixup) - EX(LONG_S, \val, (\offset + 6 * LONGSIZE)(\dst), \fixup) - EX(LONG_S, \val, (\offset + 7 * LONGSIZE)(\dst), \fixup) - .endm - -/* - * memset(void *s, int c, size_t n) - * - * a0: start of area to clear - * a1: char to fill with - * a2: size of area to clear - */ - .set noreorder - .align 5 -LEAF(memset) - beqz a1, 1f - move v0, a0 /* result */ - - andi a1, 0xff /* spread fillword */ - dsll t1, a1, 8 - or a1, t1 - dsll t1, a1, 16 - or a1, t1 - dsll t1, a1, 32 - or a1, t1 -1: - -FEXPORT(__bzero) - sltiu t0, a2, LONGSIZE /* very small region? */ - bnez t0, small_memset - andi t0, a0, LONGMASK /* aligned? */ - - beqz t0, 1f - PTR_SUBU t0, LONGSIZE /* alignment in bytes */ - -#ifdef __MIPSEB__ - EX(sdl, a1, (a0), first_fixup) /* make dword aligned */ -#endif -#ifdef __MIPSEL__ - EX(sdr, a1, (a0), first_fixup) /* make dword aligned */ -#endif - PTR_SUBU a0, t0 /* long align ptr */ - PTR_ADDU a2, t0 /* correct size */ - -1: ori t1, a2, 0x3f /* # of full blocks */ - xori t1, 0x3f - beqz t1, memset_partial /* no block to fill */ - andi t0, a2, 0x38 - - PTR_ADDU t1, a0 /* end address */ - .set reorder -1: PTR_ADDIU a0, 64 - f_fill64 a0, -64, a1, fwd_fixup - bne t1, a0, 1b - .set noreorder - -memset_partial: - PTR_LA t1, 2f /* where to start */ - .set noat - dsrl AT, t0, 1 - PTR_SUBU t1, AT - .set noat - jr t1 - PTR_ADDU a0, t0 /* dest ptr */ - - .set push - .set noreorder - .set nomacro - f_fill64 a0, -64, a1, partial_fixup /* ... but first do longs ... */ -2: .set pop - andi a2, LONGMASK /* At most one long to go */ - - beqz a2, 1f - PTR_ADDU a0, a2 /* What's left */ -#ifdef __MIPSEB__ - EX(sdr, a1, -1(a0), last_fixup) -#endif -#ifdef __MIPSEL__ - EX(sdl, a1, -1(a0), last_fixup) -#endif -1: jr ra - move a2, zero - -small_memset: - beqz a2, 2f - PTR_ADDU t1, a0, a2 - -1: PTR_ADDIU a0, 1 /* fill bytewise */ - bne t1, a0, 1b - sb a1, -1(a0) - -2: jr ra /* done */ - move a2, zero - END(memset) - -first_fixup: - jr ra - nop - -fwd_fixup: - PTR_L t0, TI_TASK($28) - LONG_L t0, THREAD_BUADDR(t0) - andi a2, 0x3f - LONG_ADDU a2, t1 - jr ra - LONG_SUBU a2, t0 - -partial_fixup: - PTR_L t0, TI_TASK($28) - LONG_L t0, THREAD_BUADDR(t0) - andi a2, LONGMASK - LONG_ADDU a2, t1 - jr ra - LONG_SUBU a2, t0 - -last_fixup: - jr ra - andi v1, a2, LONGMASK diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile index 888b61ea12f..5ad501b30b4 100644 --- a/arch/mips/lib/Makefile +++ b/arch/mips/lib/Makefile @@ -2,7 +2,7 @@ # Makefile for MIPS-specific library files.. # -lib-y += csum_partial.o csum_partial_copy.o memcpy.o promlib.o \ +lib-y += csum_partial.o memcpy.o memset.o promlib.o \ strlen_user.o strncpy_user.o strnlen_user.o uncached.o obj-y += iomap.o diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S index 15611d9df7a..c0a77fe038b 100644 --- a/arch/mips/lib/csum_partial.S +++ b/arch/mips/lib/csum_partial.S @@ -8,47 +8,72 @@ * Copyright (C) 1998, 1999 Ralf Baechle * Copyright (C) 1999 Silicon Graphics, Inc. */ +#include <linux/errno.h> #include <asm/asm.h> +#include <asm/asm-offsets.h> #include <asm/regdef.h> #ifdef CONFIG_64BIT -#define T0 ta0 -#define T1 ta1 -#define T2 ta2 -#define T3 ta3 -#define T4 t0 -#define T7 t3 -#else -#define T0 t0 -#define T1 t1 -#define T2 t2 -#define T3 t3 -#define T4 t4 -#define T7 t7 +/* + * As we are sharing code base with the mips32 tree (which use the o32 ABI + * register definitions). We need to redefine the register definitions from + * the n64 ABI register naming to the o32 ABI register naming. + */ +#undef t0 +#undef t1 +#undef t2 +#undef t3 +#define t0 $8 +#define t1 $9 +#define t2 $10 +#define t3 $11 +#define t4 $12 +#define t5 $13 +#define t6 $14 +#define t7 $15 + +#define USE_DOUBLE #endif +#ifdef USE_DOUBLE + +#define LOAD ld +#define ADD daddu +#define NBYTES 8 + +#else + +#define LOAD lw +#define ADD addu +#define NBYTES 4 + +#endif /* USE_DOUBLE */ + +#define UNIT(unit) ((unit)*NBYTES) + #define ADDC(sum,reg) \ - addu sum, reg; \ + ADD sum, reg; \ sltu v1, sum, reg; \ - addu sum, v1 + ADD sum, v1 -#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \ - lw _t0, (offset + 0x00)(src); \ - lw _t1, (offset + 0x04)(src); \ - lw _t2, (offset + 0x08)(src); \ - lw _t3, (offset + 0x0c)(src); \ +#define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \ + LOAD _t0, (offset + UNIT(0))(src); \ + LOAD _t1, (offset + UNIT(1))(src); \ + LOAD _t2, (offset + UNIT(2))(src); \ + LOAD _t3, (offset + UNIT(3))(src); \ ADDC(sum, _t0); \ ADDC(sum, _t1); \ ADDC(sum, _t2); \ - ADDC(sum, _t3); \ - lw _t0, (offset + 0x10)(src); \ - lw _t1, (offset + 0x14)(src); \ - lw _t2, (offset + 0x18)(src); \ - lw _t3, (offset + 0x1c)(src); \ - ADDC(sum, _t0); \ - ADDC(sum, _t1); \ - ADDC(sum, _t2); \ - ADDC(sum, _t3); \ + ADDC(sum, _t3) + +#ifdef USE_DOUBLE +#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \ + CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) +#else +#define CSUM_BIGCHUNK(src, offset, sum, _t0, _t1, _t2, _t3) \ + CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3); \ + CSUM_BIGCHUNK1(src, offset + 0x10, sum, _t0, _t1, _t2, _t3) +#endif /* * a0: source address @@ -61,86 +86,27 @@ .text .set noreorder - -/* unknown src alignment and < 8 bytes to go */ -small_csumcpy: - move a1, T2 - - andi T0, a1, 4 - beqz T0, 1f - andi T0, a1, 2 - - /* Still a full word to go */ - ulw T1, (src) - PTR_ADDIU src, 4 - ADDC(sum, T1) - -1: move T1, zero - beqz T0, 1f - andi T0, a1, 1 - - /* Still a halfword to go */ - ulhu T1, (src) - PTR_ADDIU src, 2 - -1: beqz T0, 1f - sll T1, T1, 16 - - lbu T2, (src) - nop - -#ifdef __MIPSEB__ - sll T2, T2, 8 -#endif - or T1, T2 - -1: ADDC(sum, T1) - - /* fold checksum */ - sll v1, sum, 16 - addu sum, v1 - sltu v1, sum, v1 - srl sum, sum, 16 - addu sum, v1 - - /* odd buffer alignment? */ - beqz T7, 1f - nop - sll v1, sum, 8 - srl sum, sum, 8 - or sum, v1 - andi sum, 0xffff -1: - .set reorder - /* Add the passed partial csum. */ - ADDC(sum, a2) - jr ra - .set noreorder - -/* ------------------------------------------------------------------------- */ - .align 5 LEAF(csum_partial) move sum, zero - move T7, zero + move t7, zero sltiu t8, a1, 0x8 bnez t8, small_csumcpy /* < 8 bytes to copy */ - move T2, a1 + move t2, a1 - beqz a1, out - andi T7, src, 0x1 /* odd buffer? */ + andi t7, src, 0x1 /* odd buffer? */ hword_align: - beqz T7, word_align + beqz t7, word_align andi t8, src, 0x2 - lbu T0, (src) + lbu t0, (src) LONG_SUBU a1, a1, 0x1 #ifdef __MIPSEL__ - sll T0, T0, 8 + sll t0, t0, 8 #endif - ADDC(sum, T0) + ADDC(sum, t0) PTR_ADDU src, src, 0x1 andi t8, src, 0x2 @@ -148,9 +114,9 @@ word_align: beqz t8, dword_align sltiu t8, a1, 56 - lhu T0, (src) + lhu t0, (src) LONG_SUBU a1, a1, 0x2 - ADDC(sum, T0) + ADDC(sum, t0) sltiu t8, a1, 56 PTR_ADDU src, src, 0x2 @@ -162,9 +128,9 @@ dword_align: beqz t8, qword_align andi t8, src, 0x8 - lw T0, 0x00(src) + lw t0, 0x00(src) LONG_SUBU a1, a1, 0x4 - ADDC(sum, T0) + ADDC(sum, t0) PTR_ADDU src, src, 0x4 andi t8, src, 0x8 @@ -172,11 +138,17 @@ qword_align: beqz t8, oword_align andi t8, src, 0x10 - lw T0, 0x00(src) - lw T1, 0x04(src) +#ifdef USE_DOUBLE + ld t0, 0x00(src) LONG_SUBU a1, a1, 0x8 - ADDC(sum, T0) - ADDC(sum, T1) + ADDC(sum, t0) +#else + lw t0, 0x00(src) + lw t1, 0x04(src) + LONG_SUBU a1, a1, 0x8 + ADDC(sum, t0) + ADDC(sum, t1) +#endif PTR_ADDU src, src, 0x8 andi t8, src, 0x10 @@ -184,75 +156,560 @@ oword_align: beqz t8, begin_movement LONG_SRL t8, a1, 0x7 - lw T3, 0x08(src) - lw T4, 0x0c(src) - lw T0, 0x00(src) - lw T1, 0x04(src) - ADDC(sum, T3) - ADDC(sum, T4) - ADDC(sum, T0) - ADDC(sum, T1) +#ifdef USE_DOUBLE + ld t0, 0x00(src) + ld t1, 0x08(src) + ADDC(sum, t0) + ADDC(sum, t1) +#else + CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4) +#endif LONG_SUBU a1, a1, 0x10 PTR_ADDU src, src, 0x10 LONG_SRL t8, a1, 0x7 begin_movement: beqz t8, 1f - andi T2, a1, 0x40 + andi t2, a1, 0x40 move_128bytes: - CSUM_BIGCHUNK(src, 0x00, sum, T0, T1, T3, T4) - CSUM_BIGCHUNK(src, 0x20, sum, T0, T1, T3, T4) - CSUM_BIGCHUNK(src, 0x40, sum, T0, T1, T3, T4) - CSUM_BIGCHUNK(src, 0x60, sum, T0, T1, T3, T4) + CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4) + CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4) + CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4) + CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4) LONG_SUBU t8, t8, 0x01 bnez t8, move_128bytes PTR_ADDU src, src, 0x80 1: - beqz T2, 1f - andi T2, a1, 0x20 + beqz t2, 1f + andi t2, a1, 0x20 move_64bytes: - CSUM_BIGCHUNK(src, 0x00, sum, T0, T1, T3, T4) - CSUM_BIGCHUNK(src, 0x20, sum, T0, T1, T3, T4) + CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4) + CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4) PTR_ADDU src, src, 0x40 1: - beqz T2, do_end_words + beqz t2, do_end_words andi t8, a1, 0x1c move_32bytes: - CSUM_BIGCHUNK(src, 0x00, sum, T0, T1, T3, T4) + CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4) andi t8, a1, 0x1c PTR_ADDU src, src, 0x20 do_end_words: - beqz t8, maybe_end_cruft - LONG_SRL t8, t8, 0x2 + beqz t8, small_csumcpy + andi t2, a1, 0x3 + LONG_SRL t8, t8, 0x2 end_words: - lw T0, (src) + lw t0, (src) LONG_SUBU t8, t8, 0x1 - ADDC(sum, T0) + ADDC(sum, t0) bnez t8, end_words PTR_ADDU src, src, 0x4 -maybe_end_cruft: - andi T2, a1, 0x3 +/* unknown src alignment and < 8 bytes to go */ +small_csumcpy: + move a1, t2 -small_memcpy: - j small_csumcpy; move a1, T2 /* XXX ??? */ - beqz t2, out - move a1, T2 + andi t0, a1, 4 + beqz t0, 1f + andi t0, a1, 2 -end_bytes: - lb T0, (src) - LONG_SUBU a1, a1, 0x1 - bnez a2, end_bytes - PTR_ADDU src, src, 0x1 + /* Still a full word to go */ + ulw t1, (src) + PTR_ADDIU src, 4 + ADDC(sum, t1) + +1: move t1, zero + beqz t0, 1f + andi t0, a1, 1 + + /* Still a halfword to go */ + ulhu t1, (src) + PTR_ADDIU src, 2 -out: +1: beqz t0, 1f + sll t1, t1, 16 + + lbu t2, (src) + nop + +#ifdef __MIPSEB__ + sll t2, t2, 8 +#endif + or t1, t2 + +1: ADDC(sum, t1) + + /* fold checksum */ +#ifdef USE_DOUBLE + dsll32 v1, sum, 0 + daddu sum, v1 + sltu v1, sum, v1 + dsra32 sum, sum, 0 + addu sum, v1 +#endif + sll v1, sum, 16 + addu sum, v1 + sltu v1, sum, v1 + srl sum, sum, 16 + addu sum, v1 + + /* odd buffer alignment? */ + beqz t7, 1f + nop + sll v1, sum, 8 + srl sum, sum, 8 + or sum, v1 + andi sum, 0xffff +1: + .set reorder + /* Add the passed partial csum. */ + ADDC(sum, a2) jr ra - move v0, sum + .set noreorder END(csum_partial) + + +/* + * checksum and copy routines based on memcpy.S + * + * csum_partial_copy_nocheck(src, dst, len, sum) + * __csum_partial_copy_user(src, dst, len, sum, errp) + * + * See "Spec" in memcpy.S for details. Unlike __copy_user, all + * function in this file use the standard calling convention. + */ + +#define src a0 +#define dst a1 +#define len a2 +#define psum a3 +#define sum v0 +#define odd t8 +#define errptr t9 + +/* + * The exception handler for loads requires that: + * 1- AT contain the address of the byte just past the end of the source + * of the copy, + * 2- src_entry <= src < AT, and + * 3- (dst - src) == (dst_entry - src_entry), + * The _entry suffix denotes values when __copy_user was called. + * + * (1) is set up up by __csum_partial_copy_from_user and maintained by + * not writing AT in __csum_partial_copy + * (2) is met by incrementing src by the number of bytes copied + * (3) is met by not doing loads between a pair of increments of dst and src + * + * The exception handlers for stores stores -EFAULT to errptr and return. + * These handlers do not need to overwrite any data. + */ + +#define EXC(inst_reg,addr,handler) \ +9: inst_reg, addr; \ + .section __ex_table,"a"; \ + PTR 9b, handler; \ + .previous + +#ifdef USE_DOUBLE + +#define LOAD ld +#define LOADL ldl +#define LOADR ldr +#define STOREL sdl +#define STORER sdr +#define STORE sd +#define ADD daddu +#define SUB dsubu +#define SRL dsrl +#define SLL dsll +#define SLLV dsllv +#define SRLV dsrlv +#define NBYTES 8 +#define LOG_NBYTES 3 + +#else + +#define LOAD lw +#define LOADL lwl +#define LOADR lwr +#define STOREL swl +#define STORER swr +#define STORE sw +#define ADD addu +#define SUB subu +#define SRL srl +#define SLL sll +#define SLLV sllv +#define SRLV srlv +#define NBYTES 4 +#define LOG_NBYTES 2 + +#endif /* USE_DOUBLE */ + +#ifdef CONFIG_CPU_LITTLE_ENDIAN +#define LDFIRST LOADR +#define LDREST LOADL +#define STFIRST STORER +#define STREST STOREL +#define SHIFT_DISCARD SLLV +#define SHIFT_DISCARD_REVERT SRLV +#else +#define LDFIRST LOADL +#define LDREST LOADR +#define STFIRST STOREL +#define STREST STORER +#define SHIFT_DISCARD SRLV +#define SHIFT_DISCARD_REVERT SLLV +#endif + +#define FIRST(unit) ((unit)*NBYTES) +#define REST(unit) (FIRST(unit)+NBYTES-1) + +#define ADDRMASK (NBYTES-1) + + .set noat + +LEAF(__csum_partial_copy_user) + PTR_ADDU AT, src, len /* See (1) above. */ +#ifdef CONFIG_64BIT + move errptr, a4 +#else + lw errptr, 16(sp) +#endif +FEXPORT(csum_partial_copy_nocheck) + move sum, zero + move odd, zero + /* + * Note: dst & src may be unaligned, len may be 0 + * Temps + */ + /* + * The "issue break"s below are very approximate. + * Issue delays for dcache fills will perturb the schedule, as will + * load queue full replay traps, etc. + * + * If len < NBYTES use byte operations. + */ + sltu t2, len, NBYTES + and t1, dst, ADDRMASK + bnez t2, copy_bytes_checklen + and t0, src, ADDRMASK + andi odd, dst, 0x1 /* odd buffer? */ + bnez t1, dst_unaligned + nop + bnez t0, src_unaligned_dst_aligned + /* + * use delay slot for fall-through + * src and dst are aligned; need to compute rem + */ +both_aligned: + SRL t0, len, LOG_NBYTES+3 # +3 for 8 units/iter + beqz t0, cleanup_both_aligned # len < 8*NBYTES + nop + SUB len, 8*NBYTES # subtract here for bgez loop + .align 4 +1: +EXC( LOAD t0, UNIT(0)(src), l_exc) +EXC( LOAD t1, UNIT(1)(src), l_exc_copy) +EXC( LOAD t2, UNIT(2)(src), l_exc_copy) +EXC( LOAD t3, UNIT(3)(src), l_exc_copy) +EXC( LOAD t4, UNIT(4)(src), l_exc_copy) +EXC( LOAD t5, UNIT(5)(src), l_exc_copy) +EXC( LOAD t6, UNIT(6)(src), l_exc_copy) +EXC( LOAD t7, UNIT(7)(src), l_exc_copy) + SUB len, len, 8*NBYTES + ADD src, src, 8*NBYTES +EXC( STORE t0, UNIT(0)(dst), s_exc) + ADDC(sum, t0) +EXC( STORE t1, UNIT(1)(dst), s_exc) + ADDC(sum, t1) +EXC( STORE t2, UNIT(2)(dst), s_exc) + ADDC(sum, t2) +EXC( STORE t3, UNIT(3)(dst), s_exc) + ADDC(sum, t3) +EXC( STORE t4, UNIT(4)(dst), s_exc) + ADDC(sum, t4) +EXC( STORE t5, UNIT(5)(dst), s_exc) + ADDC(sum, t5) +EXC( STORE t6, UNIT(6)(dst), s_exc) + ADDC(sum, t6) +EXC( STORE t7, UNIT(7)(dst), s_exc) + ADDC(sum, t7) + bgez len, 1b + ADD dst, dst, 8*NBYTES + ADD len, 8*NBYTES # revert len (see above) + + /* + * len == the number of bytes left to copy < 8*NBYTES + */ +cleanup_both_aligned: +#define rem t7 + beqz len, done + sltu t0, len, 4*NBYTES + bnez t0, less_than_4units + and rem, len, (NBYTES-1) # rem = len % NBYTES + /* + * len >= 4*NBYTES + */ +EXC( LOAD t0, UNIT(0)(src), l_exc) +EXC( LOAD t1, UNIT(1)(src), l_exc_copy) +EXC( LOAD t2, UNIT(2)(src), l_exc_copy) +EXC( LOAD t3, UNIT(3)(src), l_exc_copy) + SUB len, len, 4*NBYTES + ADD src, src, 4*NBYTES +EXC( STORE t0, UNIT(0)(dst), s_exc) + ADDC(sum, t0) +EXC( STORE t1, UNIT(1)(dst), s_exc) + ADDC(sum, t1) +EXC( STORE t2, UNIT(2)(dst), s_exc) + ADDC(sum, t2) +EXC( STORE t3, UNIT(3)(dst), s_exc) + ADDC(sum, t3) + beqz len, done + ADD dst, dst, 4*NBYTES +less_than_4units: + /* + * rem = len % NBYTES + */ + beq rem, len, copy_bytes + nop +1: +EXC( LOAD t0, 0(src), l_exc) + ADD src, src, NBYTES + SUB len, len, NBYTES +EXC( STORE t0, 0(dst), s_exc) + ADDC(sum, t0) + bne rem, len, 1b + ADD dst, dst, NBYTES + + /* + * src and dst are aligned, need to copy rem bytes (rem < NBYTES) + * A loop would do only a byte at a time with possible branch + * mispredicts. Can't do an explicit LOAD dst,mask,or,STORE + * because can't assume read-access to dst. Instead, use + * STREST dst, which doesn't require read access to dst. + * + * This code should perform better than a simple loop on modern, + * wide-issue mips processors because the code has fewer branches and + * more instruction-level parallelism. + */ +#define bits t2 + beqz len, done + ADD t1, dst, len # t1 is just past last byte of dst + li bits, 8*NBYTES + SLL rem, len, 3 # rem = number of bits to keep +EXC( LOAD t0, 0(src), l_exc) + SUB bits, bits, rem # bits = number of bits to discard + SHIFT_DISCARD t0, t0, bits +EXC( STREST t0, -1(t1), s_exc) + SHIFT_DISCARD_REVERT t0, t0, bits + .set reorder + ADDC(sum, t0) + b done + .set noreorder +dst_unaligned: + /* + * dst is unaligned + * t0 = src & ADDRMASK + * t1 = dst & ADDRMASK; T1 > 0 + * len >= NBYTES + * + * Copy enough bytes to align dst + * Set match = (src and dst have same alignment) + */ +#define match rem +EXC( LDFIRST t3, FIRST(0)(src), l_exc) + ADD t2, zero, NBYTES +EXC( LDREST t3, REST(0)(src), l_exc_copy) + SUB t2, t2, t1 # t2 = number of bytes copied + xor match, t0, t1 +EXC( STFIRST t3, FIRST(0)(dst), s_exc) + SLL t4, t1, 3 # t4 = number of bits to discard + SHIFT_DISCARD t3, t3, t4 + /* no SHIFT_DISCARD_REVERT to handle odd buffer properly */ + ADDC(sum, t3) + beq len, t2, done + SUB len, len, t2 + ADD dst, dst, t2 + beqz match, both_aligned + ADD src, src, t2 + +src_unaligned_dst_aligned: + SRL t0, len, LOG_NBYTES+2 # +2 for 4 units/iter + beqz t0, cleanup_src_unaligned + and rem, len, (4*NBYTES-1) # rem = len % 4*NBYTES +1: +/* + * Avoid consecutive LD*'s to the same register since some mips + * implementations can't issue them in the same cycle. + * It's OK to load FIRST(N+1) before REST(N) because the two addresses + * are to the same unit (unless src is aligned, but it's not). + */ +EXC( LDFIRST t0, FIRST(0)(src), l_exc) +EXC( LDFIRST t1, FIRST(1)(src), l_exc_copy) + SUB len, len, 4*NBYTES +EXC( LDREST t0, REST(0)(src), l_exc_copy) +EXC( LDREST t1, REST(1)(src), l_exc_copy) +EXC( LDFIRST t2, FIRST(2)(src), l_exc_copy) +EXC( LDFIRST t3, FIRST(3)(src), l_exc_copy) +EXC( LDREST t2, REST(2)(src), l_exc_copy) +EXC( LDREST t3, REST(3)(src), l_exc_copy) + ADD src, src, 4*NBYTES +#ifdef CONFIG_CPU_SB1 + nop # improves slotting +#endif +EXC( STORE t0, UNIT(0)(dst), s_exc) + ADDC(sum, t0) +EXC( STORE t1, UNIT(1)(dst), s_exc) + ADDC(sum, t1) +EXC( STORE t2, UNIT(2)(dst), s_exc) + ADDC(sum, t2) +EXC( STORE t3, UNIT(3)(dst), s_exc) + ADDC(sum, t3) + bne len, rem, 1b + ADD dst, dst, 4*NBYTES + +cleanup_src_unaligned: + beqz len, done + and rem, len, NBYTES-1 # rem = len % NBYTES + beq rem, len, copy_bytes + nop +1: +EXC( LDFIRST t0, FIRST(0)(src), l_exc) +EXC( LDREST t0, REST(0)(src), l_exc_copy) + ADD src, src, NBYTES + SUB len, len, NBYTES +EXC( STORE t0, 0(dst), s_exc) + ADDC(sum, t0) + bne len, rem, 1b + ADD dst, dst, NBYTES + +copy_bytes_checklen: + beqz len, done + nop +copy_bytes: + /* 0 < len < NBYTES */ +#ifdef CONFIG_CPU_LITTLE_ENDIAN +#define SHIFT_START 0 +#define SHIFT_INC 8 +#else +#define SHIFT_START 8*(NBYTES-1) +#define SHIFT_INC -8 +#endif + move t2, zero # partial word + li t3, SHIFT_START # shift +/* use l_exc_copy here to return correct sum on fault */ +#define COPY_BYTE(N) \ +EXC( lbu t0, N(src), l_exc_copy); \ + SUB len, len, 1; \ +EXC( sb t0, N(dst), s_exc); \ + SLLV t0, t0, t3; \ + addu t3, SHIFT_INC; \ + beqz len, copy_bytes_done; \ + or t2, t0 + + COPY_BYTE(0) + COPY_BYTE(1) +#ifdef USE_DOUBLE + COPY_BYTE(2) + COPY_BYTE(3) + COPY_BYTE(4) + COPY_BYTE(5) +#endif +EXC( lbu t0, NBYTES-2(src), l_exc_copy) + SUB len, len, 1 +EXC( sb t0, NBYTES-2(dst), s_exc) + SLLV t0, t0, t3 + or t2, t0 +copy_bytes_done: + ADDC(sum, t2) +done: + /* fold checksum */ +#ifdef USE_DOUBLE + dsll32 v1, sum, 0 + daddu sum, v1 + sltu v1, sum, v1 + dsra32 sum, sum, 0 + addu sum, v1 +#endif + sll v1, sum, 16 + addu sum, v1 + sltu v1, sum, v1 + srl sum, sum, 16 + addu sum, v1 + + /* odd buffer alignment? */ + beqz odd, 1f + nop + sll v1, sum, 8 + srl sum, sum, 8 + or sum, v1 + andi sum, 0xffff +1: + .set reorder + ADDC(sum, psum) + jr ra + .set noreorder + +l_exc_copy: + /* + * Copy bytes from src until faulting load address (or until a + * lb faults) + * + * When reached by a faulting LDFIRST/LDREST, THREAD_BUADDR($28) + * may be more than a byte beyond the last address. + * Hence, the lb below may get an exception. + * + * Assumes src < THREAD_BUADDR($28) + */ + LOAD t0, TI_TASK($28) + li t2, SHIFT_START + LOAD t0, THREAD_BUADDR(t0) +1: +EXC( lbu t1, 0(src), l_exc) + ADD src, src, 1 + sb t1, 0(dst) # can't fault -- we're copy_from_user + SLLV t1, t1, t2 + addu t2, SHIFT_INC + ADDC(sum, t1) + bne src, t0, 1b + ADD dst, dst, 1 +l_exc: + LOAD t0, TI_TASK($28) + nop + LOAD t0, THREAD_BUADDR(t0) # t0 is just past last good address + nop + SUB len, AT, t0 # len number of uncopied bytes + /* + * Here's where we rely on src and dst being incremented in tandem, + * See (3) above. + * dst += (fault addr - src) to put dst at first byte to clear + */ + ADD dst, t0 # compute start address in a1 + SUB dst, src + /* + * Clear len bytes starting at dst. Can't call __bzero because it + * might modify len. An inefficient loop for these rare times... + */ + beqz len, done + SUB src, len, 1 +1: sb zero, 0(dst) + ADD dst, dst, 1 + bnez src, 1b + SUB src, src, 1 + li v1, -EFAULT + b done + sw v1, (errptr) + +s_exc: + li v0, -1 /* invalid checksum */ + li v1, -EFAULT + jr ra + sw v1, (errptr) + END(__csum_partial_copy_user) diff --git a/arch/mips/lib/csum_partial_copy.c b/arch/mips/lib/csum_partial_copy.c deleted file mode 100644 index 1720f2ceeea..00000000000 --- a/arch/mips/lib/csum_partial_copy.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1994, 1995 Waldorf Electronics GmbH - * Copyright (C) 1998, 1999 Ralf Baechle - */ -#include <linux/kernel.h> -#include <linux/types.h> -#include <asm/byteorder.h> -#include <asm/string.h> -#include <asm/uaccess.h> -#include <net/checksum.h> - -/* - * copy while checksumming, otherwise like csum_partial - */ -__wsum csum_partial_copy_nocheck(const void *src, - void *dst, int len, __wsum sum) -{ - /* - * It's 2:30 am and I don't feel like doing it real ... - * This is lots slower than the real thing (tm) - */ - sum = csum_partial(src, len, sum); - memcpy(dst, src, len); - - return sum; -} - -/* - * Copy from userspace and compute checksum. If we catch an exception - * then zero the rest of the buffer. - */ -__wsum csum_partial_copy_from_user (const void __user *src, - void *dst, int len, __wsum sum, int *err_ptr) -{ - int missing; - - might_sleep(); - missing = copy_from_user(dst, src, len); - if (missing) { - memset(dst + len - missing, 0, missing); - *err_ptr = -EFAULT; - } - - return csum_partial(dst, len, sum); -} diff --git a/arch/mips/lib-32/memset.S b/arch/mips/lib/memset.S index 1981485bd48..3f8b8b3d0b2 100644 --- a/arch/mips/lib-32/memset.S +++ b/arch/mips/lib/memset.S @@ -10,6 +10,14 @@ #include <asm/asm-offsets.h> #include <asm/regdef.h> +#if LONGSIZE == 4 +#define LONG_S_L swl +#define LONG_S_R swr +#else +#define LONG_S_L sdl +#define LONG_S_R sdr +#endif + #define EX(insn,reg,addr,handler) \ 9: insn reg, addr; \ .section __ex_table,"a"; \ @@ -25,6 +33,7 @@ EX(LONG_S, \val, (\offset + 5 * LONGSIZE)(\dst), \fixup) EX(LONG_S, \val, (\offset + 6 * LONGSIZE)(\dst), \fixup) EX(LONG_S, \val, (\offset + 7 * LONGSIZE)(\dst), \fixup) +#if LONGSIZE == 4 EX(LONG_S, \val, (\offset + 8 * LONGSIZE)(\dst), \fixup) EX(LONG_S, \val, (\offset + 9 * LONGSIZE)(\dst), \fixup) EX(LONG_S, \val, (\offset + 10 * LONGSIZE)(\dst), \fixup) @@ -33,6 +42,7 @@ EX(LONG_S, \val, (\offset + 13 * LONGSIZE)(\dst), \fixup) EX(LONG_S, \val, (\offset + 14 * LONGSIZE)(\dst), \fixup) EX(LONG_S, \val, (\offset + 15 * LONGSIZE)(\dst), \fixup) +#endif .endm /* @@ -49,9 +59,13 @@ LEAF(memset) move v0, a0 /* result */ andi a1, 0xff /* spread fillword */ - sll t1, a1, 8 + LONG_SLL t1, a1, 8 or a1, t1 - sll t1, a1, 16 + LONG_SLL t1, a1, 16 +#if LONGSIZE == 8 + or a1, t1 + LONG_SLL t1, a1, 32 +#endif or a1, t1 1: @@ -64,10 +78,10 @@ FEXPORT(__bzero) PTR_SUBU t0, LONGSIZE /* alignment in bytes */ #ifdef __MIPSEB__ - EX(swl, a1, (a0), first_fixup) /* make word aligned */ + EX(LONG_S_L, a1, (a0), first_fixup) /* make word/dword aligned */ #endif #ifdef __MIPSEL__ - EX(swr, a1, (a0), first_fixup) /* make word aligned */ + EX(LONG_S_R, a1, (a0), first_fixup) /* make word/dword aligned */ #endif PTR_SUBU a0, t0 /* long align ptr */ PTR_ADDU a2, t0 /* correct size */ @@ -75,7 +89,7 @@ FEXPORT(__bzero) 1: ori t1, a2, 0x3f /* # of full blocks */ xori t1, 0x3f beqz t1, memset_partial /* no block to fill */ - andi t0, a2, 0x3c + andi t0, a2, 0x40-LONGSIZE PTR_ADDU t1, a0 /* end address */ .set reorder @@ -86,7 +100,14 @@ FEXPORT(__bzero) memset_partial: PTR_LA t1, 2f /* where to start */ +#if LONGSIZE == 4 PTR_SUBU t1, t0 +#else + .set noat + LONG_SRL AT, t0, 1 + PTR_SUBU t1, AT + .set noat +#endif jr t1 PTR_ADDU a0, t0 /* dest ptr */ @@ -100,10 +121,10 @@ memset_partial: beqz a2, 1f PTR_ADDU a0, a2 /* What's left */ #ifdef __MIPSEB__ - EX(swr, a1, -1(a0), last_fixup) + EX(LONG_S_R, a1, -1(a0), last_fixup) #endif #ifdef __MIPSEL__ - EX(swl, a1, -1(a0), last_fixup) + EX(LONG_S_L, a1, -1(a0), last_fixup) #endif 1: jr ra move a2, zero diff --git a/arch/mips/lib/uncached.c b/arch/mips/lib/uncached.c index 98ce89f8068..2388f7f3ffd 100644 --- a/arch/mips/lib/uncached.c +++ b/arch/mips/lib/uncached.c @@ -44,20 +44,24 @@ unsigned long __init run_uncached(void *func) if (sp >= (long)CKSEG0 && sp < (long)CKSEG2) usp = CKSEG1ADDR(sp); +#ifdef CONFIG_64BIT else if ((long long)sp >= (long long)PHYS_TO_XKPHYS(0LL, 0) && (long long)sp < (long long)PHYS_TO_XKPHYS(8LL, 0)) usp = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED, XKPHYS_TO_PHYS((long long)sp)); +#endif else { BUG(); usp = sp; } if (lfunc >= (long)CKSEG0 && lfunc < (long)CKSEG2) ufunc = CKSEG1ADDR(lfunc); +#ifdef CONFIG_64BIT else if ((long long)lfunc >= (long long)PHYS_TO_XKPHYS(0LL, 0) && (long long)lfunc < (long long)PHYS_TO_XKPHYS(8LL, 0)) ufunc = PHYS_TO_XKPHYS((long long)K_CALG_UNCACHED, XKPHYS_TO_PHYS((long long)lfunc)); +#endif else { BUG(); ufunc = lfunc; diff --git a/arch/mips/mips-boards/atlas/atlas_int.c b/arch/mips/mips-boards/atlas/atlas_int.c index 43dba6ce660..dfa0acbd7fc 100644 --- a/arch/mips/mips-boards/atlas/atlas_int.c +++ b/arch/mips/mips-boards/atlas/atlas_int.c @@ -32,6 +32,7 @@ #include <linux/slab.h> #include <linux/interrupt.h> #include <linux/kernel_stat.h> +#include <linux/kernel.h> #include <asm/gdb-stub.h> #include <asm/io.h> @@ -69,7 +70,7 @@ static void end_atlas_irq(unsigned int irq) } static struct irq_chip atlas_irq_type = { - .typename = "Atlas", + .name = "Atlas", .ack = disable_atlas_irq, .mask = disable_atlas_irq, .mask_ack = disable_atlas_irq, @@ -220,7 +221,7 @@ msc_irqmap_t __initdata msc_irqmap[] = { {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0}, {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0}, }; -int __initdata msc_nr_irqs = sizeof(msc_irqmap) / sizeof(*msc_irqmap); +int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap); msc_irqmap_t __initdata msc_eicirqmap[] = { {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0}, @@ -231,14 +232,14 @@ msc_irqmap_t __initdata msc_eicirqmap[] = { {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0}, {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0} }; -int __initdata msc_nr_eicirqs = sizeof(msc_eicirqmap) / sizeof(*msc_eicirqmap); +int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); void __init arch_init_irq(void) { init_atlas_irqs(ATLAS_INT_BASE); if (!cpu_has_veic) - mips_cpu_irq_init(MIPSCPU_INT_BASE); + mips_cpu_irq_init(); switch(mips_revision_corid) { case MIPS_REVISION_CORID_CORE_MSC: diff --git a/arch/mips/mips-boards/generic/memory.c b/arch/mips/mips-boards/generic/memory.c index eeed944e0f8..ebf0e16c5a0 100644 --- a/arch/mips/mips-boards/generic/memory.c +++ b/arch/mips/mips-boards/generic/memory.c @@ -166,9 +166,8 @@ void __init prom_meminit(void) } } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - unsigned long freed = 0; unsigned long addr; int i; @@ -176,17 +175,8 @@ unsigned long __init prom_free_prom_memory(void) if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) continue; - addr = PAGE_ALIGN(boot_mem_map.map[i].addr); - while (addr < boot_mem_map.map[i].addr - + boot_mem_map.map[i].size) { - ClearPageReserved(virt_to_page(__va(addr))); - init_page_count(virt_to_page(__va(addr))); - free_page((unsigned long)__va(addr)); - addr += PAGE_SIZE; - freed += PAGE_SIZE; - } + addr = boot_mem_map.map[i].addr; + free_init_pages("prom memory", + addr, addr + boot_mem_map.map[i].size); } - printk("Freeing prom memory: %ldkb freed\n", freed >> 10); - - return freed; } diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index e4604c73f02..a3c3a1d462b 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -47,6 +47,9 @@ #ifdef CONFIG_MIPS_MALTA #include <asm/mips-boards/maltaint.h> #endif +#ifdef CONFIG_MIPS_SEAD +#include <asm/mips-boards/seadint.h> +#endif unsigned long cpu_khz; @@ -263,11 +266,13 @@ void __init mips_time_init(void) void __init plat_timer_setup(struct irqaction *irq) { +#ifdef MSC01E_INT_BASE if (cpu_has_veic) { set_vi_handler (MSC01E_INT_CPUCTR, mips_timer_dispatch); mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; - } - else { + } else +#endif + { if (cpu_has_vint) set_vi_handler (MIPSCPU_INT_CPUCTR, mips_timer_dispatch); mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR; diff --git a/arch/mips/mips-boards/malta/Makefile b/arch/mips/mips-boards/malta/Makefile index 77ee5c6d33c..cb7f349b051 100644 --- a/arch/mips/mips-boards/malta/Makefile +++ b/arch/mips/mips-boards/malta/Makefile @@ -20,4 +20,5 @@ # obj-y := malta_int.o malta_setup.o +obj-$(CONFIG_MTD) += malta_mtd.o obj-$(CONFIG_SMP) += malta_smp.o diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c index 90ad5bf3e2f..3c206bb1716 100644 --- a/arch/mips/mips-boards/malta/malta_int.c +++ b/arch/mips/mips-boards/malta/malta_int.c @@ -27,6 +27,7 @@ #include <linux/slab.h> #include <linux/interrupt.h> #include <linux/kernel_stat.h> +#include <linux/kernel.h> #include <linux/random.h> #include <asm/i8259.h> @@ -289,7 +290,7 @@ msc_irqmap_t __initdata msc_irqmap[] = { {MSC01C_INT_TMR, MSC01_IRQ_EDGE, 0}, {MSC01C_INT_PCI, MSC01_IRQ_LEVEL, 0}, }; -int __initdata msc_nr_irqs = sizeof(msc_irqmap)/sizeof(msc_irqmap_t); +int __initdata msc_nr_irqs = ARRAY_SIZE(msc_irqmap); msc_irqmap_t __initdata msc_eicirqmap[] = { {MSC01E_INT_SW0, MSC01_IRQ_LEVEL, 0}, @@ -303,14 +304,14 @@ msc_irqmap_t __initdata msc_eicirqmap[] = { {MSC01E_INT_PERFCTR, MSC01_IRQ_LEVEL, 0}, {MSC01E_INT_CPUCTR, MSC01_IRQ_LEVEL, 0} }; -int __initdata msc_nr_eicirqs = sizeof(msc_eicirqmap)/sizeof(msc_irqmap_t); +int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); void __init arch_init_irq(void) { init_i8259_irqs(); if (!cpu_has_veic) - mips_cpu_irq_init (MIPSCPU_INT_BASE); + mips_cpu_irq_init(); switch(mips_revision_corid) { case MIPS_REVISION_CORID_CORE_MSC: diff --git a/arch/mips/mips-boards/malta/malta_mtd.c b/arch/mips/mips-boards/malta/malta_mtd.c new file mode 100644 index 00000000000..8ad9bdf25dc --- /dev/null +++ b/arch/mips/mips-boards/malta/malta_mtd.c @@ -0,0 +1,63 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2006 MIPS Technologies, Inc. + * written by Ralf Baechle <ralf@linux-mips.org> + */ + +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/mtd/partitions.h> +#include <linux/mtd/physmap.h> +#include <mtd/mtd-abi.h> + +static struct mtd_partition malta_mtd_partitions[] = { + { + .name = "YAMON", + .offset = 0x0, + .size = 0x100000, + .mask_flags = MTD_WRITEABLE + }, { + .name = "User FS", + .offset = 0x100000, + .size = 0x2e0000 + }, { + .name = "Board Config", + .offset = 0x3e0000, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE + } +}; + +static struct physmap_flash_data malta_flash_data = { + .width = 4, + .nr_parts = ARRAY_SIZE(malta_mtd_partitions), + .parts = malta_mtd_partitions +}; + +static struct resource malta_flash_resource = { + .start = 0x1e000000, + .end = 0x1e3fffff, + .flags = IORESOURCE_MEM +}; + +static struct platform_device malta_flash = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &malta_flash_data, + }, + .num_resources = 1, + .resource = &malta_flash_resource, +}; + +static int __init malta_mtd_init(void) +{ + platform_device_register(&malta_flash); + + return 0; +} + +module_init(malta_mtd_init) diff --git a/arch/mips/mips-boards/malta/malta_setup.c b/arch/mips/mips-boards/malta/malta_setup.c index 282f3e52eea..56ea76679cd 100644 --- a/arch/mips/mips-boards/malta/malta_setup.c +++ b/arch/mips/mips-boards/malta/malta_setup.c @@ -21,13 +21,6 @@ #include <linux/pci.h> #include <linux/screen_info.h> -#ifdef CONFIG_MTD -#include <linux/mtd/partitions.h> -#include <linux/mtd/physmap.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/map.h> -#endif - #include <asm/cpu.h> #include <asm/bootinfo.h> #include <asm/irq.h> @@ -58,30 +51,6 @@ struct resource standard_io_resources[] = { { .name = "dma2", .start = 0xc0, .end = 0xdf, .flags = IORESOURCE_BUSY }, }; -#ifdef CONFIG_MTD -static struct mtd_partition malta_mtd_partitions[] = { - { - .name = "YAMON", - .offset = 0x0, - .size = 0x100000, - .mask_flags = MTD_WRITEABLE - }, - { - .name = "User FS", - .offset = 0x100000, - .size = 0x2e0000 - }, - { - .name = "Board Config", - .offset = 0x3e0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE - } -}; - -#define number_partitions (sizeof(malta_mtd_partitions)/sizeof(struct mtd_partition)) -#endif - const char *get_system_type(void) { return "MIPS Malta"; @@ -211,14 +180,6 @@ void __init plat_mem_setup(void) #endif #endif -#ifdef CONFIG_MTD - /* - * Support for MTD on Malta. Use the generic physmap driver - */ - physmap_configure(0x1e000000, 0x400000, 4, NULL); - physmap_set_partitions(malta_mtd_partitions, number_partitions); -#endif - mips_reboot_setup(); board_time_init = mips_time_init; diff --git a/arch/mips/mips-boards/sead/sead_int.c b/arch/mips/mips-boards/sead/sead_int.c index f445fcddfdf..c4b9de3a7f2 100644 --- a/arch/mips/mips-boards/sead/sead_int.c +++ b/arch/mips/mips-boards/sead/sead_int.c @@ -21,7 +21,7 @@ * Sead board. */ #include <linux/init.h> -#include <linux/irq.h> +#include <linux/interrupt.h> #include <asm/irq_cpu.h> #include <asm/mipsregs.h> @@ -108,10 +108,10 @@ asmlinkage void plat_irq_dispatch(void) if (irq >= 0) do_IRQ(MIPSCPU_INT_BASE + irq); else - spurious_interrupt(regs); + spurious_interrupt(); } void __init arch_init_irq(void) { - mips_cpu_irq_init(MIPSCPU_INT_BASE); + mips_cpu_irq_init(); } diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c index 2ce449dce6f..15ac0655c1f 100644 --- a/arch/mips/mips-boards/sim/sim_int.c +++ b/arch/mips/mips-boards/sim/sim_int.c @@ -21,9 +21,7 @@ #include <linux/interrupt.h> #include <linux/kernel_stat.h> #include <asm/mips-boards/simint.h> - - -extern void mips_cpu_irq_init(int); +#include <asm/irq_cpu.h> static inline int clz(unsigned long x) { @@ -86,5 +84,5 @@ asmlinkage void plat_irq_dispatch(void) void __init arch_init_irq(void) { - mips_cpu_irq_init(MIPSCPU_INT_BASE); + mips_cpu_irq_init(); } diff --git a/arch/mips/mips-boards/sim/sim_mem.c b/arch/mips/mips-boards/sim/sim_mem.c index f7ce7698332..46bc16f8b15 100644 --- a/arch/mips/mips-boards/sim/sim_mem.c +++ b/arch/mips/mips-boards/sim/sim_mem.c @@ -99,10 +99,9 @@ void __init prom_meminit(void) } } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { int i; - unsigned long freed = 0; unsigned long addr; for (i = 0; i < boot_mem_map.nr_map; i++) { @@ -110,16 +109,7 @@ unsigned long __init prom_free_prom_memory(void) continue; addr = boot_mem_map.map[i].addr; - while (addr < boot_mem_map.map[i].addr - + boot_mem_map.map[i].size) { - ClearPageReserved(virt_to_page(__va(addr))); - init_page_count(virt_to_page(__va(addr))); - free_page((unsigned long)__va(addr)); - addr += PAGE_SIZE; - freed += PAGE_SIZE; - } + free_init_pages("prom memory", + addr, addr + boot_mem_map.map[i].size); } - printk("Freeing prom memory: %ldkb freed\n", freed >> 10); - - return freed; } diff --git a/arch/mips/mips-boards/sim/sim_setup.c b/arch/mips/mips-boards/sim/sim_setup.c index 2659c1c3b78..ea2066c3a1f 100644 --- a/arch/mips/mips-boards/sim/sim_setup.c +++ b/arch/mips/mips-boards/sim/sim_setup.c @@ -57,7 +57,7 @@ void __init plat_mem_setup(void) board_time_init = sim_time_init; prom_printf("Linux started...\n"); -#ifdef CONFIG_MT_SMP +#ifdef CONFIG_MIPS_MT_SMP sanitize_tlb_entries(); #endif } diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index caf807ded51..1f954a238a6 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c @@ -32,6 +32,7 @@ void (*local_flush_data_cache_page)(void * addr); void (*flush_data_cache_page)(unsigned long addr); void (*flush_icache_all)(void); +EXPORT_SYMBOL_GPL(local_flush_data_cache_page); EXPORT_SYMBOL(flush_data_cache_page); #ifdef CONFIG_DMA_NONCOHERENT diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 9e29ba9205f..125a4a85ec0 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -203,6 +203,31 @@ static inline void kunmap_coherent(struct page *page) preempt_check_resched(); } +void copy_user_highpage(struct page *to, struct page *from, + unsigned long vaddr, struct vm_area_struct *vma) +{ + void *vfrom, *vto; + + vto = kmap_atomic(to, KM_USER1); + if (cpu_has_dc_aliases) { + vfrom = kmap_coherent(from, vaddr); + copy_page(vto, vfrom); + kunmap_coherent(from); + } else { + vfrom = kmap_atomic(from, KM_USER0); + copy_page(vto, vfrom); + kunmap_atomic(vfrom, KM_USER0); + } + if (((vma->vm_flags & VM_EXEC) && !cpu_has_ic_fills_f_dc) || + pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) + flush_data_cache_page((unsigned long)vto); + kunmap_atomic(vto, KM_USER1); + /* Make sure this page is cleared on other CPU's too before using it */ + smp_wmb(); +} + +EXPORT_SYMBOL(copy_user_highpage); + void copy_to_user_page(struct vm_area_struct *vma, struct page *page, unsigned long vaddr, void *dst, const void *src, unsigned long len) @@ -316,7 +341,6 @@ static int __init page_is_ram(unsigned long pagenr) void __init paging_init(void) { unsigned long zones_size[MAX_NR_ZONES] = { 0, }; - unsigned long max_dma, high, low; #ifndef CONFIG_FLATMEM unsigned long zholes_size[MAX_NR_ZONES] = { 0, }; unsigned long i, j, pfn; @@ -329,28 +353,27 @@ void __init paging_init(void) #endif kmap_coherent_init(); - max_dma = virt_to_phys((char *)MAX_DMA_ADDRESS) >> PAGE_SHIFT; - low = max_low_pfn; - high = highend_pfn; - #ifdef CONFIG_ISA - if (low < max_dma) - zones_size[ZONE_DMA] = low; - else { - zones_size[ZONE_DMA] = max_dma; - zones_size[ZONE_NORMAL] = low - max_dma; - } -#else - zones_size[ZONE_DMA] = low; + if (max_low_pfn >= MAX_DMA_PFN) + if (min_low_pfn >= MAX_DMA_PFN) { + zones_size[ZONE_DMA] = 0; + zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn; + } else { + zones_size[ZONE_DMA] = MAX_DMA_PFN - min_low_pfn; + zones_size[ZONE_NORMAL] = max_low_pfn - MAX_DMA_PFN; + } + else #endif + zones_size[ZONE_DMA] = max_low_pfn - min_low_pfn; + #ifdef CONFIG_HIGHMEM - if (cpu_has_dc_aliases) { - printk(KERN_WARNING "This processor doesn't support highmem."); - if (high - low) - printk(" %ldk highmem ignored", high - low); - printk("\n"); - } else - zones_size[ZONE_HIGHMEM] = high - low; + zones_size[ZONE_HIGHMEM] = highend_pfn - highstart_pfn; + + if (cpu_has_dc_aliases && zones_size[ZONE_HIGHMEM]) { + printk(KERN_WARNING "This processor doesn't support highmem." + " %ldk highmem ignored\n", zones_size[ZONE_HIGHMEM]); + zones_size[ZONE_HIGHMEM] = 0; + } #endif #ifdef CONFIG_FLATMEM @@ -443,7 +466,7 @@ void __init mem_init(void) } #endif /* !CONFIG_NEED_MULTIPLE_NODES */ -static void free_init_pages(char *what, unsigned long begin, unsigned long end) +void free_init_pages(const char *what, unsigned long begin, unsigned long end) { unsigned long pfn; @@ -469,17 +492,25 @@ void free_initrd_mem(unsigned long start, unsigned long end) } #endif -extern unsigned long prom_free_prom_memory(void); - void free_initmem(void) { - unsigned long freed; - - freed = prom_free_prom_memory(); - if (freed) - printk(KERN_INFO "Freeing firmware memory: %ldk freed\n",freed); - + prom_free_prom_memory(); free_init_pages("unused kernel memory", __pa_symbol(&__init_begin), __pa_symbol(&__init_end)); } + +unsigned long pgd_current[NR_CPUS]; +/* + * On 64-bit we've got three-level pagetables with a slightly + * different layout ... + */ +#define __page_aligned(order) __attribute__((__aligned__(PAGE_SIZE<<order))) +pgd_t swapper_pg_dir[PTRS_PER_PGD] __page_aligned(PGD_ORDER); +#ifdef CONFIG_64BIT +#ifdef MODULE_START +pgd_t module_pg_dir[PTRS_PER_PGD] __page_aligned(PGD_ORDER); +#endif +pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned(PMD_ORDER); +#endif +pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned(PTE_ORDER); diff --git a/arch/mips/mm/ioremap.c b/arch/mips/mm/ioremap.c index cea7d0ea36e..fc2c96f0a1f 100644 --- a/arch/mips/mm/ioremap.c +++ b/arch/mips/mm/ioremap.c @@ -6,98 +6,13 @@ * (C) Copyright 1995 1996 Linus Torvalds * (C) Copyright 2001, 2002 Ralf Baechle */ +#include <linux/mm.h> #include <linux/module.h> #include <asm/addrspace.h> #include <asm/byteorder.h> #include <linux/vmalloc.h> -#include <asm/cacheflush.h> -#include <asm/io.h> -#include <asm/tlbflush.h> - -static inline void remap_area_pte(pte_t * pte, unsigned long address, - phys_t size, phys_t phys_addr, unsigned long flags) -{ - phys_t end; - unsigned long pfn; - pgprot_t pgprot = __pgprot(_PAGE_GLOBAL | _PAGE_PRESENT | __READABLE - | __WRITEABLE | flags); - - address &= ~PMD_MASK; - end = address + size; - if (end > PMD_SIZE) - end = PMD_SIZE; - if (address >= end) - BUG(); - pfn = phys_addr >> PAGE_SHIFT; - do { - if (!pte_none(*pte)) { - printk("remap_area_pte: page already exists\n"); - BUG(); - } - set_pte(pte, pfn_pte(pfn, pgprot)); - address += PAGE_SIZE; - pfn++; - pte++; - } while (address && (address < end)); -} - -static inline int remap_area_pmd(pmd_t * pmd, unsigned long address, - phys_t size, phys_t phys_addr, unsigned long flags) -{ - phys_t end; - - address &= ~PGDIR_MASK; - end = address + size; - if (end > PGDIR_SIZE) - end = PGDIR_SIZE; - phys_addr -= address; - if (address >= end) - BUG(); - do { - pte_t * pte = pte_alloc_kernel(pmd, address); - if (!pte) - return -ENOMEM; - remap_area_pte(pte, address, end - address, address + phys_addr, flags); - address = (address + PMD_SIZE) & PMD_MASK; - pmd++; - } while (address && (address < end)); - return 0; -} - -static int remap_area_pages(unsigned long address, phys_t phys_addr, - phys_t size, unsigned long flags) -{ - int error; - pgd_t * dir; - unsigned long end = address + size; - - phys_addr -= address; - dir = pgd_offset(&init_mm, address); - flush_cache_all(); - if (address >= end) - BUG(); - do { - pud_t *pud; - pmd_t *pmd; - - error = -ENOMEM; - pud = pud_alloc(&init_mm, dir, address); - if (!pud) - break; - pmd = pmd_alloc(&init_mm, pud, address); - if (!pmd) - break; - if (remap_area_pmd(pmd, address, end - address, - phys_addr + address, flags)) - break; - error = 0; - address = (address + PGDIR_SIZE) & PGDIR_MASK; - dir++; - } while (address && (address < end)); - flush_tlb_all(); - return error; -} +#include <linux/io.h> /* * Generic mapping function (not visible outside): @@ -121,6 +36,7 @@ void __iomem * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags) unsigned long offset; phys_t last_addr; void * addr; + pgprot_t pgprot; phys_addr = fixup_bigphys_addr(phys_addr, size); @@ -152,6 +68,9 @@ void __iomem * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags) return NULL; } + pgprot = __pgprot(_PAGE_GLOBAL | _PAGE_PRESENT | __READABLE + | __WRITEABLE | flags); + /* * Mappings have to be page-aligned */ @@ -166,7 +85,8 @@ void __iomem * __ioremap(phys_t phys_addr, phys_t size, unsigned long flags) if (!area) return NULL; addr = area->addr; - if (remap_area_pages((unsigned long) addr, phys_addr, size, flags)) { + if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size, + phys_addr, pgprot)) { vunmap(addr); return NULL; } diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c index d41fc5885e8..dc795be6280 100644 --- a/arch/mips/mm/pg-r4k.c +++ b/arch/mips/mm/pg-r4k.c @@ -243,11 +243,10 @@ static void __init __build_store_reg(int reg) static inline void build_store_reg(int reg) { - if (cpu_has_prefetch) - if (reg) - build_dst_pref(pref_offset_copy); - else - build_dst_pref(pref_offset_clear); + int pref_off = cpu_has_prefetch ? + (reg ? pref_offset_copy : pref_offset_clear) : 0; + if (pref_off) + build_dst_pref(pref_off); else if (cpu_has_cache_cdex_s) build_cdex_s(); else if (cpu_has_cache_cdex_p) diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c index 2e0e21ef433..65160d4984d 100644 --- a/arch/mips/mm/tlb-r4k.c +++ b/arch/mips/mm/tlb-r4k.c @@ -106,7 +106,6 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start, ENTER_CRITICAL(flags); size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT; size = (size + 1) >> 1; - local_irq_save(flags); if (size <= current_cpu_data.tlbsize/2) { int oldpid = read_c0_entryhi(); int newpid = cpu_asid(cpu, mm); diff --git a/arch/mips/momentum/jaguar_atx/Makefile b/arch/mips/momentum/jaguar_atx/Makefile index 67372f3f965..2e8cebd49bc 100644 --- a/arch/mips/momentum/jaguar_atx/Makefile +++ b/arch/mips/momentum/jaguar_atx/Makefile @@ -6,7 +6,7 @@ # unless it's something special (ie not a .c file). # -obj-y += irq.o prom.o reset.o setup.o +obj-y += irq.o platform.o prom.o reset.o setup.o obj-$(CONFIG_SERIAL_8250_CONSOLE) += ja-console.o obj-$(CONFIG_REMOTE_DEBUG) += dbg_io.o diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c index 2efb25aa1ae..f2b432585df 100644 --- a/arch/mips/momentum/jaguar_atx/irq.c +++ b/arch/mips/momentum/jaguar_atx/irq.c @@ -82,8 +82,8 @@ void __init arch_init_irq(void) */ clear_c0_status(ST0_IM); - mips_cpu_irq_init(0); - rm7k_cpu_irq_init(8); + mips_cpu_irq_init(); + rm7k_cpu_irq_init(); /* set up the cascading interrupts */ setup_irq(8, &cascade_mv64340); diff --git a/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h b/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h index 6978654c712..022f6974b76 100644 --- a/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h +++ b/arch/mips/momentum/jaguar_atx/jaguar_atx_fpga.h @@ -46,7 +46,9 @@ extern unsigned long ja_fpga_base; -#define JAGUAR_FPGA_WRITE(x,y) writeb(x, ja_fpga_base + JAGUAR_ATX_REG_##y) -#define JAGUAR_FPGA_READ(x) readb(ja_fpga_base + JAGUAR_ATX_REG_##x) +#define __FPGA_REG_TO_ADDR(reg) \ + ((void *) ja_fpga_base + JAGUAR_ATX_REG_##reg) +#define JAGUAR_FPGA_WRITE(x, reg) writeb(x, __FPGA_REG_TO_ADDR(reg)) +#define JAGUAR_FPGA_READ(reg) readb(__FPGA_REG_TO_ADDR(reg)) #endif diff --git a/arch/mips/momentum/jaguar_atx/platform.c b/arch/mips/momentum/jaguar_atx/platform.c new file mode 100644 index 00000000000..035ea5137c7 --- /dev/null +++ b/arch/mips/momentum/jaguar_atx/platform.c @@ -0,0 +1,235 @@ +#include <linux/delay.h> +#include <linux/if_ether.h> +#include <linux/ioport.h> +#include <linux/mv643xx.h> +#include <linux/platform_device.h> + +#include "jaguar_atx_fpga.h" + +#if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) + +static struct resource mv643xx_eth_shared_resources[] = { + [0] = { + .name = "ethernet shared base", + .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS, + .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS + + MV643XX_ETH_SHARED_REGS_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device mv643xx_eth_shared_device = { + .name = MV643XX_ETH_SHARED_NAME, + .id = 0, + .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources), + .resource = mv643xx_eth_shared_resources, +}; + +#define MV_SRAM_BASE 0xfe000000UL +#define MV_SRAM_SIZE (256 * 1024) + +#define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4) +#define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4) + +#define MV_SRAM_BASE_ETH0 MV_SRAM_BASE +#define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2)) + +#define MV64x60_IRQ_ETH_0 48 +#define MV64x60_IRQ_ETH_1 49 +#define MV64x60_IRQ_ETH_2 50 + +#ifdef CONFIG_MV643XX_ETH_0 + +static struct resource mv64x60_eth0_resources[] = { + [0] = { + .name = "eth0 irq", + .start = MV64x60_IRQ_ETH_0, + .end = MV64x60_IRQ_ETH_0, + .flags = IORESOURCE_IRQ, + }, +}; + +static char eth0_mac_addr[ETH_ALEN]; + +static struct mv643xx_eth_platform_data eth0_pd = { + .mac_addr = eth0_mac_addr, + + .tx_sram_addr = MV_SRAM_BASE_ETH0, + .tx_sram_size = MV_SRAM_TXRING_SIZE, + .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, + + .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE, + .rx_sram_size = MV_SRAM_RXRING_SIZE, + .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, +}; + +static struct platform_device eth0_device = { + .name = MV643XX_ETH_NAME, + .id = 0, + .num_resources = ARRAY_SIZE(mv64x60_eth0_resources), + .resource = mv64x60_eth0_resources, + .dev = { + .platform_data = ð0_pd, + }, +}; +#endif /* CONFIG_MV643XX_ETH_0 */ + +#ifdef CONFIG_MV643XX_ETH_1 + +static struct resource mv64x60_eth1_resources[] = { + [0] = { + .name = "eth1 irq", + .start = MV64x60_IRQ_ETH_1, + .end = MV64x60_IRQ_ETH_1, + .flags = IORESOURCE_IRQ, + }, +}; + +static char eth1_mac_addr[ETH_ALEN]; + +static struct mv643xx_eth_platform_data eth1_pd = { + .mac_addr = eth1_mac_addr, + + .tx_sram_addr = MV_SRAM_BASE_ETH1, + .tx_sram_size = MV_SRAM_TXRING_SIZE, + .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, + + .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE, + .rx_sram_size = MV_SRAM_RXRING_SIZE, + .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, +}; + +static struct platform_device eth1_device = { + .name = MV643XX_ETH_NAME, + .id = 1, + .num_resources = ARRAY_SIZE(mv64x60_eth1_resources), + .resource = mv64x60_eth1_resources, + .dev = { + .platform_data = ð1_pd, + }, +}; +#endif /* CONFIG_MV643XX_ETH_1 */ + +#ifdef CONFIG_MV643XX_ETH_2 + +static struct resource mv64x60_eth2_resources[] = { + [0] = { + .name = "eth2 irq", + .start = MV64x60_IRQ_ETH_2, + .end = MV64x60_IRQ_ETH_2, + .flags = IORESOURCE_IRQ, + }, +}; + +static char eth2_mac_addr[ETH_ALEN]; + +static struct mv643xx_eth_platform_data eth2_pd = { + .mac_addr = eth2_mac_addr, +}; + +static struct platform_device eth2_device = { + .name = MV643XX_ETH_NAME, + .id = 1, + .num_resources = ARRAY_SIZE(mv64x60_eth2_resources), + .resource = mv64x60_eth2_resources, + .dev = { + .platform_data = ð2_pd, + }, +}; +#endif /* CONFIG_MV643XX_ETH_2 */ + +static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { + &mv643xx_eth_shared_device, +#ifdef CONFIG_MV643XX_ETH_0 + ð0_device, +#endif +#ifdef CONFIG_MV643XX_ETH_1 + ð1_device, +#endif +#ifdef CONFIG_MV643XX_ETH_2 + ð2_device, +#endif +}; + +static u8 __init exchange_bit(u8 val, u8 cs) +{ + /* place the data */ + JAGUAR_FPGA_WRITE((val << 2) | cs, EEPROM_MODE); + udelay(1); + + /* turn the clock on */ + JAGUAR_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE); + udelay(1); + + /* turn the clock off and read-strobe */ + JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); + + /* return the data */ + return (JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1; +} + +static void __init get_mac(char dest[6]) +{ + u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; + int i,j; + + for (i = 0; i < 12; i++) + exchange_bit(read_opcode[i], 1); + + for (j = 0; j < 6; j++) { + dest[j] = 0; + for (i = 0; i < 8; i++) { + dest[j] <<= 1; + dest[j] |= exchange_bit(0, 1); + } + } + + /* turn off CS */ + exchange_bit(0,0); +} + +/* + * Copy and increment ethernet MAC address by a small value. + * + * This is useful for systems where the only one MAC address is stored in + * non-volatile memory for multiple ports. + */ +static inline void eth_mac_add(unsigned char *dst, unsigned char *src, + unsigned int add) +{ + int i; + + BUG_ON(add >= 256); + + for (i = ETH_ALEN; i >= 0; i--) { + dst[i] = src[i] + add; + add = dst[i] < src[i]; /* compute carry */ + } + + WARN_ON(add); +} + +static int __init mv643xx_eth_add_pds(void) +{ + unsigned char mac[ETH_ALEN]; + int ret; + + get_mac(mac); +#ifdef CONFIG_MV643XX_ETH_0 + eth_mac_add(eth1_mac_addr, mac, 0); +#endif +#ifdef CONFIG_MV643XX_ETH_1 + eth_mac_add(eth1_mac_addr, mac, 1); +#endif +#ifdef CONFIG_MV643XX_ETH_2 + eth_mac_add(eth2_mac_addr, mac, 2); +#endif + ret = platform_add_devices(mv643xx_eth_pd_devs, + ARRAY_SIZE(mv643xx_eth_pd_devs)); + + return ret; +} + +device_initcall(mv643xx_eth_add_pds); + +#endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */ diff --git a/arch/mips/momentum/jaguar_atx/prom.c b/arch/mips/momentum/jaguar_atx/prom.c index 3d271292929..5dd154ee58f 100644 --- a/arch/mips/momentum/jaguar_atx/prom.c +++ b/arch/mips/momentum/jaguar_atx/prom.c @@ -39,56 +39,6 @@ const char *get_system_type(void) return "Momentum Jaguar-ATX"; } -#ifdef CONFIG_MV643XX_ETH -extern unsigned char prom_mac_addr_base[6]; - -static void burn_clocks(void) -{ - int i; - - /* this loop should burn at least 1us -- this should be plenty */ - for (i = 0; i < 0x10000; i++) - ; -} - -static u8 exchange_bit(u8 val, u8 cs) -{ - /* place the data */ - JAGUAR_FPGA_WRITE((val << 2) | cs, EEPROM_MODE); - burn_clocks(); - - /* turn the clock on */ - JAGUAR_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE); - burn_clocks(); - - /* turn the clock off and read-strobe */ - JAGUAR_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); - - /* return the data */ - return ((JAGUAR_FPGA_READ(EEPROM_MODE) >> 3) & 0x1); -} - -void get_mac(char dest[6]) -{ - u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; - int i,j; - - for (i = 0; i < 12; i++) - exchange_bit(read_opcode[i], 1); - - for (j = 0; j < 6; j++) { - dest[j] = 0; - for (i = 0; i < 8; i++) { - dest[j] <<= 1; - dest[j] |= exchange_bit(0, 1); - } - } - - /* turn off CS */ - exchange_bit(0,0); -} -#endif - #ifdef CONFIG_64BIT unsigned long signext(unsigned long addr) @@ -228,16 +178,10 @@ void __init prom_init(void) #endif /* CONFIG_64BIT */ mips_machgroup = MACH_GROUP_MOMENCO; mips_machtype = MACH_MOMENCO_JAGUAR_ATX; - -#ifdef CONFIG_MV643XX_ETH - /* get the base MAC address for on-board ethernet ports */ - get_mac(prom_mac_addr_base); -#endif } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } void __init prom_fixup_mem_map(unsigned long start, unsigned long end) diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c index cea0e5deb80..3862d1d1add 100644 --- a/arch/mips/momentum/ocelot_3/irq.c +++ b/arch/mips/momentum/ocelot_3/irq.c @@ -65,7 +65,7 @@ void __init arch_init_irq(void) */ clear_c0_status(ST0_IM | ST0_BEV); - rm7k_cpu_irq_init(8); + rm7k_cpu_irq_init(); /* set up the cascading interrupts */ setup_irq(8, &cascade_mv64340); /* unmask intControl IM8, IRQ 9 */ diff --git a/arch/mips/momentum/ocelot_3/prom.c b/arch/mips/momentum/ocelot_3/prom.c index 6ce9b7fdb82..8e02df63578 100644 --- a/arch/mips/momentum/ocelot_3/prom.c +++ b/arch/mips/momentum/ocelot_3/prom.c @@ -180,9 +180,8 @@ void __init prom_init(void) #endif } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } void __init prom_fixup_mem_map(unsigned long start, unsigned long end) diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c index bb11fef0847..186a140fd2a 100644 --- a/arch/mips/momentum/ocelot_c/cpci-irq.c +++ b/arch/mips/momentum/ocelot_c/cpci-irq.c @@ -84,7 +84,7 @@ void ll_cpci_irq(void) } struct irq_chip cpci_irq_type = { - .typename = "CPCI/FPGA", + .name = "CPCI/FPGA", .ack = mask_cpci_irq, .mask = mask_cpci_irq, .mask_ack = mask_cpci_irq, diff --git a/arch/mips/momentum/ocelot_c/dbg_io.c b/arch/mips/momentum/ocelot_c/dbg_io.c index 2128684584f..32d6fb4ee67 100644 --- a/arch/mips/momentum/ocelot_c/dbg_io.c +++ b/arch/mips/momentum/ocelot_c/dbg_io.c @@ -1,6 +1,4 @@ -#ifdef CONFIG_KGDB - #include <asm/serial.h> /* For the serial port location and base baud */ /* --- CONFIG --- */ @@ -121,5 +119,3 @@ int putDebugChar(uint8 byte) UART16550_WRITE(OFS_SEND_BUFFER, byte); return 1; } - -#endif diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c index ea65223a6d2..40472f7944d 100644 --- a/arch/mips/momentum/ocelot_c/irq.c +++ b/arch/mips/momentum/ocelot_c/irq.c @@ -94,7 +94,7 @@ void __init arch_init_irq(void) */ clear_c0_status(ST0_IM); - mips_cpu_irq_init(0); + mips_cpu_irq_init(); /* set up the cascading interrupts */ setup_irq(3, &cascade_fpga); diff --git a/arch/mips/momentum/ocelot_c/prom.c b/arch/mips/momentum/ocelot_c/prom.c index d0b77e101d7..b689ceea8cf 100644 --- a/arch/mips/momentum/ocelot_c/prom.c +++ b/arch/mips/momentum/ocelot_c/prom.c @@ -178,7 +178,6 @@ void __init prom_init(void) #endif } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c index a7a80c0da56..de1a31ee52f 100644 --- a/arch/mips/momentum/ocelot_c/uart-irq.c +++ b/arch/mips/momentum/ocelot_c/uart-irq.c @@ -77,7 +77,7 @@ void ll_uart_irq(void) } struct irq_chip uart_irq_type = { - .typename = "UART/FPGA", + .name = "UART/FPGA", .ack = mask_uart_irq, .mask = mask_uart_irq, .mask_ack = mask_uart_irq, diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c index 2128684584f..32d6fb4ee67 100644 --- a/arch/mips/momentum/ocelot_g/dbg_io.c +++ b/arch/mips/momentum/ocelot_g/dbg_io.c @@ -1,6 +1,4 @@ -#ifdef CONFIG_KGDB - #include <asm/serial.h> /* For the serial port location and base baud */ /* --- CONFIG --- */ @@ -121,5 +119,3 @@ int putDebugChar(uint8 byte) UART16550_WRITE(OFS_SEND_BUFFER, byte); return 1; } - -#endif diff --git a/arch/mips/momentum/ocelot_g/irq.c b/arch/mips/momentum/ocelot_g/irq.c index da46524e87c..273541fe708 100644 --- a/arch/mips/momentum/ocelot_g/irq.c +++ b/arch/mips/momentum/ocelot_g/irq.c @@ -94,8 +94,8 @@ void __init arch_init_irq(void) clear_c0_status(ST0_IM); local_irq_disable(); - mips_cpu_irq_init(0); - rm7k_cpu_irq_init(8); + mips_cpu_irq_init(); + rm7k_cpu_irq_init(); gt64240_irq_init(); } diff --git a/arch/mips/momentum/ocelot_g/prom.c b/arch/mips/momentum/ocelot_g/prom.c index 6509a9c9863..836d0830720 100644 --- a/arch/mips/momentum/ocelot_g/prom.c +++ b/arch/mips/momentum/ocelot_g/prom.c @@ -28,7 +28,7 @@ struct callvectors* debug_vectors; extern unsigned long marvell_base; extern unsigned long bus_clock; -#ifdef CONFIG_GALILLEO_GT64240_ETH +#ifdef CONFIG_GALILEO_GT64240_ETH extern unsigned char prom_mac_addr_base[6]; #endif @@ -61,7 +61,7 @@ void __init prom_init(void) mips_machgroup = MACH_GROUP_MOMENCO; mips_machtype = MACH_MOMENCO_OCELOT_G; -#ifdef CONFIG_GALILLEO_GT64240_ETH +#ifdef CONFIG_GALILEO_GT64240_ETH /* get the base MAC address for on-board ethernet ports */ memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); #endif @@ -79,7 +79,6 @@ void __init prom_init(void) } } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } diff --git a/arch/mips/momentum/ocelot_g/setup.c b/arch/mips/momentum/ocelot_g/setup.c index d288f7b0184..9db638a7982 100644 --- a/arch/mips/momentum/ocelot_g/setup.c +++ b/arch/mips/momentum/ocelot_g/setup.c @@ -64,7 +64,7 @@ #include "ocelot_pld.h" -#ifdef CONFIG_GALILLEO_GT64240_ETH +#ifdef CONFIG_GALILEO_GT64240_ETH extern unsigned char prom_mac_addr_base[6]; #endif @@ -185,7 +185,7 @@ void __init plat_mem_setup(void) /* do handoff reconfiguration */ PMON_v2_setup(); -#ifdef CONFIG_GALILLEO_GT64240_ETH +#ifdef CONFIG_GALILEO_GT64240_ETH /* get the mac addr */ memcpy(prom_mac_addr_base, (void*)0xfc807cf2, 6); #endif diff --git a/arch/mips/oprofile/Kconfig b/arch/mips/oprofile/Kconfig index 55feaf79859..ca395ef06d4 100644 --- a/arch/mips/oprofile/Kconfig +++ b/arch/mips/oprofile/Kconfig @@ -11,7 +11,7 @@ config PROFILING config OPROFILE tristate "OProfile system profiling (EXPERIMENTAL)" - depends on PROFILING && EXPERIMENTAL + depends on PROFILING && !!MIPS_MT_SMTC && EXPERIMENTAL help OProfile is a profiling system capable of profiling the whole system, include the kernel, kernel modules, libraries, diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 70cb55b89df..82b20c28bef 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile @@ -43,7 +43,7 @@ obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o obj-$(CONFIG_SIBYTE_BCM112X) += fixup-sb1250.o pci-sb1250.o obj-$(CONFIG_SIBYTE_BCM1x80) += pci-bcm1480.o pci-bcm1480ht.o -obj-$(CONFIG_SNI_RM200_PCI) += fixup-sni.o ops-sni.o +obj-$(CONFIG_SNI_RM) += fixup-sni.o ops-sni.o obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o diff --git a/arch/mips/pci/fixup-pnx8550.c b/arch/mips/pci/fixup-pnx8550.c index 4256b3b30b7..50546dab668 100644 --- a/arch/mips/pci/fixup-pnx8550.c +++ b/arch/mips/pci/fixup-pnx8550.c @@ -33,7 +33,7 @@ #define DBG(x...) #endif -extern char irq_tab_jbs[][5]; +extern char pnx8550_irq_tab[][5]; void __init pcibios_fixup_resources(struct pci_dev *dev) { @@ -47,7 +47,7 @@ void __init pcibios_fixup(void) int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { - return irq_tab_jbs[slot][pin]; + return pnx8550_irq_tab[slot][pin]; } /* Do platform specific device initialization at pci_enable_device() time */ diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c index 597b89764ba..a8d9d22b13d 100644 --- a/arch/mips/pci/fixup-vr4133.c +++ b/arch/mips/pci/fixup-vr4133.c @@ -17,8 +17,10 @@ */ #include <linux/init.h> #include <linux/pci.h> +#include <linux/kernel.h> #include <asm/io.h> +#include <asm/i8259.h> #include <asm/vr41xx/cmbvr4133.h> extern int vr4133_rockhopper; @@ -142,7 +144,7 @@ int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot) if (bus == NULL) return -1; - for (i = 0; i < sizeof (int_map) / sizeof (int_map[0]); i++) { + for (i = 0; i < ARRAY_SIZE(int_map); i++) { if (int_map[i].bus == bus->number && int_map[i].slot == slot) { int line; for (line = 0; line < 4; line++) @@ -160,17 +162,7 @@ int rockhopper_get_irq(struct pci_dev *dev, u8 pin, u8 slot) #ifdef CONFIG_ROCKHOPPER void i8259_init(void) { - outb(0x11, 0x20); /* Master ICW1 */ - outb(I8259_IRQ_BASE, 0x21); /* Master ICW2 */ - outb(0x04, 0x21); /* Master ICW3 */ - outb(0x01, 0x21); /* Master ICW4 */ - outb(0xff, 0x21); /* Master IMW */ - - outb(0x11, 0xa0); /* Slave ICW1 */ - outb(I8259_IRQ_BASE + 8, 0xa1); /* Slave ICW2 */ - outb(0x02, 0xa1); /* Slave ICW3 */ - outb(0x01, 0xa1); /* Slave ICW4 */ - outb(0xff, 0xa1); /* Slave IMW */ + init_i8259_irqs(); outb(0x00, 0x4d0); outb(0x02, 0x4d1); /* USB IRQ9 is level */ diff --git a/arch/mips/pci/ops-pnx8550.c b/arch/mips/pci/ops-pnx8550.c index 454b65cc335..f556b7a8dcc 100644 --- a/arch/mips/pci/ops-pnx8550.c +++ b/arch/mips/pci/ops-pnx8550.c @@ -202,7 +202,7 @@ write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val) break; } - err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(1 << (where & 3)), &data); + err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, ~(1 << (where & 3)), &data); return err; } diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index 2c36c108c4d..d48665ebd33 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c @@ -159,7 +159,7 @@ int pnx8550_set_gic_priority(int irq, int priority) } static struct irq_chip level_irq_type = { - .typename = "PNX Level IRQ", + .name = "PNX Level IRQ", .ack = mask_irq, .mask = mask_irq, .mask_ack = mask_irq, diff --git a/arch/mips/philips/pnx8550/common/prom.c b/arch/mips/philips/pnx8550/common/prom.c index f8952c1359c..8aeed6c2b8c 100644 --- a/arch/mips/philips/pnx8550/common/prom.c +++ b/arch/mips/philips/pnx8550/common/prom.c @@ -35,23 +35,15 @@ char * prom_getcmdline(void) return &(arcs_cmdline[0]); } -void prom_init_cmdline(void) +void __init prom_init_cmdline(void) { - char *cp; - int actr; - - actr = 1; /* Always ignore argv[0] */ + int i; - cp = &(arcs_cmdline[0]); - while(actr < prom_argc) { - strcpy(cp, prom_argv[actr]); - cp += strlen(prom_argv[actr]); - *cp++ = ' '; - actr++; + arcs_cmdline[0] = '\0'; + for (i = 0; i < prom_argc; i++) { + strcat(arcs_cmdline, prom_argv[i]); + strcat(arcs_cmdline, " "); } - if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */ - --cp; - *cp = '\0'; } char *prom_getenv(char *envname) @@ -114,9 +106,8 @@ int get_ethernet_addr(char *ethernet_addr) return 0; } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } extern int pnx8550_console_port; diff --git a/arch/mips/philips/pnx8550/common/time.c b/arch/mips/philips/pnx8550/common/time.c index 65c440e8480..68def3880a1 100644 --- a/arch/mips/philips/pnx8550/common/time.c +++ b/arch/mips/philips/pnx8550/common/time.c @@ -33,7 +33,17 @@ #include <int.h> #include <cm.h> -extern unsigned int mips_hpt_frequency; +static unsigned long cpj; + +static cycle_t hpt_read(void) +{ + return read_c0_count2(); +} + +static void timer_ack(void) +{ + write_c0_compare(cpj); +} /* * pnx8550_time_init() - it does the following things: @@ -68,27 +78,48 @@ void pnx8550_time_init(void) * HZ timer interrupts per second. */ mips_hpt_frequency = 27UL * ((1000000UL * n)/(m * pow2p)); + cpj = (mips_hpt_frequency + HZ / 2) / HZ; + write_c0_count(0); + timer_ack(); + + /* Setup Timer 2 */ + write_c0_count2(0); + write_c0_compare2(0xffffffff); + + clocksource_mips.read = hpt_read; + mips_timer_ack = timer_ack; +} + +static irqreturn_t monotonic_interrupt(int irq, void *dev_id) +{ + /* Timer 2 clear interrupt */ + write_c0_compare2(-1); + return IRQ_HANDLED; } +static struct irqaction monotonic_irqaction = { + .handler = monotonic_interrupt, + .flags = IRQF_DISABLED, + .name = "Monotonic timer", +}; + void __init plat_timer_setup(struct irqaction *irq) { int configPR; setup_irq(PNX8550_INT_TIMER1, irq); + setup_irq(PNX8550_INT_TIMER2, &monotonic_irqaction); - /* Start timer1 */ + /* Timer 1 start */ configPR = read_c0_config7(); configPR &= ~0x00000008; write_c0_config7(configPR); - /* Timer 2 stop */ + /* Timer 2 start */ configPR = read_c0_config7(); - configPR |= 0x00000010; + configPR &= ~0x00000010; write_c0_config7(configPR); - write_c0_count2(0); - write_c0_compare2(0xffffffff); - /* Timer 3 stop */ configPR = read_c0_config7(); configPR |= 0x00000020; diff --git a/arch/mips/philips/pnx8550/jbs/irqmap.c b/arch/mips/philips/pnx8550/jbs/irqmap.c index f78e0423dc9..98c3429e6e5 100644 --- a/arch/mips/philips/pnx8550/jbs/irqmap.c +++ b/arch/mips/philips/pnx8550/jbs/irqmap.c @@ -28,9 +28,9 @@ #include <linux/init.h> #include <int.h> -char irq_tab_jbs[][5] __initdata = { - [8] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, - [9] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, - [17] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, +char pnx8550_irq_tab[][5] __initdata = { + [8] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, + [9] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, + [17] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, }; diff --git a/arch/mips/philips/pnx8550/stb810/Makefile b/arch/mips/philips/pnx8550/stb810/Makefile new file mode 100644 index 00000000000..f14b592af39 --- /dev/null +++ b/arch/mips/philips/pnx8550/stb810/Makefile @@ -0,0 +1,4 @@ + +# Makefile for the Philips STB810 Board. + +lib-y := prom_init.o board_setup.o irqmap.o diff --git a/arch/mips/philips/pnx8550/stb810/board_setup.c b/arch/mips/philips/pnx8550/stb810/board_setup.c new file mode 100644 index 00000000000..345d71e53cf --- /dev/null +++ b/arch/mips/philips/pnx8550/stb810/board_setup.c @@ -0,0 +1,49 @@ +/* + * STB810 specific board startup routines. + * + * Based on the arch/mips/philips/pnx8550/jbs/board_setup.c + * + * Author: MontaVista Software, Inc. + * source@mvista.com + * + * Copyright 2005 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/init.h> +#include <linux/sched.h> +#include <linux/ioport.h> +#include <linux/mm.h> +#include <linux/console.h> +#include <linux/mc146818rtc.h> +#include <linux/delay.h> + +#include <asm/cpu.h> +#include <asm/bootinfo.h> +#include <asm/irq.h> +#include <asm/mipsregs.h> +#include <asm/reboot.h> +#include <asm/pgtable.h> + +#include <glb.h> + +void __init board_setup(void) +{ + unsigned long config0, configpr; + + config0 = read_c0_config(); + + /* clear all three cache coherency fields */ + config0 &= ~(0x7 | (7<<25) | (7<<28)); + config0 |= (CONF_CM_DEFAULT | (CONF_CM_DEFAULT<<25) | + (CONF_CM_DEFAULT<<28)); + write_c0_config(config0); + + configpr = read_c0_config7(); + configpr |= (1<<19); /* enable tlb */ + write_c0_config7(configpr); +} diff --git a/arch/mips/philips/pnx8550/stb810/irqmap.c b/arch/mips/philips/pnx8550/stb810/irqmap.c new file mode 100644 index 00000000000..5ee11e19975 --- /dev/null +++ b/arch/mips/philips/pnx8550/stb810/irqmap.c @@ -0,0 +1,23 @@ +/* + * Philips STB810 board irqmap. + * + * Author: MontaVista Software, Inc. + * source@mvista.com + * + * Copyright 2005 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/init.h> +#include <int.h> + +char pnx8550_irq_tab[][5] __initdata = { + [8] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, + [9] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, + [10] = { -1, PNX8550_INT_PCI_INTA, 0xff, 0xff, 0xff}, +}; + diff --git a/arch/mips/philips/pnx8550/stb810/prom_init.c b/arch/mips/philips/pnx8550/stb810/prom_init.c new file mode 100644 index 00000000000..ea5b4e0fb47 --- /dev/null +++ b/arch/mips/philips/pnx8550/stb810/prom_init.c @@ -0,0 +1,49 @@ +/* + * STB810 specific prom routines + * + * Author: MontaVista Software, Inc. + * source@mvista.com + * + * Copyright 2005 MontaVista Software Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/sched.h> +#include <linux/bootmem.h> +#include <asm/addrspace.h> +#include <asm/bootinfo.h> +#include <linux/string.h> +#include <linux/kernel.h> + +int prom_argc; +char **prom_argv, **prom_envp; +extern void __init prom_init_cmdline(void); +extern char *prom_getenv(char *envname); + +const char *get_system_type(void) +{ + return "Philips PNX8550/STB810"; +} + +void __init prom_init(void) +{ + unsigned long memsize; + + prom_argc = (int) fw_arg0; + prom_argv = (char **) fw_arg1; + prom_envp = (char **) fw_arg2; + + prom_init_cmdline(); + + mips_machgroup = MACH_GROUP_PHILIPS; + mips_machtype = MACH_PHILIPS_STB810; + + memsize = 0x08000000; /* Trimedia uses memory above */ + add_memory_region(0, memsize, BOOT_MEM_RAM); +} diff --git a/arch/mips/pmc-sierra/yosemite/dbg_io.c b/arch/mips/pmc-sierra/yosemite/dbg_io.c index 0f659c9106a..6362c702e38 100644 --- a/arch/mips/pmc-sierra/yosemite/dbg_io.c +++ b/arch/mips/pmc-sierra/yosemite/dbg_io.c @@ -93,7 +93,7 @@ * Functions to READ and WRITE to serial port 1 */ #define SERIAL_READ_1(ofs) (*((volatile unsigned char*) \ - (TITAN_SERIAL_BASE_1 + ofs) + (TITAN_SERIAL_BASE_1 + ofs))) #define SERIAL_WRITE_1(ofs, val) ((*((volatile unsigned char*) \ (TITAN_SERIAL_BASE_1 + ofs))) = val) diff --git a/arch/mips/pmc-sierra/yosemite/irq.c b/arch/mips/pmc-sierra/yosemite/irq.c index adb048527e7..428d1f45a28 100644 --- a/arch/mips/pmc-sierra/yosemite/irq.c +++ b/arch/mips/pmc-sierra/yosemite/irq.c @@ -148,9 +148,9 @@ void __init arch_init_irq(void) { clear_c0_status(ST0_IM); - mips_cpu_irq_init(0); - rm7k_cpu_irq_init(8); - rm9k_cpu_irq_init(12); + mips_cpu_irq_init(); + rm7k_cpu_irq_init(); + rm9k_cpu_irq_init(); #ifdef CONFIG_KGDB /* At this point, initialize the second serial port */ diff --git a/arch/mips/pmc-sierra/yosemite/prom.c b/arch/mips/pmc-sierra/yosemite/prom.c index 9fe4973377c..1e1685e415a 100644 --- a/arch/mips/pmc-sierra/yosemite/prom.c +++ b/arch/mips/pmc-sierra/yosemite/prom.c @@ -132,9 +132,8 @@ void __init prom_init(void) prom_grab_secondary(); } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } void __init prom_fixup_mem_map(unsigned long start, unsigned long end) diff --git a/arch/mips/pmc-sierra/yosemite/setup.c b/arch/mips/pmc-sierra/yosemite/setup.c index 1b9b0d396d3..6a6e15e4000 100644 --- a/arch/mips/pmc-sierra/yosemite/setup.c +++ b/arch/mips/pmc-sierra/yosemite/setup.c @@ -171,6 +171,7 @@ static void __init py_map_ocd(void) static void __init py_uart_setup(void) { +#ifdef CONFIG_SERIAL_8250 struct uart_port up; /* @@ -188,6 +189,7 @@ static void __init py_uart_setup(void) if (early_serial_setup(&up)) printk(KERN_ERR "Early serial init of port 0 failed\n"); +#endif /* CONFIG_SERIAL_8250 */ } static void __init py_rtc_setup(void) diff --git a/arch/mips/qemu/q-mem.c b/arch/mips/qemu/q-mem.c index d174fac4303..dae39b59de1 100644 --- a/arch/mips/qemu/q-mem.c +++ b/arch/mips/qemu/q-mem.c @@ -1,6 +1,5 @@ #include <linux/init.h> -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0UL; } diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c index a1a9af6da7b..6b6e97b90c6 100644 --- a/arch/mips/sgi-ip22/ip22-eisa.c +++ b/arch/mips/sgi-ip22/ip22-eisa.c @@ -139,7 +139,7 @@ static void end_eisa1_irq(unsigned int irq) } static struct irq_chip ip22_eisa1_irq_type = { - .typename = "IP22 EISA", + .name = "IP22 EISA", .startup = startup_eisa1_irq, .ack = mask_and_ack_eisa1_irq, .mask = disable_eisa1_irq, @@ -194,7 +194,7 @@ static void end_eisa2_irq(unsigned int irq) } static struct irq_chip ip22_eisa2_irq_type = { - .typename = "IP22 EISA", + .name = "IP22 EISA", .startup = startup_eisa2_irq, .ack = mask_and_ack_eisa2_irq, .mask = disable_eisa2_irq, diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index c44f8be0644..b454924aeb5 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c @@ -19,6 +19,7 @@ #include <asm/mipsregs.h> #include <asm/addrspace.h> +#include <asm/irq_cpu.h> #include <asm/sgi/ioc.h> #include <asm/sgi/hpc3.h> @@ -52,7 +53,7 @@ static void disable_local0_irq(unsigned int irq) } static struct irq_chip ip22_local0_irq_type = { - .typename = "IP22 local 0", + .name = "IP22 local 0", .ack = disable_local0_irq, .mask = disable_local0_irq, .mask_ack = disable_local0_irq, @@ -73,7 +74,7 @@ void disable_local1_irq(unsigned int irq) } static struct irq_chip ip22_local1_irq_type = { - .typename = "IP22 local 1", + .name = "IP22 local 1", .ack = disable_local1_irq, .mask = disable_local1_irq, .mask_ack = disable_local1_irq, @@ -94,7 +95,7 @@ void disable_local2_irq(unsigned int irq) } static struct irq_chip ip22_local2_irq_type = { - .typename = "IP22 local 2", + .name = "IP22 local 2", .ack = disable_local2_irq, .mask = disable_local2_irq, .mask_ack = disable_local2_irq, @@ -115,7 +116,7 @@ void disable_local3_irq(unsigned int irq) } static struct irq_chip ip22_local3_irq_type = { - .typename = "IP22 local 3", + .name = "IP22 local 3", .ack = disable_local3_irq, .mask = disable_local3_irq, .mask_ack = disable_local3_irq, @@ -253,8 +254,6 @@ asmlinkage void plat_irq_dispatch(void) indy_8254timer_irq(); } -extern void mips_cpu_irq_init(unsigned int irq_base); - void __init arch_init_irq(void) { int i; @@ -316,7 +315,7 @@ void __init arch_init_irq(void) sgint->cmeimask1 = 0; /* init CPU irqs */ - mips_cpu_irq_init(SGINT_CPU); + mips_cpu_irq_init(); for (i = SGINT_LOCAL0; i < SGI_INTERRUPTS; i++) { struct irq_chip *handler; diff --git a/arch/mips/sgi-ip22/ip22-mc.c b/arch/mips/sgi-ip22/ip22-mc.c index b58bd522262..ddb6506d834 100644 --- a/arch/mips/sgi-ip22/ip22-mc.c +++ b/arch/mips/sgi-ip22/ip22-mc.c @@ -202,7 +202,6 @@ void __init sgimc_init(void) } void __init prom_meminit(void) {} -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c index 319f8803ef6..60ade7690e0 100644 --- a/arch/mips/sgi-ip27/ip27-irq.c +++ b/arch/mips/sgi-ip27/ip27-irq.c @@ -333,7 +333,7 @@ static inline void disable_bridge_irq(unsigned int irq) } static struct irq_chip bridge_irq_type = { - .typename = "bridge", + .name = "bridge", .startup = startup_bridge_irq, .shutdown = shutdown_bridge_irq, .ack = disable_bridge_irq, diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index 16e5682b01f..0e3d535e9f4 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c @@ -498,10 +498,9 @@ void __init prom_meminit(void) } } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { /* We got nothing to free here ... */ - return 0; } extern void pagetable_init(void); diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c index c20e9899b34..9ce513629b1 100644 --- a/arch/mips/sgi-ip27/ip27-timer.c +++ b/arch/mips/sgi-ip27/ip27-timer.c @@ -181,7 +181,7 @@ static void disable_rt_irq(unsigned int irq) } static struct irq_chip rt_irq_type = { - .typename = "SN HUB RT timer", + .name = "SN HUB RT timer", .ack = disable_rt_irq, .mask = disable_rt_irq, .mask_ack = disable_rt_irq, diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index ae063864c02..8c450d9e869 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -144,7 +144,7 @@ static void end_cpu_irq(unsigned int irq) } static struct irq_chip ip32_cpu_interrupt = { - .typename = "IP32 CPU", + .name = "IP32 CPU", .ack = disable_cpu_irq, .mask = disable_cpu_irq, .mask_ack = disable_cpu_irq, @@ -193,7 +193,7 @@ static void end_crime_irq(unsigned int irq) } static struct irq_chip ip32_crime_interrupt = { - .typename = "IP32 CRIME", + .name = "IP32 CRIME", .ack = mask_and_ack_crime_irq, .mask = disable_crime_irq, .mask_ack = mask_and_ack_crime_irq, @@ -234,7 +234,7 @@ static void end_macepci_irq(unsigned int irq) } static struct irq_chip ip32_macepci_interrupt = { - .typename = "IP32 MACE PCI", + .name = "IP32 MACE PCI", .ack = disable_macepci_irq, .mask = disable_macepci_irq, .mask_ack = disable_macepci_irq, @@ -347,7 +347,7 @@ static void end_maceisa_irq(unsigned irq) } static struct irq_chip ip32_maceisa_interrupt = { - .typename = "IP32 MACE ISA", + .name = "IP32 MACE ISA", .ack = mask_and_ack_maceisa_irq, .mask = disable_maceisa_irq, .mask_ack = mask_and_ack_maceisa_irq, @@ -379,7 +379,7 @@ static void end_mace_irq(unsigned int irq) } static struct irq_chip ip32_mace_interrupt = { - .typename = "IP32 MACE", + .name = "IP32 MACE", .ack = disable_mace_irq, .mask = disable_mace_irq, .mask_ack = disable_mace_irq, diff --git a/arch/mips/sgi-ip32/ip32-memory.c b/arch/mips/sgi-ip32/ip32-memory.c index d37d40a3cda..849d392a001 100644 --- a/arch/mips/sgi-ip32/ip32-memory.c +++ b/arch/mips/sgi-ip32/ip32-memory.c @@ -43,7 +43,6 @@ void __init prom_meminit (void) } -unsigned long __init prom_free_prom_memory (void) +void __init prom_free_prom_memory(void) { - return 0; } diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 2e8f6b2e242..1dc5d05d896 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -82,7 +82,7 @@ extern char sb1250_duart_present[]; #endif static struct irq_chip bcm1480_irq_type = { - .typename = "BCM1480-IMR", + .name = "BCM1480-IMR", .ack = ack_bcm1480_irq, .mask = disable_bcm1480_irq, .mask_ack = ack_bcm1480_irq, diff --git a/arch/mips/sibyte/cfe/setup.c b/arch/mips/sibyte/cfe/setup.c index 6e8952da6e2..9e6099e6962 100644 --- a/arch/mips/sibyte/cfe/setup.c +++ b/arch/mips/sibyte/cfe/setup.c @@ -343,10 +343,9 @@ void __init prom_init(void) prom_meminit(); } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { /* Not sure what I'm supposed to do here. Nothing, I think */ - return 0; } void prom_putchar(char c) diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 82ce7533053..148239446e6 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -67,7 +67,7 @@ extern char sb1250_duart_present[]; #endif static struct irq_chip sb1250_irq_type = { - .typename = "SB1250-IMR", + .name = "SB1250-IMR", .ack = ack_sb1250_irq, .mask = disable_sb1250_irq, .mask_ack = ack_sb1250_irq, diff --git a/arch/mips/sibyte/sb1250/prom.c b/arch/mips/sibyte/sb1250/prom.c index 3c33a4517bc..257c4e67435 100644 --- a/arch/mips/sibyte/sb1250/prom.c +++ b/arch/mips/sibyte/sb1250/prom.c @@ -87,10 +87,9 @@ void __init prom_init(void) prom_meminit(); } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { /* Not sure what I'm supposed to do here. Nothing, I think */ - return 0; } void prom_putchar(char c) diff --git a/arch/mips/sni/irq.c b/arch/mips/sni/irq.c index 8511bcc6d99..039e8e54050 100644 --- a/arch/mips/sni/irq.c +++ b/arch/mips/sni/irq.c @@ -37,7 +37,7 @@ static void end_pciasic_irq(unsigned int irq) } static struct irq_chip pciasic_irq_type = { - .typename = "ASIC-PCI", + .name = "ASIC-PCI", .ack = disable_pciasic_irq, .mask = disable_pciasic_irq, .mask_ack = disable_pciasic_irq, diff --git a/arch/mips/sni/sniprom.c b/arch/mips/sni/sniprom.c index d1d0f1f493b..1213d166f22 100644 --- a/arch/mips/sni/sniprom.c +++ b/arch/mips/sni/sniprom.c @@ -67,9 +67,8 @@ void prom_printf(char *fmt, ...) va_end(args); } -unsigned long prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } /* diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c index ed4a19adf36..e7f3e5b84dc 100644 --- a/arch/mips/tx4927/common/tx4927_irq.c +++ b/arch/mips/tx4927/common/tx4927_irq.c @@ -120,7 +120,7 @@ static void tx4927_irq_pic_disable(unsigned int irq); #define TX4927_CP0_NAME "TX4927-CP0" static struct irq_chip tx4927_irq_cp0_type = { - .typename = TX4927_CP0_NAME, + .name = TX4927_CP0_NAME, .ack = tx4927_irq_cp0_disable, .mask = tx4927_irq_cp0_disable, .mask_ack = tx4927_irq_cp0_disable, @@ -129,7 +129,7 @@ static struct irq_chip tx4927_irq_cp0_type = { #define TX4927_PIC_NAME "TX4927-PIC" static struct irq_chip tx4927_irq_pic_type = { - .typename = TX4927_PIC_NAME, + .name = TX4927_PIC_NAME, .ack = tx4927_irq_pic_disable, .mask = tx4927_irq_pic_disable, .mask_ack = tx4927_irq_pic_disable, diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index 5a5ea6c0b9f..dcce88f403c 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c @@ -158,7 +158,6 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB #define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE ( 1 << 23 ) #define TOSHIBA_RBTX4927_IRQ_ISA_DISABLE ( 1 << 24 ) #define TOSHIBA_RBTX4927_IRQ_ISA_MASK ( 1 << 25 ) -#define TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ ( 1 << 26 ) #define TOSHIBA_RBTX4927_SETUP_ALL 0xffffffff #endif @@ -175,7 +174,6 @@ static const u32 toshiba_rbtx4927_irq_debug_flag = // | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE // | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE // | TOSHIBA_RBTX4927_IRQ_ISA_MASK -// | TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ ); #endif @@ -226,12 +224,11 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq); static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq); static void toshiba_rbtx4927_irq_isa_disable(unsigned int irq); static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq); -static void toshiba_rbtx4927_irq_isa_end(unsigned int irq); #endif #define TOSHIBA_RBTX4927_IOC_NAME "RBTX4927-IOC" static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { - .typename = TOSHIBA_RBTX4927_IOC_NAME, + .name = TOSHIBA_RBTX4927_IOC_NAME, .ack = toshiba_rbtx4927_irq_ioc_disable, .mask = toshiba_rbtx4927_irq_ioc_disable, .mask_ack = toshiba_rbtx4927_irq_ioc_disable, @@ -244,12 +241,11 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = { #ifdef CONFIG_TOSHIBA_FPCIB0 #define TOSHIBA_RBTX4927_ISA_NAME "RBTX4927-ISA" static struct irq_chip toshiba_rbtx4927_irq_isa_type = { - .typename = TOSHIBA_RBTX4927_ISA_NAME, + .name = TOSHIBA_RBTX4927_ISA_NAME, .ack = toshiba_rbtx4927_irq_isa_mask_and_ack, .mask = toshiba_rbtx4927_irq_isa_disable, .mask_ack = toshiba_rbtx4927_irq_isa_mask_and_ack, .unmask = toshiba_rbtx4927_irq_isa_enable, - .end = toshiba_rbtx4927_irq_isa_end, }; #endif @@ -402,7 +398,8 @@ static void __init toshiba_rbtx4927_irq_isa_init(void) for (i = TOSHIBA_RBTX4927_IRQ_ISA_BEG; i <= TOSHIBA_RBTX4927_IRQ_ISA_END; i++) - set_irq_chip(i, &toshiba_rbtx4927_irq_isa_type); + set_irq_chip_and_handler(i, &toshiba_rbtx4927_irq_isa_type, + handle_level_irq); setup_irq(TOSHIBA_RBTX4927_IRQ_NEST_ISA_ON_IOC, &toshiba_rbtx4927_irq_isa_master); @@ -470,26 +467,6 @@ static void toshiba_rbtx4927_irq_isa_mask_and_ack(unsigned int irq) #endif -#ifdef CONFIG_TOSHIBA_FPCIB0 -static void toshiba_rbtx4927_irq_isa_end(unsigned int irq) -{ - TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_ISA_ENDIRQ, - "irq=%d\n", irq); - - if (irq < TOSHIBA_RBTX4927_IRQ_ISA_BEG - || irq > TOSHIBA_RBTX4927_IRQ_ISA_END) { - TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR, - "bad irq=%d\n", irq); - panic("\n"); - } - - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) { - toshiba_rbtx4927_irq_isa_enable(irq); - } -} -#endif - - void __init arch_init_irq(void) { extern void tx4927_irq_init(void); @@ -513,13 +490,13 @@ void toshiba_rbtx4927_irq_dump(char *key) { u32 i, j = 0; for (i = 0; i < NR_IRQS; i++) { - if (strcmp(irq_desc[i].chip->typename, "none") + if (strcmp(irq_desc[i].chip->name, "none") == 0) continue; if ((i >= 1) - && (irq_desc[i - 1].chip->typename == - irq_desc[i].chip->typename)) { + && (irq_desc[i - 1].chip->name == + irq_desc[i].chip->name)) { j++; } else { j = 0; @@ -533,7 +510,7 @@ void toshiba_rbtx4927_irq_dump(char *key) (u32) (irq_desc[i].action ? irq_desc[i]. action->handler : 0), irq_desc[i].depth, - irq_desc[i].chip->typename, j); + irq_desc[i].chip->name, j); } } #endif diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c index efe50562f0c..9a3a5babd1f 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c @@ -80,9 +80,8 @@ void __init prom_init(void) add_memory_region(0, msize << 20, BOOT_MEM_RAM); } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } const char *get_system_type(void) diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c index a347b424d91..3a2dbfc2501 100644 --- a/arch/mips/tx4938/common/irq.c +++ b/arch/mips/tx4938/common/irq.c @@ -49,7 +49,7 @@ static void tx4938_irq_pic_disable(unsigned int irq); #define TX4938_CP0_NAME "TX4938-CP0" static struct irq_chip tx4938_irq_cp0_type = { - .typename = TX4938_CP0_NAME, + .name = TX4938_CP0_NAME, .ack = tx4938_irq_cp0_disable, .mask = tx4938_irq_cp0_disable, .mask_ack = tx4938_irq_cp0_disable, @@ -58,7 +58,7 @@ static struct irq_chip tx4938_irq_cp0_type = { #define TX4938_PIC_NAME "TX4938-PIC" static struct irq_chip tx4938_irq_pic_type = { - .typename = TX4938_PIC_NAME, + .name = TX4938_PIC_NAME, .ack = tx4938_irq_pic_disable, .mask = tx4938_irq_pic_disable, .mask_ack = tx4938_irq_pic_disable, diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c index b6f363d0801..2e96dbb248b 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c @@ -92,7 +92,7 @@ static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq); #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC" static struct irq_chip toshiba_rbtx4938_irq_ioc_type = { - .typename = TOSHIBA_RBTX4938_IOC_NAME, + .name = TOSHIBA_RBTX4938_IOC_NAME, .ack = toshiba_rbtx4938_irq_ioc_disable, .mask = toshiba_rbtx4938_irq_ioc_disable, .mask_ack = toshiba_rbtx4938_irq_ioc_disable, diff --git a/arch/mips/tx4938/toshiba_rbtx4938/prom.c b/arch/mips/tx4938/toshiba_rbtx4938/prom.c index e44daf30a7c..7dc6a0aae21 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/prom.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/prom.c @@ -56,9 +56,8 @@ void __init prom_init(void) return; } -unsigned long __init prom_free_prom_memory(void) +void __init prom_free_prom_memory(void) { - return 0; } void __init prom_fixup_mem_map(unsigned long start, unsigned long end) diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig index c8dfd8092ca..92f41f6f934 100644 --- a/arch/mips/vr41xx/Kconfig +++ b/arch/mips/vr41xx/Kconfig @@ -6,7 +6,6 @@ config CASIO_E55 select ISA select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN - select GENERIC_HARDIRQS_NO__DO_IRQ config IBM_WORKPAD bool "Support for IBM WorkPad z50" @@ -16,7 +15,6 @@ config IBM_WORKPAD select ISA select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN - select GENERIC_HARDIRQS_NO__DO_IRQ config NEC_CMBVR4133 bool "Support for NEC CMB-VR4133" @@ -41,7 +39,6 @@ config TANBAC_TB022X select IRQ_CPU select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN - select GENERIC_HARDIRQS_NO__DO_IRQ help The TANBAC VR4131 multichip module(TB0225) and the TANBAC VR4131DIMM(TB0229) are MIPS-based platforms @@ -74,7 +71,6 @@ config VICTOR_MPC30X select IRQ_CPU select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN - select GENERIC_HARDIRQS_NO__DO_IRQ config ZAO_CAPCELLA bool "Support for ZAO Networks Capcella" @@ -84,7 +80,6 @@ config ZAO_CAPCELLA select IRQ_CPU select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN - select GENERIC_HARDIRQS_NO__DO_IRQ config PCI_VR41XX bool "Add PCI control unit support of NEC VR4100 series" diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index c075261976c..adabc6bad44 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2002 MontaVista Software Inc. * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> - * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> + * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -68,6 +68,7 @@ static unsigned char sysint2_assign[16] = { #define MPIUINTREG 0x0e #define MAIUINTREG 0x10 #define MKIUINTREG 0x12 +#define MMACINTREG 0x12 #define MGIUINTLREG 0x14 #define MDSIUINTREG 0x16 #define NMIREG 0x18 @@ -241,6 +242,30 @@ void vr41xx_disable_kiuint(uint16_t mask) EXPORT_SYMBOL(vr41xx_disable_kiuint); +void vr41xx_enable_macint(uint16_t mask) +{ + struct irq_desc *desc = irq_desc + ETHERNET_IRQ; + unsigned long flags; + + spin_lock_irqsave(&desc->lock, flags); + icu1_set(MMACINTREG, mask); + spin_unlock_irqrestore(&desc->lock, flags); +} + +EXPORT_SYMBOL(vr41xx_enable_macint); + +void vr41xx_disable_macint(uint16_t mask) +{ + struct irq_desc *desc = irq_desc + ETHERNET_IRQ; + unsigned long flags; + + spin_lock_irqsave(&desc->lock, flags); + icu1_clear(MMACINTREG, mask); + spin_unlock_irqrestore(&desc->lock, flags); +} + +EXPORT_SYMBOL(vr41xx_disable_macint); + void vr41xx_enable_dsiuint(uint16_t mask) { struct irq_desc *desc = irq_desc + DSIU_IRQ; @@ -428,7 +453,7 @@ static void enable_sysint1_irq(unsigned int irq) } static struct irq_chip sysint1_irq_type = { - .typename = "SYSINT1", + .name = "SYSINT1", .ack = disable_sysint1_irq, .mask = disable_sysint1_irq, .mask_ack = disable_sysint1_irq, @@ -446,7 +471,7 @@ static void enable_sysint2_irq(unsigned int irq) } static struct irq_chip sysint2_irq_type = { - .typename = "SYSINT2", + .name = "SYSINT2", .ack = disable_sysint2_irq, .mask = disable_sysint2_irq, .mask_ack = disable_sysint2_irq, diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index a2e285c1d4d..4f97e0ba9e2 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c @@ -81,7 +81,6 @@ void __init prom_init(void) } } -unsigned long __init prom_free_prom_memory (void) +void __init prom_free_prom_memory(void) { - return 0UL; } diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 397ba94cd7e..cba36a247e3 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c @@ -1,7 +1,7 @@ /* * Interrupt handing routines for NEC VR4100 series. * - * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> + * Copyright (C) 2005-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -73,13 +73,19 @@ static void irq_dispatch(unsigned int irq) if (cascade->get_irq != NULL) { unsigned int source_irq = irq; desc = irq_desc + source_irq; - desc->chip->ack(source_irq); + if (desc->chip->mask_ack) + desc->chip->mask_ack(source_irq); + else { + desc->chip->mask(source_irq); + desc->chip->ack(source_irq); + } irq = cascade->get_irq(irq); if (irq < 0) atomic_inc(&irq_err_count); else irq_dispatch(irq); - desc->chip->end(source_irq); + if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) + desc->chip->unmask(source_irq); } else do_IRQ(irq); } @@ -89,27 +95,27 @@ asmlinkage void plat_irq_dispatch(void) unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; if (pending & CAUSEF_IP7) - do_IRQ(7); + do_IRQ(TIMER_IRQ); else if (pending & 0x7800) { if (pending & CAUSEF_IP3) - irq_dispatch(3); + irq_dispatch(INT1_IRQ); else if (pending & CAUSEF_IP4) - irq_dispatch(4); + irq_dispatch(INT2_IRQ); else if (pending & CAUSEF_IP5) - irq_dispatch(5); + irq_dispatch(INT3_IRQ); else if (pending & CAUSEF_IP6) - irq_dispatch(6); + irq_dispatch(INT4_IRQ); } else if (pending & CAUSEF_IP2) - irq_dispatch(2); + irq_dispatch(INT0_IRQ); else if (pending & CAUSEF_IP0) - do_IRQ(0); + do_IRQ(MIPS_SOFTINT0_IRQ); else if (pending & CAUSEF_IP1) - do_IRQ(1); + do_IRQ(MIPS_SOFTINT1_IRQ); else spurious_interrupt(); } void __init arch_init_irq(void) { - mips_cpu_irq_init(MIPS_CPU_IRQ_BASE); + mips_cpu_irq_init(); } diff --git a/arch/mips/vr41xx/nec-cmbvr4133/irq.c b/arch/mips/vr41xx/nec-cmbvr4133/irq.c index a039bb7251f..7d2d076b0f5 100644 --- a/arch/mips/vr41xx/nec-cmbvr4133/irq.c +++ b/arch/mips/vr41xx/nec-cmbvr4133/irq.c @@ -21,67 +21,16 @@ #include <linux/interrupt.h> #include <asm/io.h> +#include <asm/i8259.h> #include <asm/vr41xx/cmbvr4133.h> -extern void enable_8259A_irq(unsigned int irq); -extern void disable_8259A_irq(unsigned int irq); -extern void mask_and_ack_8259A(unsigned int irq); -extern void init_8259A(int hoge); - extern int vr4133_rockhopper; -static void enable_i8259_irq(unsigned int irq) -{ - enable_8259A_irq(irq - I8259_IRQ_BASE); -} - -static void disable_i8259_irq(unsigned int irq) -{ - disable_8259A_irq(irq - I8259_IRQ_BASE); -} - -static void ack_i8259_irq(unsigned int irq) -{ - mask_and_ack_8259A(irq - I8259_IRQ_BASE); -} - -static void end_i8259_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) - enable_8259A_irq(irq - I8259_IRQ_BASE); -} - -static struct irq_chip i8259_irq_type = { - .typename = "XT-PIC", - .ack = ack_i8259_irq, - .mask = disable_i8259_irq, - .mask_ack = ack_i8259_irq, - .unmask = enable_i8259_irq, - .end = end_i8259_irq, -}; - static int i8259_get_irq_number(int irq) { - unsigned long isr; - - isr = inb(0x20); - irq = ffz(~isr); - if (irq == 2) { - isr = inb(0xa0); - irq = 8 + ffz(~isr); - } - - if (irq < 0 || irq > 15) - return -EINVAL; - - return I8259_IRQ_BASE + irq; + return i8259_irq(); } -static struct irqaction i8259_slave_cascade = { - .handler = &no_action, - .name = "cascade", -}; - void __init rockhopper_init_irq(void) { int i; @@ -91,11 +40,6 @@ void __init rockhopper_init_irq(void) return; } - for (i = I8259_IRQ_BASE; i <= I8259_IRQ_LAST; i++) - set_irq_chip(i, &i8259_irq_type); - - setup_irq(I8259_SLAVE_IRQ, &i8259_slave_cascade); - vr41xx_set_irq_trigger(CMBVR41XX_INTC_PIN, TRIGGER_LEVEL, SIGNAL_THROUGH); vr41xx_set_irq_level(CMBVR41XX_INTC_PIN, LEVEL_HIGH); vr41xx_cascade_irq(CMBVR41XX_INTC_IRQ, i8259_get_irq_number); |