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-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 213c88e5aee..205598d51f2 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -45,6 +45,7 @@
timebase-frequency = <0>; // 33 MHz, from uboot
bus-frequency = <0>; // 166 MHz
clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
};
};
@@ -68,7 +69,7 @@
interrupts = <18 2>;
};
- l2-cache-controller@20000 {
+ L2: l2-cache-controller@20000 {
compatible = "fsl,8548-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes