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Diffstat (limited to 'arch/powerpc/boot/dts/mpc8568mds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts51
1 files changed, 48 insertions, 3 deletions
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 9d52e3b2504..00c2bbda701 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -26,6 +26,7 @@
serial1 = &serial1;
pci0 = &pci0;
pci1 = &pci1;
+ rapidio0 = &rio0;
};
cpus {
@@ -62,9 +63,21 @@
device_type = "soc";
compatible = "simple-bus";
ranges = <0x0 0xe0000000 0x100000>;
- reg = <0xe0000000 0x1000>;
bus-frequency = <0>;
+ ecm-law@0 {
+ compatible = "fsl,ecm-law";
+ reg = <0x0 0x1000>;
+ fsl,num-laws = <10>;
+ };
+
+ ecm@1000 {
+ compatible = "fsl,mpc8568-ecm", "fsl,ecm";
+ reg = <0x1000 0x1000>;
+ interrupts = <17 2>;
+ interrupt-parent = <&mpic>;
+ };
+
memory-controller@2000 {
compatible = "fsl,8568-memory-controller";
reg = <0x2000 0x1000>;
@@ -275,6 +288,22 @@
device_type = "open-pic";
};
+ msi@41600 {
+ compatible = "fsl,mpc8568-msi", "fsl,mpic-msi";
+ reg = <0x41600 0x80>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe0 0
+ 0xe1 0
+ 0xe2 0
+ 0xe3 0
+ 0xe4 0
+ 0xe5 0
+ 0xe6 0
+ 0xe7 0>;
+ interrupt-parent = <&mpic>;
+ };
+
par_io@e0100 {
reg = <0xe0100 0x100>;
device_type = "par_io";
@@ -349,6 +378,8 @@
reg = <0xe0080000 0x480>;
brg-frequency = <0>;
bus-frequency = <396000000>;
+ fsl,qe-num-riscs = <2>;
+ fsl,qe-num-snums = <28>;
muram@10000 {
#address-cells = <1>;
@@ -459,7 +490,6 @@
};
pci0: pci@e0008000 {
- cell-index = <0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x12 AD18 */
@@ -490,7 +520,6 @@
/* PCI Express */
pci1: pcie@e000a000 {
- cell-index = <2>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
@@ -526,4 +555,20 @@
0x0 0x800000>;
};
};
+
+ rio0: rapidio@e00c00000 {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ compatible = "fsl,mpc8568-rapidio", "fsl,rapidio-delta";
+ reg = <0xe00c0000 0x20000>;
+ ranges = <0x0 0x0 0xc0000000 0x0 0x20000000>;
+ interrupts = <48 2 /* error */
+ 49 2 /* bell_outb */
+ 50 2 /* bell_inb */
+ 53 2 /* msg1_tx */
+ 54 2 /* msg1_rx */
+ 55 2 /* msg2_tx */
+ 56 2 /* msg2_rx */>;
+ interrupt-parent = <&mpic>;
+ };
};