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-rw-r--r--arch/powerpc/platforms/40x/Kconfig40
-rw-r--r--arch/powerpc/platforms/40x/Makefile2
-rw-r--r--arch/powerpc/platforms/40x/ep405.c123
-rw-r--r--arch/powerpc/platforms/40x/kilauea.c10
-rw-r--r--arch/powerpc/platforms/40x/makalu.c58
-rw-r--r--arch/powerpc/platforms/40x/virtex.c17
-rw-r--r--arch/powerpc/platforms/40x/walnut.c12
-rw-r--r--arch/powerpc/platforms/44x/Kconfig61
-rw-r--r--arch/powerpc/platforms/44x/Makefile7
-rw-r--r--arch/powerpc/platforms/44x/bamboo.c11
-rw-r--r--arch/powerpc/platforms/44x/ebony.c12
-rw-r--r--arch/powerpc/platforms/44x/katmai.c63
-rw-r--r--arch/powerpc/platforms/44x/rainier.c62
-rw-r--r--arch/powerpc/platforms/44x/sequoia.c11
-rw-r--r--arch/powerpc/platforms/44x/taishan.c73
-rw-r--r--arch/powerpc/platforms/44x/warp-nand.c105
-rw-r--r--arch/powerpc/platforms/44x/warp.c153
-rw-r--r--arch/powerpc/platforms/52xx/Kconfig50
-rw-r--r--arch/powerpc/platforms/52xx/Makefile1
-rw-r--r--arch/powerpc/platforms/52xx/efika.c3
-rw-r--r--arch/powerpc/platforms/52xx/lite5200.c46
-rw-r--r--arch/powerpc/platforms/52xx/lite5200_pm.c13
-rw-r--r--arch/powerpc/platforms/52xx/mpc5200_simple.c85
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_common.c154
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pci.c20
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pic.c22
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pm.c15
-rw-r--r--arch/powerpc/platforms/82xx/Kconfig13
-rw-r--r--arch/powerpc/platforms/82xx/Makefile1
-rw-r--r--arch/powerpc/platforms/82xx/ep8248e.c324
-rw-r--r--arch/powerpc/platforms/82xx/mpc8272_ads.c5
-rw-r--r--arch/powerpc/platforms/82xx/pq2.c4
-rw-r--r--arch/powerpc/platforms/82xx/pq2fads.c7
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig63
-rw-r--r--arch/powerpc/platforms/83xx/Makefile5
-rw-r--r--arch/powerpc/platforms/83xx/mpc831x_rdb.c (renamed from arch/powerpc/platforms/83xx/mpc8313_rdb.c)51
-rw-r--r--arch/powerpc/platforms/83xx/mpc832x_mds.c20
-rw-r--r--arch/powerpc/platforms/83xx/mpc832x_rdb.c23
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_itx.c12
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_mds.c18
-rw-r--r--arch/powerpc/platforms/83xx/mpc836x_mds.c20
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_mds.c147
-rw-r--r--arch/powerpc/platforms/83xx/mpc837x_rdb.c99
-rw-r--r--arch/powerpc/platforms/83xx/mpc83xx.h3
-rw-r--r--arch/powerpc/platforms/83xx/pci.c2
-rw-r--r--arch/powerpc/platforms/83xx/sbc834x.c115
-rw-r--r--arch/powerpc/platforms/83xx/usb.c50
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig87
-rw-r--r--arch/powerpc/platforms/85xx/Makefile4
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c18
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_cds.c6
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ds.c2
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c43
-rw-r--r--arch/powerpc/platforms/85xx/sbc8548.c167
-rw-r--r--arch/powerpc/platforms/85xx/sbc8560.c283
-rw-r--r--arch/powerpc/platforms/85xx/stx_gp3.c183
-rw-r--r--arch/powerpc/platforms/85xx/tqm85xx.c187
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c17
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c16
-rw-r--r--arch/powerpc/platforms/8xx/Kconfig10
-rw-r--r--arch/powerpc/platforms/8xx/Makefile1
-rw-r--r--arch/powerpc/platforms/8xx/adder875.c118
-rw-r--r--arch/powerpc/platforms/8xx/ep88xc.c10
-rw-r--r--arch/powerpc/platforms/8xx/m8xx_setup.c13
-rw-r--r--arch/powerpc/platforms/8xx/mpc86xads.h44
-rw-r--r--arch/powerpc/platforms/8xx/mpc86xads_setup.c294
-rw-r--r--arch/powerpc/platforms/8xx/mpc885ads_setup.c12
-rw-r--r--arch/powerpc/platforms/8xx/mpc8xx.h21
-rw-r--r--arch/powerpc/platforms/Kconfig18
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype11
-rw-r--r--arch/powerpc/platforms/cell/Makefile2
-rw-r--r--arch/powerpc/platforms/cell/cbe_cpufreq.c3
-rw-r--r--arch/powerpc/platforms/cell/cbe_cpufreq_pmi.c3
-rw-r--r--arch/powerpc/platforms/cell/cbe_regs.c5
-rw-r--r--arch/powerpc/platforms/cell/io-workarounds.c9
-rw-r--r--arch/powerpc/platforms/cell/iommu.c398
-rw-r--r--arch/powerpc/platforms/cell/pmu.c7
-rw-r--r--arch/powerpc/platforms/cell/setup.c7
-rw-r--r--arch/powerpc/platforms/cell/smp.c3
-rw-r--r--arch/powerpc/platforms/cell/spu_base.c224
-rw-r--r--arch/powerpc/platforms/cell/spu_fault.c98
-rw-r--r--arch/powerpc/platforms/cell/spu_manage.c28
-rw-r--r--arch/powerpc/platforms/cell/spufs/Makefile2
-rw-r--r--arch/powerpc/platforms/cell/spufs/backing_ops.c31
-rw-r--r--arch/powerpc/platforms/cell/spufs/context.c53
-rw-r--r--arch/powerpc/platforms/cell/spufs/coredump.c8
-rw-r--r--arch/powerpc/platforms/cell/spufs/fault.c187
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c429
-rw-r--r--arch/powerpc/platforms/cell/spufs/hw_ops.c33
-rw-r--r--arch/powerpc/platforms/cell/spufs/lscsa_alloc.c4
-rw-r--r--arch/powerpc/platforms/cell/spufs/run.c190
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c361
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h64
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c73
-rw-r--r--arch/powerpc/platforms/celleb/Kconfig2
-rw-r--r--arch/powerpc/platforms/celleb/io-workarounds.c7
-rw-r--r--arch/powerpc/platforms/celleb/iommu.c26
-rw-r--r--arch/powerpc/platforms/celleb/pci.c14
-rw-r--r--arch/powerpc/platforms/celleb/scc_epci.c2
-rw-r--r--arch/powerpc/platforms/celleb/scc_uhc.c3
-rw-r--r--arch/powerpc/platforms/celleb/setup.c147
-rw-r--r--arch/powerpc/platforms/chrp/pci.c6
-rw-r--r--arch/powerpc/platforms/chrp/setup.c65
-rw-r--r--arch/powerpc/platforms/embedded6xx/Kconfig23
-rw-r--r--arch/powerpc/platforms/embedded6xx/Makefile1
-rw-r--r--arch/powerpc/platforms/embedded6xx/holly.c3
-rw-r--r--arch/powerpc/platforms/embedded6xx/ls_uart.c5
-rw-r--r--arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c2
-rw-r--r--arch/powerpc/platforms/embedded6xx/storcenter.c192
-rw-r--r--arch/powerpc/platforms/iseries/Makefile2
-rw-r--r--arch/powerpc/platforms/iseries/iommu.c4
-rw-r--r--arch/powerpc/platforms/iseries/lpevents.c2
-rw-r--r--arch/powerpc/platforms/iseries/pci.c670
-rw-r--r--arch/powerpc/platforms/iseries/pci.h27
-rw-r--r--arch/powerpc/platforms/iseries/setup.c61
-rw-r--r--arch/powerpc/platforms/iseries/setup.h1
-rw-r--r--arch/powerpc/platforms/iseries/vpdinfo.c275
-rw-r--r--arch/powerpc/platforms/maple/Kconfig1
-rw-r--r--arch/powerpc/platforms/maple/pci.c2
-rw-r--r--arch/powerpc/platforms/maple/setup.c2
-rw-r--r--arch/powerpc/platforms/pasemi/Kconfig12
-rw-r--r--arch/powerpc/platforms/pasemi/Makefile1
-rw-r--r--arch/powerpc/platforms/pasemi/cpufreq.c19
-rw-r--r--arch/powerpc/platforms/pasemi/electra_ide.c96
-rw-r--r--arch/powerpc/platforms/pasemi/gpio_mdio.c96
-rw-r--r--arch/powerpc/platforms/pasemi/idle.c5
-rw-r--r--arch/powerpc/platforms/pasemi/pasemi.h6
-rw-r--r--arch/powerpc/platforms/pasemi/powersave.S11
-rw-r--r--arch/powerpc/platforms/pasemi/setup.c61
-rw-r--r--arch/powerpc/platforms/powermac/low_i2c.c10
-rw-r--r--arch/powerpc/platforms/powermac/pci.c248
-rw-r--r--arch/powerpc/platforms/powermac/pfunc_base.c3
-rw-r--r--arch/powerpc/platforms/powermac/pic.c3
-rw-r--r--arch/powerpc/platforms/powermac/pmac.h2
-rw-r--r--arch/powerpc/platforms/powermac/setup.c21
-rw-r--r--arch/powerpc/platforms/powermac/time.c2
-rw-r--r--arch/powerpc/platforms/ps3/Kconfig24
-rw-r--r--arch/powerpc/platforms/ps3/device-init.c531
-rw-r--r--arch/powerpc/platforms/ps3/mm.c24
-rw-r--r--arch/powerpc/platforms/ps3/platform.h34
-rw-r--r--arch/powerpc/platforms/ps3/repository.c320
-rw-r--r--arch/powerpc/platforms/ps3/spu.c27
-rw-r--r--arch/powerpc/platforms/ps3/system-bus.c19
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c46
-rw-r--r--arch/powerpc/platforms/pseries/eeh_driver.c19
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c28
-rw-r--r--arch/powerpc/platforms/pseries/pci_dlpar.c14
-rw-r--r--arch/powerpc/platforms/pseries/plpar_wrappers.h5
-rw-r--r--arch/powerpc/platforms/pseries/smp.c3
-rw-r--r--arch/powerpc/platforms/pseries/xics.c59
-rw-r--r--arch/powerpc/platforms/pseries/xics.h3
151 files changed, 6576 insertions, 2719 deletions
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index 8f6699fcc14..74f31177e47 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -14,28 +14,34 @@
# help
# This option enables support for the CPCI405 board.
-#config EP405
-# bool "EP405/EP405PC"
-# depends on 40x
-# default n
-# select 405GP
-# help
-# This option enables support for the EP405/EP405PC boards.
-
-#config EP405PC
-# bool "EP405PC Support"
-# depends on EP405
-# default y
-# help
-# This option enables support for the extra features of the EP405PC board.
+config EP405
+ bool "EP405/EP405PC"
+ depends on 40x
+ default n
+ select 405GP
+ select PCI
+ help
+ This option enables support for the EP405/EP405PC boards.
config KILAUEA
bool "Kilauea"
depends on 40x
default n
+ select 405EX
+ select PPC4xx_PCI_EXPRESS
help
This option enables support for the AMCC PPC405EX evaluation board.
+config MAKALU
+ bool "Makalu"
+ depends on 40x
+ default n
+ select 405EX
+ select PCI
+ select PPC4xx_PCI_EXPRESS
+ help
+ This option enables support for the AMCC PPC405EX board.
+
#config REDWOOD_5
# bool "Redwood-5"
# depends on 40x
@@ -65,6 +71,7 @@ config WALNUT
depends on 40x
default y
select 405GP
+ select PCI
help
This option enables support for the IBM PPC405GP evaluation board.
@@ -105,6 +112,11 @@ config 405GP
config 405EP
bool
+config 405EX
+ bool
+ select IBM_NEW_EMAC_EMAC4
+ select IBM_NEW_EMAC_RGMII
+
config 405GPR
bool
diff --git a/arch/powerpc/platforms/40x/Makefile b/arch/powerpc/platforms/40x/Makefile
index 51dadeee6fc..5533a5c8ce4 100644
--- a/arch/powerpc/platforms/40x/Makefile
+++ b/arch/powerpc/platforms/40x/Makefile
@@ -1,3 +1,5 @@
obj-$(CONFIG_KILAUEA) += kilauea.o
+obj-$(CONFIG_MAKALU) += makalu.o
obj-$(CONFIG_WALNUT) += walnut.o
obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o
+obj-$(CONFIG_EP405) += ep405.o
diff --git a/arch/powerpc/platforms/40x/ep405.c b/arch/powerpc/platforms/40x/ep405.c
new file mode 100644
index 00000000000..13d1345026d
--- /dev/null
+++ b/arch/powerpc/platforms/40x/ep405.c
@@ -0,0 +1,123 @@
+/*
+ * Architecture- / platform-specific boot-time initialization code for
+ * IBM PowerPC 4xx based boards. Adapted from original
+ * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
+ * <dan@net4x.com>.
+ *
+ * Copyright(c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
+ *
+ * Rewritten and ported to the merged powerpc tree:
+ * Copyright 2007 IBM Corporation
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ *
+ * Adapted to EP405 by Ben. Herrenschmidt <benh@kernel.crashing.org>
+ *
+ * TODO: Wire up the PCI IRQ mux and the southbridge interrupts
+ *
+ * 2002 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/pci-bridge.h>
+
+static struct device_node *bcsr_node;
+static void __iomem *bcsr_regs;
+
+/* BCSR registers */
+#define BCSR_ID 0
+#define BCSR_PCI_CTRL 1
+#define BCSR_FLASH_NV_POR_CTRL 2
+#define BCSR_FENET_UART_CTRL 3
+#define BCSR_PCI_IRQ 4
+#define BCSR_XIRQ_SELECT 5
+#define BCSR_XIRQ_ROUTING 6
+#define BCSR_XIRQ_STATUS 7
+#define BCSR_XIRQ_STATUS2 8
+#define BCSR_SW_STAT_LED_CTRL 9
+#define BCSR_GPIO_IRQ_PAR_CTRL 10
+/* there's more, can't be bothered typing them tho */
+
+
+static __initdata struct of_device_id ep405_of_bus[] = {
+ { .compatible = "ibm,plb3", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ {},
+};
+
+static int __init ep405_device_probe(void)
+{
+ of_platform_bus_probe(NULL, ep405_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(ep405, ep405_device_probe);
+
+static void __init ep405_init_bcsr(void)
+{
+ const u8 *irq_routing;
+ int i;
+
+ /* Find the bloody thing & map it */
+ bcsr_node = of_find_compatible_node(NULL, NULL, "ep405-bcsr");
+ if (bcsr_node == NULL) {
+ printk(KERN_ERR "EP405 BCSR not found !\n");
+ return;
+ }
+ bcsr_regs = of_iomap(bcsr_node, 0);
+ if (bcsr_regs == NULL) {
+ printk(KERN_ERR "EP405 BCSR failed to map !\n");
+ return;
+ }
+
+ /* Get the irq-routing property and apply the routing to the CPLD */
+ irq_routing = of_get_property(bcsr_node, "irq-routing", NULL);
+ if (irq_routing == NULL)
+ return;
+ for (i = 0; i < 16; i++) {
+ u8 irq = irq_routing[i];
+ out_8(bcsr_regs + BCSR_XIRQ_SELECT, i);
+ out_8(bcsr_regs + BCSR_XIRQ_ROUTING, irq);
+ }
+ in_8(bcsr_regs + BCSR_XIRQ_SELECT);
+ mb();
+ out_8(bcsr_regs + BCSR_GPIO_IRQ_PAR_CTRL, 0xfe);
+}
+
+static void __init ep405_setup_arch(void)
+{
+ /* Find & init the BCSR CPLD */
+ ep405_init_bcsr();
+
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+}
+
+static int __init ep405_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "ep405"))
+ return 0;
+
+ return 1;
+}
+
+define_machine(ep405) {
+ .name = "EP405",
+ .probe = ep405_probe,
+ .setup_arch = ep405_setup_arch,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c
index 1bffdbdd21b..f9206a7fede 100644
--- a/arch/powerpc/platforms/40x/kilauea.c
+++ b/arch/powerpc/platforms/40x/kilauea.c
@@ -19,8 +19,9 @@
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
+#include <asm/pci-bridge.h>
-static struct of_device_id kilauea_of_bus[] = {
+static __initdata struct of_device_id kilauea_of_bus[] = {
{ .compatible = "ibm,plb4", },
{ .compatible = "ibm,opb", },
{ .compatible = "ibm,ebc", },
@@ -29,14 +30,11 @@ static struct of_device_id kilauea_of_bus[] = {
static int __init kilauea_device_probe(void)
{
- if (!machine_is(kilauea))
- return 0;
-
of_platform_bus_probe(NULL, kilauea_of_bus, NULL);
return 0;
}
-device_initcall(kilauea_device_probe);
+machine_device_initcall(kilauea, kilauea_device_probe);
static int __init kilauea_probe(void)
{
@@ -45,6 +43,8 @@ static int __init kilauea_probe(void)
if (!of_flat_dt_is_compatible(root, "amcc,kilauea"))
return 0;
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
return 1;
}
diff --git a/arch/powerpc/platforms/40x/makalu.c b/arch/powerpc/platforms/40x/makalu.c
new file mode 100644
index 00000000000..4e4df72fc9c
--- /dev/null
+++ b/arch/powerpc/platforms/40x/makalu.c
@@ -0,0 +1,58 @@
+/*
+ * Makalu board specific routines
+ *
+ * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ *
+ * Based on the Walnut code by
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright 2007 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/pci-bridge.h>
+
+static __initdata struct of_device_id makalu_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ {},
+};
+
+static int __init makalu_device_probe(void)
+{
+ of_platform_bus_probe(NULL, makalu_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(makalu, makalu_device_probe);
+
+static int __init makalu_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "amcc,makalu"))
+ return 0;
+
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
+ return 1;
+}
+
+define_machine(makalu) {
+ .name = "Makalu",
+ .probe = makalu_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c
index 14bbc328170..88b66444dfb 100644
--- a/arch/powerpc/platforms/40x/virtex.c
+++ b/arch/powerpc/platforms/40x/virtex.c
@@ -15,16 +15,23 @@
#include <asm/time.h>
#include <asm/xilinx_intc.h>
+static struct of_device_id xilinx_of_bus_ids[] __initdata = {
+ { .compatible = "xlnx,plb-v46-1.00.a", },
+ { .compatible = "xlnx,plb-v34-1.01.a", },
+ { .compatible = "xlnx,plb-v34-1.02.a", },
+ { .compatible = "xlnx,opb-v20-1.10.c", },
+ { .compatible = "xlnx,dcr-v29-1.00.a", },
+ { .compatible = "xlnx,compound", },
+ {}
+};
+
static int __init virtex_device_probe(void)
{
- if (!machine_is(virtex))
- return 0;
-
- of_platform_bus_probe(NULL, NULL, NULL);
+ of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL);
return 0;
}
-device_initcall(virtex_device_probe);
+machine_device_initcall(virtex, virtex_device_probe);
static int __init virtex_probe(void)
{
diff --git a/arch/powerpc/platforms/40x/walnut.c b/arch/powerpc/platforms/40x/walnut.c
index ff6db243179..5d9edd917f9 100644
--- a/arch/powerpc/platforms/40x/walnut.c
+++ b/arch/powerpc/platforms/40x/walnut.c
@@ -24,8 +24,9 @@
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
+#include <asm/pci-bridge.h>
-static struct of_device_id walnut_of_bus[] = {
+static __initdata struct of_device_id walnut_of_bus[] = {
{ .compatible = "ibm,plb3", },
{ .compatible = "ibm,opb", },
{ .compatible = "ibm,ebc", },
@@ -34,15 +35,12 @@ static struct of_device_id walnut_of_bus[] = {
static int __init walnut_device_probe(void)
{
- if (!machine_is(walnut))
- return 0;
-
- /* FIXME: do bus probe here */
of_platform_bus_probe(NULL, walnut_of_bus, NULL);
+ of_instantiate_rtc();
return 0;
}
-device_initcall(walnut_device_probe);
+machine_device_initcall(walnut, walnut_device_probe);
static int __init walnut_probe(void)
{
@@ -51,6 +49,8 @@ static int __init walnut_probe(void)
if (!of_flat_dt_is_compatible(root, "ibm,walnut"))
return 0;
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
return 1;
}
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 8390cc16413..c062c4cbbed 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -3,6 +3,7 @@ config BAMBOO
depends on 44x
default n
select 440EP
+ select PCI
help
This option enables support for the IBM PPC440EP evaluation board.
@@ -11,6 +12,8 @@ config EBONY
depends on 44x
default y
select 440GP
+ select PCI
+ select OF_RTC
help
This option enables support for the IBM PPC440GP evaluation board.
@@ -22,6 +25,48 @@ config SEQUOIA
help
This option enables support for the AMCC PPC440EPX evaluation board.
+config TAISHAN
+ bool "Taishan"
+ depends on 44x
+ default n
+ select 440GX
+ select PCI
+ help
+ This option enables support for the AMCC PPC440GX "Taishan"
+ evaluation board.
+
+config KATMAI
+ bool "Katmai"
+ depends on 44x
+ default n
+ select 440SPe
+ select PCI
+ select PPC4xx_PCI_EXPRESS
+ help
+ This option enables support for the AMCC PPC440SPe evaluation board.
+
+config RAINIER
+ bool "Rainier"
+ depends on 44x
+ default n
+ select 440GRX
+ select PCI
+ help
+ This option enables support for the AMCC PPC440GRX evaluation board.
+
+config WARP
+ bool "PIKA Warp"
+ depends on 44x
+ default n
+ select 440EP
+ help
+ This option enables support for the PIKA Warp(tm) Appliance. The Warp
+ is a small computer replacement with up to 9 ports of FXO/FXS plus VOIP
+ stations and trunks.
+
+ See http://www.pikatechnologies.com/ and follow the "PIKA for Computer
+ Telephony Developers" link for more information.
+
#config LUAN
# bool "Luan"
# depends on 44x
@@ -44,6 +89,7 @@ config 440EP
select PPC_FPU
select IBM440EP_ERR42
select IBM_NEW_EMAC_ZMII
+ select USB_ARCH_HAS_OHCI
config 440EPX
bool
@@ -52,20 +98,29 @@ config 440EPX
select IBM_NEW_EMAC_RGMII
select IBM_NEW_EMAC_ZMII
+config 440GRX
+ bool
+ select IBM_NEW_EMAC_EMAC4
+ select IBM_NEW_EMAC_RGMII
+ select IBM_NEW_EMAC_ZMII
+
config 440GP
bool
select IBM_NEW_EMAC_ZMII
config 440GX
bool
+ select IBM_NEW_EMAC_EMAC4
+ select IBM_NEW_EMAC_RGMII
+ select IBM_NEW_EMAC_ZMII #test only
+ select IBM_NEW_EMAC_TAH #test only
config 440SP
bool
-config 440A
+config 440SPe
+ select IBM_NEW_EMAC_EMAC4
bool
- depends on 440GX || 440EPX
- default y
# 44x errata/workaround config symbols, selected by the CPU models above
config IBM440EP_ERR42
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 10ce6740cc7..0864d4f1cbc 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -1,4 +1,9 @@
obj-$(CONFIG_44x) := misc_44x.o
obj-$(CONFIG_EBONY) += ebony.o
-obj-$(CONFIG_BAMBOO) += bamboo.o
+obj-$(CONFIG_TAISHAN) += taishan.o
+obj-$(CONFIG_BAMBOO) += bamboo.o
obj-$(CONFIG_SEQUOIA) += sequoia.o
+obj-$(CONFIG_KATMAI) += katmai.o
+obj-$(CONFIG_RAINIER) += rainier.o
+obj-$(CONFIG_WARP) += warp.o
+obj-$(CONFIG_WARP) += warp-nand.o
diff --git a/arch/powerpc/platforms/44x/bamboo.c b/arch/powerpc/platforms/44x/bamboo.c
index be23f112184..fb9a22a7e8d 100644
--- a/arch/powerpc/platforms/44x/bamboo.c
+++ b/arch/powerpc/platforms/44x/bamboo.c
@@ -21,9 +21,11 @@
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
+#include <asm/pci-bridge.h>
+
#include "44x.h"
-static struct of_device_id bamboo_of_bus[] = {
+static __initdata struct of_device_id bamboo_of_bus[] = {
{ .compatible = "ibm,plb4", },
{ .compatible = "ibm,opb", },
{ .compatible = "ibm,ebc", },
@@ -32,14 +34,11 @@ static struct of_device_id bamboo_of_bus[] = {
static int __init bamboo_device_probe(void)
{
- if (!machine_is(bamboo))
- return 0;
-
of_platform_bus_probe(NULL, bamboo_of_bus, NULL);
return 0;
}
-device_initcall(bamboo_device_probe);
+machine_device_initcall(bamboo, bamboo_device_probe);
static int __init bamboo_probe(void)
{
@@ -48,6 +47,8 @@ static int __init bamboo_probe(void)
if (!of_flat_dt_is_compatible(root, "amcc,bamboo"))
return 0;
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
return 1;
}
diff --git a/arch/powerpc/platforms/44x/ebony.c b/arch/powerpc/platforms/44x/ebony.c
index 6cd3476767c..1a8d467bff8 100644
--- a/arch/powerpc/platforms/44x/ebony.c
+++ b/arch/powerpc/platforms/44x/ebony.c
@@ -18,16 +18,18 @@
#include <linux/init.h>
#include <linux/of_platform.h>
+#include <linux/rtc.h>
#include <asm/machdep.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
+#include <asm/pci-bridge.h>
#include "44x.h"
-static struct of_device_id ebony_of_bus[] = {
+static __initdata struct of_device_id ebony_of_bus[] = {
{ .compatible = "ibm,plb4", },
{ .compatible = "ibm,opb", },
{ .compatible = "ibm,ebc", },
@@ -36,14 +38,12 @@ static struct of_device_id ebony_of_bus[] = {
static int __init ebony_device_probe(void)
{
- if (!machine_is(ebony))
- return 0;
-
of_platform_bus_probe(NULL, ebony_of_bus, NULL);
+ of_instantiate_rtc();
return 0;
}
-device_initcall(ebony_device_probe);
+machine_device_initcall(ebony, ebony_device_probe);
/*
* Called very early, MMU is off, device-tree isn't unflattened
@@ -55,6 +55,8 @@ static int __init ebony_probe(void)
if (!of_flat_dt_is_compatible(root, "ibm,ebony"))
return 0;
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
return 1;
}
diff --git a/arch/powerpc/platforms/44x/katmai.c b/arch/powerpc/platforms/44x/katmai.c
new file mode 100644
index 00000000000..11134121f27
--- /dev/null
+++ b/arch/powerpc/platforms/44x/katmai.c
@@ -0,0 +1,63 @@
+/*
+ * Katmai board specific routines
+ *
+ * Benjamin Herrenschmidt <benh@kernel.crashing.org>
+ * Copyright 2007 IBM Corp.
+ *
+ * Based on the Bamboo code by
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright 2007 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/pci-bridge.h>
+
+#include "44x.h"
+
+static __initdata struct of_device_id katmai_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ {},
+};
+
+static int __init katmai_device_probe(void)
+{
+ of_platform_bus_probe(NULL, katmai_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(katmai, katmai_device_probe);
+
+static int __init katmai_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "amcc,katmai"))
+ return 0;
+
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
+ return 1;
+}
+
+define_machine(katmai) {
+ .name = "Katmai",
+ .probe = katmai_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .restart = ppc44x_reset_system,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/44x/rainier.c b/arch/powerpc/platforms/44x/rainier.c
new file mode 100644
index 00000000000..a7fae1cf69c
--- /dev/null
+++ b/arch/powerpc/platforms/44x/rainier.c
@@ -0,0 +1,62 @@
+/*
+ * Rainier board specific routines
+ *
+ * Valentine Barshak <vbarshak@ru.mvista.com>
+ * Copyright 2007 MontaVista Software Inc.
+ *
+ * Based on the Bamboo code by
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright 2007 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/pci-bridge.h>
+#include "44x.h"
+
+static __initdata struct of_device_id rainier_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ {},
+};
+
+static int __init rainier_device_probe(void)
+{
+ of_platform_bus_probe(NULL, rainier_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(rainier, rainier_device_probe);
+
+static int __init rainier_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "amcc,rainier"))
+ return 0;
+
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
+ return 1;
+}
+
+define_machine(rainier) {
+ .name = "Rainier",
+ .probe = rainier_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .restart = ppc44x_reset_system,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/44x/sequoia.c b/arch/powerpc/platforms/44x/sequoia.c
index 21a9dd14f29..d279db42c89 100644
--- a/arch/powerpc/platforms/44x/sequoia.c
+++ b/arch/powerpc/platforms/44x/sequoia.c
@@ -21,9 +21,11 @@
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
+#include <asm/pci-bridge.h>
+
#include "44x.h"
-static struct of_device_id sequoia_of_bus[] = {
+static __initdata struct of_device_id sequoia_of_bus[] = {
{ .compatible = "ibm,plb4", },
{ .compatible = "ibm,opb", },
{ .compatible = "ibm,ebc", },
@@ -32,14 +34,11 @@ static struct of_device_id sequoia_of_bus[] = {
static int __init sequoia_device_probe(void)
{
- if (!machine_is(sequoia))
- return 0;
-
of_platform_bus_probe(NULL, sequoia_of_bus, NULL);
return 0;
}
-device_initcall(sequoia_device_probe);
+machine_device_initcall(sequoia, sequoia_device_probe);
static int __init sequoia_probe(void)
{
@@ -48,6 +47,8 @@ static int __init sequoia_probe(void)
if (!of_flat_dt_is_compatible(root, "amcc,sequoia"))
return 0;
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
return 1;
}
diff --git a/arch/powerpc/platforms/44x/taishan.c b/arch/powerpc/platforms/44x/taishan.c
new file mode 100644
index 00000000000..28ab7e2e02c
--- /dev/null
+++ b/arch/powerpc/platforms/44x/taishan.c
@@ -0,0 +1,73 @@
+/*
+ * Taishan board specific routines based off ebony.c code
+ * original copyrights below
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2002-2005 MontaVista Software Inc.
+ *
+ * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ * Copyright (c) 2003-2005 Zultys Technologies
+ *
+ * Rewritten and ported to the merged powerpc tree:
+ * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
+ *
+ * Modified from ebony.c for taishan:
+ * Copyright 2007 Hugh Blemings <hugh@au.ibm.com>, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/pci-bridge.h>
+
+#include "44x.h"
+
+static __initdata struct of_device_id taishan_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ {},
+};
+
+static int __init taishan_device_probe(void)
+{
+ of_platform_bus_probe(NULL, taishan_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(taishan, taishan_device_probe);
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init taishan_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "amcc,taishan"))
+ return 0;
+
+ ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
+
+ return 1;
+}
+
+define_machine(taishan) {
+ .name = "Taishan",
+ .probe = taishan_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .restart = ppc44x_reset_system,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
new file mode 100644
index 00000000000..84ab78ff8c0
--- /dev/null
+++ b/arch/powerpc/platforms/44x/warp-nand.c
@@ -0,0 +1,105 @@
+/*
+ * PIKA Warp(tm) NAND flash specific routines
+ *
+ * Copyright (c) 2008 PIKA Technologies
+ * Sean MacLennan <smaclennan@pikatech.com>
+ */
+
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/ndfc.h>
+
+#ifdef CONFIG_MTD_NAND_NDFC
+
+#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */
+
+#define WARP_NAND_FLASH_REG_ADDR 0xD0000000UL
+#define WARP_NAND_FLASH_REG_SIZE 0x2000
+
+static struct resource warp_ndfc = {
+ .start = WARP_NAND_FLASH_REG_ADDR,
+ .end = WARP_NAND_FLASH_REG_ADDR + WARP_NAND_FLASH_REG_SIZE,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct mtd_partition nand_parts[] = {
+ {
+ .name = "kernel",
+ .offset = 0,
+ .size = 0x0200000
+ },
+ {
+ .name = "root",
+ .offset = 0x0200000,
+ .size = 0x3400000
+ },
+ {
+ .name = "user",
+ .offset = 0x3600000,
+ .size = 0x0A00000
+ },
+};
+
+struct ndfc_controller_settings warp_ndfc_settings = {
+ .ccr_settings = (NDFC_CCR_BS(CS_NAND_0) | NDFC_CCR_ARAC1),
+ .ndfc_erpn = 0,
+};
+
+static struct ndfc_chip_settings warp_chip0_settings = {
+ .bank_settings = 0x80002222,
+};
+
+struct platform_nand_ctrl warp_nand_ctrl = {
+ .priv = &warp_ndfc_settings,
+};
+
+static struct platform_device warp_ndfc_device = {
+ .name = "ndfc-nand",
+ .id = 0,
+ .dev = {
+ .platform_data = &warp_nand_ctrl,
+ },
+ .num_resources = 1,
+ .resource = &warp_ndfc,
+};
+
+static struct nand_ecclayout nand_oob_16 = {
+ .eccbytes = 3,
+ .eccpos = { 0, 1, 2, 3, 6, 7 },
+ .oobfree = { {.offset = 8, .length = 16} }
+};
+
+static struct platform_nand_chip warp_nand_chip0 = {
+ .nr_chips = 1,
+ .chip_offset = CS_NAND_0,
+ .nr_partitions = ARRAY_SIZE(nand_parts),
+ .partitions = nand_parts,
+ .chip_delay = 50,
+ .ecclayout = &nand_oob_16,
+ .priv = &warp_chip0_settings,
+};
+
+static struct platform_device warp_nand_device = {
+ .name = "ndfc-chip",
+ .id = 0,
+ .num_resources = 1,
+ .resource = &warp_ndfc,
+ .dev = {
+ .platform_data = &warp_nand_chip0,
+ .parent = &warp_ndfc_device.dev,
+ }
+};
+
+static int warp_setup_nand_flash(void)
+{
+ platform_device_register(&warp_ndfc_device);
+ platform_device_register(&warp_nand_device);
+
+ return 0;
+}
+device_initcall(warp_setup_nand_flash);
+
+#endif
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
new file mode 100644
index 00000000000..8f01563dbd2
--- /dev/null
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -0,0 +1,153 @@
+/*
+ * PIKA Warp(tm) board specific routines
+ *
+ * Copyright (c) 2008 PIKA Technologies
+ * Sean MacLennan <smaclennan@pikatech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <linux/kthread.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+
+#include "44x.h"
+
+
+static __initdata struct of_device_id warp_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ {},
+};
+
+static int __init warp_device_probe(void)
+{
+ of_platform_bus_probe(NULL, warp_of_bus, NULL);
+ return 0;
+}
+machine_device_initcall(warp, warp_device_probe);
+
+static int __init warp_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "pika,warp");
+}
+
+define_machine(warp) {
+ .name = "Warp",
+ .probe = warp_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .restart = ppc44x_reset_system,
+ .calibrate_decr = generic_calibrate_decr,
+};
+
+
+#define LED_GREEN (0x80000000 >> 0)
+#define LED_RED (0x80000000 >> 1)
+
+
+/* This is for the power LEDs 1 = on, 0 = off, -1 = leave alone */
+void warp_set_power_leds(int green, int red)
+{
+ static void __iomem *gpio_base = NULL;
+ unsigned leds;
+
+ if (gpio_base == NULL) {
+ struct device_node *np;
+
+ /* Power LEDS are on the second GPIO controller */
+ np = of_find_compatible_node(NULL, NULL, "ibm,gpio-440EP");
+ if (np)
+ np = of_find_compatible_node(np, NULL, "ibm,gpio-440EP");
+ if (np == NULL) {
+ printk(KERN_ERR __FILE__ ": Unable to find gpio\n");
+ return;
+ }
+
+ gpio_base = of_iomap(np, 0);
+ of_node_put(np);
+ if (gpio_base == NULL) {
+ printk(KERN_ERR __FILE__ ": Unable to map gpio");
+ return;
+ }
+ }
+
+ leds = in_be32(gpio_base);
+
+ switch (green) {
+ case 0: leds &= ~LED_GREEN; break;
+ case 1: leds |= LED_GREEN; break;
+ }
+ switch (red) {
+ case 0: leds &= ~LED_RED; break;
+ case 1: leds |= LED_RED; break;
+ }
+
+ out_be32(gpio_base, leds);
+}
+EXPORT_SYMBOL(warp_set_power_leds);
+
+
+#ifdef CONFIG_SENSORS_AD7414
+static int pika_dtm_thread(void __iomem *fpga)
+{
+ extern int ad7414_get_temp(int index);
+
+ while (!kthread_should_stop()) {
+ int temp = ad7414_get_temp(0);
+
+ out_be32(fpga, temp);
+
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout(HZ);
+ }
+
+ return 0;
+}
+
+static int __init pika_dtm_start(void)
+{
+ struct task_struct *dtm_thread;
+ struct device_node *np;
+ struct resource res;
+ void __iomem *fpga;
+
+ np = of_find_compatible_node(NULL, NULL, "pika,fpga");
+ if (np == NULL)
+ return -ENOENT;
+
+ /* We do not call of_iomap here since it would map in the entire
+ * fpga space, which is over 8k.
+ */
+ if (of_address_to_resource(np, 0, &res)) {
+ of_node_put(np);
+ return -ENOENT;
+ }
+ of_node_put(np);
+
+ fpga = ioremap(res.start + 0x20, 4);
+ if (fpga == NULL)
+ return -ENOENT;
+
+ dtm_thread = kthread_run(pika_dtm_thread, fpga + 0x20, "pika-dtm");
+ if (IS_ERR(dtm_thread)) {
+ iounmap(fpga);
+ return PTR_ERR(dtm_thread);
+ }
+
+ return 0;
+}
+device_initcall(pika_dtm_start);
+#endif
diff --git a/arch/powerpc/platforms/52xx/Kconfig b/arch/powerpc/platforms/52xx/Kconfig
index 2938d4927b8..515f244c90b 100644
--- a/arch/powerpc/platforms/52xx/Kconfig
+++ b/arch/powerpc/platforms/52xx/Kconfig
@@ -1,38 +1,48 @@
config PPC_MPC52xx
- bool
+ bool "52xx-based boards"
+ depends on PPC_MULTIPLATFORM && PPC32
select FSL_SOC
select PPC_CLOCK
- default n
-
-config PPC_MPC5200
- bool
- select PPC_MPC52xx
- default n
-config PPC_MPC5200_BUGFIX
- bool "MPC5200 (L25R) bugfix support"
- depends on PPC_MPC5200
- default n
+config PPC_MPC5200_SIMPLE
+ bool "Generic support for simple MPC5200 based boards"
+ depends on PPC_MPC52xx
+ select DEFAULT_UIMAGE
+ select WANT_DEVICE_TREE
help
- Enable workarounds for original MPC5200 errata. This is not required
- for MPC5200B based boards.
+ This option enables support for a simple MPC52xx based boards which
+ do not need a custom platform specific setup. Such boards are
+ supported assuming the following:
- It is safe to say 'Y' here
+ - GPIO pins are configured by the firmware,
+ - CDM configuration (clocking) is setup correctly by firmware,
+ - if the 'fsl,has-wdt' property is present in one of the
+ gpt nodes, then it is safe to use such gpt to reset the board,
+ - PCI is supported if enabled in the kernel configuration
+ and if there is a PCI bus node defined in the device tree.
+
+ Boards that are compatible with this generic platform support
+ are: 'tqc,tqm5200', 'promess,motionpro', 'schindler,cm5200'.
config PPC_EFIKA
bool "bPlan Efika 5k2. MPC5200B based computer"
- depends on PPC_MULTIPLATFORM && PPC32
+ depends on PPC_MPC52xx
select PPC_RTAS
select RTAS_PROC
- select PPC_MPC52xx
select PPC_NATIVE
- default n
config PPC_LITE5200
bool "Freescale Lite5200 Eval Board"
- depends on PPC_MULTIPLATFORM && PPC32
+ depends on PPC_MPC52xx
+ select DEFAULT_UIMAGE
select WANT_DEVICE_TREE
- select PPC_MPC5200
- default n
+config PPC_MPC5200_BUGFIX
+ bool "MPC5200 (L25R) bugfix support"
+ depends on PPC_MPC52xx
+ help
+ Enable workarounds for original MPC5200 errata. This is not required
+ for MPC5200B based boards.
+
+ It is safe to say 'Y' here
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile
index 307dbc17809..fe1b81bb522 100644
--- a/arch/powerpc/platforms/52xx/Makefile
+++ b/arch/powerpc/platforms/52xx/Makefile
@@ -6,6 +6,7 @@ obj-y += mpc52xx_pic.o mpc52xx_common.o
obj-$(CONFIG_PCI) += mpc52xx_pci.o
endif
+obj-$(CONFIG_PPC_MPC5200_SIMPLE) += mpc5200_simple.o
obj-$(CONFIG_PPC_EFIKA) += efika.o
obj-$(CONFIG_PPC_LITE5200) += lite5200.o
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index a0da70c8b50..a2068faef6e 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -180,6 +180,9 @@ static void __init efika_setup_arch(void)
{
rtas_initialize();
+ /* Map important registers from the internal memory map */
+ mpc52xx_map_common_devices();
+
efika_pcisetup();
#ifdef CONFIG_PM
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c
index 25d2bfa3d9d..956f459e175 100644
--- a/arch/powerpc/platforms/52xx/lite5200.c
+++ b/arch/powerpc/platforms/52xx/lite5200.c
@@ -32,6 +32,19 @@
*
*/
+/* mpc5200 device tree match tables */
+static struct of_device_id mpc5200_cdm_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-cdm", },
+ { .compatible = "mpc5200-cdm", },
+ {}
+};
+
+static struct of_device_id mpc5200_gpio_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-gpio", },
+ { .compatible = "mpc5200-gpio", },
+ {}
+};
+
/*
* Fix clock configuration.
*
@@ -42,10 +55,12 @@
static void __init
lite5200_fix_clock_config(void)
{
+ struct device_node *np;
struct mpc52xx_cdm __iomem *cdm;
-
/* Map zones */
- cdm = mpc52xx_find_and_map("mpc5200-cdm");
+ np = of_find_matching_node(NULL, mpc5200_cdm_ids);
+ cdm = of_iomap(np, 0);
+ of_node_put(np);
if (!cdm) {
printk(KERN_ERR "%s() failed; expect abnormal behaviour\n",
__FUNCTION__);
@@ -74,10 +89,13 @@ lite5200_fix_clock_config(void)
static void __init
lite5200_fix_port_config(void)
{
+ struct device_node *np;
struct mpc52xx_gpio __iomem *gpio;
u32 port_config;
- gpio = mpc52xx_find_and_map("mpc5200-gpio");
+ np = of_find_matching_node(NULL, mpc5200_gpio_ids);
+ gpio = of_iomap(np, 0);
+ of_node_put(np);
if (!gpio) {
printk(KERN_ERR "%s() failed. expect abnormal behavior\n",
__FUNCTION__);
@@ -131,22 +149,18 @@ static void lite5200_resume_finish(void __iomem *mbar)
static void __init lite5200_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("lite5200_setup_arch()", 0);
- /* Fix things that firmware should have done. */
- lite5200_fix_clock_config();
- lite5200_fix_port_config();
+ /* Map important registers from the internal memory map */
+ mpc52xx_map_common_devices();
/* Some mpc5200 & mpc5200b related configuration */
mpc5200_setup_xlb_arbiter();
- /* Map wdt for mpc52xx_restart() */
- mpc52xx_map_wdt();
+ /* Fix things that firmware should have done. */
+ lite5200_fix_clock_config();
+ lite5200_fix_port_config();
#ifdef CONFIG_PM
mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare;
@@ -154,13 +168,7 @@ static void __init lite5200_setup_arch(void)
lite5200_pm_init();
#endif
-#ifdef CONFIG_PCI
- np = of_find_node_by_type(NULL, "pci");
- if (np) {
- mpc52xx_add_bridge(np);
- of_node_put(np);
- }
-#endif
+ mpc52xx_setup_pci();
}
/*
diff --git a/arch/powerpc/platforms/52xx/lite5200_pm.c b/arch/powerpc/platforms/52xx/lite5200_pm.c
index ffa14aff524..c0f13e8deb0 100644
--- a/arch/powerpc/platforms/52xx/lite5200_pm.c
+++ b/arch/powerpc/platforms/52xx/lite5200_pm.c
@@ -42,6 +42,15 @@ static int lite5200_pm_set_target(suspend_state_t state)
static int lite5200_pm_prepare(void)
{
+ struct device_node *np;
+ const struct of_device_id immr_ids[] = {
+ { .compatible = "fsl,mpc5200-immr", },
+ { .compatible = "fsl,mpc5200b-immr", },
+ { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
+ { .type = "builtin", .compatible = "mpc5200", }, /* efika */
+ {}
+ };
+
/* deep sleep? let mpc52xx code handle that */
if (lite5200_pm_target_state == PM_SUSPEND_STANDBY)
return mpc52xx_pm_prepare();
@@ -50,7 +59,9 @@ static int lite5200_pm_prepare(void)
return -EINVAL;
/* map registers */
- mbar = mpc52xx_find_and_map("mpc5200");
+ np = of_find_matching_node(NULL, immr_ids);
+ mbar = of_iomap(np, 0);
+ of_node_put(np);
if (!mbar) {
printk(KERN_ERR "%s:%i Error mapping registers\n", __func__, __LINE__);
return -ENOSYS;
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
new file mode 100644
index 00000000000..c48b82bc2aa
--- /dev/null
+++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
@@ -0,0 +1,85 @@
+/*
+ * Support for 'mpc5200-simple-platform' compatible boards.
+ *
+ * Written by Marian Balakowicz <m8@semihalf.com>
+ * Copyright (C) 2007 Semihalf
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Description:
+ * This code implements support for a simple MPC52xx based boards which
+ * do not need a custom platform specific setup. Such boards are
+ * supported assuming the following:
+ *
+ * - GPIO pins are configured by the firmware,
+ * - CDM configuration (clocking) is setup correctly by firmware,
+ * - if the 'fsl,has-wdt' property is present in one of the
+ * gpt nodes, then it is safe to use such gpt to reset the board,
+ * - PCI is supported if enabled in the kernel configuration
+ * and if there is a PCI bus node defined in the device tree.
+ *
+ * Boards that are compatible with this generic platform support
+ * are listed in a 'board' table.
+ */
+
+#undef DEBUG
+#include <asm/time.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+#include <asm/mpc52xx.h>
+
+/*
+ * Setup the architecture
+ */
+static void __init mpc5200_simple_setup_arch(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("mpc5200_simple_setup_arch()", 0);
+
+ /* Map important registers from the internal memory map */
+ mpc52xx_map_common_devices();
+
+ /* Some mpc5200 & mpc5200b related configuration */
+ mpc5200_setup_xlb_arbiter();
+
+ mpc52xx_setup_pci();
+}
+
+/* list of the supported boards */
+static char *board[] __initdata = {
+ "promess,motionpro",
+ "schindler,cm5200",
+ "tqc,tqm5200",
+ NULL
+};
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc5200_simple_probe(void)
+{
+ unsigned long node = of_get_flat_dt_root();
+ int i = 0;
+
+ while (board[i]) {
+ if (of_flat_dt_is_compatible(node, board[i]))
+ break;
+ i++;
+ }
+
+ return (board[i] != NULL);
+}
+
+define_machine(mpc5200_simple_platform) {
+ .name = "mpc5200-simple-platform",
+ .probe = mpc5200_simple_probe,
+ .setup_arch = mpc5200_simple_setup_arch,
+ .init = mpc52xx_declare_of_platform_devices,
+ .init_IRQ = mpc52xx_init_irq,
+ .get_irq = mpc52xx_get_irq,
+ .restart = mpc52xx_restart,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 9850685c542..9aa4425d80b 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -13,57 +13,38 @@
#undef DEBUG
#include <linux/kernel.h>
+#include <linux/spinlock.h>
#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/mpc52xx.h>
+/* MPC5200 device tree match tables */
+static struct of_device_id mpc52xx_xlb_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-xlb", },
+ { .compatible = "mpc5200-xlb", },
+ {}
+};
+static struct of_device_id mpc52xx_bus_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-immr", },
+ { .compatible = "fsl,mpc5200b-immr", },
+ { .compatible = "fsl,lpb", },
+
+ /* depreciated matches; shouldn't be used in new device trees */
+ { .type = "builtin", .compatible = "mpc5200", }, /* efika */
+ { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
+ {}
+};
+
/*
* This variable is mapped in mpc52xx_map_wdt() and used in mpc52xx_restart().
* Permanent mapping is required because mpc52xx_restart() can be called
* from interrupt context while node mapping (which calls ioremap())
* cannot be used at such point.
*/
-static volatile struct mpc52xx_gpt *mpc52xx_wdt = NULL;
-
-static void __iomem *
-mpc52xx_map_node(struct device_node *ofn)
-{
- const u32 *regaddr_p;
- u64 regaddr64, size64;
-
- if (!ofn)
- return NULL;
-
- regaddr_p = of_get_address(ofn, 0, &size64, NULL);
- if (!regaddr_p) {
- of_node_put(ofn);
- return NULL;
- }
-
- regaddr64 = of_translate_address(ofn, regaddr_p);
-
- of_node_put(ofn);
-
- return ioremap((u32)regaddr64, (u32)size64);
-}
-
-void __iomem *
-mpc52xx_find_and_map(const char *compatible)
-{
- return mpc52xx_map_node(
- of_find_compatible_node(NULL, NULL, compatible));
-}
-
-EXPORT_SYMBOL(mpc52xx_find_and_map);
-
-void __iomem *
-mpc52xx_find_and_map_path(const char *path)
-{
- return mpc52xx_map_node(of_find_node_by_path(path));
-}
-
-EXPORT_SYMBOL(mpc52xx_find_and_map_path);
+static spinlock_t mpc52xx_lock = SPIN_LOCK_UNLOCKED;
+static struct mpc52xx_gpt __iomem *mpc52xx_wdt;
+static struct mpc52xx_cdm __iomem *mpc52xx_cdm;
/**
* mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device
@@ -101,9 +82,12 @@ EXPORT_SYMBOL(mpc52xx_find_ipb_freq);
void __init
mpc5200_setup_xlb_arbiter(void)
{
+ struct device_node *np;
struct mpc52xx_xlb __iomem *xlb;
- xlb = mpc52xx_find_and_map("mpc5200-xlb");
+ np = of_find_matching_node(NULL, mpc52xx_xlb_ids);
+ xlb = of_iomap(np, 0);
+ of_node_put(np);
if (!xlb) {
printk(KERN_ERR __FILE__ ": "
"Error mapping XLB in mpc52xx_setup_cpu(). "
@@ -124,41 +108,101 @@ mpc5200_setup_xlb_arbiter(void)
iounmap(xlb);
}
+/**
+ * mpc52xx_declare_of_platform_devices: register internal devices and children
+ * of the localplus bus to the of_platform
+ * bus.
+ */
void __init
mpc52xx_declare_of_platform_devices(void)
{
/* Find every child of the SOC node and add it to of_platform */
- if (of_platform_bus_probe(NULL, NULL, NULL))
+ if (of_platform_bus_probe(NULL, mpc52xx_bus_ids, NULL))
printk(KERN_ERR __FILE__ ": "
"Error while probing of_platform bus\n");
}
+/*
+ * match tables used by mpc52xx_map_common_devices()
+ */
+static struct of_device_id mpc52xx_gpt_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-gpt", },
+ { .compatible = "mpc5200-gpt", }, /* old */
+ {}
+};
+static struct of_device_id mpc52xx_cdm_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-cdm", },
+ { .compatible = "mpc5200-cdm", }, /* old */
+ {}
+};
+
+/**
+ * mpc52xx_map_common_devices: iomap devices required by common code
+ */
void __init
-mpc52xx_map_wdt(void)
+mpc52xx_map_common_devices(void)
{
- const void *has_wdt;
struct device_node *np;
/* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
* possibly from a interrupt context. wdt is only implement
* on a gpt0, so check has-wdt property before mapping.
*/
- for_each_compatible_node(np, NULL, "fsl,mpc5200-gpt") {
- has_wdt = of_get_property(np, "fsl,has-wdt", NULL);
- if (has_wdt) {
- mpc52xx_wdt = mpc52xx_map_node(np);
- return;
+ for_each_matching_node(np, mpc52xx_gpt_ids) {
+ if (of_get_property(np, "fsl,has-wdt", NULL) ||
+ of_get_property(np, "has-wdt", NULL)) {
+ mpc52xx_wdt = of_iomap(np, 0);
+ of_node_put(np);
+ break;
}
}
- for_each_compatible_node(np, NULL, "mpc5200-gpt") {
- has_wdt = of_get_property(np, "has-wdt", NULL);
- if (has_wdt) {
- mpc52xx_wdt = mpc52xx_map_node(np);
- return;
- }
+
+ /* Clock Distribution Module, used by PSC clock setting function */
+ np = of_find_matching_node(NULL, mpc52xx_cdm_ids);
+ mpc52xx_cdm = of_iomap(np, 0);
+ of_node_put(np);
+}
+
+/**
+ * mpc52xx_set_psc_clkdiv: Set clock divider in the CDM for PSC ports
+ *
+ * @psc_id: id of psc port; must be 1,2,3 or 6
+ * @clkdiv: clock divider value to put into CDM PSC register.
+ */
+int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
+{
+ unsigned long flags;
+ u16 __iomem *reg;
+ u32 val;
+ u32 mask;
+ u32 mclken_div;
+
+ if (!mpc52xx_cdm)
+ return -ENODEV;
+
+ mclken_div = 0x8000 | (clkdiv & 0x1FF);
+ switch (psc_id) {
+ case 1: reg = &mpc52xx_cdm->mclken_div_psc1; mask = 0x20; break;
+ case 2: reg = &mpc52xx_cdm->mclken_div_psc2; mask = 0x40; break;
+ case 3: reg = &mpc52xx_cdm->mclken_div_psc3; mask = 0x80; break;
+ case 6: reg = &mpc52xx_cdm->mclken_div_psc6; mask = 0x10; break;
+ default:
+ return -ENODEV;
}
+
+ /* Set the rate and enable the clock */
+ spin_lock_irqsave(&mpc52xx_lock, flags);
+ out_be16(reg, mclken_div);
+ val = in_be32(&mpc52xx_cdm->clk_enables);
+ out_be32(&mpc52xx_cdm->clk_enables, val | mask);
+ spin_unlock_irqrestore(&mpc52xx_lock, flags);
+
+ return 0;
}
+/**
+ * mpc52xx_restart: ppc_md->restart hook for mpc5200 using the watchdog timer
+ */
void
mpc52xx_restart(char *cmd)
{
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index 4c6c82a684b..e3428ddd904 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -99,6 +99,12 @@ struct mpc52xx_pci {
u8 reserved6[4]; /* PCI + 0xFC */
};
+/* MPC5200 device tree match tables */
+const struct of_device_id mpc52xx_pci_ids[] __initdata = {
+ { .type = "pci", .compatible = "fsl,mpc5200-pci", },
+ { .type = "pci", .compatible = "mpc5200-pci", },
+ {}
+};
/* ======================================================================== */
/* PCI configuration acess */
@@ -363,7 +369,7 @@ mpc52xx_add_bridge(struct device_node *node)
pr_debug("Adding MPC52xx PCI host bridge %s\n", node->full_name);
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
if (of_address_to_resource(node, 0, &rsrc) != 0) {
printk(KERN_ERR "Can't get %s resources\n", node->full_name);
@@ -406,3 +412,15 @@ mpc52xx_add_bridge(struct device_node *node)
return 0;
}
+
+void __init mpc52xx_setup_pci(void)
+{
+ struct device_node *pci;
+
+ pci = of_find_matching_node(NULL, mpc52xx_pci_ids);
+ if (!pci)
+ return;
+
+ mpc52xx_add_bridge(pci);
+ of_node_put(pci);
+}
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 61100f270c6..d0dead8b9a9 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -29,6 +29,18 @@
*
*/
+/* MPC5200 device tree match tables */
+static struct of_device_id mpc52xx_pic_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-pic", },
+ { .compatible = "mpc5200-pic", },
+ {}
+};
+static struct of_device_id mpc52xx_sdma_ids[] __initdata = {
+ { .compatible = "fsl,mpc5200-bestcomm", },
+ { .compatible = "mpc5200-bestcomm", },
+ {}
+};
+
static struct mpc52xx_intr __iomem *intr;
static struct mpc52xx_sdma __iomem *sdma;
static struct irq_host *mpc52xx_irqhost = NULL;
@@ -364,16 +376,18 @@ void __init mpc52xx_init_irq(void)
{
u32 intr_ctrl;
struct device_node *picnode;
+ struct device_node *np;
/* Remap the necessary zones */
- picnode = of_find_compatible_node(NULL, NULL, "mpc5200-pic");
-
- intr = mpc52xx_find_and_map("mpc5200-pic");
+ picnode = of_find_matching_node(NULL, mpc52xx_pic_ids);
+ intr = of_iomap(picnode, 0);
if (!intr)
panic(__FILE__ ": find_and_map failed on 'mpc5200-pic'. "
"Check node !");
- sdma = mpc52xx_find_and_map("mpc5200-bestcomm");
+ np = of_find_matching_node(NULL, mpc52xx_sdma_ids);
+ sdma = of_iomap(np, 0);
+ of_node_put(np);
if (!sdma)
panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. "
"Check node !");
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pm.c b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
index 7ffa7babf25..c72d3304387 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pm.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
@@ -59,10 +59,21 @@ int mpc52xx_set_wakeup_gpio(u8 pin, u8 level)
int mpc52xx_pm_prepare(void)
{
+ struct device_node *np;
+ const struct of_device_id immr_ids[] = {
+ { .compatible = "fsl,mpc5200-immr", },
+ { .compatible = "fsl,mpc5200b-immr", },
+ { .type = "soc", .compatible = "mpc5200", }, /* lite5200 */
+ { .type = "builtin", .compatible = "mpc5200", }, /* efika */
+ {}
+ };
+
/* map the whole register space */
- mbar = mpc52xx_find_and_map("mpc5200");
+ np = of_find_matching_node(NULL, immr_ids);
+ mbar = of_iomap(np, 0);
+ of_node_put(np);
if (!mbar) {
- printk(KERN_ERR "%s:%i Error mapping registers\n", __func__, __LINE__);
+ pr_err("mpc52xx_pm_prepare(): could not map registers\n");
return -ENOSYS;
}
/* these offsets are from mpc5200 users manual */
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 541fbb81563..4fad6c7bf9f 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -26,6 +26,19 @@ config PQ2FADS
help
This option enables support for the PQ2FADS board
+config EP8248E
+ bool "Embedded Planet EP8248E (a.k.a. CWH-PPC-8248N-VE)"
+ select 8272
+ select 8260
+ select FSL_SOC
+ select PPC_CPM_NEW_BINDING
+ select MDIO_BITBANG
+ help
+ This enables support for the Embedded Planet EP8248E board.
+
+ This board is also resold by Freescale as the QUICCStart
+ MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE.
+
endchoice
config PQ2ADS
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index 68c8b0c9772..6cd5cd59bf2 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_MPC8272_ADS) += mpc8272_ads.o
obj-$(CONFIG_CPM2) += pq2.o
obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
obj-$(CONFIG_PQ2FADS) += pq2fads.o
+obj-$(CONFIG_EP8248E) += ep8248e.o
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c
new file mode 100644
index 00000000000..ba93d8ae9b0
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/ep8248e.c
@@ -0,0 +1,324 @@
+/*
+ * Embedded Planet EP8248E support
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/fsl_devices.h>
+#include <linux/mdio-bitbang.h>
+#include <linux/of_platform.h>
+
+#include <asm/io.h>
+#include <asm/cpm2.h>
+#include <asm/udbg.h>
+#include <asm/machdep.h>
+#include <asm/time.h>
+#include <asm/mpc8260.h>
+#include <asm/prom.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/cpm2_pic.h>
+
+#include "pq2.h"
+
+static u8 __iomem *ep8248e_bcsr;
+static struct device_node *ep8248e_bcsr_node;
+
+#define BCSR7_SCC2_ENABLE 0x10
+
+#define BCSR8_PHY1_ENABLE 0x80
+#define BCSR8_PHY1_POWER 0x40
+#define BCSR8_PHY2_ENABLE 0x20
+#define BCSR8_PHY2_POWER 0x10
+#define BCSR8_MDIO_READ 0x04
+#define BCSR8_MDIO_CLOCK 0x02
+#define BCSR8_MDIO_DATA 0x01
+
+#define BCSR9_USB_ENABLE 0x80
+#define BCSR9_USB_POWER 0x40
+#define BCSR9_USB_HOST 0x20
+#define BCSR9_USB_FULL_SPEED_TARGET 0x10
+
+static void __init ep8248e_pic_init(void)
+{
+ struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
+ if (!np) {
+ printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
+ return;
+ }
+
+ cpm2_pic_init(np);
+ of_node_put(np);
+}
+
+static void ep8248e_set_mdc(struct mdiobb_ctrl *ctrl, int level)
+{
+ if (level)
+ setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
+ else
+ clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_CLOCK);
+
+ /* Read back to flush the write. */
+ in_8(&ep8248e_bcsr[8]);
+}
+
+static void ep8248e_set_mdio_dir(struct mdiobb_ctrl *ctrl, int output)
+{
+ if (output)
+ clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
+ else
+ setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_READ);
+
+ /* Read back to flush the write. */
+ in_8(&ep8248e_bcsr[8]);
+}
+
+static void ep8248e_set_mdio_data(struct mdiobb_ctrl *ctrl, int data)
+{
+ if (data)
+ setbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
+ else
+ clrbits8(&ep8248e_bcsr[8], BCSR8_MDIO_DATA);
+
+ /* Read back to flush the write. */
+ in_8(&ep8248e_bcsr[8]);
+}
+
+static int ep8248e_get_mdio_data(struct mdiobb_ctrl *ctrl)
+{
+ return in_8(&ep8248e_bcsr[8]) & BCSR8_MDIO_DATA;
+}
+
+static const struct mdiobb_ops ep8248e_mdio_ops = {
+ .set_mdc = ep8248e_set_mdc,
+ .set_mdio_dir = ep8248e_set_mdio_dir,
+ .set_mdio_data = ep8248e_set_mdio_data,
+ .get_mdio_data = ep8248e_get_mdio_data,
+ .owner = THIS_MODULE,
+};
+
+static struct mdiobb_ctrl ep8248e_mdio_ctrl = {
+ .ops = &ep8248e_mdio_ops,
+};
+
+static int __devinit ep8248e_mdio_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct mii_bus *bus;
+ struct resource res;
+ struct device_node *node;
+ int ret, i;
+
+ node = of_get_parent(ofdev->node);
+ of_node_put(node);
+ if (node != ep8248e_bcsr_node)
+ return -ENODEV;
+
+ ret = of_address_to_resource(ofdev->node, 0, &res);
+ if (ret)
+ return ret;
+
+ bus = alloc_mdio_bitbang(&ep8248e_mdio_ctrl);
+ if (!bus)
+ return -ENOMEM;
+
+ bus->phy_mask = 0;
+ bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
+
+ for (i = 0; i < PHY_MAX_ADDR; i++)
+ bus->irq[i] = -1;
+
+ bus->name = "ep8248e-mdio-bitbang";
+ bus->dev = &ofdev->dev;
+ bus->id = res.start;
+
+ return mdiobus_register(bus);
+}
+
+static int ep8248e_mdio_remove(struct of_device *ofdev)
+{
+ BUG();
+ return 0;
+}
+
+static const struct of_device_id ep8248e_mdio_match[] = {
+ {
+ .compatible = "fsl,ep8248e-mdio-bitbang",
+ },
+ {},
+};
+
+static struct of_platform_driver ep8248e_mdio_driver = {
+ .driver = {
+ .name = "ep8248e-mdio-bitbang",
+ },
+ .match_table = ep8248e_mdio_match,
+ .probe = ep8248e_mdio_probe,
+ .remove = ep8248e_mdio_remove,
+};
+
+struct cpm_pin {
+ int port, pin, flags;
+};
+
+static __initdata struct cpm_pin ep8248e_pins[] = {
+ /* SMC1 */
+ {2, 4, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+
+ /* SCC1 */
+ {2, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* FCC1 */
+ {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* FCC2 */
+ {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* I2C */
+ {4, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {4, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+
+ /* USB */
+ {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+};
+
+static void __init init_ioports(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(ep8248e_pins); i++) {
+ const struct cpm_pin *pin = &ep8248e_pins[i];
+ cpm2_set_pin(pin->port, pin->pin, pin->flags);
+ }
+
+ cpm2_smc_clk_setup(CPM_CLK_SMC1, CPM_BRG7);
+ cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
+ cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); /* USB */
+ cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
+ cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
+}
+
+static void __init ep8248e_setup_arch(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("ep8248e_setup_arch()", 0);
+
+ cpm2_reset();
+
+ /* When this is set, snooping CPM DMA from RAM causes
+ * machine checks. See erratum SIU18.
+ */
+ clrbits32(&cpm2_immr->im_siu_conf.siu_82xx.sc_bcr, MPC82XX_BCR_PLDP);
+
+ ep8248e_bcsr_node =
+ of_find_compatible_node(NULL, NULL, "fsl,ep8248e-bcsr");
+ if (!ep8248e_bcsr_node) {
+ printk(KERN_ERR "No bcsr in device tree\n");
+ return;
+ }
+
+ ep8248e_bcsr = of_iomap(ep8248e_bcsr_node, 0);
+ if (!ep8248e_bcsr) {
+ printk(KERN_ERR "Cannot map BCSR registers\n");
+ of_node_put(ep8248e_bcsr_node);
+ ep8248e_bcsr_node = NULL;
+ return;
+ }
+
+ setbits8(&ep8248e_bcsr[7], BCSR7_SCC2_ENABLE);
+ setbits8(&ep8248e_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
+ BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
+
+ init_ioports();
+
+ if (ppc_md.progress)
+ ppc_md.progress("ep8248e_setup_arch(), finish", 0);
+}
+
+static __initdata struct of_device_id of_bus_ids[] = {
+ { .compatible = "simple-bus", },
+ { .compatible = "fsl,ep8248e-bcsr", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ of_register_platform_driver(&ep8248e_mdio_driver);
+
+ return 0;
+}
+machine_device_initcall(ep8248e, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init ep8248e_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ return of_flat_dt_is_compatible(root, "fsl,ep8248e");
+}
+
+define_machine(ep8248e)
+{
+ .name = "Embedded Planet EP8248E",
+ .probe = ep8248e_probe,
+ .setup_arch = ep8248e_setup_arch,
+ .init_IRQ = ep8248e_pic_init,
+ .get_irq = cpm2_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+ .restart = pq2_restart,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c
index fd83440eb28..3fce6b375db 100644
--- a/arch/powerpc/platforms/82xx/mpc8272_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c
@@ -165,14 +165,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
static int __init declare_of_platform_devices(void)
{
- if (!machine_is(mpc8272_ads))
- return 0;
-
/* Publish the QE devices */
of_platform_bus_probe(NULL, of_bus_ids, NULL);
return 0;
}
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(mpc8272_ads, declare_of_platform_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index a497cbaa1ac..1b75902fad6 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -53,13 +53,13 @@ static void __init pq2_pci_add_bridge(struct device_node *np)
if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b)
goto err;
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
hose = pcibios_alloc_controller(np);
if (!hose)
return;
- hose->arch_data = np;
+ hose->dn = np;
setup_indirect_pci(hose, r.start + 0x100, r.start + 0x104, 0);
pci_process_bridge_OF_ranges(hose, np, 1);
diff --git a/arch/powerpc/platforms/82xx/pq2fads.c b/arch/powerpc/platforms/82xx/pq2fads.c
index 4f457a9c79a..68196e34999 100644
--- a/arch/powerpc/platforms/82xx/pq2fads.c
+++ b/arch/powerpc/platforms/82xx/pq2fads.c
@@ -15,12 +15,12 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/cpm2.h>
#include <asm/udbg.h>
#include <asm/machdep.h>
-#include <asm/of_platform.h>
#include <asm/time.h>
#include <sysdev/fsl_soc.h>
@@ -176,14 +176,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
static int __init declare_of_platform_devices(void)
{
- if (!machine_is(pq2fads))
- return 0;
-
/* Publish the QE devices */
of_platform_bus_probe(NULL, of_bus_ids, NULL);
return 0;
}
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(pq2fads, declare_of_platform_devices);
define_machine(pq2fads)
{
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index ec305f18abd..13587e2e868 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,18 +1,23 @@
-choice
- prompt "83xx Board Type"
+menuconfig MPC83xx
+ bool "83xx Board Type"
depends on PPC_83xx
- default MPC834x_MDS
+ select PPC_UDBG_16550
+ select PPC_INDIRECT_PCI
+
+if MPC83xx
-config MPC8313_RDB
- bool "Freescale MPC8313 RDB"
+config MPC831x_RDB
+ bool "Freescale MPC831x RDB"
select DEFAULT_UIMAGE
+ select PPC_MPC831x
help
- This option enables support for the MPC8313 RDB board.
+ This option enables support for the MPC8313 RDB and MPC8315 RDB boards.
config MPC832x_MDS
bool "Freescale MPC832x MDS"
select DEFAULT_UIMAGE
select QUICC_ENGINE
+ select PPC_MPC832x
help
This option enables support for the MPC832x MDS evaluation board.
@@ -20,12 +25,14 @@ config MPC832x_RDB
bool "Freescale MPC832x RDB"
select DEFAULT_UIMAGE
select QUICC_ENGINE
+ select PPC_MPC832x
help
This option enables support for the MPC8323 RDB board.
config MPC834x_MDS
bool "Freescale MPC834x MDS"
select DEFAULT_UIMAGE
+ select PPC_MPC834x
help
This option enables support for the MPC 834x MDS evaluation board.
@@ -37,6 +44,7 @@ config MPC834x_MDS
config MPC834x_ITX
bool "Freescale MPC834x ITX"
select DEFAULT_UIMAGE
+ select PPC_MPC834x
help
This option enables support for the MPC 834x ITX evaluation board.
@@ -50,28 +58,41 @@ config MPC836x_MDS
help
This option enables support for the MPC836x MDS Processor Board.
-endchoice
+config MPC837x_MDS
+ bool "Freescale MPC837x MDS"
+ select DEFAULT_UIMAGE
+ select PPC_MPC837x
+ help
+ This option enables support for the MPC837x MDS Processor Board.
+
+config MPC837x_RDB
+ bool "Freescale MPC837x RDB"
+ select DEFAULT_UIMAGE
+ select PPC_MPC837x
+ help
+ This option enables support for the MPC837x RDB Board.
+
+config SBC834x
+ bool "Wind River SBC834x"
+ select DEFAULT_UIMAGE
+ select PPC_MPC834x
+ help
+ This option enables support for the Wind River SBC834x board.
+
+endif
+# used for usb
config PPC_MPC831x
bool
- select PPC_UDBG_16550
- select PPC_INDIRECT_PCI
- default y if MPC8313_RDB
+# used for math-emu
config PPC_MPC832x
bool
- select PPC_UDBG_16550
- select PPC_INDIRECT_PCI
- default y if MPC832x_MDS || MPC832x_RDB
-config MPC834x
+# used for usb
+config PPC_MPC834x
bool
- select PPC_UDBG_16550
- select PPC_INDIRECT_PCI
- default y if MPC834x_MDS || MPC834x_ITX
-config PPC_MPC836x
+# used for usb
+config PPC_MPC837x
bool
- select PPC_UDBG_16550
- select PPC_INDIRECT_PCI
- default y if MPC836x_MDS
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 5a98f885779..7e6dd3e259d 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -3,9 +3,12 @@
#
obj-y := misc.o usb.o
obj-$(CONFIG_PCI) += pci.o
-obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o
+obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o
obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
+obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o
+obj-$(CONFIG_SBC834x) += sbc834x.o
+obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o
diff --git a/arch/powerpc/platforms/83xx/mpc8313_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index 33766b8f259..c4db5172b27 100644
--- a/arch/powerpc/platforms/83xx/mpc8313_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -1,7 +1,7 @@
/*
- * arch/powerpc/platforms/83xx/mpc8313_rdb.c
+ * arch/powerpc/platforms/83xx/mpc831x_rdb.c
*
- * Description: MPC8313x RDB board specific routines.
+ * Description: MPC831x RDB board specific routines.
* This file is based on mpc834x_sys.c
* Author: Lo Wlison <r43300@freescale.com>
*
@@ -14,6 +14,7 @@
*/
#include <linux/pci.h>
+#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/ipic.h>
@@ -21,26 +22,17 @@
#include "mpc83xx.h"
-#undef DEBUG
-#ifdef DEBUG
-#define DBG(fmt...) udbg_printf(fmt)
-#else
-#define DBG(fmt...)
-#endif
-
-/* ************************************************************************
- *
+/*
* Setup the architecture
- *
*/
-static void __init mpc8313_rdb_setup_arch(void)
+static void __init mpc831x_rdb_setup_arch(void)
{
#ifdef CONFIG_PCI
struct device_node *np;
#endif
if (ppc_md.progress)
- ppc_md.progress("mpc8313_rdb_setup_arch()", 0);
+ ppc_md.progress("mpc831x_rdb_setup_arch()", 0);
#ifdef CONFIG_PCI
for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
@@ -49,7 +41,7 @@ static void __init mpc8313_rdb_setup_arch(void)
mpc831x_usb_cfg();
}
-void __init mpc8313_rdb_init_IRQ(void)
+void __init mpc831x_rdb_init_IRQ(void)
{
struct device_node *np;
@@ -68,18 +60,31 @@ void __init mpc8313_rdb_init_IRQ(void)
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
-static int __init mpc8313_rdb_probe(void)
+static int __init mpc831x_rdb_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
+ unsigned long root = of_get_flat_dt_root();
- return of_flat_dt_is_compatible(root, "MPC8313ERDB");
+ return of_flat_dt_is_compatible(root, "MPC8313ERDB") ||
+ of_flat_dt_is_compatible(root, "fsl,mpc8315erdb");
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .compatible = "simple-bus" },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ return 0;
}
+machine_device_initcall(mpc831x_rdb, declare_of_platform_devices);
-define_machine(mpc8313_rdb) {
- .name = "MPC8313 RDB",
- .probe = mpc8313_rdb_probe,
- .setup_arch = mpc8313_rdb_setup_arch,
- .init_IRQ = mpc8313_rdb_init_IRQ,
+define_machine(mpc831x_rdb) {
+ .name = "MPC831x RDB",
+ .probe = mpc831x_rdb_probe,
+ .setup_arch = mpc831x_rdb_setup_arch,
+ .init_IRQ = mpc831x_rdb_init_IRQ,
.get_irq = ipic_get_irq,
.restart = mpc83xx_restart,
.time_init = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 39ee7a13b25..6dbc6eabcb0 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -23,9 +23,9 @@
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/time.h>
@@ -105,20 +105,18 @@ static struct of_device_id mpc832x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
+ { .compatible = "fsl,qe", },
{},
};
static int __init mpc832x_declare_of_platform_devices(void)
{
- if (!machine_is(mpc832x_mds))
- return 0;
-
/* Publish the QE devices */
of_platform_bus_probe(NULL, mpc832x_ids, NULL);
return 0;
}
-device_initcall(mpc832x_declare_of_platform_devices);
+machine_device_initcall(mpc832x_mds, mpc832x_declare_of_platform_devices);
static void __init mpc832x_sys_init_IRQ(void)
{
@@ -137,10 +135,12 @@ static void __init mpc832x_sys_init_IRQ(void)
of_node_put(np);
#ifdef CONFIG_QUICC_ENGINE
- np = of_find_node_by_type(NULL, "qeic");
- if (!np)
- return;
-
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+ if (!np) {
+ np = of_find_node_by_type(NULL, "qeic");
+ if (!np)
+ return;
+ }
qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
of_node_put(np);
#endif /* CONFIG_QUICC_ENGINE */
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index d4bd04001b9..9f0fd88b2b1 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -19,8 +19,8 @@
#include <linux/spi/spi.h>
#include <linux/spi/mmc_spi.h>
#include <linux/mmc/host.h>
+#include <linux/of_platform.h>
-#include <asm/of_platform.h>
#include <asm/time.h>
#include <asm/ipic.h>
#include <asm/udbg.h>
@@ -63,9 +63,6 @@ static struct spi_board_info mpc832x_spi_boardinfo = {
static int __init mpc832x_spi_init(void)
{
- if (!machine_is(mpc832x_rdb))
- return 0;
-
par_io_config_pin(3, 0, 3, 0, 1, 0); /* SPI1 MOSI, I/O */
par_io_config_pin(3, 1, 3, 0, 1, 0); /* SPI1 MISO, I/O */
par_io_config_pin(3, 2, 3, 0, 1, 0); /* SPI1 CLK, I/O */
@@ -80,7 +77,7 @@ static int __init mpc832x_spi_init(void)
mpc83xx_spi_deactivate_cs);
}
-device_initcall(mpc832x_spi_init);
+machine_device_initcall(mpc832x_rdb, mpc832x_spi_init);
/* ************************************************************************
*
@@ -118,20 +115,18 @@ static struct of_device_id mpc832x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
+ { .compatible = "fsl,qe", },
{},
};
static int __init mpc832x_declare_of_platform_devices(void)
{
- if (!machine_is(mpc832x_rdb))
- return 0;
-
/* Publish the QE devices */
of_platform_bus_probe(NULL, mpc832x_ids, NULL);
return 0;
}
-device_initcall(mpc832x_declare_of_platform_devices);
+machine_device_initcall(mpc832x_rdb, mpc832x_declare_of_platform_devices);
void __init mpc832x_rdb_init_IRQ(void)
{
@@ -151,10 +146,12 @@ void __init mpc832x_rdb_init_IRQ(void)
of_node_put(np);
#ifdef CONFIG_QUICC_ENGINE
- np = of_find_node_by_type(NULL, "qeic");
- if (!np)
- return;
-
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+ if (!np) {
+ np = of_find_node_by_type(NULL, "qeic");
+ if (!np)
+ return;
+ }
qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
of_node_put(np);
#endif /* CONFIG_QUICC_ENGINE */
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index aa768199432..50e8f632061 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -23,6 +23,7 @@
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
+#include <linux/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
@@ -37,6 +38,17 @@
#include "mpc83xx.h"
+static struct of_device_id __initdata mpc834x_itx_ids[] = {
+ { .compatible = "fsl,pq2pro-localbus", },
+ {},
+};
+
+static int __init mpc834x_itx_declare_of_platform_devices(void)
+{
+ return of_platform_bus_probe(NULL, mpc834x_itx_ids, NULL);
+}
+machine_device_initcall(mpc834x_itx, mpc834x_itx_declare_of_platform_devices);
+
/* ************************************************************************
*
* Setup the architecture
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index a81bb3ce6b9..2b8a0a3f855 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -23,6 +23,7 @@
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
+#include <linux/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
@@ -106,14 +107,27 @@ static void __init mpc834x_mds_init_IRQ(void)
ipic_set_default_priority();
}
+static struct of_device_id mpc834x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc834x_declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, mpc834x_ids, NULL);
+ return 0;
+}
+machine_device_initcall(mpc834x_mds, mpc834x_declare_of_platform_devices);
+
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc834x_mds_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
+ unsigned long root = of_get_flat_dt_root();
- return of_flat_dt_is_compatible(root, "MPC834xMDS");
+ return of_flat_dt_is_compatible(root, "MPC834xMDS");
}
define_machine(mpc834x_mds) {
diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c
index e40012f8f48..c2e5de60c05 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c
@@ -29,9 +29,9 @@
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/initrd.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/time.h>
@@ -136,20 +136,18 @@ static struct of_device_id mpc836x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
+ { .compatible = "fsl,qe", },
{},
};
static int __init mpc836x_declare_of_platform_devices(void)
{
- if (!machine_is(mpc836x_mds))
- return 0;
-
/* Publish the QE devices */
of_platform_bus_probe(NULL, mpc836x_ids, NULL);
return 0;
}
-device_initcall(mpc836x_declare_of_platform_devices);
+machine_device_initcall(mpc836x_mds, mpc836x_declare_of_platform_devices);
static void __init mpc836x_mds_init_IRQ(void)
{
@@ -168,10 +166,12 @@ static void __init mpc836x_mds_init_IRQ(void)
of_node_put(np);
#ifdef CONFIG_QUICC_ENGINE
- np = of_find_node_by_type(NULL, "qeic");
- if (!np)
- return;
-
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+ if (!np) {
+ np = of_find_node_by_type(NULL, "qeic");
+ if (!np)
+ return;
+ }
qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
of_node_put(np);
#endif /* CONFIG_QUICC_ENGINE */
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
new file mode 100644
index 00000000000..8a9c2697360
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -0,0 +1,147 @@
+/*
+ * arch/powerpc/platforms/83xx/mpc837x_mds.c
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * MPC837x MDS board specific routines
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/pci.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+#include <asm/prom.h>
+
+#include "mpc83xx.h"
+
+#define BCSR12_USB_SER_MASK 0x8a
+#define BCSR12_USB_SER_PIN 0x80
+#define BCSR12_USB_SER_DEVICE 0x02
+extern int mpc837x_usb_cfg(void);
+
+static int mpc837xmds_usb_cfg(void)
+{
+ struct device_node *np;
+ const void *phy_type, *mode;
+ void __iomem *bcsr_regs = NULL;
+ u8 bcsr12;
+ int ret;
+
+ ret = mpc837x_usb_cfg();
+ if (ret)
+ return ret;
+ /* Map BCSR area */
+ np = of_find_node_by_name(NULL, "bcsr");
+ if (np) {
+ struct resource res;
+
+ of_address_to_resource(np, 0, &res);
+ bcsr_regs = ioremap(res.start, res.end - res.start + 1);
+ of_node_put(np);
+ }
+ if (!bcsr_regs)
+ return -1;
+
+ np = of_find_node_by_name(NULL, "usb");
+ if (!np)
+ return -ENODEV;
+ phy_type = of_get_property(np, "phy_type", NULL);
+ if (phy_type && !strcmp(phy_type, "ulpi")) {
+ clrbits8(bcsr_regs + 12, BCSR12_USB_SER_PIN);
+ } else if (phy_type && !strcmp(phy_type, "serial")) {
+ mode = of_get_property(np, "dr_mode", NULL);
+ bcsr12 = in_8(bcsr_regs + 12) & ~BCSR12_USB_SER_MASK;
+ bcsr12 |= BCSR12_USB_SER_PIN;
+ if (mode && !strcmp(mode, "peripheral"))
+ bcsr12 |= BCSR12_USB_SER_DEVICE;
+ out_8(bcsr_regs + 12, bcsr12);
+ } else {
+ printk(KERN_ERR "USB DR: unsupported PHY\n");
+ }
+
+ of_node_put(np);
+ iounmap(bcsr_regs);
+ return 0;
+}
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc837x_mds_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc837x_mds_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+ mpc83xx_add_bridge(np);
+#endif
+ mpc837xmds_usb_cfg();
+}
+
+static struct of_device_id mpc837x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc837x_declare_of_platform_devices(void)
+{
+ /* Publish of_device */
+ of_platform_bus_probe(NULL, mpc837x_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(mpc837x_mds, mpc837x_declare_of_platform_devices);
+
+static void __init mpc837x_mds_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc837x_mds_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc837xmds");
+}
+
+define_machine(mpc837x_mds) {
+ .name = "MPC837x MDS",
+ .probe = mpc837x_mds_probe,
+ .setup_arch = mpc837x_mds_setup_arch,
+ .init_IRQ = mpc837x_mds_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
new file mode 100644
index 00000000000..2293ae51383
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -0,0 +1,99 @@
+/*
+ * arch/powerpc/platforms/83xx/mpc837x_rdb.c
+ *
+ * Copyright (C) 2007 Freescale Semicondutor, Inc. All rights reserved.
+ *
+ * MPC837x RDB board specific routines
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/pci.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+
+#include "mpc83xx.h"
+
+extern int mpc837x_usb_cfg(void);
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc837x_rdb_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc837x_rdb_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+ mpc83xx_add_bridge(np);
+#endif
+ mpc837x_usb_cfg();
+}
+
+static struct of_device_id mpc837x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc837x_declare_of_platform_devices(void)
+{
+ /* Publish of_device */
+ of_platform_bus_probe(NULL, mpc837x_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(mpc837x_rdb, mpc837x_declare_of_platform_devices);
+
+static void __init mpc837x_rdb_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc837x_rdb_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc8377rdb") ||
+ of_flat_dt_is_compatible(root, "fsl,mpc8378rdb") ||
+ of_flat_dt_is_compatible(root, "fsl,mpc8379rdb");
+}
+
+define_machine(mpc837x_rdb) {
+ .name = "MPC837x RDB",
+ .probe = mpc837x_rdb_probe,
+ .setup_arch = mpc837x_rdb_setup_arch,
+ .init_IRQ = mpc837x_rdb_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index b778cb4f3fb..88bb748aff0 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -14,6 +14,7 @@
#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
+#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
/* system i/o configuration register low */
#define MPC83XX_SICRL_OFFS 0x114
@@ -22,6 +23,8 @@
#define MPC834X_SICRL_USB1 0x20000000
#define MPC831X_SICRL_USB_MASK 0x00000c00
#define MPC831X_SICRL_USB_ULPI 0x00000800
+#define MPC837X_SICRL_USB_MASK 0xf0000000
+#define MPC837X_SICRL_USB_ULPI 0x50000000
/* system i/o configuration register high */
#define MPC83XX_SICRH_OFFS 0x118
diff --git a/arch/powerpc/platforms/83xx/pci.c b/arch/powerpc/platforms/83xx/pci.c
index 80425d7b14f..14f1080c6c9 100644
--- a/arch/powerpc/platforms/83xx/pci.c
+++ b/arch/powerpc/platforms/83xx/pci.c
@@ -54,7 +54,7 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
" bus 0\n", dev->full_name);
}
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
hose = pcibios_alloc_controller(dev);
if (!hose)
return -ENOMEM;
diff --git a/arch/powerpc/platforms/83xx/sbc834x.c b/arch/powerpc/platforms/83xx/sbc834x.c
new file mode 100644
index 00000000000..cf382474a83
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/sbc834x.c
@@ -0,0 +1,115 @@
+/*
+ * arch/powerpc/platforms/83xx/sbc834x.c
+ *
+ * Wind River SBC834x board specific routines
+ *
+ * By Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * Based largely on the mpc834x_mds.c support by Kumar Gala.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/irq.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <sysdev/fsl_soc.h>
+
+#include "mpc83xx.h"
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init sbc834x_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("sbc834x_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
+ mpc83xx_add_bridge(np);
+#endif
+
+}
+
+static void __init sbc834x_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_node_by_type(NULL, "ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+
+ of_node_put(np);
+}
+
+static struct __initdata of_device_id sbc834x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init sbc834x_declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, sbc834x_ids, NULL);
+ return 0;
+}
+machine_device_initcall(sbc834x, sbc834x_declare_of_platform_devices);
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init sbc834x_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "SBC834x");
+}
+
+define_machine(sbc834x) {
+ .name = "SBC834x",
+ .probe = sbc834x_probe,
+ .setup_arch = sbc834x_setup_arch,
+ .init_IRQ = sbc834x_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index b45160f8d08..681230a30ac 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -22,7 +22,7 @@
#include "mpc83xx.h"
-#ifdef CONFIG_MPC834x
+#ifdef CONFIG_PPC_MPC834x
int mpc834x_usb_cfg(void)
{
unsigned long sccr, sicrl, sicrh;
@@ -41,7 +41,7 @@ int mpc834x_usb_cfg(void)
sicrl = in_be32(immap + MPC83XX_SICRL_OFFS) & ~MPC834X_SICRL_USB_MASK;
sicrh = in_be32(immap + MPC83XX_SICRH_OFFS) & ~MPC834X_SICRH_USB_UTMI;
- np = of_find_compatible_node(NULL, "usb", "fsl-usb2-dr");
+ np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
if (np) {
sccr |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */
@@ -67,7 +67,7 @@ int mpc834x_usb_cfg(void)
port0_is_dr = 1;
of_node_put(np);
}
- np = of_find_compatible_node(NULL, "usb", "fsl-usb2-mph");
+ np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph");
if (np) {
sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */
@@ -96,7 +96,7 @@ int mpc834x_usb_cfg(void)
iounmap(immap);
return 0;
}
-#endif /* CONFIG_MPC834x */
+#endif /* CONFIG_PPC_MPC834x */
#ifdef CONFIG_PPC_MPC831x
int mpc831x_usb_cfg(void)
@@ -111,7 +111,7 @@ int mpc831x_usb_cfg(void)
const void *dr_mode;
#endif
- np = of_find_compatible_node(NULL, "usb", "fsl-usb2-dr");
+ np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
if (!np)
return -ENODEV;
prop = of_get_property(np, "phy_type", NULL);
@@ -179,3 +179,43 @@ int mpc831x_usb_cfg(void)
return ret;
}
#endif /* CONFIG_PPC_MPC831x */
+
+#ifdef CONFIG_PPC_MPC837x
+int mpc837x_usb_cfg(void)
+{
+ void __iomem *immap;
+ struct device_node *np = NULL;
+ const void *prop;
+ int ret = 0;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");
+ if (!np)
+ return -ENODEV;
+ prop = of_get_property(np, "phy_type", NULL);
+
+ if (!prop || (strcmp(prop, "ulpi") && strcmp(prop, "serial"))) {
+ printk(KERN_WARNING "837x USB PHY type not supported\n");
+ of_node_put(np);
+ return -EINVAL;
+ }
+
+ /* Map IMMR space for pin and clock settings */
+ immap = ioremap(get_immrbase(), 0x1000);
+ if (!immap) {
+ of_node_put(np);
+ return -ENOMEM;
+ }
+
+ /* Configure clock */
+ clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, MPC837X_SCCR_USB_DRCM_11,
+ MPC837X_SCCR_USB_DRCM_11);
+
+ /* Configure pin mux for ULPI/serial */
+ clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, MPC837X_SICRL_USB_MASK,
+ MPC837X_SICRL_USB_ULPI);
+
+ iounmap(immap);
+ of_node_put(np);
+ return ret;
+}
+#endif /* CONFIG_PPC_MPC837x */
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 7748a3a426d..7e76ddbd582 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -1,7 +1,14 @@
-choice
- prompt "Machine Type"
+menuconfig MPC85xx
+ bool "Machine Type"
depends on PPC_85xx
- default MPC8540_ADS
+ select PPC_UDBG_16550
+ select PPC_INDIRECT_PCI if PCI
+ select MPIC
+ select FSL_PCI if PCI
+ select SERIAL_8250_SHARE_IRQ if SERIAL_8250
+ default y
+
+if MPC85xx
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
@@ -13,6 +20,7 @@ config MPC8560_ADS
bool "Freescale MPC8560 ADS"
select DEFAULT_UIMAGE
select PPC_CPM_NEW_BINDING
+ select CPM2
help
This option enables support for the MPC 8560 ADS board
@@ -38,25 +46,64 @@ config MPC85xx_DS
help
This option enables support for the MPC85xx DS (MPC8544 DS) board
-endchoice
+config STX_GP3
+ bool "Silicon Turnkey Express GP3"
+ help
+ This option enables support for the Silicon Turnkey Express GP3
+ board.
+ select CPM2
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
-config MPC8540
- bool
- select PPC_UDBG_16550
- select PPC_INDIRECT_PCI
- default y if MPC8540_ADS || MPC85xx_CDS
+config TQM8540
+ bool "TQ Components TQM8540"
+ help
+ This option enables support for the TQ Components TQM8540 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
-config MPC8560
- bool
+config TQM8541
+ bool "TQ Components TQM8541"
+ help
+ This option enables support for the TQ Components TQM8541 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
+ select CPM2
+
+config TQM8555
+ bool "TQ Components TQM8555"
+ help
+ This option enables support for the TQ Components TQM8555 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
select CPM2
- default y if MPC8560_ADS
-config MPC85xx
+config TQM8560
+ bool "TQ Components TQM8560"
+ help
+ This option enables support for the TQ Components TQM8560 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
+ select CPM2
+
+config SBC8548
+ bool "Wind River SBC8548"
+ select DEFAULT_UIMAGE
+ help
+ This option enables support for the Wind River SBC8548 board
+
+config SBC8560
+ bool "Wind River SBC8560"
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING if CPM2
+ help
+ This option enables support for the Wind River SBC8560 board
+
+endif # MPC85xx
+
+config TQM85xx
bool
- select PPC_UDBG_16550
- select PPC_INDIRECT_PCI if PCI
- select MPIC
- select FSL_PCI if PCI
- select SERIAL_8250_SHARE_IRQ if SERIAL_8250
- default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \
- || MPC85xx_MDS || MPC85xx_DS
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 5eca92023ec..cb7af4ebd75 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -6,3 +6,7 @@ obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
+obj-$(CONFIG_STX_GP3) += stx_gp3.o
+obj-$(CONFIG_TQM85xx) += tqm85xx.o
+obj-$(CONFIG_SBC8560) += sbc8560.o
+obj-$(CONFIG_SBC8548) += sbc8548.o
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index bccdc25f83a..4e030509611 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -52,9 +52,9 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
{
int cascade_irq;
- while ((cascade_irq = cpm2_get_irq()) >= 0) {
+ while ((cascade_irq = cpm2_get_irq()) >= 0)
generic_handle_irq(cascade_irq);
- }
+
desc->chip->eoi(irq);
}
@@ -70,13 +70,12 @@ static void __init mpc85xx_ads_pic_init(void)
#endif
np = of_find_node_by_type(np, "open-pic");
-
- if (np == NULL) {
+ if (!np) {
printk(KERN_ERR "Could not find open-pic node\n");
return;
}
- if(of_address_to_resource(np, 0, &r)) {
+ if (of_address_to_resource(np, 0, &r)) {
printk(KERN_ERR "Could not map mpic register space\n");
of_node_put(np);
return;
@@ -100,6 +99,7 @@ static void __init mpc85xx_ads_pic_init(void)
irq = irq_of_parse_and_map(np, 0);
cpm2_pic_init(np);
+ of_node_put(np);
set_irq_chained_handler(irq, cpm2_cascade);
#endif
}
@@ -112,7 +112,7 @@ struct cpm_pin {
int port, pin, flags;
};
-static struct cpm_pin mpc8560_ads_pins[] = {
+static const struct cpm_pin mpc8560_ads_pins[] = {
/* SCC1 */
{3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
{3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
@@ -233,13 +233,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
static int __init declare_of_platform_devices(void)
{
- if (!machine_is(mpc85xx_ads))
- return 0;
-
of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
return 0;
}
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(mpc85xx_ads, declare_of_platform_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 4d063eec621..8b1de7884be 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -222,9 +222,6 @@ static int mpc85xx_cds_8259_attach(void)
struct device_node *cascade_node = NULL;
int cascade_irq;
- if (!machine_is(mpc85xx_cds))
- return 0;
-
/* Initialize the i8259 controller */
for_each_node_by_type(np, "interrupt-controller")
if (of_device_is_compatible(np, "chrp,iic")) {
@@ -262,8 +259,7 @@ static int mpc85xx_cds_8259_attach(void)
return 0;
}
-
-device_initcall(mpc85xx_cds_8259_attach);
+machine_device_initcall(mpc85xx_cds, mpc85xx_cds_8259_attach);
#endif /* CONFIG_PPC_I8259 */
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 59c121a97ac..bdb3d0b38cd 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -123,7 +123,7 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
struct device_node* node;
struct resource rsrc;
- node = (struct device_node *)hose->arch_data;
+ node = hose->dn;
of_address_to_resource(node, 0, &rsrc);
if ((rsrc.start & 0xfffff) == primary_phb_addr) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 61b3eedf41b..25f8bc75e83 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -30,9 +30,9 @@
#include <linux/initrd.h>
#include <linux/module.h>
#include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
+#include <linux/of_device.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/time.h>
@@ -94,21 +94,25 @@ static void __init mpc85xx_mds_setup_arch(void)
#endif
#ifdef CONFIG_QUICC_ENGINE
- if ((np = of_find_node_by_name(NULL, "qe")) != NULL) {
- qe_reset();
- of_node_put(np);
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe");
+ if (!np) {
+ np = of_find_node_by_name(NULL, "qe");
+ if (!np)
+ return;
}
- if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
- struct device_node *ucc = NULL;
+ qe_reset();
+ of_node_put(np);
+
+ np = of_find_node_by_name(NULL, "par_io");
+ if (np) {
+ struct device_node *ucc;
par_io_init(np);
of_node_put(np);
- for ( ;(ucc = of_find_node_by_name(ucc, "ucc")) != NULL;)
+ for_each_node_by_name(ucc, "ucc")
par_io_of_config(ucc);
-
- of_node_put(ucc);
}
if (bcsr_regs) {
@@ -131,7 +135,6 @@ static void __init mpc85xx_mds_setup_arch(void)
iounmap(bcsr_regs);
}
-
#endif /* CONFIG_QUICC_ENGINE */
}
@@ -139,20 +142,18 @@ static struct of_device_id mpc85xx_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
+ { .compatible = "fsl,qe", },
{},
};
static int __init mpc85xx_publish_devices(void)
{
- if (!machine_is(mpc85xx_mds))
- return 0;
-
/* Publish the QE devices */
- of_platform_bus_probe(NULL,mpc85xx_ids,NULL);
+ of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
return 0;
}
-device_initcall(mpc85xx_publish_devices);
+machine_device_initcall(mpc85xx_mds, mpc85xx_publish_devices);
static void __init mpc85xx_mds_pic_init(void)
{
@@ -179,10 +180,12 @@ static void __init mpc85xx_mds_pic_init(void)
mpic_init(mpic);
#ifdef CONFIG_QUICC_ENGINE
- np = of_find_node_by_type(NULL, "qeic");
- if (!np)
- return;
-
+ np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
+ if (!np) {
+ np = of_find_node_by_type(NULL, "qeic");
+ if (!np)
+ return;
+ }
qe_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);
of_node_put(np);
#endif /* CONFIG_QUICC_ENGINE */
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c
new file mode 100644
index 00000000000..488facb99fe
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/sbc8548.c
@@ -0,0 +1,167 @@
+/*
+ * Wind River SBC8548 setup and early boot code.
+ *
+ * Copyright 2007 Wind River Systems Inc.
+ *
+ * By Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * Based largely on the MPC8548CDS support - Copyright 2005 Freescale Inc.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/initrd.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/fsl_devices.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/pci-bridge.h>
+#include <asm/irq.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+static void __init sbc8548_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np = NULL;
+
+ np = of_find_node_by_type(np, "open-pic");
+
+ if (np == NULL) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Failed to map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 0, 256, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+
+ /* Return the mpic node */
+ of_node_put(np);
+
+ mpic_init(mpic);
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init sbc8548_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("sbc8548_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_node_by_type(np, "pci") {
+ if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+ of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
+ struct resource rsrc;
+ of_address_to_resource(np, 0, &rsrc);
+ if ((rsrc.start & 0xfffff) == 0x8000)
+ fsl_add_bridge(np, 1);
+ else
+ fsl_add_bridge(np, 0);
+ }
+ }
+#endif
+}
+
+static void sbc8548_show_cpuinfo(struct seq_file *m)
+{
+ uint pvid, svid, phid1;
+ uint memsize = total_memory;
+
+ pvid = mfspr(SPRN_PVR);
+ svid = mfspr(SPRN_SVR);
+
+ seq_printf(m, "Vendor\t\t: Wind River\n");
+ seq_printf(m, "Machine\t\t: SBC8548\n");
+ seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
+ seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+ /* Display cpu Pll setting */
+ phid1 = mfspr(SPRN_HID1);
+ seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
+
+ /* Display the amount of memory */
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc", },
+ { .type = "soc", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(sbc8548, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init sbc8548_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "SBC8548");
+}
+
+define_machine(sbc8548) {
+ .name = "SBC8548",
+ .probe = sbc8548_probe,
+ .setup_arch = sbc8548_setup_arch,
+ .init_IRQ = sbc8548_pic_init,
+ .show_cpuinfo = sbc8548_show_cpuinfo,
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
new file mode 100644
index 00000000000..2c580cd24e4
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -0,0 +1,283 @@
+/*
+ * Wind River SBC8560 setup and early boot code.
+ *
+ * Copyright 2007 Wind River Systems Inc.
+ *
+ * By Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpic.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#ifdef CONFIG_CPM2
+#include <asm/cpm2.h>
+#include <sysdev/cpm2_pic.h>
+#endif
+
+#ifdef CONFIG_CPM2
+
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ int cascade_irq;
+
+ while ((cascade_irq = cpm2_get_irq()) >= 0)
+ generic_handle_irq(cascade_irq);
+
+ desc->chip->eoi(irq);
+}
+
+#endif /* CONFIG_CPM2 */
+
+static void __init sbc8560_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np = NULL;
+#ifdef CONFIG_CPM2
+ int irq;
+#endif
+
+ np = of_find_node_by_type(np, "open-pic");
+ if (!np) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Could not map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 0, 256, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+ of_node_put(np);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_CPM2
+ /* Setup CPM2 PIC */
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
+ if (np == NULL) {
+ printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
+ return;
+ }
+ irq = irq_of_parse_and_map(np, 0);
+
+ cpm2_pic_init(np);
+ of_node_put(np);
+ set_irq_chained_handler(irq, cpm2_cascade);
+#endif
+}
+
+/*
+ * Setup the architecture
+ */
+#ifdef CONFIG_CPM2
+struct cpm_pin {
+ int port, pin, flags;
+};
+
+static const struct cpm_pin sbc8560_pins[] = {
+ /* SCC1 */
+ {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* SCC2 */
+ {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* FCC2 */
+ {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
+ {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
+
+ /* FCC3 */
+ {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
+ {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
+};
+
+static void __init init_ioports(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) {
+ struct cpm_pin *pin = &sbc8560_pins[i];
+ cpm2_set_pin(pin->port, pin->pin, pin->flags);
+ }
+
+ cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
+ cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
+ cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
+ cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
+}
+#endif
+
+static void __init sbc8560_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("sbc8560_setup_arch()", 0);
+
+#ifdef CONFIG_CPM2
+ cpm2_reset();
+ init_ioports();
+#endif
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
+ fsl_add_bridge(np, 1);
+#endif
+}
+
+static void sbc8560_show_cpuinfo(struct seq_file *m)
+{
+ uint pvid, svid, phid1;
+ uint memsize = total_memory;
+
+ pvid = mfspr(SPRN_PVR);
+ svid = mfspr(SPRN_SVR);
+
+ seq_printf(m, "Vendor\t\t: Wind River\n");
+ seq_printf(m, "Machine\t\t: SBC8560\n");
+ seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
+ seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+ /* Display cpu Pll setting */
+ phid1 = mfspr(SPRN_HID1);
+ seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
+
+ /* Display the amount of memory */
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc", },
+ { .type = "soc", },
+ { .name = "cpm", },
+ { .name = "localbus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(sbc8560, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init sbc8560_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "SBC8560");
+}
+
+#ifdef CONFIG_RTC_DRV_M48T59
+static int __init sbc8560_rtc_init(void)
+{
+ struct device_node *np;
+ struct resource res;
+ struct platform_device *rtc_dev;
+
+ np = of_find_compatible_node(NULL, NULL, "m48t59");
+ if (np == NULL) {
+ printk("No RTC in DTB. Has it been eaten by wild dogs?\n");
+ return -ENODEV;
+ }
+
+ of_address_to_resource(np, 0, &res);
+ of_node_put(np);
+
+ printk("Found RTC (m48t59) at i/o 0x%x\n", res.start);
+
+ rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1);
+
+ if (IS_ERR(rtc_dev)) {
+ printk("Registering sbc8560 RTC device failed\n");
+ return PTR_ERR(rtc_dev);
+ }
+
+ return 0;
+}
+
+arch_initcall(sbc8560_rtc_init);
+
+#endif /* M48T59 */
+
+define_machine(sbc8560) {
+ .name = "SBC8560",
+ .probe = sbc8560_probe,
+ .setup_arch = sbc8560_setup_arch,
+ .init_IRQ = sbc8560_pic_init,
+ .show_cpuinfo = sbc8560_show_cpuinfo,
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
new file mode 100644
index 00000000000..18499d7c9d9
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -0,0 +1,183 @@
+/*
+ * Based on MPC8560 ADS and arch/ppc stx_gp3 ports
+ *
+ * Maintained by Kumar Gala (see MAINTAINERS for contact information)
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * Dan Malek <dan@embeddededge.com>
+ * Copyright 2004 Embedded Edge, LLC
+ *
+ * Copied from mpc8560_ads.c
+ * Copyright 2002, 2003 Motorola Inc.
+ *
+ * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2004-2005 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpic.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#ifdef CONFIG_CPM2
+#include <asm/cpm2.h>
+#include <sysdev/cpm2_pic.h>
+
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ int cascade_irq;
+
+ while ((cascade_irq = cpm2_get_irq()) >= 0)
+ generic_handle_irq(cascade_irq);
+
+ desc->chip->eoi(irq);
+}
+#endif /* CONFIG_CPM2 */
+
+static void __init stx_gp3_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np;
+#ifdef CONFIG_CPM2
+ int irq;
+#endif
+
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (!np) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Could not map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 0, 256, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+ of_node_put(np);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_CPM2
+ /* Setup CPM2 PIC */
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
+ if (np == NULL) {
+ printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
+ return;
+ }
+ irq = irq_of_parse_and_map(np, 0);
+
+ if (irq == NO_IRQ) {
+ of_node_put(np);
+ printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
+ return;
+ }
+
+ cpm2_pic_init(np);
+ of_node_put(np);
+ set_irq_chained_handler(irq, cpm2_cascade);
+#endif
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init stx_gp3_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("stx_gp3_setup_arch()", 0);
+
+#ifdef CONFIG_CPM2
+ cpm2_reset();
+#endif
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
+ fsl_add_bridge(np, 1);
+#endif
+}
+
+static void stx_gp3_show_cpuinfo(struct seq_file *m)
+{
+ uint pvid, svid, phid1;
+ uint memsize = total_memory;
+
+ pvid = mfspr(SPRN_PVR);
+ svid = mfspr(SPRN_SVR);
+
+ seq_printf(m, "Vendor\t\t: RPC Electronics STx \n");
+ seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
+ seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+ /* Display cpu Pll setting */
+ phid1 = mfspr(SPRN_HID1);
+ seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
+
+ /* Display the amount of memory */
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(stx_gp3, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init stx_gp3_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "stx,gp3-8560");
+}
+
+define_machine(stx_gp3) {
+ .name = "STX GP3",
+ .probe = stx_gp3_probe,
+ .setup_arch = stx_gp3_setup_arch,
+ .init_IRQ = stx_gp3_pic_init,
+ .show_cpuinfo = stx_gp3_show_cpuinfo,
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
new file mode 100644
index 00000000000..77681acf1ba
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -0,0 +1,187 @@
+/*
+ * Based on MPC8560 ADS and arch/ppc tqm85xx ports
+ *
+ * Maintained by Kumar Gala (see MAINTAINERS for contact information)
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * Copyright (c) 2005-2006 DENX Software Engineering
+ * Stefan Roese <sr@denx.de>
+ *
+ * Based on original work by
+ * Kumar Gala <kumar.gala@freescale.com>
+ * Copyright 2004 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpic.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#ifdef CONFIG_CPM2
+#include <asm/cpm2.h>
+#include <sysdev/cpm2_pic.h>
+
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ int cascade_irq;
+
+ while ((cascade_irq = cpm2_get_irq()) >= 0)
+ generic_handle_irq(cascade_irq);
+
+ desc->chip->eoi(irq);
+}
+#endif /* CONFIG_CPM2 */
+
+static void __init tqm85xx_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np;
+#ifdef CONFIG_CPM2
+ int irq;
+#endif
+
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (!np) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Could not map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 0, 256, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+ of_node_put(np);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_CPM2
+ /* Setup CPM2 PIC */
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
+ if (np == NULL) {
+ printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
+ return;
+ }
+ irq = irq_of_parse_and_map(np, 0);
+
+ if (irq == NO_IRQ) {
+ of_node_put(np);
+ printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
+ return;
+ }
+
+ cpm2_pic_init(np);
+ of_node_put(np);
+ set_irq_chained_handler(irq, cpm2_cascade);
+#endif
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init tqm85xx_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("tqm85xx_setup_arch()", 0);
+
+#ifdef CONFIG_CPM2
+ cpm2_reset();
+#endif
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
+ fsl_add_bridge(np, 1);
+#endif
+}
+
+static void tqm85xx_show_cpuinfo(struct seq_file *m)
+{
+ uint pvid, svid, phid1;
+ uint memsize = total_memory;
+
+ pvid = mfspr(SPRN_PVR);
+ svid = mfspr(SPRN_SVR);
+
+ seq_printf(m, "Vendor\t\t: TQ Components\n");
+ seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
+ seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+ /* Display cpu Pll setting */
+ phid1 = mfspr(SPRN_HID1);
+ seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
+
+ /* Display the amount of memory */
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(tqm85xx, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init tqm85xx_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if ((of_flat_dt_is_compatible(root, "tqm,8540")) ||
+ (of_flat_dt_is_compatible(root, "tqm,8541")) ||
+ (of_flat_dt_is_compatible(root, "tqm,8555")) ||
+ (of_flat_dt_is_compatible(root, "tqm,8560")))
+ return 1;
+
+ return 0;
+}
+
+define_machine(tqm85xx) {
+ .name = "TQM85xx",
+ .probe = tqm85xx_probe,
+ .setup_arch = tqm85xx_setup_arch,
+ .init_IRQ = tqm85xx_pic_init,
+ .show_cpuinfo = tqm85xx_show_cpuinfo,
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 6390895e5e9..0b07485641f 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -34,9 +34,24 @@
#include <asm/mpic.h>
+#include <linux/of_platform.h>
#include <sysdev/fsl_pci.h>
#include <sysdev/fsl_soc.h>
+static struct of_device_id __initdata mpc8610_ids[] = {
+ { .compatible = "fsl,mpc8610-immr", },
+ {}
+};
+
+static int __init mpc8610_declare_of_platform_devices(void)
+{
+ /* Without this call, the SSI device driver won't get probed. */
+ of_platform_bus_probe(NULL, mpc8610_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
+
void __init
mpc86xx_hpcd_init_irq(void)
{
@@ -124,7 +139,7 @@ static void __devinit quirk_uli5229(struct pci_dev *dev)
static void __devinit final_uli5288(struct pci_dev *dev)
{
struct pci_controller *hose = pci_bus_to_host(dev->bus);
- struct device_node *hosenode = hose ? hose->arch_data : NULL;
+ struct device_node *hosenode = hose ? hose->dn : NULL;
struct of_irq oirq;
int virq, pin = 2;
u32 laddr[3];
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 32a531aebcb..cfbe8c52e26 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -18,6 +18,7 @@
#include <linux/kdev_t.h>
#include <linux/delay.h>
#include <linux/seq_file.h>
+#include <linux/of_platform.h>
#include <asm/system.h>
#include <asm/time.h>
@@ -116,7 +117,7 @@ static int mpc86xx_exclude_device(struct pci_controller *hose,
struct device_node* node;
struct resource rsrc;
- node = (struct device_node *)hose->arch_data;
+ node = hose->dn;
of_address_to_resource(node, 0, &rsrc);
if ((rsrc.start & 0xfffff) == 0x8000) {
@@ -212,6 +213,19 @@ mpc86xx_time_init(void)
return 0;
}
+static __initdata struct of_device_id of_bus_ids[] = {
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
+
define_machine(mpc86xx_hpcn) {
.name = "MPC86xx HPCN",
.probe = mpc86xx_hpcn_probe,
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index bd28655043a..7fd224ca233 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -18,6 +18,7 @@ config MPC8XXFADS
config MPC86XADS
bool "MPC86XADS"
select CPM1
+ select PPC_CPM_NEW_BINDING
help
MPC86x Application Development System by Freescale Semiconductor.
The MPC86xADS is meant to serve as a platform for s/w and h/w
@@ -43,6 +44,15 @@ config PPC_EP88XC
This board is also resold by Freescale as the QUICCStart
MPC885 Evaluation System and/or the CWH-PPC-885XN-VE.
+config PPC_ADDER875
+ bool "Analogue & Micro Adder 875"
+ select CPM1
+ select PPC_CPM_NEW_BINDING
+ select REDBOOT
+ help
+ This enables support for the Analogue & Micro Adder 875
+ board.
+
endchoice
menu "Freescale Ethernet driver platform-specific options"
diff --git a/arch/powerpc/platforms/8xx/Makefile b/arch/powerpc/platforms/8xx/Makefile
index 8b7098018b5..7b71d9c8fb4 100644
--- a/arch/powerpc/platforms/8xx/Makefile
+++ b/arch/powerpc/platforms/8xx/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_8xx) += m8xx_setup.o
obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
obj-$(CONFIG_MPC86XADS) += mpc86xads_setup.o
obj-$(CONFIG_PPC_EP88XC) += ep88xc.o
+obj-$(CONFIG_PPC_ADDER875) += adder875.o
diff --git a/arch/powerpc/platforms/8xx/adder875.c b/arch/powerpc/platforms/8xx/adder875.c
new file mode 100644
index 00000000000..c6bc0783c3b
--- /dev/null
+++ b/arch/powerpc/platforms/8xx/adder875.c
@@ -0,0 +1,118 @@
+/* Analogue & Micro Adder MPC875 board support
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/fs_enet_pd.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/commproc.h>
+#include <asm/fs_pd.h>
+#include <asm/udbg.h>
+#include <asm/prom.h>
+
+#include <sysdev/commproc.h>
+
+struct cpm_pin {
+ int port, pin, flags;
+};
+
+static __initdata struct cpm_pin adder875_pins[] = {
+ /* SMC1 */
+ {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
+ {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
+
+ /* MII1 */
+ {CPM_PORTA, 0, CPM_PIN_INPUT},
+ {CPM_PORTA, 1, CPM_PIN_INPUT},
+ {CPM_PORTA, 2, CPM_PIN_INPUT},
+ {CPM_PORTA, 3, CPM_PIN_INPUT},
+ {CPM_PORTA, 4, CPM_PIN_OUTPUT},
+ {CPM_PORTA, 10, CPM_PIN_OUTPUT},
+ {CPM_PORTA, 11, CPM_PIN_OUTPUT},
+ {CPM_PORTB, 19, CPM_PIN_INPUT},
+ {CPM_PORTB, 31, CPM_PIN_INPUT},
+ {CPM_PORTC, 12, CPM_PIN_INPUT},
+ {CPM_PORTC, 13, CPM_PIN_INPUT},
+ {CPM_PORTE, 30, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 31, CPM_PIN_OUTPUT},
+
+ /* MII2 */
+ {CPM_PORTE, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {CPM_PORTE, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {CPM_PORTE, 16, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {CPM_PORTE, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {CPM_PORTE, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {CPM_PORTE, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {CPM_PORTE, 21, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 22, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 23, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 24, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 25, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 26, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 27, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 28, CPM_PIN_OUTPUT},
+ {CPM_PORTE, 29, CPM_PIN_OUTPUT},
+};
+
+static void __init init_ioports(void)
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(adder875_pins); i++) {
+ const struct cpm_pin *pin = &adder875_pins[i];
+ cpm1_set_pin(pin->port, pin->pin, pin->flags);
+ }
+
+ cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
+
+ /* Set FEC1 and FEC2 to MII mode */
+ clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
+}
+
+static void __init adder875_setup(void)
+{
+ cpm_reset();
+ init_ioports();
+}
+
+static int __init adder875_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ return of_flat_dt_is_compatible(root, "analogue-and-micro,adder875");
+}
+
+static __initdata struct of_device_id of_bus_ids[] = {
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ return 0;
+}
+machine_device_initcall(adder875, declare_of_platform_devices);
+
+define_machine(adder875) {
+ .name = "Adder MPC875",
+ .probe = adder875_probe,
+ .setup_arch = adder875_setup,
+ .init_IRQ = m8xx_pic_init,
+ .get_irq = mpc8xx_get_irq,
+ .restart = mpc8xx_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .set_rtc_time = mpc8xx_set_rtc_time,
+ .get_rtc_time = mpc8xx_get_rtc_time,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/8xx/ep88xc.c b/arch/powerpc/platforms/8xx/ep88xc.c
index c518b6cc5fa..a8dffa00577 100644
--- a/arch/powerpc/platforms/8xx/ep88xc.c
+++ b/arch/powerpc/platforms/8xx/ep88xc.c
@@ -16,8 +16,9 @@
#include <asm/io.h>
#include <asm/udbg.h>
#include <asm/commproc.h>
+#include <asm/cpm1.h>
-#include <sysdev/commproc.h>
+#include "mpc8xx.h"
struct cpm_pin {
int port, pin, flags;
@@ -155,18 +156,17 @@ static struct of_device_id __initdata of_bus_ids[] = {
static int __init declare_of_platform_devices(void)
{
/* Publish the QE devices */
- if (machine_is(ep88xc))
- of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
return 0;
}
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(ep88xc, declare_of_platform_devices);
define_machine(ep88xc) {
.name = "Embedded Planet EP88xC",
.probe = ep88xc_probe,
.setup_arch = ep88xc_setup_arch,
- .init_IRQ = m8xx_pic_init,
+ .init_IRQ = mpc8xx_pics_init,
.get_irq = mpc8xx_get_irq,
.restart = mpc8xx_restart,
.calibrate_decr = mpc8xx_calibrate_decr,
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index d35eda80e9e..184f998d1be 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -16,6 +16,7 @@
#include <linux/init.h>
#include <linux/time.h>
#include <linux/rtc.h>
+#include <linux/fsl_devices.h>
#include <asm/io.h>
#include <asm/mpc8xx.h>
@@ -25,13 +26,11 @@
#include <mm/mmu_decl.h>
#include <sysdev/mpc8xx_pic.h>
-#include <sysdev/commproc.h>
-#ifdef CONFIG_PCMCIA_M8XX
+#include "mpc8xx.h"
+
struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops;
-#endif
-void m8xx_calibrate_decr(void);
extern int cpm_pic_init(void);
extern int cpm_get_irq(void);
@@ -120,7 +119,7 @@ void __init mpc8xx_calibrate_decr(void)
ppc_tb_freq /= 16;
ppc_proc_freq = 50000000;
if (!get_freq("clock-frequency", &ppc_proc_freq))
- printk(KERN_ERR "WARNING: Estimating processor frequency"
+ printk(KERN_ERR "WARNING: Estimating processor frequency "
"(not found)\n");
printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
@@ -237,13 +236,13 @@ static void cpm_cascade(unsigned int irq, struct irq_desc *desc)
desc->chip->eoi(irq);
}
-/* Initialize the internal interrupt controller. The number of
+/* Initialize the internal interrupt controllers. The number of
* interrupts supported can vary with the processor type, and the
* 82xx family can have up to 64.
* External interrupts can be either edge or level triggered, and
* need to be initialized by the appropriate driver.
*/
-void __init m8xx_pic_init(void)
+void __init mpc8xx_pics_init(void)
{
int irq;
diff --git a/arch/powerpc/platforms/8xx/mpc86xads.h b/arch/powerpc/platforms/8xx/mpc86xads.h
index cffa194ccf1..17b1fe75e0b 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads.h
+++ b/arch/powerpc/platforms/8xx/mpc86xads.h
@@ -15,27 +15,6 @@
#ifndef __ASM_MPC86XADS_H__
#define __ASM_MPC86XADS_H__
-#include <sysdev/fsl_soc.h>
-
-/* U-Boot maps BCSR to 0xff080000 */
-#define BCSR_ADDR ((uint)0xff080000)
-#define BCSR_SIZE ((uint)32)
-#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
-#define BCSR1 ((uint)(BCSR_ADDR + 0x04))
-#define BCSR2 ((uint)(BCSR_ADDR + 0x08))
-#define BCSR3 ((uint)(BCSR_ADDR + 0x0c))
-#define BCSR4 ((uint)(BCSR_ADDR + 0x10))
-
-#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
-#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
-
-#define MPC8xx_CPM_OFFSET (0x9c0)
-#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)
-#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver
-
-#define PCMCIA_MEM_ADDR ((uint)0xff020000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-
/* Bits of interest in the BCSRs.
*/
#define BCSR1_ETHEN ((uint)0x20000000)
@@ -64,28 +43,5 @@
#define BCSR5_MII1_EN 0x02
#define BCSR5_MII1_RST 0x01
-/* Interrupt level assignments */
-#define PHY_INTERRUPT SIU_IRQ7 /* PHY link change interrupt */
-#define SIU_INT_FEC1 SIU_LEVEL1 /* FEC1 interrupt */
-#define FEC_INTERRUPT SIU_INT_FEC1 /* FEC interrupt */
-
-/* We don't use the 8259 */
-#define NR_8259_INTS 0
-
-/* CPM Ethernet through SCC1 */
-#define PA_ENET_RXD ((ushort)0x0001)
-#define PA_ENET_TXD ((ushort)0x0002)
-#define PA_ENET_TCLK ((ushort)0x0100)
-#define PA_ENET_RCLK ((ushort)0x0200)
-#define PB_ENET_TENA ((uint)0x00001000)
-#define PC_ENET_CLSN ((ushort)0x0010)
-#define PC_ENET_RENA ((ushort)0x0020)
-
-/* Control bits in the SICR to route TCLK (CLK1) and RCLK (CLK2) to
- * SCC1. Also, make sure GR1 (bit 24) and SC1 (bit 25) are zero.
- */
-#define SICR_ENET_MASK ((uint)0x000000ff)
-#define SICR_ENET_CLKRT ((uint)0x0000002c)
-
#endif /* __ASM_MPC86XADS_H__ */
#endif /* __KERNEL__ */
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index 49012835f45..c028a5b71bb 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -6,273 +6,141 @@
*
* Copyright 2005 MontaVista Software Inc.
*
+ * Heavily modified by Scott Wood <scottwood@freescale.com>
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/ioport.h>
-#include <linux/device.h>
-#include <linux/delay.h>
-#include <linux/root_dev.h>
-
-#include <linux/fs_enet_pd.h>
-#include <linux/fs_uart_pd.h>
-#include <linux/mii.h>
+#include <linux/of_platform.h>
-#include <asm/delay.h>
#include <asm/io.h>
#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/processor.h>
#include <asm/system.h>
#include <asm/time.h>
-#include <asm/mpc8xx.h>
#include <asm/8xx_immap.h>
-#include <asm/commproc.h>
+#include <asm/cpm1.h>
#include <asm/fs_pd.h>
-#include <asm/prom.h>
+#include <asm/udbg.h>
-#include <sysdev/commproc.h>
+#include "mpc86xads.h"
+#include "mpc8xx.h"
-static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
-static void init_scc1_ioports(struct fs_platform_info* ptr);
+struct cpm_pin {
+ int port, pin, flags;
+};
-void __init mpc86xads_board_setup(void)
-{
- cpm8xx_t *cp;
- unsigned int *bcsr_io;
- u8 tmpval8;
+static struct cpm_pin mpc866ads_pins[] = {
+ /* SMC1 */
+ {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
+ {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
+
+ /* SMC2 */
+ {CPM_PORTB, 21, CPM_PIN_INPUT}, /* RX */
+ {CPM_PORTB, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
+
+ /* SCC1 */
+ {CPM_PORTA, 6, CPM_PIN_INPUT}, /* CLK1 */
+ {CPM_PORTA, 7, CPM_PIN_INPUT}, /* CLK2 */
+ {CPM_PORTA, 14, CPM_PIN_INPUT}, /* TX */
+ {CPM_PORTA, 15, CPM_PIN_INPUT}, /* RX */
+ {CPM_PORTB, 19, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
+ {CPM_PORTC, 10, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */
+ {CPM_PORTC, 11, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */
+
+ /* MII */
+ {CPM_PORTD, 3, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 4, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 5, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 6, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 7, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 8, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 9, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 10, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 11, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 12, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 13, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 14, CPM_PIN_OUTPUT},
+ {CPM_PORTD, 15, CPM_PIN_OUTPUT},
+};
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
- cp = (cpm8xx_t *)immr_map(im_cpm);
+static void __init init_ioports(void)
+{
+ int i;
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR\n");
- return;
+ for (i = 0; i < ARRAY_SIZE(mpc866ads_pins); i++) {
+ struct cpm_pin *pin = &mpc866ads_pins[i];
+ cpm1_set_pin(pin->port, pin->pin, pin->flags);
}
-#ifdef CONFIG_SERIAL_CPM_SMC1
- clrbits32(bcsr_io, BCSR1_RS232EN_1);
- clrbits32(&cp->cp_simode, 0xe0000000 >> 17); /* brg1 */
- tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX | SMCM_TX);
- out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
- clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN);
-#else
- setbits32(bcsr_io,BCSR1_RS232EN_1);
- out_be16(&cp->cp_smc[0].smc_smcmr, 0);
- out_8(&cp->cp_smc[0].smc_smce, 0);
-#endif
-#ifdef CONFIG_SERIAL_CPM_SMC2
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
- clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
- setbits32(&cp->cp_simode, 0x20000000 >> 1); /* brg2 */
- tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
- out_8(&(cp->cp_smc[1].smc_smcm), tmpval8);
- clrbits16(&cp->cp_smc[1].smc_smcmr, SMCMR_REN | SMCMR_TEN);
+ cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
+ cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX);
+ cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK1, CPM_CLK_TX);
+ cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
- init_smc2_uart_ioports(0);
-#else
- setbits32(bcsr_io,BCSR1_RS232EN_2);
- out_be16(&cp->cp_smc[1].smc_smcmr, 0);
- out_8(&cp->cp_smc[1].smc_smce, 0);
-#endif
- immr_unmap(cp);
- iounmap(bcsr_io);
+ /* Set FEC1 and FEC2 to MII mode */
+ clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
}
-
-static void init_fec1_ioports(struct fs_platform_info* ptr)
+static void __init mpc86xads_setup_arch(void)
{
- iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
-
- /* configure FEC1 pins */
-
- setbits16(&io_port->iop_pdpar, 0x1fff);
- setbits16(&io_port->iop_pddir, 0x1fff);
-
- immr_unmap(io_port);
-}
+ struct device_node *np;
+ u32 __iomem *bcsr_io;
-void init_fec_ioports(struct fs_platform_info *fpi)
-{
- int fec_no = fs_get_fec_index(fpi->fs_no);
+ cpm_reset();
+ init_ioports();
- switch (fec_no) {
- case 0:
- init_fec1_ioports(fpi);
- break;
- default:
- printk(KERN_ERR "init_fec_ioports: invalid FEC number\n");
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc866ads-bcsr");
+ if (!np) {
+ printk(KERN_CRIT "Could not find fsl,mpc866ads-bcsr node\n");
return;
}
-}
-
-static void init_scc1_ioports(struct fs_platform_info* fpi)
-{
- unsigned *bcsr_io;
- iop8xx_t *io_port;
- cpm8xx_t *cp;
- bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
- io_port = (iop8xx_t *)immr_map(im_ioport);
- cp = (cpm8xx_t *)immr_map(im_cpm);
+ bcsr_io = of_iomap(np, 0);
+ of_node_put(np);
if (bcsr_io == NULL) {
printk(KERN_CRIT "Could not remap BCSR\n");
return;
}
- /* Configure port A pins for Txd and Rxd.
- */
- setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
- clrbits16(&io_port->iop_padir, PA_ENET_RXD | PA_ENET_TXD);
- clrbits16(&io_port->iop_paodr, PA_ENET_TXD);
-
- /* Configure port C pins to enable CLSN and RENA.
- */
- clrbits16(&io_port->iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
- clrbits16(&io_port->iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
- setbits16(&io_port->iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
-
- /* Configure port A for TCLK and RCLK.
- */
- setbits16(&io_port->iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
- clrbits16(&io_port->iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
- clrbits32(&cp->cp_pbpar, PB_ENET_TENA);
- clrbits32(&cp->cp_pbdir, PB_ENET_TENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- clrbits32(&cp->cp_sicr, SICR_ENET_MASK);
- setbits32(&cp->cp_sicr, SICR_ENET_CLKRT);
-
- /* In the original SCC enet driver the following code is placed at
- the end of the initialization */
- setbits32(&cp->cp_pbpar, PB_ENET_TENA);
- setbits32(&cp->cp_pbdir, PB_ENET_TENA);
-
- clrbits32(bcsr_io+1, BCSR1_ETHEN);
+ clrbits32(bcsr_io, BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN);
iounmap(bcsr_io);
- immr_unmap(cp);
- immr_unmap(io_port);
}
-void init_scc_ioports(struct fs_platform_info *fpi)
-{
- int scc_no = fs_get_scc_index(fpi->fs_no);
-
- switch (scc_no) {
- case 0:
- init_scc1_ioports(fpi);
- break;
- default:
- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
- return;
- }
-}
-
-
-
-static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
+static int __init mpc86xads_probe(void)
{
- unsigned *bcsr_io;
- cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
-
- setbits32(&cp->cp_pbpar, 0x000000c0);
- clrbits32(&cp->cp_pbdir, 0x000000c0);
- clrbits16(&cp->cp_pbodr, 0x00c0);
- immr_unmap(cp);
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
- clrbits32(bcsr_io,BCSR1_RS232EN_1);
- iounmap(bcsr_io);
+ unsigned long root = of_get_flat_dt_root();
+ return of_flat_dt_is_compatible(root, "fsl,mpc866ads");
}
-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
-{
- unsigned *bcsr_io;
- cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
-
- setbits32(&cp->cp_pbpar, 0x00000c00);
- clrbits32(&cp->cp_pbdir, 0x00000c00);
- clrbits16(&cp->cp_pbodr, 0x0c00);
- immr_unmap(cp);
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
- iounmap(bcsr_io);
-}
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc", },
+ { .name = "cpm", },
+ { .name = "localbus", },
+ {},
+};
-void init_smc_ioports(struct fs_uart_platform_info *data)
+static int __init declare_of_platform_devices(void)
{
- int smc_no = fs_uart_id_fsid2smc(data->fs_no);
-
- switch (smc_no) {
- case 0:
- init_smc1_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- case 1:
- init_smc2_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- default:
- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
- return;
- }
-}
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
-int platform_device_skip(const char *model, int id)
-{
return 0;
}
-
-static void __init mpc86xads_setup_arch(void)
-{
- cpm_reset();
-
- mpc86xads_board_setup();
-
- ROOT_DEV = Root_NFS;
-}
-
-static int __init mpc86xads_probe(void)
-{
- char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
- "model", NULL);
- if (model == NULL)
- return 0;
- if (strcmp(model, "MPC866ADS"))
- return 0;
-
- return 1;
-}
+machine_device_initcall(mpc86x_ads, declare_of_platform_devices);
define_machine(mpc86x_ads) {
.name = "MPC86x ADS",
.probe = mpc86xads_probe,
.setup_arch = mpc86xads_setup_arch,
- .init_IRQ = m8xx_pic_init,
+ .init_IRQ = mpc8xx_pics_init,
.get_irq = mpc8xx_get_irq,
.restart = mpc8xx_restart,
.calibrate_decr = mpc8xx_calibrate_decr,
.set_rtc_time = mpc8xx_set_rtc_time,
.get_rtc_time = mpc8xx_get_rtc_time,
+ .progress = udbg_progress,
};
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index 2cf1b6a7517..6e7ded0233f 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -36,11 +36,12 @@
#include <asm/time.h>
#include <asm/mpc8xx.h>
#include <asm/8xx_immap.h>
-#include <asm/commproc.h>
+#include <asm/cpm1.h>
#include <asm/fs_pd.h>
#include <asm/udbg.h>
-#include <sysdev/commproc.h>
+#include "mpc885ads.h"
+#include "mpc8xx.h"
static u32 __iomem *bcsr, *bcsr5;
@@ -264,18 +265,17 @@ static struct of_device_id __initdata of_bus_ids[] = {
static int __init declare_of_platform_devices(void)
{
/* Publish the QE devices */
- if (machine_is(mpc885_ads))
- of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
return 0;
}
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(mpc885_ads, declare_of_platform_devices);
define_machine(mpc885_ads) {
.name = "Freescale MPC885 ADS",
.probe = mpc885ads_probe,
.setup_arch = mpc885ads_setup_arch,
- .init_IRQ = m8xx_pic_init,
+ .init_IRQ = mpc8xx_pics_init,
.get_irq = mpc8xx_get_irq,
.restart = mpc8xx_restart,
.calibrate_decr = mpc8xx_calibrate_decr,
diff --git a/arch/powerpc/platforms/8xx/mpc8xx.h b/arch/powerpc/platforms/8xx/mpc8xx.h
new file mode 100644
index 00000000000..239a243a616
--- /dev/null
+++ b/arch/powerpc/platforms/8xx/mpc8xx.h
@@ -0,0 +1,21 @@
+/*
+ * Prototypes, etc. for the Freescale MPC8xx embedded cpu chips
+ * May need to be cleaned as the port goes on ...
+ *
+ * Copyright (C) 2008 Jochen Friedrich <jochen@scram.de>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#ifndef __MPC8xx_H
+#define __MPC8xx_H
+
+extern void mpc8xx_restart(char *cmd);
+extern void mpc8xx_calibrate_decr(void);
+extern int mpc8xx_set_rtc_time(struct rtc_time *tm);
+extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
+extern void mpc8xx_pics_init(void);
+extern unsigned int mpc8xx_get_irq(void);
+
+#endif /* __MPC8xx_H */
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index ea22cad2cd0..fdce10c4f07 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -21,7 +21,8 @@ config PPC_83xx
bool "Freescale 83xx"
depends on 6xx
select FSL_SOC
- select 83xx
+ select MPC83xx
+ select IPIC
select WANT_DEVICE_TREE
config PPC_86xx
@@ -80,6 +81,10 @@ config XICS
bool
default y
+config IPIC
+ bool
+ default n
+
config MPIC
bool
default n
@@ -265,6 +270,7 @@ config TAU_AVERAGE
config QUICC_ENGINE
bool
select PPC_LIB_RHEAP
+ select CRC32
help
The QUICC Engine (QE) is a new generation of communications
coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
@@ -272,8 +278,8 @@ config QUICC_ENGINE
for a machine with a QE coprocessor.
config CPM2
- bool
- default n
+ bool "Enable support for the CPM2 (Communications Processor Module)"
+ depends on MPC85xx || 8260
select CPM
select PPC_LIB_RHEAP
help
@@ -315,6 +321,12 @@ config FSL_ULI1575
config CPM
bool
+config OF_RTC
+ bool
+ help
+ Uses information from the OF or flattened device tree to instatiate
+ platform devices for direct mapped RTC chips like the DS1742 or DS1743.
+
source "arch/powerpc/sysdev/bestcomm/Kconfig"
endmenu
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 99684ea606a..7fc41104d53 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -29,8 +29,8 @@ config PPC_85xx
bool "Freescale 85xx"
select E500
select FSL_SOC
- select 85xx
select WANT_DEVICE_TREE
+ select MPC85xx
config PPC_8xx
bool "Freescale 8xx"
@@ -43,6 +43,7 @@ config 40x
bool "AMCC 40x"
select PPC_DCR_NATIVE
select WANT_DEVICE_TREE
+ select PPC_UDBG_16550
config 44x
bool "AMCC 44x"
@@ -92,14 +93,6 @@ config 6xx
config 8xx
bool
-# this is temp to handle compat with arch=ppc
-config 83xx
- bool
-
-# this is temp to handle compat with arch=ppc
-config 85xx
- bool
-
config E500
bool
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 39d695cb969..c89964c6fb1 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -20,7 +20,7 @@ spu-manage-$(CONFIG_PPC_CELL_NATIVE) += spu_manage.o
obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
spu_notify.o \
- spu_syscalls.o \
+ spu_syscalls.o spu_fault.o \
$(spu-priv1-y) \
$(spu-manage-y) \
spufs/
diff --git a/arch/powerpc/platforms/cell/cbe_cpufreq.c b/arch/powerpc/platforms/cell/cbe_cpufreq.c
index 13d5a87f13b..ec7c8f45a21 100644
--- a/arch/powerpc/platforms/cell/cbe_cpufreq.c
+++ b/arch/powerpc/platforms/cell/cbe_cpufreq.c
@@ -21,8 +21,9 @@
*/
#include <linux/cpufreq.h>
+#include <linux/of_platform.h>
+
#include <asm/machdep.h>
-#include <asm/of_platform.h>
#include <asm/prom.h>
#include <asm/cell-regs.h>
#include "cbe_cpufreq.h"
diff --git a/arch/powerpc/platforms/cell/cbe_cpufreq_pmi.c b/arch/powerpc/platforms/cell/cbe_cpufreq_pmi.c
index 6a2c1b0a9a9..69288f65314 100644
--- a/arch/powerpc/platforms/cell/cbe_cpufreq_pmi.c
+++ b/arch/powerpc/platforms/cell/cbe_cpufreq_pmi.c
@@ -23,7 +23,8 @@
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/timer.h>
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
+
#include <asm/processor.h>
#include <asm/prom.h>
#include <asm/pmi.h>
diff --git a/arch/powerpc/platforms/cell/cbe_regs.c b/arch/powerpc/platforms/cell/cbe_regs.c
index 16a9b07e7b0..dbc338f187a 100644
--- a/arch/powerpc/platforms/cell/cbe_regs.c
+++ b/arch/powerpc/platforms/cell/cbe_regs.c
@@ -9,13 +9,13 @@
#include <linux/percpu.h>
#include <linux/types.h>
#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/prom.h>
#include <asm/ptrace.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <asm/cell-regs.h>
/*
@@ -256,6 +256,7 @@ void __init cbe_regs_init(void)
printk(KERN_ERR "cbe_regs: More BE chips than supported"
"!\n");
cbe_regs_map_count--;
+ of_node_put(cpu);
return;
}
map->cpu_node = cpu;
diff --git a/arch/powerpc/platforms/cell/io-workarounds.c b/arch/powerpc/platforms/cell/io-workarounds.c
index 9d7c2ef940a..979d4b67efb 100644
--- a/arch/powerpc/platforms/cell/io-workarounds.c
+++ b/arch/powerpc/platforms/cell/io-workarounds.c
@@ -238,7 +238,7 @@ static void __init spider_pci_setup_chip(struct spider_pci_bus *bus)
static void __init spider_pci_add_one(struct pci_controller *phb)
{
struct spider_pci_bus *bus = &spider_pci_busses[spider_pci_count];
- struct device_node *np = phb->arch_data;
+ struct device_node *np = phb->dn;
struct resource rsrc;
void __iomem *regs;
@@ -309,15 +309,12 @@ static int __init spider_pci_workaround_init(void)
{
struct pci_controller *phb;
- if (!machine_is(cell))
- return 0;
-
/* Find spider bridges. We assume they have been all probed
* in setup_arch(). If that was to change, we would need to
* update this code to cope with dynamically added busses
*/
list_for_each_entry(phb, &hose_list, list_node) {
- struct device_node *np = phb->arch_data;
+ struct device_node *np = phb->dn;
const char *model = of_get_property(np, "model", NULL);
/* If no model property or name isn't exactly "pci", skip */
@@ -343,4 +340,4 @@ static int __init spider_pci_workaround_init(void)
return 0;
}
-arch_initcall(spider_pci_workaround_init);
+machine_arch_initcall(cell, spider_pci_workaround_init);
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index faabc3fdc13..df330666ccc 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -1,7 +1,7 @@
/*
* IOMMU implementation for Cell Broadband Processor Architecture
*
- * (C) Copyright IBM Corporation 2006
+ * (C) Copyright IBM Corporation 2006-2008
*
* Author: Jeremy Kerr <jk@ozlabs.org>
*
@@ -26,14 +26,15 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/notifier.h>
+#include <linux/of_platform.h>
#include <asm/prom.h>
#include <asm/iommu.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <asm/udbg.h>
-#include <asm/of_platform.h>
#include <asm/lmb.h>
+#include <asm/firmware.h>
#include <asm/cell-regs.h>
#include "interrupt.h"
@@ -305,29 +306,28 @@ static int cell_iommu_find_ioc(int nid, unsigned long *base)
return -ENODEV;
}
-static void cell_iommu_setup_hardware(struct cbe_iommu *iommu, unsigned long size)
+static void cell_iommu_setup_page_tables(struct cbe_iommu *iommu,
+ unsigned long dbase, unsigned long dsize,
+ unsigned long fbase, unsigned long fsize)
{
struct page *page;
- int ret, i;
- unsigned long reg, segments, pages_per_segment, ptab_size, n_pte_pages;
- unsigned long xlate_base;
- unsigned int virq;
-
- if (cell_iommu_find_ioc(iommu->nid, &xlate_base))
- panic("%s: missing IOC register mappings for node %d\n",
- __FUNCTION__, iommu->nid);
+ int i;
+ unsigned long reg, segments, pages_per_segment, ptab_size, stab_size,
+ n_pte_pages, base;
- iommu->xlate_regs = ioremap(xlate_base, IOC_Reg_Size);
- iommu->cmd_regs = iommu->xlate_regs + IOC_IOCmd_Offset;
+ base = dbase;
+ if (fsize != 0)
+ base = min(fbase, dbase);
- segments = size >> IO_SEGMENT_SHIFT;
+ segments = max(dbase + dsize, fbase + fsize) >> IO_SEGMENT_SHIFT;
pages_per_segment = 1ull << IO_PAGENO_BITS;
pr_debug("%s: iommu[%d]: segments: %lu, pages per segment: %lu\n",
__FUNCTION__, iommu->nid, segments, pages_per_segment);
/* set up the segment table */
- page = alloc_pages_node(iommu->nid, GFP_KERNEL, 0);
+ stab_size = segments * sizeof(unsigned long);
+ page = alloc_pages_node(iommu->nid, GFP_KERNEL, get_order(stab_size));
BUG_ON(!page);
iommu->stab = page_address(page);
clear_page(iommu->stab);
@@ -371,11 +371,25 @@ static void cell_iommu_setup_hardware(struct cbe_iommu *iommu, unsigned long siz
}
pr_debug("Setting up IOMMU stab:\n");
- for (i = 0; i * (1ul << IO_SEGMENT_SHIFT) < size; i++) {
+ for (i = base >> IO_SEGMENT_SHIFT; i < segments; i++) {
iommu->stab[i] = reg |
(__pa(iommu->ptab) + n_pte_pages * IOMMU_PAGE_SIZE * i);
pr_debug("\t[%d] 0x%016lx\n", i, iommu->stab[i]);
}
+}
+
+static void cell_iommu_enable_hardware(struct cbe_iommu *iommu)
+{
+ int ret;
+ unsigned long reg, xlate_base;
+ unsigned int virq;
+
+ if (cell_iommu_find_ioc(iommu->nid, &xlate_base))
+ panic("%s: missing IOC register mappings for node %d\n",
+ __FUNCTION__, iommu->nid);
+
+ iommu->xlate_regs = ioremap(xlate_base, IOC_Reg_Size);
+ iommu->cmd_regs = iommu->xlate_regs + IOC_IOCmd_Offset;
/* ensure that the STEs have updated */
mb();
@@ -405,6 +419,13 @@ static void cell_iommu_setup_hardware(struct cbe_iommu *iommu, unsigned long siz
out_be64(iommu->cmd_regs + IOC_IOCmd_Cfg, reg);
}
+static void cell_iommu_setup_hardware(struct cbe_iommu *iommu,
+ unsigned long base, unsigned long size)
+{
+ cell_iommu_setup_page_tables(iommu, base, size, 0, 0);
+ cell_iommu_enable_hardware(iommu);
+}
+
#if 0/* Unused for now */
static struct iommu_window *find_window(struct cbe_iommu *iommu,
unsigned long offset, unsigned long size)
@@ -422,25 +443,36 @@ static struct iommu_window *find_window(struct cbe_iommu *iommu,
}
#endif
+static inline u32 cell_iommu_get_ioid(struct device_node *np)
+{
+ const u32 *ioid;
+
+ ioid = of_get_property(np, "ioid", NULL);
+ if (ioid == NULL) {
+ printk(KERN_WARNING "iommu: missing ioid for %s using 0\n",
+ np->full_name);
+ return 0;
+ }
+
+ return *ioid;
+}
+
static struct iommu_window * __init
cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,
unsigned long offset, unsigned long size,
unsigned long pte_offset)
{
struct iommu_window *window;
- const unsigned int *ioid;
+ u32 ioid;
- ioid = of_get_property(np, "ioid", NULL);
- if (ioid == NULL)
- printk(KERN_WARNING "iommu: missing ioid for %s using 0\n",
- np->full_name);
+ ioid = cell_iommu_get_ioid(np);
window = kmalloc_node(sizeof(*window), GFP_KERNEL, iommu->nid);
BUG_ON(window == NULL);
window->offset = offset;
window->size = size;
- window->ioid = ioid ? *ioid : 0;
+ window->ioid = ioid;
window->iommu = iommu;
window->pte_offset = pte_offset;
@@ -489,16 +521,17 @@ static struct cbe_iommu *cell_iommu_for_node(int nid)
return NULL;
}
-static void cell_dma_dev_setup(struct device *dev)
+static unsigned long cell_dma_direct_offset;
+
+static unsigned long dma_iommu_fixed_base;
+struct dma_mapping_ops dma_iommu_fixed_ops;
+
+static void cell_dma_dev_setup_iommu(struct device *dev)
{
struct iommu_window *window;
struct cbe_iommu *iommu;
struct dev_archdata *archdata = &dev->archdata;
- /* If we run without iommu, no need to do anything */
- if (get_pci_dma_ops() == &dma_direct_ops)
- return;
-
/* Current implementation uses the first window available in that
* node's iommu. We -might- do something smarter later though it may
* never be necessary
@@ -515,6 +548,23 @@ static void cell_dma_dev_setup(struct device *dev)
archdata->dma_data = &window->table;
}
+static void cell_dma_dev_setup_static(struct device *dev);
+
+static void cell_dma_dev_setup(struct device *dev)
+{
+ struct dev_archdata *archdata = &dev->archdata;
+
+ /* Order is important here, these are not mutually exclusive */
+ if (get_dma_ops(dev) == &dma_iommu_fixed_ops)
+ cell_dma_dev_setup_static(dev);
+ else if (get_pci_dma_ops() == &dma_iommu_ops)
+ cell_dma_dev_setup_iommu(dev);
+ else if (get_pci_dma_ops() == &dma_direct_ops)
+ archdata->dma_data = (void *)cell_dma_direct_offset;
+ else
+ BUG();
+}
+
static void cell_pci_dma_dev_setup(struct pci_dev *dev)
{
cell_dma_dev_setup(&dev->dev);
@@ -560,10 +610,9 @@ static int __init cell_iommu_get_window(struct device_node *np,
return 0;
}
-static void __init cell_iommu_init_one(struct device_node *np, unsigned long offset)
+static struct cbe_iommu * __init cell_iommu_alloc(struct device_node *np)
{
struct cbe_iommu *iommu;
- unsigned long base, size;
int nid, i;
/* Get node ID */
@@ -571,7 +620,7 @@ static void __init cell_iommu_init_one(struct device_node *np, unsigned long off
if (nid < 0) {
printk(KERN_ERR "iommu: failed to get node for %s\n",
np->full_name);
- return;
+ return NULL;
}
pr_debug("iommu: setting up iommu for node %d (%s)\n",
nid, np->full_name);
@@ -587,7 +636,7 @@ static void __init cell_iommu_init_one(struct device_node *np, unsigned long off
if (cbe_nr_iommus >= NR_IOMMUS) {
printk(KERN_ERR "iommu: too many IOMMUs detected ! (%s)\n",
np->full_name);
- return;
+ return NULL;
}
/* Init base fields */
@@ -598,6 +647,19 @@ static void __init cell_iommu_init_one(struct device_node *np, unsigned long off
snprintf(iommu->name, sizeof(iommu->name), "iommu%d", i);
INIT_LIST_HEAD(&iommu->windows);
+ return iommu;
+}
+
+static void __init cell_iommu_init_one(struct device_node *np,
+ unsigned long offset)
+{
+ struct cbe_iommu *iommu;
+ unsigned long base, size;
+
+ iommu = cell_iommu_alloc(np);
+ if (!iommu)
+ return;
+
/* Obtain a window for it */
cell_iommu_get_window(np, &base, &size);
@@ -605,7 +667,7 @@ static void __init cell_iommu_init_one(struct device_node *np, unsigned long off
base, base + size - 1);
/* Initialize the hardware */
- cell_iommu_setup_hardware(iommu, size);
+ cell_iommu_setup_hardware(iommu, base, size);
/* Setup the iommu_table */
cell_iommu_setup_window(iommu, np, base, size,
@@ -653,7 +715,7 @@ static int __init cell_iommu_init_disabled(void)
/* If we have no Axon, we set up the spider DMA magic offset */
if (of_find_node_by_name(NULL, "axon") == NULL)
- dma_direct_offset = SPIDER_DMA_OFFSET;
+ cell_dma_direct_offset = SPIDER_DMA_OFFSET;
/* Now we need to check to see where the memory is mapped
* in PCI space. We assume that all busses use the same dma
@@ -687,20 +749,274 @@ static int __init cell_iommu_init_disabled(void)
return -ENODEV;
}
- dma_direct_offset += base;
+ cell_dma_direct_offset += base;
+
+ if (cell_dma_direct_offset != 0)
+ ppc_md.pci_dma_dev_setup = cell_pci_dma_dev_setup;
printk("iommu: disabled, direct DMA offset is 0x%lx\n",
- dma_direct_offset);
+ cell_dma_direct_offset);
return 0;
}
-static int __init cell_iommu_init(void)
+/*
+ * Fixed IOMMU mapping support
+ *
+ * This code adds support for setting up a fixed IOMMU mapping on certain
+ * cell machines. For 64-bit devices this avoids the performance overhead of
+ * mapping and unmapping pages at runtime. 32-bit devices are unable to use
+ * the fixed mapping.
+ *
+ * The fixed mapping is established at boot, and maps all of physical memory
+ * 1:1 into device space at some offset. On machines with < 30 GB of memory
+ * we setup the fixed mapping immediately above the normal IOMMU window.
+ *
+ * For example a machine with 4GB of memory would end up with the normal
+ * IOMMU window from 0-2GB and the fixed mapping window from 2GB to 6GB. In
+ * this case a 64-bit device wishing to DMA to 1GB would be told to DMA to
+ * 3GB, plus any offset required by firmware. The firmware offset is encoded
+ * in the "dma-ranges" property.
+ *
+ * On machines with 30GB or more of memory, we are unable to place the fixed
+ * mapping above the normal IOMMU window as we would run out of address space.
+ * Instead we move the normal IOMMU window to coincide with the hash page
+ * table, this region does not need to be part of the fixed mapping as no
+ * device should ever be DMA'ing to it. We then setup the fixed mapping
+ * from 0 to 32GB.
+ */
+
+static u64 cell_iommu_get_fixed_address(struct device *dev)
{
+ u64 cpu_addr, size, best_size, pci_addr = OF_BAD_ADDR;
+ struct device_node *tmp, *np;
+ const u32 *ranges = NULL;
+ int i, len, best;
+
+ np = dev->archdata.of_node;
+ of_node_get(np);
+ ranges = of_get_property(np, "dma-ranges", &len);
+ while (!ranges && np) {
+ tmp = of_get_parent(np);
+ of_node_put(np);
+ np = tmp;
+ ranges = of_get_property(np, "dma-ranges", &len);
+ }
+
+ if (!ranges) {
+ dev_dbg(dev, "iommu: no dma-ranges found\n");
+ goto out;
+ }
+
+ len /= sizeof(u32);
+
+ /* dma-ranges format:
+ * 1 cell: pci space
+ * 2 cells: pci address
+ * 2 cells: parent address
+ * 2 cells: size
+ */
+ for (i = 0, best = -1, best_size = 0; i < len; i += 7) {
+ cpu_addr = of_translate_dma_address(np, ranges +i + 3);
+ size = of_read_number(ranges + i + 5, 2);
+
+ if (cpu_addr == 0 && size > best_size) {
+ best = i;
+ best_size = size;
+ }
+ }
+
+ if (best >= 0)
+ pci_addr = of_read_number(ranges + best + 1, 2);
+ else
+ dev_dbg(dev, "iommu: no suitable range found!\n");
+
+out:
+ of_node_put(np);
+
+ return pci_addr;
+}
+
+static int dma_set_mask_and_switch(struct device *dev, u64 dma_mask)
+{
+ if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+ return -EIO;
+
+ if (dma_mask == DMA_BIT_MASK(64)) {
+ if (cell_iommu_get_fixed_address(dev) == OF_BAD_ADDR)
+ dev_dbg(dev, "iommu: 64-bit OK, but bad addr\n");
+ else {
+ dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n");
+ set_dma_ops(dev, &dma_iommu_fixed_ops);
+ cell_dma_dev_setup(dev);
+ }
+ } else {
+ dev_dbg(dev, "iommu: not 64-bit, using default ops\n");
+ set_dma_ops(dev, get_pci_dma_ops());
+ }
+
+ *dev->dma_mask = dma_mask;
+
+ return 0;
+}
+
+static void cell_dma_dev_setup_static(struct device *dev)
+{
+ struct dev_archdata *archdata = &dev->archdata;
+ u64 addr;
+
+ addr = cell_iommu_get_fixed_address(dev) + dma_iommu_fixed_base;
+ archdata->dma_data = (void *)addr;
+
+ dev_dbg(dev, "iommu: fixed addr = %lx\n", addr);
+}
+
+static void cell_iommu_setup_fixed_ptab(struct cbe_iommu *iommu,
+ struct device_node *np, unsigned long dbase, unsigned long dsize,
+ unsigned long fbase, unsigned long fsize)
+{
+ unsigned long base_pte, uaddr, *io_pte;
+ int i;
+
+ dma_iommu_fixed_base = fbase;
+
+ /* convert from bytes into page table indices */
+ dbase = dbase >> IOMMU_PAGE_SHIFT;
+ dsize = dsize >> IOMMU_PAGE_SHIFT;
+ fbase = fbase >> IOMMU_PAGE_SHIFT;
+ fsize = fsize >> IOMMU_PAGE_SHIFT;
+
+ pr_debug("iommu: mapping 0x%lx pages from 0x%lx\n", fsize, fbase);
+
+ io_pte = iommu->ptab;
+ base_pte = IOPTE_PP_W | IOPTE_PP_R | IOPTE_M | IOPTE_SO_RW
+ | (cell_iommu_get_ioid(np) & IOPTE_IOID_Mask);
+
+ uaddr = 0;
+ for (i = fbase; i < fbase + fsize; i++, uaddr += IOMMU_PAGE_SIZE) {
+ /* Don't touch the dynamic region */
+ if (i >= dbase && i < (dbase + dsize)) {
+ pr_debug("iommu: static/dynamic overlap, skipping\n");
+ continue;
+ }
+ io_pte[i] = base_pte | (__pa(uaddr) & IOPTE_RPN_Mask);
+ }
+
+ mb();
+}
+
+static int __init cell_iommu_fixed_mapping_init(void)
+{
+ unsigned long dbase, dsize, fbase, fsize, hbase, hend;
+ struct cbe_iommu *iommu;
struct device_node *np;
- if (!machine_is(cell))
- return -ENODEV;
+ /* The fixed mapping is only supported on axon machines */
+ np = of_find_node_by_name(NULL, "axon");
+ if (!np) {
+ pr_debug("iommu: fixed mapping disabled, no axons found\n");
+ return -1;
+ }
+
+ /* The default setup is to have the fixed mapping sit after the
+ * dynamic region, so find the top of the largest IOMMU window
+ * on any axon, then add the size of RAM and that's our max value.
+ * If that is > 32GB we have to do other shennanigans.
+ */
+ fbase = 0;
+ for_each_node_by_name(np, "axon") {
+ cell_iommu_get_window(np, &dbase, &dsize);
+ fbase = max(fbase, dbase + dsize);
+ }
+
+ fbase = _ALIGN_UP(fbase, 1 << IO_SEGMENT_SHIFT);
+ fsize = lmb_phys_mem_size();
+
+ if ((fbase + fsize) <= 0x800000000)
+ hbase = 0; /* use the device tree window */
+ else {
+ /* If we're over 32 GB we need to cheat. We can't map all of
+ * RAM with the fixed mapping, and also fit the dynamic
+ * region. So try to place the dynamic region where the hash
+ * table sits, drivers never need to DMA to it, we don't
+ * need a fixed mapping for that area.
+ */
+ if (!htab_address) {
+ pr_debug("iommu: htab is NULL, on LPAR? Huh?\n");
+ return -1;
+ }
+ hbase = __pa(htab_address);
+ hend = hbase + htab_size_bytes;
+
+ /* The window must start and end on a segment boundary */
+ if ((hbase != _ALIGN_UP(hbase, 1 << IO_SEGMENT_SHIFT)) ||
+ (hend != _ALIGN_UP(hend, 1 << IO_SEGMENT_SHIFT))) {
+ pr_debug("iommu: hash window not segment aligned\n");
+ return -1;
+ }
+
+ /* Check the hash window fits inside the real DMA window */
+ for_each_node_by_name(np, "axon") {
+ cell_iommu_get_window(np, &dbase, &dsize);
+
+ if (hbase < dbase || (hend > (dbase + dsize))) {
+ pr_debug("iommu: hash window doesn't fit in"
+ "real DMA window\n");
+ return -1;
+ }
+ }
+
+ fbase = 0;
+ }
+
+ /* Setup the dynamic regions */
+ for_each_node_by_name(np, "axon") {
+ iommu = cell_iommu_alloc(np);
+ BUG_ON(!iommu);
+
+ if (hbase == 0)
+ cell_iommu_get_window(np, &dbase, &dsize);
+ else {
+ dbase = hbase;
+ dsize = htab_size_bytes;
+ }
+
+ pr_debug("iommu: setting up %d, dynamic window %lx-%lx " \
+ "fixed window %lx-%lx\n", iommu->nid, dbase,
+ dbase + dsize, fbase, fbase + fsize);
+
+ cell_iommu_setup_page_tables(iommu, dbase, dsize, fbase, fsize);
+ cell_iommu_setup_fixed_ptab(iommu, np, dbase, dsize,
+ fbase, fsize);
+ cell_iommu_enable_hardware(iommu);
+ cell_iommu_setup_window(iommu, np, dbase, dsize, 0);
+ }
+
+ dma_iommu_fixed_ops = dma_direct_ops;
+ dma_iommu_fixed_ops.set_dma_mask = dma_set_mask_and_switch;
+
+ dma_iommu_ops.set_dma_mask = dma_set_mask_and_switch;
+ set_pci_dma_ops(&dma_iommu_ops);
+
+ printk(KERN_DEBUG "IOMMU fixed mapping established.\n");
+
+ return 0;
+}
+
+static int iommu_fixed_disabled;
+
+static int __init setup_iommu_fixed(char *str)
+{
+ if (strcmp(str, "off") == 0)
+ iommu_fixed_disabled = 1;
+
+ return 1;
+}
+__setup("iommu_fixed=", setup_iommu_fixed);
+
+static int __init cell_iommu_init(void)
+{
+ struct device_node *np;
/* If IOMMU is disabled or we have little enough RAM to not need
* to enable it, we setup a direct mapping.
@@ -717,6 +1033,9 @@ static int __init cell_iommu_init(void)
ppc_md.tce_build = tce_build_cell;
ppc_md.tce_free = tce_free_cell;
+ if (!iommu_fixed_disabled && cell_iommu_fixed_mapping_init() == 0)
+ goto bail;
+
/* Create an iommu for each /axon node. */
for_each_node_by_name(np, "axon") {
if (np->parent == NULL || np->parent->parent != NULL)
@@ -744,5 +1063,6 @@ static int __init cell_iommu_init(void)
return 0;
}
-arch_initcall(cell_iommu_init);
+machine_arch_initcall(cell, cell_iommu_init);
+machine_arch_initcall(celleb_native, cell_iommu_init);
diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c
index 1ed30367888..69ed0d7f164 100644
--- a/arch/powerpc/platforms/cell/pmu.c
+++ b/arch/powerpc/platforms/cell/pmu.c
@@ -213,7 +213,7 @@ u32 cbe_read_pm(u32 cpu, enum pm_reg_name reg)
break;
case pm_interval:
- READ_SHADOW_REG(val, pm_interval);
+ READ_MMIO_UPPER32(val, pm_interval);
break;
case pm_start_stop:
@@ -381,9 +381,6 @@ static int __init cbe_init_pm_irq(void)
unsigned int irq;
int rc, node;
- if (!machine_is(cell))
- return 0;
-
for_each_node(node) {
irq = irq_create_mapping(NULL, IIC_IRQ_IOEX_PMI |
(node << IIC_IRQ_NODE_SHIFT));
@@ -404,7 +401,7 @@ static int __init cbe_init_pm_irq(void)
return 0;
}
-arch_initcall(cbe_init_pm_irq);
+machine_arch_initcall(cell, cbe_init_pm_irq);
void cbe_sync_irq(int node)
{
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 98e7ef8e6fc..e6534b519c9 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -30,6 +30,7 @@
#include <linux/console.h>
#include <linux/mutex.h>
#include <linux/memory_hotplug.h>
+#include <linux/of_platform.h>
#include <asm/mmu.h>
#include <asm/processor.h>
@@ -51,7 +52,6 @@
#include <asm/spu_priv1.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
-#include <asm/of_platform.h>
#include <asm/cell-regs.h>
#include "interrupt.h"
@@ -85,9 +85,6 @@ static int __init cell_publish_devices(void)
{
int node;
- if (!machine_is(cell))
- return 0;
-
/* Publish OF platform devices for southbridge IOs */
of_platform_bus_probe(NULL, NULL, NULL);
@@ -101,7 +98,7 @@ static int __init cell_publish_devices(void)
}
return 0;
}
-device_initcall(cell_publish_devices);
+machine_device_initcall(cell, cell_publish_devices);
static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
{
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index e4438456c86..efb3964457b 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -42,6 +42,7 @@
#include <asm/firmware.h>
#include <asm/system.h>
#include <asm/rtas.h>
+#include <asm/cputhreads.h>
#include "interrupt.h"
#include <asm/udbg.h>
@@ -182,7 +183,7 @@ static int smp_cell_cpu_bootable(unsigned int nr)
*/
if (system_state < SYSTEM_RUNNING &&
cpu_has_feature(CPU_FTR_SMT) &&
- !smt_enabled_at_boot && nr % 2 != 0)
+ !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
return 0;
return 1;
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index a0886220364..e45cfa84911 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -34,6 +34,7 @@
#include <linux/linux_logo.h>
#include <asm/spu.h>
#include <asm/spu_priv1.h>
+#include <asm/spu_csa.h>
#include <asm/xmon.h>
#include <asm/prom.h>
@@ -47,6 +48,13 @@ struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
EXPORT_SYMBOL_GPL(cbe_spu_info);
/*
+ * The spufs fault-handling code needs to call force_sig_info to raise signals
+ * on DMA errors. Export it here to avoid general kernel-wide access to this
+ * function
+ */
+EXPORT_SYMBOL_GPL(force_sig_info);
+
+/*
* Protects cbe_spu_info and spu->number.
*/
static DEFINE_SPINLOCK(spu_lock);
@@ -66,6 +74,10 @@ static LIST_HEAD(spu_full_list);
static DEFINE_SPINLOCK(spu_full_list_lock);
static DEFINE_MUTEX(spu_full_list_mutex);
+struct spu_slb {
+ u64 esid, vsid;
+};
+
void spu_invalidate_slbs(struct spu *spu)
{
struct spu_priv2 __iomem *priv2 = spu->priv2;
@@ -114,40 +126,36 @@ void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
}
EXPORT_SYMBOL_GPL(spu_associate_mm);
-static int __spu_trap_invalid_dma(struct spu *spu)
+int spu_64k_pages_available(void)
{
- pr_debug("%s\n", __FUNCTION__);
- spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
- return 0;
+ return mmu_psize_defs[MMU_PAGE_64K].shift != 0;
}
+EXPORT_SYMBOL_GPL(spu_64k_pages_available);
-static int __spu_trap_dma_align(struct spu *spu)
+static void spu_restart_dma(struct spu *spu)
{
- pr_debug("%s\n", __FUNCTION__);
- spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
- return 0;
-}
+ struct spu_priv2 __iomem *priv2 = spu->priv2;
-static int __spu_trap_error(struct spu *spu)
-{
- pr_debug("%s\n", __FUNCTION__);
- spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
- return 0;
+ if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
+ out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
}
-static void spu_restart_dma(struct spu *spu)
+static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
{
struct spu_priv2 __iomem *priv2 = spu->priv2;
- if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
- out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
+ pr_debug("%s: adding SLB[%d] 0x%016lx 0x%016lx\n",
+ __func__, slbe, slb->vsid, slb->esid);
+
+ out_be64(&priv2->slb_index_W, slbe);
+ out_be64(&priv2->slb_vsid_RW, slb->vsid);
+ out_be64(&priv2->slb_esid_RW, slb->esid);
}
static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
{
- struct spu_priv2 __iomem *priv2 = spu->priv2;
struct mm_struct *mm = spu->mm;
- u64 esid, vsid, llp;
+ struct spu_slb slb;
int psize;
pr_debug("%s\n", __FUNCTION__);
@@ -159,7 +167,7 @@ static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
printk("%s: invalid access during switch!\n", __func__);
return 1;
}
- esid = (ea & ESID_MASK) | SLB_ESID_V;
+ slb.esid = (ea & ESID_MASK) | SLB_ESID_V;
switch(REGION_ID(ea)) {
case USER_REGION_ID:
@@ -168,21 +176,21 @@ static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
#else
psize = mm->context.user_psize;
#endif
- vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
- SLB_VSID_USER;
+ slb.vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M)
+ << SLB_VSID_SHIFT) | SLB_VSID_USER;
break;
case VMALLOC_REGION_ID:
if (ea < VMALLOC_END)
psize = mmu_vmalloc_psize;
else
psize = mmu_io_psize;
- vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
- SLB_VSID_KERNEL;
+ slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
+ << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
break;
case KERNEL_REGION_ID:
psize = mmu_linear_psize;
- vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
- SLB_VSID_KERNEL;
+ slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
+ << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
break;
default:
/* Future: support kernel segments so that drivers
@@ -191,11 +199,9 @@ static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
pr_debug("invalid region access at %016lx\n", ea);
return 1;
}
- llp = mmu_psize_defs[psize].sllp;
+ slb.vsid |= mmu_psize_defs[psize].sllp;
- out_be64(&priv2->slb_index_W, spu->slb_replace);
- out_be64(&priv2->slb_vsid_RW, vsid | llp);
- out_be64(&priv2->slb_esid_RW, esid);
+ spu_load_slb(spu, spu->slb_replace, &slb);
spu->slb_replace++;
if (spu->slb_replace >= 8)
@@ -225,13 +231,83 @@ static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
return 1;
}
+ spu->class_0_pending = 0;
spu->dar = ea;
spu->dsisr = dsisr;
- mb();
+
spu->stop_callback(spu);
+
+ return 0;
+}
+
+static void __spu_kernel_slb(void *addr, struct spu_slb *slb)
+{
+ unsigned long ea = (unsigned long)addr;
+ u64 llp;
+
+ if (REGION_ID(ea) == KERNEL_REGION_ID)
+ llp = mmu_psize_defs[mmu_linear_psize].sllp;
+ else
+ llp = mmu_psize_defs[mmu_virtual_psize].sllp;
+
+ slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
+ SLB_VSID_KERNEL | llp;
+ slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
+}
+
+/**
+ * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
+ * address @new_addr is present.
+ */
+static inline int __slb_present(struct spu_slb *slbs, int nr_slbs,
+ void *new_addr)
+{
+ unsigned long ea = (unsigned long)new_addr;
+ int i;
+
+ for (i = 0; i < nr_slbs; i++)
+ if (!((slbs[i].esid ^ ea) & ESID_MASK))
+ return 1;
+
return 0;
}
+/**
+ * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
+ * need to map both the context save area, and the save/restore code.
+ *
+ * Because the lscsa and code may cross segment boundaires, we check to see
+ * if mappings are required for the start and end of each range. We currently
+ * assume that the mappings are smaller that one segment - if not, something
+ * is seriously wrong.
+ */
+void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
+ void *code, int code_size)
+{
+ struct spu_slb slbs[4];
+ int i, nr_slbs = 0;
+ /* start and end addresses of both mappings */
+ void *addrs[] = {
+ lscsa, (void *)lscsa + sizeof(*lscsa) - 1,
+ code, code + code_size - 1
+ };
+
+ /* check the set of addresses, and create a new entry in the slbs array
+ * if there isn't already a SLB for that address */
+ for (i = 0; i < ARRAY_SIZE(addrs); i++) {
+ if (__slb_present(slbs, nr_slbs, addrs[i]))
+ continue;
+
+ __spu_kernel_slb(addrs[i], &slbs[nr_slbs]);
+ nr_slbs++;
+ }
+
+ /* Add the set of SLBs */
+ for (i = 0; i < nr_slbs; i++)
+ spu_load_slb(spu, i, &slbs[i]);
+}
+EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
+
static irqreturn_t
spu_irq_class_0(int irq, void *data)
{
@@ -240,12 +316,13 @@ spu_irq_class_0(int irq, void *data)
spu = data;
+ spin_lock(&spu->register_lock);
mask = spu_int_mask_get(spu, 0);
- stat = spu_int_stat_get(spu, 0);
- stat &= mask;
+ stat = spu_int_stat_get(spu, 0) & mask;
- spin_lock(&spu->register_lock);
spu->class_0_pending |= stat;
+ spu->dsisr = spu_mfc_dsisr_get(spu);
+ spu->dar = spu_mfc_dar_get(spu);
spin_unlock(&spu->register_lock);
spu->stop_callback(spu);
@@ -255,31 +332,6 @@ spu_irq_class_0(int irq, void *data)
return IRQ_HANDLED;
}
-int
-spu_irq_class_0_bottom(struct spu *spu)
-{
- unsigned long flags;
- unsigned long stat;
-
- spin_lock_irqsave(&spu->register_lock, flags);
- stat = spu->class_0_pending;
- spu->class_0_pending = 0;
-
- if (stat & 1) /* invalid DMA alignment */
- __spu_trap_dma_align(spu);
-
- if (stat & 2) /* invalid MFC DMA */
- __spu_trap_invalid_dma(spu);
-
- if (stat & 4) /* error on SPU */
- __spu_trap_error(spu);
-
- spin_unlock_irqrestore(&spu->register_lock, flags);
-
- return (stat & 0x7) ? -EIO : 0;
-}
-EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
-
static irqreturn_t
spu_irq_class_1(int irq, void *data)
{
@@ -294,24 +346,23 @@ spu_irq_class_1(int irq, void *data)
stat = spu_int_stat_get(spu, 1) & mask;
dar = spu_mfc_dar_get(spu);
dsisr = spu_mfc_dsisr_get(spu);
- if (stat & 2) /* mapping fault */
+ if (stat & CLASS1_STORAGE_FAULT_INTR)
spu_mfc_dsisr_set(spu, 0ul);
spu_int_stat_clear(spu, 1, stat);
spin_unlock(&spu->register_lock);
pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
dar, dsisr);
- if (stat & 1) /* segment fault */
+ if (stat & CLASS1_SEGMENT_FAULT_INTR)
__spu_trap_data_seg(spu, dar);
- if (stat & 2) { /* mapping fault */
+ if (stat & CLASS1_STORAGE_FAULT_INTR)
__spu_trap_data_map(spu, dar, dsisr);
- }
- if (stat & 4) /* ls compare & suspend on get */
+ if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR)
;
- if (stat & 8) /* ls compare & suspend on put */
+ if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
;
return stat ? IRQ_HANDLED : IRQ_NONE;
@@ -323,6 +374,8 @@ spu_irq_class_2(int irq, void *data)
struct spu *spu;
unsigned long stat;
unsigned long mask;
+ const int mailbox_intrs =
+ CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR;
spu = data;
spin_lock(&spu->register_lock);
@@ -330,31 +383,30 @@ spu_irq_class_2(int irq, void *data)
mask = spu_int_mask_get(spu, 2);
/* ignore interrupts we're not waiting for */
stat &= mask;
- /*
- * mailbox interrupts (0x1 and 0x10) are level triggered.
- * mask them now before acknowledging.
- */
- if (stat & 0x11)
- spu_int_mask_and(spu, 2, ~(stat & 0x11));
+
+ /* mailbox interrupts are level triggered. mask them now before
+ * acknowledging */
+ if (stat & mailbox_intrs)
+ spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs));
/* acknowledge all interrupts before the callbacks */
spu_int_stat_clear(spu, 2, stat);
spin_unlock(&spu->register_lock);
pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
- if (stat & 1) /* PPC core mailbox */
+ if (stat & CLASS2_MAILBOX_INTR)
spu->ibox_callback(spu);
- if (stat & 2) /* SPU stop-and-signal */
+ if (stat & CLASS2_SPU_STOP_INTR)
spu->stop_callback(spu);
- if (stat & 4) /* SPU halted */
+ if (stat & CLASS2_SPU_HALT_INTR)
spu->stop_callback(spu);
- if (stat & 8) /* DMA tag group complete */
+ if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
spu->mfc_callback(spu);
- if (stat & 0x10) /* SPU mailbox threshold */
+ if (stat & CLASS2_MAILBOX_THRESHOLD_INTR)
spu->wbox_callback(spu);
spu->stats.class2_intr++;
@@ -479,13 +531,27 @@ EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
int spu_add_sysdev_attr_group(struct attribute_group *attrs)
{
struct spu *spu;
+ int rc = 0;
mutex_lock(&spu_full_list_mutex);
- list_for_each_entry(spu, &spu_full_list, full_list)
- sysfs_create_group(&spu->sysdev.kobj, attrs);
+ list_for_each_entry(spu, &spu_full_list, full_list) {
+ rc = sysfs_create_group(&spu->sysdev.kobj, attrs);
+
+ /* we're in trouble here, but try unwinding anyway */
+ if (rc) {
+ printk(KERN_ERR "%s: can't create sysfs group '%s'\n",
+ __func__, attrs->name);
+
+ list_for_each_entry_continue_reverse(spu,
+ &spu_full_list, full_list)
+ sysfs_remove_group(&spu->sysdev.kobj, attrs);
+ break;
+ }
+ }
+
mutex_unlock(&spu_full_list_mutex);
- return 0;
+ return rc;
}
EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
diff --git a/arch/powerpc/platforms/cell/spu_fault.c b/arch/powerpc/platforms/cell/spu_fault.c
new file mode 100644
index 00000000000..c8b1cd42905
--- /dev/null
+++ b/arch/powerpc/platforms/cell/spu_fault.c
@@ -0,0 +1,98 @@
+/*
+ * SPU mm fault handler
+ *
+ * (C) Copyright IBM Deutschland Entwicklung GmbH 2007
+ *
+ * Author: Arnd Bergmann <arndb@de.ibm.com>
+ * Author: Jeremy Kerr <jk@ozlabs.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/sched.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+
+#include <asm/spu.h>
+#include <asm/spu_csa.h>
+
+/*
+ * This ought to be kept in sync with the powerpc specific do_page_fault
+ * function. Currently, there are a few corner cases that we haven't had
+ * to handle fortunately.
+ */
+int spu_handle_mm_fault(struct mm_struct *mm, unsigned long ea,
+ unsigned long dsisr, unsigned *flt)
+{
+ struct vm_area_struct *vma;
+ unsigned long is_write;
+ int ret;
+
+#if 0
+ if (!IS_VALID_EA(ea)) {
+ return -EFAULT;
+ }
+#endif /* XXX */
+ if (mm == NULL) {
+ return -EFAULT;
+ }
+ if (mm->pgd == NULL) {
+ return -EFAULT;
+ }
+
+ down_read(&mm->mmap_sem);
+ vma = find_vma(mm, ea);
+ if (!vma)
+ goto bad_area;
+ if (vma->vm_start <= ea)
+ goto good_area;
+ if (!(vma->vm_flags & VM_GROWSDOWN))
+ goto bad_area;
+ if (expand_stack(vma, ea))
+ goto bad_area;
+good_area:
+ is_write = dsisr & MFC_DSISR_ACCESS_PUT;
+ if (is_write) {
+ if (!(vma->vm_flags & VM_WRITE))
+ goto bad_area;
+ } else {
+ if (dsisr & MFC_DSISR_ACCESS_DENIED)
+ goto bad_area;
+ if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
+ goto bad_area;
+ }
+ ret = 0;
+ *flt = handle_mm_fault(mm, vma, ea, is_write);
+ if (unlikely(*flt & VM_FAULT_ERROR)) {
+ if (*flt & VM_FAULT_OOM) {
+ ret = -ENOMEM;
+ goto bad_area;
+ } else if (*flt & VM_FAULT_SIGBUS) {
+ ret = -EFAULT;
+ goto bad_area;
+ }
+ BUG();
+ }
+ if (*flt & VM_FAULT_MAJOR)
+ current->maj_flt++;
+ else
+ current->min_flt++;
+ up_read(&mm->mmap_sem);
+ return ret;
+
+bad_area:
+ up_read(&mm->mmap_sem);
+ return -EFAULT;
+}
+EXPORT_SYMBOL_GPL(spu_handle_mm_fault);
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c
index 1b010707488..d351bdebf5f 100644
--- a/arch/powerpc/platforms/cell/spu_manage.c
+++ b/arch/powerpc/platforms/cell/spu_manage.c
@@ -35,6 +35,7 @@
#include <asm/firmware.h>
#include <asm/prom.h>
+#include "spufs/spufs.h"
#include "interrupt.h"
struct device_node *spu_devnode(struct spu *spu)
@@ -345,7 +346,7 @@ static int __init of_create_spu(struct spu *spu, void *data)
}
ret = spu_map_interrupts_old(spu, spe);
if (ret) {
- printk(KERN_ERR "%s: could not map interrupts",
+ printk(KERN_ERR "%s: could not map interrupts\n",
spu->name);
goto out_unmap;
}
@@ -369,6 +370,16 @@ static int of_destroy_spu(struct spu *spu)
return 0;
}
+static void enable_spu_by_master_run(struct spu_context *ctx)
+{
+ ctx->ops->master_start(ctx);
+}
+
+static void disable_spu_by_master_run(struct spu_context *ctx)
+{
+ ctx->ops->master_stop(ctx);
+}
+
/* Hardcoded affinity idxs for qs20 */
#define QS20_SPES_PER_BE 8
static int qs20_reg_idxs[QS20_SPES_PER_BE] = { 0, 2, 4, 6, 7, 5, 3, 1 };
@@ -411,10 +422,15 @@ static void init_affinity_qs20_harcoded(void)
static int of_has_vicinity(void)
{
- struct spu* spu;
+ struct device_node *dn;
- spu = list_first_entry(&cbe_spu_info[0].spus, struct spu, cbe_list);
- return of_find_property(spu_devnode(spu), "vicinity", NULL) != NULL;
+ for_each_node_by_type(dn, "spe") {
+ if (of_find_property(dn, "vicinity", NULL)) {
+ of_node_put(dn);
+ return 1;
+ }
+ }
+ return 0;
}
static struct spu *devnode_spu(int cbe, struct device_node *dn)
@@ -525,7 +541,7 @@ static int __init init_affinity(void)
if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
init_affinity_qs20_harcoded();
else
- printk("No affinity configuration found");
+ printk("No affinity configuration found\n");
}
return 0;
@@ -535,5 +551,7 @@ const struct spu_management_ops spu_management_of_ops = {
.enumerate_spus = of_enumerate_spus,
.create_spu = of_create_spu,
.destroy_spu = of_destroy_spu,
+ .enable_spu = enable_spu_by_master_run,
+ .disable_spu = disable_spu_by_master_run,
.init_affinity = init_affinity,
};
diff --git a/arch/powerpc/platforms/cell/spufs/Makefile b/arch/powerpc/platforms/cell/spufs/Makefile
index 328afcf8950..d3a349fb42e 100644
--- a/arch/powerpc/platforms/cell/spufs/Makefile
+++ b/arch/powerpc/platforms/cell/spufs/Makefile
@@ -1,8 +1,8 @@
-obj-y += switch.o fault.o lscsa_alloc.o
obj-$(CONFIG_SPU_FS) += spufs.o
spufs-y += inode.o file.o context.o syscalls.o coredump.o
spufs-y += sched.o backing_ops.o hw_ops.o run.o gang.o
+spufs-y += switch.o fault.o lscsa_alloc.o
# Rules to build switch.o with the help of SPU tool chain
SPU_CROSS := spu-
diff --git a/arch/powerpc/platforms/cell/spufs/backing_ops.c b/arch/powerpc/platforms/cell/spufs/backing_ops.c
index ec01214e51e..50d98a154aa 100644
--- a/arch/powerpc/platforms/cell/spufs/backing_ops.c
+++ b/arch/powerpc/platforms/cell/spufs/backing_ops.c
@@ -106,16 +106,20 @@ static unsigned int spu_backing_mbox_stat_poll(struct spu_context *ctx,
if (stat & 0xff0000)
ret |= POLLIN | POLLRDNORM;
else {
- ctx->csa.priv1.int_stat_class0_RW &= ~0x1;
- ctx->csa.priv1.int_mask_class2_RW |= 0x1;
+ ctx->csa.priv1.int_stat_class2_RW &=
+ ~CLASS2_MAILBOX_INTR;
+ ctx->csa.priv1.int_mask_class2_RW |=
+ CLASS2_ENABLE_MAILBOX_INTR;
}
}
if (events & (POLLOUT | POLLWRNORM)) {
if (stat & 0x00ff00)
ret = POLLOUT | POLLWRNORM;
else {
- ctx->csa.priv1.int_stat_class0_RW &= ~0x10;
- ctx->csa.priv1.int_mask_class2_RW |= 0x10;
+ ctx->csa.priv1.int_stat_class2_RW &=
+ ~CLASS2_MAILBOX_THRESHOLD_INTR;
+ ctx->csa.priv1.int_mask_class2_RW |=
+ CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR;
}
}
spin_unlock_irq(&ctx->csa.register_lock);
@@ -139,7 +143,7 @@ static int spu_backing_ibox_read(struct spu_context *ctx, u32 * data)
ret = 4;
} else {
/* make sure we get woken up by the interrupt */
- ctx->csa.priv1.int_mask_class2_RW |= 0x1UL;
+ ctx->csa.priv1.int_mask_class2_RW |= CLASS2_ENABLE_MAILBOX_INTR;
ret = 0;
}
spin_unlock(&ctx->csa.register_lock);
@@ -169,7 +173,8 @@ static int spu_backing_wbox_write(struct spu_context *ctx, u32 data)
} else {
/* make sure we get woken up by the interrupt when space
becomes available */
- ctx->csa.priv1.int_mask_class2_RW |= 0x10;
+ ctx->csa.priv1.int_mask_class2_RW |=
+ CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR;
ret = 0;
}
spin_unlock(&ctx->csa.register_lock);
@@ -268,6 +273,11 @@ static char *spu_backing_get_ls(struct spu_context *ctx)
return ctx->csa.lscsa->ls;
}
+static void spu_backing_privcntl_write(struct spu_context *ctx, u64 val)
+{
+ ctx->csa.priv2.spu_privcntl_RW = val;
+}
+
static u32 spu_backing_runcntl_read(struct spu_context *ctx)
{
return ctx->csa.prob.spu_runcntl_RW;
@@ -285,6 +295,11 @@ static void spu_backing_runcntl_write(struct spu_context *ctx, u32 val)
spin_unlock(&ctx->csa.register_lock);
}
+static void spu_backing_runcntl_stop(struct spu_context *ctx)
+{
+ spu_backing_runcntl_write(ctx, SPU_RUNCNTL_STOP);
+}
+
static void spu_backing_master_start(struct spu_context *ctx)
{
struct spu_state *csa = &ctx->csa;
@@ -358,7 +373,7 @@ static int spu_backing_send_mfc_command(struct spu_context *ctx,
static void spu_backing_restart_dma(struct spu_context *ctx)
{
- /* nothing to do here */
+ ctx->csa.priv2.mfc_control_RW |= MFC_CNTL_RESTART_DMA_COMMAND;
}
struct spu_context_ops spu_backing_ops = {
@@ -379,8 +394,10 @@ struct spu_context_ops spu_backing_ops = {
.npc_write = spu_backing_npc_write,
.status_read = spu_backing_status_read,
.get_ls = spu_backing_get_ls,
+ .privcntl_write = spu_backing_privcntl_write,
.runcntl_read = spu_backing_runcntl_read,
.runcntl_write = spu_backing_runcntl_write,
+ .runcntl_stop = spu_backing_runcntl_stop,
.master_start = spu_backing_master_start,
.master_stop = spu_backing_master_stop,
.set_mfc_query = spu_backing_set_mfc_query,
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c
index adf0a030d6f..133995ed5cc 100644
--- a/arch/powerpc/platforms/cell/spufs/context.c
+++ b/arch/powerpc/platforms/cell/spufs/context.c
@@ -52,6 +52,7 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang)
init_waitqueue_head(&ctx->wbox_wq);
init_waitqueue_head(&ctx->stop_wq);
init_waitqueue_head(&ctx->mfc_wq);
+ init_waitqueue_head(&ctx->run_wq);
ctx->state = SPU_STATE_SAVED;
ctx->ops = &spu_backing_ops;
ctx->owner = get_task_mm(current);
@@ -105,7 +106,17 @@ int put_spu_context(struct spu_context *ctx)
void spu_forget(struct spu_context *ctx)
{
struct mm_struct *mm;
- spu_acquire_saved(ctx);
+
+ /*
+ * This is basically an open-coded spu_acquire_saved, except that
+ * we don't acquire the state mutex interruptible.
+ */
+ mutex_lock(&ctx->state_mutex);
+ if (ctx->state != SPU_STATE_SAVED) {
+ set_bit(SPU_SCHED_WAS_ACTIVE, &ctx->sched_flags);
+ spu_deactivate(ctx);
+ }
+
mm = ctx->owner;
ctx->owner = NULL;
mmput(mm);
@@ -133,47 +144,23 @@ void spu_unmap_mappings(struct spu_context *ctx)
}
/**
- * spu_acquire_runnable - lock spu contex and make sure it is in runnable state
+ * spu_acquire_saved - lock spu contex and make sure it is in saved state
* @ctx: spu contex to lock
- *
- * Note:
- * Returns 0 and with the context locked on success
- * Returns negative error and with the context _unlocked_ on failure.
*/
-int spu_acquire_runnable(struct spu_context *ctx, unsigned long flags)
+int spu_acquire_saved(struct spu_context *ctx)
{
- int ret = -EINVAL;
-
- spu_acquire(ctx);
- if (ctx->state == SPU_STATE_SAVED) {
- /*
- * Context is about to be freed, so we can't acquire it anymore.
- */
- if (!ctx->owner)
- goto out_unlock;
- ret = spu_activate(ctx, flags);
- if (ret)
- goto out_unlock;
- }
+ int ret;
- return 0;
-
- out_unlock:
- spu_release(ctx);
- return ret;
-}
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
-/**
- * spu_acquire_saved - lock spu contex and make sure it is in saved state
- * @ctx: spu contex to lock
- */
-void spu_acquire_saved(struct spu_context *ctx)
-{
- spu_acquire(ctx);
if (ctx->state != SPU_STATE_SAVED) {
set_bit(SPU_SCHED_WAS_ACTIVE, &ctx->sched_flags);
spu_deactivate(ctx);
}
+
+ return 0;
}
/**
diff --git a/arch/powerpc/platforms/cell/spufs/coredump.c b/arch/powerpc/platforms/cell/spufs/coredump.c
index 80f62363e1c..0c6a96b82b2 100644
--- a/arch/powerpc/platforms/cell/spufs/coredump.c
+++ b/arch/powerpc/platforms/cell/spufs/coredump.c
@@ -148,7 +148,9 @@ int spufs_coredump_extra_notes_size(void)
fd = 0;
while ((ctx = coredump_next_context(&fd)) != NULL) {
- spu_acquire_saved(ctx);
+ rc = spu_acquire_saved(ctx);
+ if (rc)
+ break;
rc = spufs_ctx_note_size(ctx, fd);
spu_release_saved(ctx);
if (rc < 0)
@@ -224,7 +226,9 @@ int spufs_coredump_extra_notes_write(struct file *file, loff_t *foffset)
fd = 0;
while ((ctx = coredump_next_context(&fd)) != NULL) {
- spu_acquire_saved(ctx);
+ rc = spu_acquire_saved(ctx);
+ if (rc)
+ return rc;
for (j = 0; spufs_coredump_read[j].name != NULL; j++) {
rc = spufs_arch_write_note(ctx, j, file, fd, foffset);
diff --git a/arch/powerpc/platforms/cell/spufs/fault.c b/arch/powerpc/platforms/cell/spufs/fault.c
index 917eab4be48..eff4d291ba8 100644
--- a/arch/powerpc/platforms/cell/spufs/fault.c
+++ b/arch/powerpc/platforms/cell/spufs/fault.c
@@ -28,117 +28,71 @@
#include "spufs.h"
-/*
- * This ought to be kept in sync with the powerpc specific do_page_fault
- * function. Currently, there are a few corner cases that we haven't had
- * to handle fortunately.
+/**
+ * Handle an SPE event, depending on context SPU_CREATE_EVENTS_ENABLED flag.
+ *
+ * If the context was created with events, we just set the return event.
+ * Otherwise, send an appropriate signal to the process.
*/
-static int spu_handle_mm_fault(struct mm_struct *mm, unsigned long ea,
- unsigned long dsisr, unsigned *flt)
+static void spufs_handle_event(struct spu_context *ctx,
+ unsigned long ea, int type)
{
- struct vm_area_struct *vma;
- unsigned long is_write;
- int ret;
+ siginfo_t info;
-#if 0
- if (!IS_VALID_EA(ea)) {
- return -EFAULT;
- }
-#endif /* XXX */
- if (mm == NULL) {
- return -EFAULT;
- }
- if (mm->pgd == NULL) {
- return -EFAULT;
+ if (ctx->flags & SPU_CREATE_EVENTS_ENABLED) {
+ ctx->event_return |= type;
+ wake_up_all(&ctx->stop_wq);
+ return;
}
- down_read(&mm->mmap_sem);
- vma = find_vma(mm, ea);
- if (!vma)
- goto bad_area;
- if (vma->vm_start <= ea)
- goto good_area;
- if (!(vma->vm_flags & VM_GROWSDOWN))
- goto bad_area;
- if (expand_stack(vma, ea))
- goto bad_area;
-good_area:
- is_write = dsisr & MFC_DSISR_ACCESS_PUT;
- if (is_write) {
- if (!(vma->vm_flags & VM_WRITE))
- goto bad_area;
- } else {
- if (dsisr & MFC_DSISR_ACCESS_DENIED)
- goto bad_area;
- if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
- goto bad_area;
+ memset(&info, 0, sizeof(info));
+
+ switch (type) {
+ case SPE_EVENT_INVALID_DMA:
+ info.si_signo = SIGBUS;
+ info.si_code = BUS_OBJERR;
+ break;
+ case SPE_EVENT_SPE_DATA_STORAGE:
+ info.si_signo = SIGSEGV;
+ info.si_addr = (void __user *)ea;
+ info.si_code = SEGV_ACCERR;
+ ctx->ops->restart_dma(ctx);
+ break;
+ case SPE_EVENT_DMA_ALIGNMENT:
+ info.si_signo = SIGBUS;
+ /* DAR isn't set for an alignment fault :( */
+ info.si_code = BUS_ADRALN;
+ break;
+ case SPE_EVENT_SPE_ERROR:
+ info.si_signo = SIGILL;
+ info.si_addr = (void __user *)(unsigned long)
+ ctx->ops->npc_read(ctx) - 4;
+ info.si_code = ILL_ILLOPC;
+ break;
}
- ret = 0;
- *flt = handle_mm_fault(mm, vma, ea, is_write);
- if (unlikely(*flt & VM_FAULT_ERROR)) {
- if (*flt & VM_FAULT_OOM) {
- ret = -ENOMEM;
- goto bad_area;
- } else if (*flt & VM_FAULT_SIGBUS) {
- ret = -EFAULT;
- goto bad_area;
- }
- BUG();
- }
- if (*flt & VM_FAULT_MAJOR)
- current->maj_flt++;
- else
- current->min_flt++;
- up_read(&mm->mmap_sem);
- return ret;
-bad_area:
- up_read(&mm->mmap_sem);
- return -EFAULT;
+ if (info.si_signo)
+ force_sig_info(info.si_signo, &info, current);
}
-static void spufs_handle_dma_error(struct spu_context *ctx,
- unsigned long ea, int type)
+int spufs_handle_class0(struct spu_context *ctx)
{
- if (ctx->flags & SPU_CREATE_EVENTS_ENABLED) {
- ctx->event_return |= type;
- wake_up_all(&ctx->stop_wq);
- } else {
- siginfo_t info;
- memset(&info, 0, sizeof(info));
-
- switch (type) {
- case SPE_EVENT_INVALID_DMA:
- info.si_signo = SIGBUS;
- info.si_code = BUS_OBJERR;
- break;
- case SPE_EVENT_SPE_DATA_STORAGE:
- info.si_signo = SIGBUS;
- info.si_addr = (void __user *)ea;
- info.si_code = BUS_ADRERR;
- break;
- case SPE_EVENT_DMA_ALIGNMENT:
- info.si_signo = SIGBUS;
- /* DAR isn't set for an alignment fault :( */
- info.si_code = BUS_ADRALN;
- break;
- case SPE_EVENT_SPE_ERROR:
- info.si_signo = SIGILL;
- info.si_addr = (void __user *)(unsigned long)
- ctx->ops->npc_read(ctx) - 4;
- info.si_code = ILL_ILLOPC;
- break;
- }
- if (info.si_signo)
- force_sig_info(info.si_signo, &info, current);
- }
-}
+ unsigned long stat = ctx->csa.class_0_pending & CLASS0_INTR_MASK;
-void spufs_dma_callback(struct spu *spu, int type)
-{
- spufs_handle_dma_error(spu->ctx, spu->dar, type);
+ if (likely(!stat))
+ return 0;
+
+ if (stat & CLASS0_DMA_ALIGNMENT_INTR)
+ spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_DMA_ALIGNMENT);
+
+ if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)
+ spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_INVALID_DMA);
+
+ if (stat & CLASS0_SPU_ERROR_INTR)
+ spufs_handle_event(ctx, ctx->csa.dar, SPE_EVENT_SPE_ERROR);
+
+ return -EIO;
}
-EXPORT_SYMBOL_GPL(spufs_dma_callback);
/*
* bottom half handler for page faults, we can't do this from
@@ -154,7 +108,7 @@ int spufs_handle_class1(struct spu_context *ctx)
u64 ea, dsisr, access;
unsigned long flags;
unsigned flt = 0;
- int ret;
+ int ret, ret2;
/*
* dar and dsisr get passed from the registers
@@ -165,16 +119,8 @@ int spufs_handle_class1(struct spu_context *ctx)
* in time, we can still expect to get the same fault
* the immediately after the context restore.
*/
- if (ctx->state == SPU_STATE_RUNNABLE) {
- ea = ctx->spu->dar;
- dsisr = ctx->spu->dsisr;
- ctx->spu->dar= ctx->spu->dsisr = 0;
- } else {
- ea = ctx->csa.priv1.mfc_dar_RW;
- dsisr = ctx->csa.priv1.mfc_dsisr_RW;
- ctx->csa.priv1.mfc_dar_RW = 0;
- ctx->csa.priv1.mfc_dsisr_RW = 0;
- }
+ ea = ctx->csa.dar;
+ dsisr = ctx->csa.dsisr;
if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))
return 0;
@@ -201,7 +147,22 @@ int spufs_handle_class1(struct spu_context *ctx)
if (ret)
ret = spu_handle_mm_fault(current->mm, ea, dsisr, &flt);
- spu_acquire(ctx);
+ /*
+ * If spu_acquire fails due to a pending signal we just want to return
+ * EINTR to userspace even if that means missing the dma restart or
+ * updating the page fault statistics.
+ */
+ ret2 = spu_acquire(ctx);
+ if (ret2)
+ goto out;
+
+ /*
+ * Clear dsisr under ctxt lock after handling the fault, so that
+ * time slicing will not preempt the context while the page fault
+ * handler is running. Context switch code removes mappings.
+ */
+ ctx->csa.dar = ctx->csa.dsisr = 0;
+
/*
* If we handled the fault successfully and are in runnable
* state, restart the DMA.
@@ -222,9 +183,9 @@ int spufs_handle_class1(struct spu_context *ctx)
if (ctx->spu)
ctx->ops->restart_dma(ctx);
} else
- spufs_handle_dma_error(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE);
+ spufs_handle_event(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE);
+ out:
spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
return ret;
}
-EXPORT_SYMBOL_GPL(spufs_handle_class1);
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index d9e56a50379..3fcd06418b0 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -40,6 +40,120 @@
#define SPUFS_MMAP_4K (PAGE_SIZE == 0x1000)
+/* Simple attribute files */
+struct spufs_attr {
+ int (*get)(void *, u64 *);
+ int (*set)(void *, u64);
+ char get_buf[24]; /* enough to store a u64 and "\n\0" */
+ char set_buf[24];
+ void *data;
+ const char *fmt; /* format for read operation */
+ struct mutex mutex; /* protects access to these buffers */
+};
+
+static int spufs_attr_open(struct inode *inode, struct file *file,
+ int (*get)(void *, u64 *), int (*set)(void *, u64),
+ const char *fmt)
+{
+ struct spufs_attr *attr;
+
+ attr = kmalloc(sizeof(*attr), GFP_KERNEL);
+ if (!attr)
+ return -ENOMEM;
+
+ attr->get = get;
+ attr->set = set;
+ attr->data = inode->i_private;
+ attr->fmt = fmt;
+ mutex_init(&attr->mutex);
+ file->private_data = attr;
+
+ return nonseekable_open(inode, file);
+}
+
+static int spufs_attr_release(struct inode *inode, struct file *file)
+{
+ kfree(file->private_data);
+ return 0;
+}
+
+static ssize_t spufs_attr_read(struct file *file, char __user *buf,
+ size_t len, loff_t *ppos)
+{
+ struct spufs_attr *attr;
+ size_t size;
+ ssize_t ret;
+
+ attr = file->private_data;
+ if (!attr->get)
+ return -EACCES;
+
+ ret = mutex_lock_interruptible(&attr->mutex);
+ if (ret)
+ return ret;
+
+ if (*ppos) { /* continued read */
+ size = strlen(attr->get_buf);
+ } else { /* first read */
+ u64 val;
+ ret = attr->get(attr->data, &val);
+ if (ret)
+ goto out;
+
+ size = scnprintf(attr->get_buf, sizeof(attr->get_buf),
+ attr->fmt, (unsigned long long)val);
+ }
+
+ ret = simple_read_from_buffer(buf, len, ppos, attr->get_buf, size);
+out:
+ mutex_unlock(&attr->mutex);
+ return ret;
+}
+
+static ssize_t spufs_attr_write(struct file *file, const char __user *buf,
+ size_t len, loff_t *ppos)
+{
+ struct spufs_attr *attr;
+ u64 val;
+ size_t size;
+ ssize_t ret;
+
+ attr = file->private_data;
+ if (!attr->set)
+ return -EACCES;
+
+ ret = mutex_lock_interruptible(&attr->mutex);
+ if (ret)
+ return ret;
+
+ ret = -EFAULT;
+ size = min(sizeof(attr->set_buf) - 1, len);
+ if (copy_from_user(attr->set_buf, buf, size))
+ goto out;
+
+ ret = len; /* claim we got the whole input */
+ attr->set_buf[size] = '\0';
+ val = simple_strtol(attr->set_buf, NULL, 0);
+ attr->set(attr->data, val);
+out:
+ mutex_unlock(&attr->mutex);
+ return ret;
+}
+
+#define DEFINE_SPUFS_SIMPLE_ATTRIBUTE(__fops, __get, __set, __fmt) \
+static int __fops ## _open(struct inode *inode, struct file *file) \
+{ \
+ __simple_attr_check_format(__fmt, 0ull); \
+ return spufs_attr_open(inode, file, __get, __set, __fmt); \
+} \
+static struct file_operations __fops = { \
+ .owner = THIS_MODULE, \
+ .open = __fops ## _open, \
+ .release = spufs_attr_release, \
+ .read = spufs_attr_read, \
+ .write = spufs_attr_write, \
+};
+
static int
spufs_mem_open(struct inode *inode, struct file *file)
@@ -84,9 +198,12 @@ spufs_mem_read(struct file *file, char __user *buffer,
struct spu_context *ctx = file->private_data;
ssize_t ret;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
ret = __spufs_mem_read(ctx, buffer, size, pos);
spu_release(ctx);
+
return ret;
}
@@ -106,7 +223,10 @@ spufs_mem_write(struct file *file, const char __user *buffer,
if (size > LS_SIZE - pos)
size = LS_SIZE - pos;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
+
local_store = ctx->ops->get_ls(ctx);
ret = copy_from_user(local_store + pos, buffer, size);
spu_release(ctx);
@@ -146,7 +266,8 @@ static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma,
pr_debug("spufs_mem_mmap_nopfn address=0x%lx -> 0x%lx, offset=0x%lx\n",
addr0, address, offset);
- spu_acquire(ctx);
+ if (spu_acquire(ctx))
+ return NOPFN_REFAULT;
if (ctx->state == SPU_STATE_SAVED) {
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
@@ -236,23 +357,32 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
{
struct spu_context *ctx = vma->vm_file->private_data;
unsigned long area, offset = address - vma->vm_start;
- int ret;
offset += vma->vm_pgoff << PAGE_SHIFT;
if (offset >= ps_size)
return NOPFN_SIGBUS;
- /* error here usually means a signal.. we might want to test
- * the error code more precisely though
+ /*
+ * We have to wait for context to be loaded before we have
+ * pages to hand out to the user, but we don't want to wait
+ * with the mmap_sem held.
+ * It is possible to drop the mmap_sem here, but then we need
+ * to return NOPFN_REFAULT because the mappings may have
+ * hanged.
*/
- ret = spu_acquire_runnable(ctx, 0);
- if (ret)
+ if (spu_acquire(ctx))
return NOPFN_REFAULT;
- area = ctx->spu->problem_phys + ps_offs;
- vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT);
- spu_release(ctx);
+ if (ctx->state == SPU_STATE_SAVED) {
+ up_read(&current->mm->mmap_sem);
+ spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE);
+ down_read(&current->mm->mmap_sem);
+ } else {
+ area = ctx->spu->problem_phys + ps_offs;
+ vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT);
+ }
+ spu_release(ctx);
return NOPFN_REFAULT;
}
@@ -286,25 +416,32 @@ static int spufs_cntl_mmap(struct file *file, struct vm_area_struct *vma)
#define spufs_cntl_mmap NULL
#endif /* !SPUFS_MMAP_4K */
-static u64 spufs_cntl_get(void *data)
+static int spufs_cntl_get(void *data, u64 *val)
{
struct spu_context *ctx = data;
- u64 val;
+ int ret;
- spu_acquire(ctx);
- val = ctx->ops->status_read(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
+ *val = ctx->ops->status_read(ctx);
spu_release(ctx);
- return val;
+ return 0;
}
-static void spufs_cntl_set(void *data, u64 val)
+static int spufs_cntl_set(void *data, u64 val)
{
struct spu_context *ctx = data;
+ int ret;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
ctx->ops->runcntl_write(ctx, val);
spu_release(ctx);
+
+ return 0;
}
static int spufs_cntl_open(struct inode *inode, struct file *file)
@@ -317,7 +454,7 @@ static int spufs_cntl_open(struct inode *inode, struct file *file)
if (!i->i_openers++)
ctx->cntl = inode->i_mapping;
mutex_unlock(&ctx->mapping_lock);
- return simple_attr_open(inode, file, spufs_cntl_get,
+ return spufs_attr_open(inode, file, spufs_cntl_get,
spufs_cntl_set, "0x%08lx");
}
@@ -327,7 +464,7 @@ spufs_cntl_release(struct inode *inode, struct file *file)
struct spufs_inode_info *i = SPUFS_I(inode);
struct spu_context *ctx = i->i_ctx;
- simple_attr_close(inode, file);
+ spufs_attr_release(inode, file);
mutex_lock(&ctx->mapping_lock);
if (!--i->i_openers)
@@ -339,8 +476,8 @@ spufs_cntl_release(struct inode *inode, struct file *file)
static const struct file_operations spufs_cntl_fops = {
.open = spufs_cntl_open,
.release = spufs_cntl_release,
- .read = simple_attr_read,
- .write = simple_attr_write,
+ .read = spufs_attr_read,
+ .write = spufs_attr_write,
.mmap = spufs_cntl_mmap,
};
@@ -368,7 +505,9 @@ spufs_regs_read(struct file *file, char __user *buffer,
int ret;
struct spu_context *ctx = file->private_data;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
ret = __spufs_regs_read(ctx, buffer, size, pos);
spu_release_saved(ctx);
return ret;
@@ -387,7 +526,9 @@ spufs_regs_write(struct file *file, const char __user *buffer,
return -EFBIG;
*pos += size;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
ret = copy_from_user(lscsa->gprs + *pos - size,
buffer, size) ? -EFAULT : size;
@@ -419,7 +560,9 @@ spufs_fpcr_read(struct file *file, char __user * buffer,
int ret;
struct spu_context *ctx = file->private_data;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
ret = __spufs_fpcr_read(ctx, buffer, size, pos);
spu_release_saved(ctx);
return ret;
@@ -436,10 +579,12 @@ spufs_fpcr_write(struct file *file, const char __user * buffer,
size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size);
if (size <= 0)
return -EFBIG;
- *pos += size;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
+ *pos += size;
ret = copy_from_user((char *)&lscsa->fpcr + *pos - size,
buffer, size) ? -EFAULT : size;
@@ -486,7 +631,10 @@ static ssize_t spufs_mbox_read(struct file *file, char __user *buf,
udata = (void __user *)buf;
- spu_acquire(ctx);
+ count = spu_acquire(ctx);
+ if (count)
+ return count;
+
for (count = 0; (count + 4) <= len; count += 4, udata++) {
int ret;
ret = ctx->ops->mbox_read(ctx, &mbox_data);
@@ -522,12 +670,15 @@ static ssize_t spufs_mbox_stat_read(struct file *file, char __user *buf,
size_t len, loff_t *pos)
{
struct spu_context *ctx = file->private_data;
+ ssize_t ret;
u32 mbox_stat;
if (len < 4)
return -EINVAL;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
mbox_stat = ctx->ops->mbox_stat_read(ctx) & 0xff;
@@ -562,6 +713,9 @@ void spufs_ibox_callback(struct spu *spu)
{
struct spu_context *ctx = spu->ctx;
+ if (!ctx)
+ return;
+
wake_up_all(&ctx->ibox_wq);
kill_fasync(&ctx->ibox_fasync, SIGIO, POLLIN);
}
@@ -593,7 +747,9 @@ static ssize_t spufs_ibox_read(struct file *file, char __user *buf,
udata = (void __user *)buf;
- spu_acquire(ctx);
+ count = spu_acquire(ctx);
+ if (count)
+ return count;
/* wait only for the first element */
count = 0;
@@ -639,7 +795,11 @@ static unsigned int spufs_ibox_poll(struct file *file, poll_table *wait)
poll_wait(file, &ctx->ibox_wq, wait);
- spu_acquire(ctx);
+ /*
+ * For now keep this uninterruptible and also ignore the rule
+ * that poll should not sleep. Will be fixed later.
+ */
+ mutex_lock(&ctx->state_mutex);
mask = ctx->ops->mbox_stat_poll(ctx, POLLIN | POLLRDNORM);
spu_release(ctx);
@@ -657,12 +817,15 @@ static ssize_t spufs_ibox_stat_read(struct file *file, char __user *buf,
size_t len, loff_t *pos)
{
struct spu_context *ctx = file->private_data;
+ ssize_t ret;
u32 ibox_stat;
if (len < 4)
return -EINVAL;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
ibox_stat = (ctx->ops->mbox_stat_read(ctx) >> 16) & 0xff;
spu_release(ctx);
@@ -698,6 +861,9 @@ void spufs_wbox_callback(struct spu *spu)
{
struct spu_context *ctx = spu->ctx;
+ if (!ctx)
+ return;
+
wake_up_all(&ctx->wbox_wq);
kill_fasync(&ctx->wbox_fasync, SIGIO, POLLOUT);
}
@@ -731,7 +897,9 @@ static ssize_t spufs_wbox_write(struct file *file, const char __user *buf,
if (__get_user(wbox_data, udata))
return -EFAULT;
- spu_acquire(ctx);
+ count = spu_acquire(ctx);
+ if (count)
+ return count;
/*
* make sure we can at least write one element, by waiting
@@ -772,7 +940,11 @@ static unsigned int spufs_wbox_poll(struct file *file, poll_table *wait)
poll_wait(file, &ctx->wbox_wq, wait);
- spu_acquire(ctx);
+ /*
+ * For now keep this uninterruptible and also ignore the rule
+ * that poll should not sleep. Will be fixed later.
+ */
+ mutex_lock(&ctx->state_mutex);
mask = ctx->ops->mbox_stat_poll(ctx, POLLOUT | POLLWRNORM);
spu_release(ctx);
@@ -790,12 +962,15 @@ static ssize_t spufs_wbox_stat_read(struct file *file, char __user *buf,
size_t len, loff_t *pos)
{
struct spu_context *ctx = file->private_data;
+ ssize_t ret;
u32 wbox_stat;
if (len < 4)
return -EINVAL;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
wbox_stat = (ctx->ops->mbox_stat_read(ctx) >> 8) & 0xff;
spu_release(ctx);
@@ -866,7 +1041,9 @@ static ssize_t spufs_signal1_read(struct file *file, char __user *buf,
int ret;
struct spu_context *ctx = file->private_data;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
ret = __spufs_signal1_read(ctx, buf, len, pos);
spu_release_saved(ctx);
@@ -877,6 +1054,7 @@ static ssize_t spufs_signal1_write(struct file *file, const char __user *buf,
size_t len, loff_t *pos)
{
struct spu_context *ctx;
+ ssize_t ret;
u32 data;
ctx = file->private_data;
@@ -887,7 +1065,9 @@ static ssize_t spufs_signal1_write(struct file *file, const char __user *buf,
if (copy_from_user(&data, buf, 4))
return -EFAULT;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
ctx->ops->signal1_write(ctx, data);
spu_release(ctx);
@@ -997,7 +1177,9 @@ static ssize_t spufs_signal2_read(struct file *file, char __user *buf,
struct spu_context *ctx = file->private_data;
int ret;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
ret = __spufs_signal2_read(ctx, buf, len, pos);
spu_release_saved(ctx);
@@ -1008,6 +1190,7 @@ static ssize_t spufs_signal2_write(struct file *file, const char __user *buf,
size_t len, loff_t *pos)
{
struct spu_context *ctx;
+ ssize_t ret;
u32 data;
ctx = file->private_data;
@@ -1018,7 +1201,9 @@ static ssize_t spufs_signal2_write(struct file *file, const char __user *buf,
if (copy_from_user(&data, buf, 4))
return -EFAULT;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
ctx->ops->signal2_write(ctx, data);
spu_release(ctx);
@@ -1086,33 +1271,42 @@ static const struct file_operations spufs_signal2_nosched_fops = {
#define SPU_ATTR_ACQUIRE_SAVED 2
#define DEFINE_SPUFS_ATTRIBUTE(__name, __get, __set, __fmt, __acquire) \
-static u64 __##__get(void *data) \
+static int __##__get(void *data, u64 *val) \
{ \
struct spu_context *ctx = data; \
- u64 ret; \
+ int ret = 0; \
\
if (__acquire == SPU_ATTR_ACQUIRE) { \
- spu_acquire(ctx); \
- ret = __get(ctx); \
+ ret = spu_acquire(ctx); \
+ if (ret) \
+ return ret; \
+ *val = __get(ctx); \
spu_release(ctx); \
} else if (__acquire == SPU_ATTR_ACQUIRE_SAVED) { \
- spu_acquire_saved(ctx); \
- ret = __get(ctx); \
+ ret = spu_acquire_saved(ctx); \
+ if (ret) \
+ return ret; \
+ *val = __get(ctx); \
spu_release_saved(ctx); \
} else \
- ret = __get(ctx); \
+ *val = __get(ctx); \
\
- return ret; \
+ return 0; \
} \
-DEFINE_SIMPLE_ATTRIBUTE(__name, __##__get, __set, __fmt);
+DEFINE_SPUFS_SIMPLE_ATTRIBUTE(__name, __##__get, __set, __fmt);
-static void spufs_signal1_type_set(void *data, u64 val)
+static int spufs_signal1_type_set(void *data, u64 val)
{
struct spu_context *ctx = data;
+ int ret;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
ctx->ops->signal1_type_set(ctx, val);
spu_release(ctx);
+
+ return 0;
}
static u64 spufs_signal1_type_get(struct spu_context *ctx)
@@ -1123,13 +1317,18 @@ DEFINE_SPUFS_ATTRIBUTE(spufs_signal1_type, spufs_signal1_type_get,
spufs_signal1_type_set, "%llu", SPU_ATTR_ACQUIRE);
-static void spufs_signal2_type_set(void *data, u64 val)
+static int spufs_signal2_type_set(void *data, u64 val)
{
struct spu_context *ctx = data;
+ int ret;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
ctx->ops->signal2_type_set(ctx, val);
spu_release(ctx);
+
+ return 0;
}
static u64 spufs_signal2_type_get(struct spu_context *ctx)
@@ -1329,6 +1528,9 @@ void spufs_mfc_callback(struct spu *spu)
{
struct spu_context *ctx = spu->ctx;
+ if (!ctx)
+ return;
+
wake_up_all(&ctx->mfc_wq);
pr_debug("%s %s\n", __FUNCTION__, spu->name);
@@ -1375,12 +1577,17 @@ static ssize_t spufs_mfc_read(struct file *file, char __user *buffer,
if (size != 4)
goto out;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
+
+ ret = -EINVAL;
if (file->f_flags & O_NONBLOCK) {
status = ctx->ops->read_mfc_tagstatus(ctx);
if (!(status & ctx->tagwait))
ret = -EAGAIN;
else
+ /* XXX(hch): shouldn't we clear ret here? */
ctx->tagwait &= ~status;
} else {
ret = spufs_wait(ctx->mfc_wq,
@@ -1505,7 +1712,11 @@ static ssize_t spufs_mfc_write(struct file *file, const char __user *buffer,
if (ret)
goto out;
- ret = spu_acquire_runnable(ctx, 0);
+ ret = spu_acquire(ctx);
+ if (ret)
+ goto out;
+
+ ret = spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE);
if (ret)
goto out;
@@ -1539,7 +1750,11 @@ static unsigned int spufs_mfc_poll(struct file *file,poll_table *wait)
poll_wait(file, &ctx->mfc_wq, wait);
- spu_acquire(ctx);
+ /*
+ * For now keep this uninterruptible and also ignore the rule
+ * that poll should not sleep. Will be fixed later.
+ */
+ mutex_lock(&ctx->state_mutex);
ctx->ops->set_mfc_query(ctx, ctx->tagwait, 2);
free_elements = ctx->ops->get_mfc_free_elements(ctx);
tagstatus = ctx->ops->read_mfc_tagstatus(ctx);
@@ -1562,7 +1777,9 @@ static int spufs_mfc_flush(struct file *file, fl_owner_t id)
struct spu_context *ctx = file->private_data;
int ret;
- spu_acquire(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
#if 0
/* this currently hangs */
ret = spufs_wait(ctx->mfc_wq,
@@ -1605,12 +1822,18 @@ static const struct file_operations spufs_mfc_fops = {
.mmap = spufs_mfc_mmap,
};
-static void spufs_npc_set(void *data, u64 val)
+static int spufs_npc_set(void *data, u64 val)
{
struct spu_context *ctx = data;
- spu_acquire(ctx);
+ int ret;
+
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
ctx->ops->npc_write(ctx, val);
spu_release(ctx);
+
+ return 0;
}
static u64 spufs_npc_get(struct spu_context *ctx)
@@ -1620,13 +1843,19 @@ static u64 spufs_npc_get(struct spu_context *ctx)
DEFINE_SPUFS_ATTRIBUTE(spufs_npc_ops, spufs_npc_get, spufs_npc_set,
"0x%llx\n", SPU_ATTR_ACQUIRE);
-static void spufs_decr_set(void *data, u64 val)
+static int spufs_decr_set(void *data, u64 val)
{
struct spu_context *ctx = data;
struct spu_lscsa *lscsa = ctx->csa.lscsa;
- spu_acquire_saved(ctx);
+ int ret;
+
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
lscsa->decr.slot[0] = (u32) val;
spu_release_saved(ctx);
+
+ return 0;
}
static u64 spufs_decr_get(struct spu_context *ctx)
@@ -1637,15 +1866,21 @@ static u64 spufs_decr_get(struct spu_context *ctx)
DEFINE_SPUFS_ATTRIBUTE(spufs_decr_ops, spufs_decr_get, spufs_decr_set,
"0x%llx\n", SPU_ATTR_ACQUIRE_SAVED);
-static void spufs_decr_status_set(void *data, u64 val)
+static int spufs_decr_status_set(void *data, u64 val)
{
struct spu_context *ctx = data;
- spu_acquire_saved(ctx);
+ int ret;
+
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
if (val)
ctx->csa.priv2.mfc_control_RW |= MFC_CNTL_DECREMENTER_RUNNING;
else
ctx->csa.priv2.mfc_control_RW &= ~MFC_CNTL_DECREMENTER_RUNNING;
spu_release_saved(ctx);
+
+ return 0;
}
static u64 spufs_decr_status_get(struct spu_context *ctx)
@@ -1659,13 +1894,19 @@ DEFINE_SPUFS_ATTRIBUTE(spufs_decr_status_ops, spufs_decr_status_get,
spufs_decr_status_set, "0x%llx\n",
SPU_ATTR_ACQUIRE_SAVED);
-static void spufs_event_mask_set(void *data, u64 val)
+static int spufs_event_mask_set(void *data, u64 val)
{
struct spu_context *ctx = data;
struct spu_lscsa *lscsa = ctx->csa.lscsa;
- spu_acquire_saved(ctx);
+ int ret;
+
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
lscsa->event_mask.slot[0] = (u32) val;
spu_release_saved(ctx);
+
+ return 0;
}
static u64 spufs_event_mask_get(struct spu_context *ctx)
@@ -1690,13 +1931,19 @@ static u64 spufs_event_status_get(struct spu_context *ctx)
DEFINE_SPUFS_ATTRIBUTE(spufs_event_status_ops, spufs_event_status_get,
NULL, "0x%llx\n", SPU_ATTR_ACQUIRE_SAVED)
-static void spufs_srr0_set(void *data, u64 val)
+static int spufs_srr0_set(void *data, u64 val)
{
struct spu_context *ctx = data;
struct spu_lscsa *lscsa = ctx->csa.lscsa;
- spu_acquire_saved(ctx);
+ int ret;
+
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
lscsa->srr0.slot[0] = (u32) val;
spu_release_saved(ctx);
+
+ return 0;
}
static u64 spufs_srr0_get(struct spu_context *ctx)
@@ -1727,10 +1974,12 @@ static u64 spufs_object_id_get(struct spu_context *ctx)
return ctx->object_id;
}
-static void spufs_object_id_set(void *data, u64 id)
+static int spufs_object_id_set(void *data, u64 id)
{
struct spu_context *ctx = data;
ctx->object_id = id;
+
+ return 0;
}
DEFINE_SPUFS_ATTRIBUTE(spufs_object_id_ops, spufs_object_id_get,
@@ -1777,13 +2026,13 @@ static const struct file_operations spufs_caps_fops = {
static ssize_t __spufs_mbox_info_read(struct spu_context *ctx,
char __user *buf, size_t len, loff_t *pos)
{
- u32 mbox_stat;
u32 data;
- mbox_stat = ctx->csa.prob.mb_stat_R;
- if (mbox_stat & 0x0000ff) {
- data = ctx->csa.prob.pu_mb_R;
- }
+ /* EOF if there's no entry in the mbox */
+ if (!(ctx->csa.prob.mb_stat_R & 0x0000ff))
+ return 0;
+
+ data = ctx->csa.prob.pu_mb_R;
return simple_read_from_buffer(buf, len, pos, &data, sizeof data);
}
@@ -1797,7 +2046,9 @@ static ssize_t spufs_mbox_info_read(struct file *file, char __user *buf,
if (!access_ok(VERIFY_WRITE, buf, len))
return -EFAULT;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
spin_lock(&ctx->csa.register_lock);
ret = __spufs_mbox_info_read(ctx, buf, len, pos);
spin_unlock(&ctx->csa.register_lock);
@@ -1815,13 +2066,13 @@ static const struct file_operations spufs_mbox_info_fops = {
static ssize_t __spufs_ibox_info_read(struct spu_context *ctx,
char __user *buf, size_t len, loff_t *pos)
{
- u32 ibox_stat;
u32 data;
- ibox_stat = ctx->csa.prob.mb_stat_R;
- if (ibox_stat & 0xff0000) {
- data = ctx->csa.priv2.puint_mb_R;
- }
+ /* EOF if there's no entry in the ibox */
+ if (!(ctx->csa.prob.mb_stat_R & 0xff0000))
+ return 0;
+
+ data = ctx->csa.priv2.puint_mb_R;
return simple_read_from_buffer(buf, len, pos, &data, sizeof data);
}
@@ -1835,7 +2086,9 @@ static ssize_t spufs_ibox_info_read(struct file *file, char __user *buf,
if (!access_ok(VERIFY_WRITE, buf, len))
return -EFAULT;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
spin_lock(&ctx->csa.register_lock);
ret = __spufs_ibox_info_read(ctx, buf, len, pos);
spin_unlock(&ctx->csa.register_lock);
@@ -1876,7 +2129,9 @@ static ssize_t spufs_wbox_info_read(struct file *file, char __user *buf,
if (!access_ok(VERIFY_WRITE, buf, len))
return -EFAULT;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
spin_lock(&ctx->csa.register_lock);
ret = __spufs_wbox_info_read(ctx, buf, len, pos);
spin_unlock(&ctx->csa.register_lock);
@@ -1926,7 +2181,9 @@ static ssize_t spufs_dma_info_read(struct file *file, char __user *buf,
if (!access_ok(VERIFY_WRITE, buf, len))
return -EFAULT;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
spin_lock(&ctx->csa.register_lock);
ret = __spufs_dma_info_read(ctx, buf, len, pos);
spin_unlock(&ctx->csa.register_lock);
@@ -1977,7 +2234,9 @@ static ssize_t spufs_proxydma_info_read(struct file *file, char __user *buf,
struct spu_context *ctx = file->private_data;
int ret;
- spu_acquire_saved(ctx);
+ ret = spu_acquire_saved(ctx);
+ if (ret)
+ return ret;
spin_lock(&ctx->csa.register_lock);
ret = __spufs_proxydma_info_read(ctx, buf, len, pos);
spin_unlock(&ctx->csa.register_lock);
@@ -2066,8 +2325,12 @@ static unsigned long long spufs_class2_intrs(struct spu_context *ctx)
static int spufs_show_stat(struct seq_file *s, void *private)
{
struct spu_context *ctx = s->private;
+ int ret;
+
+ ret = spu_acquire(ctx);
+ if (ret)
+ return ret;
- spu_acquire(ctx);
seq_printf(s, "%s %llu %llu %llu %llu "
"%llu %llu %llu %llu %llu %llu %llu %llu\n",
ctx_state_names[ctx->stats.util_state],
diff --git a/arch/powerpc/platforms/cell/spufs/hw_ops.c b/arch/powerpc/platforms/cell/spufs/hw_ops.c
index fc4ed1ffbd4..64f8540b832 100644
--- a/arch/powerpc/platforms/cell/spufs/hw_ops.c
+++ b/arch/powerpc/platforms/cell/spufs/hw_ops.c
@@ -76,16 +76,18 @@ static unsigned int spu_hw_mbox_stat_poll(struct spu_context *ctx,
if (stat & 0xff0000)
ret |= POLLIN | POLLRDNORM;
else {
- spu_int_stat_clear(spu, 2, 0x1);
- spu_int_mask_or(spu, 2, 0x1);
+ spu_int_stat_clear(spu, 2, CLASS2_MAILBOX_INTR);
+ spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR);
}
}
if (events & (POLLOUT | POLLWRNORM)) {
if (stat & 0x00ff00)
ret = POLLOUT | POLLWRNORM;
else {
- spu_int_stat_clear(spu, 2, 0x10);
- spu_int_mask_or(spu, 2, 0x10);
+ spu_int_stat_clear(spu, 2,
+ CLASS2_MAILBOX_THRESHOLD_INTR);
+ spu_int_mask_or(spu, 2,
+ CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR);
}
}
spin_unlock_irq(&spu->register_lock);
@@ -106,7 +108,7 @@ static int spu_hw_ibox_read(struct spu_context *ctx, u32 * data)
ret = 4;
} else {
/* make sure we get woken up by the interrupt */
- spu_int_mask_or(spu, 2, 0x1);
+ spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_INTR);
ret = 0;
}
spin_unlock_irq(&spu->register_lock);
@@ -127,7 +129,7 @@ static int spu_hw_wbox_write(struct spu_context *ctx, u32 data)
} else {
/* make sure we get woken up by the interrupt when space
becomes available */
- spu_int_mask_or(spu, 2, 0x10);
+ spu_int_mask_or(spu, 2, CLASS2_ENABLE_MAILBOX_THRESHOLD_INTR);
ret = 0;
}
spin_unlock_irq(&spu->register_lock);
@@ -206,6 +208,11 @@ static char *spu_hw_get_ls(struct spu_context *ctx)
return ctx->spu->local_store;
}
+static void spu_hw_privcntl_write(struct spu_context *ctx, u64 val)
+{
+ out_be64(&ctx->spu->priv2->spu_privcntl_RW, val);
+}
+
static u32 spu_hw_runcntl_read(struct spu_context *ctx)
{
return in_be32(&ctx->spu->problem->spu_runcntl_RW);
@@ -215,11 +222,21 @@ static void spu_hw_runcntl_write(struct spu_context *ctx, u32 val)
{
spin_lock_irq(&ctx->spu->register_lock);
if (val & SPU_RUNCNTL_ISOLATE)
- out_be64(&ctx->spu->priv2->spu_privcntl_RW, 4LL);
+ spu_hw_privcntl_write(ctx,
+ SPU_PRIVCNT_LOAD_REQUEST_ENABLE_MASK);
out_be32(&ctx->spu->problem->spu_runcntl_RW, val);
spin_unlock_irq(&ctx->spu->register_lock);
}
+static void spu_hw_runcntl_stop(struct spu_context *ctx)
+{
+ spin_lock_irq(&ctx->spu->register_lock);
+ out_be32(&ctx->spu->problem->spu_runcntl_RW, SPU_RUNCNTL_STOP);
+ while (in_be32(&ctx->spu->problem->spu_status_R) & SPU_STATUS_RUNNING)
+ cpu_relax();
+ spin_unlock_irq(&ctx->spu->register_lock);
+}
+
static void spu_hw_master_start(struct spu_context *ctx)
{
struct spu *spu = ctx->spu;
@@ -319,8 +336,10 @@ struct spu_context_ops spu_hw_ops = {
.npc_write = spu_hw_npc_write,
.status_read = spu_hw_status_read,
.get_ls = spu_hw_get_ls,
+ .privcntl_write = spu_hw_privcntl_write,
.runcntl_read = spu_hw_runcntl_read,
.runcntl_write = spu_hw_runcntl_write,
+ .runcntl_stop = spu_hw_runcntl_stop,
.master_start = spu_hw_master_start,
.master_stop = spu_hw_master_stop,
.set_mfc_query = spu_hw_set_mfc_query,
diff --git a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
index f4b3c052dab..0e9f325c9ff 100644
--- a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
+++ b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
@@ -28,6 +28,8 @@
#include <asm/spu_csa.h>
#include <asm/mmu.h>
+#include "spufs.h"
+
static int spu_alloc_lscsa_std(struct spu_state *csa)
{
struct spu_lscsa *lscsa;
@@ -73,7 +75,7 @@ int spu_alloc_lscsa(struct spu_state *csa)
int i, j, n_4k;
/* Check availability of 64K pages */
- if (mmu_psize_defs[MMU_PAGE_64K].shift == 0)
+ if (!spu_64k_pages_available())
goto fail;
csa->use_big_pages = 1;
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c
index 1ce5e22ea5f..c01a09da1e5 100644
--- a/arch/powerpc/platforms/cell/spufs/run.c
+++ b/arch/powerpc/platforms/cell/spufs/run.c
@@ -15,24 +15,55 @@ void spufs_stop_callback(struct spu *spu)
{
struct spu_context *ctx = spu->ctx;
- wake_up_all(&ctx->stop_wq);
+ /*
+ * It should be impossible to preempt a context while an exception
+ * is being processed, since the context switch code is specially
+ * coded to deal with interrupts ... But, just in case, sanity check
+ * the context pointer. It is OK to return doing nothing since
+ * the exception will be regenerated when the context is resumed.
+ */
+ if (ctx) {
+ /* Copy exception arguments into module specific structure */
+ ctx->csa.class_0_pending = spu->class_0_pending;
+ ctx->csa.dsisr = spu->dsisr;
+ ctx->csa.dar = spu->dar;
+
+ /* ensure that the exception status has hit memory before a
+ * thread waiting on the context's stop queue is woken */
+ smp_wmb();
+
+ wake_up_all(&ctx->stop_wq);
+ }
+
+ /* Clear callback arguments from spu structure */
+ spu->class_0_pending = 0;
+ spu->dsisr = 0;
+ spu->dar = 0;
}
-static inline int spu_stopped(struct spu_context *ctx, u32 *stat)
+int spu_stopped(struct spu_context *ctx, u32 *stat)
{
- struct spu *spu;
- u64 pte_fault;
+ u64 dsisr;
+ u32 stopped;
*stat = ctx->ops->status_read(ctx);
- spu = ctx->spu;
- if (ctx->state != SPU_STATE_RUNNABLE ||
- test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags))
+ if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags))
return 1;
- pte_fault = spu->dsisr &
- (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED);
- return (!(*stat & SPU_STATUS_RUNNING) || pte_fault || spu->class_0_pending) ?
- 1 : 0;
+
+ stopped = SPU_STATUS_INVALID_INSTR | SPU_STATUS_SINGLE_STEP |
+ SPU_STATUS_STOPPED_BY_HALT | SPU_STATUS_STOPPED_BY_STOP;
+ if (*stat & stopped)
+ return 1;
+
+ dsisr = ctx->csa.dsisr;
+ if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED))
+ return 1;
+
+ if (ctx->csa.class_0_pending)
+ return 1;
+
+ return 0;
}
static int spu_setup_isolated(struct spu_context *ctx)
@@ -128,34 +159,66 @@ out:
static int spu_run_init(struct spu_context *ctx, u32 *npc)
{
+ unsigned long runcntl = SPU_RUNCNTL_RUNNABLE;
+ int ret;
+
spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
- if (ctx->flags & SPU_CREATE_ISOLATE) {
- unsigned long runcntl;
+ /*
+ * NOSCHED is synchronous scheduling with respect to the caller.
+ * The caller waits for the context to be loaded.
+ */
+ if (ctx->flags & SPU_CREATE_NOSCHED) {
+ if (ctx->state == SPU_STATE_SAVED) {
+ ret = spu_activate(ctx, 0);
+ if (ret)
+ return ret;
+ }
+ }
+ /*
+ * Apply special setup as required.
+ */
+ if (ctx->flags & SPU_CREATE_ISOLATE) {
if (!(ctx->ops->status_read(ctx) & SPU_STATUS_ISOLATED_STATE)) {
- int ret = spu_setup_isolated(ctx);
+ ret = spu_setup_isolated(ctx);
if (ret)
return ret;
}
- /* if userspace has set the runcntrl register (eg, to issue an
- * isolated exit), we need to re-set it here */
+ /*
+ * If userspace has set the runcntrl register (eg, to
+ * issue an isolated exit), we need to re-set it here
+ */
runcntl = ctx->ops->runcntl_read(ctx) &
(SPU_RUNCNTL_RUNNABLE | SPU_RUNCNTL_ISOLATE);
if (runcntl == 0)
runcntl = SPU_RUNCNTL_RUNNABLE;
+ }
+
+ if (ctx->flags & SPU_CREATE_NOSCHED) {
+ spuctx_switch_state(ctx, SPU_UTIL_USER);
ctx->ops->runcntl_write(ctx, runcntl);
} else {
- unsigned long mode = SPU_PRIVCNTL_MODE_NORMAL;
- ctx->ops->npc_write(ctx, *npc);
+ unsigned long privcntl;
+
if (test_thread_flag(TIF_SINGLESTEP))
- mode = SPU_PRIVCNTL_MODE_SINGLE_STEP;
- out_be64(&ctx->spu->priv2->spu_privcntl_RW, mode);
- ctx->ops->runcntl_write(ctx, SPU_RUNCNTL_RUNNABLE);
- }
+ privcntl = SPU_PRIVCNTL_MODE_SINGLE_STEP;
+ else
+ privcntl = SPU_PRIVCNTL_MODE_NORMAL;
- spuctx_switch_state(ctx, SPU_UTIL_USER);
+ ctx->ops->npc_write(ctx, *npc);
+ ctx->ops->privcntl_write(ctx, privcntl);
+ ctx->ops->runcntl_write(ctx, runcntl);
+
+ if (ctx->state == SPU_STATE_SAVED) {
+ ret = spu_activate(ctx, 0);
+ if (ret)
+ return ret;
+ } else {
+ spuctx_switch_state(ctx, SPU_UTIL_USER);
+ }
+ }
return 0;
}
@@ -165,6 +228,8 @@ static int spu_run_fini(struct spu_context *ctx, u32 *npc,
{
int ret = 0;
+ spu_del_from_rq(ctx);
+
*status = ctx->ops->status_read(ctx);
*npc = ctx->ops->npc_read(ctx);
@@ -177,26 +242,6 @@ static int spu_run_fini(struct spu_context *ctx, u32 *npc,
return ret;
}
-static int spu_reacquire_runnable(struct spu_context *ctx, u32 *npc,
- u32 *status)
-{
- int ret;
-
- ret = spu_run_fini(ctx, npc, status);
- if (ret)
- return ret;
-
- if (*status & (SPU_STATUS_STOPPED_BY_STOP | SPU_STATUS_STOPPED_BY_HALT))
- return *status;
-
- ret = spu_acquire_runnable(ctx, 0);
- if (ret)
- return ret;
-
- spuctx_switch_state(ctx, SPU_UTIL_USER);
- return 0;
-}
-
/*
* SPU syscall restarting is tricky because we violate the basic
* assumption that the signal handler is running on the interrupted
@@ -247,7 +292,7 @@ static int spu_process_callback(struct spu_context *ctx)
u32 ls_pointer, npc;
void __iomem *ls;
long spu_ret;
- int ret;
+ int ret, ret2;
/* get syscall block from local store */
npc = ctx->ops->npc_read(ctx) & ~3;
@@ -269,9 +314,11 @@ static int spu_process_callback(struct spu_context *ctx)
if (spu_ret <= -ERESTARTSYS) {
ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
}
- spu_acquire(ctx);
+ ret2 = spu_acquire(ctx);
if (ret == -ERESTARTSYS)
return ret;
+ if (ret2)
+ return -EINTR;
}
/* write result, jump over indirect pointer */
@@ -281,18 +328,6 @@ static int spu_process_callback(struct spu_context *ctx)
return ret;
}
-static inline int spu_process_events(struct spu_context *ctx)
-{
- struct spu *spu = ctx->spu;
- int ret = 0;
-
- if (spu->class_0_pending)
- ret = spu_irq_class_0_bottom(spu);
- if (!ret && signal_pending(current))
- ret = -ERESTARTSYS;
- return ret;
-}
-
long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
{
int ret;
@@ -302,29 +337,14 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
if (mutex_lock_interruptible(&ctx->run_mutex))
return -ERESTARTSYS;
- ctx->ops->master_start(ctx);
+ spu_enable_spu(ctx);
ctx->event_return = 0;
- spu_acquire(ctx);
- if (ctx->state == SPU_STATE_SAVED) {
- __spu_update_sched_info(ctx);
- spu_set_timeslice(ctx);
+ ret = spu_acquire(ctx);
+ if (ret)
+ goto out_unlock;
- ret = spu_activate(ctx, 0);
- if (ret) {
- spu_release(ctx);
- goto out;
- }
- } else {
- /*
- * We have to update the scheduling priority under active_mutex
- * to protect against find_victim().
- *
- * No need to update the timeslice ASAP, it will get updated
- * once the current one has expired.
- */
- spu_update_sched_info(ctx);
- }
+ spu_update_sched_info(ctx);
ret = spu_run_init(ctx, npc);
if (ret) {
@@ -358,14 +378,12 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
if (ret)
break;
- if (unlikely(ctx->state != SPU_STATE_RUNNABLE)) {
- ret = spu_reacquire_runnable(ctx, npc, &status);
- if (ret)
- goto out2;
- continue;
- }
- ret = spu_process_events(ctx);
+ ret = spufs_handle_class0(ctx);
+ if (ret)
+ break;
+ if (signal_pending(current))
+ ret = -ERESTARTSYS;
} while (!ret && !(status & (SPU_STATUS_STOPPED_BY_STOP |
SPU_STATUS_STOPPED_BY_HALT |
SPU_STATUS_SINGLE_STEP)));
@@ -376,11 +394,10 @@ long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
ctx->stats.libassist++;
- ctx->ops->master_stop(ctx);
+ spu_disable_spu(ctx);
ret = spu_run_fini(ctx, npc, &status);
spu_yield(ctx);
-out2:
if ((ret == 0) ||
((ret == -ERESTARTSYS) &&
((status & SPU_STATUS_STOPPED_BY_HALT) ||
@@ -401,6 +418,7 @@ out2:
out:
*event = ctx->event_return;
+out_unlock:
mutex_unlock(&ctx->run_mutex);
return ret;
}
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 9ad53e637ae..00d914232af 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -58,6 +58,7 @@ static unsigned long spu_avenrun[3];
static struct spu_prio_array *spu_prio;
static struct task_struct *spusched_task;
static struct timer_list spusched_timer;
+static struct timer_list spuloadavg_timer;
/*
* Priority of a normal, non-rt, non-niced'd process (aka nice level 0).
@@ -105,15 +106,21 @@ void spu_set_timeslice(struct spu_context *ctx)
void __spu_update_sched_info(struct spu_context *ctx)
{
/*
- * 32-Bit assignment are atomic on powerpc, and we don't care about
- * memory ordering here because retriving the controlling thread is
- * per defintion racy.
+ * assert that the context is not on the runqueue, so it is safe
+ * to change its scheduling parameters.
+ */
+ BUG_ON(!list_empty(&ctx->rq));
+
+ /*
+ * 32-Bit assignments are atomic on powerpc, and we don't care about
+ * memory ordering here because retrieving the controlling thread is
+ * per definition racy.
*/
ctx->tid = current->pid;
/*
* We do our own priority calculations, so we normally want
- * ->static_prio to start with. Unfortunately thies field
+ * ->static_prio to start with. Unfortunately this field
* contains junk for threads with a realtime scheduling
* policy so we have to look at ->prio in this case.
*/
@@ -124,23 +131,32 @@ void __spu_update_sched_info(struct spu_context *ctx)
ctx->policy = current->policy;
/*
- * A lot of places that don't hold list_mutex poke into
- * cpus_allowed, including grab_runnable_context which
- * already holds the runq_lock. So abuse runq_lock
- * to protect this field aswell.
+ * TO DO: the context may be loaded, so we may need to activate
+ * it again on a different node. But it shouldn't hurt anything
+ * to update its parameters, because we know that the scheduler
+ * is not actively looking at this field, since it is not on the
+ * runqueue. The context will be rescheduled on the proper node
+ * if it is timesliced or preempted.
*/
- spin_lock(&spu_prio->runq_lock);
ctx->cpus_allowed = current->cpus_allowed;
- spin_unlock(&spu_prio->runq_lock);
}
void spu_update_sched_info(struct spu_context *ctx)
{
- int node = ctx->spu->node;
+ int node;
- mutex_lock(&cbe_spu_info[node].list_mutex);
- __spu_update_sched_info(ctx);
- mutex_unlock(&cbe_spu_info[node].list_mutex);
+ if (ctx->state == SPU_STATE_RUNNABLE) {
+ node = ctx->spu->node;
+
+ /*
+ * Take list_mutex to sync with find_victim().
+ */
+ mutex_lock(&cbe_spu_info[node].list_mutex);
+ __spu_update_sched_info(ctx);
+ mutex_unlock(&cbe_spu_info[node].list_mutex);
+ } else {
+ __spu_update_sched_info(ctx);
+ }
}
static int __node_allowed(struct spu_context *ctx, int node)
@@ -174,7 +190,7 @@ void do_notify_spus_active(void)
* Wake up the active spu_contexts.
*
* When the awakened processes see their "notify_active" flag is set,
- * they will call spu_switch_notify();
+ * they will call spu_switch_notify().
*/
for_each_online_node(node) {
struct spu *spu;
@@ -221,7 +237,6 @@ static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
spu->wbox_callback = spufs_wbox_callback;
spu->stop_callback = spufs_stop_callback;
spu->mfc_callback = spufs_mfc_callback;
- spu->dma_callback = spufs_dma_callback;
mb();
spu_unmap_mappings(ctx);
spu_restore(&ctx->csa, spu);
@@ -409,7 +424,6 @@ static void spu_unbind_context(struct spu *spu, struct spu_context *ctx)
spu->wbox_callback = NULL;
spu->stop_callback = NULL;
spu->mfc_callback = NULL;
- spu->dma_callback = NULL;
spu_associate_mm(spu, NULL);
spu->pid = 0;
spu->tgid = 0;
@@ -454,6 +468,13 @@ static void __spu_add_to_rq(struct spu_context *ctx)
}
}
+static void spu_add_to_rq(struct spu_context *ctx)
+{
+ spin_lock(&spu_prio->runq_lock);
+ __spu_add_to_rq(ctx);
+ spin_unlock(&spu_prio->runq_lock);
+}
+
static void __spu_del_from_rq(struct spu_context *ctx)
{
int prio = ctx->prio;
@@ -468,10 +489,24 @@ static void __spu_del_from_rq(struct spu_context *ctx)
}
}
+void spu_del_from_rq(struct spu_context *ctx)
+{
+ spin_lock(&spu_prio->runq_lock);
+ __spu_del_from_rq(ctx);
+ spin_unlock(&spu_prio->runq_lock);
+}
+
static void spu_prio_wait(struct spu_context *ctx)
{
DEFINE_WAIT(wait);
+ /*
+ * The caller must explicitly wait for a context to be loaded
+ * if the nosched flag is set. If NOSCHED is not set, the caller
+ * queues the context and waits for an spu event or error.
+ */
+ BUG_ON(!(ctx->flags & SPU_CREATE_NOSCHED));
+
spin_lock(&spu_prio->runq_lock);
prepare_to_wait_exclusive(&ctx->stop_wq, &wait, TASK_INTERRUPTIBLE);
if (!signal_pending(current)) {
@@ -555,7 +590,7 @@ static struct spu *find_victim(struct spu_context *ctx)
/*
* Look for a possible preemption candidate on the local node first.
* If there is no candidate look at the other nodes. This isn't
- * exactly fair, but so far the whole spu schedule tries to keep
+ * exactly fair, but so far the whole spu scheduler tries to keep
* a strong node affinity. We might want to fine-tune this in
* the future.
*/
@@ -571,6 +606,7 @@ static struct spu *find_victim(struct spu_context *ctx)
struct spu_context *tmp = spu->ctx;
if (tmp && tmp->prio > ctx->prio &&
+ !(tmp->flags & SPU_CREATE_NOSCHED) &&
(!victim || tmp->prio > victim->prio))
victim = spu->ctx;
}
@@ -582,6 +618,10 @@ static struct spu *find_victim(struct spu_context *ctx)
* higher priority contexts before lower priority
* ones, so this is safe until we introduce
* priority inheritance schemes.
+ *
+ * XXX if the highest priority context is locked,
+ * this can loop a long time. Might be better to
+ * look at another context or give up after X retries.
*/
if (!mutex_trylock(&victim->state_mutex)) {
victim = NULL;
@@ -589,10 +629,10 @@ static struct spu *find_victim(struct spu_context *ctx)
}
spu = victim->spu;
- if (!spu) {
+ if (!spu || victim->prio <= ctx->prio) {
/*
* This race can happen because we've dropped
- * the active list mutex. No a problem, just
+ * the active list mutex. Not a problem, just
* restart the search.
*/
mutex_unlock(&victim->state_mutex);
@@ -607,13 +647,10 @@ static struct spu *find_victim(struct spu_context *ctx)
victim->stats.invol_ctx_switch++;
spu->stats.invol_ctx_switch++;
+ spu_add_to_rq(victim);
+
mutex_unlock(&victim->state_mutex);
- /*
- * We need to break out of the wait loop in spu_run
- * manually to ensure this context gets put on the
- * runqueue again ASAP.
- */
- wake_up(&victim->stop_wq);
+
return spu;
}
}
@@ -621,6 +658,50 @@ static struct spu *find_victim(struct spu_context *ctx)
return NULL;
}
+static void __spu_schedule(struct spu *spu, struct spu_context *ctx)
+{
+ int node = spu->node;
+ int success = 0;
+
+ spu_set_timeslice(ctx);
+
+ mutex_lock(&cbe_spu_info[node].list_mutex);
+ if (spu->ctx == NULL) {
+ spu_bind_context(spu, ctx);
+ cbe_spu_info[node].nr_active++;
+ spu->alloc_state = SPU_USED;
+ success = 1;
+ }
+ mutex_unlock(&cbe_spu_info[node].list_mutex);
+
+ if (success)
+ wake_up_all(&ctx->run_wq);
+ else
+ spu_add_to_rq(ctx);
+}
+
+static void spu_schedule(struct spu *spu, struct spu_context *ctx)
+{
+ /* not a candidate for interruptible because it's called either
+ from the scheduler thread or from spu_deactivate */
+ mutex_lock(&ctx->state_mutex);
+ __spu_schedule(spu, ctx);
+ spu_release(ctx);
+}
+
+static void spu_unschedule(struct spu *spu, struct spu_context *ctx)
+{
+ int node = spu->node;
+
+ mutex_lock(&cbe_spu_info[node].list_mutex);
+ cbe_spu_info[node].nr_active--;
+ spu->alloc_state = SPU_FREE;
+ spu_unbind_context(spu, ctx);
+ ctx->stats.invol_ctx_switch++;
+ spu->stats.invol_ctx_switch++;
+ mutex_unlock(&cbe_spu_info[node].list_mutex);
+}
+
/**
* spu_activate - find a free spu for a context and execute it
* @ctx: spu context to schedule
@@ -632,39 +713,47 @@ static struct spu *find_victim(struct spu_context *ctx)
*/
int spu_activate(struct spu_context *ctx, unsigned long flags)
{
- do {
- struct spu *spu;
+ struct spu *spu;
- /*
- * If there are multiple threads waiting for a single context
- * only one actually binds the context while the others will
- * only be able to acquire the state_mutex once the context
- * already is in runnable state.
- */
- if (ctx->spu)
- return 0;
+ /*
+ * If there are multiple threads waiting for a single context
+ * only one actually binds the context while the others will
+ * only be able to acquire the state_mutex once the context
+ * already is in runnable state.
+ */
+ if (ctx->spu)
+ return 0;
- spu = spu_get_idle(ctx);
- /*
- * If this is a realtime thread we try to get it running by
- * preempting a lower priority thread.
- */
- if (!spu && rt_prio(ctx->prio))
- spu = find_victim(ctx);
- if (spu) {
- int node = spu->node;
+spu_activate_top:
+ if (signal_pending(current))
+ return -ERESTARTSYS;
- mutex_lock(&cbe_spu_info[node].list_mutex);
- spu_bind_context(spu, ctx);
- cbe_spu_info[node].nr_active++;
- mutex_unlock(&cbe_spu_info[node].list_mutex);
- return 0;
- }
+ spu = spu_get_idle(ctx);
+ /*
+ * If this is a realtime thread we try to get it running by
+ * preempting a lower priority thread.
+ */
+ if (!spu && rt_prio(ctx->prio))
+ spu = find_victim(ctx);
+ if (spu) {
+ unsigned long runcntl;
+
+ runcntl = ctx->ops->runcntl_read(ctx);
+ __spu_schedule(spu, ctx);
+ if (runcntl & SPU_RUNCNTL_RUNNABLE)
+ spuctx_switch_state(ctx, SPU_UTIL_USER);
+ return 0;
+ }
+
+ if (ctx->flags & SPU_CREATE_NOSCHED) {
spu_prio_wait(ctx);
- } while (!signal_pending(current));
+ goto spu_activate_top;
+ }
- return -ERESTARTSYS;
+ spu_add_to_rq(ctx);
+
+ return 0;
}
/**
@@ -706,21 +795,19 @@ static int __spu_deactivate(struct spu_context *ctx, int force, int max_prio)
if (spu) {
new = grab_runnable_context(max_prio, spu->node);
if (new || force) {
- int node = spu->node;
-
- mutex_lock(&cbe_spu_info[node].list_mutex);
- spu_unbind_context(spu, ctx);
- spu->alloc_state = SPU_FREE;
- cbe_spu_info[node].nr_active--;
- mutex_unlock(&cbe_spu_info[node].list_mutex);
-
- ctx->stats.vol_ctx_switch++;
- spu->stats.vol_ctx_switch++;
-
- if (new)
- wake_up(&new->stop_wq);
+ spu_unschedule(spu, ctx);
+ if (new) {
+ if (new->flags & SPU_CREATE_NOSCHED)
+ wake_up(&new->stop_wq);
+ else {
+ spu_release(ctx);
+ spu_schedule(spu, new);
+ /* this one can't easily be made
+ interruptible */
+ mutex_lock(&ctx->state_mutex);
+ }
+ }
}
-
}
return new != NULL;
@@ -757,43 +844,38 @@ void spu_yield(struct spu_context *ctx)
static noinline void spusched_tick(struct spu_context *ctx)
{
+ struct spu_context *new = NULL;
+ struct spu *spu = NULL;
+ u32 status;
+
+ if (spu_acquire(ctx))
+ BUG(); /* a kernel thread never has signals pending */
+
+ if (ctx->state != SPU_STATE_RUNNABLE)
+ goto out;
+ if (spu_stopped(ctx, &status))
+ goto out;
if (ctx->flags & SPU_CREATE_NOSCHED)
- return;
+ goto out;
if (ctx->policy == SCHED_FIFO)
- return;
+ goto out;
if (--ctx->time_slice)
- return;
+ goto out;
- /*
- * Unfortunately list_mutex ranks outside of state_mutex, so
- * we have to trylock here. If we fail give the context another
- * tick and try again.
- */
- if (mutex_trylock(&ctx->state_mutex)) {
- struct spu *spu = ctx->spu;
- struct spu_context *new;
-
- new = grab_runnable_context(ctx->prio + 1, spu->node);
- if (new) {
- spu_unbind_context(spu, ctx);
- ctx->stats.invol_ctx_switch++;
- spu->stats.invol_ctx_switch++;
- spu->alloc_state = SPU_FREE;
- cbe_spu_info[spu->node].nr_active--;
- wake_up(&new->stop_wq);
- /*
- * We need to break out of the wait loop in
- * spu_run manually to ensure this context
- * gets put on the runqueue again ASAP.
- */
- wake_up(&ctx->stop_wq);
- }
- spu_set_timeslice(ctx);
- mutex_unlock(&ctx->state_mutex);
+ spu = ctx->spu;
+ new = grab_runnable_context(ctx->prio + 1, spu->node);
+ if (new) {
+ spu_unschedule(spu, ctx);
+ spu_add_to_rq(ctx);
} else {
ctx->time_slice++;
}
+out:
+ spu_release(ctx);
+
+ if (new)
+ spu_schedule(spu, new);
}
/**
@@ -817,35 +899,31 @@ static unsigned long count_active_contexts(void)
}
/**
- * spu_calc_load - given tick count, update the avenrun load estimates.
- * @tick: tick count
+ * spu_calc_load - update the avenrun load estimates.
*
* No locking against reading these values from userspace, as for
* the CPU loadavg code.
*/
-static void spu_calc_load(unsigned long ticks)
+static void spu_calc_load(void)
{
unsigned long active_tasks; /* fixed-point */
- static int count = LOAD_FREQ;
-
- count -= ticks;
-
- if (unlikely(count < 0)) {
- active_tasks = count_active_contexts() * FIXED_1;
- do {
- CALC_LOAD(spu_avenrun[0], EXP_1, active_tasks);
- CALC_LOAD(spu_avenrun[1], EXP_5, active_tasks);
- CALC_LOAD(spu_avenrun[2], EXP_15, active_tasks);
- count += LOAD_FREQ;
- } while (count < 0);
- }
+
+ active_tasks = count_active_contexts() * FIXED_1;
+ CALC_LOAD(spu_avenrun[0], EXP_1, active_tasks);
+ CALC_LOAD(spu_avenrun[1], EXP_5, active_tasks);
+ CALC_LOAD(spu_avenrun[2], EXP_15, active_tasks);
}
static void spusched_wake(unsigned long data)
{
mod_timer(&spusched_timer, jiffies + SPUSCHED_TICK);
wake_up_process(spusched_task);
- spu_calc_load(SPUSCHED_TICK);
+}
+
+static void spuloadavg_wake(unsigned long data)
+{
+ mod_timer(&spuloadavg_timer, jiffies + LOAD_FREQ);
+ spu_calc_load();
}
static int spusched_thread(void *unused)
@@ -857,17 +935,58 @@ static int spusched_thread(void *unused)
set_current_state(TASK_INTERRUPTIBLE);
schedule();
for (node = 0; node < MAX_NUMNODES; node++) {
- mutex_lock(&cbe_spu_info[node].list_mutex);
- list_for_each_entry(spu, &cbe_spu_info[node].spus, cbe_list)
- if (spu->ctx)
- spusched_tick(spu->ctx);
- mutex_unlock(&cbe_spu_info[node].list_mutex);
+ struct mutex *mtx = &cbe_spu_info[node].list_mutex;
+
+ mutex_lock(mtx);
+ list_for_each_entry(spu, &cbe_spu_info[node].spus,
+ cbe_list) {
+ struct spu_context *ctx = spu->ctx;
+
+ if (ctx) {
+ mutex_unlock(mtx);
+ spusched_tick(ctx);
+ mutex_lock(mtx);
+ }
+ }
+ mutex_unlock(mtx);
}
}
return 0;
}
+void spuctx_switch_state(struct spu_context *ctx,
+ enum spu_utilization_state new_state)
+{
+ unsigned long long curtime;
+ signed long long delta;
+ struct timespec ts;
+ struct spu *spu;
+ enum spu_utilization_state old_state;
+
+ ktime_get_ts(&ts);
+ curtime = timespec_to_ns(&ts);
+ delta = curtime - ctx->stats.tstamp;
+
+ WARN_ON(!mutex_is_locked(&ctx->state_mutex));
+ WARN_ON(delta < 0);
+
+ spu = ctx->spu;
+ old_state = ctx->stats.util_state;
+ ctx->stats.util_state = new_state;
+ ctx->stats.tstamp = curtime;
+
+ /*
+ * Update the physical SPU utilization statistics.
+ */
+ if (spu) {
+ ctx->stats.times[old_state] += delta;
+ spu->stats.times[old_state] += delta;
+ spu->stats.util_state = new_state;
+ spu->stats.tstamp = curtime;
+ }
+}
+
#define LOAD_INT(x) ((x) >> FSHIFT)
#define LOAD_FRAC(x) LOAD_INT(((x) & (FIXED_1-1)) * 100)
@@ -881,7 +1000,7 @@ static int show_spu_loadavg(struct seq_file *s, void *private)
/*
* Note that last_pid doesn't really make much sense for the
- * SPU loadavg (it even seems very odd on the CPU side..),
+ * SPU loadavg (it even seems very odd on the CPU side...),
* but we include it here to have a 100% compatible interface.
*/
seq_printf(s, "%d.%02d %d.%02d %d.%02d %ld/%d %d\n",
@@ -922,6 +1041,7 @@ int __init spu_sched_init(void)
spin_lock_init(&spu_prio->runq_lock);
setup_timer(&spusched_timer, spusched_wake, 0);
+ setup_timer(&spuloadavg_timer, spuloadavg_wake, 0);
spusched_task = kthread_run(spusched_thread, NULL, "spusched");
if (IS_ERR(spusched_task)) {
@@ -929,6 +1049,8 @@ int __init spu_sched_init(void)
goto out_free_spu_prio;
}
+ mod_timer(&spuloadavg_timer, 0);
+
entry = create_proc_entry("spu_loadavg", 0, NULL);
if (!entry)
goto out_stop_kthread;
@@ -954,6 +1076,7 @@ void spu_sched_exit(void)
remove_proc_entry("spu_loadavg", NULL);
del_timer_sync(&spusched_timer);
+ del_timer_sync(&spuloadavg_timer);
kthread_stop(spusched_task);
for (node = 0; node < MAX_NUMNODES; node++) {
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index ca47b991bda..0e114038ea6 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -71,6 +71,7 @@ struct spu_context {
wait_queue_head_t wbox_wq;
wait_queue_head_t stop_wq;
wait_queue_head_t mfc_wq;
+ wait_queue_head_t run_wq;
struct fasync_struct *ibox_fasync;
struct fasync_struct *wbox_fasync;
struct fasync_struct *mfc_fasync;
@@ -168,8 +169,10 @@ struct spu_context_ops {
void (*npc_write) (struct spu_context * ctx, u32 data);
u32(*status_read) (struct spu_context * ctx);
char*(*get_ls) (struct spu_context * ctx);
+ void (*privcntl_write) (struct spu_context *ctx, u64 data);
u32 (*runcntl_read) (struct spu_context * ctx);
void (*runcntl_write) (struct spu_context * ctx, u32 data);
+ void (*runcntl_stop) (struct spu_context * ctx);
void (*master_start) (struct spu_context * ctx);
void (*master_stop) (struct spu_context * ctx);
int (*set_mfc_query)(struct spu_context * ctx, u32 mask, u32 mode);
@@ -219,15 +222,16 @@ void spu_gang_add_ctx(struct spu_gang *gang, struct spu_context *ctx);
/* fault handling */
int spufs_handle_class1(struct spu_context *ctx);
+int spufs_handle_class0(struct spu_context *ctx);
/* affinity */
struct spu *affinity_check(struct spu_context *ctx);
/* context management */
extern atomic_t nr_spu_contexts;
-static inline void spu_acquire(struct spu_context *ctx)
+static inline int __must_check spu_acquire(struct spu_context *ctx)
{
- mutex_lock(&ctx->state_mutex);
+ return mutex_lock_interruptible(&ctx->state_mutex);
}
static inline void spu_release(struct spu_context *ctx)
@@ -242,10 +246,11 @@ int put_spu_context(struct spu_context *ctx);
void spu_unmap_mappings(struct spu_context *ctx);
void spu_forget(struct spu_context *ctx);
-int spu_acquire_runnable(struct spu_context *ctx, unsigned long flags);
-void spu_acquire_saved(struct spu_context *ctx);
+int __must_check spu_acquire_saved(struct spu_context *ctx);
void spu_release_saved(struct spu_context *ctx);
+int spu_stopped(struct spu_context *ctx, u32 * stat);
+void spu_del_from_rq(struct spu_context *ctx);
int spu_activate(struct spu_context *ctx, unsigned long flags);
void spu_deactivate(struct spu_context *ctx);
void spu_yield(struct spu_context *ctx);
@@ -279,7 +284,9 @@ extern char *isolated_loader;
} \
spu_release(ctx); \
schedule(); \
- spu_acquire(ctx); \
+ __ret = spu_acquire(ctx); \
+ if (__ret) \
+ break; \
} \
finish_wait(&(wq), &__wait); \
__ret; \
@@ -306,41 +313,16 @@ struct spufs_coredump_reader {
extern struct spufs_coredump_reader spufs_coredump_read[];
extern int spufs_coredump_num_notes;
-/*
- * This function is a little bit too large for an inline, but
- * as fault.c is built into the kernel we can't move it out of
- * line.
- */
-static inline void spuctx_switch_state(struct spu_context *ctx,
- enum spu_utilization_state new_state)
-{
- unsigned long long curtime;
- signed long long delta;
- struct timespec ts;
- struct spu *spu;
- enum spu_utilization_state old_state;
-
- ktime_get_ts(&ts);
- curtime = timespec_to_ns(&ts);
- delta = curtime - ctx->stats.tstamp;
-
- WARN_ON(!mutex_is_locked(&ctx->state_mutex));
- WARN_ON(delta < 0);
-
- spu = ctx->spu;
- old_state = ctx->stats.util_state;
- ctx->stats.util_state = new_state;
- ctx->stats.tstamp = curtime;
-
- /*
- * Update the physical SPU utilization statistics.
- */
- if (spu) {
- ctx->stats.times[old_state] += delta;
- spu->stats.times[old_state] += delta;
- spu->stats.util_state = new_state;
- spu->stats.tstamp = curtime;
- }
-}
+extern int spu_init_csa(struct spu_state *csa);
+extern void spu_fini_csa(struct spu_state *csa);
+extern int spu_save(struct spu_state *prev, struct spu *spu);
+extern int spu_restore(struct spu_state *new, struct spu *spu);
+extern int spu_switch(struct spu_state *prev, struct spu_state *new,
+ struct spu *spu);
+extern int spu_alloc_lscsa(struct spu_state *csa);
+extern void spu_free_lscsa(struct spu_state *csa);
+
+extern void spuctx_switch_state(struct spu_context *ctx,
+ enum spu_utilization_state new_state);
#endif
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index 3d64c81cc6e..6063c88c26d 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -48,6 +48,8 @@
#include <asm/spu_csa.h>
#include <asm/mmu_context.h>
+#include "spufs.h"
+
#include "spu_save_dump.h"
#include "spu_restore_dump.h"
@@ -691,35 +693,9 @@ static inline void resume_mfc_queue(struct spu_state *csa, struct spu *spu)
out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESUME_DMA_QUEUE);
}
-static inline void get_kernel_slb(u64 ea, u64 slb[2])
+static inline void setup_mfc_slbs(struct spu_state *csa, struct spu *spu,
+ unsigned int *code, int code_size)
{
- u64 llp;
-
- if (REGION_ID(ea) == KERNEL_REGION_ID)
- llp = mmu_psize_defs[mmu_linear_psize].sllp;
- else
- llp = mmu_psize_defs[mmu_virtual_psize].sllp;
- slb[0] = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
- SLB_VSID_KERNEL | llp;
- slb[1] = (ea & ESID_MASK) | SLB_ESID_V;
-}
-
-static inline void load_mfc_slb(struct spu *spu, u64 slb[2], int slbe)
-{
- struct spu_priv2 __iomem *priv2 = spu->priv2;
-
- out_be64(&priv2->slb_index_W, slbe);
- eieio();
- out_be64(&priv2->slb_vsid_RW, slb[0]);
- out_be64(&priv2->slb_esid_RW, slb[1]);
- eieio();
-}
-
-static inline void setup_mfc_slbs(struct spu_state *csa, struct spu *spu)
-{
- u64 code_slb[2];
- u64 lscsa_slb[2];
-
/* Save, Step 47:
* Restore, Step 30.
* If MFC_SR1[R]=1, write 0 to SLB_Invalidate_All
@@ -735,11 +711,7 @@ static inline void setup_mfc_slbs(struct spu_state *csa, struct spu *spu)
* translation is desired by OS environment).
*/
spu_invalidate_slbs(spu);
- get_kernel_slb((unsigned long)&spu_save_code[0], code_slb);
- get_kernel_slb((unsigned long)csa->lscsa, lscsa_slb);
- load_mfc_slb(spu, code_slb, 0);
- if ((lscsa_slb[0] != code_slb[0]) || (lscsa_slb[1] != code_slb[1]))
- load_mfc_slb(spu, lscsa_slb, 1);
+ spu_setup_kernel_slbs(spu, csa->lscsa, code, code_size);
}
static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
@@ -768,9 +740,9 @@ static inline void enable_interrupts(struct spu_state *csa, struct spu *spu)
* (translation) interrupts.
*/
spin_lock_irq(&spu->register_lock);
- spu_int_stat_clear(spu, 0, ~0ul);
- spu_int_stat_clear(spu, 1, ~0ul);
- spu_int_stat_clear(spu, 2, ~0ul);
+ spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK);
+ spu_int_stat_clear(spu, 1, CLASS1_INTR_MASK);
+ spu_int_stat_clear(spu, 2, CLASS2_INTR_MASK);
spu_int_mask_set(spu, 0, 0ul);
spu_int_mask_set(spu, 1, class1_mask);
spu_int_mask_set(spu, 2, 0ul);
@@ -927,8 +899,8 @@ static inline void wait_tag_complete(struct spu_state *csa, struct spu *spu)
POLL_WHILE_FALSE(in_be32(&prob->dma_tagstatus_R) & mask);
local_irq_save(flags);
- spu_int_stat_clear(spu, 0, ~(0ul));
- spu_int_stat_clear(spu, 2, ~(0ul));
+ spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK);
+ spu_int_stat_clear(spu, 2, CLASS2_INTR_MASK);
local_irq_restore(flags);
}
@@ -946,8 +918,8 @@ static inline void wait_spu_stopped(struct spu_state *csa, struct spu *spu)
POLL_WHILE_TRUE(in_be32(&prob->spu_status_R) & SPU_STATUS_RUNNING);
local_irq_save(flags);
- spu_int_stat_clear(spu, 0, ~(0ul));
- spu_int_stat_clear(spu, 2, ~(0ul));
+ spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK);
+ spu_int_stat_clear(spu, 2, CLASS2_INTR_MASK);
local_irq_restore(flags);
}
@@ -1423,9 +1395,9 @@ static inline void clear_interrupts(struct spu_state *csa, struct spu *spu)
spu_int_mask_set(spu, 0, 0ul);
spu_int_mask_set(spu, 1, 0ul);
spu_int_mask_set(spu, 2, 0ul);
- spu_int_stat_clear(spu, 0, ~0ul);
- spu_int_stat_clear(spu, 1, ~0ul);
- spu_int_stat_clear(spu, 2, ~0ul);
+ spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK);
+ spu_int_stat_clear(spu, 1, CLASS1_INTR_MASK);
+ spu_int_stat_clear(spu, 2, CLASS2_INTR_MASK);
spin_unlock_irq(&spu->register_lock);
}
@@ -1866,7 +1838,8 @@ static void save_lscsa(struct spu_state *prev, struct spu *spu)
*/
resume_mfc_queue(prev, spu); /* Step 46. */
- setup_mfc_slbs(prev, spu); /* Step 47. */
+ /* Step 47. */
+ setup_mfc_slbs(prev, spu, spu_save_code, sizeof(spu_save_code));
set_switch_active(prev, spu); /* Step 48. */
enable_interrupts(prev, spu); /* Step 49. */
save_ls_16kb(prev, spu); /* Step 50. */
@@ -1971,7 +1944,8 @@ static void restore_lscsa(struct spu_state *next, struct spu *spu)
setup_spu_status_part1(next, spu); /* Step 27. */
setup_spu_status_part2(next, spu); /* Step 28. */
restore_mfc_rag(next, spu); /* Step 29. */
- setup_mfc_slbs(next, spu); /* Step 30. */
+ /* Step 30. */
+ setup_mfc_slbs(next, spu, spu_restore_code, sizeof(spu_restore_code));
set_spu_npc(next, spu); /* Step 31. */
set_signot1(next, spu); /* Step 32. */
set_signot2(next, spu); /* Step 33. */
@@ -2103,10 +2077,6 @@ int spu_save(struct spu_state *prev, struct spu *spu)
int rc;
acquire_spu_lock(spu); /* Step 1. */
- prev->dar = spu->dar;
- prev->dsisr = spu->dsisr;
- spu->dar = 0;
- spu->dsisr = 0;
rc = __do_spu_save(prev, spu); /* Steps 2-53. */
release_spu_lock(spu);
if (rc != 0 && rc != 2 && rc != 6) {
@@ -2133,9 +2103,6 @@ int spu_restore(struct spu_state *new, struct spu *spu)
acquire_spu_lock(spu);
harvest(NULL, spu);
spu->slb_replace = 0;
- new->dar = 0;
- new->dsisr = 0;
- spu->class_0_pending = 0;
rc = __do_spu_restore(new, spu);
release_spu_lock(spu);
if (rc) {
@@ -2215,10 +2182,8 @@ int spu_init_csa(struct spu_state *csa)
return 0;
}
-EXPORT_SYMBOL_GPL(spu_init_csa);
void spu_fini_csa(struct spu_state *csa)
{
spu_free_lscsa(csa);
}
-EXPORT_SYMBOL_GPL(spu_fini_csa);
diff --git a/arch/powerpc/platforms/celleb/Kconfig b/arch/powerpc/platforms/celleb/Kconfig
index 04748d410fc..372891edcdd 100644
--- a/arch/powerpc/platforms/celleb/Kconfig
+++ b/arch/powerpc/platforms/celleb/Kconfig
@@ -2,6 +2,8 @@ config PPC_CELLEB
bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
depends on PPC_MULTIPLATFORM && PPC64
select PPC_CELL
+ select PPC_CELL_NATIVE
+ select PPC_RTAS
select PPC_INDIRECT_IO
select PPC_OF_PLATFORM_PCI
select HAS_TXX9_SERIAL
diff --git a/arch/powerpc/platforms/celleb/io-workarounds.c b/arch/powerpc/platforms/celleb/io-workarounds.c
index 2b912140bcb..423339be1ba 100644
--- a/arch/powerpc/platforms/celleb/io-workarounds.c
+++ b/arch/powerpc/platforms/celleb/io-workarounds.c
@@ -22,6 +22,7 @@
#undef DEBUG
+#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/irq.h>
@@ -222,7 +223,7 @@ void __init celleb_pci_add_one(struct pci_controller *phb,
void (*dummy_read)(struct pci_controller *))
{
struct celleb_pci_bus *bus = &celleb_pci_busses[celleb_pci_count];
- struct device_node *np = phb->arch_data;
+ struct device_node *np = phb->dn;
if (celleb_pci_count >= MAX_CELLEB_PCI_BUS) {
printk(KERN_ERR "Too many pci bridges, workarounds"
@@ -256,13 +257,13 @@ int __init celleb_pci_workaround_init(void)
celleb_dummy_page_va = kmalloc(PAGE_SIZE, GFP_KERNEL);
if (!celleb_dummy_page_va) {
- printk(KERN_ERR "Celleb: dummy read disabled."
+ printk(KERN_ERR "Celleb: dummy read disabled. "
"Alloc celleb_dummy_page_va failed\n");
return 1;
}
list_for_each_entry(phb, &hose_list, list_node) {
- node = phb->arch_data;
+ node = phb->dn;
match = of_match_node(celleb_pci_workaround_match, node);
if (match) {
diff --git a/arch/powerpc/platforms/celleb/iommu.c b/arch/powerpc/platforms/celleb/iommu.c
index 755d869d855..93b0efddd65 100644
--- a/arch/powerpc/platforms/celleb/iommu.c
+++ b/arch/powerpc/platforms/celleb/iommu.c
@@ -22,8 +22,9 @@
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/pci.h>
+#include <linux/of_platform.h>
-#include <asm/of_platform.h>
+#include <asm/machdep.h>
#include "beat_wrapper.h"
@@ -51,6 +52,8 @@ static int __init find_dma_window(u64 *io_space_id, u64 *ioid,
return 0;
}
+static unsigned long celleb_dma_direct_offset;
+
static void __init celleb_init_direct_mapping(void)
{
u64 lpar_addr, io_addr;
@@ -68,7 +71,18 @@ static void __init celleb_init_direct_mapping(void)
ioid, DMA_FLAGS);
}
- dma_direct_offset = dma_base;
+ celleb_dma_direct_offset = dma_base;
+}
+
+static void celleb_dma_dev_setup(struct device *dev)
+{
+ dev->archdata.dma_ops = get_pci_dma_ops();
+ dev->archdata.dma_data = (void *)celleb_dma_direct_offset;
+}
+
+static void celleb_pci_dma_dev_setup(struct pci_dev *pdev)
+{
+ celleb_dma_dev_setup(&pdev->dev);
}
static int celleb_of_bus_notify(struct notifier_block *nb,
@@ -80,7 +94,7 @@ static int celleb_of_bus_notify(struct notifier_block *nb,
if (action != BUS_NOTIFY_ADD_DEVICE)
return 0;
- dev->archdata.dma_ops = get_pci_dma_ops();
+ celleb_dma_dev_setup(dev);
return 0;
}
@@ -91,14 +105,12 @@ static struct notifier_block celleb_of_bus_notifier = {
static int __init celleb_init_iommu(void)
{
- if (!machine_is(celleb))
- return -ENODEV;
-
celleb_init_direct_mapping();
set_pci_dma_ops(&dma_direct_ops);
+ ppc_md.pci_dma_dev_setup = celleb_pci_dma_dev_setup;
bus_register_notifier(&of_platform_bus_type, &celleb_of_bus_notifier);
return 0;
}
-arch_initcall(celleb_init_iommu);
+machine_arch_initcall(celleb_beat, celleb_init_iommu);
diff --git a/arch/powerpc/platforms/celleb/pci.c b/arch/powerpc/platforms/celleb/pci.c
index 6bc32fda7a6..51b390d34e4 100644
--- a/arch/powerpc/platforms/celleb/pci.c
+++ b/arch/powerpc/platforms/celleb/pci.c
@@ -31,6 +31,7 @@
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/pci_regs.h>
+#include <linux/of.h>
#include <linux/of_device.h>
#include <asm/io.h>
@@ -138,8 +139,6 @@ static void celleb_config_read_fake(unsigned char *config, int where,
*val = celleb_fake_config_readl(p);
break;
}
-
- return;
}
static void celleb_config_write_fake(unsigned char *config, int where,
@@ -158,7 +157,6 @@ static void celleb_config_write_fake(unsigned char *config, int where,
celleb_fake_config_writel(val, p);
break;
}
- return;
}
static int celleb_fake_pci_read_config(struct pci_bus *bus,
@@ -351,6 +349,10 @@ static int __init celleb_setup_fake_pci_device(struct device_node *node,
wi1 = of_get_property(node, "vendor-id", NULL);
wi2 = of_get_property(node, "class-code", NULL);
wi3 = of_get_property(node, "revision-id", NULL);
+ if (!wi0 || !wi1 || !wi2 || !wi3) {
+ printk(KERN_ERR "PCI: Missing device tree properties.\n");
+ goto error;
+ }
celleb_config_write_fake(*config, PCI_DEVICE_ID, 2, wi0[0] & 0xffff);
celleb_config_write_fake(*config, PCI_VENDOR_ID, 2, wi1[0] & 0xffff);
@@ -372,6 +374,10 @@ static int __init celleb_setup_fake_pci_device(struct device_node *node,
celleb_setup_pci_base_addrs(hose, devno, fn, num_base_addr);
li = of_get_property(node, "interrupts", &rlen);
+ if (!li) {
+ printk(KERN_ERR "PCI: interrupts not found.\n");
+ goto error;
+ }
val = li[0];
celleb_config_write_fake(*config, PCI_INTERRUPT_PIN, 1, 1);
celleb_config_write_fake(*config, PCI_INTERRUPT_LINE, 1, val);
@@ -475,7 +481,7 @@ static struct of_device_id celleb_phb_match[] __initdata = {
int __init celleb_setup_phb(struct pci_controller *phb)
{
- struct device_node *dev = phb->arch_data;
+ struct device_node *dev = phb->dn;
const struct of_device_id *match;
int (*setup_func)(struct device_node *, struct pci_controller *);
diff --git a/arch/powerpc/platforms/celleb/scc_epci.c b/arch/powerpc/platforms/celleb/scc_epci.c
index 9d076426676..a3c7cfbcb32 100644
--- a/arch/powerpc/platforms/celleb/scc_epci.c
+++ b/arch/powerpc/platforms/celleb/scc_epci.c
@@ -95,7 +95,7 @@ void __init epci_workaround_init(struct pci_controller *hose)
private->dummy_page_da = dma_map_single(hose->parent,
celleb_dummy_page_va, PAGE_SIZE, DMA_FROM_DEVICE);
if (private->dummy_page_da == DMA_ERROR_CODE) {
- printk(KERN_ERR "EPCI: dummy read disabled."
+ printk(KERN_ERR "EPCI: dummy read disabled. "
"Map dummy page failed.\n");
return;
}
diff --git a/arch/powerpc/platforms/celleb/scc_uhc.c b/arch/powerpc/platforms/celleb/scc_uhc.c
index b59c38a06e3..cb430799408 100644
--- a/arch/powerpc/platforms/celleb/scc_uhc.c
+++ b/arch/powerpc/platforms/celleb/scc_uhc.c
@@ -47,7 +47,8 @@ static void enable_scc_uhc(struct pci_dev *dev)
u32 val = 0;
int i;
- if (!machine_is(celleb))
+ if (!machine_is(celleb_beat) &&
+ !machine_is(celleb_native))
return;
uhc_base = ioremap(pci_resource_start(dev, 0),
diff --git a/arch/powerpc/platforms/celleb/setup.c b/arch/powerpc/platforms/celleb/setup.c
index ddfb35ae741..f27ae1e3fb5 100644
--- a/arch/powerpc/platforms/celleb/setup.c
+++ b/arch/powerpc/platforms/celleb/setup.c
@@ -40,6 +40,7 @@
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/console.h>
+#include <linux/of_platform.h>
#include <asm/mmu.h>
#include <asm/processor.h>
@@ -52,12 +53,16 @@
#include <asm/time.h>
#include <asm/spu_priv1.h>
#include <asm/firmware.h>
-#include <asm/of_platform.h>
+#include <asm/rtas.h>
+#include <asm/cell-regs.h>
#include "interrupt.h"
#include "beat_wrapper.h"
#include "beat.h"
#include "pci.h"
+#include "../cell/interrupt.h"
+#include "../cell/pervasive.h"
+#include "../cell/ras.h"
static char celleb_machine_type[128] = "Celleb";
@@ -88,61 +93,122 @@ static void celleb_progress(char *s, unsigned short hex)
printk("*** %04x : %s\n", hex, s ? s : "");
}
-static void __init celleb_setup_arch(void)
+static void __init celleb_setup_arch_common(void)
+{
+ /* init to some ~sane value until calibrate_delay() runs */
+ loops_per_jiffy = 50000000;
+
+#ifdef CONFIG_DUMMY_CONSOLE
+ conswitchp = &dummy_con;
+#endif
+}
+
+static struct of_device_id celleb_bus_ids[] __initdata = {
+ { .type = "scc", },
+ { .type = "ioif", }, /* old style */
+ {},
+};
+
+static int __init celleb_publish_devices(void)
+{
+ /* Publish OF platform devices for southbridge IOs */
+ of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
+
+ celleb_pci_workaround_init();
+
+ return 0;
+}
+machine_device_initcall(celleb_beat, celleb_publish_devices);
+machine_device_initcall(celleb_native, celleb_publish_devices);
+
+
+/*
+ * functions for Celleb-Beat
+ */
+static void __init celleb_setup_arch_beat(void)
{
#ifdef CONFIG_SPU_BASE
- spu_priv1_ops = &spu_priv1_beat_ops;
- spu_management_ops = &spu_management_of_ops;
+ spu_priv1_ops = &spu_priv1_beat_ops;
+ spu_management_ops = &spu_management_of_ops;
#endif
#ifdef CONFIG_SMP
smp_init_celleb();
#endif
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000;
-
-#ifdef CONFIG_DUMMY_CONSOLE
- conswitchp = &dummy_con;
-#endif
+ celleb_setup_arch_common();
}
-static int __init celleb_probe(void)
+static int __init celleb_probe_beat(void)
{
unsigned long root = of_get_flat_dt_root();
if (!of_flat_dt_is_compatible(root, "Beat"))
return 0;
- powerpc_firmware_features |= FW_FEATURE_CELLEB_POSSIBLE;
+ powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS
+ | FW_FEATURE_BEAT | FW_FEATURE_LPAR;
hpte_init_beat_v3();
+
return 1;
}
-static struct of_device_id celleb_bus_ids[] __initdata = {
- { .type = "scc", },
- { .type = "ioif", }, /* old style */
- {},
-};
-static int __init celleb_publish_devices(void)
+/*
+ * functions for Celleb-native
+ */
+static void __init celleb_init_IRQ_native(void)
{
- if (!machine_is(celleb))
- return 0;
+ iic_init_IRQ();
+ spider_init_IRQ();
+}
- /* Publish OF platform devices for southbridge IOs */
- of_platform_bus_probe(NULL, celleb_bus_ids, NULL);
+static void __init celleb_setup_arch_native(void)
+{
+#ifdef CONFIG_SPU_BASE
+ spu_priv1_ops = &spu_priv1_mmio_ops;
+ spu_management_ops = &spu_management_of_ops;
+#endif
- celleb_pci_workaround_init();
+ cbe_regs_init();
- return 0;
+#ifdef CONFIG_CBE_RAS
+ cbe_ras_init();
+#endif
+
+#ifdef CONFIG_SMP
+ smp_init_cell();
+#endif
+
+ cbe_pervasive_init();
+
+ /* XXX: nvram initialization should be added */
+
+ celleb_setup_arch_common();
}
-device_initcall(celleb_publish_devices);
-define_machine(celleb) {
- .name = "Cell Reference Set",
- .probe = celleb_probe,
- .setup_arch = celleb_setup_arch,
+static int __init celleb_probe_native(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "Beat") ||
+ !of_flat_dt_is_compatible(root, "TOSHIBA,Celleb"))
+ return 0;
+
+ powerpc_firmware_features |= FW_FEATURE_CELLEB_ALWAYS;
+ hpte_init_native();
+
+ return 1;
+}
+
+
+/*
+ * machine definitions
+ */
+define_machine(celleb_beat) {
+ .name = "Cell Reference Set (Beat)",
+ .probe = celleb_probe_beat,
+ .setup_arch = celleb_setup_arch_beat,
.show_cpuinfo = celleb_show_cpuinfo,
.restart = beat_restart,
.power_off = beat_power_off,
@@ -167,3 +233,26 @@ define_machine(celleb) {
.machine_crash_shutdown = default_machine_crash_shutdown,
#endif
};
+
+define_machine(celleb_native) {
+ .name = "Cell Reference Set (native)",
+ .probe = celleb_probe_native,
+ .setup_arch = celleb_setup_arch_native,
+ .show_cpuinfo = celleb_show_cpuinfo,
+ .restart = rtas_restart,
+ .power_off = rtas_power_off,
+ .halt = rtas_halt,
+ .get_boot_time = rtas_get_boot_time,
+ .get_rtc_time = rtas_get_rtc_time,
+ .set_rtc_time = rtas_set_rtc_time,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = celleb_progress,
+ .pci_probe_mode = celleb_pci_probe_mode,
+ .pci_setup_phb = celleb_setup_phb,
+ .init_IRQ = celleb_init_IRQ_native,
+#ifdef CONFIG_KEXEC
+ .machine_kexec = default_machine_kexec,
+ .machine_kexec_prepare = default_machine_kexec_prepare,
+ .machine_crash_shutdown = default_machine_crash_shutdown,
+#endif
+};
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index 0340a342f77..609c46db4a1 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -198,7 +198,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
printk ("RTAS supporting Pegasos OF not found, please upgrade"
" your firmware\n");
}
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
/* keep the reference to the root node */
}
@@ -354,7 +354,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
* mode as well. The same fixup must be done to the class-code property in
* the IDE node /pci@80000000/ide@C,1
*/
-static void __devinit chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
+static void chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
{
u8 progif;
struct pci_dev *viaisa;
@@ -375,4 +375,4 @@ static void __devinit chrp_pci_fixup_vt8231_ata(struct pci_dev *viaide)
pci_dev_put(viaisa);
}
-DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, chrp_pci_fixup_vt8231_ata);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, chrp_pci_fixup_vt8231_ata);
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 59306261f5b..116babbaaf8 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -115,7 +115,7 @@ void chrp_show_cpuinfo(struct seq_file *m)
seq_printf(m, "machine\t\t: CHRP %s\n", model);
/* longtrail (goldengate) stuff */
- if (!strncmp(model, "IBM,LongTrail", 13)) {
+ if (model && !strncmp(model, "IBM,LongTrail", 13)) {
/* VLSI VAS96011/12 `Golden Gate 2' */
/* Memory banks */
sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL)
@@ -203,15 +203,20 @@ static void __init sio_fixup_irq(const char *name, u8 device, u8 level,
static void __init sio_init(void)
{
struct device_node *root;
+ const char *model;
- if ((root = of_find_node_by_path("/")) &&
- !strncmp(of_get_property(root, "model", NULL),
- "IBM,LongTrail", 13)) {
+ root = of_find_node_by_path("/");
+ if (!root)
+ return;
+
+ model = of_get_property(root, "model", NULL);
+ if (model && !strncmp(model, "IBM,LongTrail", 13)) {
/* logical device 0 (KBC/Keyboard) */
sio_fixup_irq("keyboard", 0, 1, 2);
/* select logical device 1 (KBC/Mouse) */
sio_fixup_irq("mouse", 1, 12, 2);
}
+
of_node_put(root);
}
@@ -251,6 +256,57 @@ static void briq_restart(char *cmd)
for(;;);
}
+/*
+ * Per default, input/output-device points to the keyboard/screen
+ * If no card is installed, the built-in serial port is used as a fallback.
+ * But unfortunately, the firmware does not connect /chosen/{stdin,stdout}
+ * the the built-in serial node. Instead, a /failsafe node is created.
+ */
+static void chrp_init_early(void)
+{
+ struct device_node *node;
+ const char *property;
+
+ if (strstr(cmd_line, "console="))
+ return;
+ /* find the boot console from /chosen/stdout */
+ if (!of_chosen)
+ return;
+ node = of_find_node_by_path("/");
+ if (!node)
+ return;
+ property = of_get_property(node, "model", NULL);
+ if (!property)
+ goto out_put;
+ if (strcmp(property, "Pegasos2"))
+ goto out_put;
+ /* this is a Pegasos2 */
+ property = of_get_property(of_chosen, "linux,stdout-path", NULL);
+ if (!property)
+ goto out_put;
+ of_node_put(node);
+ node = of_find_node_by_path(property);
+ if (!node)
+ return;
+ property = of_get_property(node, "device_type", NULL);
+ if (!property)
+ goto out_put;
+ if (strcmp(property, "serial"))
+ goto out_put;
+ /*
+ * The 9pin connector is either /failsafe
+ * or /pci@80000000/isa@C/serial@i2F8
+ * The optional graphics card has also type 'serial' in VGA mode.
+ */
+ property = of_get_property(node, "name", NULL);
+ if (!property)
+ goto out_put;
+ if (!strcmp(property, "failsafe") || !strcmp(property, "serial"))
+ add_preferred_console("ttyS", 0, NULL);
+out_put:
+ of_node_put(node);
+}
+
void __init chrp_setup_arch(void)
{
struct device_node *root = of_find_node_by_path("/");
@@ -594,6 +650,7 @@ define_machine(chrp) {
.probe = chrp_probe,
.setup_arch = chrp_setup_arch,
.init = chrp_init2,
+ .init_early = chrp_init_early,
.show_cpuinfo = chrp_show_cpuinfo,
.init_IRQ = chrp_init_IRQ,
.restart = rtas_restart,
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 8924095a792..6c808375793 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -9,6 +9,8 @@ config LINKSTATION
select FSL_SOC
select PPC_UDBG_16550 if SERIAL_8250
select DEFAULT_UIMAGE
+ select MPC10X_OPENPIC
+ select MPC10X_BRIDGE
help
Select LINKSTATION if configuring for one of PPC- (MPC8241)
based NAS systems from Buffalo Technology. So far only
@@ -16,6 +18,19 @@ config LINKSTATION
Linkstation-I HD-HLAN and HD-HGLAN versions, and PPC-based
Terastation systems should be supported too.
+config STORCENTER
+ bool "IOMEGA StorCenter"
+ depends on EMBEDDED6xx
+ select MPIC
+ select FSL_SOC
+ select PPC_UDBG_16550 if SERIAL_8250
+ select WANT_DEVICE_TREE
+ select MPC10X_OPENPIC
+ select MPC10X_BRIDGE
+ help
+ Select STORCENTER if configuring for the iomega StorCenter
+ with an 8241 CPU in it.
+
config MPC7448HPC2
bool "Freescale MPC7448HPC2(Taiga)"
depends on EMBEDDED6xx
@@ -23,6 +38,7 @@ config MPC7448HPC2
select DEFAULT_UIMAGE
select PPC_UDBG_16550
select WANT_DEVICE_TREE
+ select TSI108_BRIDGE
help
Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga)
platform
@@ -33,6 +49,7 @@ config PPC_HOLLY
select TSI108_BRIDGE
select PPC_UDBG_16550
select WANT_DEVICE_TREE
+ select TSI108_BRIDGE
help
Select PPC_HOLLY if configuring for an IBM 750GX/CL Eval
Board with TSI108/9 bridge (Hickory/Holly)
@@ -48,17 +65,13 @@ config PPC_PRPMC2800
config TSI108_BRIDGE
bool
- depends on MPC7448HPC2 || PPC_HOLLY
select PCI
select MPIC
select MPIC_WEIRD
- default y
config MPC10X_BRIDGE
bool
- depends on LINKSTATION
select PPC_INDIRECT_PCI
- default y
config MV64X60
bool
@@ -67,8 +80,6 @@ config MV64X60
config MPC10X_OPENPIC
bool
- depends on LINKSTATION
- default y
config MPC10X_STORE_GATHERING
bool "Enable MPC10x store gathering"
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
index 844947cfc5d..06524d3ffd2 100644
--- a/arch/powerpc/platforms/embedded6xx/Makefile
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -3,5 +3,6 @@
#
obj-$(CONFIG_MPC7448HPC2) += mpc7448_hpc2.o
obj-$(CONFIG_LINKSTATION) += linkstation.o ls_uart.o
+obj-$(CONFIG_STORCENTER) += storcenter.o
obj-$(CONFIG_PPC_HOLLY) += holly.o
obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c
index b6de2b5223d..b21fde589ca 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -20,12 +20,12 @@
#include <linux/console.h>
#include <linux/delay.h>
#include <linux/irq.h>
-#include <linux/ide.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/serial.h>
#include <linux/tty.h>
#include <linux/serial_core.h>
+#include <linux/of_platform.h>
#include <asm/system.h>
#include <asm/time.h>
@@ -39,7 +39,6 @@
#include <asm/tsi108_irq.h>
#include <asm/tsi108_pci.h>
#include <asm/mpic.h>
-#include <asm/of_platform.h>
#undef DEBUG
diff --git a/arch/powerpc/platforms/embedded6xx/ls_uart.c b/arch/powerpc/platforms/embedded6xx/ls_uart.c
index c99264cedda..9d891bd5df5 100644
--- a/arch/powerpc/platforms/embedded6xx/ls_uart.c
+++ b/arch/powerpc/platforms/embedded6xx/ls_uart.c
@@ -117,9 +117,6 @@ static int __init ls_uarts_init(void)
phys_addr_t phys_addr;
int len;
- if (!machine_is(linkstation))
- return 0;
-
avr = of_find_node_by_path("/soc10x/serial@80004500");
if (!avr)
return -EINVAL;
@@ -142,4 +139,4 @@ static int __init ls_uarts_init(void)
return 0;
}
-late_initcall(ls_uarts_init);
+machine_late_initcall(linkstation, ls_uarts_init);
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index a2c04b9d42b..d4f8bf581e3 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -53,8 +53,6 @@
#define MPC7448HPC2_PCI_CFG_PHYS 0xfb000000
-extern void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
-
int mpc7448_hpc2_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn)
{
diff --git a/arch/powerpc/platforms/embedded6xx/storcenter.c b/arch/powerpc/platforms/embedded6xx/storcenter.c
new file mode 100644
index 00000000000..e12e9d29871
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/storcenter.c
@@ -0,0 +1,192 @@
+/*
+ * Board setup routines for the storcenter
+ *
+ * Copyright 2007 (C) Oyvind Repvik (nail@nslu2-linux.org)
+ * Copyright 2007 Andy Wilcox, Jon Loeliger
+ *
+ * Based on linkstation.c by G. Liakhovetski
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of
+ * any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/initrd.h>
+#include <linux/mtd/physmap.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/prom.h>
+#include <asm/mpic.h>
+#include <asm/pci-bridge.h>
+
+#include "mpc10x.h"
+
+
+#ifdef CONFIG_MTD_PHYSMAP
+static struct mtd_partition storcenter_physmap_partitions[] = {
+ {
+ .name = "kernel",
+ .offset = 0x000000,
+ .size = 0x170000,
+ },
+ {
+ .name = "rootfs",
+ .offset = 0x170000,
+ .size = 0x590000,
+ },
+ {
+ .name = "uboot",
+ .offset = 0x700000,
+ .size = 0x040000,
+ },
+ {
+ .name = "config",
+ .offset = 0x740000,
+ .size = 0x0c0000,
+ },
+};
+#endif
+
+
+static __initdata struct of_device_id storcenter_of_bus[] = {
+ { .name = "soc", },
+ {},
+};
+
+static int __init storcenter_device_probe(void)
+{
+ of_platform_bus_probe(NULL, storcenter_of_bus, NULL);
+ return 0;
+}
+machine_device_initcall(storcenter, storcenter_device_probe);
+
+
+static int __init storcenter_add_bridge(struct device_node *dev)
+{
+#ifdef CONFIG_PCI
+ int len;
+ struct pci_controller *hose;
+ const int *bus_range;
+
+ printk("Adding PCI host bridge %s\n", dev->full_name);
+
+ hose = pcibios_alloc_controller(dev);
+ if (hose == NULL)
+ return -ENOMEM;
+
+ bus_range = of_get_property(dev, "bus-range", &len);
+ hose->first_busno = bus_range ? bus_range[0] : 0;
+ hose->last_busno = bus_range ? bus_range[1] : 0xff;
+
+ setup_indirect_pci(hose, MPC10X_MAPB_CNFG_ADDR, MPC10X_MAPB_CNFG_DATA, 0);
+
+ /* Interpret the "ranges" property */
+ /* This also maps the I/O region and sets isa_io/mem_base */
+ pci_process_bridge_OF_ranges(hose, dev, 1);
+#endif
+
+ return 0;
+}
+
+static void __init storcenter_setup_arch(void)
+{
+ struct device_node *np;
+
+#ifdef CONFIG_MTD_PHYSMAP
+ physmap_set_partitions(storcenter_physmap_partitions,
+ ARRAY_SIZE(storcenter_physmap_partitions));
+#endif
+
+ /* Lookup PCI host bridges */
+ for_each_compatible_node(np, "pci", "mpc10x-pci")
+ storcenter_add_bridge(np);
+
+ printk(KERN_INFO "IOMEGA StorCenter\n");
+}
+
+/*
+ * Interrupt setup and service. Interrrupts on the turbostation come
+ * from the four PCI slots plus onboard 8241 devices: I2C, DUART.
+ */
+static void __init storcenter_init_IRQ(void)
+{
+ struct mpic *mpic;
+ struct device_node *dnp;
+ const void *prop;
+ int size;
+ phys_addr_t paddr;
+
+ dnp = of_find_node_by_type(NULL, "open-pic");
+ if (dnp == NULL)
+ return;
+
+ prop = of_get_property(dnp, "reg", &size);
+ if (prop == NULL) {
+ of_node_put(dnp);
+ return;
+ }
+
+ paddr = (phys_addr_t)of_translate_address(dnp, prop);
+ mpic = mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC_WANTS_RESET,
+ 4, 32, " EPIC ");
+
+ of_node_put(dnp);
+
+ BUG_ON(mpic == NULL);
+
+ /* PCI IRQs */
+ /*
+ * 2.6.12 patch:
+ * openpic_set_sources(0, 5, OpenPIC_Addr + 0x10200);
+ * openpic_set_sources(5, 2, OpenPIC_Addr + 0x11120);
+ * first_irq, num_irqs, __iomem first_ISR
+ * o_ss: i, src: 0, fdf50200
+ * o_ss: i, src: 1, fdf50220
+ * o_ss: i, src: 2, fdf50240
+ * o_ss: i, src: 3, fdf50260
+ * o_ss: i, src: 4, fdf50280
+ * o_ss: i, src: 5, fdf51120
+ * o_ss: i, src: 6, fdf51140
+ */
+ mpic_assign_isu(mpic, 0, paddr + 0x10200);
+ mpic_assign_isu(mpic, 1, paddr + 0x10220);
+ mpic_assign_isu(mpic, 2, paddr + 0x10240);
+ mpic_assign_isu(mpic, 3, paddr + 0x10260);
+ mpic_assign_isu(mpic, 4, paddr + 0x10280);
+ mpic_assign_isu(mpic, 5, paddr + 0x11120);
+ mpic_assign_isu(mpic, 6, paddr + 0x11140);
+
+ mpic_init(mpic);
+}
+
+static void storcenter_restart(char *cmd)
+{
+ local_irq_disable();
+
+ /* Set exception prefix high - to the firmware */
+ _nmask_and_or_msr(0, MSR_IP);
+
+ /* Wait for reset to happen */
+ for (;;) ;
+}
+
+static int __init storcenter_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "storcenter");
+}
+
+define_machine(storcenter){
+ .name = "IOMEGA StorCenter",
+ .probe = storcenter_probe,
+ .setup_arch = storcenter_setup_arch,
+ .init_IRQ = storcenter_init_IRQ,
+ .get_irq = mpic_get_irq,
+ .restart = storcenter_restart,
+ .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/iseries/Makefile b/arch/powerpc/platforms/iseries/Makefile
index a65f1b44abf..cc7161ff166 100644
--- a/arch/powerpc/platforms/iseries/Makefile
+++ b/arch/powerpc/platforms/iseries/Makefile
@@ -5,7 +5,7 @@ extra-y += dt.o
obj-y += exception.o
obj-y += hvlog.o hvlpconfig.o lpardata.o setup.o dt_mod.o mf.o lpevents.o \
hvcall.o proc.o htab.o iommu.o misc.o irq.o
-obj-$(CONFIG_PCI) += pci.o vpdinfo.o
+obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_VIOPATH) += viopath.o vio.o
obj-$(CONFIG_MODULES) += ksyms.o
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index 49e9c664ea8..6a0c6f6675c 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -163,8 +163,10 @@ static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
(it->it_type == TCE_PCI) &&
(it->it_offset == tbl->it_offset) &&
(it->it_index == tbl->it_index) &&
- (it->it_size == tbl->it_size))
+ (it->it_size == tbl->it_size)) {
+ of_node_put(node);
return it;
+ }
}
return NULL;
}
diff --git a/arch/powerpc/platforms/iseries/lpevents.c b/arch/powerpc/platforms/iseries/lpevents.c
index 275f4944983..e5b40e3e008 100644
--- a/arch/powerpc/platforms/iseries/lpevents.c
+++ b/arch/powerpc/platforms/iseries/lpevents.c
@@ -239,7 +239,7 @@ int HvLpEvent_unregisterHandler(HvLpEvent_Type eventType)
* other CPUs, and that the deleted handler isn't
* still running on another CPU when we return.
*/
- synchronize_rcu();
+ synchronize_sched();
return 0;
}
}
diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c
index da87162000f..cc562e4c2f3 100644
--- a/arch/powerpc/platforms/iseries/pci.c
+++ b/arch/powerpc/platforms/iseries/pci.c
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2001 Allan Trautman, IBM Corporation
+ * Copyright (C) 2005,2007 Stephen Rothwell, IBM Corp
*
* iSeries specific routines for PCI.
*
@@ -19,13 +20,18 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+
+#undef DEBUG
+
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/string.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/pci.h>
+#include <linux/of.h>
+#include <asm/types.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/prom.h>
@@ -35,6 +41,7 @@
#include <asm/abs_addr.h>
#include <asm/firmware.h>
+#include <asm/iseries/hv_types.h>
#include <asm/iseries/hv_call_xm.h>
#include <asm/iseries/mf.h>
#include <asm/iseries/iommu.h>
@@ -45,15 +52,8 @@
#include "pci.h"
#include "call_pci.h"
-/*
- * Forward declares of prototypes.
- */
-static struct device_node *find_Device_Node(int bus, int devfn);
-
-static int Pci_Retry_Max = 3; /* Only retry 3 times */
-static int Pci_Error_Flag = 1; /* Set Retry Error on. */
-
-static struct pci_ops iSeries_pci_ops;
+#define PCI_RETRY_MAX 3
+static int limit_pci_retries = 1; /* Set Retry Error on. */
/*
* Table defines
@@ -62,6 +62,7 @@ static struct pci_ops iSeries_pci_ops;
#define IOMM_TABLE_MAX_ENTRIES 1024
#define IOMM_TABLE_ENTRY_SIZE 0x0000000000400000UL
#define BASE_IO_MEMORY 0xE000000000000000UL
+#define END_IO_MEMORY 0xEFFFFFFFFFFFFFFFUL
static unsigned long max_io_memory = BASE_IO_MEMORY;
static long current_iomm_table_entry;
@@ -70,12 +71,237 @@ static long current_iomm_table_entry;
* Lookup Tables.
*/
static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
-static u8 iobar_table[IOMM_TABLE_MAX_ENTRIES];
+static u64 ds_addr_table[IOMM_TABLE_MAX_ENTRIES];
-static const char pci_io_text[] = "iSeries PCI I/O";
static DEFINE_SPINLOCK(iomm_table_lock);
/*
+ * Generate a Direct Select Address for the Hypervisor
+ */
+static inline u64 iseries_ds_addr(struct device_node *node)
+{
+ struct pci_dn *pdn = PCI_DN(node);
+ const u32 *sbp = of_get_property(node, "linux,subbus", NULL);
+
+ return ((u64)pdn->busno << 48) + ((u64)(sbp ? *sbp : 0) << 40)
+ + ((u64)0x10 << 32);
+}
+
+/*
+ * Size of Bus VPD data
+ */
+#define BUS_VPDSIZE 1024
+
+/*
+ * Bus Vpd Tags
+ */
+#define VPD_END_OF_AREA 0x79
+#define VPD_ID_STRING 0x82
+#define VPD_VENDOR_AREA 0x84
+
+/*
+ * Mfg Area Tags
+ */
+#define VPD_FRU_FRAME_ID 0x4649 /* "FI" */
+#define VPD_SLOT_MAP_FORMAT 0x4D46 /* "MF" */
+#define VPD_SLOT_MAP 0x534D /* "SM" */
+
+/*
+ * Structures of the areas
+ */
+struct mfg_vpd_area {
+ u16 tag;
+ u8 length;
+ u8 data1;
+ u8 data2;
+};
+#define MFG_ENTRY_SIZE 3
+
+struct slot_map {
+ u8 agent;
+ u8 secondary_agent;
+ u8 phb;
+ char card_location[3];
+ char parms[8];
+ char reserved[2];
+};
+#define SLOT_ENTRY_SIZE 16
+
+/*
+ * Parse the Slot Area
+ */
+static void __init iseries_parse_slot_area(struct slot_map *map, int len,
+ HvAgentId agent, u8 *phb, char card[4])
+{
+ /*
+ * Parse Slot label until we find the one requested
+ */
+ while (len > 0) {
+ if (map->agent == agent) {
+ /*
+ * If Phb wasn't found, grab the entry first one found.
+ */
+ if (*phb == 0xff)
+ *phb = map->phb;
+ /* Found it, extract the data. */
+ if (map->phb == *phb) {
+ memcpy(card, &map->card_location, 3);
+ card[3] = 0;
+ break;
+ }
+ }
+ /* Point to the next Slot */
+ map = (struct slot_map *)((char *)map + SLOT_ENTRY_SIZE);
+ len -= SLOT_ENTRY_SIZE;
+ }
+}
+
+/*
+ * Parse the Mfg Area
+ */
+static void __init iseries_parse_mfg_area(struct mfg_vpd_area *area, int len,
+ HvAgentId agent, u8 *phb, u8 *frame, char card[4])
+{
+ u16 slot_map_fmt = 0;
+
+ /* Parse Mfg Data */
+ while (len > 0) {
+ int mfg_tag_len = area->length;
+ /* Frame ID (FI 4649020310 ) */
+ if (area->tag == VPD_FRU_FRAME_ID)
+ *frame = area->data1;
+ /* Slot Map Format (MF 4D46020004 ) */
+ else if (area->tag == VPD_SLOT_MAP_FORMAT)
+ slot_map_fmt = (area->data1 * 256)
+ + area->data2;
+ /* Slot Map (SM 534D90 */
+ else if (area->tag == VPD_SLOT_MAP) {
+ struct slot_map *slot_map;
+
+ if (slot_map_fmt == 0x1004)
+ slot_map = (struct slot_map *)((char *)area
+ + MFG_ENTRY_SIZE + 1);
+ else
+ slot_map = (struct slot_map *)((char *)area
+ + MFG_ENTRY_SIZE);
+ iseries_parse_slot_area(slot_map, mfg_tag_len,
+ agent, phb, card);
+ }
+ /*
+ * Point to the next Mfg Area
+ * Use defined size, sizeof give wrong answer
+ */
+ area = (struct mfg_vpd_area *)((char *)area + mfg_tag_len
+ + MFG_ENTRY_SIZE);
+ len -= (mfg_tag_len + MFG_ENTRY_SIZE);
+ }
+}
+
+/*
+ * Look for "BUS".. Data is not Null terminated.
+ * PHBID of 0xFF indicates PHB was not found in VPD Data.
+ */
+static u8 __init iseries_parse_phbid(u8 *area, int len)
+{
+ while (len > 0) {
+ if ((*area == 'B') && (*(area + 1) == 'U')
+ && (*(area + 2) == 'S')) {
+ area += 3;
+ while (*area == ' ')
+ area++;
+ return *area & 0x0F;
+ }
+ area++;
+ len--;
+ }
+ return 0xff;
+}
+
+/*
+ * Parse out the VPD Areas
+ */
+static void __init iseries_parse_vpd(u8 *data, int data_len,
+ HvAgentId agent, u8 *frame, char card[4])
+{
+ u8 phb = 0xff;
+
+ while (data_len > 0) {
+ int len;
+ u8 tag = *data;
+
+ if (tag == VPD_END_OF_AREA)
+ break;
+ len = *(data + 1) + (*(data + 2) * 256);
+ data += 3;
+ data_len -= 3;
+ if (tag == VPD_ID_STRING)
+ phb = iseries_parse_phbid(data, len);
+ else if (tag == VPD_VENDOR_AREA)
+ iseries_parse_mfg_area((struct mfg_vpd_area *)data, len,
+ agent, &phb, frame, card);
+ /* Point to next Area. */
+ data += len;
+ data_len -= len;
+ }
+}
+
+static int __init iseries_get_location_code(u16 bus, HvAgentId agent,
+ u8 *frame, char card[4])
+{
+ int status = 0;
+ int bus_vpd_len = 0;
+ u8 *bus_vpd = kmalloc(BUS_VPDSIZE, GFP_KERNEL);
+
+ if (bus_vpd == NULL) {
+ printk("PCI: Bus VPD Buffer allocation failure.\n");
+ return 0;
+ }
+ bus_vpd_len = HvCallPci_getBusVpd(bus, iseries_hv_addr(bus_vpd),
+ BUS_VPDSIZE);
+ if (bus_vpd_len == 0) {
+ printk("PCI: Bus VPD Buffer zero length.\n");
+ goto out_free;
+ }
+ /* printk("PCI: bus_vpd: %p, %d\n",bus_vpd, bus_vpd_len); */
+ /* Make sure this is what I think it is */
+ if (*bus_vpd != VPD_ID_STRING) {
+ printk("PCI: Bus VPD Buffer missing starting tag.\n");
+ goto out_free;
+ }
+ iseries_parse_vpd(bus_vpd, bus_vpd_len, agent, frame, card);
+ status = 1;
+out_free:
+ kfree(bus_vpd);
+ return status;
+}
+
+/*
+ * Prints the device information.
+ * - Pass in pci_dev* pointer to the device.
+ * - Pass in the device count
+ *
+ * Format:
+ * PCI: Bus 0, Device 26, Vendor 0x12AE Frame 1, Card C10 Ethernet
+ * controller
+ */
+static void __init iseries_device_information(struct pci_dev *pdev,
+ u16 bus, HvSubBusNumber subbus)
+{
+ u8 frame = 0;
+ char card[4];
+ HvAgentId agent;
+
+ agent = ISERIES_PCI_AGENTID(ISERIES_GET_DEVICE_FROM_SUBBUS(subbus),
+ ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus));
+
+ if (iseries_get_location_code(bus, agent, &frame, card)) {
+ printk(KERN_INFO "PCI: %s, Vendor %04X Frame%3d, "
+ "Card %4s 0x%04X\n", pci_name(pdev), pdev->vendor,
+ frame, card, (int)(pdev->class >> 8));
+ }
+}
+
+/*
* iomm_table_allocate_entry
*
* Adds pci_dev entry in address translation table
@@ -87,7 +313,7 @@ static DEFINE_SPINLOCK(iomm_table_lock);
* - CurrentIndex is incremented to keep track of the last entry.
* - Builds the resource entry for allocated BARs.
*/
-static void iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
+static void __init iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
{
struct resource *bar_res = &dev->resource[bar_num];
long bar_size = pci_resource_len(dev, bar_num);
@@ -101,7 +327,6 @@ static void iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
* Set Resource values.
*/
spin_lock(&iomm_table_lock);
- bar_res->name = pci_io_text;
bar_res->start = BASE_IO_MEMORY +
IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
bar_res->end = bar_res->start + bar_size - 1;
@@ -110,7 +335,8 @@ static void iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
*/
while (bar_size > 0 ) {
iomm_table[current_iomm_table_entry] = dev->sysdata;
- iobar_table[current_iomm_table_entry] = bar_num;
+ ds_addr_table[current_iomm_table_entry] =
+ iseries_ds_addr(dev->sysdata) | (bar_num << 24);
bar_size -= IOMM_TABLE_ENTRY_SIZE;
++current_iomm_table_entry;
}
@@ -130,7 +356,7 @@ static void iomm_table_allocate_entry(struct pci_dev *dev, int bar_num)
* - Loops through The Bar resources(0 - 5) including the ROM
* is resource(6).
*/
-static void allocate_device_bars(struct pci_dev *dev)
+static void __init allocate_device_bars(struct pci_dev *dev)
{
int bar_num;
@@ -145,79 +371,19 @@ static void allocate_device_bars(struct pci_dev *dev)
* PCI: Read Vendor Failed 0x18.58.10 Rc: 0x00xx
* PCI: Connect Bus Unit Failed 0x18.58.10 Rc: 0x00xx
*/
-static void pci_Log_Error(char *Error_Text, int Bus, int SubBus,
- int AgentId, int HvRc)
+static void pci_log_error(char *error, int bus, int subbus,
+ int agent, int hv_res)
{
- if (HvRc == 0x0302)
+ if (hv_res == 0x0302)
return;
printk(KERN_ERR "PCI: %s Failed: 0x%02X.%02X.%02X Rc: 0x%04X",
- Error_Text, Bus, SubBus, AgentId, HvRc);
-}
-
-/*
- * iSeries_pci_final_fixup(void)
- */
-void __init iSeries_pci_final_fixup(void)
-{
- struct pci_dev *pdev = NULL;
- struct device_node *node;
- int DeviceCount = 0;
-
- /* Fix up at the device node and pci_dev relationship */
- mf_display_src(0xC9000100);
-
- printk("pcibios_final_fixup\n");
- for_each_pci_dev(pdev) {
- node = find_Device_Node(pdev->bus->number, pdev->devfn);
- printk("pci dev %p (%x.%x), node %p\n", pdev,
- pdev->bus->number, pdev->devfn, node);
-
- if (node != NULL) {
- struct pci_dn *pdn = PCI_DN(node);
- const u32 *agent;
-
- agent = of_get_property(node, "linux,agent-id", NULL);
- if ((pdn != NULL) && (agent != NULL)) {
- u8 irq = iSeries_allocate_IRQ(pdn->busno, 0,
- pdn->bussubno);
- int err;
-
- err = HvCallXm_connectBusUnit(pdn->busno, pdn->bussubno,
- *agent, irq);
- if (err)
- pci_Log_Error("Connect Bus Unit",
- pdn->busno, pdn->bussubno, *agent, err);
- else {
- err = HvCallPci_configStore8(pdn->busno, pdn->bussubno,
- *agent,
- PCI_INTERRUPT_LINE,
- irq);
- if (err)
- pci_Log_Error("PciCfgStore Irq Failed!",
- pdn->busno, pdn->bussubno, *agent, err);
- }
- if (!err)
- pdev->irq = irq;
- }
-
- ++DeviceCount;
- pdev->sysdata = (void *)node;
- PCI_DN(node)->pcidev = pdev;
- allocate_device_bars(pdev);
- iSeries_Device_Information(pdev, DeviceCount);
- iommu_devnode_init_iSeries(pdev, node);
- } else
- printk("PCI: Device Tree not found for 0x%016lX\n",
- (unsigned long)pdev);
- }
- iSeries_activate_IRQs();
- mf_display_src(0xC9000200);
+ error, bus, subbus, agent, hv_res);
}
/*
* Look down the chain to find the matching Device Device
*/
-static struct device_node *find_Device_Node(int bus, int devfn)
+static struct device_node *find_device_node(int bus, int devfn)
{
struct device_node *node;
@@ -230,22 +396,66 @@ static struct device_node *find_Device_Node(int bus, int devfn)
return NULL;
}
-#if 0
/*
- * Returns the device node for the passed pci_dev
- * Sanity Check Node PciDev to passed pci_dev
- * If none is found, returns a NULL which the client must handle.
+ * iSeries_pcibios_fixup_resources
+ *
+ * Fixes up all resources for devices
*/
-static struct device_node *get_Device_Node(struct pci_dev *pdev)
+void __init iSeries_pcibios_fixup_resources(struct pci_dev *pdev)
{
+ const u32 *agent;
+ const u32 *sub_bus;
+ unsigned char bus = pdev->bus->number;
struct device_node *node;
+ int i;
+
+ node = find_device_node(bus, pdev->devfn);
+ pr_debug("PCI: iSeries %s, pdev %p, node %p\n",
+ pci_name(pdev), pdev, node);
+ if (!node) {
+ printk("PCI: %s disabled, device tree entry not found !\n",
+ pci_name(pdev));
+ for (i = 0; i <= PCI_ROM_RESOURCE; i++)
+ pdev->resource[i].flags = 0;
+ return;
+ }
+ sub_bus = of_get_property(node, "linux,subbus", NULL);
+ agent = of_get_property(node, "linux,agent-id", NULL);
+ if (agent && sub_bus) {
+ u8 irq = iSeries_allocate_IRQ(bus, 0, *sub_bus);
+ int err;
+
+ err = HvCallXm_connectBusUnit(bus, *sub_bus, *agent, irq);
+ if (err)
+ pci_log_error("Connect Bus Unit",
+ bus, *sub_bus, *agent, err);
+ else {
+ err = HvCallPci_configStore8(bus, *sub_bus,
+ *agent, PCI_INTERRUPT_LINE, irq);
+ if (err)
+ pci_log_error("PciCfgStore Irq Failed!",
+ bus, *sub_bus, *agent, err);
+ else
+ pdev->irq = irq;
+ }
+ }
- node = pdev->sysdata;
- if (node == NULL || PCI_DN(node)->pcidev != pdev)
- node = find_Device_Node(pdev->bus->number, pdev->devfn);
- return node;
+ pdev->sysdata = node;
+ allocate_device_bars(pdev);
+ iseries_device_information(pdev, bus, *sub_bus);
+ iommu_devnode_init_iSeries(pdev, node);
+}
+
+/*
+ * iSeries_pci_final_fixup(void)
+ */
+void __init iSeries_pci_final_fixup(void)
+{
+ /* Fix up at the device node and pci_dev relationship */
+ mf_display_src(0xC9000100);
+ iSeries_activate_IRQs();
+ mf_display_src(0xC9000200);
}
-#endif
/*
* Config space read and write functions.
@@ -269,7 +479,7 @@ static u64 hv_cfg_write_func[4] = {
static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
int offset, int size, u32 *val)
{
- struct device_node *node = find_Device_Node(bus->number, devfn);
+ struct device_node *node = find_device_node(bus->number, devfn);
u64 fn;
struct HvCallPci_LoadReturn ret;
@@ -299,7 +509,7 @@ static int iSeries_pci_read_config(struct pci_bus *bus, unsigned int devfn,
static int iSeries_pci_write_config(struct pci_bus *bus, unsigned int devfn,
int offset, int size, u32 val)
{
- struct device_node *node = find_Device_Node(bus->number, devfn);
+ struct device_node *node = find_device_node(bus->number, devfn);
u64 fn;
u64 ret;
@@ -331,22 +541,22 @@ static struct pci_ops iSeries_pci_ops = {
* PCI: Device 23.90 ReadL Retry( 1)
* PCI: Device 23.90 ReadL Retry Successful(1)
*/
-static int CheckReturnCode(char *TextHdr, struct device_node *DevNode,
+static int check_return_code(char *type, struct device_node *dn,
int *retry, u64 ret)
{
if (ret != 0) {
- struct pci_dn *pdn = PCI_DN(DevNode);
+ struct pci_dn *pdn = PCI_DN(dn);
(*retry)++;
printk("PCI: %s: Device 0x%04X:%02X I/O Error(%2d): 0x%04X\n",
- TextHdr, pdn->busno, pdn->devfn,
+ type, pdn->busno, pdn->devfn,
*retry, (int)ret);
/*
* Bump the retry and check for retry count exceeded.
* If, Exceeded, panic the system.
*/
- if (((*retry) > Pci_Retry_Max) &&
- (Pci_Error_Flag > 0)) {
+ if (((*retry) > PCI_RETRY_MAX) &&
+ (limit_pci_retries > 0)) {
mf_display_src(0xB6000103);
panic_timeout = 0;
panic("PCI: Hardware I/O Error, SRC B6000103, "
@@ -363,28 +573,39 @@ static int CheckReturnCode(char *TextHdr, struct device_node *DevNode,
* the exposure of being device global.
*/
static inline struct device_node *xlate_iomm_address(
- const volatile void __iomem *IoAddress,
- u64 *dsaptr, u64 *BarOffsetPtr)
+ const volatile void __iomem *addr,
+ u64 *dsaptr, u64 *bar_offset, const char *func)
{
- unsigned long OrigIoAddr;
- unsigned long BaseIoAddr;
- unsigned long TableIndex;
- struct device_node *DevNode;
+ unsigned long orig_addr;
+ unsigned long base_addr;
+ unsigned long ind;
+ struct device_node *dn;
+
+ orig_addr = (unsigned long __force)addr;
+ if ((orig_addr < BASE_IO_MEMORY) || (orig_addr >= max_io_memory)) {
+ static unsigned long last_jiffies;
+ static int num_printed;
- OrigIoAddr = (unsigned long __force)IoAddress;
- if ((OrigIoAddr < BASE_IO_MEMORY) || (OrigIoAddr >= max_io_memory))
+ if ((jiffies - last_jiffies) > 60 * HZ) {
+ last_jiffies = jiffies;
+ num_printed = 0;
+ }
+ if (num_printed++ < 10)
+ printk(KERN_ERR
+ "iSeries_%s: invalid access at IO address %p\n",
+ func, addr);
return NULL;
- BaseIoAddr = OrigIoAddr - BASE_IO_MEMORY;
- TableIndex = BaseIoAddr / IOMM_TABLE_ENTRY_SIZE;
- DevNode = iomm_table[TableIndex];
-
- if (DevNode != NULL) {
- int barnum = iobar_table[TableIndex];
- *dsaptr = iseries_ds_addr(DevNode) | (barnum << 24);
- *BarOffsetPtr = BaseIoAddr % IOMM_TABLE_ENTRY_SIZE;
+ }
+ base_addr = orig_addr - BASE_IO_MEMORY;
+ ind = base_addr / IOMM_TABLE_ENTRY_SIZE;
+ dn = iomm_table[ind];
+
+ if (dn != NULL) {
+ *dsaptr = ds_addr_table[ind];
+ *bar_offset = base_addr % IOMM_TABLE_ENTRY_SIZE;
} else
- panic("PCI: Invalid PCI IoAddress detected!\n");
- return DevNode;
+ panic("PCI: Invalid PCI IO address detected!\n");
+ return dn;
}
/*
@@ -392,91 +613,58 @@ static inline struct device_node *xlate_iomm_address(
* On MM I/O error, all ones are returned and iSeries_pci_IoError is cal
* else, data is returned in Big Endian format.
*/
-static u8 iSeries_Read_Byte(const volatile void __iomem *IoAddress)
+static u8 iseries_readb(const volatile void __iomem *addr)
{
- u64 BarOffset;
+ u64 bar_offset;
u64 dsa;
int retry = 0;
struct HvCallPci_LoadReturn ret;
- struct device_node *DevNode =
- xlate_iomm_address(IoAddress, &dsa, &BarOffset);
-
- if (DevNode == NULL) {
- static unsigned long last_jiffies;
- static int num_printed;
+ struct device_node *dn =
+ xlate_iomm_address(addr, &dsa, &bar_offset, "read_byte");
- if ((jiffies - last_jiffies) > 60 * HZ) {
- last_jiffies = jiffies;
- num_printed = 0;
- }
- if (num_printed++ < 10)
- printk(KERN_ERR "iSeries_Read_Byte: invalid access at IO address %p\n",
- IoAddress);
+ if (dn == NULL)
return 0xff;
- }
do {
- HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, BarOffset, 0);
- } while (CheckReturnCode("RDB", DevNode, &retry, ret.rc) != 0);
+ HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, bar_offset, 0);
+ } while (check_return_code("RDB", dn, &retry, ret.rc) != 0);
return ret.value;
}
-static u16 iSeries_Read_Word(const volatile void __iomem *IoAddress)
+static u16 iseries_readw_be(const volatile void __iomem *addr)
{
- u64 BarOffset;
+ u64 bar_offset;
u64 dsa;
int retry = 0;
struct HvCallPci_LoadReturn ret;
- struct device_node *DevNode =
- xlate_iomm_address(IoAddress, &dsa, &BarOffset);
+ struct device_node *dn =
+ xlate_iomm_address(addr, &dsa, &bar_offset, "read_word");
- if (DevNode == NULL) {
- static unsigned long last_jiffies;
- static int num_printed;
-
- if ((jiffies - last_jiffies) > 60 * HZ) {
- last_jiffies = jiffies;
- num_printed = 0;
- }
- if (num_printed++ < 10)
- printk(KERN_ERR "iSeries_Read_Word: invalid access at IO address %p\n",
- IoAddress);
+ if (dn == NULL)
return 0xffff;
- }
do {
HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
- BarOffset, 0);
- } while (CheckReturnCode("RDW", DevNode, &retry, ret.rc) != 0);
+ bar_offset, 0);
+ } while (check_return_code("RDW", dn, &retry, ret.rc) != 0);
return ret.value;
}
-static u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
+static u32 iseries_readl_be(const volatile void __iomem *addr)
{
- u64 BarOffset;
+ u64 bar_offset;
u64 dsa;
int retry = 0;
struct HvCallPci_LoadReturn ret;
- struct device_node *DevNode =
- xlate_iomm_address(IoAddress, &dsa, &BarOffset);
-
- if (DevNode == NULL) {
- static unsigned long last_jiffies;
- static int num_printed;
+ struct device_node *dn =
+ xlate_iomm_address(addr, &dsa, &bar_offset, "read_long");
- if ((jiffies - last_jiffies) > 60 * HZ) {
- last_jiffies = jiffies;
- num_printed = 0;
- }
- if (num_printed++ < 10)
- printk(KERN_ERR "iSeries_Read_Long: invalid access at IO address %p\n",
- IoAddress);
+ if (dn == NULL)
return 0xffffffff;
- }
do {
HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
- BarOffset, 0);
- } while (CheckReturnCode("RDL", DevNode, &retry, ret.rc) != 0);
+ bar_offset, 0);
+ } while (check_return_code("RDL", dn, &retry, ret.rc) != 0);
return ret.value;
}
@@ -485,134 +673,72 @@ static u32 iSeries_Read_Long(const volatile void __iomem *IoAddress)
* Write MM I/O Instructions for the iSeries
*
*/
-static void iSeries_Write_Byte(u8 data, volatile void __iomem *IoAddress)
+static void iseries_writeb(u8 data, volatile void __iomem *addr)
{
- u64 BarOffset;
+ u64 bar_offset;
u64 dsa;
int retry = 0;
u64 rc;
- struct device_node *DevNode =
- xlate_iomm_address(IoAddress, &dsa, &BarOffset);
-
- if (DevNode == NULL) {
- static unsigned long last_jiffies;
- static int num_printed;
+ struct device_node *dn =
+ xlate_iomm_address(addr, &dsa, &bar_offset, "write_byte");
- if ((jiffies - last_jiffies) > 60 * HZ) {
- last_jiffies = jiffies;
- num_printed = 0;
- }
- if (num_printed++ < 10)
- printk(KERN_ERR "iSeries_Write_Byte: invalid access at IO address %p\n", IoAddress);
+ if (dn == NULL)
return;
- }
do {
- rc = HvCall4(HvCallPciBarStore8, dsa, BarOffset, data, 0);
- } while (CheckReturnCode("WWB", DevNode, &retry, rc) != 0);
+ rc = HvCall4(HvCallPciBarStore8, dsa, bar_offset, data, 0);
+ } while (check_return_code("WWB", dn, &retry, rc) != 0);
}
-static void iSeries_Write_Word(u16 data, volatile void __iomem *IoAddress)
+static void iseries_writew_be(u16 data, volatile void __iomem *addr)
{
- u64 BarOffset;
+ u64 bar_offset;
u64 dsa;
int retry = 0;
u64 rc;
- struct device_node *DevNode =
- xlate_iomm_address(IoAddress, &dsa, &BarOffset);
+ struct device_node *dn =
+ xlate_iomm_address(addr, &dsa, &bar_offset, "write_word");
- if (DevNode == NULL) {
- static unsigned long last_jiffies;
- static int num_printed;
-
- if ((jiffies - last_jiffies) > 60 * HZ) {
- last_jiffies = jiffies;
- num_printed = 0;
- }
- if (num_printed++ < 10)
- printk(KERN_ERR "iSeries_Write_Word: invalid access at IO address %p\n",
- IoAddress);
+ if (dn == NULL)
return;
- }
do {
- rc = HvCall4(HvCallPciBarStore16, dsa, BarOffset, data, 0);
- } while (CheckReturnCode("WWW", DevNode, &retry, rc) != 0);
+ rc = HvCall4(HvCallPciBarStore16, dsa, bar_offset, data, 0);
+ } while (check_return_code("WWW", dn, &retry, rc) != 0);
}
-static void iSeries_Write_Long(u32 data, volatile void __iomem *IoAddress)
+static void iseries_writel_be(u32 data, volatile void __iomem *addr)
{
- u64 BarOffset;
+ u64 bar_offset;
u64 dsa;
int retry = 0;
u64 rc;
- struct device_node *DevNode =
- xlate_iomm_address(IoAddress, &dsa, &BarOffset);
-
- if (DevNode == NULL) {
- static unsigned long last_jiffies;
- static int num_printed;
+ struct device_node *dn =
+ xlate_iomm_address(addr, &dsa, &bar_offset, "write_long");
- if ((jiffies - last_jiffies) > 60 * HZ) {
- last_jiffies = jiffies;
- num_printed = 0;
- }
- if (num_printed++ < 10)
- printk(KERN_ERR "iSeries_Write_Long: invalid access at IO address %p\n",
- IoAddress);
+ if (dn == NULL)
return;
- }
do {
- rc = HvCall4(HvCallPciBarStore32, dsa, BarOffset, data, 0);
- } while (CheckReturnCode("WWL", DevNode, &retry, rc) != 0);
-}
-
-static u8 iseries_readb(const volatile void __iomem *addr)
-{
- return iSeries_Read_Byte(addr);
+ rc = HvCall4(HvCallPciBarStore32, dsa, bar_offset, data, 0);
+ } while (check_return_code("WWL", dn, &retry, rc) != 0);
}
static u16 iseries_readw(const volatile void __iomem *addr)
{
- return le16_to_cpu(iSeries_Read_Word(addr));
+ return le16_to_cpu(iseries_readw_be(addr));
}
static u32 iseries_readl(const volatile void __iomem *addr)
{
- return le32_to_cpu(iSeries_Read_Long(addr));
-}
-
-static u16 iseries_readw_be(const volatile void __iomem *addr)
-{
- return iSeries_Read_Word(addr);
-}
-
-static u32 iseries_readl_be(const volatile void __iomem *addr)
-{
- return iSeries_Read_Long(addr);
-}
-
-static void iseries_writeb(u8 data, volatile void __iomem *addr)
-{
- iSeries_Write_Byte(data, addr);
+ return le32_to_cpu(iseries_readl_be(addr));
}
static void iseries_writew(u16 data, volatile void __iomem *addr)
{
- iSeries_Write_Word(cpu_to_le16(data), addr);
+ iseries_writew_be(cpu_to_le16(data), addr);
}
static void iseries_writel(u32 data, volatile void __iomem *addr)
{
- iSeries_Write_Long(cpu_to_le32(data), addr);
-}
-
-static void iseries_writew_be(u16 data, volatile void __iomem *addr)
-{
- iSeries_Write_Word(data, addr);
-}
-
-static void iseries_writel_be(u32 data, volatile void __iomem *addr)
-{
- iSeries_Write_Long(data, addr);
+ iseries_writel(cpu_to_le32(data), addr);
}
static void iseries_readsb(const volatile void __iomem *addr, void *buf,
@@ -620,7 +746,7 @@ static void iseries_readsb(const volatile void __iomem *addr, void *buf,
{
u8 *dst = buf;
while(count-- > 0)
- *(dst++) = iSeries_Read_Byte(addr);
+ *(dst++) = iseries_readb(addr);
}
static void iseries_readsw(const volatile void __iomem *addr, void *buf,
@@ -628,7 +754,7 @@ static void iseries_readsw(const volatile void __iomem *addr, void *buf,
{
u16 *dst = buf;
while(count-- > 0)
- *(dst++) = iSeries_Read_Word(addr);
+ *(dst++) = iseries_readw_be(addr);
}
static void iseries_readsl(const volatile void __iomem *addr, void *buf,
@@ -636,7 +762,7 @@ static void iseries_readsl(const volatile void __iomem *addr, void *buf,
{
u32 *dst = buf;
while(count-- > 0)
- *(dst++) = iSeries_Read_Long(addr);
+ *(dst++) = iseries_readl_be(addr);
}
static void iseries_writesb(volatile void __iomem *addr, const void *buf,
@@ -644,7 +770,7 @@ static void iseries_writesb(volatile void __iomem *addr, const void *buf,
{
const u8 *src = buf;
while(count-- > 0)
- iSeries_Write_Byte(*(src++), addr);
+ iseries_writeb(*(src++), addr);
}
static void iseries_writesw(volatile void __iomem *addr, const void *buf,
@@ -652,7 +778,7 @@ static void iseries_writesw(volatile void __iomem *addr, const void *buf,
{
const u16 *src = buf;
while(count-- > 0)
- iSeries_Write_Word(*(src++), addr);
+ iseries_writew_be(*(src++), addr);
}
static void iseries_writesl(volatile void __iomem *addr, const void *buf,
@@ -660,7 +786,7 @@ static void iseries_writesl(volatile void __iomem *addr, const void *buf,
{
const u32 *src = buf;
while(count-- > 0)
- iSeries_Write_Long(*(src++), addr);
+ iseries_writel_be(*(src++), addr);
}
static void iseries_memset_io(volatile void __iomem *addr, int c,
@@ -669,7 +795,7 @@ static void iseries_memset_io(volatile void __iomem *addr, int c,
volatile char __iomem *d = addr;
while (n-- > 0)
- iSeries_Write_Byte(c, d++);
+ iseries_writeb(c, d++);
}
static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
@@ -679,7 +805,7 @@ static void iseries_memcpy_fromio(void *dest, const volatile void __iomem *src,
const volatile char __iomem *s = src;
while (n-- > 0)
- *d++ = iSeries_Read_Byte(s++);
+ *d++ = iseries_readb(s++);
}
static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
@@ -689,7 +815,7 @@ static void iseries_memcpy_toio(volatile void __iomem *dest, const void *src,
volatile char __iomem *d = dest;
while (n-- > 0)
- iSeries_Write_Byte(*s++, d++);
+ iseries_writeb(*s++, d++);
}
/* We only set MMIO ops. The default PIO ops will be default
@@ -742,6 +868,8 @@ void __init iSeries_pcibios_init(void)
/* Install IO hooks */
ppc_pci_io = iseries_pci_io;
+ pci_probe_only = 1;
+
/* iSeries has no IO space in the common sense, it needs to set
* the IO base to 0
*/
@@ -767,11 +895,21 @@ void __init iSeries_pcibios_init(void)
phb = pcibios_alloc_controller(node);
if (phb == NULL)
continue;
+ /* All legacy iSeries PHBs are in domain zero */
+ phb->global_number = 0;
- phb->pci_mem_offset = bus;
phb->first_busno = bus;
phb->last_busno = bus;
phb->ops = &iSeries_pci_ops;
+ phb->io_base_virt = (void __iomem *)_IO_BASE;
+ phb->io_resource.flags = IORESOURCE_IO;
+ phb->io_resource.start = BASE_IO_MEMORY;
+ phb->io_resource.end = END_IO_MEMORY;
+ phb->io_resource.name = "iSeries PCI IO";
+ phb->mem_resources[0].flags = IORESOURCE_MEM;
+ phb->mem_resources[0].start = BASE_IO_MEMORY;
+ phb->mem_resources[0].end = END_IO_MEMORY;
+ phb->mem_resources[0].name = "Series PCI MEM";
}
of_node_put(root);
diff --git a/arch/powerpc/platforms/iseries/pci.h b/arch/powerpc/platforms/iseries/pci.h
index 33a8489fde5..d9cf974c271 100644
--- a/arch/powerpc/platforms/iseries/pci.h
+++ b/arch/powerpc/platforms/iseries/pci.h
@@ -30,10 +30,6 @@
* End Change Activity
*/
-#include <asm/pci-bridge.h>
-
-struct pci_dev; /* For Forward Reference */
-
/*
* Decodes Linux DevFn to iSeries DevFn, bridge device, or function.
* For Linux, see PCI_SLOT and PCI_FUNC in include/linux/pci.h
@@ -47,17 +43,16 @@ struct pci_dev; /* For Forward Reference */
#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
-/*
- * Generate a Direct Select Address for the Hypervisor
- */
-static inline u64 iseries_ds_addr(struct device_node *node)
-{
- struct pci_dn *pdn = PCI_DN(node);
-
- return ((u64)pdn->busno << 48) + ((u64)pdn->bussubno << 40)
- + ((u64)0x10 << 32);
-}
-
-extern void iSeries_Device_Information(struct pci_dev*, int);
+struct pci_dev;
+
+#ifdef CONFIG_PCI
+extern void iSeries_pcibios_init(void);
+extern void iSeries_pci_final_fixup(void);
+extern void iSeries_pcibios_fixup_resources(struct pci_dev *dev);
+#else
+static inline void iSeries_pcibios_init(void) { }
+static inline void iSeries_pci_final_fixup(void) { }
+static inline void iSeries_pcibios_fixup_resources(struct pci_dev *dev) {}
+#endif
#endif /* _PLATFORMS_ISERIES_PCI_H */
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index 0877a883411..b72120751bb 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -63,6 +63,7 @@
#include "main_store.h"
#include "call_sm.h"
#include "call_hpt.h"
+#include "pci.h"
#ifdef DEBUG
#define DBG(fmt...) udbg_printf(fmt)
@@ -74,11 +75,6 @@
static unsigned long build_iSeries_Memory_Map(void);
static void iseries_shared_idle(void);
static void iseries_dedicated_idle(void);
-#ifdef CONFIG_PCI
-extern void iSeries_pci_final_fixup(void);
-#else
-static void iSeries_pci_final_fixup(void) { }
-#endif
struct MemoryBlock {
@@ -112,13 +108,13 @@ static unsigned long iSeries_process_Condor_mainstore_vpd(
* correctly.
*/
mb_array[0].logicalStart = 0;
- mb_array[0].logicalEnd = 0x100000000;
+ mb_array[0].logicalEnd = 0x100000000UL;
mb_array[0].absStart = 0;
- mb_array[0].absEnd = 0x100000000;
+ mb_array[0].absEnd = 0x100000000UL;
if (holeSize) {
numMemoryBlocks = 2;
- holeStart = holeStart & 0x000fffffffffffff;
+ holeStart = holeStart & 0x000fffffffffffffUL;
holeStart = addr_to_chunk(holeStart);
holeFirstChunk = holeStart;
holeSize = addr_to_chunk(holeSize);
@@ -128,9 +124,9 @@ static unsigned long iSeries_process_Condor_mainstore_vpd(
mb_array[0].logicalEnd = holeFirstChunk;
mb_array[0].absEnd = holeFirstChunk;
mb_array[1].logicalStart = holeFirstChunk;
- mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
+ mb_array[1].logicalEnd = 0x100000000UL - holeSizeChunks;
mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
- mb_array[1].absEnd = 0x100000000;
+ mb_array[1].absEnd = 0x100000000UL;
}
return numMemoryBlocks;
}
@@ -234,9 +230,9 @@ static unsigned long iSeries_process_Regatta_mainstore_vpd(
mb_array[i].logicalEnd,
mb_array[i].absStart, mb_array[i].absEnd);
mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
- 0x000fffffffffffff);
+ 0x000fffffffffffffUL);
mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
- 0x000fffffffffffff);
+ 0x000fffffffffffffUL);
mb_array[i].logicalStart =
addr_to_chunk(mb_array[i].logicalStart);
mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
@@ -320,7 +316,7 @@ struct mschunks_map mschunks_map = {
};
EXPORT_SYMBOL(mschunks_map);
-void mschunks_alloc(unsigned long num_chunks)
+static void mschunks_alloc(unsigned long num_chunks)
{
klimit = _ALIGN(klimit, sizeof(u32));
mschunks_map.mapping = (u32 *)klimit;
@@ -499,6 +495,8 @@ static void __init iSeries_setup_arch(void)
itVpdAreas.xSlicMaxLogicalProcs);
printk("Max physical processors = %d\n",
itVpdAreas.xSlicMaxPhysicalProcs);
+
+ iSeries_pcibios_init();
}
static void iSeries_show_cpuinfo(struct seq_file *m)
@@ -641,24 +639,25 @@ static int __init iseries_probe(void)
}
define_machine(iseries) {
- .name = "iSeries",
- .setup_arch = iSeries_setup_arch,
- .show_cpuinfo = iSeries_show_cpuinfo,
- .init_IRQ = iSeries_init_IRQ,
- .get_irq = iSeries_get_irq,
- .init_early = iSeries_init_early,
- .pcibios_fixup = iSeries_pci_final_fixup,
- .restart = mf_reboot,
- .power_off = mf_power_off,
- .halt = mf_power_off,
- .get_boot_time = iSeries_get_boot_time,
- .set_rtc_time = iSeries_set_rtc_time,
- .get_rtc_time = iSeries_get_rtc_time,
- .calibrate_decr = generic_calibrate_decr,
- .progress = iSeries_progress,
- .probe = iseries_probe,
- .ioremap = iseries_ioremap,
- .iounmap = iseries_iounmap,
+ .name = "iSeries",
+ .setup_arch = iSeries_setup_arch,
+ .show_cpuinfo = iSeries_show_cpuinfo,
+ .init_IRQ = iSeries_init_IRQ,
+ .get_irq = iSeries_get_irq,
+ .init_early = iSeries_init_early,
+ .pcibios_fixup = iSeries_pci_final_fixup,
+ .pcibios_fixup_resources= iSeries_pcibios_fixup_resources,
+ .restart = mf_reboot,
+ .power_off = mf_power_off,
+ .halt = mf_power_off,
+ .get_boot_time = iSeries_get_boot_time,
+ .set_rtc_time = iSeries_set_rtc_time,
+ .get_rtc_time = iSeries_get_rtc_time,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = iSeries_progress,
+ .probe = iseries_probe,
+ .ioremap = iseries_ioremap,
+ .iounmap = iseries_iounmap,
/* XXX Implement enable_pmcs for iSeries */
};
diff --git a/arch/powerpc/platforms/iseries/setup.h b/arch/powerpc/platforms/iseries/setup.h
index 0a47ac53c95..729754bbb01 100644
--- a/arch/powerpc/platforms/iseries/setup.h
+++ b/arch/powerpc/platforms/iseries/setup.h
@@ -17,6 +17,7 @@
#ifndef __ISERIES_SETUP_H__
#define __ISERIES_SETUP_H__
+extern void *iSeries_early_setup(void);
extern unsigned long iSeries_get_boot_time(void);
extern int iSeries_set_rtc_time(struct rtc_time *tm);
extern void iSeries_get_rtc_time(struct rtc_time *tm);
diff --git a/arch/powerpc/platforms/iseries/vpdinfo.c b/arch/powerpc/platforms/iseries/vpdinfo.c
deleted file mode 100644
index 9f83878a0c2..00000000000
--- a/arch/powerpc/platforms/iseries/vpdinfo.c
+++ /dev/null
@@ -1,275 +0,0 @@
-/*
- * This code gets the card location of the hardware
- * Copyright (C) 2001 <Allan H Trautman> <IBM Corp>
- * Copyright (C) 2005 Stephen Rothwel, IBM Corp
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the:
- * Free Software Foundation, Inc.,
- * 59 Temple Place, Suite 330,
- * Boston, MA 02111-1307 USA
- *
- * Change Activity:
- * Created, Feb 2, 2001
- * Ported to ppc64, August 20, 2001
- * End Change Activity
- */
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/pci.h>
-
-#include <asm/types.h>
-#include <asm/resource.h>
-#include <asm/abs_addr.h>
-#include <asm/pci-bridge.h>
-#include <asm/iseries/hv_types.h>
-
-#include "pci.h"
-#include "call_pci.h"
-
-/*
- * Size of Bus VPD data
- */
-#define BUS_VPDSIZE 1024
-
-/*
- * Bus Vpd Tags
- */
-#define VpdEndOfAreaTag 0x79
-#define VpdIdStringTag 0x82
-#define VpdVendorAreaTag 0x84
-
-/*
- * Mfg Area Tags
- */
-#define VpdFruFrameId 0x4649 // "FI"
-#define VpdSlotMapFormat 0x4D46 // "MF"
-#define VpdSlotMap 0x534D // "SM"
-
-/*
- * Structures of the areas
- */
-struct MfgVpdAreaStruct {
- u16 Tag;
- u8 TagLength;
- u8 AreaData1;
- u8 AreaData2;
-};
-typedef struct MfgVpdAreaStruct MfgArea;
-#define MFG_ENTRY_SIZE 3
-
-struct SlotMapStruct {
- u8 AgentId;
- u8 SecondaryAgentId;
- u8 PhbId;
- char CardLocation[3];
- char Parms[8];
- char Reserved[2];
-};
-typedef struct SlotMapStruct SlotMap;
-#define SLOT_ENTRY_SIZE 16
-
-/*
- * Parse the Slot Area
- */
-static void __init iSeries_Parse_SlotArea(SlotMap *MapPtr, int MapLen,
- HvAgentId agent, u8 *PhbId, char card[4])
-{
- int SlotMapLen = MapLen;
- SlotMap *SlotMapPtr = MapPtr;
-
- /*
- * Parse Slot label until we find the one requested
- */
- while (SlotMapLen > 0) {
- if (SlotMapPtr->AgentId == agent) {
- /*
- * If Phb wasn't found, grab the entry first one found.
- */
- if (*PhbId == 0xff)
- *PhbId = SlotMapPtr->PhbId;
- /* Found it, extract the data. */
- if (SlotMapPtr->PhbId == *PhbId) {
- memcpy(card, &SlotMapPtr->CardLocation, 3);
- card[3] = 0;
- break;
- }
- }
- /* Point to the next Slot */
- SlotMapPtr = (SlotMap *)((char *)SlotMapPtr + SLOT_ENTRY_SIZE);
- SlotMapLen -= SLOT_ENTRY_SIZE;
- }
-}
-
-/*
- * Parse the Mfg Area
- */
-static void __init iSeries_Parse_MfgArea(u8 *AreaData, int AreaLen,
- HvAgentId agent, u8 *PhbId,
- u8 *frame, char card[4])
-{
- MfgArea *MfgAreaPtr = (MfgArea *)AreaData;
- int MfgAreaLen = AreaLen;
- u16 SlotMapFmt = 0;
-
- /* Parse Mfg Data */
- while (MfgAreaLen > 0) {
- int MfgTagLen = MfgAreaPtr->TagLength;
- /* Frame ID (FI 4649020310 ) */
- if (MfgAreaPtr->Tag == VpdFruFrameId) /* FI */
- *frame = MfgAreaPtr->AreaData1;
- /* Slot Map Format (MF 4D46020004 ) */
- else if (MfgAreaPtr->Tag == VpdSlotMapFormat) /* MF */
- SlotMapFmt = (MfgAreaPtr->AreaData1 * 256)
- + MfgAreaPtr->AreaData2;
- /* Slot Map (SM 534D90 */
- else if (MfgAreaPtr->Tag == VpdSlotMap) { /* SM */
- SlotMap *SlotMapPtr;
-
- if (SlotMapFmt == 0x1004)
- SlotMapPtr = (SlotMap *)((char *)MfgAreaPtr
- + MFG_ENTRY_SIZE + 1);
- else
- SlotMapPtr = (SlotMap *)((char *)MfgAreaPtr
- + MFG_ENTRY_SIZE);
- iSeries_Parse_SlotArea(SlotMapPtr, MfgTagLen,
- agent, PhbId, card);
- }
- /*
- * Point to the next Mfg Area
- * Use defined size, sizeof give wrong answer
- */
- MfgAreaPtr = (MfgArea *)((char *)MfgAreaPtr + MfgTagLen
- + MFG_ENTRY_SIZE);
- MfgAreaLen -= (MfgTagLen + MFG_ENTRY_SIZE);
- }
-}
-
-/*
- * Look for "BUS".. Data is not Null terminated.
- * PHBID of 0xFF indicates PHB was not found in VPD Data.
- */
-static int __init iSeries_Parse_PhbId(u8 *AreaPtr, int AreaLength)
-{
- u8 *PhbPtr = AreaPtr;
- int DataLen = AreaLength;
- char PhbId = 0xFF;
-
- while (DataLen > 0) {
- if ((*PhbPtr == 'B') && (*(PhbPtr + 1) == 'U')
- && (*(PhbPtr + 2) == 'S')) {
- PhbPtr += 3;
- while (*PhbPtr == ' ')
- ++PhbPtr;
- PhbId = (*PhbPtr & 0x0F);
- break;
- }
- ++PhbPtr;
- --DataLen;
- }
- return PhbId;
-}
-
-/*
- * Parse out the VPD Areas
- */
-static void __init iSeries_Parse_Vpd(u8 *VpdData, int VpdDataLen,
- HvAgentId agent, u8 *frame, char card[4])
-{
- u8 *TagPtr = VpdData;
- int DataLen = VpdDataLen - 3;
- u8 PhbId = 0xff;
-
- while ((*TagPtr != VpdEndOfAreaTag) && (DataLen > 0)) {
- int AreaLen = *(TagPtr + 1) + (*(TagPtr + 2) * 256);
- u8 *AreaData = TagPtr + 3;
-
- if (*TagPtr == VpdIdStringTag)
- PhbId = iSeries_Parse_PhbId(AreaData, AreaLen);
- else if (*TagPtr == VpdVendorAreaTag)
- iSeries_Parse_MfgArea(AreaData, AreaLen,
- agent, &PhbId, frame, card);
- /* Point to next Area. */
- TagPtr = AreaData + AreaLen;
- DataLen -= AreaLen;
- }
-}
-
-static int __init iSeries_Get_Location_Code(u16 bus, HvAgentId agent,
- u8 *frame, char card[4])
-{
- int status = 0;
- int BusVpdLen = 0;
- u8 *BusVpdPtr = kmalloc(BUS_VPDSIZE, GFP_KERNEL);
-
- if (BusVpdPtr == NULL) {
- printk("PCI: Bus VPD Buffer allocation failure.\n");
- return 0;
- }
- BusVpdLen = HvCallPci_getBusVpd(bus, iseries_hv_addr(BusVpdPtr),
- BUS_VPDSIZE);
- if (BusVpdLen == 0) {
- printk("PCI: Bus VPD Buffer zero length.\n");
- goto out_free;
- }
- /* printk("PCI: BusVpdPtr: %p, %d\n",BusVpdPtr, BusVpdLen); */
- /* Make sure this is what I think it is */
- if (*BusVpdPtr != VpdIdStringTag) { /* 0x82 */
- printk("PCI: Bus VPD Buffer missing starting tag.\n");
- goto out_free;
- }
- iSeries_Parse_Vpd(BusVpdPtr, BusVpdLen, agent, frame, card);
- status = 1;
-out_free:
- kfree(BusVpdPtr);
- return status;
-}
-
-/*
- * Prints the device information.
- * - Pass in pci_dev* pointer to the device.
- * - Pass in the device count
- *
- * Format:
- * PCI: Bus 0, Device 26, Vendor 0x12AE Frame 1, Card C10 Ethernet
- * controller
- */
-void __init iSeries_Device_Information(struct pci_dev *PciDev, int count)
-{
- struct device_node *DevNode = PciDev->sysdata;
- struct pci_dn *pdn;
- u16 bus;
- u8 frame = 0;
- char card[4];
- HvSubBusNumber subbus;
- HvAgentId agent;
-
- if (DevNode == NULL) {
- printk("%d. PCI: iSeries_Device_Information DevNode is NULL\n",
- count);
- return;
- }
-
- pdn = PCI_DN(DevNode);
- bus = pdn->busno;
- subbus = pdn->bussubno;
- agent = ISERIES_PCI_AGENTID(ISERIES_GET_DEVICE_FROM_SUBBUS(subbus),
- ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus));
-
- if (iSeries_Get_Location_Code(bus, agent, &frame, card)) {
- printk("%d. PCI: Bus%3d, Device%3d, Vendor %04X Frame%3d, "
- "Card %4s 0x%04X\n", count, bus,
- PCI_SLOT(PciDev->devfn), PciDev->vendor, frame,
- card, (int)(PciDev->class >> 8));
- }
-}
diff --git a/arch/powerpc/platforms/maple/Kconfig b/arch/powerpc/platforms/maple/Kconfig
index f7c95eb5d8b..a6467a5591f 100644
--- a/arch/powerpc/platforms/maple/Kconfig
+++ b/arch/powerpc/platforms/maple/Kconfig
@@ -1,6 +1,7 @@
config PPC_MAPLE
depends on PPC_MULTIPLATFORM && PPC64
bool "Maple 970FX Evaluation Board"
+ select PCI
select MPIC
select U3_DART
select MPIC_U3_HT_IRQS
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index 771ed0cf29a..3ffa0ac170e 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -558,7 +558,7 @@ void __init maple_pci_init(void)
* safe assumptions hopefully.
*/
if (u3_agp) {
- struct device_node *np = u3_agp->arch_data;
+ struct device_node *np = u3_agp->dn;
PCI_DN(np)->busno = 0xf0;
for (np = np->child; np; np = np->sibling)
PCI_DN(np)->busno = 0xf0;
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index 144177d77cf..3ce2d73b417 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -42,6 +42,7 @@
#include <linux/serial.h>
#include <linux/smp.h>
#include <linux/bitops.h>
+#include <linux/of_device.h>
#include <asm/processor.h>
#include <asm/sections.h>
@@ -56,7 +57,6 @@
#include <asm/dma.h>
#include <asm/cputable.h>
#include <asm/time.h>
-#include <asm/of_device.h>
#include <asm/lmb.h>
#include <asm/mpic.h>
#include <asm/rtas.h>
diff --git a/arch/powerpc/platforms/pasemi/Kconfig b/arch/powerpc/platforms/pasemi/Kconfig
index 735e1536cbf..348e0619e3e 100644
--- a/arch/powerpc/platforms/pasemi/Kconfig
+++ b/arch/powerpc/platforms/pasemi/Kconfig
@@ -3,6 +3,7 @@ config PPC_PASEMI
bool "PA Semi SoC-based platforms"
default n
select MPIC
+ select PCI
select PPC_UDBG_16550
select PPC_NATIVE
select MPIC_BROKEN_REGREAD
@@ -17,7 +18,7 @@ config PPC_PASEMI_IOMMU
bool "PA Semi IOMMU support"
depends on PPC_PASEMI
help
- IOMMU support for PA6T-1682M
+ IOMMU support for PA Semi PWRficient
config PPC_PASEMI_IOMMU_DMA_FORCE
bool "Force DMA engine to use IOMMU"
@@ -36,13 +37,4 @@ config PPC_PASEMI_MDIO
help
Driver for MDIO via GPIO on PWRficient platforms
-config ELECTRA_IDE
- tristate "Electra IDE driver"
- default y
- depends on PPC_PASEMI && ATA
- select PATA_PLATFORM
- help
- This includes driver support for the Electra on-board IDE
- interface.
-
endmenu
diff --git a/arch/powerpc/platforms/pasemi/Makefile b/arch/powerpc/platforms/pasemi/Makefile
index e636daa7a80..8f52d751579 100644
--- a/arch/powerpc/platforms/pasemi/Makefile
+++ b/arch/powerpc/platforms/pasemi/Makefile
@@ -1,4 +1,3 @@
obj-y += setup.o pci.o time.o idle.o powersave.o iommu.o dma_lib.o
obj-$(CONFIG_PPC_PASEMI_MDIO) += gpio_mdio.o
-obj-$(CONFIG_ELECTRA_IDE) += electra_ide.o
obj-$(CONFIG_PPC_PASEMI_CPUFREQ) += cpufreq.o
diff --git a/arch/powerpc/platforms/pasemi/cpufreq.c b/arch/powerpc/platforms/pasemi/cpufreq.c
index 1cfb8b0c8fe..58556b028a4 100644
--- a/arch/powerpc/platforms/pasemi/cpufreq.c
+++ b/arch/powerpc/platforms/pasemi/cpufreq.c
@@ -32,6 +32,7 @@
#include <asm/io.h>
#include <asm/prom.h>
#include <asm/time.h>
+#include <asm/smp.h>
#define SDCASR_REG 0x0100
#define SDCASR_REG_STRIDE 0x1000
@@ -124,6 +125,11 @@ static void set_astate(int cpu, unsigned int astate)
local_irq_restore(flags);
}
+int check_astate(void)
+{
+ return get_cur_astate(hard_smp_processor_id());
+}
+
void restore_astate(int cpu)
{
set_astate(cpu, current_astate);
@@ -147,7 +153,10 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
if (!cpu)
goto out;
- dn = of_find_compatible_node(NULL, "sdc", "1682m-sdc");
+ dn = of_find_compatible_node(NULL, NULL, "1682m-sdc");
+ if (!dn)
+ dn = of_find_compatible_node(NULL, NULL,
+ "pasemi,pwrficient-sdc");
if (!dn)
goto out;
err = of_address_to_resource(dn, 0, &res);
@@ -160,7 +169,10 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy)
goto out;
}
- dn = of_find_compatible_node(NULL, "gizmo", "1682m-gizmo");
+ dn = of_find_compatible_node(NULL, NULL, "1682m-gizmo");
+ if (!dn)
+ dn = of_find_compatible_node(NULL, NULL,
+ "pasemi,pwrficient-gizmo");
if (!dn) {
err = -ENODEV;
goto out_unmap_sdcasr;
@@ -292,7 +304,8 @@ static struct cpufreq_driver pas_cpufreq_driver = {
static int __init pas_cpufreq_init(void)
{
- if (!machine_is_compatible("PA6T-1682M"))
+ if (!machine_is_compatible("PA6T-1682M") &&
+ !machine_is_compatible("pasemi,pwrficient"))
return -ENODEV;
return cpufreq_register_driver(&pas_cpufreq_driver);
diff --git a/arch/powerpc/platforms/pasemi/electra_ide.c b/arch/powerpc/platforms/pasemi/electra_ide.c
deleted file mode 100644
index 12fb0c94926..00000000000
--- a/arch/powerpc/platforms/pasemi/electra_ide.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * Copyright (C) 2007 PA Semi, Inc
- *
- * Maintained by: Olof Johansson <olof@lixom.net>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/platform_device.h>
-
-#include <asm/prom.h>
-#include <asm/system.h>
-
-/* The electra IDE interface is incredibly simple: Just a device on the localbus
- * with interrupts hooked up to one of the GPIOs. The device tree contains the
- * address window and interrupt mappings already, and the pata_platform driver handles
- * the rest. We just need to hook the two up.
- */
-
-#define MAX_IFS 4 /* really, we have only one */
-
-static struct platform_device *pdevs[MAX_IFS];
-
-static int __devinit electra_ide_init(void)
-{
- struct device_node *np;
- struct resource r[3];
- int ret = 0;
- int i;
-
- np = of_find_compatible_node(NULL, "ide", "electra-ide");
- i = 0;
-
- while (np && i < MAX_IFS) {
- memset(r, 0, sizeof(r));
-
- /* pata_platform wants two address ranges: one for the base registers,
- * another for the control (altstatus). It's located at offset 0x3f6 in
- * the window, but the device tree only has one large register window
- * that covers both ranges. So we need to split it up by hand here:
- */
-
- ret = of_address_to_resource(np, 0, &r[0]);
- if (ret)
- goto out;
- ret = of_address_to_resource(np, 0, &r[1]);
- if (ret)
- goto out;
-
- r[1].start += 0x3f6;
- r[0].end = r[1].start-1;
-
- r[2].start = irq_of_parse_and_map(np, 0);
- r[2].end = irq_of_parse_and_map(np, 0);
- r[2].flags = IORESOURCE_IRQ;
-
- pr_debug("registering platform device at 0x%lx/0x%lx, irq is %ld\n",
- r[0].start, r[1].start, r[2].start);
- pdevs[i] = platform_device_register_simple("pata_platform", i, r, 3);
- if (IS_ERR(pdevs[i])) {
- ret = PTR_ERR(pdevs[i]);
- pdevs[i] = NULL;
- goto out;
- }
- np = of_find_compatible_node(np, "ide", "electra-ide");
- }
-out:
- return ret;
-}
-module_init(electra_ide_init);
-
-static void __devexit electra_ide_exit(void)
-{
- int i;
-
- for (i = 0; i < MAX_IFS; i++)
- if (pdevs[i])
- platform_device_unregister(pdevs[i]);
-}
-module_exit(electra_ide_exit);
-
-
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
-MODULE_DESCRIPTION("PA Semi Electra IDE driver");
diff --git a/arch/powerpc/platforms/pasemi/gpio_mdio.c b/arch/powerpc/platforms/pasemi/gpio_mdio.c
index dae9f658122..b46542990cf 100644
--- a/arch/powerpc/platforms/pasemi/gpio_mdio.c
+++ b/arch/powerpc/platforms/pasemi/gpio_mdio.c
@@ -30,7 +30,7 @@
#include <linux/interrupt.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
#define DELAY 1
@@ -218,45 +218,27 @@ static int __devinit gpio_mdio_probe(struct of_device *ofdev,
const struct of_device_id *match)
{
struct device *dev = &ofdev->dev;
- struct device_node *np = ofdev->node;
- struct device_node *gpio_np;
+ struct device_node *phy_dn, *np = ofdev->node;
struct mii_bus *new_bus;
- struct resource res;
struct gpio_priv *priv;
const unsigned int *prop;
- int err = 0;
+ int err;
int i;
- gpio_np = of_find_compatible_node(NULL, "gpio", "1682m-gpio");
-
- if (!gpio_np)
- return -ENODEV;
-
- err = of_address_to_resource(gpio_np, 0, &res);
- of_node_put(gpio_np);
-
- if (err)
- return -EINVAL;
-
- if (!gpio_regs)
- gpio_regs = ioremap(res.start, 0x100);
-
- if (!gpio_regs)
- return -EPERM;
-
+ err = -ENOMEM;
priv = kzalloc(sizeof(struct gpio_priv), GFP_KERNEL);
- if (priv == NULL)
- return -ENOMEM;
+ if (!priv)
+ goto out;
new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
- if (new_bus == NULL)
- return -ENOMEM;
+ if (!new_bus)
+ goto out_free_priv;
- new_bus->name = "pasemi gpio mdio bus",
- new_bus->read = &gpio_mdio_read,
- new_bus->write = &gpio_mdio_write,
- new_bus->reset = &gpio_mdio_reset,
+ new_bus->name = "pasemi gpio mdio bus";
+ new_bus->read = &gpio_mdio_read;
+ new_bus->write = &gpio_mdio_write;
+ new_bus->reset = &gpio_mdio_reset;
prop = of_get_property(np, "reg", NULL);
new_bus->id = *prop;
@@ -265,9 +247,24 @@ static int __devinit gpio_mdio_probe(struct of_device *ofdev,
new_bus->phy_mask = 0;
new_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
- for(i = 0; i < PHY_MAX_ADDR; ++i)
- new_bus->irq[i] = irq_create_mapping(NULL, 10);
+ if (!new_bus->irq)
+ goto out_free_bus;
+
+ for (i = 0; i < PHY_MAX_ADDR; i++)
+ new_bus->irq[i] = NO_IRQ;
+
+ for (phy_dn = of_get_next_child(np, NULL);
+ phy_dn != NULL;
+ phy_dn = of_get_next_child(np, phy_dn)) {
+ const unsigned int *ip, *regp;
+
+ ip = of_get_property(phy_dn, "interrupts", NULL);
+ regp = of_get_property(phy_dn, "reg", NULL);
+ if (!ip || !regp || *regp >= PHY_MAX_ADDR)
+ continue;
+ new_bus->irq[*regp] = irq_create_mapping(NULL, *ip);
+ }
prop = of_get_property(np, "mdc-pin", NULL);
priv->mdc_pin = *prop;
@@ -280,17 +277,21 @@ static int __devinit gpio_mdio_probe(struct of_device *ofdev,
err = mdiobus_register(new_bus);
- if (0 != err) {
+ if (err != 0) {
printk(KERN_ERR "%s: Cannot register as MDIO bus, err %d\n",
new_bus->name, err);
- goto bus_register_fail;
+ goto out_free_irq;
}
return 0;
-bus_register_fail:
+out_free_irq:
+ kfree(new_bus->irq);
+out_free_bus:
kfree(new_bus);
-
+out_free_priv:
+ kfree(priv);
+out:
return err;
}
@@ -317,6 +318,7 @@ static struct of_device_id gpio_mdio_match[] =
},
{},
};
+MODULE_DEVICE_TABLE(of, gpio_mdio_match);
static struct of_platform_driver gpio_mdio_driver =
{
@@ -330,12 +332,32 @@ static struct of_platform_driver gpio_mdio_driver =
int gpio_mdio_init(void)
{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "1682m-gpio");
+ if (!np)
+ np = of_find_compatible_node(NULL, NULL,
+ "pasemi,pwrficient-gpio");
+ if (!np)
+ return -ENODEV;
+ gpio_regs = of_iomap(np, 0);
+ of_node_put(np);
+
+ if (!gpio_regs)
+ return -ENODEV;
+
return of_register_platform_driver(&gpio_mdio_driver);
}
+module_init(gpio_mdio_init);
void gpio_mdio_exit(void)
{
of_unregister_platform_driver(&gpio_mdio_driver);
+ if (gpio_regs)
+ iounmap(gpio_regs);
}
-device_initcall(gpio_mdio_init);
+module_exit(gpio_mdio_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Olof Johansson <olof@lixom.net>");
+MODULE_DESCRIPTION("Driver for MDIO over GPIO on PA Semi PWRficient-based boards");
diff --git a/arch/powerpc/platforms/pasemi/idle.c b/arch/powerpc/platforms/pasemi/idle.c
index d8e1fcc7851..43911d8b020 100644
--- a/arch/powerpc/platforms/pasemi/idle.c
+++ b/arch/powerpc/platforms/pasemi/idle.c
@@ -74,9 +74,6 @@ static int pasemi_system_reset_exception(struct pt_regs *regs)
static int __init pasemi_idle_init(void)
{
- if (!machine_is(pasemi))
- return -ENODEV;
-
#ifndef CONFIG_PPC_PASEMI_CPUFREQ
printk(KERN_WARNING "No cpufreq driver, powersavings modes disabled\n");
current_mode = 0;
@@ -88,7 +85,7 @@ static int __init pasemi_idle_init(void)
return 0;
}
-late_initcall(pasemi_idle_init);
+machine_late_initcall(pasemi, pasemi_idle_init);
static int __init idle_param(char *p)
{
diff --git a/arch/powerpc/platforms/pasemi/pasemi.h b/arch/powerpc/platforms/pasemi/pasemi.h
index 58b344c6fc3..b1e524f7489 100644
--- a/arch/powerpc/platforms/pasemi/pasemi.h
+++ b/arch/powerpc/platforms/pasemi/pasemi.h
@@ -17,8 +17,14 @@ extern void idle_doze(void);
/* Restore astate to last set */
#ifdef CONFIG_PPC_PASEMI_CPUFREQ
+extern int check_astate(void);
extern void restore_astate(int cpu);
#else
+static inline int check_astate(void)
+{
+ /* Always return >0 so we never power save */
+ return 1;
+}
static inline void restore_astate(int cpu)
{
}
diff --git a/arch/powerpc/platforms/pasemi/powersave.S b/arch/powerpc/platforms/pasemi/powersave.S
index 6d0fba6aab1..56f45adcd08 100644
--- a/arch/powerpc/platforms/pasemi/powersave.S
+++ b/arch/powerpc/platforms/pasemi/powersave.S
@@ -62,7 +62,16 @@ sleep_common:
mflr r0
std r0, 16(r1)
stdu r1,-64(r1)
+#ifdef CONFIG_PPC_PASEMI_CPUFREQ
+ std r3, 48(r1)
+ /* Only do power savings when in astate 0 */
+ bl .check_astate
+ cmpwi r3,0
+ bne 1f
+
+ ld r3, 48(r1)
+#endif
LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE)
mfmsr r4
andc r5,r4,r6
@@ -73,7 +82,7 @@ sleep_common:
mtmsrd r4,0
- addi r1,r1,64
+1: addi r1,r1,64
ld r0,16(r1)
mtlr r0
blr
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index 3d62060498b..c64fb5bfb37 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -27,6 +27,7 @@
#include <linux/delay.h>
#include <linux/console.h>
#include <linux/pci.h>
+#include <linux/of_platform.h>
#include <asm/prom.h>
#include <asm/system.h>
@@ -35,7 +36,7 @@
#include <asm/mpic.h>
#include <asm/smp.h>
#include <asm/time.h>
-#include <asm/of_platform.h>
+#include <asm/mmu.h>
#include <pcmcia/ss.h>
#include <pcmcia/cistpl.h>
@@ -43,6 +44,10 @@
#include "pasemi.h"
+#if !defined(CONFIG_SMP)
+static void smp_send_stop(void) {}
+#endif
+
/* SDC reset register, must be pre-mapped at reset time */
static void __iomem *reset_reg;
@@ -56,10 +61,14 @@ struct mce_regs {
static struct mce_regs mce_regs[MAX_MCE_REGS];
static int num_mce_regs;
+static int nmi_virq = NO_IRQ;
static void pas_restart(char *cmd)
{
+ /* Need to put others cpu in hold loop so they're not sleeping */
+ smp_send_stop();
+ udelay(10000);
printk("Restarting...\n");
while (1)
out_le32(reset_reg, 0x6000000);
@@ -126,9 +135,6 @@ static int __init pas_setup_mce_regs(void)
struct pci_dev *dev;
int reg;
- if (!machine_is(pasemi))
- return -ENODEV;
-
/* Remap various SoC status registers for use by the MCE handler */
reg = 0;
@@ -172,7 +178,7 @@ static int __init pas_setup_mce_regs(void)
return 0;
}
-device_initcall(pas_setup_mce_regs);
+machine_device_initcall(pasemi, pas_setup_mce_regs);
static __init void pas_init_IRQ(void)
{
@@ -181,6 +187,8 @@ static __init void pas_init_IRQ(void)
unsigned long openpic_addr;
const unsigned int *opprop;
int naddr, opplen;
+ int mpic_flags;
+ const unsigned int *nmiprop;
struct mpic *mpic;
mpic_node = NULL;
@@ -213,13 +221,26 @@ static __init void pas_init_IRQ(void)
openpic_addr = of_read_number(opprop, naddr);
printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
+ mpic_flags = MPIC_PRIMARY | MPIC_LARGE_VECTORS | MPIC_NO_BIAS;
+
+ nmiprop = of_get_property(mpic_node, "nmi-source", NULL);
+ if (nmiprop)
+ mpic_flags |= MPIC_ENABLE_MCK;
+
mpic = mpic_alloc(mpic_node, openpic_addr,
- MPIC_PRIMARY|MPIC_LARGE_VECTORS,
- 0, 0, " PAS-OPIC ");
+ mpic_flags, 0, 0, "PASEMI-OPIC");
BUG_ON(!mpic);
mpic_assign_isu(mpic, 0, openpic_addr + 0x10000);
mpic_init(mpic);
+ /* The NMI/MCK source needs to be prio 15 */
+ if (nmiprop) {
+ nmi_virq = irq_create_mapping(NULL, *nmiprop);
+ mpic_irq_set_priority(nmi_virq, 15);
+ set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING);
+ mpic_unmask_irq(nmi_virq);
+ }
+
of_node_put(mpic_node);
of_node_put(root);
}
@@ -239,6 +260,14 @@ static int pas_machine_check_handler(struct pt_regs *regs)
srr0 = regs->nip;
srr1 = regs->msr;
+
+ if (nmi_virq != NO_IRQ && mpic_get_mcirq() == nmi_virq) {
+ printk(KERN_ERR "NMI delivered\n");
+ debugger(regs);
+ mpic_end_irq(nmi_virq);
+ goto out;
+ }
+
dsisr = mfspr(SPRN_DSISR);
printk(KERN_ERR "Machine Check on CPU %d\n", cpu);
printk(KERN_ERR "SRR0 0x%016lx SRR1 0x%016lx\n", srr0, srr1);
@@ -295,14 +324,14 @@ static int pas_machine_check_handler(struct pt_regs *regs)
int i;
printk(KERN_ERR "slb contents:\n");
- for (i = 0; i < SLB_NUM_ENTRIES; i++) {
+ for (i = 0; i < mmu_slb_size; i++) {
asm volatile("slbmfee %0,%1" : "=r" (e) : "r" (i));
asm volatile("slbmfev %0,%1" : "=r" (v) : "r" (i));
printk(KERN_ERR "%02d %016lx %016lx\n", i, e, v);
}
}
-
+out:
/* SRR1[62] is from MSR[62] if recoverable, so pass that back */
return !!(srr1 & 0x2);
}
@@ -362,16 +391,17 @@ static inline void pasemi_pcmcia_init(void)
static struct of_device_id pasemi_bus_ids[] = {
+ /* Unfortunately needed for legacy firmwares */
{ .type = "localbus", },
{ .type = "sdc", },
+ /* These are the proper entries, which newer firmware uses */
+ { .compatible = "pasemi,localbus", },
+ { .compatible = "pasemi,sdc", },
{},
};
static int __init pasemi_publish_devices(void)
{
- if (!machine_is(pasemi))
- return 0;
-
pasemi_pcmcia_init();
/* Publish OF platform devices for SDC and other non-PCI devices */
@@ -379,7 +409,7 @@ static int __init pasemi_publish_devices(void)
return 0;
}
-device_initcall(pasemi_publish_devices);
+machine_device_initcall(pasemi, pasemi_publish_devices);
/*
@@ -389,7 +419,8 @@ static int __init pas_probe(void)
{
unsigned long root = of_get_flat_dt_root();
- if (!of_flat_dt_is_compatible(root, "PA6T-1682M"))
+ if (!of_flat_dt_is_compatible(root, "PA6T-1682M") &&
+ !of_flat_dt_is_compatible(root, "pasemi,pwrficient"))
return 0;
hpte_init_native();
@@ -400,7 +431,7 @@ static int __init pas_probe(void)
}
define_machine(pasemi) {
- .name = "PA Semi PA6T-1682M",
+ .name = "PA Semi PWRficient",
.probe = pas_probe,
.setup_arch = pas_setup_arch,
.init_early = pas_init_early,
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index da2007e3db0..21226b74c9b 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -585,8 +585,7 @@ static void __init kw_i2c_probe(void)
struct device_node *np, *child, *parent;
/* Probe keywest-i2c busses */
- for (np = NULL;
- (np = of_find_compatible_node(np, "i2c","keywest-i2c")) != NULL;){
+ for_each_compatible_node(np, "i2c","keywest-i2c") {
struct pmac_i2c_host_kw *host;
int multibus, chans, i;
@@ -1462,9 +1461,6 @@ int __init pmac_i2c_init(void)
return 0;
i2c_inited = 1;
- if (!machine_is(powermac))
- return 0;
-
/* Probe keywest-i2c busses */
kw_i2c_probe();
@@ -1483,7 +1479,7 @@ int __init pmac_i2c_init(void)
return 0;
}
-arch_initcall(pmac_i2c_init);
+machine_arch_initcall(powermac, pmac_i2c_init);
/* Since pmac_i2c_init can be called too early for the platform device
* registration, we need to do it at a later time. In our case, subsys
@@ -1515,4 +1511,4 @@ static int __init pmac_i2c_create_platform_devices(void)
return 0;
}
-subsys_initcall(pmac_i2c_create_platform_devices);
+machine_subsys_initcall(powermac, pmac_i2c_create_platform_devices);
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index f852ae3e0ee..1c58db9d42c 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -40,8 +40,6 @@
static int has_uninorth;
#ifdef CONFIG_PPC64
static struct pci_controller *u3_agp;
-static struct pci_controller *u4_pcie;
-static struct pci_controller *u3_ht;
#else
static int has_second_ohare;
#endif /* CONFIG_PPC64 */
@@ -314,12 +312,15 @@ static int u3_ht_skip_device(struct pci_controller *hose,
/* We only allow config cycles to devices that are in OF device-tree
* as we are apparently having some weird things going on with some
- * revs of K2 on recent G5s
+ * revs of K2 on recent G5s, except for the host bridge itself, which
+ * is missing from the tree but we know we can probe.
*/
if (bus->self)
busdn = pci_device_to_OF_node(bus->self);
+ else if (devfn == 0)
+ return 0;
else
- busdn = hose->arch_data;
+ busdn = hose->dn;
for (dn = busdn->child; dn; dn = dn->sibling)
if (PCI_DN(dn) && PCI_DN(dn)->devfn == devfn)
break;
@@ -344,14 +345,15 @@ static int u3_ht_skip_device(struct pci_controller *hose,
+ (((unsigned int)bus) << 16) \
+ 0x01000000UL)
-static volatile void __iomem *u3_ht_cfg_access(struct pci_controller* hose,
- u8 bus, u8 devfn, u8 offset)
+static void __iomem *u3_ht_cfg_access(struct pci_controller *hose, u8 bus,
+ u8 devfn, u8 offset, int *swap)
{
+ *swap = 1;
if (bus == hose->first_busno) {
- /* For now, we don't self probe U3 HT bridge */
- if (PCI_SLOT(devfn) == 0)
- return NULL;
- return hose->cfg_data + U3_HT_CFA0(devfn, offset);
+ if (devfn != 0)
+ return hose->cfg_data + U3_HT_CFA0(devfn, offset);
+ *swap = 0;
+ return ((void __iomem *)hose->cfg_addr) + (offset << 2);
} else
return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset);
}
@@ -360,14 +362,15 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 *val)
{
struct pci_controller *hose;
- volatile void __iomem *addr;
+ void __iomem *addr;
+ int swap;
hose = pci_bus_to_host(bus);
if (hose == NULL)
return PCIBIOS_DEVICE_NOT_FOUND;
if (offset >= 0x100)
return PCIBIOS_BAD_REGISTER_NUMBER;
- addr = u3_ht_cfg_access(hose, bus->number, devfn, offset);
+ addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap);
if (!addr)
return PCIBIOS_DEVICE_NOT_FOUND;
@@ -397,10 +400,10 @@ static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,
*val = in_8(addr);
break;
case 2:
- *val = in_le16(addr);
+ *val = swap ? in_le16(addr) : in_be16(addr);
break;
default:
- *val = in_le32(addr);
+ *val = swap ? in_le32(addr) : in_be32(addr);
break;
}
return PCIBIOS_SUCCESSFUL;
@@ -410,14 +413,15 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
int offset, int len, u32 val)
{
struct pci_controller *hose;
- volatile void __iomem *addr;
+ void __iomem *addr;
+ int swap;
hose = pci_bus_to_host(bus);
if (hose == NULL)
return PCIBIOS_DEVICE_NOT_FOUND;
if (offset >= 0x100)
return PCIBIOS_BAD_REGISTER_NUMBER;
- addr = u3_ht_cfg_access(hose, bus->number, devfn, offset);
+ addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap);
if (!addr)
return PCIBIOS_DEVICE_NOT_FOUND;
@@ -439,10 +443,10 @@ static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn,
out_8(addr, val);
break;
case 2:
- out_le16(addr, val);
+ swap ? out_le16(addr, val) : out_be16(addr, val);
break;
default:
- out_le32((u32 __iomem *)addr, val);
+ swap ? out_le32(addr, val) : out_be32(addr, val);
break;
}
return PCIBIOS_SUCCESSFUL;
@@ -725,7 +729,7 @@ static void __init setup_bandit(struct pci_controller *hose,
static int __init setup_uninorth(struct pci_controller *hose,
struct resource *addr)
{
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
has_uninorth = 1;
hose->ops = &macrisc_pci_ops;
hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
@@ -773,31 +777,72 @@ static void __init setup_u4_pcie(struct pci_controller* hose)
*/
hose->first_busno = 0x00;
hose->last_busno = 0xff;
- u4_pcie = hose;
}
-static void __init setup_u3_ht(struct pci_controller* hose)
+static void __init parse_region_decode(struct pci_controller *hose,
+ u32 decode)
{
- struct device_node *np = (struct device_node *)hose->arch_data;
- struct pci_controller *other = NULL;
- int i, cur;
+ unsigned long base, end, next = -1;
+ int i, cur = -1;
+ /* Iterate through all bits. We ignore the last bit as this region is
+ * reserved for the ROM among other niceties
+ */
+ for (i = 0; i < 31; i++) {
+ if ((decode & (0x80000000 >> i)) == 0)
+ continue;
+ if (i < 16) {
+ base = 0xf0000000 | (((u32)i) << 24);
+ end = base + 0x00ffffff;
+ } else {
+ base = ((u32)i-16) << 28;
+ end = base + 0x0fffffff;
+ }
+ if (base != next) {
+ if (++cur >= 3) {
+ printk(KERN_WARNING "PCI: Too many ranges !\n");
+ break;
+ }
+ hose->mem_resources[cur].flags = IORESOURCE_MEM;
+ hose->mem_resources[cur].name = hose->dn->full_name;
+ hose->mem_resources[cur].start = base;
+ hose->mem_resources[cur].end = end;
+ DBG(" %d: 0x%08lx-0x%08lx\n", cur, base, end);
+ } else {
+ DBG(" : -0x%08lx\n", end);
+ hose->mem_resources[cur].end = end;
+ }
+ next = end + 1;
+ }
+}
+
+static void __init setup_u3_ht(struct pci_controller* hose)
+{
+ struct device_node *np = hose->dn;
+ struct resource cfg_res, self_res;
+ u32 decode;
hose->ops = &u3_ht_pci_ops;
- /* We hard code the address because of the different size of
- * the reg address cell, we shall fix that by killing struct
- * reg_property and using some accessor functions instead
+ /* Get base addresses from OF tree
*/
- hose->cfg_data = ioremap(0xf2000000, 0x02000000);
+ if (of_address_to_resource(np, 0, &cfg_res) ||
+ of_address_to_resource(np, 1, &self_res)) {
+ printk(KERN_ERR "PCI: Failed to get U3/U4 HT resources !\n");
+ return;
+ }
+
+ /* Map external cfg space access into cfg_data and self registers
+ * into cfg_addr
+ */
+ hose->cfg_data = ioremap(cfg_res.start, 0x02000000);
+ hose->cfg_addr = ioremap(self_res.start,
+ self_res.end - self_res.start + 1);
/*
- * /ht node doesn't expose a "ranges" property, so we "remove"
- * regions that have been allocated to AGP. So far, this version of
- * the code doesn't assign any of the 0xfxxxxxxx "fine" memory regions
- * to /ht. We need to fix that sooner or later by either parsing all
- * child "ranges" properties or figuring out the U3 address space
- * decoding logic and then read its configuration register (if any).
+ * /ht node doesn't expose a "ranges" property, we read the register
+ * that controls the decoding logic and use that for memory regions.
+ * The IO region is hard coded since it is fixed in HW as well.
*/
hose->io_base_phys = 0xf4000000;
hose->pci_io_size = 0x00400000;
@@ -808,76 +853,33 @@ static void __init setup_u3_ht(struct pci_controller* hose)
hose->pci_mem_offset = 0;
hose->first_busno = 0;
hose->last_busno = 0xef;
- hose->mem_resources[0].name = np->full_name;
- hose->mem_resources[0].start = 0x80000000;
- hose->mem_resources[0].end = 0xefffffff;
- hose->mem_resources[0].flags = IORESOURCE_MEM;
-
- u3_ht = hose;
- if (u3_agp != NULL)
- other = u3_agp;
- else if (u4_pcie != NULL)
- other = u4_pcie;
-
- if (other == NULL) {
- DBG("U3/4 has no AGP/PCIE, using full resource range\n");
- return;
- }
+ /* Note: fix offset when cfg_addr becomes a void * */
+ decode = in_be32(hose->cfg_addr + 0x80);
- /* Fixup bus range vs. PCIE */
- if (u4_pcie)
- hose->last_busno = u4_pcie->first_busno - 1;
+ DBG("PCI: Apple HT bridge decode register: 0x%08x\n", decode);
- /* We "remove" the AGP resources from the resources allocated to HT,
- * that is we create "holes". However, that code does assumptions
- * that so far happen to be true (cross fingers...), typically that
- * resources in the AGP node are properly ordered
+ /* NOTE: The decode register setup is a bit weird... region
+ * 0xf8000000 for example is marked as enabled in there while it's
+ & actually the memory controller registers.
+ * That means that we are incorrectly attributing it to HT.
+ *
+ * In a similar vein, region 0xf4000000 is actually the HT IO space but
+ * also marked as enabled in here and 0xf9000000 is used by some other
+ * internal bits of the northbridge.
+ *
+ * Unfortunately, we can't just mask out those bit as we would end
+ * up with more regions than we can cope (linux can only cope with
+ * 3 memory regions for a PHB at this stage).
+ *
+ * So for now, we just do a little hack. We happen to -know- that
+ * Apple firmware doesn't assign things below 0xfa000000 for that
+ * bridge anyway so we mask out all bits we don't want.
*/
- cur = 0;
- for (i=0; i<3; i++) {
- struct resource *res = &other->mem_resources[i];
- if (res->flags != IORESOURCE_MEM)
- continue;
- /* We don't care about "fine" resources */
- if (res->start >= 0xf0000000)
- continue;
- /* Check if it's just a matter of "shrinking" us in one
- * direction
- */
- if (hose->mem_resources[cur].start == res->start) {
- DBG("U3/HT: shrink start of %d, %08lx -> %08lx\n",
- cur, hose->mem_resources[cur].start,
- res->end + 1);
- hose->mem_resources[cur].start = res->end + 1;
- continue;
- }
- if (hose->mem_resources[cur].end == res->end) {
- DBG("U3/HT: shrink end of %d, %08lx -> %08lx\n",
- cur, hose->mem_resources[cur].end,
- res->start - 1);
- hose->mem_resources[cur].end = res->start - 1;
- continue;
- }
- /* No, it's not the case, we need a hole */
- if (cur == 2) {
- /* not enough resources for a hole, we drop part
- * of the range
- */
- printk(KERN_WARNING "Running out of resources"
- " for /ht host !\n");
- hose->mem_resources[cur].end = res->start - 1;
- continue;
- }
- cur++;
- DBG("U3/HT: hole, %d end at %08lx, %d start at %08lx\n",
- cur-1, res->start - 1, cur, res->end + 1);
- hose->mem_resources[cur].name = np->full_name;
- hose->mem_resources[cur].flags = IORESOURCE_MEM;
- hose->mem_resources[cur].start = res->end + 1;
- hose->mem_resources[cur].end = hose->mem_resources[cur-1].end;
- hose->mem_resources[cur-1].end = res->start - 1;
- }
+ decode &= 0x003fffff;
+
+ /* Now parse the resulting bits and build resources */
+ parse_region_decode(hose, decode);
}
#endif /* CONFIG_PPC64 */
@@ -994,6 +996,8 @@ void __init pmac_pci_init(void)
struct device_node *np, *root;
struct device_node *ht = NULL;
+ ppc_pci_flags = PPC_PCI_CAN_SKIP_ISA_ALIGN;
+
root = of_find_node_by_path("/");
if (root == NULL) {
printk(KERN_CRIT "pmac_pci_init: can't find root "
@@ -1032,15 +1036,15 @@ void __init pmac_pci_init(void)
* future though
*/
if (u3_agp) {
- struct device_node *np = u3_agp->arch_data;
+ struct device_node *np = u3_agp->dn;
PCI_DN(np)->busno = 0xf0;
for (np = np->child; np; np = np->sibling)
PCI_DN(np)->busno = 0xf0;
}
/* pmac_check_ht_link(); */
- /* Tell pci.c to not use the common resource allocation mechanism */
- pci_probe_only = 1;
+ /* We can allocate missing resources if any */
+ pci_probe_only = 0;
#else /* CONFIG_PPC64 */
init_p2pbridge();
@@ -1051,13 +1055,13 @@ void __init pmac_pci_init(void)
* some offset between bus number and domains for now when we
* assign all busses should help for now
*/
- if (pci_assign_all_buses)
+ if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
pcibios_assign_bus_offset = 0x10;
#endif
}
-int
-pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
+#ifdef CONFIG_PPC32
+int pmac_pci_enable_device_hook(struct pci_dev *dev)
{
struct device_node* node;
int updatecfg = 0;
@@ -1099,24 +1103,21 @@ pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
updatecfg = 1;
}
+ /*
+ * Fixup various header fields on 32 bits. We don't do that on
+ * 64 bits as some of these have strange values behind the HT
+ * bridge and we must not, for example, enable MWI or set the
+ * cache line size on them.
+ */
if (updatecfg) {
u16 cmd;
- /*
- * Make sure PCI is correctly configured
- *
- * We use old pci_bios versions of the function since, by
- * default, gmac is not powered up, and so will be absent
- * from the kernel initial PCI lookup.
- *
- * Should be replaced by 2.4 new PCI mechanisms and really
- * register the device.
- */
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
| PCI_COMMAND_INVALIDATE;
pci_write_config_word(dev, PCI_COMMAND, cmd);
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 16);
+
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
L1_CACHE_BYTES >> 2);
}
@@ -1124,6 +1125,18 @@ pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
return 0;
}
+void __devinit pmac_pci_fixup_ohci(struct pci_dev *dev)
+{
+ struct device_node *node = pci_device_to_OF_node(dev);
+
+ /* We don't want to assign resources to USB controllers
+ * absent from the OF tree (iBook second controller)
+ */
+ if (dev->class == PCI_CLASS_SERIAL_USB_OHCI && !node)
+ dev->resource[0].flags = 0;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, PCI_ANY_ID, pmac_pci_fixup_ohci);
+
/* We power down some devices after they have been probed. They'll
* be powered back on later on
*/
@@ -1171,7 +1184,6 @@ void __init pmac_pcibios_after_init(void)
of_node_put(nd);
}
-#ifdef CONFIG_PPC32
void pmac_pci_fixup_cardbus(struct pci_dev* dev)
{
if (!machine_is(powermac))
@@ -1259,7 +1271,7 @@ void pmac_pci_fixup_pciata(struct pci_dev* dev)
}
}
DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata);
-#endif
+#endif /* CONFIG_PPC32 */
/*
* Disable second function on K2-SATA, it's broken
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c
index 45d54b9ad9e..db20de512f3 100644
--- a/arch/powerpc/platforms/powermac/pfunc_base.c
+++ b/arch/powerpc/platforms/powermac/pfunc_base.c
@@ -363,8 +363,7 @@ int __init pmac_pfunc_base_install(void)
return 0;
}
-
-arch_initcall(pmac_pfunc_base_install);
+machine_arch_initcall(powermac, pmac_pfunc_base_install);
#ifdef CONFIG_PM
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 84c0d4ef76a..40736400ef8 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -690,6 +690,5 @@ static int __init init_pmacpic_sysfs(void)
sysdev_driver_register(&pmacpic_sysclass, &driver_pmacpic);
return 0;
}
-
-subsys_initcall(init_pmacpic_sysfs);
+machine_subsys_initcall(powermac, init_pmacpic_sysfs);
diff --git a/arch/powerpc/platforms/powermac/pmac.h b/arch/powerpc/platforms/powermac/pmac.h
index fcde070f705..b3abaaf61eb 100644
--- a/arch/powerpc/platforms/powermac/pmac.h
+++ b/arch/powerpc/platforms/powermac/pmac.h
@@ -26,7 +26,7 @@ extern void pmac_pci_init(void);
extern void pmac_nvram_update(void);
extern unsigned char pmac_nvram_read_byte(int addr);
extern void pmac_nvram_write_byte(int addr, unsigned char val);
-extern int pmac_pci_enable_device_hook(struct pci_dev *dev, int initial);
+extern int pmac_pci_enable_device_hook(struct pci_dev *dev);
extern void pmac_pcibios_after_init(void);
extern int of_show_percpuinfo(struct seq_file *m, int i);
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 02c53309662..36ff1b6b7fa 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -51,6 +51,8 @@
#include <linux/root_dev.h>
#include <linux/bitops.h>
#include <linux/suspend.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
#include <asm/reg.h>
#include <asm/sections.h>
@@ -68,8 +70,6 @@
#include <asm/btext.h>
#include <asm/pmac_feature.h>
#include <asm/time.h>
-#include <asm/of_device.h>
-#include <asm/of_platform.h>
#include <asm/mmu_context.h>
#include <asm/iommu.h>
#include <asm/smu.h>
@@ -94,7 +94,6 @@ extern struct machdep_calls pmac_md;
#define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
#ifdef CONFIG_PPC64
-#include <asm/udbg.h>
int sccdbg;
#endif
@@ -398,17 +397,13 @@ static int initializing = 1;
static int pmac_late_init(void)
{
- if (!machine_is(powermac))
- return -ENODEV;
-
initializing = 0;
/* this is udbg (which is __init) and we can later use it during
* cpu hotplug (in smp_core99_kick_cpu) */
ppc_md.progress = NULL;
return 0;
}
-
-late_initcall(pmac_late_init);
+machine_late_initcall(powermac, pmac_late_init);
/*
* This is __init_refok because we check for "initializing" before
@@ -535,9 +530,6 @@ static int __init pmac_declare_of_platform_devices(void)
if (machine_is(chrp))
return -1;
- if (!machine_is(powermac))
- return 0;
-
np = of_find_node_by_name(NULL, "valkyrie");
if (np)
of_platform_device_create(np, "valkyrie", NULL);
@@ -552,8 +544,7 @@ static int __init pmac_declare_of_platform_devices(void)
return 0;
}
-
-device_initcall(pmac_declare_of_platform_devices);
+machine_device_initcall(powermac, pmac_declare_of_platform_devices);
/*
* Called very early, MMU is off, device-tree isn't unflattened
@@ -613,9 +604,11 @@ static int pmac_pci_probe_mode(struct pci_bus *bus)
/* We need to use normal PCI probing for the AGP bus,
* since the device for the AGP bridge isn't in the tree.
+ * Same for the PCIe host on U4 and the HT host bridge.
*/
if (bus->self == NULL && (of_device_is_compatible(node, "u3-agp") ||
- of_device_is_compatible(node, "u4-pcie")))
+ of_device_is_compatible(node, "u4-pcie") ||
+ of_device_is_compatible(node, "u3-ht")))
return PCI_PROBE_NORMAL;
return PCI_PROBE_DEVTREE;
}
diff --git a/arch/powerpc/platforms/powermac/time.c b/arch/powerpc/platforms/powermac/time.c
index bf9da56942e..bbbefd64ab5 100644
--- a/arch/powerpc/platforms/powermac/time.c
+++ b/arch/powerpc/platforms/powermac/time.c
@@ -84,12 +84,14 @@ long __init pmac_time_init(void)
return delta;
}
+#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
static void to_rtc_time(unsigned long now, struct rtc_time *tm)
{
to_tm(now, tm);
tm->tm_year -= 1900;
tm->tm_mon -= 1;
}
+#endif
static unsigned long from_rtc_time(struct rtc_time *tm)
{
diff --git a/arch/powerpc/platforms/ps3/Kconfig b/arch/powerpc/platforms/ps3/Kconfig
index 298f1c9679f..a5f4e95dfc3 100644
--- a/arch/powerpc/platforms/ps3/Kconfig
+++ b/arch/powerpc/platforms/ps3/Kconfig
@@ -61,17 +61,6 @@ config PS3_DYNAMIC_DMA
This support is mainly for Linux kernel development. If unsure,
say N.
-config PS3_USE_LPAR_ADDR
- depends on PPC_PS3 && EXPERIMENTAL
- bool "PS3 use lpar address space"
- default y
- help
- This option is solely for experimentation by experts. Disables
- translation of lpar addresses. SPE support currently won't work
- without this set to y.
-
- If you have any doubt, choose the default y.
-
config PS3_VUART
depends on PPC_PS3
tristate
@@ -138,4 +127,17 @@ config PS3_FLASH
be disabled on the kernel command line using "ps3flash=off", to
not allocate this fixed buffer.
+config PS3_LPM
+ tristate "PS3 Logical Performance Monitor support"
+ depends on PPC_PS3
+ help
+ Include support for the PS3 Logical Performance Monitor.
+
+ This support is required to use the logical performance monitor
+ of the PS3's LV1 hypervisor.
+
+ If you intend to use the advanced performance monitoring and
+ profiling support of the Cell processor with programs like
+ oprofile and perfmon2, then say Y or M, otherwise say N.
+
endmenu
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index fd063fe0c9b..9d251d0ca8c 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -23,6 +23,7 @@
#include <linux/kernel.h>
#include <linux/kthread.h>
#include <linux/init.h>
+#include <linux/reboot.h>
#include <asm/firmware.h>
#include <asm/lv1call.h>
@@ -30,6 +31,89 @@
#include "platform.h"
+static int __init ps3_register_lpm_devices(void)
+{
+ int result;
+ u64 tmp1;
+ u64 tmp2;
+ struct ps3_system_bus_device *dev;
+
+ pr_debug(" -> %s:%d\n", __func__, __LINE__);
+
+ dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+ if (!dev)
+ return -ENOMEM;
+
+ dev->match_id = PS3_MATCH_ID_LPM;
+ dev->dev_type = PS3_DEVICE_TYPE_LPM;
+
+ /* The current lpm driver only supports a single BE processor. */
+
+ result = ps3_repository_read_be_node_id(0, &dev->lpm.node_id);
+
+ if (result) {
+ pr_debug("%s:%d: ps3_repository_read_be_node_id failed \n",
+ __func__, __LINE__);
+ goto fail_read_repo;
+ }
+
+ result = ps3_repository_read_lpm_privileges(dev->lpm.node_id, &tmp1,
+ &dev->lpm.rights);
+
+ if (result) {
+ pr_debug("%s:%d: ps3_repository_read_lpm_privleges failed \n",
+ __func__, __LINE__);
+ goto fail_read_repo;
+ }
+
+ lv1_get_logical_partition_id(&tmp2);
+
+ if (tmp1 != tmp2) {
+ pr_debug("%s:%d: wrong lpar\n",
+ __func__, __LINE__);
+ result = -ENODEV;
+ goto fail_rights;
+ }
+
+ if (!(dev->lpm.rights & PS3_LPM_RIGHTS_USE_LPM)) {
+ pr_debug("%s:%d: don't have rights to use lpm\n",
+ __func__, __LINE__);
+ result = -EPERM;
+ goto fail_rights;
+ }
+
+ pr_debug("%s:%d: pu_id %lu, rights %lu(%lxh)\n",
+ __func__, __LINE__, dev->lpm.pu_id, dev->lpm.rights,
+ dev->lpm.rights);
+
+ result = ps3_repository_read_pu_id(0, &dev->lpm.pu_id);
+
+ if (result) {
+ pr_debug("%s:%d: ps3_repository_read_pu_id failed \n",
+ __func__, __LINE__);
+ goto fail_read_repo;
+ }
+
+ result = ps3_system_bus_device_register(dev);
+
+ if (result) {
+ pr_debug("%s:%d ps3_system_bus_device_register failed\n",
+ __func__, __LINE__);
+ goto fail_register;
+ }
+
+ pr_debug(" <- %s:%d\n", __func__, __LINE__);
+ return 0;
+
+
+fail_register:
+fail_rights:
+fail_read_repo:
+ kfree(dev);
+ pr_debug(" <- %s:%d: failed\n", __func__, __LINE__);
+ return result;
+}
+
/**
* ps3_setup_gelic_device - Setup and register a gelic device instance.
*
@@ -238,166 +322,6 @@ static int __init ps3_setup_vuart_device(enum ps3_match_id match_id,
return result;
}
-static int ps3stor_wait_for_completion(u64 dev_id, u64 tag,
- unsigned int timeout)
-{
- int result = -1;
- unsigned int retries = 0;
- u64 status;
-
- for (retries = 0; retries < timeout; retries++) {
- result = lv1_storage_check_async_status(dev_id, tag, &status);
- if (!result)
- break;
-
- msleep(1);
- }
-
- if (result)
- pr_debug("%s:%u: check_async_status: %s, status %lx\n",
- __func__, __LINE__, ps3_result(result), status);
-
- return result;
-}
-
-/**
- * ps3_storage_wait_for_device - Wait for a storage device to become ready.
- * @repo: The repository device to wait for.
- *
- * Uses the hypervisor's storage device notification mechanism to wait until
- * a storage device is ready. The device notification mechanism uses a
- * psuedo device (id = -1) to asynchronously notify the guest when storage
- * devices become ready. The notification device has a block size of 512
- * bytes.
- */
-
-static int ps3_storage_wait_for_device(const struct ps3_repository_device *repo)
-{
- int error = -ENODEV;
- int result;
- const u64 notification_dev_id = (u64)-1LL;
- const unsigned int timeout = HZ;
- u64 lpar;
- u64 tag;
- void *buf;
- enum ps3_notify_type {
- notify_device_ready = 0,
- notify_region_probe = 1,
- notify_region_update = 2,
- };
- struct {
- u64 operation_code; /* must be zero */
- u64 event_mask; /* OR of 1UL << enum ps3_notify_type */
- } *notify_cmd;
- struct {
- u64 event_type; /* enum ps3_notify_type */
- u64 bus_id;
- u64 dev_id;
- u64 dev_type;
- u64 dev_port;
- } *notify_event;
-
- pr_debug(" -> %s:%u: (%u:%u:%u)\n", __func__, __LINE__, repo->bus_id,
- repo->dev_id, repo->dev_type);
-
- buf = kzalloc(512, GFP_KERNEL);
- if (!buf)
- return -ENOMEM;
-
- lpar = ps3_mm_phys_to_lpar(__pa(buf));
- notify_cmd = buf;
- notify_event = buf;
-
- result = lv1_open_device(repo->bus_id, notification_dev_id, 0);
- if (result) {
- printk(KERN_ERR "%s:%u: lv1_open_device %s\n", __func__,
- __LINE__, ps3_result(result));
- goto fail_free;
- }
-
- /* Setup and write the request for device notification. */
-
- notify_cmd->operation_code = 0; /* must be zero */
- notify_cmd->event_mask = 1UL << notify_region_probe;
-
- result = lv1_storage_write(notification_dev_id, 0, 0, 1, 0, lpar,
- &tag);
- if (result) {
- printk(KERN_ERR "%s:%u: write failed %s\n", __func__, __LINE__,
- ps3_result(result));
- goto fail_close;
- }
-
- /* Wait for the write completion */
-
- result = ps3stor_wait_for_completion(notification_dev_id, tag,
- timeout);
- if (result) {
- printk(KERN_ERR "%s:%u: write not completed %s\n", __func__,
- __LINE__, ps3_result(result));
- goto fail_close;
- }
-
- /* Loop here processing the requested notification events. */
-
- while (1) {
- memset(notify_event, 0, sizeof(*notify_event));
-
- result = lv1_storage_read(notification_dev_id, 0, 0, 1, 0,
- lpar, &tag);
- if (result) {
- printk(KERN_ERR "%s:%u: write failed %s\n", __func__,
- __LINE__, ps3_result(result));
- break;
- }
-
- result = ps3stor_wait_for_completion(notification_dev_id, tag,
- timeout);
- if (result) {
- printk(KERN_ERR "%s:%u: read not completed %s\n",
- __func__, __LINE__, ps3_result(result));
- break;
- }
-
- pr_debug("%s:%d: notify event (%u:%u:%u): event_type 0x%lx, "
- "port %lu\n", __func__, __LINE__, repo->bus_index,
- repo->dev_index, repo->dev_type,
- notify_event->event_type, notify_event->dev_port);
-
- if (notify_event->event_type != notify_region_probe ||
- notify_event->bus_id != repo->bus_id) {
- pr_debug("%s:%u: bad notify_event: event %lu, "
- "dev_id %lu, dev_type %lu\n",
- __func__, __LINE__, notify_event->event_type,
- notify_event->dev_id, notify_event->dev_type);
- break;
- }
-
- if (notify_event->dev_id == repo->dev_id &&
- notify_event->dev_type == repo->dev_type) {
- pr_debug("%s:%u: device ready (%u:%u:%u)\n", __func__,
- __LINE__, repo->bus_index, repo->dev_index,
- repo->dev_type);
- error = 0;
- break;
- }
-
- if (notify_event->dev_id == repo->dev_id &&
- notify_event->dev_type == PS3_DEV_TYPE_NOACCESS) {
- pr_debug("%s:%u: no access: dev_id %u\n", __func__,
- __LINE__, repo->dev_id);
- break;
- }
- }
-
-fail_close:
- lv1_close_device(repo->bus_id, notification_dev_id);
-fail_free:
- kfree(buf);
- pr_debug(" <- %s:%u\n", __func__, __LINE__);
- return error;
-}
-
static int ps3_setup_storage_dev(const struct ps3_repository_device *repo,
enum ps3_match_id match_id)
{
@@ -449,16 +373,6 @@ static int ps3_setup_storage_dev(const struct ps3_repository_device *repo,
goto fail_find_interrupt;
}
- /* FIXME: Arrange to only do this on a 'cold' boot */
-
- result = ps3_storage_wait_for_device(repo);
- if (result) {
- printk(KERN_ERR "%s:%u: storage_notification failed %d\n",
- __func__, __LINE__, result);
- result = -ENODEV;
- goto fail_probe_notification;
- }
-
for (i = 0; i < num_regions; i++) {
unsigned int id;
u64 start, size;
@@ -494,7 +408,6 @@ static int ps3_setup_storage_dev(const struct ps3_repository_device *repo,
fail_device_register:
fail_read_region:
-fail_probe_notification:
fail_find_interrupt:
kfree(p);
fail_malloc:
@@ -659,62 +572,268 @@ static int ps3_register_repository_device(
return result;
}
+static void ps3_find_and_add_device(u64 bus_id, u64 dev_id)
+{
+ struct ps3_repository_device repo;
+ int res;
+ unsigned int retries;
+ unsigned long rem;
+
+ /*
+ * On some firmware versions (e.g. 1.90), the device may not show up
+ * in the repository immediately
+ */
+ for (retries = 0; retries < 10; retries++) {
+ res = ps3_repository_find_device_by_id(&repo, bus_id, dev_id);
+ if (!res)
+ goto found;
+
+ rem = msleep_interruptible(100);
+ if (rem)
+ break;
+ }
+ pr_warning("%s:%u: device %lu:%lu not found\n", __func__, __LINE__,
+ bus_id, dev_id);
+ return;
+
+found:
+ if (retries)
+ pr_debug("%s:%u: device %lu:%lu found after %u retries\n",
+ __func__, __LINE__, bus_id, dev_id, retries);
+
+ ps3_register_repository_device(&repo);
+ return;
+}
+
+#define PS3_NOTIFICATION_DEV_ID ULONG_MAX
+#define PS3_NOTIFICATION_INTERRUPT_ID 0
+
+struct ps3_notification_device {
+ struct ps3_system_bus_device sbd;
+ spinlock_t lock;
+ u64 tag;
+ u64 lv1_status;
+ struct completion done;
+};
+
+enum ps3_notify_type {
+ notify_device_ready = 0,
+ notify_region_probe = 1,
+ notify_region_update = 2,
+};
+
+struct ps3_notify_cmd {
+ u64 operation_code; /* must be zero */
+ u64 event_mask; /* OR of 1UL << enum ps3_notify_type */
+};
+
+struct ps3_notify_event {
+ u64 event_type; /* enum ps3_notify_type */
+ u64 bus_id;
+ u64 dev_id;
+ u64 dev_type;
+ u64 dev_port;
+};
+
+static irqreturn_t ps3_notification_interrupt(int irq, void *data)
+{
+ struct ps3_notification_device *dev = data;
+ int res;
+ u64 tag, status;
+
+ spin_lock(&dev->lock);
+ res = lv1_storage_get_async_status(PS3_NOTIFICATION_DEV_ID, &tag,
+ &status);
+ if (tag != dev->tag)
+ pr_err("%s:%u: tag mismatch, got %lx, expected %lx\n",
+ __func__, __LINE__, tag, dev->tag);
+
+ if (res) {
+ pr_err("%s:%u: res %d status 0x%lx\n", __func__, __LINE__, res,
+ status);
+ } else {
+ pr_debug("%s:%u: completed, status 0x%lx\n", __func__,
+ __LINE__, status);
+ dev->lv1_status = status;
+ complete(&dev->done);
+ }
+ spin_unlock(&dev->lock);
+ return IRQ_HANDLED;
+}
+
+static int ps3_notification_read_write(struct ps3_notification_device *dev,
+ u64 lpar, int write)
+{
+ const char *op = write ? "write" : "read";
+ unsigned long flags;
+ int res;
+
+ init_completion(&dev->done);
+ spin_lock_irqsave(&dev->lock, flags);
+ res = write ? lv1_storage_write(dev->sbd.dev_id, 0, 0, 1, 0, lpar,
+ &dev->tag)
+ : lv1_storage_read(dev->sbd.dev_id, 0, 0, 1, 0, lpar,
+ &dev->tag);
+ spin_unlock_irqrestore(&dev->lock, flags);
+ if (res) {
+ pr_err("%s:%u: %s failed %d\n", __func__, __LINE__, op, res);
+ return -EPERM;
+ }
+ pr_debug("%s:%u: notification %s issued\n", __func__, __LINE__, op);
+
+ res = wait_event_interruptible(dev->done.wait,
+ dev->done.done || kthread_should_stop());
+ if (kthread_should_stop())
+ res = -EINTR;
+ if (res) {
+ pr_debug("%s:%u: interrupted %s\n", __func__, __LINE__, op);
+ return res;
+ }
+
+ if (dev->lv1_status) {
+ pr_err("%s:%u: %s not completed, status 0x%lx\n", __func__,
+ __LINE__, op, dev->lv1_status);
+ return -EIO;
+ }
+ pr_debug("%s:%u: notification %s completed\n", __func__, __LINE__, op);
+
+ return 0;
+}
+
+static struct task_struct *probe_task;
+
/**
* ps3_probe_thread - Background repository probing at system startup.
*
* This implementation only supports background probing on a single bus.
+ * It uses the hypervisor's storage device notification mechanism to wait until
+ * a storage device is ready. The device notification mechanism uses a
+ * pseudo device to asynchronously notify the guest when storage devices become
+ * ready. The notification device has a block size of 512 bytes.
*/
static int ps3_probe_thread(void *data)
{
- struct ps3_repository_device *repo = data;
- int result;
- unsigned int ms = 250;
+ struct ps3_notification_device dev;
+ int res;
+ unsigned int irq;
+ u64 lpar;
+ void *buf;
+ struct ps3_notify_cmd *notify_cmd;
+ struct ps3_notify_event *notify_event;
pr_debug(" -> %s:%u: kthread started\n", __func__, __LINE__);
+ buf = kzalloc(512, GFP_KERNEL);
+ if (!buf)
+ return -ENOMEM;
+
+ lpar = ps3_mm_phys_to_lpar(__pa(buf));
+ notify_cmd = buf;
+ notify_event = buf;
+
+ /* dummy system bus device */
+ dev.sbd.bus_id = (u64)data;
+ dev.sbd.dev_id = PS3_NOTIFICATION_DEV_ID;
+ dev.sbd.interrupt_id = PS3_NOTIFICATION_INTERRUPT_ID;
+
+ res = lv1_open_device(dev.sbd.bus_id, dev.sbd.dev_id, 0);
+ if (res) {
+ pr_err("%s:%u: lv1_open_device failed %s\n", __func__,
+ __LINE__, ps3_result(res));
+ goto fail_free;
+ }
+
+ res = ps3_sb_event_receive_port_setup(&dev.sbd, PS3_BINDING_CPU_ANY,
+ &irq);
+ if (res) {
+ pr_err("%s:%u: ps3_sb_event_receive_port_setup failed %d\n",
+ __func__, __LINE__, res);
+ goto fail_close_device;
+ }
+
+ spin_lock_init(&dev.lock);
+
+ res = request_irq(irq, ps3_notification_interrupt, IRQF_DISABLED,
+ "ps3_notification", &dev);
+ if (res) {
+ pr_err("%s:%u: request_irq failed %d\n", __func__, __LINE__,
+ res);
+ goto fail_sb_event_receive_port_destroy;
+ }
+
+ /* Setup and write the request for device notification. */
+ notify_cmd->operation_code = 0; /* must be zero */
+ notify_cmd->event_mask = 1UL << notify_region_probe;
+
+ res = ps3_notification_read_write(&dev, lpar, 1);
+ if (res)
+ goto fail_free_irq;
+
+ /* Loop here processing the requested notification events. */
do {
try_to_freeze();
- pr_debug("%s:%u: probing...\n", __func__, __LINE__);
-
- do {
- result = ps3_repository_find_device(repo);
-
- if (result == -ENODEV)
- pr_debug("%s:%u: nothing new\n", __func__,
- __LINE__);
- else if (result)
- pr_debug("%s:%u: find device error.\n",
- __func__, __LINE__);
- else {
- pr_debug("%s:%u: found device (%u:%u:%u)\n",
- __func__, __LINE__, repo->bus_index,
- repo->dev_index, repo->dev_type);
- ps3_register_repository_device(repo);
- ps3_repository_bump_device(repo);
- ms = 250;
- }
- } while (!result);
-
- pr_debug("%s:%u: ms %u\n", __func__, __LINE__, ms);
-
- if ( ms > 60000)
+ memset(notify_event, 0, sizeof(*notify_event));
+
+ res = ps3_notification_read_write(&dev, lpar, 0);
+ if (res)
break;
- msleep_interruptible(ms);
+ pr_debug("%s:%u: notify event type 0x%lx bus id %lu dev id %lu"
+ " type %lu port %lu\n", __func__, __LINE__,
+ notify_event->event_type, notify_event->bus_id,
+ notify_event->dev_id, notify_event->dev_type,
+ notify_event->dev_port);
- /* An exponential backoff. */
- ms <<= 1;
+ if (notify_event->event_type != notify_region_probe ||
+ notify_event->bus_id != dev.sbd.bus_id) {
+ pr_warning("%s:%u: bad notify_event: event %lu, "
+ "dev_id %lu, dev_type %lu\n",
+ __func__, __LINE__, notify_event->event_type,
+ notify_event->dev_id,
+ notify_event->dev_type);
+ continue;
+ }
+
+ ps3_find_and_add_device(dev.sbd.bus_id, notify_event->dev_id);
} while (!kthread_should_stop());
+fail_free_irq:
+ free_irq(irq, &dev);
+fail_sb_event_receive_port_destroy:
+ ps3_sb_event_receive_port_destroy(&dev.sbd, irq);
+fail_close_device:
+ lv1_close_device(dev.sbd.bus_id, dev.sbd.dev_id);
+fail_free:
+ kfree(buf);
+
+ probe_task = NULL;
+
pr_debug(" <- %s:%u: kthread finished\n", __func__, __LINE__);
return 0;
}
/**
+ * ps3_stop_probe_thread - Stops the background probe thread.
+ *
+ */
+
+static int ps3_stop_probe_thread(struct notifier_block *nb, unsigned long code,
+ void *data)
+{
+ if (probe_task)
+ kthread_stop(probe_task);
+ return 0;
+}
+
+static struct notifier_block nb = {
+ .notifier_call = ps3_stop_probe_thread
+};
+
+/**
* ps3_start_probe_thread - Starts the background probe thread.
*
*/
@@ -723,7 +842,7 @@ static int __init ps3_start_probe_thread(enum ps3_bus_type bus_type)
{
int result;
struct task_struct *task;
- static struct ps3_repository_device repo; /* must be static */
+ struct ps3_repository_device repo;
pr_debug(" -> %s:%d\n", __func__, __LINE__);
@@ -746,7 +865,8 @@ static int __init ps3_start_probe_thread(enum ps3_bus_type bus_type)
return -ENODEV;
}
- task = kthread_run(ps3_probe_thread, &repo, "ps3-probe-%u", bus_type);
+ task = kthread_run(ps3_probe_thread, (void *)repo.bus_id,
+ "ps3-probe-%u", bus_type);
if (IS_ERR(task)) {
result = PTR_ERR(task);
@@ -755,6 +875,9 @@ static int __init ps3_start_probe_thread(enum ps3_bus_type bus_type)
return result;
}
+ probe_task = task;
+ register_reboot_notifier(&nb);
+
pr_debug(" <- %s:%d\n", __func__, __LINE__);
return 0;
}
@@ -787,6 +910,8 @@ static int __init ps3_register_devices(void)
ps3_register_sound_devices();
+ ps3_register_lpm_devices();
+
pr_debug(" <- %s:%d\n", __func__, __LINE__);
return 0;
}
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index 7bb3e162097..68900476c84 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -36,11 +36,6 @@
#endif
enum {
-#if defined(CONFIG_PS3_USE_LPAR_ADDR)
- USE_LPAR_ADDR = 1,
-#else
- USE_LPAR_ADDR = 0,
-#endif
#if defined(CONFIG_PS3_DYNAMIC_DMA)
USE_DYNAMIC_DMA = 1,
#else
@@ -137,11 +132,8 @@ static struct map map;
unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr)
{
BUG_ON(is_kernel_addr(phys_addr));
- if (USE_LPAR_ADDR)
- return phys_addr;
- else
- return (phys_addr < map.rm.size || phys_addr >= map.total)
- ? phys_addr : phys_addr + map.r1.offset;
+ return (phys_addr < map.rm.size || phys_addr >= map.total)
+ ? phys_addr : phys_addr + map.r1.offset;
}
EXPORT_SYMBOL(ps3_mm_phys_to_lpar);
@@ -309,7 +301,7 @@ static int __init ps3_mm_add_memory(void)
BUG_ON(!mem_init_done);
- start_addr = USE_LPAR_ADDR ? map.r1.base : map.rm.size;
+ start_addr = map.rm.size;
start_pfn = start_addr >> PAGE_SHIFT;
nr_pages = (map.r1.size + PAGE_SIZE - 1) >> PAGE_SHIFT;
@@ -359,7 +351,7 @@ static unsigned long dma_sb_lpar_to_bus(struct ps3_dma_region *r,
static void __maybe_unused _dma_dump_region(const struct ps3_dma_region *r,
const char *func, int line)
{
- DBG("%s:%d: dev %u:%u\n", func, line, r->dev->bus_id,
+ DBG("%s:%d: dev %lu:%lu\n", func, line, r->dev->bus_id,
r->dev->dev_id);
DBG("%s:%d: page_size %u\n", func, line, r->page_size);
DBG("%s:%d: bus_addr %lxh\n", func, line, r->bus_addr);
@@ -394,7 +386,7 @@ struct dma_chunk {
static void _dma_dump_chunk (const struct dma_chunk* c, const char* func,
int line)
{
- DBG("%s:%d: r.dev %u:%u\n", func, line,
+ DBG("%s:%d: r.dev %lu:%lu\n", func, line,
c->region->dev->bus_id, c->region->dev->dev_id);
DBG("%s:%d: r.bus_addr %lxh\n", func, line, c->region->bus_addr);
DBG("%s:%d: r.page_size %u\n", func, line, c->region->page_size);
@@ -658,7 +650,7 @@ static int dma_sb_region_create(struct ps3_dma_region *r)
BUG_ON(!r);
if (!r->dev->bus_id) {
- pr_info("%s:%d: %u:%u no dma\n", __func__, __LINE__,
+ pr_info("%s:%d: %lu:%lu no dma\n", __func__, __LINE__,
r->dev->bus_id, r->dev->dev_id);
return 0;
}
@@ -724,7 +716,7 @@ static int dma_sb_region_free(struct ps3_dma_region *r)
BUG_ON(!r);
if (!r->dev->bus_id) {
- pr_info("%s:%d: %u:%u no dma\n", __func__, __LINE__,
+ pr_info("%s:%d: %lu:%lu no dma\n", __func__, __LINE__,
r->dev->bus_id, r->dev->dev_id);
return 0;
}
@@ -1007,7 +999,7 @@ static int dma_sb_region_create_linear(struct ps3_dma_region *r)
if (r->offset + r->len > map.rm.size) {
/* Map (part of) 2nd RAM chunk */
- virt_addr = USE_LPAR_ADDR ? map.r1.base : map.rm.size;
+ virt_addr = map.rm.size;
len = r->len;
if (r->offset >= map.rm.size)
virt_addr += r->offset - map.rm.size;
diff --git a/arch/powerpc/platforms/ps3/platform.h b/arch/powerpc/platforms/ps3/platform.h
index 01f0c9506e1..235c13ebacd 100644
--- a/arch/powerpc/platforms/ps3/platform.h
+++ b/arch/powerpc/platforms/ps3/platform.h
@@ -89,13 +89,11 @@ enum ps3_dev_type {
PS3_DEV_TYPE_STOR_ROM = TYPE_ROM, /* 5 */
PS3_DEV_TYPE_SB_GPIO = 6,
PS3_DEV_TYPE_STOR_FLASH = TYPE_RBC, /* 14 */
- PS3_DEV_TYPE_STOR_DUMMY = 32,
- PS3_DEV_TYPE_NOACCESS = 255,
};
int ps3_repository_read_bus_str(unsigned int bus_index, const char *bus_str,
u64 *value);
-int ps3_repository_read_bus_id(unsigned int bus_index, unsigned int *bus_id);
+int ps3_repository_read_bus_id(unsigned int bus_index, u64 *bus_id);
int ps3_repository_read_bus_type(unsigned int bus_index,
enum ps3_bus_type *bus_type);
int ps3_repository_read_bus_num_dev(unsigned int bus_index,
@@ -119,7 +117,7 @@ enum ps3_reg_type {
int ps3_repository_read_dev_str(unsigned int bus_index,
unsigned int dev_index, const char *dev_str, u64 *value);
int ps3_repository_read_dev_id(unsigned int bus_index, unsigned int dev_index,
- unsigned int *dev_id);
+ u64 *dev_id);
int ps3_repository_read_dev_type(unsigned int bus_index,
unsigned int dev_index, enum ps3_dev_type *dev_type);
int ps3_repository_read_dev_intr(unsigned int bus_index,
@@ -138,21 +136,17 @@ int ps3_repository_read_dev_reg(unsigned int bus_index,
/* repository bus enumerators */
struct ps3_repository_device {
- enum ps3_bus_type bus_type;
unsigned int bus_index;
- unsigned int bus_id;
- enum ps3_dev_type dev_type;
unsigned int dev_index;
- unsigned int dev_id;
+ enum ps3_bus_type bus_type;
+ enum ps3_dev_type dev_type;
+ u64 bus_id;
+ u64 dev_id;
};
-static inline struct ps3_repository_device *ps3_repository_bump_device(
- struct ps3_repository_device *repo)
-{
- repo->dev_index++;
- return repo;
-}
int ps3_repository_find_device(struct ps3_repository_device *repo);
+int ps3_repository_find_device_by_id(struct ps3_repository_device *repo,
+ u64 bus_id, u64 dev_id);
int ps3_repository_find_devices(enum ps3_bus_type bus_type,
int (*callback)(const struct ps3_repository_device *repo));
int ps3_repository_find_bus(enum ps3_bus_type bus_type, unsigned int from,
@@ -186,10 +180,10 @@ int ps3_repository_read_stor_dev_region(unsigned int bus_index,
unsigned int dev_index, unsigned int region_index,
unsigned int *region_id, u64 *region_start, u64 *region_size);
-/* repository pu and memory info */
+/* repository logical pu and memory info */
-int ps3_repository_read_num_pu(unsigned int *num_pu);
-int ps3_repository_read_ppe_id(unsigned int *pu_index, unsigned int *ppe_id);
+int ps3_repository_read_num_pu(u64 *num_pu);
+int ps3_repository_read_pu_id(unsigned int pu_index, u64 *pu_id);
int ps3_repository_read_rm_base(unsigned int ppe_id, u64 *rm_base);
int ps3_repository_read_rm_size(unsigned int ppe_id, u64 *rm_size);
int ps3_repository_read_region_total(u64 *region_total);
@@ -200,9 +194,15 @@ int ps3_repository_read_mm_info(u64 *rm_base, u64 *rm_size,
int ps3_repository_read_num_be(unsigned int *num_be);
int ps3_repository_read_be_node_id(unsigned int be_index, u64 *node_id);
+int ps3_repository_read_be_id(u64 node_id, u64 *be_id);
int ps3_repository_read_tb_freq(u64 node_id, u64 *tb_freq);
int ps3_repository_read_be_tb_freq(unsigned int be_index, u64 *tb_freq);
+/* repository performance monitor info */
+
+int ps3_repository_read_lpm_privileges(unsigned int be_index, u64 *lpar,
+ u64 *rights);
+
/* repository 'Other OS' area */
int ps3_repository_read_boot_dat_addr(u64 *lpar_addr);
diff --git a/arch/powerpc/platforms/ps3/repository.c b/arch/powerpc/platforms/ps3/repository.c
index 1c94824f7b6..22063adeb38 100644
--- a/arch/powerpc/platforms/ps3/repository.c
+++ b/arch/powerpc/platforms/ps3/repository.c
@@ -33,7 +33,7 @@ enum ps3_lpar_id {
};
#define dump_field(_a, _b) _dump_field(_a, _b, __func__, __LINE__)
-static void _dump_field(const char *hdr, u64 n, const char* func, int line)
+static void _dump_field(const char *hdr, u64 n, const char *func, int line)
{
#if defined(DEBUG)
char s[16];
@@ -50,8 +50,8 @@ static void _dump_field(const char *hdr, u64 n, const char* func, int line)
#define dump_node_name(_a, _b, _c, _d, _e) \
_dump_node_name(_a, _b, _c, _d, _e, __func__, __LINE__)
-static void _dump_node_name (unsigned int lpar_id, u64 n1, u64 n2, u64 n3,
- u64 n4, const char* func, int line)
+static void _dump_node_name(unsigned int lpar_id, u64 n1, u64 n2, u64 n3,
+ u64 n4, const char *func, int line)
{
pr_debug("%s:%d: lpar: %u\n", func, line, lpar_id);
_dump_field("n1: ", n1, func, line);
@@ -63,7 +63,7 @@ static void _dump_node_name (unsigned int lpar_id, u64 n1, u64 n2, u64 n3,
#define dump_node(_a, _b, _c, _d, _e, _f, _g) \
_dump_node(_a, _b, _c, _d, _e, _f, _g, __func__, __LINE__)
static void _dump_node(unsigned int lpar_id, u64 n1, u64 n2, u64 n3, u64 n4,
- u64 v1, u64 v2, const char* func, int line)
+ u64 v1, u64 v2, const char *func, int line)
{
pr_debug("%s:%d: lpar: %u\n", func, line, lpar_id);
_dump_field("n1: ", n1, func, line);
@@ -165,21 +165,18 @@ int ps3_repository_read_bus_str(unsigned int bus_index, const char *bus_str,
make_first_field("bus", bus_index),
make_field(bus_str, 0),
0, 0,
- value, 0);
+ value, NULL);
}
-int ps3_repository_read_bus_id(unsigned int bus_index, unsigned int *bus_id)
+int ps3_repository_read_bus_id(unsigned int bus_index, u64 *bus_id)
{
int result;
- u64 v1;
- u64 v2; /* unused */
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
make_field("id", 0),
0, 0,
- &v1, &v2);
- *bus_id = v1;
+ bus_id, NULL);
return result;
}
@@ -193,7 +190,7 @@ int ps3_repository_read_bus_type(unsigned int bus_index,
make_first_field("bus", bus_index),
make_field("type", 0),
0, 0,
- &v1, 0);
+ &v1, NULL);
*bus_type = v1;
return result;
}
@@ -208,7 +205,7 @@ int ps3_repository_read_bus_num_dev(unsigned int bus_index,
make_first_field("bus", bus_index),
make_field("num_dev", 0),
0, 0,
- &v1, 0);
+ &v1, NULL);
*num_dev = v1;
return result;
}
@@ -221,22 +218,20 @@ int ps3_repository_read_dev_str(unsigned int bus_index,
make_field("dev", dev_index),
make_field(dev_str, 0),
0,
- value, 0);
+ value, NULL);
}
int ps3_repository_read_dev_id(unsigned int bus_index, unsigned int dev_index,
- unsigned int *dev_id)
+ u64 *dev_id)
{
int result;
- u64 v1;
result = read_node(PS3_LPAR_ID_PME,
make_first_field("bus", bus_index),
make_field("dev", dev_index),
make_field("id", 0),
0,
- &v1, 0);
- *dev_id = v1;
+ dev_id, NULL);
return result;
}
@@ -251,14 +246,14 @@ int ps3_repository_read_dev_type(unsigned int bus_index,
make_field("dev", dev_index),
make_field("type", 0),
0,
- &v1, 0);
+ &v1, NULL);
*dev_type = v1;
return result;
}
int ps3_repository_read_dev_intr(unsigned int bus_index,
unsigned int dev_index, unsigned int intr_index,
- enum ps3_interrupt_type *intr_type, unsigned int* interrupt_id)
+ enum ps3_interrupt_type *intr_type, unsigned int *interrupt_id)
{
int result;
u64 v1;
@@ -287,7 +282,7 @@ int ps3_repository_read_dev_reg_type(unsigned int bus_index,
make_field("dev", dev_index),
make_field("reg", reg_index),
make_field("type", 0),
- &v1, 0);
+ &v1, NULL);
*reg_type = v1;
return result;
}
@@ -332,7 +327,7 @@ int ps3_repository_find_device(struct ps3_repository_device *repo)
return result;
}
- pr_debug("%s:%d: bus_type %u, bus_index %u, bus_id %u, num_dev %u\n",
+ pr_debug("%s:%d: bus_type %u, bus_index %u, bus_id %lu, num_dev %u\n",
__func__, __LINE__, tmp.bus_type, tmp.bus_index, tmp.bus_id,
num_dev);
@@ -349,47 +344,95 @@ int ps3_repository_find_device(struct ps3_repository_device *repo)
return result;
}
- if (tmp.bus_type == PS3_BUS_TYPE_STORAGE) {
- /*
- * A storage device may show up in the repository before the
- * hypervisor has finished probing its type and regions
- */
- unsigned int num_regions;
-
- if (tmp.dev_type == PS3_DEV_TYPE_STOR_DUMMY) {
- pr_debug("%s:%u storage device not ready\n", __func__,
- __LINE__);
- return -ENODEV;
- }
+ result = ps3_repository_read_dev_id(tmp.bus_index, tmp.dev_index,
+ &tmp.dev_id);
- result = ps3_repository_read_stor_dev_num_regions(tmp.bus_index,
- tmp.dev_index,
- &num_regions);
+ if (result) {
+ pr_debug("%s:%d ps3_repository_read_dev_id failed\n", __func__,
+ __LINE__);
+ return result;
+ }
+
+ pr_debug("%s:%d: found: dev_type %u, dev_index %u, dev_id %lu\n",
+ __func__, __LINE__, tmp.dev_type, tmp.dev_index, tmp.dev_id);
+
+ *repo = tmp;
+ return 0;
+}
+
+int ps3_repository_find_device_by_id(struct ps3_repository_device *repo,
+ u64 bus_id, u64 dev_id)
+{
+ int result = -ENODEV;
+ struct ps3_repository_device tmp;
+ unsigned int num_dev;
+
+ pr_debug(" -> %s:%u: find device by id %lu:%lu\n", __func__, __LINE__,
+ bus_id, dev_id);
+
+ for (tmp.bus_index = 0; tmp.bus_index < 10; tmp.bus_index++) {
+ result = ps3_repository_read_bus_id(tmp.bus_index,
+ &tmp.bus_id);
if (result) {
- pr_debug("%s:%d read_stor_dev_num_regions failed\n",
- __func__, __LINE__);
+ pr_debug("%s:%u read_bus_id(%u) failed\n", __func__,
+ __LINE__, tmp.bus_index);
return result;
}
- if (!num_regions) {
- pr_debug("%s:%u storage device has no regions yet\n",
- __func__, __LINE__);
- return -ENODEV;
- }
+ if (tmp.bus_id == bus_id)
+ goto found_bus;
+
+ pr_debug("%s:%u: skip, bus_id %lu\n", __func__, __LINE__,
+ tmp.bus_id);
}
+ pr_debug(" <- %s:%u: bus not found\n", __func__, __LINE__);
+ return result;
- result = ps3_repository_read_dev_id(tmp.bus_index, tmp.dev_index,
- &tmp.dev_id);
+found_bus:
+ result = ps3_repository_read_bus_type(tmp.bus_index, &tmp.bus_type);
+ if (result) {
+ pr_debug("%s:%u read_bus_type(%u) failed\n", __func__,
+ __LINE__, tmp.bus_index);
+ return result;
+ }
+ result = ps3_repository_read_bus_num_dev(tmp.bus_index, &num_dev);
if (result) {
- pr_debug("%s:%d ps3_repository_read_dev_id failed\n", __func__,
- __LINE__);
+ pr_debug("%s:%u read_bus_num_dev failed\n", __func__,
+ __LINE__);
return result;
}
- pr_debug("%s:%d: found: dev_type %u, dev_index %u, dev_id %u\n",
- __func__, __LINE__, tmp.dev_type, tmp.dev_index, tmp.dev_id);
+ for (tmp.dev_index = 0; tmp.dev_index < num_dev; tmp.dev_index++) {
+ result = ps3_repository_read_dev_id(tmp.bus_index,
+ tmp.dev_index,
+ &tmp.dev_id);
+ if (result) {
+ pr_debug("%s:%u read_dev_id(%u:%u) failed\n", __func__,
+ __LINE__, tmp.bus_index, tmp.dev_index);
+ return result;
+ }
+ if (tmp.dev_id == dev_id)
+ goto found_dev;
+
+ pr_debug("%s:%u: skip, dev_id %lu\n", __func__, __LINE__,
+ tmp.dev_id);
+ }
+ pr_debug(" <- %s:%u: dev not found\n", __func__, __LINE__);
+ return result;
+
+found_dev:
+ result = ps3_repository_read_dev_type(tmp.bus_index, tmp.dev_index,
+ &tmp.dev_type);
+ if (result) {
+ pr_debug("%s:%u read_dev_type failed\n", __func__, __LINE__);
+ return result;
+ }
+
+ pr_debug(" <- %s:%u: found: type (%u:%u) index (%u:%u) id (%lu:%lu)\n",
+ __func__, __LINE__, tmp.bus_type, tmp.dev_type, tmp.bus_index,
+ tmp.dev_index, tmp.bus_id, tmp.dev_id);
*repo = tmp;
return 0;
}
@@ -402,50 +445,34 @@ int __devinit ps3_repository_find_devices(enum ps3_bus_type bus_type,
pr_debug(" -> %s:%d: find bus_type %u\n", __func__, __LINE__, bus_type);
- for (repo.bus_index = 0; repo.bus_index < 10; repo.bus_index++) {
+ repo.bus_type = bus_type;
+ result = ps3_repository_find_bus(repo.bus_type, 0, &repo.bus_index);
+ if (result) {
+ pr_debug(" <- %s:%u: bus not found\n", __func__, __LINE__);
+ return result;
+ }
- result = ps3_repository_read_bus_type(repo.bus_index,
- &repo.bus_type);
+ result = ps3_repository_read_bus_id(repo.bus_index, &repo.bus_id);
+ if (result) {
+ pr_debug("%s:%d read_bus_id(%u) failed\n", __func__, __LINE__,
+ repo.bus_index);
+ return result;
+ }
- if (result) {
- pr_debug("%s:%d read_bus_type(%u) failed\n",
- __func__, __LINE__, repo.bus_index);
+ for (repo.dev_index = 0; ; repo.dev_index++) {
+ result = ps3_repository_find_device(&repo);
+ if (result == -ENODEV) {
+ result = 0;
+ break;
+ } else if (result)
break;
- }
-
- if (repo.bus_type != bus_type) {
- pr_debug("%s:%d: skip, bus_type %u\n", __func__,
- __LINE__, repo.bus_type);
- continue;
- }
-
- result = ps3_repository_read_bus_id(repo.bus_index,
- &repo.bus_id);
+ result = callback(&repo);
if (result) {
- pr_debug("%s:%d read_bus_id(%u) failed\n",
- __func__, __LINE__, repo.bus_index);
- continue;
- }
-
- for (repo.dev_index = 0; ; repo.dev_index++) {
- result = ps3_repository_find_device(&repo);
-
- if (result == -ENODEV) {
- result = 0;
- break;
- } else if (result)
- break;
-
- result = callback(&repo);
-
- if (result) {
- pr_debug("%s:%d: abort at callback\n", __func__,
- __LINE__);
- break;
- }
+ pr_debug("%s:%d: abort at callback\n", __func__,
+ __LINE__);
+ break;
}
- break;
}
pr_debug(" <- %s:%d\n", __func__, __LINE__);
@@ -561,7 +588,7 @@ int ps3_repository_read_stor_dev_port(unsigned int bus_index,
make_first_field("bus", bus_index),
make_field("dev", dev_index),
make_field("port", 0),
- 0, port, 0);
+ 0, port, NULL);
}
int ps3_repository_read_stor_dev_blk_size(unsigned int bus_index,
@@ -571,7 +598,7 @@ int ps3_repository_read_stor_dev_blk_size(unsigned int bus_index,
make_first_field("bus", bus_index),
make_field("dev", dev_index),
make_field("blk_size", 0),
- 0, blk_size, 0);
+ 0, blk_size, NULL);
}
int ps3_repository_read_stor_dev_num_blocks(unsigned int bus_index,
@@ -581,7 +608,7 @@ int ps3_repository_read_stor_dev_num_blocks(unsigned int bus_index,
make_first_field("bus", bus_index),
make_field("dev", dev_index),
make_field("n_blocks", 0),
- 0, num_blocks, 0);
+ 0, num_blocks, NULL);
}
int ps3_repository_read_stor_dev_num_regions(unsigned int bus_index,
@@ -594,7 +621,7 @@ int ps3_repository_read_stor_dev_num_regions(unsigned int bus_index,
make_first_field("bus", bus_index),
make_field("dev", dev_index),
make_field("n_regs", 0),
- 0, &v1, 0);
+ 0, &v1, NULL);
*num_regions = v1;
return result;
}
@@ -611,7 +638,7 @@ int ps3_repository_read_stor_dev_region_id(unsigned int bus_index,
make_field("dev", dev_index),
make_field("region", region_index),
make_field("id", 0),
- &v1, 0);
+ &v1, NULL);
*region_id = v1;
return result;
}
@@ -624,7 +651,7 @@ int ps3_repository_read_stor_dev_region_size(unsigned int bus_index,
make_field("dev", dev_index),
make_field("region", region_index),
make_field("size", 0),
- region_size, 0);
+ region_size, NULL);
}
int ps3_repository_read_stor_dev_region_start(unsigned int bus_index,
@@ -635,7 +662,7 @@ int ps3_repository_read_stor_dev_region_start(unsigned int bus_index,
make_field("dev", dev_index),
make_field("region", region_index),
make_field("start", 0),
- region_start, 0);
+ region_start, NULL);
}
int ps3_repository_read_stor_dev_info(unsigned int bus_index,
@@ -684,6 +711,35 @@ int ps3_repository_read_stor_dev_region(unsigned int bus_index,
return result;
}
+/**
+ * ps3_repository_read_num_pu - Number of logical PU processors for this lpar.
+ */
+
+int ps3_repository_read_num_pu(u64 *num_pu)
+{
+ *num_pu = 0;
+ return read_node(PS3_LPAR_ID_CURRENT,
+ make_first_field("bi", 0),
+ make_field("pun", 0),
+ 0, 0,
+ num_pu, NULL);
+}
+
+/**
+ * ps3_repository_read_pu_id - Read the logical PU id.
+ * @pu_index: Zero based index.
+ * @pu_id: The logical PU id.
+ */
+
+int ps3_repository_read_pu_id(unsigned int pu_index, u64 *pu_id)
+{
+ return read_node(PS3_LPAR_ID_CURRENT,
+ make_first_field("bi", 0),
+ make_field("pu", pu_index),
+ 0, 0,
+ pu_id, NULL);
+}
+
int ps3_repository_read_rm_size(unsigned int ppe_id, u64 *rm_size)
{
return read_node(PS3_LPAR_ID_CURRENT,
@@ -691,7 +747,7 @@ int ps3_repository_read_rm_size(unsigned int ppe_id, u64 *rm_size)
make_field("pu", 0),
ppe_id,
make_field("rm_size", 0),
- rm_size, 0);
+ rm_size, NULL);
}
int ps3_repository_read_region_total(u64 *region_total)
@@ -700,7 +756,7 @@ int ps3_repository_read_region_total(u64 *region_total)
make_first_field("bi", 0),
make_field("rgntotal", 0),
0, 0,
- region_total, 0);
+ region_total, NULL);
}
/**
@@ -736,7 +792,7 @@ int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved)
make_first_field("bi", 0),
make_field("spun", 0),
0, 0,
- &v1, 0);
+ &v1, NULL);
*num_spu_reserved = v1;
return result;
}
@@ -755,7 +811,7 @@ int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id)
make_first_field("bi", 0),
make_field("spursvn", 0),
0, 0,
- &v1, 0);
+ &v1, NULL);
*num_resource_id = v1;
return result;
}
@@ -768,7 +824,7 @@ int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id)
*/
int ps3_repository_read_spu_resource_id(unsigned int res_index,
- enum ps3_spu_resource_type* resource_type, unsigned int *resource_id)
+ enum ps3_spu_resource_type *resource_type, unsigned int *resource_id)
{
int result;
u64 v1;
@@ -785,14 +841,14 @@ int ps3_repository_read_spu_resource_id(unsigned int res_index,
return result;
}
-int ps3_repository_read_boot_dat_address(u64 *address)
+static int ps3_repository_read_boot_dat_address(u64 *address)
{
return read_node(PS3_LPAR_ID_CURRENT,
make_first_field("bi", 0),
make_field("boot_dat", 0),
make_field("address", 0),
0,
- address, 0);
+ address, NULL);
}
int ps3_repository_read_boot_dat_size(unsigned int *size)
@@ -805,7 +861,7 @@ int ps3_repository_read_boot_dat_size(unsigned int *size)
make_field("boot_dat", 0),
make_field("size", 0),
0,
- &v1, 0);
+ &v1, NULL);
*size = v1;
return result;
}
@@ -820,7 +876,7 @@ int ps3_repository_read_vuart_av_port(unsigned int *port)
make_field("vir_uart", 0),
make_field("port", 0),
make_field("avset", 0),
- &v1, 0);
+ &v1, NULL);
*port = v1;
return result;
}
@@ -835,7 +891,7 @@ int ps3_repository_read_vuart_sysmgr_port(unsigned int *port)
make_field("vir_uart", 0),
make_field("port", 0),
make_field("sysmgr", 0),
- &v1, 0);
+ &v1, NULL);
*port = v1;
return result;
}
@@ -856,6 +912,10 @@ int ps3_repository_read_boot_dat_info(u64 *lpar_addr, unsigned int *size)
: ps3_repository_read_boot_dat_size(size);
}
+/**
+ * ps3_repository_read_num_be - Number of physical BE processors in the system.
+ */
+
int ps3_repository_read_num_be(unsigned int *num_be)
{
int result;
@@ -866,11 +926,17 @@ int ps3_repository_read_num_be(unsigned int *num_be)
0,
0,
0,
- &v1, 0);
+ &v1, NULL);
*num_be = v1;
return result;
}
+/**
+ * ps3_repository_read_be_node_id - Read the physical BE processor node id.
+ * @be_index: Zero based index.
+ * @node_id: The BE processor node id.
+ */
+
int ps3_repository_read_be_node_id(unsigned int be_index, u64 *node_id)
{
return read_node(PS3_LPAR_ID_PME,
@@ -878,7 +944,23 @@ int ps3_repository_read_be_node_id(unsigned int be_index, u64 *node_id)
0,
0,
0,
- node_id, 0);
+ node_id, NULL);
+}
+
+/**
+ * ps3_repository_read_be_id - Read the physical BE processor id.
+ * @node_id: The BE processor node id.
+ * @be_id: The BE processor id.
+ */
+
+int ps3_repository_read_be_id(u64 node_id, u64 *be_id)
+{
+ return read_node(PS3_LPAR_ID_PME,
+ make_first_field("be", 0),
+ node_id,
+ 0,
+ 0,
+ be_id, NULL);
}
int ps3_repository_read_tb_freq(u64 node_id, u64 *tb_freq)
@@ -888,7 +970,7 @@ int ps3_repository_read_tb_freq(u64 node_id, u64 *tb_freq)
node_id,
make_field("clock", 0),
0,
- tb_freq, 0);
+ tb_freq, NULL);
}
int ps3_repository_read_be_tb_freq(unsigned int be_index, u64 *tb_freq)
@@ -897,11 +979,29 @@ int ps3_repository_read_be_tb_freq(unsigned int be_index, u64 *tb_freq)
u64 node_id;
*tb_freq = 0;
- result = ps3_repository_read_be_node_id(0, &node_id);
+ result = ps3_repository_read_be_node_id(be_index, &node_id);
return result ? result
: ps3_repository_read_tb_freq(node_id, tb_freq);
}
+int ps3_repository_read_lpm_privileges(unsigned int be_index, u64 *lpar,
+ u64 *rights)
+{
+ int result;
+ u64 node_id;
+
+ *lpar = 0;
+ *rights = 0;
+ result = ps3_repository_read_be_node_id(be_index, &node_id);
+ return result ? result
+ : read_node(PS3_LPAR_ID_PME,
+ make_first_field("be", 0),
+ node_id,
+ make_field("lpm", 0),
+ make_field("priv", 0),
+ lpar, rights);
+}
+
#if defined(DEBUG)
int ps3_repository_dump_resource_info(const struct ps3_repository_device *repo)
@@ -1034,7 +1134,7 @@ static int dump_device_info(struct ps3_repository_device *repo,
continue;
}
- pr_debug("%s:%d (%u:%u): dev_type %u, dev_id %u\n", __func__,
+ pr_debug("%s:%d (%u:%u): dev_type %u, dev_id %lu\n", __func__,
__LINE__, repo->bus_index, repo->dev_index,
repo->dev_type, repo->dev_id);
@@ -1091,7 +1191,7 @@ int ps3_repository_dump_bus_info(void)
continue;
}
- pr_debug("%s:%d bus_%u: bus_type %u, bus_id %u, num_dev %u\n",
+ pr_debug("%s:%d bus_%u: bus_type %u, bus_id %lu, num_dev %u\n",
__func__, __LINE__, repo.bus_index, repo.bus_type,
repo.bus_id, num_dev);
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c
index d1630a074ac..5ad41189b49 100644
--- a/arch/powerpc/platforms/ps3/spu.c
+++ b/arch/powerpc/platforms/ps3/spu.c
@@ -28,6 +28,7 @@
#include <asm/spu_priv1.h>
#include <asm/lv1call.h>
+#include "../cell/spufs/spufs.h"
#include "platform.h"
/* spu_management_ops */
@@ -419,10 +420,34 @@ static int ps3_init_affinity(void)
return 0;
}
+/**
+ * ps3_enable_spu - Enable SPU run control.
+ *
+ * An outstanding enhancement for the PS3 would be to add a guard to check
+ * for incorrect access to the spu problem state when the spu context is
+ * disabled. This check could be implemented with a flag added to the spu
+ * context that would inhibit mapping problem state pages, and a routine
+ * to unmap spu problem state pages. When the spu is enabled with
+ * ps3_enable_spu() the flag would be set allowing pages to be mapped,
+ * and when the spu is disabled with ps3_disable_spu() the flag would be
+ * cleared and the mapped problem state pages would be unmapped.
+ */
+
+static void ps3_enable_spu(struct spu_context *ctx)
+{
+}
+
+static void ps3_disable_spu(struct spu_context *ctx)
+{
+ ctx->ops->runcntl_stop(ctx);
+}
+
const struct spu_management_ops spu_management_ps3_ops = {
.enumerate_spus = ps3_enumerate_spus,
.create_spu = ps3_create_spu,
.destroy_spu = ps3_destroy_spu,
+ .enable_spu = ps3_enable_spu,
+ .disable_spu = ps3_disable_spu,
.init_affinity = ps3_init_affinity,
};
@@ -505,8 +530,6 @@ static void mfc_sr1_set(struct spu *spu, u64 sr1)
static const u64 allowed = ~(MFC_STATE1_LOCAL_STORAGE_DECODE_MASK
| MFC_STATE1_PROBLEM_STATE_MASK);
- sr1 |= MFC_STATE1_MASTER_RUN_CONTROL_MASK;
-
BUG_ON((sr1 & allowed) != (spu_pdata(spu)->cache.sr1 & allowed));
spu_pdata(spu)->cache.sr1 = sr1;
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 6405f4a3676..43c493fca2d 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -42,8 +42,8 @@ struct {
int gpu;
} static usage_hack;
-static int ps3_is_device(struct ps3_system_bus_device *dev,
- unsigned int bus_id, unsigned int dev_id)
+static int ps3_is_device(struct ps3_system_bus_device *dev, u64 bus_id,
+ u64 dev_id)
{
return dev->bus_id == bus_id && dev->dev_id == dev_id;
}
@@ -182,8 +182,8 @@ int ps3_open_hv_device(struct ps3_system_bus_device *dev)
case PS3_MATCH_ID_SYSTEM_MANAGER:
pr_debug("%s:%d: unsupported match_id: %u\n", __func__,
__LINE__, dev->match_id);
- pr_debug("%s:%d: bus_id: %u\n", __func__,
- __LINE__, dev->bus_id);
+ pr_debug("%s:%d: bus_id: %lu\n", __func__, __LINE__,
+ dev->bus_id);
BUG();
return -EINVAL;
@@ -220,8 +220,8 @@ int ps3_close_hv_device(struct ps3_system_bus_device *dev)
case PS3_MATCH_ID_SYSTEM_MANAGER:
pr_debug("%s:%d: unsupported match_id: %u\n", __func__,
__LINE__, dev->match_id);
- pr_debug("%s:%d: bus_id: %u\n", __func__,
- __LINE__, dev->bus_id);
+ pr_debug("%s:%d: bus_id: %lu\n", __func__, __LINE__,
+ dev->bus_id);
BUG();
return -EINVAL;
@@ -240,7 +240,7 @@ EXPORT_SYMBOL_GPL(ps3_close_hv_device);
static void _dump_mmio_region(const struct ps3_mmio_region* r,
const char* func, int line)
{
- pr_debug("%s:%d: dev %u:%u\n", func, line, r->dev->bus_id,
+ pr_debug("%s:%d: dev %lu:%lu\n", func, line, r->dev->bus_id,
r->dev->dev_id);
pr_debug("%s:%d: bus_addr %lxh\n", func, line, r->bus_addr);
pr_debug("%s:%d: len %lxh\n", func, line, r->len);
@@ -715,6 +715,7 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev)
static unsigned int dev_ioc0_count;
static unsigned int dev_sb_count;
static unsigned int dev_vuart_count;
+ static unsigned int dev_lpm_count;
if (!dev->core.parent)
dev->core.parent = &ps3_system_bus;
@@ -737,6 +738,10 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev)
snprintf(dev->core.bus_id, sizeof(dev->core.bus_id),
"vuart_%02x", ++dev_vuart_count);
break;
+ case PS3_DEVICE_TYPE_LPM:
+ snprintf(dev->core.bus_id, sizeof(dev->core.bus_id),
+ "lpm_%02x", ++dev_lpm_count);
+ break;
default:
BUG();
};
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index fb3d636e088..9eb539ee5f9 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -29,6 +29,8 @@
#include <linux/rbtree.h>
#include <linux/seq_file.h>
#include <linux/spinlock.h>
+#include <linux/of.h>
+
#include <asm/atomic.h>
#include <asm/eeh.h>
#include <asm/eeh_event.h>
@@ -169,7 +171,6 @@ static void rtas_slot_error_detail(struct pci_dn *pdn, int severity,
*/
static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
{
- struct device_node *dn;
struct pci_dev *dev = pdn->pcidev;
u32 cfg;
int cap, i;
@@ -243,12 +244,12 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
/* Gather status on devices under the bridge */
if (dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) {
- dn = pdn->node->child;
- while (dn) {
+ struct device_node *dn;
+
+ for_each_child_of_node(pdn->node, dn) {
pdn = PCI_DN(dn);
if (pdn)
n += gather_pci_data(pdn, buf+n, len-n);
- dn = dn->sibling;
}
}
@@ -372,7 +373,7 @@ struct device_node * find_device_pe(struct device_node *dn)
return dn;
}
-/** Mark all devices that are peers of this device as failed.
+/** Mark all devices that are children of this device as failed.
* Mark the device driver too, so that it can see the failure
* immediately; this is critical, since some drivers poll
* status registers in interrupts ... If a driver is polling,
@@ -380,9 +381,11 @@ struct device_node * find_device_pe(struct device_node *dn)
* an interrupt context, which is bad.
*/
-static void __eeh_mark_slot (struct device_node *dn, int mode_flag)
+static void __eeh_mark_slot(struct device_node *parent, int mode_flag)
{
- while (dn) {
+ struct device_node *dn;
+
+ for_each_child_of_node(parent, dn) {
if (PCI_DN(dn)) {
/* Mark the pci device driver too */
struct pci_dev *dev = PCI_DN(dn)->pcidev;
@@ -392,10 +395,8 @@ static void __eeh_mark_slot (struct device_node *dn, int mode_flag)
if (dev && dev->driver)
dev->error_state = pci_channel_io_frozen;
- if (dn->child)
- __eeh_mark_slot (dn->child, mode_flag);
+ __eeh_mark_slot(dn, mode_flag);
}
- dn = dn->sibling;
}
}
@@ -415,19 +416,19 @@ void eeh_mark_slot (struct device_node *dn, int mode_flag)
if (dev)
dev->error_state = pci_channel_io_frozen;
- __eeh_mark_slot (dn->child, mode_flag);
+ __eeh_mark_slot(dn, mode_flag);
}
-static void __eeh_clear_slot (struct device_node *dn, int mode_flag)
+static void __eeh_clear_slot(struct device_node *parent, int mode_flag)
{
- while (dn) {
+ struct device_node *dn;
+
+ for_each_child_of_node(parent, dn) {
if (PCI_DN(dn)) {
PCI_DN(dn)->eeh_mode &= ~mode_flag;
PCI_DN(dn)->eeh_check_count = 0;
- if (dn->child)
- __eeh_clear_slot (dn->child, mode_flag);
+ __eeh_clear_slot(dn, mode_flag);
}
- dn = dn->sibling;
}
}
@@ -444,7 +445,7 @@ void eeh_clear_slot (struct device_node *dn, int mode_flag)
PCI_DN(dn)->eeh_mode &= ~mode_flag;
PCI_DN(dn)->eeh_check_count = 0;
- __eeh_clear_slot (dn->child, mode_flag);
+ __eeh_clear_slot(dn, mode_flag);
spin_unlock_irqrestore(&confirm_error_lock, flags);
}
@@ -480,6 +481,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
no_dn++;
return 0;
}
+ dn = find_device_pe(dn);
pdn = PCI_DN(dn);
/* Access to IO BARs might get this far and still not want checking. */
@@ -545,7 +547,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
/* Note that config-io to empty slots may fail;
* they are empty when they don't have children. */
- if ((rets[0] == 5) && (dn->child == NULL)) {
+ if ((rets[0] == 5) && (rets[2] == 0) && (dn->child == NULL)) {
false_positives++;
pdn->eeh_false_positives ++;
rc = 0;
@@ -848,11 +850,8 @@ void eeh_restore_bars(struct pci_dn *pdn)
if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code))
__restore_bars (pdn);
- dn = pdn->node->child;
- while (dn) {
+ for_each_child_of_node(pdn->node, dn)
eeh_restore_bars (PCI_DN(dn));
- dn = dn->sibling;
- }
}
/**
@@ -1130,7 +1129,8 @@ static void eeh_add_device_early(struct device_node *dn)
void eeh_add_device_tree_early(struct device_node *dn)
{
struct device_node *sib;
- for (sib = dn->child; sib; sib = sib->sibling)
+
+ for_each_child_of_node(dn, sib)
eeh_add_device_tree_early(sib);
eeh_add_device_early(dn);
}
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index 57e025e84ab..68ea5eee39a 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -310,8 +310,6 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
const char *location, *pci_str, *drv_str;
frozen_dn = find_device_pe(event->dn);
- frozen_bus = pcibios_find_pci_bus(frozen_dn);
-
if (!frozen_dn) {
location = of_get_property(event->dn, "ibm,loc-code", NULL);
@@ -321,6 +319,8 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
location, pci_name(event->dev));
return NULL;
}
+
+ frozen_bus = pcibios_find_pci_bus(frozen_dn);
location = of_get_property(frozen_dn, "ibm,loc-code", NULL);
location = location ? location : "unknown";
@@ -354,13 +354,6 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
if (frozen_pdn->eeh_freeze_count > EEH_MAX_ALLOWED_FREEZES)
goto excess_failures;
- /* Get the current PCI slot state. */
- rc = eeh_wait_for_slot_status (frozen_pdn, MAX_WAIT_FOR_RECOVERY*1000);
- if (rc < 0) {
- printk(KERN_WARNING "EEH: Permanent failure\n");
- goto hard_fail;
- }
-
printk(KERN_WARNING
"EEH: This PCI device has failed %d times in the last hour:\n",
frozen_pdn->eeh_freeze_count);
@@ -376,6 +369,14 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
*/
pci_walk_bus(frozen_bus, eeh_report_error, &result);
+ /* Get the current PCI slot state. This can take a long time,
+ * sometimes over 3 seconds for certain systems. */
+ rc = eeh_wait_for_slot_status (frozen_pdn, MAX_WAIT_FOR_RECOVERY*1000);
+ if (rc < 0) {
+ printk(KERN_WARNING "EEH: Permanent failure\n");
+ goto hard_fail;
+ }
+
/* Since rtas may enable MMIO when posting the error log,
* don't post the error log until after all dev drivers
* have been informed.
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index be17d239507..a65c7630820 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -251,7 +251,7 @@ static void iommu_table_setparms(struct pci_controller *phb,
const unsigned long *basep;
const u32 *sizep;
- node = (struct device_node *)phb->arch_data;
+ node = phb->dn;
basep = of_get_property(node, "linux,tce-base", NULL);
sizep = of_get_property(node, "linux,tce-size", NULL);
@@ -296,11 +296,12 @@ static void iommu_table_setparms(struct pci_controller *phb,
static void iommu_table_setparms_lpar(struct pci_controller *phb,
struct device_node *dn,
struct iommu_table *tbl,
- const void *dma_window)
+ const void *dma_window,
+ int bussubno)
{
unsigned long offset, size;
- tbl->it_busno = PCI_DN(dn)->bussubno;
+ tbl->it_busno = bussubno;
of_parse_dma_window(dn, dma_window, &tbl->it_index, &offset, &size);
tbl->it_base = 0;
@@ -420,17 +421,10 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
pdn->full_name, ppci->iommu_table);
if (!ppci->iommu_table) {
- /* Bussubno hasn't been copied yet.
- * Do it now because iommu_table_setparms_lpar needs it.
- */
-
- ppci->bussubno = bus->number;
-
tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
ppci->phb->node);
-
- iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window);
-
+ iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window,
+ bus->number);
ppci->iommu_table = iommu_init_table(tbl, ppci->phb->node);
DBG(" created table: %p\n", ppci->iommu_table);
}
@@ -523,14 +517,10 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
pci = PCI_DN(pdn);
if (!pci->iommu_table) {
- /* iommu_table_setparms_lpar needs bussubno. */
- pci->bussubno = pci->phb->bus->number;
-
tbl = kmalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
pci->phb->node);
-
- iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window);
-
+ iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window,
+ pci->phb->bus->number);
pci->iommu_table = iommu_init_table(tbl, pci->phb->node);
DBG(" created table: %p\n", pci->iommu_table);
} else {
@@ -556,7 +546,7 @@ static int iommu_reconfig_notifier(struct notifier_block *nb, unsigned long acti
case PSERIES_RECONFIG_REMOVE:
if (pci && pci->iommu_table &&
of_get_property(np, "ibm,dma-window", NULL))
- iommu_free_table(np);
+ iommu_free_table(pci->iommu_table, np->full_name);
break;
default:
err = NOTIFY_DONE;
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index 47f0e0857f0..5a5a19e40bb 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -83,7 +83,7 @@ EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices);
/* Must be called before pci_bus_add_devices */
void
-pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus)
+pcibios_fixup_new_pci_devices(struct pci_bus *bus)
{
struct pci_dev *dev;
@@ -98,8 +98,6 @@ pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus)
/* Fill device archdata and setup iommu table */
pcibios_setup_new_device(dev);
- if(fix_bus)
- pcibios_fixup_device_resources(dev, bus);
pci_read_irq_line(dev);
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
struct resource *r = &dev->resource[i];
@@ -132,8 +130,8 @@ pcibios_pci_config_bridge(struct pci_dev *dev)
pci_scan_child_bus(child_bus);
- /* Fixup new pci devices without touching bus struct */
- pcibios_fixup_new_pci_devices(child_bus, 0);
+ /* Fixup new pci devices */
+ pcibios_fixup_new_pci_devices(child_bus);
/* Make the discovered devices available */
pci_bus_add_devices(child_bus);
@@ -169,7 +167,7 @@ pcibios_add_pci_devices(struct pci_bus * bus)
/* use ofdt-based probe */
of_scan_bus(dn, bus);
if (!list_empty(&bus->devices)) {
- pcibios_fixup_new_pci_devices(bus, 0);
+ pcibios_fixup_new_pci_devices(bus);
pci_bus_add_devices(bus);
eeh_add_device_tree_late(bus);
}
@@ -178,7 +176,7 @@ pcibios_add_pci_devices(struct pci_bus * bus)
slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
if (num) {
- pcibios_fixup_new_pci_devices(bus, 1);
+ pcibios_fixup_new_pci_devices(bus);
pci_bus_add_devices(bus);
eeh_add_device_tree_late(bus);
}
@@ -208,7 +206,7 @@ struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
eeh_add_device_tree_early(dn);
scan_phb(phb);
- pcibios_fixup_new_pci_devices(phb->bus, 0);
+ pcibios_fixup_new_pci_devices(phb->bus);
pci_bus_add_devices(phb->bus);
eeh_add_device_tree_late(phb->bus);
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h
index d003c80fa31..d8680b589dc 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -8,11 +8,6 @@ static inline long poll_pending(void)
return plpar_hcall_norets(H_POLL_PENDING);
}
-static inline long prod_processor(void)
-{
- return plpar_hcall_norets(H_PROD);
-}
-
static inline long cede_processor(void)
{
return plpar_hcall_norets(H_CEDE);
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 116305b22a2..ea4c65917a6 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -46,6 +46,7 @@
#include <asm/pSeries_reconfig.h>
#include <asm/mpic.h>
#include <asm/vdso_datapage.h>
+#include <asm/cputhreads.h>
#include "plpar_wrappers.h"
#include "pseries.h"
@@ -202,7 +203,7 @@ static int smp_pSeries_cpu_bootable(unsigned int nr)
*/
if (system_state < SYSTEM_RUNNING &&
cpu_has_feature(CPU_FTR_SMT) &&
- !smt_enabled_at_boot && nr % 2 != 0)
+ !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
return 0;
return 1;
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index 66e7d68ffeb..8f8dd9c3ca6 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -87,19 +87,25 @@ static int ibm_int_off;
/* Direct HW low level accessors */
-static inline unsigned int direct_xirr_info_get(int n_cpu)
+static inline unsigned int direct_xirr_info_get(void)
{
- return in_be32(&xics_per_cpu[n_cpu]->xirr.word);
+ int cpu = smp_processor_id();
+
+ return in_be32(&xics_per_cpu[cpu]->xirr.word);
}
-static inline void direct_xirr_info_set(int n_cpu, int value)
+static inline void direct_xirr_info_set(int value)
{
- out_be32(&xics_per_cpu[n_cpu]->xirr.word, value);
+ int cpu = smp_processor_id();
+
+ out_be32(&xics_per_cpu[cpu]->xirr.word, value);
}
-static inline void direct_cppr_info(int n_cpu, u8 value)
+static inline void direct_cppr_info(u8 value)
{
- out_8(&xics_per_cpu[n_cpu]->xirr.bytes[0], value);
+ int cpu = smp_processor_id();
+
+ out_8(&xics_per_cpu[cpu]->xirr.bytes[0], value);
}
static inline void direct_qirr_info(int n_cpu, u8 value)
@@ -111,7 +117,7 @@ static inline void direct_qirr_info(int n_cpu, u8 value)
/* LPAR low level accessors */
-static inline unsigned int lpar_xirr_info_get(int n_cpu)
+static inline unsigned int lpar_xirr_info_get(void)
{
unsigned long lpar_rc;
unsigned long return_value;
@@ -122,7 +128,7 @@ static inline unsigned int lpar_xirr_info_get(int n_cpu)
return (unsigned int)return_value;
}
-static inline void lpar_xirr_info_set(int n_cpu, int value)
+static inline void lpar_xirr_info_set(int value)
{
unsigned long lpar_rc;
unsigned long val64 = value & 0xffffffff;
@@ -133,7 +139,7 @@ static inline void lpar_xirr_info_set(int n_cpu, int value)
val64);
}
-static inline void lpar_cppr_info(int n_cpu, u8 value)
+static inline void lpar_cppr_info(u8 value)
{
unsigned long lpar_rc;
@@ -275,21 +281,19 @@ static unsigned int xics_startup(unsigned int virq)
static void xics_eoi_direct(unsigned int virq)
{
- int cpu = smp_processor_id();
unsigned int irq = (unsigned int)irq_map[virq].hwirq;
iosync();
- direct_xirr_info_set(cpu, (0xff << 24) | irq);
+ direct_xirr_info_set((0xff << 24) | irq);
}
static void xics_eoi_lpar(unsigned int virq)
{
- int cpu = smp_processor_id();
unsigned int irq = (unsigned int)irq_map[virq].hwirq;
iosync();
- lpar_xirr_info_set(cpu, (0xff << 24) | irq);
+ lpar_xirr_info_set((0xff << 24) | irq);
}
static inline unsigned int xics_remap_irq(unsigned int vec)
@@ -312,16 +316,12 @@ static inline unsigned int xics_remap_irq(unsigned int vec)
static unsigned int xics_get_irq_direct(void)
{
- unsigned int cpu = smp_processor_id();
-
- return xics_remap_irq(direct_xirr_info_get(cpu));
+ return xics_remap_irq(direct_xirr_info_get());
}
static unsigned int xics_get_irq_lpar(void)
{
- unsigned int cpu = smp_processor_id();
-
- return xics_remap_irq(lpar_xirr_info_get(cpu));
+ return xics_remap_irq(lpar_xirr_info_get());
}
#ifdef CONFIG_SMP
@@ -387,12 +387,12 @@ void xics_cause_IPI(int cpu)
#endif /* CONFIG_SMP */
-static void xics_set_cpu_priority(int cpu, unsigned char cppr)
+static void xics_set_cpu_priority(unsigned char cppr)
{
if (firmware_has_feature(FW_FEATURE_LPAR))
- lpar_cppr_info(cpu, cppr);
+ lpar_cppr_info(cppr);
else
- direct_cppr_info(cpu, cppr);
+ direct_cppr_info(cppr);
iosync();
}
@@ -440,9 +440,7 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
void xics_setup_cpu(void)
{
- int cpu = smp_processor_id();
-
- xics_set_cpu_priority(cpu, 0xff);
+ xics_set_cpu_priority(0xff);
/*
* Put the calling processor into the GIQ. This is really only
@@ -783,7 +781,7 @@ void xics_teardown_cpu(int secondary)
unsigned int ipi;
struct irq_desc *desc;
- xics_set_cpu_priority(cpu, 0);
+ xics_set_cpu_priority(0);
/*
* Clear IPI
@@ -824,10 +822,11 @@ void xics_teardown_cpu(int secondary)
void xics_migrate_irqs_away(void)
{
int status;
- unsigned int irq, virq, cpu = smp_processor_id();
+ int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
+ unsigned int irq, virq;
/* Reject any interrupt that was queued to us... */
- xics_set_cpu_priority(cpu, 0);
+ xics_set_cpu_priority(0);
/* remove ourselves from the global interrupt queue */
status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE,
@@ -835,7 +834,7 @@ void xics_migrate_irqs_away(void)
WARN_ON(status < 0);
/* Allow IPIs again... */
- xics_set_cpu_priority(cpu, DEFAULT_PRIORITY);
+ xics_set_cpu_priority(DEFAULT_PRIORITY);
for_each_irq(virq) {
struct irq_desc *desc;
@@ -874,7 +873,7 @@ void xics_migrate_irqs_away(void)
* The irq has to be migrated only in the single cpu
* case.
*/
- if (xics_status[0] != get_hard_smp_processor_id(cpu))
+ if (xics_status[0] != hw_cpu)
goto unlock;
printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
diff --git a/arch/powerpc/platforms/pseries/xics.h b/arch/powerpc/platforms/pseries/xics.h
index db0ec3ba3ae..9ffd809d29e 100644
--- a/arch/powerpc/platforms/pseries/xics.h
+++ b/arch/powerpc/platforms/pseries/xics.h
@@ -21,9 +21,6 @@ extern void xics_cause_IPI(int cpu);
extern void xics_request_IPIs(void);
extern void xics_migrate_irqs_away(void);
-/* first argument is ignored for now*/
-void pSeriesLP_cppr_info(int n_cpu, u8 value);
-
struct xics_ipi_struct {
volatile unsigned long value;
} ____cacheline_aligned;