diff options
Diffstat (limited to 'arch/ppc/platforms/4xx')
24 files changed, 125 insertions, 806 deletions
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig index 805dd98908a..76f4476cab4 100644 --- a/arch/ppc/platforms/4xx/Kconfig +++ b/arch/ppc/platforms/4xx/Kconfig @@ -16,11 +16,6 @@ choice depends on 40x default WALNUT -config ASH - bool "Ash" - help - This option enables support for the IBM NP405H evaluation board. - config BUBINGA bool "Bubinga" select WANT_EARLY_SERIAL @@ -37,11 +32,6 @@ config EP405 help This option enables support for the EP405/EP405PC boards. -config OAK - bool "Oak" - help - This option enables support for the IBM 403GCX evaluation board. - config REDWOOD_5 bool "Redwood-5" help @@ -152,13 +142,13 @@ config IBM440EP_ERR42 # All 405-based cores up until the 405GPR and 405EP have this errata. config IBM405_ERR77 bool - depends on 40x && !403GCX && !405GPR + depends on 40x && !403GCX && !405GPR && !405EP default y # All 40x-based cores, up until the 405GPR and 405EP have this errata. config IBM405_ERR51 bool - depends on 40x && !405GPR + depends on 40x && !405GPR && !405EP default y config BOOKE @@ -186,6 +176,7 @@ config BIOS_FIXUP depends on BUBINGA || EP405 || SYCAMORE || WALNUT default y +# OAK doesn't exist but wanted to keep this around for any future 403GCX boards config 403GCX bool depends OAK diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile index 844c3b5066e..1dd6d7fd6a9 100644 --- a/arch/ppc/platforms/4xx/Makefile +++ b/arch/ppc/platforms/4xx/Makefile @@ -1,14 +1,12 @@ # # Makefile for the PowerPC 4xx linux kernel. -obj-$(CONFIG_ASH) += ash.o obj-$(CONFIG_BAMBOO) += bamboo.o obj-$(CONFIG_CPCI405) += cpci405.o obj-$(CONFIG_EBONY) += ebony.o obj-$(CONFIG_EP405) += ep405.o obj-$(CONFIG_BUBINGA) += bubinga.o obj-$(CONFIG_LUAN) += luan.o -obj-$(CONFIG_OAK) += oak.o obj-$(CONFIG_OCOTEA) += ocotea.o obj-$(CONFIG_REDWOOD_5) += redwood5.o obj-$(CONFIG_REDWOOD_6) += redwood6.o diff --git a/arch/ppc/platforms/4xx/ash.c b/arch/ppc/platforms/4xx/ash.c deleted file mode 100644 index ce291179371..00000000000 --- a/arch/ppc/platforms/4xx/ash.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - * arch/ppc/platforms/4xx/ash.c - * - * Support for the IBM NP405H ash eval board - * - * Author: Armin Kuster <akuster@mvista.com> - * - * 2001-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ -#include <linux/config.h> -#include <linux/init.h> -#include <linux/pagemap.h> -#include <linux/pci.h> - -#include <asm/machdep.h> -#include <asm/pci-bridge.h> -#include <asm/io.h> -#include <asm/ocp.h> -#include <asm/ibm_ocp_pci.h> -#include <asm/todc.h> - -#ifdef DEBUG -#define DBG(x...) printk(x) -#else -#define DBG(x...) -#endif - -void *ash_rtc_base; - -/* Some IRQs unique to Walnut. - * Used by the generic 405 PCI setup functions in ppc4xx_pci.c - */ -int __init -ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) -{ - static char pci_irq_table[][4] = - /* - * PCI IDSEL/INTPIN->INTLINE - * A B C D - */ - { - {24, 24, 24, 24}, /* IDSEL 1 - PCI slot 1 */ - {25, 25, 25, 25}, /* IDSEL 2 - PCI slot 2 */ - {26, 26, 26, 26}, /* IDSEL 3 - PCI slot 3 */ - {27, 27, 27, 27}, /* IDSEL 4 - PCI slot 4 */ - }; - - const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4; - return PCI_IRQ_TABLE_LOOKUP; -} - -void __init -ash_setup_arch(void) -{ - ppc4xx_setup_arch(); - - ibm_ocp_set_emac(0, 3); - -#ifdef CONFIG_DEBUG_BRINGUP - int i; - printk("\n"); - printk("machine\t: %s\n", PPC4xx_MACHINE_NAME); - printk("\n"); - printk("bi_s_version\t %s\n", bip->bi_s_version); - printk("bi_r_version\t %s\n", bip->bi_r_version); - printk("bi_memsize\t 0x%8.8x\t %dMBytes\n", bip->bi_memsize, - bip->bi_memsize / (1024 * 1000)); - for (i = 0; i < EMAC_NUMS; i++) { - printk("bi_enetaddr %d\t %2.2x%2.2x%2.2x-%2.2x%2.2x%2.2x\n", i, - bip->bi_enetaddr[i][0], bip->bi_enetaddr[i][1], - bip->bi_enetaddr[i][2], bip->bi_enetaddr[i][3], - bip->bi_enetaddr[i][4], bip->bi_enetaddr[i][5]); - } - printk("bi_pci_enetaddr %d\t %2.2x%2.2x%2.2x-%2.2x%2.2x%2.2x\n", 0, - bip->bi_pci_enetaddr[0], bip->bi_pci_enetaddr[1], - bip->bi_pci_enetaddr[2], bip->bi_pci_enetaddr[3], - bip->bi_pci_enetaddr[4], bip->bi_pci_enetaddr[5]); - - printk("bi_intfreq\t 0x%8.8x\t clock:\t %dMhz\n", - bip->bi_intfreq, bip->bi_intfreq / 1000000); - - printk("bi_busfreq\t 0x%8.8x\t plb bus clock:\t %dMHz\n", - bip->bi_busfreq, bip->bi_busfreq / 1000000); - printk("bi_pci_busfreq\t 0x%8.8x\t pci bus clock:\t %dMHz\n", - bip->bi_pci_busfreq, bip->bi_pci_busfreq / 1000000); - - printk("\n"); -#endif - /* RTC step for ash */ - ash_rtc_base = (void *) ASH_RTC_VADDR; - TODC_INIT(TODC_TYPE_DS1743, ash_rtc_base, ash_rtc_base, ash_rtc_base, - 8); -} - -void __init -bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip) -{ - /* - * Expected PCI mapping: - * - * PLB addr PCI memory addr - * --------------------- --------------------- - * 0000'0000 - 7fff'ffff <--- 0000'0000 - 7fff'ffff - * 8000'0000 - Bfff'ffff ---> 8000'0000 - Bfff'ffff - * - * PLB addr PCI io addr - * --------------------- --------------------- - * e800'0000 - e800'ffff ---> 0000'0000 - 0001'0000 - * - * The following code is simplified by assuming that the bootrom - * has been well behaved in following this mapping. - */ - -#ifdef DEBUG - int i; - - printk("ioremap PCLIO_BASE = 0x%x\n", pcip); - printk("PCI bridge regs before fixup \n"); - for (i = 0; i <= 2; i++) { - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); - printk(" pmm%dla\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); - printk(" pmm%dpcila\t0x%x\n", i, - in_le32(&(pcip->pmm[i].pcila))); - printk(" pmm%dpciha\t0x%x\n", i, - in_le32(&(pcip->pmm[i].pciha))); - } - printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); - printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); - printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); - printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); - for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { - early_read_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - &bar_response); - DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", - hose->first_busno, PCI_SLOT(hose->first_busno), - PCI_FUNC(hose->first_busno), bar, bar_response); - } - -#endif - if (ppc_md.progress) - ppc_md.progress("bios_fixup(): enter", 0x800); - - /* added for IBM boot rom version 1.15 bios bar changes -AK */ - - /* Disable region first */ - out_le32((void *) &(pcip->pmm[0].ma), 0x00000000); - /* PLB starting addr, PCI: 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].la), 0x80000000); - /* PCI start addr, 0x80000000 */ - out_le32((void *) &(pcip->pmm[0].pcila), PPC405_PCI_MEM_BASE); - /* 512MB range of PLB to PCI */ - out_le32((void *) &(pcip->pmm[0].pciha), 0x00000000); - /* Enable no pre-fetch, enable region */ - out_le32((void *) &(pcip->pmm[0].ma), ((0xffffffff - - (PPC405_PCI_UPPER_MEM - - PPC405_PCI_MEM_BASE)) | 0x01)); - - /* Disable region one */ - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[1].la), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[1].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[1].ma), 0x00000000); - - /* Disable region two */ - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - out_le32((void *) &(pcip->pmm[2].la), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pcila), 0x00000000); - out_le32((void *) &(pcip->pmm[2].pciha), 0x00000000); - out_le32((void *) &(pcip->pmm[2].ma), 0x00000000); - - /* Enable PTM1 and PTM2, mapped to PLB address 0. */ - - out_le32((void *) &(pcip->ptm1la), 0x00000000); - out_le32((void *) &(pcip->ptm1ms), 0x00000001); - out_le32((void *) &(pcip->ptm2la), 0x00000000); - out_le32((void *) &(pcip->ptm2ms), 0x00000001); - - /* Write zero to PTM1 BAR. */ - - early_write_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), - PCI_BASE_ADDRESS_1, - 0x00000000); - - /* Disable PTM2 (unused) */ - - out_le32((void *) &(pcip->ptm2la), 0x00000000); - out_le32((void *) &(pcip->ptm2ms), 0x00000000); - - /* end work arround */ - if (ppc_md.progress) - ppc_md.progress("bios_fixup(): done", 0x800); - -#ifdef DEBUG - printk("PCI bridge regs after fixup \n"); - for (i = 0; i <= 2; i++) { - printk(" pmm%dma\t0x%x\n", i, in_le32(&(pcip->pmm[i].ma))); - printk(" pmm%dla\t0x%x\n", i, in_le32(&(pcip->pmm[i].la))); - printk(" pmm%dpcila\t0x%x\n", i, - in_le32(&(pcip->pmm[i].pcila))); - printk(" pmm%dpciha\t0x%x\n", i, - in_le32(&(pcip->pmm[i].pciha))); - } - printk(" ptm1ms\t0x%x\n", in_le32(&(pcip->ptm1ms))); - printk(" ptm1la\t0x%x\n", in_le32(&(pcip->ptm1la))); - printk(" ptm2ms\t0x%x\n", in_le32(&(pcip->ptm2ms))); - printk(" ptm2la\t0x%x\n", in_le32(&(pcip->ptm2la))); - - for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) { - early_read_config_dword(hose, hose->first_busno, - PCI_FUNC(hose->first_busno), bar, - &bar_response); - DBG("BUS %d, device %d, Function %d bar 0x%8.8x is 0x%8.8x\n", - hose->first_busno, PCI_SLOT(hose->first_busno), - PCI_FUNC(hose->first_busno), bar, bar_response); - } - - -#endif -} - -void __init -ash_map_io(void) -{ - ppc4xx_map_io(); - io_block_mapping(ASH_RTC_VADDR, ASH_RTC_PADDR, ASH_RTC_SIZE, _PAGE_IO); -} - -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - ppc4xx_init(r3, r4, r5, r6, r7); - - ppc_md.setup_arch = ash_setup_arch; - ppc_md.setup_io_mappings = ash_map_io; - -#ifdef CONFIG_PPC_RTC - ppc_md.time_init = todc_time_init; - ppc_md.set_rtc_time = todc_set_rtc_time; - ppc_md.get_rtc_time = todc_get_rtc_time; - ppc_md.nvram_read_val = todc_direct_read_val; - ppc_md.nvram_write_val = todc_direct_write_val; -#endif -} diff --git a/arch/ppc/platforms/4xx/ash.h b/arch/ppc/platforms/4xx/ash.h deleted file mode 100644 index 5f7448ea418..00000000000 --- a/arch/ppc/platforms/4xx/ash.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * arch/ppc/platforms/4xx/ash.h - * - * Macros, definitions, and data structures specific to the IBM PowerPC - * Ash eval board. - * - * Author: Armin Kuster <akuster@mvista.com> - * - * 2000-2002 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#ifdef __KERNEL__ -#ifndef __ASM_ASH_H__ -#define __ASM_ASH_H__ -#include <platforms/4xx/ibmnp405h.h> - -#ifndef __ASSEMBLY__ -/* - * Data structure defining board information maintained by the boot - * ROM on IBM's "Ash" evaluation board. An effort has been made to - * keep the field names consistent with the 8xx 'bd_t' board info - * structures. - */ - -typedef struct board_info { - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[30]; /* Version of the IBM ROM */ - unsigned int bi_memsize; /* DRAM installed, in bytes */ - unsigned char bi_enetaddr[4][6]; /* Local Ethernet MAC address */ - unsigned char bi_pci_enetaddr[6]; - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI speed in Hz */ -} bd_t; - -/* Some 4xx parts use a different timebase frequency from the internal clock. -*/ -#define bi_tbfreq bi_intfreq - -/* Memory map for the IBM "Ash" NP405H evaluation board. - */ - -extern void *ash_rtc_base; -#define ASH_RTC_PADDR ((uint)0xf0000000) -#define ASH_RTC_VADDR ASH_RTC_PADDR -#define ASH_RTC_SIZE ((uint)8*1024) - - -/* Early initialization address mapping for block_io. - * Standard 405GP map. - */ -#define PPC4xx_PCI_IO_PADDR ((uint)PPC405_PCI_PHY_IO_BASE) -#define PPC4xx_PCI_IO_VADDR PPC4xx_PCI_IO_PADDR -#define PPC4xx_PCI_IO_SIZE ((uint)64*1024) -#define PPC4xx_PCI_CFG_PADDR ((uint)PPC405_PCI_CONFIG_ADDR) -#define PPC4xx_PCI_CFG_VADDR PPC4xx_PCI_CFG_PADDR -#define PPC4xx_PCI_CFG_SIZE ((uint)4*1024) -#define PPC4xx_PCI_LCFG_PADDR ((uint)0xef400000) -#define PPC4xx_PCI_LCFG_VADDR PPC4xx_PCI_LCFG_PADDR -#define PPC4xx_PCI_LCFG_SIZE ((uint)4*1024) -#define PPC4xx_ONB_IO_PADDR ((uint)0xef600000) -#define PPC4xx_ONB_IO_VADDR PPC4xx_ONB_IO_PADDR -#define PPC4xx_ONB_IO_SIZE ((uint)4*1024) - -#define NR_BOARD_IRQS 32 - -#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK -#define BASE_BAUD 201600 -#else -#define BASE_BAUD 691200 -#endif - -#define PPC4xx_MACHINE_NAME "IBM NP405H Ash" - -extern char pci_irq_table[][4]; - - -#endif /* !__ASSEMBLY__ */ -#endif /* __ASM_ASH_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c index f116787b0b7..ac391d463d7 100644 --- a/arch/ppc/platforms/4xx/bamboo.c +++ b/arch/ppc/platforms/4xx/bamboo.c @@ -52,13 +52,6 @@ #include <syslib/gen550.h> #include <syslib/ibm440gx_common.h> -/* - * This is a horrible kludge, we eventually need to abstract this - * generic PHY stuff, so the standard phy mode defines can be - * easily used from arch code. - */ -#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h" - bd_t __res; static struct ibm44x_clocks clocks __initdata; @@ -123,33 +116,69 @@ bamboo_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) static void __init bamboo_set_emacdata(void) { - unsigned char * selection1_base; + u8 * base_addr; struct ocp_def *def; struct ocp_func_emac_data *emacdata; - u8 selection1_val; + u8 val; int mode; + u32 excluded = 0; - selection1_base = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16); - selection1_val = readb(selection1_base); - iounmap((void *) selection1_base); - if (BAMBOO_SEL_MII(selection1_val)) + base_addr = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16); + val = readb(base_addr); + iounmap((void *) base_addr); + if (BAMBOO_SEL_MII(val)) mode = PHY_MODE_MII; - else if (BAMBOO_SEL_RMII(selection1_val)) + else if (BAMBOO_SEL_RMII(val)) mode = PHY_MODE_RMII; else mode = PHY_MODE_SMII; - /* Set mac_addr and phy mode for each EMAC */ + /* + * SW2 on the Bamboo is used for ethernet configuration and is accessed + * via the CONFIG2 register in the FPGA. If the ANEG pin is set, + * overwrite the supported features with the settings in SW2. + * + * This is used as a workaround for the improperly biased RJ-45 sockets + * on the Rev. 0 Bamboo. By default only 10baseT is functional. + * Removing inductors L17 and L18 from the board allows 100baseT, but + * disables 10baseT. The Rev. 1 has no such limitations. + */ + + base_addr = ioremap64(BAMBOO_FPGA_CONFIG2_REG_ADDR, 8); + val = readb(base_addr); + iounmap((void *) base_addr); + if (!BAMBOO_AUTONEGOTIATE(val)) { + excluded |= SUPPORTED_Autoneg; + if (BAMBOO_FORCE_100Mbps(val)) { + excluded |= SUPPORTED_10baseT_Full; + excluded |= SUPPORTED_10baseT_Half; + if (BAMBOO_FULL_DUPLEX_EN(val)) + excluded |= SUPPORTED_100baseT_Half; + else + excluded |= SUPPORTED_100baseT_Full; + } else { + excluded |= SUPPORTED_100baseT_Full; + excluded |= SUPPORTED_100baseT_Half; + if (BAMBOO_FULL_DUPLEX_EN(val)) + excluded |= SUPPORTED_10baseT_Half; + else + excluded |= SUPPORTED_10baseT_Full; + } + } + + /* Set mac_addr, phy mode and unsupported phy features for each EMAC */ def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0); emacdata = def->additions; memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); emacdata->phy_mode = mode; + emacdata->phy_feat_exc = excluded; def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1); emacdata = def->additions; memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6); emacdata->phy_mode = mode; + emacdata->phy_feat_exc = excluded; } static int diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bamboo.h index 63d71450414..5c019282649 100644 --- a/arch/ppc/platforms/4xx/bamboo.h +++ b/arch/ppc/platforms/4xx/bamboo.h @@ -88,7 +88,7 @@ #define STD_UART_OP(num) \ { 0, BASE_BAUD, 0, UART##num##_INT, \ (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: UART##num##_IO_BASE, \ + iomem_base: (void*)UART##num##_IO_BASE, \ io_type: SERIAL_IO_MEM}, #define SERIAL_PORT_DFNS \ diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c index 509e69a095f..d6b2b1965dc 100644 --- a/arch/ppc/platforms/4xx/ebony.c +++ b/arch/ppc/platforms/4xx/ebony.c @@ -55,13 +55,6 @@ #include <syslib/gen550.h> #include <syslib/ibm440gp_common.h> -/* - * This is a horrible kludge, we eventually need to abstract this - * generic PHY stuff, so the standard phy mode defines can be - * easily used from arch code. - */ -#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h" - bd_t __res; static struct ibm44x_clocks clocks __initdata; @@ -98,15 +91,10 @@ ebony_calibrate_decr(void) * on Rev. C silicon then errata forces us to * use the internal clock. */ - switch (PVR_REV(mfspr(SPRN_PVR))) { - case PVR_REV(PVR_440GP_RB): - freq = EBONY_440GP_RB_SYSCLK; - break; - case PVR_REV(PVR_440GP_RC1): - default: - freq = EBONY_440GP_RC_SYSCLK; - break; - } + if (strcmp(cur_cpu_spec[0]->cpu_name, "440GP Rev. B") == 0) + freq = EBONY_440GP_RB_SYSCLK; + else + freq = EBONY_440GP_RC_SYSCLK; ibm44x_calibrate_decr(freq); } diff --git a/arch/ppc/platforms/4xx/ibm405ep.c b/arch/ppc/platforms/4xx/ibm405ep.c index 6d44567f4dd..093b28d27a4 100644 --- a/arch/ppc/platforms/4xx/ibm405ep.c +++ b/arch/ppc/platforms/4xx/ibm405ep.c @@ -33,6 +33,7 @@ static struct ocp_func_mal_data ibm405ep_mal0_def = { .txde_irq = 13, /* TX Descriptor Error IRQ */ .rxde_irq = 14, /* RX Descriptor Error IRQ */ .serr_irq = 10, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ }; OCP_SYSFS_MAL_DATA() diff --git a/arch/ppc/platforms/4xx/ibm405gp.c b/arch/ppc/platforms/4xx/ibm405gp.c index dfd7ef3ba5f..e5700469a68 100644 --- a/arch/ppc/platforms/4xx/ibm405gp.c +++ b/arch/ppc/platforms/4xx/ibm405gp.c @@ -46,6 +46,7 @@ static struct ocp_func_mal_data ibm405gp_mal0_def = { .txde_irq = 13, /* TX Descriptor Error IRQ */ .rxde_irq = 14, /* RX Descriptor Error IRQ */ .serr_irq = 10, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ }; OCP_SYSFS_MAL_DATA() diff --git a/arch/ppc/platforms/4xx/ibm405gpr.c b/arch/ppc/platforms/4xx/ibm405gpr.c index 01c8ccbc721..cd0d00d8e8e 100644 --- a/arch/ppc/platforms/4xx/ibm405gpr.c +++ b/arch/ppc/platforms/4xx/ibm405gpr.c @@ -42,6 +42,7 @@ static struct ocp_func_mal_data ibm405gpr_mal0_def = { .txde_irq = 13, /* TX Descriptor Error IRQ */ .rxde_irq = 14, /* RX Descriptor Error IRQ */ .serr_irq = 10, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ }; OCP_SYSFS_MAL_DATA() diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c index 284da01f1ff..4712de8ff80 100644 --- a/arch/ppc/platforms/4xx/ibm440ep.c +++ b/arch/ppc/platforms/4xx/ibm440ep.c @@ -53,6 +53,7 @@ static struct ocp_func_mal_data ibm440ep_mal0_def = { .txde_irq = 33, /* TX Descriptor Error IRQ */ .rxde_irq = 34, /* RX Descriptor Error IRQ */ .serr_irq = 32, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ }; OCP_SYSFS_MAL_DATA() diff --git a/arch/ppc/platforms/4xx/ibm440gp.c b/arch/ppc/platforms/4xx/ibm440gp.c index 27615ef8309..d926245e8b3 100644 --- a/arch/ppc/platforms/4xx/ibm440gp.c +++ b/arch/ppc/platforms/4xx/ibm440gp.c @@ -56,6 +56,7 @@ static struct ocp_func_mal_data ibm440gp_mal0_def = { .txde_irq = 33, /* TX Descriptor Error IRQ */ .rxde_irq = 34, /* RX Descriptor Error IRQ */ .serr_irq = 32, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ }; OCP_SYSFS_MAL_DATA() diff --git a/arch/ppc/platforms/4xx/ibm440gx.c b/arch/ppc/platforms/4xx/ibm440gx.c index 1f38f42835b..956f45e4ef9 100644 --- a/arch/ppc/platforms/4xx/ibm440gx.c +++ b/arch/ppc/platforms/4xx/ibm440gx.c @@ -84,6 +84,7 @@ static struct ocp_func_mal_data ibm440gx_mal0_def = { .txde_irq = 33, /* TX Descriptor Error IRQ */ .rxde_irq = 34, /* RX Descriptor Error IRQ */ .serr_irq = 32, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ }; OCP_SYSFS_MAL_DATA() diff --git a/arch/ppc/platforms/4xx/ibm440sp.c b/arch/ppc/platforms/4xx/ibm440sp.c index fa3e003a0db..feb17e41ef6 100644 --- a/arch/ppc/platforms/4xx/ibm440sp.c +++ b/arch/ppc/platforms/4xx/ibm440sp.c @@ -43,6 +43,7 @@ static struct ocp_func_mal_data ibm440sp_mal0_def = { .txde_irq = 34, /* TX Descriptor Error IRQ */ .rxde_irq = 35, /* RX Descriptor Error IRQ */ .serr_irq = 33, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ }; OCP_SYSFS_MAL_DATA() diff --git a/arch/ppc/platforms/4xx/ibmnp405h.c b/arch/ppc/platforms/4xx/ibmnp405h.c index ecdc5be6ae2..a477a78f490 100644 --- a/arch/ppc/platforms/4xx/ibmnp405h.c +++ b/arch/ppc/platforms/4xx/ibmnp405h.c @@ -34,7 +34,7 @@ static struct ocp_func_emac_data ibmnp405h_emac1_def = { .zmii_mux = 1, /* ZMII input of this EMAC */ .mal_idx = 0, /* MAL device index */ .mal_rx_chan = 1, /* MAL rx channel number */ - .mal_tx_chan = 1, /* MAL tx channel number */ + .mal_tx_chan = 2, /* MAL tx channel number */ .wol_irq = 41, /* WOL interrupt number */ .mdio_idx = -1, /* No shared MDIO */ .tah_idx = -1, /* No TAH */ @@ -46,7 +46,7 @@ static struct ocp_func_emac_data ibmnp405h_emac2_def = { .zmii_mux = 2, /* ZMII input of this EMAC */ .mal_idx = 0, /* MAL device index */ .mal_rx_chan = 2, /* MAL rx channel number */ - .mal_tx_chan = 2, /* MAL tx channel number */ + .mal_tx_chan = 4, /* MAL tx channel number */ .wol_irq = 41, /* WOL interrupt number */ .mdio_idx = -1, /* No shared MDIO */ .tah_idx = -1, /* No TAH */ @@ -58,7 +58,7 @@ static struct ocp_func_emac_data ibmnp405h_emac3_def = { .zmii_mux = 3, /* ZMII input of this EMAC */ .mal_idx = 0, /* MAL device index */ .mal_rx_chan = 3, /* MAL rx channel number */ - .mal_tx_chan = 3, /* MAL tx channel number */ + .mal_tx_chan = 6, /* MAL tx channel number */ .wol_irq = 41, /* WOL interrupt number */ .mdio_idx = -1, /* No shared MDIO */ .tah_idx = -1, /* No TAH */ @@ -73,6 +73,7 @@ static struct ocp_func_mal_data ibmnp405h_mal0_def = { .txde_irq = 46, /* TX Descriptor Error IRQ */ .rxde_irq = 47, /* RX Descriptor Error IRQ */ .serr_irq = 45, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ }; OCP_SYSFS_MAL_DATA() diff --git a/arch/ppc/platforms/4xx/ibmstb4.c b/arch/ppc/platforms/4xx/ibmstb4.c index 874d16bab73..d90627b68fa 100644 --- a/arch/ppc/platforms/4xx/ibmstb4.c +++ b/arch/ppc/platforms/4xx/ibmstb4.c @@ -11,6 +11,7 @@ #include <linux/init.h> #include <asm/ocp.h> +#include <asm/ppc4xx_pic.h> #include <platforms/4xx/ibmstb4.h> static struct ocp_func_iic_data ibmstb4_iic0_def = { @@ -72,12 +73,51 @@ struct ocp_def core_ocp[] __initdata = { .irq = IDE0_IRQ, .pm = OCP_CPM_NA, }, - { .vendor = OCP_VENDOR_IBM, - .function = OCP_FUNC_USB, - .paddr = USB0_BASE, - .irq = USB0_IRQ, - .pm = OCP_CPM_NA, - }, { .vendor = OCP_VENDOR_INVALID, } }; + +/* Polarity and triggering settings for internal interrupt sources */ +struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { + { .polarity = 0x7fffff01, + .triggering = 0x00000000, + .ext_irq_mask = 0x0000007e, /* IRQ0 - IRQ5 */ + } +}; + +static struct resource ohci_usb_resources[] = { + [0] = { + .start = USB0_BASE, + .end = USB0_BASE + USB0_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = USB0_IRQ, + .end = USB0_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 dma_mask = 0xffffffffULL; + +static struct platform_device ohci_usb_device = { + .name = "ppc-soc-ohci", + .id = 0, + .num_resources = ARRAY_SIZE(ohci_usb_resources), + .resource = ohci_usb_resources, + .dev = { + .dma_mask = &dma_mask, + .coherent_dma_mask = 0xffffffffULL, + } +}; + +static struct platform_device *ibmstb4_devs[] __initdata = { + &ohci_usb_device, +}; + +static int __init +ibmstb4_platform_add_devices(void) +{ + return platform_add_devices(ibmstb4_devs, ARRAY_SIZE(ibmstb4_devs)); +} +arch_initcall(ibmstb4_platform_add_devices); diff --git a/arch/ppc/platforms/4xx/ibmstb4.h b/arch/ppc/platforms/4xx/ibmstb4.h index bcb4b1ee71f..9f21d4c88a3 100644 --- a/arch/ppc/platforms/4xx/ibmstb4.h +++ b/arch/ppc/platforms/4xx/ibmstb4.h @@ -73,9 +73,9 @@ #define OPB0_BASE 0x40000000 #define GPIO0_BASE 0x40060000 +#define USB0_BASE 0x40010000 +#define USB0_SIZE 0xA0 #define USB0_IRQ 18 -#define USB0_BASE STB04xxx_MAP_IO_ADDR(0x40010000) -#define USB0_EXTENT 4096 #define IIC_NUMS 2 #define UART_NUMS 3 diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c index 95359f748e7..a38e6f9ef85 100644 --- a/arch/ppc/platforms/4xx/luan.c +++ b/arch/ppc/platforms/4xx/luan.c @@ -53,13 +53,6 @@ #include <syslib/ibm440gx_common.h> #include <syslib/ibm440sp_common.h> -/* - * This is a horrible kludge, we eventually need to abstract this - * generic PHY stuff, so the standard phy mode defines can be - * easily used from arch code. - */ -#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h" - bd_t __res; static struct ibm44x_clocks clocks __initdata; diff --git a/arch/ppc/platforms/4xx/luan.h b/arch/ppc/platforms/4xx/luan.h index 09b444c8781..bbe7d0766db 100644 --- a/arch/ppc/platforms/4xx/luan.h +++ b/arch/ppc/platforms/4xx/luan.h @@ -55,7 +55,7 @@ #define STD_UART_OP(num) \ { 0, BASE_BAUD, 0, UART##num##_INT, \ (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ - iomem_base: UART##num##_IO_BASE, \ + iomem_base: (void*)UART##num##_IO_BASE, \ io_type: SERIAL_IO_MEM}, #define SERIAL_PORT_DFNS \ diff --git a/arch/ppc/platforms/4xx/oak.c b/arch/ppc/platforms/4xx/oak.c deleted file mode 100644 index fa25ee1fa73..00000000000 --- a/arch/ppc/platforms/4xx/oak.c +++ /dev/null @@ -1,255 +0,0 @@ -/* - * - * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu> - * - * Module name: oak.c - * - * Description: - * Architecture- / platform-specific boot-time initialization code for - * the IBM PowerPC 403GCX "Oak" evaluation board. Adapted from original - * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek - * <dan@net4x.com>. - * - */ - -#include <linux/config.h> -#include <linux/init.h> -#include <linux/smp.h> -#include <linux/threads.h> -#include <linux/param.h> -#include <linux/string.h> -#include <linux/initrd.h> -#include <linux/irq.h> -#include <linux/seq_file.h> - -#include <asm/board.h> -#include <asm/machdep.h> -#include <asm/page.h> -#include <asm/bootinfo.h> -#include <asm/ppc4xx_pic.h> -#include <asm/time.h> - -#include "oak.h" - -/* Function Prototypes */ - -extern void abort(void); - -/* Global Variables */ - -unsigned char __res[sizeof(bd_t)]; - - -/* - * void __init oak_init() - * - * Description: - * This routine... - * - * Input(s): - * r3 - Optional pointer to a board information structure. - * r4 - Optional pointer to the physical starting address of the init RAM - * disk. - * r5 - Optional pointer to the physical ending address of the init RAM - * disk. - * r6 - Optional pointer to the physical starting address of any kernel - * command-line parameters. - * r7 - Optional pointer to the physical ending address of any kernel - * command-line parameters. - * - * Output(s): - * N/A - * - * Returns: - * N/A - * - */ -void __init -platform_init(unsigned long r3, unsigned long r4, unsigned long r5, - unsigned long r6, unsigned long r7) -{ - parse_bootinfo(find_bootinfo()); - - /* - * If we were passed in a board information, copy it into the - * residual data area. - */ - if (r3) { - memcpy((void *)__res, (void *)(r3 + KERNELBASE), sizeof(bd_t)); - } - -#if defined(CONFIG_BLK_DEV_INITRD) - /* - * If the init RAM disk has been configured in, and there's a valid - * starting address for it, set it up. - */ - if (r4) { - initrd_start = r4 + KERNELBASE; - initrd_end = r5 + KERNELBASE; - } -#endif /* CONFIG_BLK_DEV_INITRD */ - - /* Copy the kernel command line arguments to a safe place. */ - - if (r6) { - *(char *)(r7 + KERNELBASE) = 0; - strcpy(cmd_line, (char *)(r6 + KERNELBASE)); - } - - /* Initialize machine-dependency vectors */ - - ppc_md.setup_arch = oak_setup_arch; - ppc_md.show_percpuinfo = oak_show_percpuinfo; - ppc_md.irq_canonicalize = NULL; - ppc_md.init_IRQ = ppc4xx_pic_init; - ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ - ppc_md.init = NULL; - - ppc_md.restart = oak_restart; - ppc_md.power_off = oak_power_off; - ppc_md.halt = oak_halt; - - ppc_md.time_init = oak_time_init; - ppc_md.set_rtc_time = oak_set_rtc_time; - ppc_md.get_rtc_time = oak_get_rtc_time; - ppc_md.calibrate_decr = oak_calibrate_decr; -} - -/* - * Document me. - */ -void __init -oak_setup_arch(void) -{ - /* XXX - Implement me */ -} - -/* - * int oak_show_percpuinfo() - * - * Description: - * This routine pretty-prints the platform's internal CPU and bus clock - * frequencies into the buffer for usage in /proc/cpuinfo. - * - * Input(s): - * *buffer - Buffer into which CPU and bus clock frequencies are to be - * printed. - * - * Output(s): - * *buffer - Buffer with the CPU and bus clock frequencies. - * - * Returns: - * The number of bytes copied into 'buffer' if OK, otherwise zero or less - * on error. - */ -int -oak_show_percpuinfo(struct seq_file *m, int i) -{ - bd_t *bp = (bd_t *)__res; - - seq_printf(m, "clock\t\t: %dMHz\n" - "bus clock\t\t: %dMHz\n", - bp->bi_intfreq / 1000000, - bp->bi_busfreq / 1000000); - - return 0; -} - -/* - * Document me. - */ -void -oak_restart(char *cmd) -{ - abort(); -} - -/* - * Document me. - */ -void -oak_power_off(void) -{ - oak_restart(NULL); -} - -/* - * Document me. - */ -void -oak_halt(void) -{ - oak_restart(NULL); -} - -/* - * Document me. - */ -long __init -oak_time_init(void) -{ - /* XXX - Implement me */ - return 0; -} - -/* - * Document me. - */ -int __init -oak_set_rtc_time(unsigned long time) -{ - /* XXX - Implement me */ - - return (0); -} - -/* - * Document me. - */ -unsigned long __init -oak_get_rtc_time(void) -{ - /* XXX - Implement me */ - - return (0); -} - -/* - * void __init oak_calibrate_decr() - * - * Description: - * This routine retrieves the internal processor frequency from the board - * information structure, sets up the kernel timer decrementer based on - * that value, enables the 403 programmable interval timer (PIT) and sets - * it up for auto-reload. - * - * Input(s): - * N/A - * - * Output(s): - * N/A - * - * Returns: - * N/A - * - */ -void __init -oak_calibrate_decr(void) -{ - unsigned int freq; - bd_t *bip = (bd_t *)__res; - - freq = bip->bi_intfreq; - - decrementer_count = freq / HZ; - count_period_num = 1; - count_period_den = freq; - - /* Enable the PIT and set auto-reload of its value */ - - mtspr(SPRN_TCR, TCR_PIE | TCR_ARE); - - /* Clear any pending timer interrupts */ - - mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_PIS | TSR_FIS); -} diff --git a/arch/ppc/platforms/4xx/oak.h b/arch/ppc/platforms/4xx/oak.h deleted file mode 100644 index 1b86a4c66b0..00000000000 --- a/arch/ppc/platforms/4xx/oak.h +++ /dev/null @@ -1,96 +0,0 @@ -/* - * - * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu> - * - * Module name: oak.h - * - * Description: - * Macros, definitions, and data structures specific to the IBM PowerPC - * 403G{A,B,C,CX} "Oak" evaluation board. Anything specific to the pro- - * cessor itself is defined elsewhere. - * - */ - -#ifdef __KERNEL__ -#ifndef __ASM_OAK_H__ -#define __ASM_OAK_H__ - -/* We have an IBM 403G{A,B,C,CX} core */ -#include <asm/ibm403.h> - -#define _IO_BASE 0 -#define _ISA_MEM_BASE 0 -#define PCI_DRAM_OFFSET 0 - -/* Memory map for the "Oak" evaluation board */ - -#define PPC403SPU_IO_BASE 0x40000000 /* 403 On-chip serial port */ -#define PPC403SPU_IO_SIZE 0x00000008 -#define OAKSERIAL_IO_BASE 0x7E000000 /* NS16550DV serial port */ -#define OAKSERIAL_IO_SIZE 0x00000008 -#define OAKNET_IO_BASE 0xF4000000 /* NS83902AV Ethernet */ -#define OAKNET_IO_SIZE 0x00000040 -#define OAKPROM_IO_BASE 0xFFFE0000 /* AMD 29F010 Flash ROM */ -#define OAKPROM_IO_SIZE 0x00020000 - - -/* Interrupt assignments fixed by the hardware implementation */ - -/* This is annoying kbuild-2.4 problem. -- Tom */ - -#define PPC403SPU_RX_INT 4 /* AIC_INT4 */ -#define PPC403SPU_TX_INT 5 /* AIC_INT5 */ -#define OAKNET_INT 27 /* AIC_INT27 */ -#define OAKSERIAL_INT 28 /* AIC_INT28 */ - -#ifndef __ASSEMBLY__ -/* - * Data structure defining board information maintained by the boot - * ROM on IBM's "Oak" evaluation board. An effort has been made to - * keep the field names consistent with the 8xx 'bd_t' board info - * structures. - */ - -typedef struct board_info { - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[30]; /* Version of the IBM ROM */ - unsigned int bi_memsize; /* DRAM installed, in bytes */ - unsigned char bi_enetaddr[6]; /* Ethernet MAC address */ - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* Bus speed, in Hz */ -} bd_t; - -#ifdef __cplusplus -extern "C" { -#endif - -extern void oak_init(unsigned long r3, - unsigned long ird_start, - unsigned long ird_end, - unsigned long cline_start, - unsigned long cline_end); -extern void oak_setup_arch(void); -extern int oak_setup_residual(char *buffer); -extern void oak_init_IRQ(void); -extern int oak_get_irq(struct pt_regs *regs); -extern void oak_restart(char *cmd); -extern void oak_power_off(void); -extern void oak_halt(void); -extern void oak_time_init(void); -extern int oak_set_rtc_time(unsigned long now); -extern unsigned long oak_get_rtc_time(void); -extern void oak_calibrate_decr(void); - -#ifdef __cplusplus -} -#endif - -/* Some 4xx parts use a different timebase frequency from the internal clock. -*/ -#define bi_tbfreq bi_intfreq - -#define PPC4xx_MACHINE_NAME "IBM Oak" - -#endif /* !__ASSEMBLY__ */ -#endif /* __ASM_OAK_H__ */ -#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/oak_setup.h b/arch/ppc/platforms/4xx/oak_setup.h deleted file mode 100644 index 8648bd084df..00000000000 --- a/arch/ppc/platforms/4xx/oak_setup.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * - * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu> - * - * Module name: oak_setup.h - * - * Description: - * Architecture- / platform-specific boot-time initialization code for - * the IBM PowerPC 403GCX "Oak" evaluation board. Adapted from original - * code by Gary Thomas, Cort Dougan <cort@cs.nmt.edu>, and Dan Malek - * <dan@netx4.com>. - * - */ - -#ifndef __OAK_SETUP_H__ -#define __OAK_SETUP_H__ - -#include <asm/ptrace.h> -#include <asm/board.h> - - -#ifdef __cplusplus -extern "C" { -#endif - -extern unsigned char __res[sizeof(bd_t)]; - -extern void oak_init(unsigned long r3, - unsigned long ird_start, - unsigned long ird_end, - unsigned long cline_start, - unsigned long cline_end); -extern void oak_setup_arch(void); -extern int oak_setup_residual(char *buffer); -extern void oak_init_IRQ(void); -extern int oak_get_irq(struct pt_regs *regs); -extern void oak_restart(char *cmd); -extern void oak_power_off(void); -extern void oak_halt(void); -extern void oak_time_init(void); -extern int oak_set_rtc_time(unsigned long now); -extern unsigned long oak_get_rtc_time(void); -extern void oak_calibrate_decr(void); - - -#ifdef __cplusplus -} -#endif - -#endif /* __OAK_SETUP_H__ */ diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c index 8fc34a34476..80028df1b44 100644 --- a/arch/ppc/platforms/4xx/ocotea.c +++ b/arch/ppc/platforms/4xx/ocotea.c @@ -53,13 +53,6 @@ #include <syslib/gen550.h> #include <syslib/ibm440gx_common.h> -/* - * This is a horrible kludge, we eventually need to abstract this - * generic PHY stuff, so the standard phy mode defines can be - * easily used from arch code. - */ -#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h" - bd_t __res; static struct ibm44x_clocks clocks __initdata; diff --git a/arch/ppc/platforms/4xx/redwood5.c b/arch/ppc/platforms/4xx/redwood5.c index 2f5e410afbc..bee8b4ac8af 100644 --- a/arch/ppc/platforms/4xx/redwood5.c +++ b/arch/ppc/platforms/4xx/redwood5.c @@ -18,6 +18,19 @@ #include <linux/ioport.h> #include <asm/io.h> #include <asm/machdep.h> +#include <asm/ppc4xx_pic.h> + +/* + * Define external IRQ senses and polarities. + */ +unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = { + (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 0 */ + (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 1 */ + (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 2 */ + (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 3 */ + (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 4 */ + (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext Int 5 */ +}; static struct resource smc91x_resources[] = { [0] = { |