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-rw-r--r--arch/ppc/platforms/Makefile12
-rw-r--r--arch/ppc/platforms/chrp_nvram.c83
-rw-r--r--arch/ppc/platforms/chrp_pci.c309
-rw-r--r--arch/ppc/platforms/chrp_pegasos_eth.c211
-rw-r--r--arch/ppc/platforms/chrp_setup.c669
-rw-r--r--arch/ppc/platforms/chrp_smp.c99
-rw-r--r--arch/ppc/platforms/chrp_time.c235
-rw-r--r--arch/ppc/platforms/lite5200.c71
-rw-r--r--arch/ppc/platforms/prep_setup.c12
9 files changed, 45 insertions, 1656 deletions
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
index e8b91a33ce9..90c62229442 100644
--- a/arch/ppc/platforms/Makefile
+++ b/arch/ppc/platforms/Makefile
@@ -2,18 +2,10 @@
# Makefile for the linux kernel.
#
-# Extra CFLAGS so we don't have to do relative includes
-CFLAGS_chrp_setup.o += -Iarch/$(ARCH)/mm
-
obj-$(CONFIG_APUS) += apus_setup.o
ifeq ($(CONFIG_APUS),y)
obj-$(CONFIG_PCI) += apus_pci.o
endif
-obj-$(CONFIG_PPC_CHRP) += chrp_setup.o chrp_time.o chrp_pci.o \
- chrp_pegasos_eth.o
-ifeq ($(CONFIG_PPC_CHRP),y)
-obj-$(CONFIG_NVRAM) += chrp_nvram.o
-endif
obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o
obj-$(CONFIG_PREP_RESIDUAL) += residual.o
obj-$(CONFIG_PQ2ADS) += pq2ads.o
@@ -40,7 +32,3 @@ obj-$(CONFIG_EV64360) += ev64360.o
obj-$(CONFIG_MPC86XADS) += mpc866ads_setup.o
obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
obj-$(CONFIG_ADS8272) += mpc8272ads_setup.o
-
-ifeq ($(CONFIG_SMP),y)
-obj-$(CONFIG_PPC_CHRP) += chrp_smp.o
-endif
diff --git a/arch/ppc/platforms/chrp_nvram.c b/arch/ppc/platforms/chrp_nvram.c
deleted file mode 100644
index 465ba9b090e..00000000000
--- a/arch/ppc/platforms/chrp_nvram.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*
- * c 2001 PPC 64 Team, IBM Corp
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * /dev/nvram driver for PPC
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/slab.h>
-#include <linux/spinlock.h>
-#include <asm/uaccess.h>
-#include <asm/prom.h>
-#include <asm/machdep.h>
-
-static unsigned int nvram_size;
-static unsigned char nvram_buf[4];
-static DEFINE_SPINLOCK(nvram_lock);
-
-static unsigned char chrp_nvram_read(int addr)
-{
- unsigned long done, flags;
- unsigned char ret;
-
- if (addr >= nvram_size) {
- printk(KERN_DEBUG "%s: read addr %d > nvram_size %u\n",
- current->comm, addr, nvram_size);
- return 0xff;
- }
- spin_lock_irqsave(&nvram_lock, flags);
- if ((call_rtas("nvram-fetch", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
- ret = 0xff;
- else
- ret = nvram_buf[0];
- spin_unlock_irqrestore(&nvram_lock, flags);
-
- return ret;
-}
-
-static void chrp_nvram_write(int addr, unsigned char val)
-{
- unsigned long done, flags;
-
- if (addr >= nvram_size) {
- printk(KERN_DEBUG "%s: write addr %d > nvram_size %u\n",
- current->comm, addr, nvram_size);
- return;
- }
- spin_lock_irqsave(&nvram_lock, flags);
- nvram_buf[0] = val;
- if ((call_rtas("nvram-store", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
- printk(KERN_DEBUG "rtas IO error storing 0x%02x at %d", val, addr);
- spin_unlock_irqrestore(&nvram_lock, flags);
-}
-
-void __init chrp_nvram_init(void)
-{
- struct device_node *nvram;
- unsigned int *nbytes_p, proplen;
-
- nvram = of_find_node_by_type(NULL, "nvram");
- if (nvram == NULL)
- return;
-
- nbytes_p = (unsigned int *)get_property(nvram, "#bytes", &proplen);
- if (nbytes_p == NULL || proplen != sizeof(unsigned int))
- return;
-
- nvram_size = *nbytes_p;
-
- printk(KERN_INFO "CHRP nvram contains %u bytes\n", nvram_size);
- of_node_put(nvram);
-
- ppc_md.nvram_read_val = chrp_nvram_read;
- ppc_md.nvram_write_val = chrp_nvram_write;
-
- return;
-}
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
deleted file mode 100644
index c7fe6182bb7..00000000000
--- a/arch/ppc/platforms/chrp_pci.c
+++ /dev/null
@@ -1,309 +0,0 @@
-/*
- * CHRP pci routines.
- */
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/delay.h>
-#include <linux/string.h>
-#include <linux/init.h>
-#include <linux/ide.h>
-
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/irq.h>
-#include <asm/hydra.h>
-#include <asm/prom.h>
-#include <asm/gg2.h>
-#include <asm/machdep.h>
-#include <asm/sections.h>
-#include <asm/pci-bridge.h>
-#include <asm/open_pic.h>
-
-/* LongTrail */
-void __iomem *gg2_pci_config_base;
-
-/*
- * The VLSI Golden Gate II has only 512K of PCI configuration space, so we
- * limit the bus number to 3 bits
- */
-
-int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
- int len, u32 *val)
-{
- volatile void __iomem *cfg_data;
- struct pci_controller *hose = bus->sysdata;
-
- if (bus->number > 7)
- return PCIBIOS_DEVICE_NOT_FOUND;
- /*
- * Note: the caller has already checked that off is
- * suitably aligned and that len is 1, 2 or 4.
- */
- cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off);
- switch (len) {
- case 1:
- *val = in_8(cfg_data);
- break;
- case 2:
- *val = in_le16(cfg_data);
- break;
- default:
- *val = in_le32(cfg_data);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
- int len, u32 val)
-{
- volatile void __iomem *cfg_data;
- struct pci_controller *hose = bus->sysdata;
-
- if (bus->number > 7)
- return PCIBIOS_DEVICE_NOT_FOUND;
- /*
- * Note: the caller has already checked that off is
- * suitably aligned and that len is 1, 2 or 4.
- */
- cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off);
- switch (len) {
- case 1:
- out_8(cfg_data, val);
- break;
- case 2:
- out_le16(cfg_data, val);
- break;
- default:
- out_le32(cfg_data, val);
- break;
- }
- return PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops gg2_pci_ops =
-{
- gg2_read_config,
- gg2_write_config
-};
-
-/*
- * Access functions for PCI config space using RTAS calls.
- */
-int
-rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 *val)
-{
- struct pci_controller *hose = bus->sysdata;
- unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
- | (((bus->number - hose->first_busno) & 0xff) << 16)
- | (hose->index << 24);
- unsigned long ret = ~0UL;
- int rval;
-
- rval = call_rtas("read-pci-config", 2, 2, &ret, addr, len);
- *val = ret;
- return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
-}
-
-int
-rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
- int len, u32 val)
-{
- struct pci_controller *hose = bus->sysdata;
- unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
- | (((bus->number - hose->first_busno) & 0xff) << 16)
- | (hose->index << 24);
- int rval;
-
- rval = call_rtas("write-pci-config", 3, 1, NULL, addr, len, val);
- return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
-}
-
-static struct pci_ops rtas_pci_ops =
-{
- rtas_read_config,
- rtas_write_config
-};
-
-volatile struct Hydra __iomem *Hydra = NULL;
-
-int __init
-hydra_init(void)
-{
- struct device_node *np;
-
- np = find_devices("mac-io");
- if (np == NULL || np->n_addrs == 0)
- return 0;
- Hydra = ioremap(np->addrs[0].address, np->addrs[0].size);
- printk("Hydra Mac I/O at %x\n", np->addrs[0].address);
- printk("Hydra Feature_Control was %x",
- in_le32(&Hydra->Feature_Control));
- out_le32(&Hydra->Feature_Control, (HYDRA_FC_SCC_CELL_EN |
- HYDRA_FC_SCSI_CELL_EN |
- HYDRA_FC_SCCA_ENABLE |
- HYDRA_FC_SCCB_ENABLE |
- HYDRA_FC_ARB_BYPASS |
- HYDRA_FC_MPIC_ENABLE |
- HYDRA_FC_SLOW_SCC_PCLK |
- HYDRA_FC_MPIC_IS_MASTER));
- printk(", now %x\n", in_le32(&Hydra->Feature_Control));
- return 1;
-}
-
-void __init
-chrp_pcibios_fixup(void)
-{
- struct pci_dev *dev = NULL;
- struct device_node *np;
-
- /* PCI interrupts are controlled by the OpenPIC */
- for_each_pci_dev(dev) {
- np = pci_device_to_OF_node(dev);
- if ((np != 0) && (np->n_intrs > 0) && (np->intrs[0].line != 0))
- dev->irq = np->intrs[0].line;
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
- }
-}
-
-#define PRG_CL_RESET_VALID 0x00010000
-
-static void __init
-setup_python(struct pci_controller *hose, struct device_node *dev)
-{
- u32 __iomem *reg;
- u32 val;
- unsigned long addr = dev->addrs[0].address;
-
- setup_indirect_pci(hose, addr + 0xf8000, addr + 0xf8010);
-
- /* Clear the magic go-slow bit */
- reg = ioremap(dev->addrs[0].address + 0xf6000, 0x40);
- val = in_be32(&reg[12]);
- if (val & PRG_CL_RESET_VALID) {
- out_be32(&reg[12], val & ~PRG_CL_RESET_VALID);
- in_be32(&reg[12]);
- }
- iounmap(reg);
-}
-
-/* Marvell Discovery II based Pegasos 2 */
-static void __init setup_peg2(struct pci_controller *hose, struct device_node *dev)
-{
- struct device_node *root = find_path_device("/");
- struct device_node *rtas;
-
- rtas = of_find_node_by_name (root, "rtas");
- if (rtas) {
- hose->ops = &rtas_pci_ops;
- } else {
- printk ("RTAS supporting Pegasos OF not found, please upgrade"
- " your firmware\n");
- }
- pci_assign_all_buses = 1;
-}
-
-void __init
-chrp_find_bridges(void)
-{
- struct device_node *dev;
- int *bus_range;
- int len, index = -1;
- struct pci_controller *hose;
- unsigned int *dma;
- char *model, *machine;
- int is_longtrail = 0, is_mot = 0, is_pegasos = 0;
- struct device_node *root = find_path_device("/");
-
- /*
- * The PCI host bridge nodes on some machines don't have
- * properties to adequately identify them, so we have to
- * look at what sort of machine this is as well.
- */
- machine = get_property(root, "model", NULL);
- if (machine != NULL) {
- is_longtrail = strncmp(machine, "IBM,LongTrail", 13) == 0;
- is_mot = strncmp(machine, "MOT", 3) == 0;
- if (strncmp(machine, "Pegasos2", 8) == 0)
- is_pegasos = 2;
- else if (strncmp(machine, "Pegasos", 7) == 0)
- is_pegasos = 1;
- }
- for (dev = root->child; dev != NULL; dev = dev->sibling) {
- if (dev->type == NULL || strcmp(dev->type, "pci") != 0)
- continue;
- ++index;
- /* The GG2 bridge on the LongTrail doesn't have an address */
- if (dev->n_addrs < 1 && !is_longtrail) {
- printk(KERN_WARNING "Can't use %s: no address\n",
- dev->full_name);
- continue;
- }
- bus_range = (int *) get_property(dev, "bus-range", &len);
- if (bus_range == NULL || len < 2 * sizeof(int)) {
- printk(KERN_WARNING "Can't get bus-range for %s\n",
- dev->full_name);
- continue;
- }
- if (bus_range[1] == bus_range[0])
- printk(KERN_INFO "PCI bus %d", bus_range[0]);
- else
- printk(KERN_INFO "PCI buses %d..%d",
- bus_range[0], bus_range[1]);
- printk(" controlled by %s", dev->type);
- if (dev->n_addrs > 0)
- printk(" at %x", dev->addrs[0].address);
- printk("\n");
-
- hose = pcibios_alloc_controller();
- if (!hose) {
- printk("Can't allocate PCI controller structure for %s\n",
- dev->full_name);
- continue;
- }
- hose->arch_data = dev;
- hose->first_busno = bus_range[0];
- hose->last_busno = bus_range[1];
-
- model = get_property(dev, "model", NULL);
- if (model == NULL)
- model = "<none>";
- if (device_is_compatible(dev, "IBM,python")) {
- setup_python(hose, dev);
- } else if (is_mot
- || strncmp(model, "Motorola, Grackle", 17) == 0) {
- setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
- } else if (is_longtrail) {
- void __iomem *p = ioremap(GG2_PCI_CONFIG_BASE, 0x80000);
- hose->ops = &gg2_pci_ops;
- hose->cfg_data = p;
- gg2_pci_config_base = p;
- } else if (is_pegasos == 1) {
- setup_indirect_pci(hose, 0xfec00cf8, 0xfee00cfc);
- } else if (is_pegasos == 2) {
- setup_peg2(hose, dev);
- } else {
- printk("No methods for %s (model %s), using RTAS\n",
- dev->full_name, model);
- hose->ops = &rtas_pci_ops;
- }
-
- pci_process_bridge_OF_ranges(hose, dev, index == 0);
-
- /* check the first bridge for a property that we can
- use to set pci_dram_offset */
- dma = (unsigned int *)
- get_property(dev, "ibm,dma-ranges", &len);
- if (index == 0 && dma != NULL && len >= 6 * sizeof(*dma)) {
- pci_dram_offset = dma[2] - dma[3];
- printk("pci_dram_offset = %lx\n", pci_dram_offset);
- }
- }
-
- /* Do not fixup interrupts from OF tree on pegasos */
- if (is_pegasos == 0)
- ppc_md.pcibios_fixup = chrp_pcibios_fixup;
-}
diff --git a/arch/ppc/platforms/chrp_pegasos_eth.c b/arch/ppc/platforms/chrp_pegasos_eth.c
deleted file mode 100644
index 9305c8aa137..00000000000
--- a/arch/ppc/platforms/chrp_pegasos_eth.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * Copyright (C) 2005 Sven Luther <sl@bplan-gmbh.de>
- * Thanks to :
- * Dale Farnsworth <dale@farnsworth.org>
- * Mark A. Greer <mgreer@mvista.com>
- * Nicolas DET <nd@bplan-gmbh.de>
- * Benjamin Herrenschmidt <benh@kernel.crashing.org>
- * And anyone else who helped me on this.
- */
-
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/ioport.h>
-#include <linux/platform_device.h>
-#include <linux/mv643xx.h>
-#include <linux/pci.h>
-
-#define PEGASOS2_MARVELL_REGBASE (0xf1000000)
-#define PEGASOS2_MARVELL_REGSIZE (0x00004000)
-#define PEGASOS2_SRAM_BASE (0xf2000000)
-#define PEGASOS2_SRAM_SIZE (256*1024)
-
-#define PEGASOS2_SRAM_BASE_ETH0 (PEGASOS2_SRAM_BASE)
-#define PEGASOS2_SRAM_BASE_ETH1 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) )
-
-
-#define PEGASOS2_SRAM_RXRING_SIZE (PEGASOS2_SRAM_SIZE/4)
-#define PEGASOS2_SRAM_TXRING_SIZE (PEGASOS2_SRAM_SIZE/4)
-
-#undef BE_VERBOSE
-
-static struct resource mv643xx_eth_shared_resources[] = {
- [0] = {
- .name = "ethernet shared base",
- .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
- .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
- MV643XX_ETH_SHARED_REGS_SIZE - 1,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device mv643xx_eth_shared_device = {
- .name = MV643XX_ETH_SHARED_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
- .resource = mv643xx_eth_shared_resources,
-};
-
-static struct resource mv643xx_eth0_resources[] = {
- [0] = {
- .name = "eth0 irq",
- .start = 9,
- .end = 9,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-
-static struct mv643xx_eth_platform_data eth0_pd = {
- .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
- .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
- .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
-
- .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE,
- .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
- .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
-};
-
-static struct platform_device eth0_device = {
- .name = MV643XX_ETH_NAME,
- .id = 0,
- .num_resources = ARRAY_SIZE(mv643xx_eth0_resources),
- .resource = mv643xx_eth0_resources,
- .dev = {
- .platform_data = &eth0_pd,
- },
-};
-
-static struct resource mv643xx_eth1_resources[] = {
- [0] = {
- .name = "eth1 irq",
- .start = 9,
- .end = 9,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct mv643xx_eth_platform_data eth1_pd = {
- .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
- .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
- .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
-
- .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE,
- .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
- .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
-};
-
-static struct platform_device eth1_device = {
- .name = MV643XX_ETH_NAME,
- .id = 1,
- .num_resources = ARRAY_SIZE(mv643xx_eth1_resources),
- .resource = mv643xx_eth1_resources,
- .dev = {
- .platform_data = &eth1_pd,
- },
-};
-
-static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
- &mv643xx_eth_shared_device,
- &eth0_device,
- &eth1_device,
-};
-
-/***********/
-/***********/
-#define MV_READ(offset,val) { val = readl(mv643xx_reg_base + offset); }
-#define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset)
-
-static void __iomem *mv643xx_reg_base;
-
-static int Enable_SRAM(void)
-{
- u32 ALong;
-
- if (mv643xx_reg_base == NULL)
- mv643xx_reg_base = ioremap(PEGASOS2_MARVELL_REGBASE,
- PEGASOS2_MARVELL_REGSIZE);
-
- if (mv643xx_reg_base == NULL)
- return -ENOMEM;
-
-#ifdef BE_VERBOSE
- printk("Pegasos II/Marvell MV64361: register remapped from %p to %p\n",
- (void *)PEGASOS2_MARVELL_REGBASE, (void *)mv643xx_reg_base);
-#endif
-
- MV_WRITE(MV64340_SRAM_CONFIG, 0);
-
- MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16);
-
- MV_READ(MV64340_BASE_ADDR_ENABLE, ALong);
- ALong &= ~(1 << 19);
- MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong);
-
- ALong = 0x02;
- ALong |= PEGASOS2_SRAM_BASE & 0xffff0000;
- MV_WRITE(MV643XX_ETH_BAR_4, ALong);
-
- MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000);
-
- MV_READ(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
- ALong &= ~(1 << 4);
- MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
-
-#ifdef BE_VERBOSE
- printk("Pegasos II/Marvell MV64361: register unmapped\n");
- printk("Pegasos II/Marvell MV64361: SRAM at %p, size=%x\n", (void*) PEGASOS2_SRAM_BASE, PEGASOS2_SRAM_SIZE);
-#endif
-
- iounmap(mv643xx_reg_base);
- mv643xx_reg_base = NULL;
-
- return 1;
-}
-
-
-/***********/
-/***********/
-int mv643xx_eth_add_pds(void)
-{
- int ret = 0;
- static struct pci_device_id pci_marvell_mv64360[] = {
- { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV64360) },
- { }
- };
-
-#ifdef BE_VERBOSE
- printk("Pegasos II/Marvell MV64361: init\n");
-#endif
-
- if (pci_dev_present(pci_marvell_mv64360)) {
- ret = platform_add_devices(mv643xx_eth_pd_devs,
- ARRAY_SIZE(mv643xx_eth_pd_devs));
-
- if ( Enable_SRAM() < 0)
- {
- eth0_pd.tx_sram_addr = 0;
- eth0_pd.tx_sram_size = 0;
- eth0_pd.rx_sram_addr = 0;
- eth0_pd.rx_sram_size = 0;
-
- eth1_pd.tx_sram_addr = 0;
- eth1_pd.tx_sram_size = 0;
- eth1_pd.rx_sram_addr = 0;
- eth1_pd.rx_sram_size = 0;
-
-#ifdef BE_VERBOSE
- printk("Pegasos II/Marvell MV64361: Can't enable the "
- "SRAM\n");
-#endif
- }
- }
-
-#ifdef BE_VERBOSE
- printk("Pegasos II/Marvell MV64361: init is over\n");
-#endif
-
- return ret;
-}
-
-device_initcall(mv643xx_eth_add_pds);
diff --git a/arch/ppc/platforms/chrp_setup.c b/arch/ppc/platforms/chrp_setup.c
deleted file mode 100644
index f9fd3f4f8e2..00000000000
--- a/arch/ppc/platforms/chrp_setup.c
+++ /dev/null
@@ -1,669 +0,0 @@
-/*
- * Copyright (C) 1995 Linus Torvalds
- * Adapted from 'alpha' version by Gary Thomas
- * Modified by Cort Dougan (cort@cs.nmt.edu)
- */
-
-/*
- * bootup setup stuff..
- */
-
-#include <linux/config.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/mm.h>
-#include <linux/stddef.h>
-#include <linux/unistd.h>
-#include <linux/ptrace.h>
-#include <linux/slab.h>
-#include <linux/user.h>
-#include <linux/a.out.h>
-#include <linux/tty.h>
-#include <linux/major.h>
-#include <linux/interrupt.h>
-#include <linux/reboot.h>
-#include <linux/init.h>
-#include <linux/pci.h>
-#include <linux/version.h>
-#include <linux/adb.h>
-#include <linux/module.h>
-#include <linux/delay.h>
-#include <linux/ide.h>
-#include <linux/console.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/prom.h>
-#include <asm/gg2.h>
-#include <asm/pci-bridge.h>
-#include <asm/dma.h>
-#include <asm/machdep.h>
-#include <asm/irq.h>
-#include <asm/hydra.h>
-#include <asm/sections.h>
-#include <asm/time.h>
-#include <asm/btext.h>
-#include <asm/i8259.h>
-#include <asm/open_pic.h>
-#include <asm/xmon.h>
-#include "mem_pieces.h"
-
-unsigned long chrp_get_rtc_time(void);
-int chrp_set_rtc_time(unsigned long nowtime);
-void chrp_calibrate_decr(void);
-long chrp_time_init(void);
-
-void chrp_find_bridges(void);
-void chrp_event_scan(void);
-void rtas_display_progress(char *, unsigned short);
-void rtas_indicator_progress(char *, unsigned short);
-void btext_progress(char *, unsigned short);
-
-extern int of_show_percpuinfo(struct seq_file *, int);
-
-int _chrp_type;
-EXPORT_SYMBOL(_chrp_type);
-
-/*
- * XXX this should be in xmon.h, but putting it there means xmon.h
- * has to include <linux/interrupt.h> (to get irqreturn_t), which
- * causes all sorts of problems. -- paulus
- */
-extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
-
-extern dev_t boot_dev;
-
-extern PTE *Hash, *Hash_end;
-extern unsigned long Hash_size, Hash_mask;
-extern int probingmem;
-extern unsigned long loops_per_jiffy;
-static int max_width;
-
-#ifdef CONFIG_SMP
-extern struct smp_ops_t chrp_smp_ops;
-#endif
-
-static const char *gg2_memtypes[4] = {
- "FPM", "SDRAM", "EDO", "BEDO"
-};
-static const char *gg2_cachesizes[4] = {
- "256 KB", "512 KB", "1 MB", "Reserved"
-};
-static const char *gg2_cachetypes[4] = {
- "Asynchronous", "Reserved", "Flow-Through Synchronous",
- "Pipelined Synchronous"
-};
-static const char *gg2_cachemodes[4] = {
- "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
-};
-
-int
-chrp_show_cpuinfo(struct seq_file *m)
-{
- int i, sdramen;
- unsigned int t;
- struct device_node *root;
- const char *model = "";
-
- root = find_path_device("/");
- if (root)
- model = get_property(root, "model", NULL);
- seq_printf(m, "machine\t\t: CHRP %s\n", model);
-
- /* longtrail (goldengate) stuff */
- if (!strncmp(model, "IBM,LongTrail", 13)) {
- /* VLSI VAS96011/12 `Golden Gate 2' */
- /* Memory banks */
- sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL)
- >>31) & 1;
- for (i = 0; i < (sdramen ? 4 : 6); i++) {
- t = in_le32(gg2_pci_config_base+
- GG2_PCI_DRAM_BANK0+
- i*4);
- if (!(t & 1))
- continue;
- switch ((t>>8) & 0x1f) {
- case 0x1f:
- model = "4 MB";
- break;
- case 0x1e:
- model = "8 MB";
- break;
- case 0x1c:
- model = "16 MB";
- break;
- case 0x18:
- model = "32 MB";
- break;
- case 0x10:
- model = "64 MB";
- break;
- case 0x00:
- model = "128 MB";
- break;
- default:
- model = "Reserved";
- break;
- }
- seq_printf(m, "memory bank %d\t: %s %s\n", i, model,
- gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]);
- }
- /* L2 cache */
- t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL);
- seq_printf(m, "board l2\t: %s %s (%s)\n",
- gg2_cachesizes[(t>>7) & 3],
- gg2_cachetypes[(t>>2) & 3],
- gg2_cachemodes[t & 3]);
- }
- return 0;
-}
-
-/*
- * Fixes for the National Semiconductor PC78308VUL SuperI/O
- *
- * Some versions of Open Firmware incorrectly initialize the IRQ settings
- * for keyboard and mouse
- */
-static inline void __init sio_write(u8 val, u8 index)
-{
- outb(index, 0x15c);
- outb(val, 0x15d);
-}
-
-static inline u8 __init sio_read(u8 index)
-{
- outb(index, 0x15c);
- return inb(0x15d);
-}
-
-static void __init sio_fixup_irq(const char *name, u8 device, u8 level,
- u8 type)
-{
- u8 level0, type0, active;
-
- /* select logical device */
- sio_write(device, 0x07);
- active = sio_read(0x30);
- level0 = sio_read(0x70);
- type0 = sio_read(0x71);
- if (level0 != level || type0 != type || !active) {
- printk(KERN_WARNING "sio: %s irq level %d, type %d, %sactive: "
- "remapping to level %d, type %d, active\n",
- name, level0, type0, !active ? "in" : "", level, type);
- sio_write(0x01, 0x30);
- sio_write(level, 0x70);
- sio_write(type, 0x71);
- }
-}
-
-static void __init sio_init(void)
-{
- struct device_node *root;
-
- if ((root = find_path_device("/")) &&
- !strncmp(get_property(root, "model", NULL), "IBM,LongTrail", 13)) {
- /* logical device 0 (KBC/Keyboard) */
- sio_fixup_irq("keyboard", 0, 1, 2);
- /* select logical device 1 (KBC/Mouse) */
- sio_fixup_irq("mouse", 1, 12, 2);
- }
-}
-
-
-static void __init pegasos_set_l2cr(void)
-{
- struct device_node *np;
-
- /* On Pegasos, enable the l2 cache if needed, as the OF forgets it */
- if (_chrp_type != _CHRP_Pegasos)
- return;
-
- /* Enable L2 cache if needed */
- np = find_type_devices("cpu");
- if (np != NULL) {
- unsigned int *l2cr = (unsigned int *)
- get_property (np, "l2cr", NULL);
- if (l2cr == NULL) {
- printk ("Pegasos l2cr : no cpu l2cr property found\n");
- return;
- }
- if (!((*l2cr) & 0x80000000)) {
- printk ("Pegasos l2cr : L2 cache was not active, "
- "activating\n");
- _set_L2CR(0);
- _set_L2CR((*l2cr) | 0x80000000);
- }
- }
-}
-
-void __init chrp_setup_arch(void)
-{
- struct device_node *device;
-
- /* init to some ~sane value until calibrate_delay() runs */
- loops_per_jiffy = 50000000/HZ;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* this is fine for chrp */
- initrd_below_start_ok = 1;
-
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
- ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
-
- /* On pegasos, enable the L2 cache if not already done by OF */
- pegasos_set_l2cr();
-
- /* Lookup PCI host bridges */
- chrp_find_bridges();
-
-#ifndef CONFIG_PPC64BRIDGE
- /*
- * Temporary fixes for PCI devices.
- * -- Geert
- */
- hydra_init(); /* Mac I/O */
-
-#endif /* CONFIG_PPC64BRIDGE */
-
- /*
- * Fix the Super I/O configuration
- */
- sio_init();
-
- /* Get the event scan rate for the rtas so we know how
- * often it expects a heartbeat. -- Cort
- */
- if ( rtas_data ) {
- struct property *p;
- device = find_devices("rtas");
- for ( p = device->properties;
- p && strncmp(p->name, "rtas-event-scan-rate", 20);
- p = p->next )
- /* nothing */ ;
- if ( p && *(unsigned long *)p->value ) {
- ppc_md.heartbeat = chrp_event_scan;
- ppc_md.heartbeat_reset = (HZ/(*(unsigned long *)p->value)*30)-1;
- ppc_md.heartbeat_count = 1;
- printk("RTAS Event Scan Rate: %lu (%lu jiffies)\n",
- *(unsigned long *)p->value, ppc_md.heartbeat_reset );
- }
- }
-
- pci_create_OF_bus_map();
-}
-
-void
-chrp_event_scan(void)
-{
- unsigned char log[1024];
- unsigned long ret = 0;
- /* XXX: we should loop until the hardware says no more error logs -- Cort */
- call_rtas( "event-scan", 4, 1, &ret, 0xffffffff, 0,
- __pa(log), 1024 );
- ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
-}
-
-void
-chrp_restart(char *cmd)
-{
- printk("RTAS system-reboot returned %d\n",
- call_rtas("system-reboot", 0, 1, NULL));
- for (;;);
-}
-
-void
-chrp_power_off(void)
-{
- /* allow power on only with power button press */
- printk("RTAS power-off returned %d\n",
- call_rtas("power-off", 2, 1, NULL,0xffffffff,0xffffffff));
- for (;;);
-}
-
-void
-chrp_halt(void)
-{
- chrp_power_off();
-}
-
-/*
- * Finds the open-pic node and sets OpenPIC_Addr based on its reg property.
- * Then checks if it has an interrupt-ranges property. If it does then
- * we have a distributed open-pic, so call openpic_set_sources to tell
- * the openpic code where to find the interrupt source registers.
- */
-static void __init chrp_find_openpic(void)
-{
- struct device_node *np;
- int len, i;
- unsigned int *iranges;
- void __iomem *isu;
-
- np = find_type_devices("open-pic");
- if (np == NULL || np->n_addrs == 0)
- return;
- printk(KERN_INFO "OpenPIC at %x (size %x)\n",
- np->addrs[0].address, np->addrs[0].size);
- OpenPIC_Addr = ioremap(np->addrs[0].address, 0x40000);
- if (OpenPIC_Addr == NULL) {
- printk(KERN_ERR "Failed to map OpenPIC!\n");
- return;
- }
-
- iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len);
- if (iranges == NULL || len < 2 * sizeof(unsigned int))
- return; /* not distributed */
-
- /*
- * The first pair of cells in interrupt-ranges refers to the
- * IDU; subsequent pairs refer to the ISUs.
- */
- len /= 2 * sizeof(unsigned int);
- if (np->n_addrs < len) {
- printk(KERN_ERR "Insufficient addresses for distributed"
- " OpenPIC (%d < %d)\n", np->n_addrs, len);
- return;
- }
- if (iranges[1] != 0) {
- printk(KERN_INFO "OpenPIC irqs %d..%d in IDU\n",
- iranges[0], iranges[0] + iranges[1] - 1);
- openpic_set_sources(iranges[0], iranges[1], NULL);
- }
- for (i = 1; i < len; ++i) {
- iranges += 2;
- printk(KERN_INFO "OpenPIC irqs %d..%d in ISU at %x (%x)\n",
- iranges[0], iranges[0] + iranges[1] - 1,
- np->addrs[i].address, np->addrs[i].size);
- isu = ioremap(np->addrs[i].address, np->addrs[i].size);
- if (isu != NULL)
- openpic_set_sources(iranges[0], iranges[1], isu);
- else
- printk(KERN_ERR "Failed to map OpenPIC ISU at %x!\n",
- np->addrs[i].address);
- }
-}
-
-#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
-static struct irqaction xmon_irqaction = {
- .handler = xmon_irq,
- .mask = CPU_MASK_NONE,
- .name = "XMON break",
-};
-#endif
-
-void __init chrp_init_IRQ(void)
-{
- struct device_node *np;
- unsigned long chrp_int_ack = 0;
- unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS];
-#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
- struct device_node *kbd;
-#endif
-
- for (np = find_devices("pci"); np != NULL; np = np->next) {
- unsigned int *addrp = (unsigned int *)
- get_property(np, "8259-interrupt-acknowledge", NULL);
-
- if (addrp == NULL)
- continue;
- chrp_int_ack = addrp[prom_n_addr_cells(np)-1];
- break;
- }
- if (np == NULL)
- printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n");
-
- chrp_find_openpic();
-
- if (OpenPIC_Addr) {
- prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS);
- OpenPIC_InitSenses = init_senses;
- OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
-
- openpic_init(NUM_8259_INTERRUPTS);
- /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
- openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
- i8259_irq);
-
- }
- i8259_init(chrp_int_ack, 0);
-
-#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
- /* see if there is a keyboard in the device tree
- with a parent of type "adb" */
- for (kbd = find_devices("keyboard"); kbd; kbd = kbd->next)
- if (kbd->parent && kbd->parent->type
- && strcmp(kbd->parent->type, "adb") == 0)
- break;
- if (kbd)
- setup_irq(HYDRA_INT_ADB_NMI, &xmon_irqaction);
-#endif
-}
-
-void __init
-chrp_init2(void)
-{
-#ifdef CONFIG_NVRAM
- chrp_nvram_init();
-#endif
-
- request_region(0x20,0x20,"pic1");
- request_region(0xa0,0x20,"pic2");
- request_region(0x00,0x20,"dma1");
- request_region(0x40,0x20,"timer");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xc0,0x20,"dma2");
-
- if (ppc_md.progress)
- ppc_md.progress(" Have fun! ", 0x7777);
-}
-
-static struct device_node *memory_node;
-
-static int __init get_mem_prop(char *name, struct mem_pieces *mp)
-{
- struct reg_property *rp;
- int i, s;
- unsigned int *ip;
- int nac = prom_n_addr_cells(memory_node);
- int nsc = prom_n_size_cells(memory_node);
-
- ip = (unsigned int *) get_property(memory_node, name, &s);
- if (ip == NULL) {
- printk(KERN_ERR "error: couldn't get %s property on /memory\n",
- name);
- return 0;
- }
- s /= (nsc + nac) * 4;
- rp = mp->regions;
- for (i = 0; i < s; ++i, ip += nac+nsc) {
- if (nac >= 2 && ip[nac-2] != 0)
- continue;
- rp->address = ip[nac-1];
- if (nsc >= 2 && ip[nac+nsc-2] != 0)
- rp->size = ~0U;
- else
- rp->size = ip[nac+nsc-1];
- ++rp;
- }
- mp->n_regions = rp - mp->regions;
-
- /* Make sure the pieces are sorted. */
- mem_pieces_sort(mp);
- mem_pieces_coalesce(mp);
- return 1;
-}
-
-static unsigned long __init chrp_find_end_of_memory(void)
-{
- unsigned long a, total;
- struct mem_pieces phys_mem;
-
- /*
- * Find out where physical memory is, and check that it
- * starts at 0 and is contiguous. It seems that RAM is
- * always physically contiguous on Power Macintoshes.
- *
- * Supporting discontiguous physical memory isn't hard,
- * it just makes the virtual <-> physical mapping functions
- * more complicated (or else you end up wasting space
- * in mem_map).
- */
- memory_node = find_devices("memory");
- if (memory_node == NULL || !get_mem_prop("reg", &phys_mem)
- || phys_mem.n_regions == 0)
- panic("No RAM??");
- a = phys_mem.regions[0].address;
- if (a != 0)
- panic("RAM doesn't start at physical address 0");
- total = phys_mem.regions[0].size;
-
- if (phys_mem.n_regions > 1) {
- printk("RAM starting at 0x%x is not contiguous\n",
- phys_mem.regions[1].address);
- printk("Using RAM from 0 to 0x%lx\n", total-1);
- }
-
- return total;
-}
-
-void __init
-chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
- unsigned long r6, unsigned long r7)
-{
- struct device_node *root = find_path_device ("/");
- char *machine = NULL;
-
-#ifdef CONFIG_BLK_DEV_INITRD
- /* take care of initrd if we have one */
- if ( r6 )
- {
- initrd_start = r6 + KERNELBASE;
- initrd_end = r6 + r7 + KERNELBASE;
- }
-#endif /* CONFIG_BLK_DEV_INITRD */
-
- ISA_DMA_THRESHOLD = ~0L;
- DMA_MODE_READ = 0x44;
- DMA_MODE_WRITE = 0x48;
- isa_io_base = CHRP_ISA_IO_BASE; /* default value */
- ppc_do_canonicalize_irqs = 1;
-
- if (root)
- machine = get_property(root, "model", NULL);
- if (machine && strncmp(machine, "Pegasos", 7) == 0) {
- _chrp_type = _CHRP_Pegasos;
- } else if (machine && strncmp(machine, "IBM", 3) == 0) {
- _chrp_type = _CHRP_IBM;
- } else if (machine && strncmp(machine, "MOT", 3) == 0) {
- _chrp_type = _CHRP_Motorola;
- } else {
- /* Let's assume it is an IBM chrp if all else fails */
- _chrp_type = _CHRP_IBM;
- }
-
- ppc_md.setup_arch = chrp_setup_arch;
- ppc_md.show_percpuinfo = of_show_percpuinfo;
- ppc_md.show_cpuinfo = chrp_show_cpuinfo;
-
- ppc_md.init_IRQ = chrp_init_IRQ;
- if (_chrp_type == _CHRP_Pegasos)
- ppc_md.get_irq = i8259_irq;
- else
- ppc_md.get_irq = openpic_get_irq;
-
- ppc_md.init = chrp_init2;
-
- ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
-
- ppc_md.restart = chrp_restart;
- ppc_md.power_off = chrp_power_off;
- ppc_md.halt = chrp_halt;
-
- ppc_md.time_init = chrp_time_init;
- ppc_md.set_rtc_time = chrp_set_rtc_time;
- ppc_md.get_rtc_time = chrp_get_rtc_time;
- ppc_md.calibrate_decr = chrp_calibrate_decr;
-
- ppc_md.find_end_of_memory = chrp_find_end_of_memory;
-
- if (rtas_data) {
- struct device_node *rtas;
- unsigned int *p;
-
- rtas = find_devices("rtas");
- if (rtas != NULL) {
- if (get_property(rtas, "display-character", NULL)) {
- ppc_md.progress = rtas_display_progress;
- p = (unsigned int *) get_property
- (rtas, "ibm,display-line-length", NULL);
- if (p)
- max_width = *p;
- } else if (get_property(rtas, "set-indicator", NULL))
- ppc_md.progress = rtas_indicator_progress;
- }
- }
-#ifdef CONFIG_BOOTX_TEXT
- if (ppc_md.progress == NULL && boot_text_mapped)
- ppc_md.progress = btext_progress;
-#endif
-
-#ifdef CONFIG_SMP
- smp_ops = &chrp_smp_ops;
-#endif /* CONFIG_SMP */
-
- /*
- * Print the banner, then scroll down so boot progress
- * can be printed. -- Cort
- */
- if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
-}
-
-void
-rtas_display_progress(char *s, unsigned short hex)
-{
- int width;
- char *os = s;
-
- if ( call_rtas( "display-character", 1, 1, NULL, '\r' ) )
- return;
-
- width = max_width;
- while ( *os )
- {
- if ( (*os == '\n') || (*os == '\r') )
- width = max_width;
- else
- width--;
- call_rtas( "display-character", 1, 1, NULL, *os++ );
- /* if we overwrite the screen length */
- if ( width == 0 )
- while ( (*os != 0) && (*os != '\n') && (*os != '\r') )
- os++;
- }
-
- /*while ( width-- > 0 )*/
- call_rtas( "display-character", 1, 1, NULL, ' ' );
-}
-
-void
-rtas_indicator_progress(char *s, unsigned short hex)
-{
- call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex);
-}
-
-#ifdef CONFIG_BOOTX_TEXT
-void
-btext_progress(char *s, unsigned short hex)
-{
- prom_print(s);
- prom_print("\n");
-}
-#endif /* CONFIG_BOOTX_TEXT */
diff --git a/arch/ppc/platforms/chrp_smp.c b/arch/ppc/platforms/chrp_smp.c
deleted file mode 100644
index 97e539557ec..00000000000
--- a/arch/ppc/platforms/chrp_smp.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * Smp support for CHRP machines.
- *
- * Written by Cort Dougan (cort@cs.nmt.edu) borrowing a great
- * deal of code from the sparc and intel versions.
- *
- * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
- *
- */
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/sched.h>
-#include <linux/smp.h>
-#include <linux/smp_lock.h>
-#include <linux/interrupt.h>
-#include <linux/kernel_stat.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/spinlock.h>
-
-#include <asm/ptrace.h>
-#include <asm/atomic.h>
-#include <asm/irq.h>
-#include <asm/page.h>
-#include <asm/pgtable.h>
-#include <asm/sections.h>
-#include <asm/io.h>
-#include <asm/prom.h>
-#include <asm/smp.h>
-#include <asm/residual.h>
-#include <asm/time.h>
-#include <asm/open_pic.h>
-#include <asm/machdep.h>
-
-extern unsigned long smp_chrp_cpu_nr;
-
-static int __init
-smp_chrp_probe(void)
-{
- if (smp_chrp_cpu_nr > 1)
- openpic_request_IPIs();
-
- return smp_chrp_cpu_nr;
-}
-
-static void __devinit
-smp_chrp_kick_cpu(int nr)
-{
- *(unsigned long *)KERNELBASE = nr;
- asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
-}
-
-static void __devinit
-smp_chrp_setup_cpu(int cpu_nr)
-{
- if (OpenPIC_Addr)
- do_openpic_setup_cpu();
-}
-
-static DEFINE_SPINLOCK(timebase_lock);
-static unsigned int timebase_upper = 0, timebase_lower = 0;
-
-void __devinit
-smp_chrp_give_timebase(void)
-{
- spin_lock(&timebase_lock);
- call_rtas("freeze-time-base", 0, 1, NULL);
- timebase_upper = get_tbu();
- timebase_lower = get_tbl();
- spin_unlock(&timebase_lock);
-
- while (timebase_upper || timebase_lower)
- barrier();
- call_rtas("thaw-time-base", 0, 1, NULL);
-}
-
-void __devinit
-smp_chrp_take_timebase(void)
-{
- while (!(timebase_upper || timebase_lower))
- barrier();
- spin_lock(&timebase_lock);
- set_tb(timebase_upper, timebase_lower);
- timebase_upper = 0;
- timebase_lower = 0;
- spin_unlock(&timebase_lock);
- printk("CPU %i taken timebase\n", smp_processor_id());
-}
-
-/* CHRP with openpic */
-struct smp_ops_t chrp_smp_ops = {
- .message_pass = smp_openpic_message_pass,
- .probe = smp_chrp_probe,
- .kick_cpu = smp_chrp_kick_cpu,
- .setup_cpu = smp_chrp_setup_cpu,
- .give_timebase = smp_chrp_give_timebase,
- .take_timebase = smp_chrp_take_timebase,
-};
diff --git a/arch/ppc/platforms/chrp_time.c b/arch/ppc/platforms/chrp_time.c
deleted file mode 100644
index 51e06ad6616..00000000000
--- a/arch/ppc/platforms/chrp_time.c
+++ /dev/null
@@ -1,235 +0,0 @@
-/*
- * Copyright (C) 1991, 1992, 1995 Linus Torvalds
- *
- * Adapted for PowerPC (PReP) by Gary Thomas
- * Modified by Cort Dougan (cort@cs.nmt.edu).
- * Copied and modified from arch/i386/kernel/time.c
- *
- */
-#include <linux/errno.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/mm.h>
-#include <linux/interrupt.h>
-#include <linux/time.h>
-#include <linux/timex.h>
-#include <linux/kernel_stat.h>
-#include <linux/mc146818rtc.h>
-#include <linux/init.h>
-#include <linux/bcd.h>
-
-#include <asm/io.h>
-#include <asm/nvram.h>
-#include <asm/prom.h>
-#include <asm/sections.h>
-#include <asm/time.h>
-
-extern spinlock_t rtc_lock;
-
-static int nvram_as1 = NVRAM_AS1;
-static int nvram_as0 = NVRAM_AS0;
-static int nvram_data = NVRAM_DATA;
-
-long __init chrp_time_init(void)
-{
- struct device_node *rtcs;
- int base;
-
- rtcs = find_compatible_devices("rtc", "pnpPNP,b00");
- if (rtcs == NULL)
- rtcs = find_compatible_devices("rtc", "ds1385-rtc");
- if (rtcs == NULL || rtcs->addrs == NULL)
- return 0;
- base = rtcs->addrs[0].address;
- nvram_as1 = 0;
- nvram_as0 = base;
- nvram_data = base + 1;
-
- return 0;
-}
-
-int chrp_cmos_clock_read(int addr)
-{
- if (nvram_as1 != 0)
- outb(addr>>8, nvram_as1);
- outb(addr, nvram_as0);
- return (inb(nvram_data));
-}
-
-void chrp_cmos_clock_write(unsigned long val, int addr)
-{
- if (nvram_as1 != 0)
- outb(addr>>8, nvram_as1);
- outb(addr, nvram_as0);
- outb(val, nvram_data);
- return;
-}
-
-/*
- * Set the hardware clock. -- Cort
- */
-int chrp_set_rtc_time(unsigned long nowtime)
-{
- unsigned char save_control, save_freq_select;
- struct rtc_time tm;
-
- spin_lock(&rtc_lock);
- to_tm(nowtime, &tm);
-
- save_control = chrp_cmos_clock_read(RTC_CONTROL); /* tell the clock it's being set */
-
- chrp_cmos_clock_write((save_control|RTC_SET), RTC_CONTROL);
-
- save_freq_select = chrp_cmos_clock_read(RTC_FREQ_SELECT); /* stop and reset prescaler */
-
- chrp_cmos_clock_write((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
-
- tm.tm_year -= 1900;
- if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
- BIN_TO_BCD(tm.tm_sec);
- BIN_TO_BCD(tm.tm_min);
- BIN_TO_BCD(tm.tm_hour);
- BIN_TO_BCD(tm.tm_mon);
- BIN_TO_BCD(tm.tm_mday);
- BIN_TO_BCD(tm.tm_year);
- }
- chrp_cmos_clock_write(tm.tm_sec,RTC_SECONDS);
- chrp_cmos_clock_write(tm.tm_min,RTC_MINUTES);
- chrp_cmos_clock_write(tm.tm_hour,RTC_HOURS);
- chrp_cmos_clock_write(tm.tm_mon,RTC_MONTH);
- chrp_cmos_clock_write(tm.tm_mday,RTC_DAY_OF_MONTH);
- chrp_cmos_clock_write(tm.tm_year,RTC_YEAR);
-
- /* The following flags have to be released exactly in this order,
- * otherwise the DS12887 (popular MC146818A clone with integrated
- * battery and quartz) will not reset the oscillator and will not
- * update precisely 500 ms later. You won't find this mentioned in
- * the Dallas Semiconductor data sheets, but who believes data
- * sheets anyway ... -- Markus Kuhn
- */
- chrp_cmos_clock_write(save_control, RTC_CONTROL);
- chrp_cmos_clock_write(save_freq_select, RTC_FREQ_SELECT);
-
- spin_unlock(&rtc_lock);
- return 0;
-}
-
-unsigned long chrp_get_rtc_time(void)
-{
- unsigned int year, mon, day, hour, min, sec;
-
- do {
- sec = chrp_cmos_clock_read(RTC_SECONDS);
- min = chrp_cmos_clock_read(RTC_MINUTES);
- hour = chrp_cmos_clock_read(RTC_HOURS);
- day = chrp_cmos_clock_read(RTC_DAY_OF_MONTH);
- mon = chrp_cmos_clock_read(RTC_MONTH);
- year = chrp_cmos_clock_read(RTC_YEAR);
- } while (sec != chrp_cmos_clock_read(RTC_SECONDS));
-
- if (!(chrp_cmos_clock_read(RTC_CONTROL) & RTC_DM_BINARY)
- || RTC_ALWAYS_BCD) {
- BCD_TO_BIN(sec);
- BCD_TO_BIN(min);
- BCD_TO_BIN(hour);
- BCD_TO_BIN(day);
- BCD_TO_BIN(mon);
- BCD_TO_BIN(year);
- }
-
- year += 1900;
- if (year < 1970)
- year += 100;
- return mktime(year, mon, day, hour, min, sec);
-}
-
-/*
- * Calibrate the decrementer frequency with the VIA timer 1.
- */
-#define VIA_TIMER_FREQ_6 4700000 /* time 1 frequency * 6 */
-
-/* VIA registers */
-#define RS 0x200 /* skip between registers */
-#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
-#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
-#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
-#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
-#define ACR (11*RS) /* Auxiliary control register */
-#define IFR (13*RS) /* Interrupt flag register */
-
-/* Bits in ACR */
-#define T1MODE 0xc0 /* Timer 1 mode */
-#define T1MODE_CONT 0x40 /* continuous interrupts */
-
-/* Bits in IFR and IER */
-#define T1_INT 0x40 /* Timer 1 interrupt */
-
-static int __init chrp_via_calibrate_decr(void)
-{
- struct device_node *vias;
- volatile unsigned char __iomem *via;
- int count = VIA_TIMER_FREQ_6 / 100;
- unsigned int dstart, dend;
-
- vias = find_devices("via-cuda");
- if (vias == 0)
- vias = find_devices("via");
- if (vias == 0 || vias->n_addrs == 0)
- return 0;
- via = ioremap(vias->addrs[0].address, vias->addrs[0].size);
-
- /* set timer 1 for continuous interrupts */
- out_8(&via[ACR], (via[ACR] & ~T1MODE) | T1MODE_CONT);
- /* set the counter to a small value */
- out_8(&via[T1CH], 2);
- /* set the latch to `count' */
- out_8(&via[T1LL], count);
- out_8(&via[T1LH], count >> 8);
- /* wait until it hits 0 */
- while ((in_8(&via[IFR]) & T1_INT) == 0)
- ;
- dstart = get_dec();
- /* clear the interrupt & wait until it hits 0 again */
- in_8(&via[T1CL]);
- while ((in_8(&via[IFR]) & T1_INT) == 0)
- ;
- dend = get_dec();
-
- tb_ticks_per_jiffy = (dstart - dend) / ((6 * HZ)/100);
- tb_to_us = mulhwu_scale_factor(dstart - dend, 60000);
-
- printk(KERN_INFO "via_calibrate_decr: ticks per jiffy = %u (%u ticks)\n",
- tb_ticks_per_jiffy, dstart - dend);
-
- iounmap(via);
-
- return 1;
-}
-
-void __init chrp_calibrate_decr(void)
-{
- struct device_node *cpu;
- unsigned int freq, *fp;
-
- if (chrp_via_calibrate_decr())
- return;
-
- /*
- * The cpu node should have a timebase-frequency property
- * to tell us the rate at which the decrementer counts.
- */
- freq = 16666000; /* hardcoded default */
- cpu = find_type_devices("cpu");
- if (cpu != 0) {
- fp = (unsigned int *)
- get_property(cpu, "timebase-frequency", NULL);
- if (fp != 0)
- freq = *fp;
- }
- printk("time_init: decrementer frequency = %u.%.6u MHz\n",
- freq/1000000, freq%1000000);
- tb_ticks_per_jiffy = freq / HZ;
- tb_to_us = mulhwu_scale_factor(freq, 1000000);
-}
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index 5171b53bccb..fecbe9adc9e 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -34,8 +34,7 @@
#include <asm/mpc52xx.h>
#include <asm/ppc_sys.h>
#include <asm/machdep.h>
-
-#include <syslib/mpc52xx_pci.h>
+#include <asm/pci-bridge.h>
extern int powersave_nap;
@@ -68,44 +67,53 @@ lite5200_show_cpuinfo(struct seq_file *m)
}
#ifdef CONFIG_PCI
+#ifdef CONFIG_LITE5200B
+static int
+lite5200_map_irq(struct pci_dev *dev, unsigned char idsel,
+ unsigned char pin)
+{
+ static char pci_irq_table[][4] =
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {
+ {MPC52xx_IRQ0, MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3},
+ {MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3, MPC52xx_IRQ0},
+ };
+
+ const long min_idsel = 24, max_idsel = 25, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+}
+#else /* Original Lite */
static int
lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;
}
#endif
+#endif
static void __init
lite5200_setup_cpu(void)
{
- struct mpc52xx_cdm __iomem *cdm;
struct mpc52xx_gpio __iomem *gpio;
struct mpc52xx_intr __iomem *intr;
- struct mpc52xx_xlb __iomem *xlb;
u32 port_config;
u32 intr_ctrl;
/* Map zones */
- cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
- xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
- if (!cdm || !gpio || !xlb || !intr) {
- printk("lite5200.c: Error while mapping CDM/GPIO/XLB/INTR during"
- "lite5200_setup_cpu\n");
+ if (!gpio || !intr) {
+ printk(KERN_ERR __FILE__ ": "
+ "Error while mapping GPIO/INTR during "
+ "lite5200_setup_cpu\n");
goto unmap_regs;
}
- /* Use internal 48 Mhz */
- out_8(&cdm->ext_48mhz_en, 0x00);
- out_8(&cdm->fd_enable, 0x01);
- if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */
- out_be16(&cdm->fd_counters, 0x0001);
- else
- out_be16(&cdm->fd_counters, 0x5555);
-
/* Get port mux config */
port_config = in_be32(&gpio->port_config);
@@ -116,29 +124,29 @@ lite5200_setup_cpu(void)
port_config &= ~0x00007000; /* Differential mode - USB1 only */
port_config |= 0x00001000;
+ /* ATA CS is on csb_4/5 */
+ port_config &= ~0x03000000;
+ port_config |= 0x01000000;
+
/* Commit port config */
out_be32(&gpio->port_config, port_config);
- /* Configure the XLB Arbiter */
- out_be32(&xlb->master_pri_enable, 0xff);
- out_be32(&xlb->master_priority, 0x11111111);
-
- /* Enable ram snooping for 1GB window */
- out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
- out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
-
- /* IRQ[0-3] setup : IRQ0 - Level Active Low */
- /* IRQ[1-3] - Level Active High */
+ /* IRQ[0-3] setup */
intr_ctrl = in_be32(&intr->ctrl);
intr_ctrl &= ~0x00ff0000;
- intr_ctrl |= 0x00c00000;
+#ifdef CONFIG_LITE5200B
+ /* IRQ[0-3] Level Active Low */
+ intr_ctrl |= 0x00ff0000;
+#else
+ /* IRQ0 Level Active Low
+ * IRQ[1-3] Level Active High */
+ intr_ctrl |= 0x00c00000;
+#endif
out_be32(&intr->ctrl, intr_ctrl);
/* Unmap reg zone */
unmap_regs:
- if (cdm) iounmap(cdm);
if (gpio) iounmap(gpio);
- if (xlb) iounmap(xlb);
if (intr) iounmap(intr);
}
@@ -146,7 +154,8 @@ static void __init
lite5200_setup_arch(void)
{
/* CPU & Port mux setup */
- lite5200_setup_cpu();
+ mpc52xx_setup_cpu(); /* Generic */
+ lite5200_setup_cpu(); /* Platform specific */
#ifdef CONFIG_PCI
/* PCI Bridge setup */
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
index d95c05d9824..e86f6156d58 100644
--- a/arch/ppc/platforms/prep_setup.c
+++ b/arch/ppc/platforms/prep_setup.c
@@ -1067,15 +1067,13 @@ prep_map_io(void)
static int __init
prep_request_io(void)
{
- if (_machine == _MACH_prep) {
#ifdef CONFIG_NVRAM
- request_region(PREP_NVRAM_AS0, 0x8, "nvram");
+ request_region(PREP_NVRAM_AS0, 0x8, "nvram");
#endif
- request_region(0x00,0x20,"dma1");
- request_region(0x40,0x20,"timer");
- request_region(0x80,0x10,"dma page reg");
- request_region(0xc0,0x20,"dma2");
- }
+ request_region(0x00,0x20,"dma1");
+ request_region(0x40,0x20,"timer");
+ request_region(0x80,0x10,"dma page reg");
+ request_region(0xc0,0x20,"dma2");
return 0;
}
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-10-31 21:48:14 +0000