diff options
Diffstat (limited to 'arch/ppc')
200 files changed, 4983 insertions, 6929 deletions
diff --git a/arch/ppc/4xx_io/serial_sicc.c b/arch/ppc/4xx_io/serial_sicc.c index e95c48d5757..84d96b857e4 100644 --- a/arch/ppc/4xx_io/serial_sicc.c +++ b/arch/ppc/4xx_io/serial_sicc.c @@ -1145,8 +1145,8 @@ static int set_serial_info(struct SICC_info *info, info->flags = ((state->flags & ~ASYNC_INTERNAL_FLAGS) | (info->flags & ASYNC_INTERNAL_FLAGS)); state->custom_divisor = new_serial.custom_divisor; - state->close_delay = new_serial.close_delay * HZ / 100; - state->closing_wait = new_serial.closing_wait * HZ / 100; + state->close_delay = msecs_to_jiffies(10 * new_serial.close_delay); + state->closing_wait = msecs_to_jiffies(10 * new_serial.closing_wait); info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; port->fifosize = new_serial.xmit_fifo_size; @@ -1465,10 +1465,8 @@ static void siccuart_close(struct tty_struct *tty, struct file *filp) info->event = 0; info->tty = NULL; if (info->blocked_open) { - if (info->state->close_delay) { - set_current_state(TASK_INTERRUPTIBLE); - schedule_timeout(info->state->close_delay); - } + if (info->state->close_delay) + schedule_timeout_interruptible(info->state->close_delay); wake_up_interruptible(&info->open_wait); } info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING); @@ -1496,7 +1494,7 @@ static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout) * Note: we have to use pretty tight timings here to satisfy * the NIST-PCTS. */ - char_time = (info->timeout - HZ/50) / info->port->fifosize; + char_time = (info->timeout - msecs_to_jiffies(20)) / info->port->fifosize; char_time = char_time / 5; if (char_time == 0) char_time = 1; @@ -1521,8 +1519,7 @@ static void siccuart_wait_until_sent(struct tty_struct *tty, int timeout) tty->index, jiffies, expire, char_time); while ((readb(info->port->uart_base + BL_SICC_LSR) & _LSR_TX_ALL) != _LSR_TX_ALL) { - set_current_state(TASK_INTERRUPTIBLE); - schedule_timeout(char_time); + schedule_timeout_interruptible(char_time); if (signal_pending(current)) break; if (timeout && time_after(jiffies, expire)) @@ -1773,7 +1770,7 @@ int __init siccuart_init(void) for (i = 0; i < SERIAL_SICC_NR; i++) { struct SICC_state *state = sicc_state + i; state->line = i; - state->close_delay = 5 * HZ / 10; + state->close_delay = msecs_to_jiffies(500); state->closing_wait = 30 * HZ; spin_lock_init(&state->sicc_lock); } diff --git a/arch/ppc/8260_io/fcc_enet.c b/arch/ppc/8260_io/fcc_enet.c index 2086c6ad114..4edeede9ccf 100644 --- a/arch/ppc/8260_io/fcc_enet.c +++ b/arch/ppc/8260_io/fcc_enet.c @@ -1309,8 +1309,7 @@ static void mii_dm9161_wait(uint mii_reg, struct net_device *dev) /* Davicom takes a bit to come up after a reset, * so wait here for a bit */ - set_current_state(TASK_UNINTERRUPTIBLE); - schedule_timeout(timeout); + schedule_timeout_uninterruptible(timeout); } static phy_info_t phy_info_dm9161 = { diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c index 11726e2a4ec..579cd40258b 100644 --- a/arch/ppc/8xx_io/commproc.c +++ b/arch/ppc/8xx_io/commproc.c @@ -73,7 +73,7 @@ cpm_mask_irq(unsigned int irq) { int cpm_vec = irq - CPM_IRQ_OFFSET; - ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_vec); + out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) & ~(1 << cpm_vec)); } static void @@ -81,7 +81,7 @@ cpm_unmask_irq(unsigned int irq) { int cpm_vec = irq - CPM_IRQ_OFFSET; - ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << cpm_vec); + out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) | (1 << cpm_vec)); } static void @@ -95,7 +95,7 @@ cpm_eoi(unsigned int irq) { int cpm_vec = irq - CPM_IRQ_OFFSET; - ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr = (1 << cpm_vec); + out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec)); } struct hw_interrupt_type cpm_pic = { @@ -133,7 +133,7 @@ m8xx_cpm_reset(void) * manual recommends it. * Bit 25, FAM can also be set to use FEC aggressive mode (860T). */ - imp->im_siu_conf.sc_sdcr = 1; + out_be32(&imp->im_siu_conf.sc_sdcr, 1), /* Reclaim the DP memory for our use. */ m8xx_cpm_dpinit(); @@ -178,10 +178,10 @@ cpm_interrupt_init(void) /* Initialize the CPM interrupt controller. */ - ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr = + out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | - ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; - ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; + ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK); + out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, 0); /* install the CPM interrupt controller routines for the CPM * interrupt vectors @@ -198,7 +198,7 @@ cpm_interrupt_init(void) if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction)) panic("Could not allocate CPM error IRQ!"); - ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN; + out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr) | CICR_IEN); } /* @@ -212,8 +212,8 @@ cpm_get_irq(struct pt_regs *regs) /* Get the vector by setting the ACK bit and then reading * the register. */ - ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1; - cpm_vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr; + out_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr, 1); + cpm_vec = in_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr); cpm_vec >>= 11; return cpm_vec; @@ -388,9 +388,8 @@ void m8xx_cpm_dpinit(void) /* * Allocate the requested size worth of DP memory. - * This function used to return an index into the DPRAM area. - * Now it returns the actuall physical address of that area. - * use m8xx_cpm_dpram_offset() to get the index + * This function returns an offset into the DPRAM area. + * Use cpm_dpram_addr() to get the virtual address of the area. */ uint cpm_dpalloc(uint size, uint align) { diff --git a/arch/ppc/8xx_io/cs4218.h b/arch/ppc/8xx_io/cs4218.h index a3c38c5a5db..f1c7392255f 100644 --- a/arch/ppc/8xx_io/cs4218.h +++ b/arch/ppc/8xx_io/cs4218.h @@ -78,7 +78,7 @@ typedef struct { const char *name2; void (*open)(void); void (*release)(void); - void *(*dma_alloc)(unsigned int, int); + void *(*dma_alloc)(unsigned int, gfp_t); void (*dma_free)(void *, unsigned int); int (*irqinit)(void); #ifdef MODULE diff --git a/arch/ppc/8xx_io/cs4218_tdm.c b/arch/ppc/8xx_io/cs4218_tdm.c index 2ca9ec7ec3a..49eb2a7e65c 100644 --- a/arch/ppc/8xx_io/cs4218_tdm.c +++ b/arch/ppc/8xx_io/cs4218_tdm.c @@ -318,7 +318,7 @@ struct cs_sound_settings { static struct cs_sound_settings sound; -static void *CS_Alloc(unsigned int size, int flags); +static void *CS_Alloc(unsigned int size, gfp_t flags); static void CS_Free(void *ptr, unsigned int size); static int CS_IrqInit(void); #ifdef MODULE @@ -959,7 +959,7 @@ static TRANS transCSNormalRead = { /*** Low level stuff *********************************************************/ -static void *CS_Alloc(unsigned int size, int flags) +static void *CS_Alloc(unsigned int size, gfp_t flags) { int order; @@ -1013,8 +1013,7 @@ static void CS_IrqCleanup(void) */ cpm_free_handler(CPMVEC_SMC2); - if (beep_buf) - kfree(beep_buf); + kfree(beep_buf); kd_mksound = orig_mksound; } #endif /* MODULE */ diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig index 776941c7567..8fa51b0a32d 100644 --- a/arch/ppc/Kconfig +++ b/arch/ppc/Kconfig @@ -568,6 +568,7 @@ config CHESTNUT config SPRUCE bool "IBM-Spruce" + select PPC_INDIRECT_PCI config HDPU bool "Sky-HDPU" @@ -588,27 +589,35 @@ config EV64260 config LOPEC bool "Motorola-LoPEC" + select PPC_I8259 config MVME5100 bool "Motorola-MVME5100" + select PPC_INDIRECT_PCI config PPLUS bool "Motorola-PowerPlus" + select PPC_I8259 + select PPC_INDIRECT_PCI config PRPMC750 bool "Motorola-PrPMC750" + select PPC_INDIRECT_PCI config PRPMC800 bool "Motorola-PrPMC800" + select PPC_INDIRECT_PCI config SANDPOINT bool "Motorola-Sandpoint" + select PPC_I8259 help Select SANDPOINT if configuring for a Motorola Sandpoint X3 (any flavor). config RADSTONE_PPC7D bool "Radstone Technology PPC7D board" + select PPC_I8259 config PAL4 bool "SBS-Palomar4" @@ -616,6 +625,7 @@ config PAL4 config GEMINI bool "Synergy-Gemini" depends on BROKEN + select PPC_INDIRECT_PCI help Select Gemini if configuring for a Synergy Microsystems' Gemini series Single Board Computer. More information is available at: @@ -736,6 +746,16 @@ config MPC834x bool default y if MPC834x_SYS +config CPM1 + bool + depends on 8xx + default y + help + The CPM1 (Communications Processor Module) is a coprocessor on + embedded CPUs made by Motorola. Selecting this option means that + you wish to build a kernel for a machine with a CPM1 coprocessor + on it (8xx, 827x, 8560). + config CPM2 bool depends on 8260 || MPC8560 || MPC8555 @@ -747,13 +767,16 @@ config CPM2 on it (826x, 827x, 8560). config PPC_CHRP - bool + bool " Common Hardware Reference Platform (CHRP) based machines" depends on PPC_MULTIPLATFORM + select PPC_I8259 + select PPC_INDIRECT_PCI default y config PPC_PMAC - bool + bool " Apple PowerMac based machines" depends on PPC_MULTIPLATFORM + select PPC_INDIRECT_PCI default y config PPC_PMAC64 @@ -762,8 +785,10 @@ config PPC_PMAC64 default y config PPC_PREP - bool + bool " PowerPC Reference Platform (PReP) based machines" depends on PPC_MULTIPLATFORM + select PPC_I8259 + select PPC_INDIRECT_PCI default y config PPC_OF @@ -797,6 +822,7 @@ config MV64360 # Really MV64360 & MV64460 config MV64X60 bool depends on (GT64260 || MV64360) + select PPC_INDIRECT_PCI default y menu "Set bridge options" @@ -845,6 +871,7 @@ config EPIC_SERIAL_MODE config MPC10X_BRIDGE bool depends on POWERPMC250 || LOPEC || SANDPOINT + select PPC_INDIRECT_PCI default y config MPC10X_OPENPIC @@ -870,6 +897,7 @@ config HARRIER_STORE_GATHERING config MVME5100_IPMC761_PRESENT bool "MVME5100 configured with an IPMC761" depends on MVME5100 + select PPC_I8259 config SPRUCE_BAUD_33M bool "Spruce baud clock support" @@ -1127,6 +1155,7 @@ menu "Bus options" config ISA bool "Support for ISA-bus hardware" depends on PPC_PREP || PPC_CHRP + select PPC_I8259 help Find out whether you have ISA slots on your motherboard. ISA is the name of a bus system, i.e. the way the CPU talks to the other stuff @@ -1139,6 +1168,17 @@ config GENERIC_ISA_DMA depends on POWER3 || POWER4 || 6xx && !CPM2 default y +config PPC_I8259 + bool + default y if 85xx + default n + +config PPC_INDIRECT_PCI + bool + depends on PCI + default y if 40x || 44x || 85xx || 83xx + default n + config EISA bool help @@ -1175,6 +1215,7 @@ config MPC83xx_PCI2 config PCI_QSPAN bool "QSpan PCI" depends on !4xx && !CPM2 && 8xx + select PPC_I8259 help Say Y here if you have a system based on a Motorola 8xx-series embedded processor with a QSPAN PCI interface, otherwise say N. @@ -1182,6 +1223,7 @@ config PCI_QSPAN config PCI_8260 bool depends on PCI && 8260 + select PPC_INDIRECT_PCI default y config 8260_PCI9 @@ -1215,6 +1257,14 @@ source "drivers/pci/Kconfig" source "drivers/pcmcia/Kconfig" +config RAPIDIO + bool "RapidIO support" if MPC8540 || MPC8560 + help + If you say Y here, the kernel will include drivers and + infrastructure code to support RapidIO interconnect devices. + +source "drivers/rapidio/Kconfig" + endmenu menu "Advanced setup" @@ -1368,7 +1418,7 @@ endmenu source "lib/Kconfig" -source "arch/ppc/oprofile/Kconfig" +source "arch/powerpc/oprofile/Kconfig" source "arch/ppc/Kconfig.debug" diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile index 16e2675f327..e719a4933af 100644 --- a/arch/ppc/Makefile +++ b/arch/ppc/Makefile @@ -26,6 +26,10 @@ CPPFLAGS += -Iarch/$(ARCH) -Iarch/$(ARCH)/include AFLAGS += -Iarch/$(ARCH) CFLAGS += -Iarch/$(ARCH) -msoft-float -pipe \ -ffixed-r2 -mmultiple + +# No AltiVec instruction when building kernel +CFLAGS += $(call cc-option, -mno-altivec) + CPP = $(CC) -E $(CFLAGS) # Temporary hack until we have migrated to asm-powerpc LINUXINCLUDE += -Iarch/$(ARCH)/include @@ -57,10 +61,13 @@ head-$(CONFIG_FSL_BOOKE) := arch/ppc/kernel/head_fsl_booke.o head-$(CONFIG_6xx) += arch/ppc/kernel/idle_6xx.o head-$(CONFIG_POWER4) += arch/ppc/kernel/idle_power4.o -head-$(CONFIG_PPC_FPU) += arch/ppc/kernel/fpu.o +head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o -core-y += arch/ppc/kernel/ arch/ppc/platforms/ \ - arch/ppc/mm/ arch/ppc/lib/ arch/ppc/syslib/ +core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \ + arch/ppc/platforms/ \ + arch/ppc/mm/ arch/ppc/lib/ \ + arch/ppc/syslib/ arch/powerpc/sysdev/ \ + arch/powerpc/lib/ core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/ core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/ core-$(CONFIG_85xx) += arch/ppc/platforms/85xx/ @@ -71,7 +78,7 @@ drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/ drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/ drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/ -drivers-$(CONFIG_OPROFILE) += arch/ppc/oprofile/ +drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/ BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm diff --git a/arch/ppc/boot/include/of1275.h b/arch/ppc/boot/include/of1275.h index 69173df76db..4ed88acfa73 100644 --- a/arch/ppc/boot/include/of1275.h +++ b/arch/ppc/boot/include/of1275.h @@ -19,6 +19,9 @@ extern prom_entry of_prom_entry; /* function declarations */ +int call_prom(const char *service, int nargs, int nret, ...); +int call_prom_ret(const char *service, int nargs, int nret, + unsigned int *rets, ...); void * claim(unsigned int virt, unsigned int size, unsigned int align); int map(unsigned int phys, unsigned int virt, unsigned int size); void enter(void); diff --git a/arch/ppc/boot/ld.script b/arch/ppc/boot/ld.script index 9362193742a..d4dd8f15395 100644 --- a/arch/ppc/boot/ld.script +++ b/arch/ppc/boot/ld.script @@ -1,4 +1,4 @@ -OUTPUT_ARCH(powerpc) +OUTPUT_ARCH(powerpc:common) SECTIONS { /* Read-only sections, merged into text segment: */ diff --git a/arch/ppc/boot/of1275/Makefile b/arch/ppc/boot/of1275/Makefile index 02e6f235d7c..0b979c00497 100644 --- a/arch/ppc/boot/of1275/Makefile +++ b/arch/ppc/boot/of1275/Makefile @@ -3,4 +3,4 @@ # lib-y := claim.o enter.o exit.o finddevice.o getprop.o ofinit.o \ - ofstdio.o read.o release.o write.o map.o + ofstdio.o read.o release.o write.o map.o call_prom.o diff --git a/arch/ppc/boot/of1275/call_prom.c b/arch/ppc/boot/of1275/call_prom.c new file mode 100644 index 00000000000..9479a3a2b8c --- /dev/null +++ b/arch/ppc/boot/of1275/call_prom.c @@ -0,0 +1,74 @@ +/* + * Copyright (C) 1996-2005 Paul Mackerras. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + */ + +#include "of1275.h" +#include <stdarg.h> + +int call_prom(const char *service, int nargs, int nret, ...) +{ + int i; + struct prom_args { + const char *service; + int nargs; + int nret; + unsigned int args[12]; + } args; + va_list list; + + args.service = service; + args.nargs = nargs; + args.nret = nret; + + va_start(list, nret); + for (i = 0; i < nargs; i++) + args.args[i] = va_arg(list, unsigned int); + va_end(list); + + for (i = 0; i < nret; i++) + args.args[nargs+i] = 0; + + if (of_prom_entry(&args) < 0) + return -1; + + return (nret > 0)? args.args[nargs]: 0; +} + +int call_prom_ret(const char *service, int nargs, int nret, + unsigned int *rets, ...) +{ + int i; + struct prom_args { + const char *service; + int nargs; + int nret; + unsigned int args[12]; + } args; + va_list list; + + args.service = service; + args.nargs = nargs; + args.nret = nret; + + va_start(list, rets); + for (i = 0; i < nargs; i++) + args.args[i] = va_arg(list, unsigned int); + va_end(list); + + for (i = 0; i < nret; i++) + args.args[nargs+i] = 0; + + if (of_prom_entry(&args) < 0) + return -1; + + if (rets != (void *) 0) + for (i = 1; i < nret; ++i) + rets[i-1] = args.args[nargs+i]; + + return (nret > 0)? args.args[nargs]: 0; +} diff --git a/arch/ppc/boot/of1275/claim.c b/arch/ppc/boot/of1275/claim.c index e060292ae2a..1ed3aeeff8a 100644 --- a/arch/ppc/boot/of1275/claim.c +++ b/arch/ppc/boot/of1275/claim.c @@ -9,26 +9,84 @@ */ #include "of1275.h" +#include "nonstdio.h" -void * -claim(unsigned int virt, unsigned int size, unsigned int align) +/* + * Older OF's require that when claiming a specific range of addresses, + * we claim the physical space in the /memory node and the virtual + * space in the chosen mmu node, and then do a map operation to + * map virtual to physical. + */ +static int need_map = -1; +static ihandle chosen_mmu; +static phandle memory; + +/* returns true if s2 is a prefix of s1 */ +static int string_match(const char *s1, const char *s2) +{ + for (; *s2; ++s2) + if (*s1++ != *s2) + return 0; + return 1; +} + +static int check_of_version(void) +{ + phandle oprom, chosen; + char version[64]; + + oprom = finddevice("/openprom"); + if (oprom == OF_INVALID_HANDLE) + return 0; + if (getprop(oprom, "model", version, sizeof(version)) <= 0) + return 0; + version[sizeof(version)-1] = 0; + printf("OF version = '%s'\n", version); + if (!string_match(version, "Open Firmware, 1.") + && !string_match(version, "FirmWorks,3.")) + return 0; + chosen = finddevice("/chosen"); + if (chosen == OF_INVALID_HANDLE) { + chosen = finddevice("/chosen@0"); + if (chosen == OF_INVALID_HANDLE) { + printf("no chosen\n"); + return 0; + } + } + if (getprop(chosen, "mmu", &chosen_mmu, sizeof(chosen_mmu)) <= 0) { + printf("no mmu\n"); + return 0; + } + memory = (ihandle) call_prom("open", 1, 1, "/memory"); + if (memory == OF_INVALID_HANDLE) { + memory = (ihandle) call_prom("open", 1, 1, "/memory@0"); + if (memory == OF_INVALID_HANDLE) { + printf("no memory node\n"); + return 0; + } + } + printf("old OF detected\n"); + return 1; +} + +void *claim(unsigned int virt, unsigned int size, unsigned int align) { - struct prom_args { - char *service; - int nargs; - int nret; - unsigned int virt; - unsigned int size; - unsigned int align; - void *ret; - } args; + int ret; + unsigned int result; - args.service = "claim"; - args.nargs = 3; - args.nret = 1; - args.virt = virt; - args.size = size; - args.align = align; - (*of_prom_entry)(&args); - return args.ret; + if (need_map < 0) + need_map = check_of_version(); + if (align || !need_map) + return (void *) call_prom("claim", 3, 1, virt, size, align); + + ret = call_prom_ret("call-method", 5, 2, &result, "claim", memory, + align, size, virt); + if (ret != 0 || result == -1) + return (void *) -1; + ret = call_prom_ret("call-method", 5, 2, &result, "claim", chosen_mmu, + align, size, virt); + /* 0x12 == coherent + read/write */ + ret = call_prom("call-method", 6, 1, "map", chosen_mmu, + 0x12, size, virt, virt); + return virt; } diff --git a/arch/ppc/boot/of1275/finddevice.c b/arch/ppc/boot/of1275/finddevice.c index 2c0f7cbb793..0dcb1201b77 100644 --- a/arch/ppc/boot/of1275/finddevice.c +++ b/arch/ppc/boot/of1275/finddevice.c @@ -10,22 +10,7 @@ #include "of1275.h" -phandle -finddevice(const char *name) +phandle finddevice(const char *name) { - struct prom_args { - char *service; - int nargs; - int nret; - const char *devspec; - phandle device; - } args; - - args.service = "finddevice"; - args.nargs = 1; - args.nret = 1; - args.devspec = name; - args.device = OF_INVALID_HANDLE; - (*of_prom_entry)(&args); - return args.device; + return (phandle) call_prom("finddevice", 1, 1, name); } diff --git a/arch/ppc/boot/openfirmware/Makefile b/arch/ppc/boot/openfirmware/Makefile index 03415238fab..83a6433459c 100644 --- a/arch/ppc/boot/openfirmware/Makefile +++ b/arch/ppc/boot/openfirmware/Makefile @@ -80,8 +80,7 @@ $(obj)/note: $(utils)/mknote FORCE $(call if_changed,mknote) -$(obj)/coffcrt0.o: EXTRA_AFLAGS := -traditional -DXCOFF -$(obj)/crt0.o: EXTRA_AFLAGS := -traditional +$(obj)/coffcrt0.o: EXTRA_AFLAGS := -DXCOFF targets += coffcrt0.o crt0.o $(obj)/coffcrt0.o $(obj)/crt0.o: $(common)/crt0.S FORCE $(call if_changed_dep,as_o_S) diff --git a/arch/ppc/boot/openfirmware/chrpmain.c b/arch/ppc/boot/openfirmware/chrpmain.c index effe4a0624b..245dbd9fc12 100644 --- a/arch/ppc/boot/openfirmware/chrpmain.c +++ b/arch/ppc/boot/openfirmware/chrpmain.c @@ -78,7 +78,7 @@ boot(int a1, int a2, void *prom) begin_avail = avail_high = avail_ram; end_avail = scratch + sizeof(scratch); printf("gunzipping (0x%p <- 0x%p:0x%p)...", dst, im, im+len); - gunzip(dst, 0x400000, im, &len); + gunzip(dst, PROG_SIZE - PROG_START, im, &len); printf("done %u bytes\n\r", len); printf("%u bytes of heap consumed, max in use %u\n\r", avail_high - begin_avail, heap_max); diff --git a/arch/ppc/boot/openfirmware/coffmain.c b/arch/ppc/boot/openfirmware/coffmain.c index 04ba9d57e11..2da8855e2be 100644 --- a/arch/ppc/boot/openfirmware/coffmain.c +++ b/arch/ppc/boot/openfirmware/coffmain.c @@ -38,7 +38,7 @@ static char heap[SCRATCH_SIZE]; static unsigned long ram_start = 0; static unsigned long ram_end = 0x1000000; -static unsigned long prog_start = 0x900000; +static unsigned long prog_start = 0x800000; static unsigned long prog_size = 0x700000; typedef void (*kernel_start_t)(int, int, void *); diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile index b7bd8f61a4a..f3e9c534aa8 100644 --- a/arch/ppc/boot/simple/Makefile +++ b/arch/ppc/boot/simple/Makefile @@ -67,6 +67,12 @@ zimageinitrd-$(CONFIG_BAMBOO) := zImage.initrd-TREE entrypoint-$(CONFIG_BAMBOO) := 0x01000000 extra.o-$(CONFIG_BAMBOO) := pibs.o + zimage-$(CONFIG_BUBINGA) := zImage-TREE +zimageinitrd-$(CONFIG_BUBINGA) := zImage.initrd-TREE + end-$(CONFIG_BUBINGA) := bubinga + entrypoint-$(CONFIG_BUBINGA) := 0x01000000 + extra.o-$(CONFIG_BUBINGA) := openbios.o + zimage-$(CONFIG_EBONY) := zImage-TREE zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE end-$(CONFIG_EBONY) := ebony @@ -79,12 +85,30 @@ zimageinitrd-$(CONFIG_LUAN) := zImage.initrd-TREE entrypoint-$(CONFIG_LUAN) := 0x01000000 extra.o-$(CONFIG_LUAN) := pibs.o + zimage-$(CONFIG_YUCCA) := zImage-TREE +zimageinitrd-$(CONFIG_YUCCA) := zImage.initrd-TREE + end-$(CONFIG_YUCCA) := yucca + entrypoint-$(CONFIG_YUCCA) := 0x01000000 + extra.o-$(CONFIG_YUCCA) := pibs.o + zimage-$(CONFIG_OCOTEA) := zImage-TREE zimageinitrd-$(CONFIG_OCOTEA) := zImage.initrd-TREE end-$(CONFIG_OCOTEA) := ocotea entrypoint-$(CONFIG_OCOTEA) := 0x01000000 extra.o-$(CONFIG_OCOTEA) := pibs.o + zimage-$(CONFIG_SYCAMORE) := zImage-TREE +zimageinitrd-$(CONFIG_SYCAMORE) := zImage.initrd-TREE + end-$(CONFIG_SYCAMORE) := sycamore + entrypoint-$(CONFIG_SYCAMORE) := 0x01000000 + extra.o-$(CONFIG_SYCAMORE) := openbios.o + + zimage-$(CONFIG_WALNUT) := zImage-TREE +zimageinitrd-$(CONFIG_WALNUT) := zImage.initrd-TREE + end-$(CONFIG_WALNUT) := walnut + entrypoint-$(CONFIG_WALNUT) := 0x01000000 + extra.o-$(CONFIG_WALNUT) := openbios.o + extra.o-$(CONFIG_EV64260) := misc-ev64260.o end-$(CONFIG_EV64260) := ev64260 cacheflag-$(CONFIG_EV64260) := -include $(clear_L2_L3) @@ -162,7 +186,8 @@ OBJCOPY_ARGS := -O elf32-powerpc # head.o and relocate.o must be at the start. boot-y := head.o relocate.o $(extra.o-y) $(misc-y) -boot-$(CONFIG_40x) += embed_config.o +boot-$(CONFIG_REDWOOD_5) += embed_config.o +boot-$(CONFIG_REDWOOD_6) += embed_config.o boot-$(CONFIG_8xx) += embed_config.o boot-$(CONFIG_8260) += embed_config.o boot-$(CONFIG_BSEIP) += iic.o @@ -237,11 +262,11 @@ $(images)/zImage.initrd-STRIPELF: $(obj)/zvmlinux.initrd skip=64 bs=1k $(images)/zImage-TREE: $(obj)/zvmlinux $(MKTREE) - $(MKTREE) $(obj)/zvmlinux $(images)/zImage.$(end-y) $(ENTRYPOINT) + $(MKTREE) $(obj)/zvmlinux $(images)/zImage.$(end-y) $(entrypoint-y) $(images)/zImage.initrd-TREE: $(obj)/zvmlinux.initrd $(MKTREE) $(MKTREE) $(obj)/zvmlinux.initrd $(images)/zImage.initrd.$(end-y) \ - $(ENTRYPOINT) + $(entrypoint-y) $(images)/zImage-PPLUS: $(obj)/zvmlinux $(MKPREP) $(MKBUGBOOT) $(MKPREP) -pbp $(obj)/zvmlinux $(images)/zImage.$(end-y) diff --git a/arch/ppc/boot/simple/misc.c b/arch/ppc/boot/simple/misc.c index e02de5b467a..f415d6c6236 100644 --- a/arch/ppc/boot/simple/misc.c +++ b/arch/ppc/boot/simple/misc.c @@ -23,7 +23,7 @@ #include <asm/page.h> #include <asm/mmu.h> #include <asm/bootinfo.h> -#ifdef CONFIG_44x +#ifdef CONFIG_4xx #include <asm/ibm4xx.h> #endif #include <asm/reg.h> @@ -88,6 +88,14 @@ get_mem_size(void) return 0; } +#if defined(CONFIG_40x) +#define PPC4xx_EMAC0_MR0 EMAC0_BASE +#endif + +#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0) +#define PPC4xx_EMAC0_MR0 PPC44x_EMAC0_MR0 +#endif + struct bi_record * decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum) { @@ -103,13 +111,13 @@ decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum) com_port = serial_init(0, NULL); #endif -#if defined(CONFIG_44x) && defined(PPC44x_EMAC0_MR0) +#if defined(PPC4xx_EMAC0_MR0) /* Reset MAL */ mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* Wait for reset */ while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* Reset EMAC */ - *(volatile unsigned long *)PPC44x_EMAC0_MR0 = 0x20000000; + *(volatile unsigned long *)PPC4xx_EMAC0_MR0 = 0x20000000; __asm__ __volatile__("eieio"); #endif @@ -164,7 +172,9 @@ decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum) puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n"); } +#ifndef CONFIG_40x /* don't overwrite the 40x image located at 0x00400000! */ avail_ram = (char *)0x00400000; +#endif end_avail = (char *)0x00800000; puts("avail ram: "); puthex((unsigned long)avail_ram); puts(" "); puthex((unsigned long)end_avail); puts("\n"); diff --git a/arch/ppc/boot/simple/openbios.c b/arch/ppc/boot/simple/openbios.c index c732b6d70cf..81f11d8b30a 100644 --- a/arch/ppc/boot/simple/openbios.c +++ b/arch/ppc/boot/simple/openbios.c @@ -1,19 +1,43 @@ /* * arch/ppc/boot/simple/openbios.c * - * 2005 (c) SYSGO AG - g.jaeger@sysgo.com + * Copyright (c) 2005 DENX Software Engineering + * Stefan Roese <sr@denx.de> + * + * Based on original work by + * 2005 (c) SYSGO AG - g.jaeger@sysgo.com + * * This file is licensed under the terms of the GNU General Public * License version 2. This program is licensed "as is" without * any warranty of any kind, whether express or implied. * - * Derived from arch/ppc/boot/simple/pibs.c (from MontaVista) */ #include <linux/types.h> #include <linux/config.h> #include <linux/string.h> #include <asm/ppcboot.h> -#include <platforms/4xx/ebony.h> +#include <asm/ibm4xx.h> +#include <asm/reg.h> +#ifdef CONFIG_40x +#include <asm/io.h> +#endif + +#if defined(CONFIG_BUBINGA) +#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */ +#else +#define BOARD_INFO_VECTOR 0xFFFE0B50 +#endif + +#ifdef CONFIG_40x +/* Supply a default Ethernet address for those eval boards that don't + * ship with one. This is an address from the MBX board I have, so + * it is unlikely you will find it on your network. + */ +static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 }; + +extern unsigned long timebase_period_ns; +#endif /* CONFIG_40x */ extern unsigned long decompress_kernel(unsigned long load_addr, int num_words, unsigned long cksum); @@ -23,15 +47,85 @@ extern unsigned long decompress_kernel(unsigned long load_addr, int num_words, bd_t hold_resid_buf __attribute__ ((__section__ (".data.boot"))); bd_t *hold_residual = &hold_resid_buf; +typedef struct openbios_board_info { + unsigned char bi_s_version[4]; /* Version of this structure */ + unsigned char bi_r_version[30]; /* Version of the IBM ROM */ + unsigned int bi_memsize; /* DRAM installed, in bytes */ +#ifdef CONFIG_405EP + unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */ +#else /* CONFIG_405EP */ + unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */ +#endif /* CONFIG_405EP */ + unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ + unsigned int bi_intfreq; /* Processor speed, in Hz */ + unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ + unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ +#ifdef CONFIG_405EP + unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */ + unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */ +#endif /* CONFIG_405EP */ +} openbios_bd_t; + void * load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, void *ign1, void *ign2) { - decompress_kernel(load_addr, num_words, cksum); +#ifdef CONFIG_40x + openbios_bd_t *openbios_bd = NULL; + openbios_bd_t *(*get_board_info)(void) = + (openbios_bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR); + + /* + * On 40x platforms we not only need the MAC-addresses, but also the + * clocks and memsize. Now try to get all values using the OpenBIOS + * "get_board_info()" callback. + */ + if ((openbios_bd = get_board_info()) != NULL) { + /* + * Copy bd_info from OpenBIOS struct into U-Boot struct + * used by kernel + */ + hold_residual->bi_memsize = openbios_bd->bi_memsize; + hold_residual->bi_intfreq = openbios_bd->bi_intfreq; + hold_residual->bi_busfreq = openbios_bd->bi_busfreq; + hold_residual->bi_pci_busfreq = openbios_bd->bi_pci_busfreq; + memcpy(hold_residual->bi_pci_enetaddr, openbios_bd->bi_pci_enetaddr, 6); +#ifdef CONFIG_405EP + memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr[0], 6); + memcpy(hold_residual->bi_enet1addr, openbios_bd->bi_enetaddr[1], 6); + hold_residual->bi_opbfreq = openbios_bd->bi_opb_busfreq; + hold_residual->bi_procfreq = openbios_bd->bi_pllouta_freq; +#else /* CONFIG_405EP */ + memcpy(hold_residual->bi_enetaddr, openbios_bd->bi_enetaddr, 6); +#endif /* CONFIG_405EP */ + } else { + /* Hmmm...better try to stuff some defaults. + */ + hold_residual->bi_memsize = 16 * 1024 * 1024; + hold_residual->bi_intfreq = 200000000; + hold_residual->bi_busfreq = 100000000; + hold_residual->bi_pci_busfreq = 66666666; + + /* + * Only supply one mac-address in this fallback + */ + memcpy(hold_residual->bi_enetaddr, (void *)def_enet_addr, 6); +#ifdef CONFIG_405EP + hold_residual->bi_opbfreq = 50000000; + hold_residual->bi_procfreq = 200000000; +#endif /* CONFIG_405EP */ + } + timebase_period_ns = 1000000000 / hold_residual->bi_intfreq; +#endif /* CONFIG_40x */ + +#ifdef CONFIG_440GP /* simply copy the MAC addresses */ - memcpy(hold_residual->bi_enetaddr, (char *)EBONY_OPENBIOS_MAC_BASE, 6); - memcpy(hold_residual->bi_enet1addr, (char *)(EBONY_OPENBIOS_MAC_BASE+EBONY_OPENBIOS_MAC_OFFSET), 6); + memcpy(hold_residual->bi_enetaddr, (char *)OPENBIOS_MAC_BASE, 6); + memcpy(hold_residual->bi_enet1addr, (char *)(OPENBIOS_MAC_BASE+OPENBIOS_MAC_OFFSET), 6); +#endif /* CONFIG_440GP */ + + decompress_kernel(load_addr, num_words, cksum); return (void *)hold_residual; } diff --git a/arch/ppc/configs/ev64360_defconfig b/arch/ppc/configs/ev64360_defconfig index de9bbb791db..d471e578dcb 100644 --- a/arch/ppc/configs/ev64360_defconfig +++ b/arch/ppc/configs/ev64360_defconfig @@ -1,17 +1,17 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.13-rc5 -# Fri Aug 5 15:18:23 2005 +# Linux kernel version: 2.6.14 +# Fri Oct 28 19:15:34 2005 # CONFIG_MMU=y CONFIG_GENERIC_HARDIRQS=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_HAVE_DEC_LOCK=y CONFIG_PPC=y CONFIG_PPC32=y CONFIG_GENERIC_NVRAM=y CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y # # Code maturity level options @@ -26,6 +26,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 # General setup # CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y @@ -35,6 +36,7 @@ CONFIG_SYSCTL=y CONFIG_HOTPLUG=y CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set +CONFIG_INITRAMFS_SOURCE="" # CONFIG_EMBEDDED is not set CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_EXTRA_PASS is not set @@ -74,7 +76,7 @@ CONFIG_TAU=y # CONFIG_TAU_AVERAGE is not set # CONFIG_KEXEC is not set # CONFIG_CPU_FREQ is not set -# CONFIG_PM is not set +# CONFIG_WANT_EARLY_SERIAL is not set CONFIG_PPC_STD_MMU=y CONFIG_NOT_COHERENT_CACHE=y @@ -86,22 +88,18 @@ CONFIG_NOT_COHERENT_CACHE=y # CONFIG_KATANA is not set # CONFIG_WILLOW is not set # CONFIG_CPCI690 is not set -# CONFIG_PCORE is not set # CONFIG_POWERPMC250 is not set # CONFIG_CHESTNUT is not set # CONFIG_SPRUCE is not set # CONFIG_HDPU is not set # CONFIG_EV64260 is not set # CONFIG_LOPEC is not set -# CONFIG_MCPN765 is not set # CONFIG_MVME5100 is not set # CONFIG_PPLUS is not set # CONFIG_PRPMC750 is not set # CONFIG_PRPMC800 is not set # CONFIG_SANDPOINT is not set # CONFIG_RADSTONE_PPC7D is not set -# CONFIG_ADIR is not set -# CONFIG_K2 is not set # CONFIG_PAL4 is not set # CONFIG_GEMINI is not set # CONFIG_EST8260 is not set @@ -138,10 +136,13 @@ CONFIG_FLATMEM_MANUAL=y # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set CONFIG_BINFMT_ELF=y CONFIG_BINFMT_MISC=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="console=ttyMM0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2" +# CONFIG_PM is not set +# CONFIG_SOFTWARE_SUSPEND is not set CONFIG_SECCOMP=y CONFIG_ISA_DMA_API=y @@ -152,7 +153,6 @@ CONFIG_GENERIC_ISA_DMA=y CONFIG_PCI=y CONFIG_PCI_DOMAINS=y # CONFIG_PCI_LEGACY_PROC is not set -# CONFIG_PCI_NAMES is not set # # PCCARD (PCMCIA/CardBus) support @@ -206,14 +206,19 @@ CONFIG_SYN_COOKIES=y # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_TUNNEL is not set -CONFIG_IP_TCPDIAG=y -# CONFIG_IP_TCPDIAG_IPV6 is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set CONFIG_TCP_CONG_BIC=y # CONFIG_IPV6 is not set # CONFIG_NETFILTER is not set # +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# # SCTP Configuration (EXPERIMENTAL) # # CONFIG_IP_SCTP is not set @@ -239,6 +244,7 @@ CONFIG_TCP_CONG_BIC=y # CONFIG_HAMRADIO is not set # CONFIG_IRDA is not set # CONFIG_BT is not set +# CONFIG_IEEE80211 is not set # # Device Drivers @@ -252,6 +258,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set # +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# # Memory Technology Devices (MTD) # CONFIG_MTD=y @@ -358,7 +369,6 @@ CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=32768 CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set # CONFIG_CDROM_PKTCDVD is not set @@ -379,6 +389,7 @@ CONFIG_IOSCHED_CFQ=y # # SCSI device support # +# CONFIG_RAID_ATTRS is not set # CONFIG_SCSI is not set # @@ -420,6 +431,10 @@ CONFIG_NETDEVICES=y # CONFIG_ARCNET is not set # +# PHY device support +# + +# # Ethernet (10 or 100Mbit) # # CONFIG_NET_ETHERNET is not set @@ -434,6 +449,7 @@ CONFIG_NETDEVICES=y # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_R8169 is not set +# CONFIG_SIS190 is not set # CONFIG_SKGE is not set # CONFIG_SK98LIN is not set # CONFIG_TIGON3 is not set @@ -446,6 +462,7 @@ CONFIG_MV643XX_ETH_0=y # # Ethernet (10000 Mbit) # +# CONFIG_CHELSIO_T1 is not set # CONFIG_IXGB is not set # CONFIG_S2IO is not set @@ -547,7 +564,20 @@ CONFIG_LEGACY_PTY_COUNT=256 # # Watchdog Cards # -# CONFIG_WATCHDOG is not set +CONFIG_WATCHDOG=y +# CONFIG_WATCHDOG_NOWAYOUT is not set + +# +# Watchdog Device Drivers +# +# CONFIG_SOFT_WATCHDOG is not set +CONFIG_MV64X60_WDT=y + +# +# PCI-based Watchdog Cards +# +# CONFIG_PCIPCWATCHDOG is not set +# CONFIG_WDTPCI is not set # CONFIG_NVRAM is not set CONFIG_GEN_RTC=y # CONFIG_GEN_RTC_X is not set @@ -571,7 +601,6 @@ CONFIG_GEN_RTC=y # I2C support # # CONFIG_I2C is not set -# CONFIG_I2C_SENSOR is not set # # Dallas's 1-wire bus @@ -582,6 +611,7 @@ CONFIG_GEN_RTC=y # Hardware Monitoring support # CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set # CONFIG_HWMON_DEBUG_CHIP is not set # @@ -589,6 +619,10 @@ CONFIG_HWMON=y # # +# Multimedia Capabilities Port drivers +# + +# # Multimedia devices # # CONFIG_VIDEO_DEV is not set @@ -651,10 +685,6 @@ CONFIG_EXT2_FS=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set - -# -# XFS support -# # CONFIG_XFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set @@ -663,6 +693,7 @@ CONFIG_INOTIFY=y CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set # # CD-ROM/DVD Filesystems @@ -683,11 +714,10 @@ CONFIG_DNOTIFY=y CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_SYSFS=y -# CONFIG_DEVPTS_FS_XATTR is not set CONFIG_TMPFS=y -# CONFIG_TMPFS_XATTR is not set # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y +# CONFIG_RELAYFS_FS is not set # # Miscellaneous filesystems @@ -735,6 +765,7 @@ CONFIG_SUNRPC=y # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set # # Partition Types @@ -751,6 +782,7 @@ CONFIG_MSDOS_PARTITION=y # Library routines # # CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set CONFIG_CRC32=y # CONFIG_LIBCRC32C is not set CONFIG_ZLIB_INFLATE=y @@ -767,6 +799,7 @@ CONFIG_ZLIB_DEFLATE=y # CONFIG_PRINTK_TIME is not set # CONFIG_DEBUG_KERNEL is not set CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_SERIAL_TEXT_DEBUG is not set # # Security options diff --git a/arch/ppc/configs/mpc834x_sys_defconfig b/arch/ppc/configs/mpc834x_sys_defconfig index 4a5522ca820..673dc64ebcb 100644 --- a/arch/ppc/configs/mpc834x_sys_defconfig +++ b/arch/ppc/configs/mpc834x_sys_defconfig @@ -1,16 +1,17 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.11-rc4 -# Thu Feb 17 16:12:23 2005 +# Linux kernel version: 2.6.14 +# Mon Nov 7 15:38:29 2005 # CONFIG_MMU=y CONFIG_GENERIC_HARDIRQS=y CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_HAVE_DEC_LOCK=y CONFIG_PPC=y CONFIG_PPC32=y CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y +CONFIG_ARCH_MAY_HAVE_PC_FDC=y # # Code maturity level options @@ -18,23 +19,28 @@ CONFIG_GENERIC_NVRAM=y CONFIG_EXPERIMENTAL=y CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 # # General setup # CONFIG_LOCALVERSION="" +CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 # CONFIG_HOTPLUG is not set CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set +CONFIG_INITRAMFS_SOURCE="" CONFIG_EMBEDDED=y # CONFIG_KALLSYMS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y CONFIG_FUTEX=y # CONFIG_EPOLL is not set # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set @@ -44,6 +50,7 @@ CONFIG_CC_ALIGN_LABELS=0 CONFIG_CC_ALIGN_LOOPS=0 CONFIG_CC_ALIGN_JUMPS=0 # CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 # # Loadable module support @@ -59,34 +66,84 @@ CONFIG_6xx=y # CONFIG_POWER3 is not set # CONFIG_POWER4 is not set # CONFIG_8xx is not set +# CONFIG_E200 is not set # CONFIG_E500 is not set +CONFIG_PPC_FPU=y +# CONFIG_KEXEC is not set # CONFIG_CPU_FREQ is not set +# CONFIG_WANT_EARLY_SERIAL is not set CONFIG_PPC_GEN550=y -CONFIG_83xx=y - -# -# Freescale 83xx options -# -CONFIG_MPC834x_SYS=y -CONFIG_MPC834x=y CONFIG_PPC_STD_MMU=y # # Platform options # +# CONFIG_PPC_MULTIPLATFORM is not set +# CONFIG_APUS is not set +# CONFIG_KATANA is not set +# CONFIG_WILLOW is not set +# CONFIG_CPCI690 is not set +# CONFIG_POWERPMC250 is not set +# CONFIG_CHESTNUT is not set +# CONFIG_SPRUCE is not set +# CONFIG_HDPU is not set +# CONFIG_EV64260 is not set +# CONFIG_LOPEC is not set +# CONFIG_MVME5100 is not set +# CONFIG_PPLUS is not set +# CONFIG_PRPMC750 is not set +# CONFIG_PRPMC800 is not set +# CONFIG_SANDPOINT is not set +# CONFIG_RADSTONE_PPC7D is not set +# CONFIG_PAL4 is not set +# CONFIG_GEMINI is not set +# CONFIG_EST8260 is not set +# CONFIG_SBC82xx is not set +# CONFIG_SBS8260 is not set +# CONFIG_RPX8260 is not set +# CONFIG_TQM8260 is not set +# CONFIG_ADS8272 is not set +# CONFIG_PQ2FADS is not set +# CONFIG_LITE5200 is not set +CONFIG_MPC834x_SYS=y +# CONFIG_EV64360 is not set +CONFIG_83xx=y +CONFIG_MPC834x=y # CONFIG_SMP is not set -# CONFIG_PREEMPT is not set # CONFIG_HIGHMEM is not set +# CONFIG_HZ_100 is not set +CONFIG_HZ_250=y +# CONFIG_HZ_1000 is not set +CONFIG_HZ=250 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_MISC is not set # CONFIG_CMDLINE_BOOL is not set +# CONFIG_PM is not set +# CONFIG_SOFTWARE_SUSPEND is not set +CONFIG_SECCOMP=y +CONFIG_ISA_DMA_API=y # # Bus options # CONFIG_GENERIC_ISA_DMA=y -# CONFIG_PCI is not set -# CONFIG_PCI_DOMAINS is not set +# CONFIG_PPC_I8259 is not set +CONFIG_PPC_INDIRECT_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +# CONFIG_MPC83xx_PCI2 is not set +CONFIG_PCI_LEGACY_PROC=y # # PCCARD (PCMCIA/CardBus) support @@ -94,10 +151,6 @@ CONFIG_GENERIC_ISA_DMA=y # CONFIG_PCCARD is not set # -# PC-card bridges -# - -# # Advanced setup # # CONFIG_ADVANCED_OPTIONS is not set @@ -112,6 +165,75 @@ CONFIG_TASK_SIZE=0x80000000 CONFIG_BOOT_LOAD=0x00800000 # +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +# CONFIG_IP_PNP_RARP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# # Device Drivers # @@ -123,6 +245,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER is not set # +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# # Memory Technology Devices (MTD) # # CONFIG_MTD is not set @@ -140,15 +267,19 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # Block devices # # CONFIG_BLK_DEV_FD is not set +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set # CONFIG_BLK_DEV_COW_COMMON is not set CONFIG_BLK_DEV_LOOP=y # CONFIG_BLK_DEV_CRYPTOLOOP is not set # CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=32768 CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" # CONFIG_LBD is not set # CONFIG_CDROM_PKTCDVD is not set @@ -159,6 +290,11 @@ CONFIG_IOSCHED_NOOP=y CONFIG_IOSCHED_AS=y CONFIG_IOSCHED_DEADLINE=y CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" # CONFIG_ATA_OVER_ETH is not set # @@ -169,6 +305,7 @@ CONFIG_IOSCHED_CFQ=y # # SCSI device support # +# CONFIG_RAID_ATTRS is not set # CONFIG_SCSI is not set # @@ -179,110 +316,116 @@ CONFIG_IOSCHED_CFQ=y # # Fusion MPT device support # +# CONFIG_FUSION is not set # # IEEE 1394 (FireWire) support # +# CONFIG_IEEE1394 is not set # # I2O device support # +# CONFIG_I2O is not set # # Macintosh device drivers # # -# Networking support +# Network device support # -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -CONFIG_SYN_COOKIES=y -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_IP_TCPDIAG=y -# CONFIG_IP_TCPDIAG_IPV6 is not set -# CONFIG_IPV6 is not set -# CONFIG_NETFILTER is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set # -# SCTP Configuration (EXPERIMENTAL) +# ARCnet devices # -# CONFIG_IP_SCTP is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set +# CONFIG_ARCNET is not set # -# QoS and/or fair queueing +# PHY device support # -# CONFIG_NET_SCHED is not set -# CONFIG_NET_CLS_ROUTE is not set +CONFIG_PHYLIB=y # -# Network testing +# MII PHY device drivers # -# CONFIG_NET_PKTGEN is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_HAMRADIO is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set +CONFIG_MARVELL_PHY=y +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set # # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y CONFIG_MII=y +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set + +# +# Tulip family network device support +# +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set +CONFIG_E100=y +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set # # Ethernet (1000 Mbit) # +# CONFIG_ACENIC is not set +# CONFIG_DL2K is not set +CONFIG_E1000=y +# CONFIG_E1000_NAPI is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SK98LIN is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set CONFIG_GIANFAR=y # CONFIG_GFAR_NAPI is not set # # Ethernet (10000 Mbit) # +# CONFIG_CHELSIO_T1 is not set +# CONFIG_IXGB is not set +# CONFIG_S2IO is not set # # Token Ring devices # +# CONFIG_TR is not set # # Wireless LAN (non-hamradio) @@ -293,10 +436,14 @@ CONFIG_GIANFAR=y # Wan interfaces # # CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set # # ISDN subsystem @@ -323,14 +470,6 @@ CONFIG_INPUT=y # CONFIG_INPUT_EVBUG is not set # -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -# CONFIG_SERIO is not set -# CONFIG_SERIO_I8042 is not set - -# # Input Device Drivers # # CONFIG_INPUT_KEYBOARD is not set @@ -340,6 +479,12 @@ CONFIG_SOUND_GAMEPORT=y # CONFIG_INPUT_MISC is not set # +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# # Character devices # # CONFIG_VT is not set @@ -358,6 +503,7 @@ CONFIG_SERIAL_8250_NR_UARTS=4 # CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 @@ -376,6 +522,7 @@ CONFIG_GEN_RTC=y # CONFIG_GEN_RTC_X is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set # # Ftape, the floppy tape device driver @@ -385,6 +532,12 @@ CONFIG_GEN_RTC=y # CONFIG_RAW_DRIVER is not set # +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# # I2C support # CONFIG_I2C=y @@ -400,23 +553,68 @@ CONFIG_I2C_CHARDEV=y # # I2C Hardware Bus support # -# CONFIG_I2C_ISA is not set +# CONFIG_I2C_ALI1535 is not set +# CONFIG_I2C_ALI1563 is not set +# CONFIG_I2C_ALI15X3 is not set +# CONFIG_I2C_AMD756 is not set +# CONFIG_I2C_AMD8111 is not set +# CONFIG_I2C_I801 is not set +# CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set CONFIG_I2C_MPC=y +# CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_PROSAVAGE is not set +# CONFIG_I2C_SAVAGE4 is not set +# CONFIG_SCx200_ACB is not set +# CONFIG_I2C_SIS5595 is not set +# CONFIG_I2C_SIS630 is not set +# CONFIG_I2C_SIS96X is not set +# CONFIG_I2C_VIA is not set +# CONFIG_I2C_VIAPRO is not set +# CONFIG_I2C_VOODOO3 is not set # CONFIG_I2C_PCA_ISA is not set # -# Hardware Sensors Chip support +# Miscellaneous I2C Chip support +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_RTC8564 is not set +# CONFIG_SENSORS_M41T00 is not set +# CONFIG_SENSORS_MAX6875 is not set +# CONFIG_RTC_X1205_I2C is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set +# CONFIG_I2C_DEBUG_CHIP is not set + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support # -# CONFIG_I2C_SENSOR is not set +CONFIG_HWMON=y +# CONFIG_HWMON_VID is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1031 is not set +# CONFIG_SENSORS_ADM9240 is not set # CONFIG_SENSORS_ASB100 is not set +# CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set # CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM75 is not set @@ -427,33 +625,26 @@ CONFIG_I2C_MPC=y # CONFIG_SENSORS_LM85 is not set # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SIS5595 is not set # CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83792D is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83627HF is not set +# CONFIG_SENSORS_W83627EHF is not set +# CONFIG_HWMON_DEBUG_CHIP is not set # -# Other I2C Chip support -# -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_RTC8564 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set - -# -# Dallas's 1-wire bus +# Misc devices # -# CONFIG_W1 is not set # -# Misc devices +# Multimedia Capabilities Port drivers # # @@ -479,11 +670,12 @@ CONFIG_I2C_MPC=y # # USB support # -# CONFIG_USB_ARCH_HAS_HCD is not set -# CONFIG_USB_ARCH_HAS_OHCI is not set +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB is not set # -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' # # @@ -502,10 +694,15 @@ CONFIG_I2C_MPC=y # CONFIG_INFINIBAND is not set # +# SN Devices +# + +# # File systems # CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set +# CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_POSIX_ACL is not set @@ -515,17 +712,16 @@ CONFIG_JBD=y CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set - -# -# XFS support -# +# CONFIG_FS_POSIX_ACL is not set # CONFIG_XFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y # CONFIG_QUOTA is not set CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set # # CD-ROM/DVD Filesystems @@ -546,12 +742,10 @@ CONFIG_DNOTIFY=y CONFIG_PROC_FS=y CONFIG_PROC_KCORE=y CONFIG_SYSFS=y -# CONFIG_DEVFS_FS is not set -# CONFIG_DEVPTS_FS_XATTR is not set CONFIG_TMPFS=y -# CONFIG_TMPFS_XATTR is not set # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y +# CONFIG_RELAYFS_FS is not set # # Miscellaneous filesystems @@ -580,6 +774,7 @@ CONFIG_NFS_FS=y # CONFIG_NFSD is not set CONFIG_ROOT_NFS=y CONFIG_LOCKD=y +CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set @@ -588,6 +783,7 @@ CONFIG_SUNRPC=y # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set # # Partition Types @@ -614,6 +810,7 @@ CONFIG_PARTITION_ADVANCED=y # Library routines # # CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set CONFIG_CRC32=y # CONFIG_LIBCRC32C is not set @@ -625,7 +822,9 @@ CONFIG_CRC32=y # # Kernel hacking # +# CONFIG_PRINTK_TIME is not set # CONFIG_DEBUG_KERNEL is not set +CONFIG_LOG_BUF_SHIFT=14 # CONFIG_SERIAL_TEXT_DEBUG is not set # diff --git a/arch/ppc/configs/stx_gp3_defconfig b/arch/ppc/configs/stx_gp3_defconfig index 66dae836765..3fedc43e44a 100644 --- a/arch/ppc/configs/stx_gp3_defconfig +++ b/arch/ppc/configs/stx_gp3_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.11-rc2 -# Wed Jan 26 14:32:58 2005 +# Linux kernel version: 2.6.12-rc4 +# Tue May 24 18:11:04 2005 # CONFIG_MMU=y CONFIG_GENERIC_HARDIRQS=y @@ -11,6 +11,7 @@ CONFIG_HAVE_DEC_LOCK=y CONFIG_PPC=y CONFIG_PPC32=y CONFIG_GENERIC_NVRAM=y +CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y # # Code maturity level options @@ -18,6 +19,7 @@ CONFIG_GENERIC_NVRAM=y CONFIG_EXPERIMENTAL=y CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 # # General setup @@ -29,7 +31,6 @@ CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y # CONFIG_AUDIT is not set -CONFIG_LOG_BUF_SHIFT=14 CONFIG_HOTPLUG=y CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set @@ -37,6 +38,9 @@ CONFIG_EMBEDDED=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_EPOLL=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set @@ -46,6 +50,7 @@ CONFIG_CC_ALIGN_LABELS=0 CONFIG_CC_ALIGN_LOOPS=0 CONFIG_CC_ALIGN_JUMPS=0 # CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 # # Loadable module support @@ -69,9 +74,11 @@ CONFIG_KMOD=y CONFIG_E500=y CONFIG_BOOKE=y CONFIG_FSL_BOOKE=y +# CONFIG_PHYS_64BIT is not set # CONFIG_SPE is not set CONFIG_MATH_EMULATION=y # CONFIG_CPU_FREQ is not set +# CONFIG_PM is not set CONFIG_85xx=y CONFIG_PPC_INDIRECT_PCI_BE=y @@ -96,6 +103,7 @@ CONFIG_HIGHMEM=y CONFIG_BINFMT_ELF=y CONFIG_BINFMT_MISC=m # CONFIG_CMDLINE_BOOL is not set +CONFIG_ISA_DMA_API=y # # Bus options @@ -104,15 +112,15 @@ CONFIG_PCI=y CONFIG_PCI_DOMAINS=y # CONFIG_PCI_LEGACY_PROC is not set # CONFIG_PCI_NAMES is not set +# CONFIG_PCI_DEBUG is not set # # PCCARD (PCMCIA/CardBus) support # # CONFIG_PCCARD is not set - -# -# PC-card bridges -# +CONFIG_RAPIDIO=y +CONFIG_RAPIDIO_8_BIT_TRANSPORT=y +CONFIG_RAPIDIO_DISC_TIMEOUT=30 # # Advanced setup @@ -152,7 +160,7 @@ CONFIG_PARPORT=m CONFIG_PARPORT_PC=m # CONFIG_PARPORT_PC_FIFO is not set # CONFIG_PARPORT_PC_SUPERIO is not set -# CONFIG_PARPORT_OTHER is not set +# CONFIG_PARPORT_GSC is not set # CONFIG_PARPORT_1284 is not set # @@ -264,7 +272,6 @@ CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_EATA is not set -# CONFIG_SCSI_EATA_PIO is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set # CONFIG_SCSI_GDTH is not set # CONFIG_SCSI_IPS is not set @@ -274,7 +281,6 @@ CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_IMM is not set # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_IPR is not set -# CONFIG_SCSI_QLOGIC_ISP is not set # CONFIG_SCSI_QLOGIC_FC is not set # CONFIG_SCSI_QLOGIC_1280 is not set CONFIG_SCSI_QLA2XXX=m @@ -283,6 +289,7 @@ CONFIG_SCSI_QLA2XXX=m # CONFIG_SCSI_QLA2300 is not set # CONFIG_SCSI_QLA2322 is not set # CONFIG_SCSI_QLA6312 is not set +# CONFIG_SCSI_LPFC is not set # CONFIG_SCSI_DC395x is not set # CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_NSP32 is not set @@ -322,7 +329,6 @@ CONFIG_NET=y # CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set -# CONFIG_NETLINK_DEV is not set CONFIG_UNIX=y # CONFIG_NET_KEY is not set CONFIG_INET=y @@ -431,7 +437,7 @@ CONFIG_IP_NF_NAT_FTP=m # # Network testing # -# CONFIG_NET_PKTGEN is not set +CONFIG_NET_PKTGEN=y # CONFIG_NETPOLL is not set # CONFIG_NET_POLL_CONTROLLER is not set # CONFIG_HAMRADIO is not set @@ -499,6 +505,7 @@ CONFIG_GFAR_NAPI=y # Wan interfaces # # CONFIG_WAN is not set +CONFIG_RIONET=y # CONFIG_FDDI is not set # CONFIG_HIPPI is not set # CONFIG_PLIP is not set @@ -536,20 +543,6 @@ CONFIG_INPUT_EVDEV=m # CONFIG_INPUT_EVBUG is not set # -# Input I/O drivers -# -# CONFIG_GAMEPORT is not set -CONFIG_SOUND_GAMEPORT=y -CONFIG_SERIO=y -CONFIG_SERIO_I8042=y -CONFIG_SERIO_SERPORT=y -# CONFIG_SERIO_CT82C710 is not set -# CONFIG_SERIO_PARKBD is not set -# CONFIG_SERIO_PCIPS2 is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set - -# # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y @@ -567,6 +560,19 @@ CONFIG_MOUSE_PS2=y # CONFIG_INPUT_MISC is not set # +# Hardware I/O ports +# +CONFIG_SERIO=y +CONFIG_SERIO_I8042=y +CONFIG_SERIO_SERPORT=y +# CONFIG_SERIO_PARKBD is not set +# CONFIG_SERIO_PCIPS2 is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set +CONFIG_SOUND_GAMEPORT=y + +# # Character devices # # CONFIG_VT is not set @@ -590,6 +596,7 @@ CONFIG_SERIAL_CPM_SCC2=y # CONFIG_SERIAL_CPM_SCC4 is not set # CONFIG_SERIAL_CPM_SMC1 is not set # CONFIG_SERIAL_CPM_SMC2 is not set +# CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 @@ -626,6 +633,11 @@ CONFIG_DRM=m # CONFIG_RAW_DRIVER is not set # +# TPM devices +# +# CONFIG_TCG_TPM is not set + +# # I2C support # CONFIG_I2C=m @@ -648,12 +660,12 @@ CONFIG_I2C_ALGOBIT=m # CONFIG_I2C_AMD8111 is not set # CONFIG_I2C_I801 is not set # CONFIG_I2C_I810 is not set +# CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_ISA is not set # CONFIG_I2C_MPC is not set # CONFIG_I2C_NFORCE2 is not set # CONFIG_I2C_PARPORT is not set # CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_PIIX4 is not set # CONFIG_I2C_PROSAVAGE is not set # CONFIG_I2C_SAVAGE4 is not set # CONFIG_SCx200_ACB is not set @@ -677,7 +689,9 @@ CONFIG_I2C_ALGOBIT=m # CONFIG_SENSORS_ASB100 is not set # CONFIG_SENSORS_DS1621 is not set # CONFIG_SENSORS_FSCHER is not set +# CONFIG_SENSORS_FSCPOS is not set # CONFIG_SENSORS_GL518SM is not set +# CONFIG_SENSORS_GL520SM is not set # CONFIG_SENSORS_IT87 is not set # CONFIG_SENSORS_LM63 is not set # CONFIG_SENSORS_LM75 is not set @@ -688,9 +702,11 @@ CONFIG_I2C_ALGOBIT=m # CONFIG_SENSORS_LM85 is not set # CONFIG_SENSORS_LM87 is not set # CONFIG_SENSORS_LM90 is not set +# CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_PC87360 is not set # CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_SIS5595 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_VIA686A is not set # CONFIG_SENSORS_W83781D is not set @@ -700,10 +716,12 @@ CONFIG_I2C_ALGOBIT=m # # Other I2C Chip support # +# CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_SENSORS_RTC8564 is not set +# CONFIG_SENSORS_M41T00 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set @@ -732,7 +750,6 @@ CONFIG_I2C_ALGOBIT=m # Graphics support # # CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Sound @@ -752,13 +769,9 @@ CONFIG_SOUND=m # # USB support # -# CONFIG_USB is not set CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information -# +# CONFIG_USB is not set # # USB Gadget Support @@ -789,6 +802,10 @@ CONFIG_JBD_DEBUG=y CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set + +# +# XFS support +# # CONFIG_XFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set @@ -859,7 +876,6 @@ CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y -# CONFIG_EXPORTFS is not set CONFIG_SUNRPC=y # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set @@ -942,8 +958,10 @@ CONFIG_ZLIB_INFLATE=m # # Kernel hacking # +# CONFIG_PRINTK_TIME is not set CONFIG_DEBUG_KERNEL=y # CONFIG_MAGIC_SYSRQ is not set +CONFIG_LOG_BUF_SHIFT=14 # CONFIG_SCHEDSTATS is not set # CONFIG_DEBUG_SLAB is not set # CONFIG_DEBUG_SPINLOCK is not set diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile index 1fb92f16acd..0bb23fce429 100644 --- a/arch/ppc/kernel/Makefile +++ b/arch/ppc/kernel/Makefile @@ -1,6 +1,7 @@ # # Makefile for the linux kernel. # +ifneq ($(CONFIG_PPC_MERGE),y) extra-$(CONFIG_PPC_STD_MMU) := head.o extra-$(CONFIG_40x) := head_4xx.o @@ -9,24 +10,22 @@ extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o extra-$(CONFIG_8xx) := head_8xx.o extra-$(CONFIG_6xx) += idle_6xx.o extra-$(CONFIG_POWER4) += idle_power4.o -extra-$(CONFIG_PPC_FPU) += fpu.o extra-y += vmlinux.lds -obj-y := entry.o traps.o irq.o idle.o time.o misc.o \ - process.o signal.o ptrace.o align.o \ - semaphore.o syscalls.o setup.o \ - cputable.o ppc_htab.o +obj-y := entry.o traps.o idle.o time.o misc.o \ + process.o \ + setup.o \ + ppc_htab.o obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o -obj-$(CONFIG_E500) += perfmon.o obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o obj-$(CONFIG_POWER4) += cpu_setup_power4.o obj-$(CONFIG_MODULES) += module.o ppc_ksyms.o obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-mapping.o obj-$(CONFIG_PCI) += pci.o +obj-$(CONFIG_RAPIDIO) += rio.o obj-$(CONFIG_KGDB) += ppc-stub.o obj-$(CONFIG_SMP) += smp.o smp-tbsync.o obj-$(CONFIG_TAU) += temp.o -obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o ifndef CONFIG_E200 obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o endif @@ -36,3 +35,19 @@ ifndef CONFIG_MATH_EMULATION obj-$(CONFIG_8xx) += softemu8xx.o endif +# These are here while we do the architecture merge + +else +obj-y := idle.o +obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o +obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o +obj-$(CONFIG_MODULES) += module.o +obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-mapping.o +obj-$(CONFIG_PCI) += pci.o +obj-$(CONFIG_KGDB) += ppc-stub.o +obj-$(CONFIG_TAU) += temp.o +ifndef CONFIG_E200 +obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o +endif +obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o +endif diff --git a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c deleted file mode 100644 index ff81da9598d..00000000000 --- a/arch/ppc/kernel/align.c +++ /dev/null @@ -1,410 +0,0 @@ -/* - * align.c - handle alignment exceptions for the Power PC. - * - * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au> - * Copyright (c) 1998-1999 TiVo, Inc. - * PowerPC 403GCX modifications. - * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu> - * PowerPC 403GCX/405GP modifications. - */ -#include <linux/config.h> -#include <linux/kernel.h> -#include <linux/mm.h> -#include <asm/ptrace.h> -#include <asm/processor.h> -#include <asm/uaccess.h> -#include <asm/system.h> -#include <asm/cache.h> - -struct aligninfo { - unsigned char len; - unsigned char flags; -}; - -#if defined(CONFIG_4xx) || defined(CONFIG_POWER4) || defined(CONFIG_BOOKE) -#define OPCD(inst) (((inst) & 0xFC000000) >> 26) -#define RS(inst) (((inst) & 0x03E00000) >> 21) -#define RA(inst) (((inst) & 0x001F0000) >> 16) -#define IS_XFORM(code) ((code) == 31) -#endif - -#define INVALID { 0, 0 } - -#define LD 1 /* load */ -#define ST 2 /* store */ -#define SE 4 /* sign-extend value */ -#define F 8 /* to/from fp regs */ -#define U 0x10 /* update index register */ -#define M 0x20 /* multiple load/store */ -#define S 0x40 /* single-precision fp, or byte-swap value */ -#define SX 0x40 /* byte count in XER */ -#define HARD 0x80 /* string, stwcx. */ - -#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */ - -/* - * The PowerPC stores certain bits of the instruction that caused the - * alignment exception in the DSISR register. This array maps those - * bits to information about the operand length and what the - * instruction would do. - */ -static struct aligninfo aligninfo[128] = { - { 4, LD }, /* 00 0 0000: lwz / lwarx */ - INVALID, /* 00 0 0001 */ - { 4, ST }, /* 00 0 0010: stw */ - INVALID, /* 00 0 0011 */ - { 2, LD }, /* 00 0 0100: lhz */ - { 2, LD+SE }, /* 00 0 0101: lha */ - { 2, ST }, /* 00 0 0110: sth */ - { 4, LD+M }, /* 00 0 0111: lmw */ - { 4, LD+F+S }, /* 00 0 1000: lfs */ - { 8, LD+F }, /* 00 0 1001: lfd */ - { 4, ST+F+S }, /* 00 0 1010: stfs */ - { 8, ST+F }, /* 00 0 1011: stfd */ - INVALID, /* 00 0 1100 */ - INVALID, /* 00 0 1101: ld/ldu/lwa */ - INVALID, /* 00 0 1110 */ - INVALID, /* 00 0 1111: std/stdu */ - { 4, LD+U }, /* 00 1 0000: lwzu */ - INVALID, /* 00 1 0001 */ - { 4, ST+U }, /* 00 1 0010: stwu */ - INVALID, /* 00 1 0011 */ - { 2, LD+U }, /* 00 1 0100: lhzu */ - { 2, LD+SE+U }, /* 00 1 0101: lhau */ - { 2, ST+U }, /* 00 1 0110: sthu */ - { 4, ST+M }, /* 00 1 0111: stmw */ - { 4, LD+F+S+U }, /* 00 1 1000: lfsu */ - { 8, LD+F+U }, /* 00 1 1001: lfdu */ - { 4, ST+F+S+U }, /* 00 1 1010: stfsu */ - { 8, ST+F+U }, /* 00 1 1011: stfdu */ - INVALID, /* 00 1 1100 */ - INVALID, /* 00 1 1101 */ - INVALID, /* 00 1 1110 */ - INVALID, /* 00 1 1111 */ - INVALID, /* 01 0 0000: ldx */ - INVALID, /* 01 0 0001 */ - INVALID, /* 01 0 0010: stdx */ - INVALID, /* 01 0 0011 */ - INVALID, /* 01 0 0100 */ - INVALID, /* 01 0 0101: lwax */ - INVALID, /* 01 0 0110 */ - INVALID, /* 01 0 0111 */ - { 4, LD+M+HARD+SX }, /* 01 0 1000: lswx */ - { 4, LD+M+HARD }, /* 01 0 1001: lswi */ - { 4, ST+M+HARD+SX }, /* 01 0 1010: stswx */ - { 4, ST+M+HARD }, /* 01 0 1011: stswi */ - INVALID, /* 01 0 1100 */ - INVALID, /* 01 0 1101 */ - INVALID, /* 01 0 1110 */ - INVALID, /* 01 0 1111 */ - INVALID, /* 01 1 0000: ldux */ - INVALID, /* 01 1 0001 */ - INVALID, /* 01 1 0010: stdux */ - INVALID, /* 01 1 0011 */ - INVALID, /* 01 1 0100 */ - INVALID, /* 01 1 0101: lwaux */ - INVALID, /* 01 1 0110 */ - INVALID, /* 01 1 0111 */ - INVALID, /* 01 1 1000 */ - INVALID, /* 01 1 1001 */ - INVALID, /* 01 1 1010 */ - INVALID, /* 01 1 1011 */ - INVALID, /* 01 1 1100 */ - INVALID, /* 01 1 1101 */ - INVALID, /* 01 1 1110 */ - INVALID, /* 01 1 1111 */ - INVALID, /* 10 0 0000 */ - INVALID, /* 10 0 0001 */ - { 0, ST+HARD }, /* 10 0 0010: stwcx. */ - INVALID, /* 10 0 0011 */ - INVALID, /* 10 0 0100 */ - INVALID, /* 10 0 0101 */ - INVALID, /* 10 0 0110 */ - INVALID, /* 10 0 0111 */ - { 4, LD+S }, /* 10 0 1000: lwbrx */ - INVALID, /* 10 0 1001 */ - { 4, ST+S }, /* 10 0 1010: stwbrx */ - INVALID, /* 10 0 1011 */ - { 2, LD+S }, /* 10 0 1100: lhbrx */ - INVALID, /* 10 0 1101 */ - { 2, ST+S }, /* 10 0 1110: sthbrx */ - INVALID, /* 10 0 1111 */ - INVALID, /* 10 1 0000 */ - INVALID, /* 10 1 0001 */ - INVALID, /* 10 1 0010 */ - INVALID, /* 10 1 0011 */ - INVALID, /* 10 1 0100 */ - INVALID, /* 10 1 0101 */ - INVALID, /* 10 1 0110 */ - INVALID, /* 10 1 0111 */ - INVALID, /* 10 1 1000 */ - INVALID, /* 10 1 1001 */ - INVALID, /* 10 1 1010 */ - INVALID, /* 10 1 1011 */ - INVALID, /* 10 1 1100 */ - INVALID, /* 10 1 1101 */ - INVALID, /* 10 1 1110 */ - { 0, ST+HARD }, /* 10 1 1111: dcbz */ - { 4, LD }, /* 11 0 0000: lwzx */ - INVALID, /* 11 0 0001 */ - { 4, ST }, /* 11 0 0010: stwx */ - INVALID, /* 11 0 0011 */ - { 2, LD }, /* 11 0 0100: lhzx */ - { 2, LD+SE }, /* 11 0 0101: lhax */ - { 2, ST }, /* 11 0 0110: sthx */ - INVALID, /* 11 0 0111 */ - { 4, LD+F+S }, /* 11 0 1000: lfsx */ - { 8, LD+F }, /* 11 0 1001: lfdx */ - { 4, ST+F+S }, /* 11 0 1010: stfsx */ - { 8, ST+F }, /* 11 0 1011: stfdx */ - INVALID, /* 11 0 1100 */ - INVALID, /* 11 0 1101: lmd */ - INVALID, /* 11 0 1110 */ - INVALID, /* 11 0 1111: stmd */ - { 4, LD+U }, /* 11 1 0000: lwzux */ - INVALID, /* 11 1 0001 */ - { 4, ST+U }, /* 11 1 0010: stwux */ - INVALID, /* 11 1 0011 */ - { 2, LD+U }, /* 11 1 0100: lhzux */ - { 2, LD+SE+U }, /* 11 1 0101: lhaux */ - { 2, ST+U }, /* 11 1 0110: sthux */ - INVALID, /* 11 1 0111 */ - { 4, LD+F+S+U }, /* 11 1 1000: lfsux */ - { 8, LD+F+U }, /* 11 1 1001: lfdux */ - { 4, ST+F+S+U }, /* 11 1 1010: stfsux */ - { 8, ST+F+U }, /* 11 1 1011: stfdux */ - INVALID, /* 11 1 1100 */ - INVALID, /* 11 1 1101 */ - INVALID, /* 11 1 1110 */ - INVALID, /* 11 1 1111 */ -}; - -#define SWAP(a, b) (t = (a), (a) = (b), (b) = t) - -int -fix_alignment(struct pt_regs *regs) -{ - int instr, nb, flags; -#if defined(CONFIG_4xx) || defined(CONFIG_POWER4) || defined(CONFIG_BOOKE) - int opcode, f1, f2, f3; -#endif - int i, t; - int reg, areg; - int offset, nb0; - unsigned char __user *addr; - unsigned char *rptr; - union { - long l; - float f; - double d; - unsigned char v[8]; - } data; - - CHECK_FULL_REGS(regs); - -#if defined(CONFIG_4xx) || defined(CONFIG_POWER4) || defined(CONFIG_BOOKE) - /* The 4xx-family & Book-E processors have no DSISR register, - * so we emulate it. - * The POWER4 has a DSISR register but doesn't set it on - * an alignment fault. -- paulus - */ - - if (__get_user(instr, (unsigned int __user *) regs->nip)) - return 0; - opcode = OPCD(instr); - reg = RS(instr); - areg = RA(instr); - - if (!IS_XFORM(opcode)) { - f1 = 0; - f2 = (instr & 0x04000000) >> 26; - f3 = (instr & 0x78000000) >> 27; - } else { - f1 = (instr & 0x00000006) >> 1; - f2 = (instr & 0x00000040) >> 6; - f3 = (instr & 0x00000780) >> 7; - } - - instr = ((f1 << 5) | (f2 << 4) | f3); -#else - reg = (regs->dsisr >> 5) & 0x1f; /* source/dest register */ - areg = regs->dsisr & 0x1f; /* register to update */ - instr = (regs->dsisr >> 10) & 0x7f; -#endif - - nb = aligninfo[instr].len; - if (nb == 0) { - long __user *p; - int i; - - if (instr != DCBZ) - return 0; /* too hard or invalid instruction */ - /* - * The dcbz (data cache block zero) instruction - * gives an alignment fault if used on non-cacheable - * memory. We handle the fault mainly for the - * case when we are running with the cache disabled - * for debugging. - */ - p = (long __user *) (regs->dar & -L1_CACHE_BYTES); - if (user_mode(regs) - && !access_ok(VERIFY_WRITE, p, L1_CACHE_BYTES)) - return -EFAULT; - for (i = 0; i < L1_CACHE_BYTES / sizeof(long); ++i) - if (__put_user(0, p+i)) - return -EFAULT; - return 1; - } - - flags = aligninfo[instr].flags; - if ((flags & (LD|ST)) == 0) - return 0; - - /* For the 4xx-family & Book-E processors, the 'dar' field of the - * pt_regs structure is overloaded and is really from the DEAR. - */ - - addr = (unsigned char __user *)regs->dar; - - if (flags & M) { - /* lmw, stmw, lswi/x, stswi/x */ - nb0 = 0; - if (flags & HARD) { - if (flags & SX) { - nb = regs->xer & 127; - if (nb == 0) - return 1; - } else { - if (__get_user(instr, - (unsigned int __user *)regs->nip)) - return 0; - nb = (instr >> 11) & 0x1f; - if (nb == 0) - nb = 32; - } - if (nb + reg * 4 > 128) { - nb0 = nb + reg * 4 - 128; - nb = 128 - reg * 4; - } - } else { - /* lwm, stmw */ - nb = (32 - reg) * 4; - } - - if (!access_ok((flags & ST? VERIFY_WRITE: VERIFY_READ), addr, nb+nb0)) - return -EFAULT; /* bad address */ - - rptr = (unsigned char *) ®s->gpr[reg]; - if (flags & LD) { - for (i = 0; i < nb; ++i) - if (__get_user(rptr[i], addr+i)) - return -EFAULT; - if (nb0 > 0) { - rptr = (unsigned char *) ®s->gpr[0]; - addr += nb; - for (i = 0; i < nb0; ++i) - if (__get_user(rptr[i], addr+i)) - return -EFAULT; - } - for (; (i & 3) != 0; ++i) - rptr[i] = 0; - } else { - for (i = 0; i < nb; ++i) - if (__put_user(rptr[i], addr+i)) - return -EFAULT; - if (nb0 > 0) { - rptr = (unsigned char *) ®s->gpr[0]; - addr += nb; - for (i = 0; i < nb0; ++i) - if (__put_user(rptr[i], addr+i)) - return -EFAULT; - } - } - return 1; - } - - offset = 0; - if (nb < 4) { - /* read/write the least significant bits */ - data.l = 0; - offset = 4 - nb; - } - - /* Verify the address of the operand */ - if (user_mode(regs)) { - if (!access_ok((flags & ST? VERIFY_WRITE: VERIFY_READ), addr, nb)) - return -EFAULT; /* bad address */ - } - - if (flags & F) { - preempt_disable(); - if (regs->msr & MSR_FP) - giveup_fpu(current); - preempt_enable(); - } - - /* If we read the operand, copy it in, else get register values */ - if (flags & LD) { - for (i = 0; i < nb; ++i) - if (__get_user(data.v[offset+i], addr+i)) - return -EFAULT; - } else if (flags & F) { - data.d = current->thread.fpr[reg]; - } else { - data.l = regs->gpr[reg]; - } - - switch (flags & ~U) { - case LD+SE: /* sign extend */ - if (data.v[2] >= 0x80) - data.v[0] = data.v[1] = -1; - break; - - case LD+S: /* byte-swap */ - case ST+S: - if (nb == 2) { - SWAP(data.v[2], data.v[3]); - } else { - SWAP(data.v[0], data.v[3]); - SWAP(data.v[1], data.v[2]); - } - break; - - /* Single-precision FP load and store require conversions... */ - case LD+F+S: -#ifdef CONFIG_PPC_FPU - preempt_disable(); - enable_kernel_fp(); - cvt_fd(&data.f, &data.d, ¤t->thread.fpscr); - preempt_enable(); -#else - return 0; -#endif - break; - case ST+F+S: -#ifdef CONFIG_PPC_FPU - preempt_disable(); - enable_kernel_fp(); - cvt_df(&data.d, &data.f, ¤t->thread.fpscr); - preempt_enable(); -#else - return 0; -#endif - break; - } - - if (flags & ST) { - for (i = 0; i < nb; ++i) - if (__put_user(data.v[offset+i], addr+i)) - return -EFAULT; - } else if (flags & F) { - current->thread.fpr[reg] = data.d; - } else { - regs->gpr[reg] = data.l; - } - - if (flags & U) - regs->gpr[areg] = regs->dar; - - return 1; -} diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c index d9ad1d776d0..fe0e767fb94 100644 --- a/arch/ppc/kernel/asm-offsets.c +++ b/arch/ppc/kernel/asm-offsets.c @@ -25,6 +25,7 @@ #include <asm/processor.h> #include <asm/cputable.h> #include <asm/thread_info.h> +#include <asm/vdso_datapage.h> #define DEFINE(sym, val) \ asm volatile("\n->" #sym " %0 " #val : : "i" (val)) @@ -130,10 +131,10 @@ main(void) DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); + DEFINE(TI_SC_NOERR, offsetof(struct thread_info, syscall_noerror)); DEFINE(TI_TASK, offsetof(struct thread_info, task)); DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain)); DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); - DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags)); DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); @@ -141,6 +142,34 @@ main(void) DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); DEFINE(pbe_next, offsetof(struct pbe, next)); + DEFINE(TASK_SIZE, TASK_SIZE); DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28); + + /* datapage offsets for use by vdso */ + DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp)); + DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec)); + DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs)); + DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec)); + DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count)); + DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest)); + DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime)); + DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32)); + DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec)); + DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec)); + DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec)); + DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec)); + DEFINE(TSPEC32_TV_SEC, offsetof(struct timespec, tv_sec)); + DEFINE(TSPEC32_TV_NSEC, offsetof(struct timespec, tv_nsec)); + + /* timeval/timezone offsets for use by vdso */ + DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest)); + DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime)); + + /* Other bits used by the vdso */ + DEFINE(CLOCK_REALTIME, CLOCK_REALTIME); + DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC); + DEFINE(NSEC_PER_SEC, NSEC_PER_SEC); + DEFINE(CLOCK_REALTIME_RES, TICK_NSEC); + return 0; } diff --git a/arch/ppc/kernel/bitops.c b/arch/ppc/kernel/bitops.c deleted file mode 100644 index 7f53d193968..00000000000 --- a/arch/ppc/kernel/bitops.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright (C) 1996 Paul Mackerras. - */ - -#include <linux/kernel.h> -#include <linux/bitops.h> - -/* - * If the bitops are not inlined in bitops.h, they are defined here. - * -- paulus - */ -#if !__INLINE_BITOPS -void set_bit(int nr, volatile void * addr) -{ - unsigned long old; - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%3 \n\ - or %0,%0,%2 \n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc" ); -} - -void clear_bit(int nr, volatile void *addr) -{ - unsigned long old; - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%3 \n\ - andc %0,%0,%2 \n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); -} - -void change_bit(int nr, volatile void *addr) -{ - unsigned long old; - unsigned long mask = 1 << (nr & 0x1f); - unsigned long *p = ((unsigned long *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%3 \n\ - xor %0,%0,%2 \n" - PPC405_ERR77(0,%3) -" stwcx. %0,0,%3 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); -} - -int test_and_set_bit(int nr, volatile void *addr) -{ - unsigned int old, t; - unsigned int mask = 1 << (nr & 0x1f); - volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%4 \n\ - or %1,%0,%3 \n" - PPC405_ERR77(0,%4) -" stwcx. %1,0,%4 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=&r" (t), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); - - return (old & mask) != 0; -} - -int test_and_clear_bit(int nr, volatile void *addr) -{ - unsigned int old, t; - unsigned int mask = 1 << (nr & 0x1f); - volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%4 \n\ - andc %1,%0,%3 \n" - PPC405_ERR77(0,%4) -" stwcx. %1,0,%4 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=&r" (t), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); - - return (old & mask) != 0; -} - -int test_and_change_bit(int nr, volatile void *addr) -{ - unsigned int old, t; - unsigned int mask = 1 << (nr & 0x1f); - volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5); - - __asm__ __volatile__(SMP_WMB "\n\ -1: lwarx %0,0,%4 \n\ - xor %1,%0,%3 \n" - PPC405_ERR77(0,%4) -" stwcx. %1,0,%4 \n\ - bne 1b" - SMP_MB - : "=&r" (old), "=&r" (t), "=m" (*p) - : "r" (mask), "r" (p), "m" (*p) - : "cc"); - - return (old & mask) != 0; -} -#endif /* !__INLINE_BITOPS */ diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S index ba396438ede..55ed7716636 100644 --- a/arch/ppc/kernel/cpu_setup_6xx.S +++ b/arch/ppc/kernel/cpu_setup_6xx.S @@ -17,8 +17,6 @@ #include <asm/asm-offsets.h> #include <asm/cache.h> -_GLOBAL(__setup_cpu_601) - blr _GLOBAL(__setup_cpu_603) b setup_common_caches _GLOBAL(__setup_cpu_604) @@ -292,10 +290,10 @@ _GLOBAL(__init_fpu_registers) #define CS_SIZE 32 .data - .balign L1_CACHE_LINE_SIZE + .balign L1_CACHE_BYTES cpu_state_storage: .space CS_SIZE - .balign L1_CACHE_LINE_SIZE,0 + .balign L1_CACHE_BYTES,0 .text /* Called in normal context to backup CPU 0 state. This diff --git a/arch/ppc/kernel/cpu_setup_power4.S b/arch/ppc/kernel/cpu_setup_power4.S index 7e4fbb65372..d7bfd60e21f 100644 --- a/arch/ppc/kernel/cpu_setup_power4.S +++ b/arch/ppc/kernel/cpu_setup_power4.S @@ -63,8 +63,6 @@ _GLOBAL(__970_cpu_preinit) isync blr -_GLOBAL(__setup_cpu_power4) - blr _GLOBAL(__setup_cpu_ppc970) mfspr r0,SPRN_HID0 li r11,5 /* clear DOZE and SLEEP */ @@ -88,10 +86,10 @@ _GLOBAL(__setup_cpu_ppc970) #define CS_SIZE 32 .data - .balign L1_CACHE_LINE_SIZE + .balign L1_CACHE_BYTES cpu_state_storage: .space CS_SIZE - .balign L1_CACHE_LINE_SIZE,0 + .balign L1_CACHE_BYTES,0 .text /* Called in normal context to backup CPU 0 state. This diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c deleted file mode 100644 index 546e1ea4caf..00000000000 --- a/arch/ppc/kernel/cputable.c +++ /dev/null @@ -1,1040 +0,0 @@ -/* - * arch/ppc/kernel/cputable.c - * - * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/config.h> -#include <linux/string.h> -#include <linux/sched.h> -#include <linux/threads.h> -#include <linux/init.h> -#include <asm/cputable.h> - -struct cpu_spec* cur_cpu_spec[NR_CPUS]; - -extern void __setup_cpu_601(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_603(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_604(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_750(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_750cx(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_750fx(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_7400(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_7410(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_745x(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_power3(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_power4(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_ppc970(unsigned long offset, int cpu_nr, struct cpu_spec* spec); -extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spec* spec); - -#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \ - !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \ - !defined(CONFIG_BOOKE)) - -/* This table only contains "desktop" CPUs, it need to be filled with embedded - * ones as well... - */ -#define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ - PPC_FEATURE_HAS_MMU) - -/* We only set the altivec features if the kernel was compiled with altivec - * support - */ -#ifdef CONFIG_ALTIVEC -#define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC -#define PPC_FEATURE_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC -#else -#define CPU_FTR_ALTIVEC_COMP 0 -#define PPC_FEATURE_ALTIVEC_COMP 0 -#endif - -/* We only set the spe features if the kernel was compiled with - * spe support - */ -#ifdef CONFIG_SPE -#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE -#else -#define PPC_FEATURE_SPE_COMP 0 -#endif - -/* We need to mark all pages as being coherent if we're SMP or we - * have a 74[45]x and an MPC107 host bridge. - */ -#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) -#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT -#else -#define CPU_FTR_COMMON 0 -#endif - -/* The powersave features NAP & DOZE seems to confuse BDI when - debugging. So if a BDI is used, disable theses - */ -#ifndef CONFIG_BDI_SWITCH -#define CPU_FTR_MAYBE_CAN_DOZE CPU_FTR_CAN_DOZE -#define CPU_FTR_MAYBE_CAN_NAP CPU_FTR_CAN_NAP -#else -#define CPU_FTR_MAYBE_CAN_DOZE 0 -#define CPU_FTR_MAYBE_CAN_NAP 0 -#endif - -struct cpu_spec cpu_specs[] = { -#if CLASSIC_PPC - { /* 601 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00010000, - .cpu_name = "601", - .cpu_features = CPU_FTR_COMMON | CPU_FTR_601 | - CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR | - PPC_FEATURE_UNIFIED_CACHE, - .icache_bsize = 32, - .dcache_bsize = 32, - .cpu_setup = __setup_cpu_601 - }, - { /* 603 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00030000, - .cpu_name = "603", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .cpu_setup = __setup_cpu_603 - }, - { /* 603e */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00060000, - .cpu_name = "603e", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .cpu_setup = __setup_cpu_603 - }, - { /* 603ev */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00070000, - .cpu_name = "603ev", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .cpu_setup = __setup_cpu_603 - }, - { /* 604 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00040000, - .cpu_name = "604", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 2, - .cpu_setup = __setup_cpu_604 - }, - { /* 604e */ - .pvr_mask = 0xfffff000, - .pvr_value = 0x00090000, - .cpu_name = "604e", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_604 - }, - { /* 604r */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00090000, - .cpu_name = "604r", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_604 - }, - { /* 604ev */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x000a0000, - .cpu_name = "604ev", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_604 - }, - { /* 740/750 (0x4202, don't support TAU ?) */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x00084202, - .cpu_name = "740/750", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_HPTE_TABLE | - CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750 - }, - { /* 750CX (80100 and 8010x?) */ - .pvr_mask = 0xfffffff0, - .pvr_value = 0x00080100, - .cpu_name = "750CX", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750cx - }, - { /* 750CX (82201 and 82202) */ - .pvr_mask = 0xfffffff0, - .pvr_value = 0x00082200, - .cpu_name = "750CX", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750cx - }, - { /* 750CXe (82214) */ - .pvr_mask = 0xfffffff0, - .pvr_value = 0x00082210, - .cpu_name = "750CXe", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750cx - }, - { /* 750CXe "Gekko" (83214) */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x00083214, - .cpu_name = "750CXe", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750cx - }, - { /* 745/755 */ - .pvr_mask = 0xfffff000, - .pvr_value = 0x00083000, - .cpu_name = "745/755", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750 - }, - { /* 750FX rev 1.x */ - .pvr_mask = 0xffffff00, - .pvr_value = 0x70000100, - .cpu_name = "750FX", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | - CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750 - }, - { /* 750FX rev 2.0 must disable HID0[DPM] */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x70000200, - .cpu_name = "750FX", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | - CPU_FTR_NO_DPM, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750 - }, - { /* 750FX (All revs except 2.0) */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x70000000, - .cpu_name = "750FX", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | - CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750fx - }, - { /* 750GX */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x70020000, - .cpu_name = "750GX", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | - CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_DUAL_PLL_750FX | - CPU_FTR_HAS_HIGH_BATS, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750fx - }, - { /* 740/750 (L2CR bit need fixup for 740) */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00080000, - .cpu_name = "740/750", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_750 - }, - { /* 7400 rev 1.1 ? (no TAU) */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x000c1101, - .cpu_name = "7400 (1.1)", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | - CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_7400 - }, - { /* 7400 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x000c0000, - .cpu_name = "7400", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | - CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_7400 - }, - { /* 7410 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x800c0000, - .cpu_name = "7410", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | - CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - .cpu_setup = __setup_cpu_7410 - }, - { /* 7450 2.0 - no doze/nap */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x80000200, - .cpu_name = "7450", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_NEED_COHERENT, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7450 2.1 */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x80000201, - .cpu_name = "7450", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | - CPU_FTR_NEED_COHERENT, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7450 2.3 and newer */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x80000000, - .cpu_name = "7450", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7455 rev 1.x */ - .pvr_mask = 0xffffff00, - .pvr_value = 0x80010100, - .cpu_name = "7455", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7455 rev 2.0 */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x80010200, - .cpu_name = "7455", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | - CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7455 others */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x80010000, - .cpu_name = "7455", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | - CPU_FTR_NEED_COHERENT, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7447/7457 Rev 1.0 */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x80020100, - .cpu_name = "7447/7457", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | - CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7447/7457 Rev 1.1 */ - .pvr_mask = 0xffffffff, - .pvr_value = 0x80020101, - .cpu_name = "7447/7457", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | - CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7447/7457 Rev 1.2 and later */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x80020000, - .cpu_name = "7447/7457", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | - CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | - CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | - CPU_FTR_NEED_COHERENT, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7447A */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x80030000, - .cpu_name = "7447A", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | - CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | - CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 7448 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x80040000, - .cpu_name = "7448", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | - CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR | - CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 6, - .cpu_setup = __setup_cpu_745x - }, - { /* 82xx (8240, 8245, 8260 are all 603e cores) */ - .pvr_mask = 0x7fff0000, - .pvr_value = 0x00810000, - .cpu_name = "82xx", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | - CPU_FTR_USE_TB, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .cpu_setup = __setup_cpu_603 - }, - { /* All G2_LE (603e core, plus some) have the same pvr */ - .pvr_mask = 0x7fff0000, - .pvr_value = 0x00820000, - .cpu_name = "G2_LE", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .cpu_setup = __setup_cpu_603 - }, - { /* e300 (a 603e core, plus some) on 83xx */ - .pvr_mask = 0x7fff0000, - .pvr_value = 0x00830000, - .cpu_name = "e300", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | - CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .cpu_setup = __setup_cpu_603 - }, - { /* default match, we assume split I/D cache & TB (non-601)... */ - .pvr_mask = 0x00000000, - .pvr_value = 0x00000000, - .cpu_name = "(generic PPC)", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC, - .icache_bsize = 32, - .dcache_bsize = 32, - .cpu_setup = __setup_cpu_generic - }, -#endif /* CLASSIC_PPC */ -#ifdef CONFIG_PPC64BRIDGE - { /* Power3 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00400000, - .cpu_name = "Power3 (630)", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, - .icache_bsize = 128, - .dcache_bsize = 128, - .num_pmcs = 8, - .cpu_setup = __setup_cpu_power3 - }, - { /* Power3+ */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00410000, - .cpu_name = "Power3 (630+)", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, - .icache_bsize = 128, - .dcache_bsize = 128, - .num_pmcs = 8, - .cpu_setup = __setup_cpu_power3 - }, - { /* I-star */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00360000, - .cpu_name = "I-star", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, - .icache_bsize = 128, - .dcache_bsize = 128, - .num_pmcs = 8, - .cpu_setup = __setup_cpu_power3 - }, - { /* S-star */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00370000, - .cpu_name = "S-star", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, - .icache_bsize = 128, - .dcache_bsize = 128, - .num_pmcs = 8, - .cpu_setup = __setup_cpu_power3 - }, -#endif /* CONFIG_PPC64BRIDGE */ -#ifdef CONFIG_POWER4 - { /* Power4 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00350000, - .cpu_name = "Power4", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_HPTE_TABLE, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, - .icache_bsize = 128, - .dcache_bsize = 128, - .num_pmcs = 8, - .cpu_setup = __setup_cpu_power4 - }, - { /* PPC970 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00390000, - .cpu_name = "PPC970", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_HPTE_TABLE | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | - PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 128, - .dcache_bsize = 128, - .num_pmcs = 8, - .cpu_setup = __setup_cpu_ppc970 - }, - { /* PPC970FX */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x003c0000, - .cpu_name = "PPC970FX", - .cpu_features = CPU_FTR_COMMON | - CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | - CPU_FTR_HPTE_TABLE | - CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP, - .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | - PPC_FEATURE_ALTIVEC_COMP, - .icache_bsize = 128, - .dcache_bsize = 128, - .num_pmcs = 8, - .cpu_setup = __setup_cpu_ppc970 - }, -#endif /* CONFIG_POWER4 */ -#ifdef CONFIG_8xx - { /* 8xx */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00500000, - .cpu_name = "8xx", - /* CPU_FTR_MAYBE_CAN_DOZE is possible, - * if the 8xx code is there.... */ - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 16, - .dcache_bsize = 16, - }, -#endif /* CONFIG_8xx */ -#ifdef CONFIG_40x - { /* 403GC */ - .pvr_mask = 0xffffff00, - .pvr_value = 0x00200200, - .cpu_name = "403GC", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 16, - .dcache_bsize = 16, - }, - { /* 403GCX */ - .pvr_mask = 0xffffff00, - .pvr_value = 0x00201400, - .cpu_name = "403GCX", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 16, - .dcache_bsize = 16, - }, - { /* 403G ?? */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x00200000, - .cpu_name = "403G ??", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 16, - .dcache_bsize = 16, - }, - { /* 405GP */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x40110000, - .cpu_name = "405GP", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* STB 03xxx */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x40130000, - .cpu_name = "STB03xxx", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* STB 04xxx */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x41810000, - .cpu_name = "STB04xxx", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* NP405L */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x41610000, - .cpu_name = "NP405L", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* NP4GS3 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x40B10000, - .cpu_name = "NP4GS3", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* NP405H */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x41410000, - .cpu_name = "NP405H", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 405GPr */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x50910000, - .cpu_name = "405GPr", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* STBx25xx */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x51510000, - .cpu_name = "STBx25xx", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 405LP */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x41F10000, - .cpu_name = "405LP", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* Xilinx Virtex-II Pro */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x20010000, - .cpu_name = "Virtex-II Pro", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 405EP */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x51210000, - .cpu_name = "405EP", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - -#endif /* CONFIG_40x */ -#ifdef CONFIG_44x - { - .pvr_mask = 0xf0000fff, - .pvr_value = 0x40000850, - .cpu_name = "440EP Rev. A", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { - .pvr_mask = 0xf0000fff, - .pvr_value = 0x400008d3, - .cpu_name = "440EP Rev. B", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 440GP Rev. B */ - .pvr_mask = 0xf0000fff, - .pvr_value = 0x40000440, - .cpu_name = "440GP Rev. B", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 440GP Rev. C */ - .pvr_mask = 0xf0000fff, - .pvr_value = 0x40000481, - .cpu_name = "440GP Rev. C", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 440GX Rev. A */ - .pvr_mask = 0xf0000fff, - .pvr_value = 0x50000850, - .cpu_name = "440GX Rev. A", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 440GX Rev. B */ - .pvr_mask = 0xf0000fff, - .pvr_value = 0x50000851, - .cpu_name = "440GX Rev. B", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 440GX Rev. C */ - .pvr_mask = 0xf0000fff, - .pvr_value = 0x50000892, - .cpu_name = "440GX Rev. C", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 440GX Rev. F */ - .pvr_mask = 0xf0000fff, - .pvr_value = 0x50000894, - .cpu_name = "440GX Rev. F", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 32, - .dcache_bsize = 32, - }, - { /* 440SP Rev. A */ - .pvr_mask = 0xff000fff, - .pvr_value = 0x53000891, - .cpu_name = "440SP Rev. A", - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, - .icache_bsize = 32, - .dcache_bsize = 32, - }, -#endif /* CONFIG_44x */ -#ifdef CONFIG_FSL_BOOKE - { /* e200z5 */ - .pvr_mask = 0xfff00000, - .pvr_value = 0x81000000, - .cpu_name = "e200z5", - /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ - .cpu_features = CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE | - PPC_FEATURE_UNIFIED_CACHE, - .dcache_bsize = 32, - }, - { /* e200z6 */ - .pvr_mask = 0xfff00000, - .pvr_value = 0x81100000, - .cpu_name = "e200z6", - /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ - .cpu_features = CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | - PPC_FEATURE_HAS_EFP_SINGLE | - PPC_FEATURE_UNIFIED_CACHE, - .dcache_bsize = 32, - }, - { /* e500 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x80200000, - .cpu_name = "e500", - /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | - PPC_FEATURE_HAS_EFP_SINGLE, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - }, - { /* e500v2 */ - .pvr_mask = 0xffff0000, - .pvr_value = 0x80210000, - .cpu_name = "e500v2", - /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ - .cpu_features = CPU_FTR_SPLIT_ID_CACHE | - CPU_FTR_USE_TB | CPU_FTR_BIG_PHYS, - .cpu_user_features = PPC_FEATURE_32 | - PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | - PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, - .icache_bsize = 32, - .dcache_bsize = 32, - .num_pmcs = 4, - }, -#endif -#if !CLASSIC_PPC - { /* default match */ - .pvr_mask = 0x00000000, - .pvr_value = 0x00000000, - .cpu_name = "(generic PPC)", - .cpu_features = CPU_FTR_COMMON, - .cpu_user_features = PPC_FEATURE_32, - .icache_bsize = 32, - .dcache_bsize = 32, - } -#endif /* !CLASSIC_PPC */ -}; diff --git a/arch/ppc/kernel/dma-mapping.c b/arch/ppc/kernel/dma-mapping.c index b566d982806..685fd0defe2 100644 --- a/arch/ppc/kernel/dma-mapping.c +++ b/arch/ppc/kernel/dma-mapping.c @@ -115,7 +115,7 @@ static struct vm_region consistent_head = { }; static struct vm_region * -vm_region_alloc(struct vm_region *head, size_t size, int gfp) +vm_region_alloc(struct vm_region *head, size_t size, gfp_t gfp) { unsigned long addr = head->vm_start, end = head->vm_end - size; unsigned long flags; @@ -173,7 +173,7 @@ static struct vm_region *vm_region_find(struct vm_region *head, unsigned long ad * virtual and bus address for that space. */ void * -__dma_alloc_coherent(size_t size, dma_addr_t *handle, int gfp) +__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp) { struct page *page; struct vm_region *c; @@ -335,8 +335,6 @@ static int __init dma_alloc_init(void) pte_t *pte; int ret = 0; - spin_lock(&init_mm.page_table_lock); - do { pgd = pgd_offset(&init_mm, CONSISTENT_BASE); pmd = pmd_alloc(&init_mm, pgd, CONSISTENT_BASE); @@ -347,7 +345,7 @@ static int __init dma_alloc_init(void) } WARN_ON(!pmd_none(*pmd)); - pte = pte_alloc_kernel(&init_mm, pmd, CONSISTENT_BASE); + pte = pte_alloc_kernel(pmd, CONSISTENT_BASE); if (!pte) { printk(KERN_ERR "%s: no pte tables\n", __func__); ret = -ENOMEM; @@ -357,8 +355,6 @@ static int __init dma_alloc_init(void) consistent_pte = pte; } while (0); - spin_unlock(&init_mm.page_table_lock); - return ret; } @@ -401,10 +397,10 @@ EXPORT_SYMBOL(__dma_sync); static inline void __dma_sync_page_highmem(struct page *page, unsigned long offset, size_t size, int direction) { - size_t seg_size = min((size_t)PAGE_SIZE, size) - offset; + size_t seg_size = min((size_t)(PAGE_SIZE - offset), size); size_t cur_size = seg_size; unsigned long flags, start, seg_offset = offset; - int nr_segs = PAGE_ALIGN(size + (PAGE_SIZE - offset))/PAGE_SIZE; + int nr_segs = 1 + ((size - seg_size) + PAGE_SIZE - 1)/PAGE_SIZE; int seg_nr = 0; local_irq_save(flags); diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S index 03d4886869f..f044edbb454 100644 --- a/arch/ppc/kernel/entry.S +++ b/arch/ppc/kernel/entry.S @@ -200,9 +200,8 @@ _GLOBAL(DoSyscall) bl do_show_syscall #endif /* SHOW_SYSCALLS */ rlwinm r10,r1,0,0,18 /* current_thread_info() */ - lwz r11,TI_LOCAL_FLAGS(r10) - rlwinm r11,r11,0,~_TIFL_FORCE_NOERROR - stw r11,TI_LOCAL_FLAGS(r10) + li r11,0 + stb r11,TI_SC_NOERR(r10) lwz r11,TI_FLAGS(r10) andi. r11,r11,_TIF_SYSCALL_T_OR_A bne- syscall_dotrace @@ -227,8 +226,8 @@ ret_from_syscall: cmplw 0,r3,r11 rlwinm r12,r1,0,0,18 /* current_thread_info() */ blt+ 30f - lwz r11,TI_LOCAL_FLAGS(r12) - andi. r11,r11,_TIFL_FORCE_NOERROR + lbz r11,TI_SC_NOERR(r12) + cmpwi r11,0 bne 30f neg r3,r3 lwz r10,_CCR(r1) /* Set SO bit in CR */ @@ -633,7 +632,8 @@ sigreturn_exit: rlwinm r12,r1,0,0,18 /* current_thread_info() */ lwz r9,TI_FLAGS(r12) andi. r0,r9,_TIF_SYSCALL_T_OR_A - bnel- do_syscall_trace_leave + beq+ ret_from_except_full + bl do_syscall_trace_leave /* fall through */ .globl ret_from_except_full diff --git a/arch/ppc/kernel/fpu.S b/arch/ppc/kernel/fpu.S deleted file mode 100644 index 665d7d34304..00000000000 --- a/arch/ppc/kernel/fpu.S +++ /dev/null @@ -1,133 +0,0 @@ -/* - * FPU support code, moved here from head.S so that it can be used - * by chips which use other head-whatever.S files. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include <linux/config.h> -#include <asm/processor.h> -#include <asm/page.h> -#include <asm/mmu.h> -#include <asm/pgtable.h> -#include <asm/cputable.h> -#include <asm/cache.h> -#include <asm/thread_info.h> -#include <asm/ppc_asm.h> -#include <asm/asm-offsets.h> - -/* - * This task wants to use the FPU now. - * On UP, disable FP for the task which had the FPU previously, - * and save its floating-point registers in its thread_struct. - * Load up this task's FP registers from its thread_struct, - * enable the FPU for the current task and return to the task. - */ - .globl load_up_fpu -load_up_fpu: - mfmsr r5 - ori r5,r5,MSR_FP -#ifdef CONFIG_PPC64BRIDGE - clrldi r5,r5,1 /* turn off 64-bit mode */ -#endif /* CONFIG_PPC64BRIDGE */ - SYNC - MTMSRD(r5) /* enable use of fpu now */ - isync -/* - * For SMP, we don't do lazy FPU switching because it just gets too - * horrendously complex, especially when a task switches from one CPU - * to another. Instead we call giveup_fpu in switch_to. - */ -#ifndef CONFIG_SMP - tophys(r6,0) /* get __pa constant */ - addis r3,r6,last_task_used_math@ha - lwz r4,last_task_used_math@l(r3) - cmpwi 0,r4,0 - beq 1f - add r4,r4,r6 - addi r4,r4,THREAD /* want last_task_used_math->thread */ - SAVE_32FPRS(0, r4) - mffs fr0 - stfd fr0,THREAD_FPSCR-4(r4) - lwz r5,PT_REGS(r4) - add r5,r5,r6 - lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5) - li r10,MSR_FP|MSR_FE0|MSR_FE1 - andc r4,r4,r10 /* disable FP for previous task */ - stw r4,_MSR-STACK_FRAME_OVERHEAD(r5) -1: -#endif /* CONFIG_SMP */ - /* enable use of FP after return */ - mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */ - lwz r4,THREAD_FPEXC_MODE(r5) - ori r9,r9,MSR_FP /* enable FP for current */ - or r9,r9,r4 - lfd fr0,THREAD_FPSCR-4(r5) - mtfsf 0xff,fr0 - REST_32FPRS(0, r5) -#ifndef CONFIG_SMP - subi r4,r5,THREAD - sub r4,r4,r6 - stw r4,last_task_used_math@l(r3) -#endif /* CONFIG_SMP */ - /* restore registers and return */ - /* we haven't used ctr or xer or lr */ - b fast_exception_return - -/* - * FP unavailable trap from kernel - print a message, but let - * the task use FP in the kernel until it returns to user mode. - */ - .globl KernelFP -KernelFP: - lwz r3,_MSR(r1) - ori r3,r3,MSR_FP - stw r3,_MSR(r1) /* enable use of FP after return */ - lis r3,86f@h - ori r3,r3,86f@l - mr r4,r2 /* current */ - lwz r5,_NIP(r1) - bl printk - b ret_from_except -86: .string "floating point used in kernel (task=%p, pc=%x)\n" - .align 4,0 - -/* - * giveup_fpu(tsk) - * Disable FP for the task given as the argument, - * and save the floating-point registers in its thread_struct. - * Enables the FPU for use in the kernel on return. - */ - .globl giveup_fpu -giveup_fpu: - mfmsr r5 - ori r5,r5,MSR_FP - SYNC_601 - ISYNC_601 - MTMSRD(r5) /* enable use of fpu now */ - SYNC_601 - isync - cmpwi 0,r3,0 - beqlr- /* if no previous owner, done */ - addi r3,r3,THREAD /* want THREAD of task */ - lwz r5,PT_REGS(r3) - cmpwi 0,r5,0 - SAVE_32FPRS(0, r3) - mffs fr0 - stfd fr0,THREAD_FPSCR-4(r3) - beq 1f - lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5) - li r3,MSR_FP|MSR_FE0|MSR_FE1 - andc r4,r4,r3 /* disable FP for previous task */ - stw r4,_MSR-STACK_FRAME_OVERHEAD(r5) -1: -#ifndef CONFIG_SMP - li r5,0 - lis r4,last_task_used_math@ha - stw r5,last_task_used_math@l(r4) -#endif /* CONFIG_SMP */ - blr diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S index 1960fb8c259..c5a890dca9c 100644 --- a/arch/ppc/kernel/head.S +++ b/arch/ppc/kernel/head.S @@ -349,12 +349,12 @@ i##n: \ /* System reset */ /* core99 pmac starts the seconary here by changing the vector, and - putting it back to what it was (UnknownException) when done. */ + putting it back to what it was (unknown_exception) when done. */ #if defined(CONFIG_GEMINI) && defined(CONFIG_SMP) . = 0x100 b __secondary_start_gemini #else - EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD) + EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD) #endif /* Machine check */ @@ -389,7 +389,7 @@ i##n: \ cmpwi cr1,r4,0 bne cr1,1f #endif - EXC_XFER_STD(0x200, MachineCheckException) + EXC_XFER_STD(0x200, machine_check_exception) #ifdef CONFIG_PPC_CHRP 1: b machine_check_in_rtas #endif @@ -456,10 +456,10 @@ Alignment: mfspr r5,SPRN_DSISR stw r5,_DSISR(r11) addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE(0x600, AlignmentException) + EXC_XFER_EE(0x600, alignment_exception) /* Program check exception */ - EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD) + EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD) /* Floating-point unavailable */ . = 0x800 @@ -467,13 +467,13 @@ FPUnavailable: EXCEPTION_PROLOG bne load_up_fpu /* if from user, just load it up */ addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE_LITE(0x800, KernelFP) + EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) /* Decrementer */ EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE) - EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE) - EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE) + EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE) + EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE) /* System call */ . = 0xc00 @@ -482,8 +482,8 @@ SystemCall: EXC_XFER_EE_LITE(0xc00, DoSyscall) /* Single step - not used on 601 */ - EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD) - EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE) + EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD) + EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE) /* * The Altivec unavailable trap is at 0x0f20. Foo. @@ -502,7 +502,7 @@ SystemCall: Trap_0f: EXCEPTION_PROLOG addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE(0xf00, UnknownException) + EXC_XFER_EE(0xf00, unknown_exception) /* * Handle TLB miss for instruction on 603/603e. @@ -702,44 +702,44 @@ DataStoreTLBMiss: rfi #ifndef CONFIG_ALTIVEC -#define AltivecAssistException UnknownException +#define altivec_assist_exception unknown_exception #endif - EXCEPTION(0x1300, Trap_13, InstructionBreakpoint, EXC_XFER_EE) + EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE) EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE) - EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE) #ifdef CONFIG_POWER4 - EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1700, Trap_17, AltivecAssistException, EXC_XFER_EE) + EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1700, Trap_17, altivec_assist_exception, EXC_XFER_EE) EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD) #else /* !CONFIG_POWER4 */ - EXCEPTION(0x1600, Trap_16, AltivecAssistException, EXC_XFER_EE) + EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE) EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD) - EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE) #endif /* CONFIG_POWER4 */ - EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE) EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE) - EXCEPTION(0x2100, Trap_21, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2200, Trap_22, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2300, Trap_23, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2400, Trap_24, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2500, Trap_25, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2600, Trap_26, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2700, Trap_27, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2800, Trap_28, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2900, Trap_29, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2a00, Trap_2a, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2b00, Trap_2b, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2c00, Trap_2c, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2d00, Trap_2d, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2e00, Trap_2e, UnknownException, EXC_XFER_EE) - EXCEPTION(0x2f00, MOLTrampoline, UnknownException, EXC_XFER_EE_LITE) + EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE) .globl mol_trampoline .set mol_trampoline, i0x2f00 @@ -751,7 +751,7 @@ AltiVecUnavailable: #ifdef CONFIG_ALTIVEC bne load_up_altivec /* if from user, just load it up */ #endif /* CONFIG_ALTIVEC */ - EXC_XFER_EE_LITE(0xf20, AltivecUnavailException) + EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception) #ifdef CONFIG_PPC64BRIDGE DataAccess: @@ -767,12 +767,12 @@ DataSegment: addi r3,r1,STACK_FRAME_OVERHEAD mfspr r4,SPRN_DAR stw r4,_DAR(r11) - EXC_XFER_STD(0x380, UnknownException) + EXC_XFER_STD(0x380, unknown_exception) InstructionSegment: EXCEPTION_PROLOG addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_STD(0x480, UnknownException) + EXC_XFER_STD(0x480, unknown_exception) #endif /* CONFIG_PPC64BRIDGE */ #ifdef CONFIG_ALTIVEC @@ -804,7 +804,7 @@ load_up_altivec: beq 1f add r4,r4,r6 addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */ - SAVE_32VR(0,r10,r4) + SAVE_32VRS(0,r10,r4) mfvscr vr0 li r10,THREAD_VSCR stvx vr0,r10,r4 @@ -824,7 +824,7 @@ load_up_altivec: stw r4,THREAD_USED_VR(r5) lvx vr0,r10,r5 mtvscr vr0 - REST_32VR(0,r10,r5) + REST_32VRS(0,r10,r5) #ifndef CONFIG_SMP subi r4,r5,THREAD sub r4,r4,r6 @@ -870,7 +870,7 @@ giveup_altivec: addi r3,r3,THREAD /* want THREAD of task */ lwz r5,PT_REGS(r3) cmpwi 0,r5,0 - SAVE_32VR(0, r4, r3) + SAVE_32VRS(0, r4, r3) mfvscr vr0 li r4,THREAD_VSCR stvx vr0,r4,r3 @@ -916,7 +916,7 @@ relocate_kernel: copy_and_flush: addi r5,r5,-4 addi r6,r6,-4 -4: li r0,L1_CACHE_LINE_SIZE/4 +4: li r0,L1_CACHE_BYTES/4 mtctr r0 3: addi r6,r6,4 /* copy a cache line */ lwzx r0,r6,r4 @@ -1059,7 +1059,6 @@ __secondary_start: lis r3,-KERNELBASE@h mr r4,r24 - bl identify_cpu bl call_setup_cpu /* Call setup_cpu for this CPU */ #ifdef CONFIG_6xx lis r3,-KERNELBASE@h @@ -1109,11 +1108,6 @@ __secondary_start: * Those generic dummy functions are kept for CPUs not * included in CONFIG_6xx */ -_GLOBAL(__setup_cpu_power3) - blr -_GLOBAL(__setup_cpu_generic) - blr - #if !defined(CONFIG_6xx) && !defined(CONFIG_POWER4) _GLOBAL(__save_cpu_setup) blr diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S index 599245b0407..677c571aa27 100644 --- a/arch/ppc/kernel/head_44x.S +++ b/arch/ppc/kernel/head_44x.S @@ -190,8 +190,8 @@ skpinv: addi r4,r4,1 /* Increment */ /* xlat fields */ lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */ -#ifndef CONFIG_440EP - ori r4,r4,0x0001 /* ERPN is 1 for second 4GB page */ +#ifdef UART0_PHYS_ERPN + ori r4,r4,UART0_PHYS_ERPN /* Add ERPN if above 4GB */ #endif /* attrib fields */ @@ -309,13 +309,13 @@ skpinv: addi r4,r4,1 /* Increment */ interrupt_base: /* Critical Input Interrupt */ - CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException) + CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception) /* Machine Check Interrupt */ #ifdef CONFIG_440A - MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException) + MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception) #else - CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) + CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception) #endif /* Data Storage Interrupt */ @@ -442,7 +442,7 @@ interrupt_base: #ifdef CONFIG_PPC_FPU FP_UNAVAILABLE_EXCEPTION #else - EXCEPTION(0x2010, FloatingPointUnavailable, UnknownException, EXC_XFER_EE) + EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE) #endif /* System Call Interrupt */ @@ -451,21 +451,21 @@ interrupt_base: EXC_XFER_EE_LITE(0x0c00, DoSyscall) /* Auxillary Processor Unavailable Interrupt */ - EXCEPTION(0x2020, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE) + EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE) /* Decrementer Interrupt */ DECREMENTER_EXCEPTION /* Fixed Internal Timer Interrupt */ /* TODO: Add FIT support */ - EXCEPTION(0x1010, FixedIntervalTimer, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE) /* Watchdog Timer Interrupt */ /* TODO: Add watchdog support */ #ifdef CONFIG_BOOKE_WDT CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException) #else - CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException) + CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception) #endif /* Data TLB Error Interrupt */ @@ -743,14 +743,18 @@ _GLOBAL(set_context) * goes at the beginning of the data segment, which is page-aligned. */ .data -_GLOBAL(sdata) -_GLOBAL(empty_zero_page) + .align 12 + .globl sdata +sdata: + .globl empty_zero_page +empty_zero_page: .space 4096 /* * To support >32-bit physical addresses, we use an 8KB pgdir. */ -_GLOBAL(swapper_pg_dir) + .globl swapper_pg_dir +swapper_pg_dir: .space 8192 /* Reserved 4k for the critical exception stack & 4k for the machine @@ -759,13 +763,15 @@ _GLOBAL(swapper_pg_dir) .align 12 exception_stack_bottom: .space BOOKE_EXCEPTION_STACK_SIZE -_GLOBAL(exception_stack_top) + .globl exception_stack_top +exception_stack_top: /* * This space gets a copy of optional info passed to us by the bootstrap * which is used to pass parameters into the kernel like root=/dev/sda1, etc. */ -_GLOBAL(cmd_line) + .globl cmd_line +cmd_line: .space 512 /* @@ -774,5 +780,3 @@ _GLOBAL(cmd_line) */ abatron_pteptrs: .space 8 - - diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S index 8562b807b37..10c261c6702 100644 --- a/arch/ppc/kernel/head_4xx.S +++ b/arch/ppc/kernel/head_4xx.S @@ -245,12 +245,12 @@ label: /* * 0x0100 - Critical Interrupt Exception */ - CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, UnknownException) + CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception) /* * 0x0200 - Machine Check Exception */ - CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) + CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception) /* * 0x0300 - Data Storage Exception @@ -405,7 +405,7 @@ label: mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */ stw r4,_DEAR(r11) addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE(0x600, AlignmentException) + EXC_XFER_EE(0x600, alignment_exception) /* 0x0700 - Program Exception */ START_EXCEPTION(0x0700, ProgramCheck) @@ -413,21 +413,21 @@ label: mfspr r4,SPRN_ESR /* Grab the ESR and save it */ stw r4,_ESR(r11) addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_STD(0x700, ProgramCheckException) + EXC_XFER_STD(0x700, program_check_exception) - EXCEPTION(0x0800, Trap_08, UnknownException, EXC_XFER_EE) - EXCEPTION(0x0900, Trap_09, UnknownException, EXC_XFER_EE) - EXCEPTION(0x0A00, Trap_0A, UnknownException, EXC_XFER_EE) - EXCEPTION(0x0B00, Trap_0B, UnknownException, EXC_XFER_EE) + EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE) /* 0x0C00 - System Call Exception */ START_EXCEPTION(0x0C00, SystemCall) NORMAL_EXCEPTION_PROLOG EXC_XFER_EE_LITE(0xc00, DoSyscall) - EXCEPTION(0x0D00, Trap_0D, UnknownException, EXC_XFER_EE) - EXCEPTION(0x0E00, Trap_0E, UnknownException, EXC_XFER_EE) - EXCEPTION(0x0F00, Trap_0F, UnknownException, EXC_XFER_EE) + EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE) /* 0x1000 - Programmable Interval Timer (PIT) Exception */ START_EXCEPTION(0x1000, Decrementer) @@ -444,14 +444,14 @@ label: /* 0x1010 - Fixed Interval Timer (FIT) Exception */ - STND_EXCEPTION(0x1010, FITException, UnknownException) + STND_EXCEPTION(0x1010, FITException, unknown_exception) /* 0x1020 - Watchdog Timer (WDT) Exception */ #ifdef CONFIG_BOOKE_WDT CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException) #else - CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException) + CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception) #endif #endif @@ -656,25 +656,25 @@ label: mfspr r10, SPRN_SPRG0 b InstructionAccess - EXCEPTION(0x1300, Trap_13, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1400, Trap_14, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE) #ifdef CONFIG_IBM405_ERR51 /* 405GP errata 51 */ START_EXCEPTION(0x1700, Trap_17) b DTLBMiss #else - EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE) #endif - EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1A00, Trap_1A, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1B00, Trap_1B, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1C00, Trap_1C, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1D00, Trap_1D, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1E00, Trap_1E, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1F00, Trap_1F, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE) /* Check for a single step debug exception while in an exception * handler before state has been saved. This is to catch the case @@ -988,10 +988,14 @@ _GLOBAL(set_context) * goes at the beginning of the data segment, which is page-aligned. */ .data -_GLOBAL(sdata) -_GLOBAL(empty_zero_page) + .align 12 + .globl sdata +sdata: + .globl empty_zero_page +empty_zero_page: .space 4096 -_GLOBAL(swapper_pg_dir) + .globl swapper_pg_dir +swapper_pg_dir: .space 4096 @@ -1001,12 +1005,14 @@ _GLOBAL(swapper_pg_dir) exception_stack_bottom: .space 4096 critical_stack_top: -_GLOBAL(exception_stack_top) + .globl exception_stack_top +exception_stack_top: /* This space gets a copy of optional info passed to us by the bootstrap * which is used to pass parameters into the kernel like root=/dev/sda1, etc. */ -_GLOBAL(cmd_line) + .globl cmd_line +cmd_line: .space 512 /* Room for two PTE pointers, usually the kernel and current user pointers diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S index cb1a3a54a02..de097874222 100644 --- a/arch/ppc/kernel/head_8xx.S +++ b/arch/ppc/kernel/head_8xx.S @@ -203,7 +203,7 @@ i##n: \ ret_from_except) /* System reset */ - EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD) + EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD) /* Machine check */ . = 0x200 @@ -214,7 +214,7 @@ MachineCheck: mfspr r5,SPRN_DSISR stw r5,_DSISR(r11) addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_STD(0x200, MachineCheckException) + EXC_XFER_STD(0x200, machine_check_exception) /* Data access exception. * This is "never generated" by the MPC8xx. We jump to it for other @@ -252,20 +252,20 @@ Alignment: mfspr r5,SPRN_DSISR stw r5,_DSISR(r11) addi r3,r1,STACK_FRAME_OVERHEAD - EXC_XFER_EE(0x600, AlignmentException) + EXC_XFER_EE(0x600, alignment_exception) /* Program check exception */ - EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD) + EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD) /* No FPU on MPC8xx. This exception is not supposed to happen. */ - EXCEPTION(0x800, FPUnavailable, UnknownException, EXC_XFER_STD) + EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD) /* Decrementer */ EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE) - EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE) - EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE) + EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE) + EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE) /* System call */ . = 0xc00 @@ -274,9 +274,9 @@ SystemCall: EXC_XFER_EE_LITE(0xc00, DoSyscall) /* Single step - not used on 601 */ - EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD) - EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE) - EXCEPTION(0xf00, Trap_0f, UnknownException, EXC_XFER_EE) + EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD) + EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE) + EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE) /* On the MPC8xx, this is a software emulation interrupt. It occurs * for all unimplemented and illegal instructions. @@ -540,22 +540,22 @@ DataTLBError: #endif b DataAccess - EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE) /* On the MPC8xx, these next four traps are used for development * support of breakpoints and such. Someday I will get around to * using them. */ - EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE) - EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE) + EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE) + EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE) . = 0x2000 diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h index 9342acf12e7..f3d274c6b23 100644 --- a/arch/ppc/kernel/head_booke.h +++ b/arch/ppc/kernel/head_booke.h @@ -335,7 +335,7 @@ label: mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \ stw r4,_DEAR(r11); \ addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_EE(0x0600, AlignmentException) + EXC_XFER_EE(0x0600, alignment_exception) #define PROGRAM_EXCEPTION \ START_EXCEPTION(Program) \ @@ -343,7 +343,7 @@ label: mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \ stw r4,_ESR(r11); \ addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_STD(0x0700, ProgramCheckException) + EXC_XFER_STD(0x0700, program_check_exception) #define DECREMENTER_EXCEPTION \ START_EXCEPTION(Decrementer) \ @@ -358,6 +358,6 @@ label: NORMAL_EXCEPTION_PROLOG; \ bne load_up_fpu; /* if from user, just load it up */ \ addi r3,r1,STACK_FRAME_OVERHEAD; \ - EXC_XFER_EE_LITE(0x800, KernelFP) + EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) #endif /* __HEAD_BOOKE_H__ */ diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S index 8e52e840831..8d60fa99fc4 100644 --- a/arch/ppc/kernel/head_fsl_booke.S +++ b/arch/ppc/kernel/head_fsl_booke.S @@ -24,7 +24,7 @@ * Copyright 2002-2004 MontaVista Software, Inc. * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org> * Copyright 2004 Freescale Semiconductor, Inc - * PowerPC e500 modifications, Kumar Gala <kumar.gala@freescale.com> + * PowerPC e500 modifications, Kumar Gala <galak@kernel.crashing.org> * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -426,14 +426,14 @@ skpinv: addi r6,r6,1 /* Increment */ interrupt_base: /* Critical Input Interrupt */ - CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException) + CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception) /* Machine Check Interrupt */ #ifdef CONFIG_E200 /* no RFMCI, MCSRRs on E200 */ - CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) + CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception) #else - MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException) + MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception) #endif /* Data Storage Interrupt */ @@ -542,9 +542,9 @@ interrupt_base: #else #ifdef CONFIG_E200 /* E200 treats 'normal' floating point instructions as FP Unavail exception */ - EXCEPTION(0x0800, FloatingPointUnavailable, ProgramCheckException, EXC_XFER_EE) + EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE) #else - EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE) + EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE) #endif #endif @@ -554,20 +554,20 @@ interrupt_base: EXC_XFER_EE_LITE(0x0c00, DoSyscall) /* Auxillary Processor Unavailable Interrupt */ - EXCEPTION(0x2900, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE) + EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE) /* Decrementer Interrupt */ DECREMENTER_EXCEPTION /* Fixed Internal Timer Interrupt */ /* TODO: Add FIT support */ - EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE) + EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE) /* Watchdog Timer Interrupt */ #ifdef CONFIG_BOOKE_WDT CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException) #else - CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException) + CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception) #endif /* Data TLB Error Interrupt */ @@ -696,21 +696,21 @@ interrupt_base: addi r3,r1,STACK_FRAME_OVERHEAD EXC_XFER_EE_LITE(0x2010, KernelSPE) #else - EXCEPTION(0x2020, SPEUnavailable, UnknownException, EXC_XFER_EE) + EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE) #endif /* CONFIG_SPE */ /* SPE Floating Point Data */ #ifdef CONFIG_SPE EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE); #else - EXCEPTION(0x2040, SPEFloatingPointData, UnknownException, EXC_XFER_EE) + EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE) #endif /* CONFIG_SPE */ /* SPE Floating Point Round */ - EXCEPTION(0x2050, SPEFloatingPointRound, UnknownException, EXC_XFER_EE) + EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE) /* Performance Monitor */ - EXCEPTION(0x2060, PerformanceMonitor, PerformanceMonitorException, EXC_XFER_STD) + EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) /* Debug Interrupt */ @@ -853,7 +853,7 @@ load_up_spe: cmpi 0,r4,0 beq 1f addi r4,r4,THREAD /* want THREAD of last_task_used_spe */ - SAVE_32EVR(0,r10,r4) + SAVE_32EVRS(0,r10,r4) evxor evr10, evr10, evr10 /* clear out evr10 */ evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */ li r5,THREAD_ACC @@ -873,7 +873,7 @@ load_up_spe: stw r4,THREAD_USED_SPE(r5) evlddx evr4,r10,r5 evmra evr4,evr4 - REST_32EVR(0,r10,r5) + REST_32EVRS(0,r10,r5) #ifndef CONFIG_SMP subi r4,r5,THREAD stw r4,last_task_used_spe@l(r3) @@ -963,7 +963,7 @@ _GLOBAL(giveup_spe) addi r3,r3,THREAD /* want THREAD of task */ lwz r5,PT_REGS(r3) cmpi 0,r5,0 - SAVE_32EVR(0, r4, r3) + SAVE_32EVRS(0, r4, r3) evxor evr6, evr6, evr6 /* clear out evr6 */ evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */ li r4,THREAD_ACC @@ -1028,10 +1028,14 @@ _GLOBAL(set_context) * goes at the beginning of the data segment, which is page-aligned. */ .data -_GLOBAL(sdata) -_GLOBAL(empty_zero_page) + .align 12 + .globl sdata +sdata: + .globl empty_zero_page +empty_zero_page: .space 4096 -_GLOBAL(swapper_pg_dir) + .globl swapper_pg_dir +swapper_pg_dir: .space 4096 /* Reserved 4k for the critical exception stack & 4k for the machine @@ -1040,13 +1044,15 @@ _GLOBAL(swapper_pg_dir) .align 12 exception_stack_bottom: .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS -_GLOBAL(exception_stack_top) + .globl exception_stack_top +exception_stack_top: /* * This space gets a copy of optional info passed to us by the bootstrap * which is used to pass parameters into the kernel like root=/dev/sda1, etc. */ -_GLOBAL(cmd_line) + .globl cmd_line +cmd_line: .space 512 /* @@ -1055,4 +1061,3 @@ _GLOBAL(cmd_line) */ abatron_pteptrs: .space 8 - diff --git a/arch/ppc/kernel/idle.c b/arch/ppc/kernel/idle.c index fba29c876b6..821a75e4560 100644 --- a/arch/ppc/kernel/idle.c +++ b/arch/ppc/kernel/idle.c @@ -32,6 +32,7 @@ #include <asm/cache.h> #include <asm/cputable.h> #include <asm/machdep.h> +#include <asm/smp.h> void default_idle(void) { @@ -52,10 +53,6 @@ void default_idle(void) } #endif } - if (need_resched()) - schedule(); - if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING) - cpu_die(); } /* @@ -63,18 +60,29 @@ void default_idle(void) */ void cpu_idle(void) { - for (;;) - if (ppc_md.idle != NULL) - ppc_md.idle(); - else - default_idle(); + int cpu = smp_processor_id(); + + for (;;) { + while (!need_resched()) { + if (ppc_md.idle != NULL) + ppc_md.idle(); + else + default_idle(); + } + + if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING) + cpu_die(); + preempt_enable_no_resched(); + schedule(); + preempt_disable(); + } } #if defined(CONFIG_SYSCTL) && defined(CONFIG_6xx) /* * Register the sysctl to set/clear powersave_nap. */ -extern unsigned long powersave_nap; +extern int powersave_nap; static ctl_table powersave_nap_ctl_table[]={ { diff --git a/arch/ppc/kernel/irq.c b/arch/ppc/kernel/irq.c deleted file mode 100644 index 8843f3af230..00000000000 --- a/arch/ppc/kernel/irq.c +++ /dev/null @@ -1,164 +0,0 @@ -/* - * arch/ppc/kernel/irq.c - * - * Derived from arch/i386/kernel/irq.c - * Copyright (C) 1992 Linus Torvalds - * Adapted from arch/i386 by Gary Thomas - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * Updated and modified by Cort Dougan <cort@fsmlabs.com> - * Copyright (C) 1996-2001 Cort Dougan - * Adapted for Power Macintosh by Paul Mackerras - * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au) - * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk). - * - * This file contains the code used by various IRQ handling routines: - * asking for different IRQ's should be done through these routines - * instead of just grabbing them. Thus setups with different IRQ numbers - * shouldn't result in any weird surprises, and installing new handlers - * should be easier. - * - * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the - * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit - * mask register (of which only 16 are defined), hence the weird shifting - * and complement of the cached_irq_mask. I want to be able to stuff - * this right into the SIU SMASK register. - * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx - * to reduce code space and undefined function references. - */ - -#include <linux/errno.h> -#include <linux/module.h> -#include <linux/threads.h> -#include <linux/kernel_stat.h> -#include <linux/signal.h> -#include <linux/sched.h> -#include <linux/ptrace.h> -#include <linux/ioport.h> -#include <linux/interrupt.h> -#include <linux/timex.h> -#include <linux/config.h> -#include <linux/init.h> -#include <linux/slab.h> -#include <linux/pci.h> -#include <linux/delay.h> -#include <linux/irq.h> -#include <linux/proc_fs.h> -#include <linux/random.h> -#include <linux/seq_file.h> -#include <linux/cpumask.h> -#include <linux/profile.h> -#include <linux/bitops.h> - -#include <asm/uaccess.h> -#include <asm/system.h> -#include <asm/io.h> -#include <asm/pgtable.h> -#include <asm/irq.h> -#include <asm/cache.h> -#include <asm/prom.h> -#include <asm/ptrace.h> - -#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) - -extern atomic_t ipi_recv; -extern atomic_t ipi_sent; - -#define MAXCOUNT 10000000 - -int ppc_spurious_interrupts = 0; -struct irqaction *ppc_irq_action[NR_IRQS]; -unsigned long ppc_cached_irq_mask[NR_MASK_WORDS]; -unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; -atomic_t ppc_n_lost_interrupts; - -#ifdef CONFIG_TAU_INT -extern int tau_initialized; -extern int tau_interrupts(int); -#endif - -int show_interrupts(struct seq_file *p, void *v) -{ - int i = *(loff_t *) v, j; - struct irqaction * action; - unsigned long flags; - - if (i == 0) { - seq_puts(p, " "); - for (j=0; j<NR_CPUS; j++) - if (cpu_online(j)) - seq_printf(p, "CPU%d ", j); - seq_putc(p, '\n'); - } - - if (i < NR_IRQS) { - spin_lock_irqsave(&irq_desc[i].lock, flags); - action = irq_desc[i].action; - if ( !action || !action->handler ) - goto skip; - seq_printf(p, "%3d: ", i); -#ifdef CONFIG_SMP - for (j = 0; j < NR_CPUS; j++) - if (cpu_online(j)) - seq_printf(p, "%10u ", - kstat_cpu(j).irqs[i]); -#else - seq_printf(p, "%10u ", kstat_irqs(i)); -#endif /* CONFIG_SMP */ - if (irq_desc[i].handler) - seq_printf(p, " %s ", irq_desc[i].handler->typename); - else - seq_puts(p, " None "); - seq_printf(p, "%s", (irq_desc[i].status & IRQ_LEVEL) ? "Level " : "Edge "); - seq_printf(p, " %s", action->name); - for (action = action->next; action; action = action->next) - seq_printf(p, ", %s", action->name); - seq_putc(p, '\n'); -skip: - spin_unlock_irqrestore(&irq_desc[i].lock, flags); - } else if (i == NR_IRQS) { -#ifdef CONFIG_TAU_INT - if (tau_initialized){ - seq_puts(p, "TAU: "); - for (j = 0; j < NR_CPUS; j++) - if (cpu_online(j)) - seq_printf(p, "%10u ", tau_interrupts(j)); - seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n"); - } -#endif -#ifdef CONFIG_SMP - /* should this be per processor send/receive? */ - seq_printf(p, "IPI (recv/sent): %10u/%u\n", - atomic_read(&ipi_recv), atomic_read(&ipi_sent)); -#endif - seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts); - } - return 0; -} - -void do_IRQ(struct pt_regs *regs) -{ - int irq, first = 1; - irq_enter(); - - /* - * Every platform is required to implement ppc_md.get_irq. - * This function will either return an irq number or -1 to - * indicate there are no more pending. But the first time - * through the loop this means there wasn't and IRQ pending. - * The value -2 is for buggy hardware and means that this IRQ - * has already been handled. -- Tom - */ - while ((irq = ppc_md.get_irq(regs)) >= 0) { - __do_IRQ(irq, regs); - first = 0; - } - if (irq != -2 && first) - /* That's not SMP safe ... but who cares ? */ - ppc_spurious_interrupts++; - irq_exit(); -} - -void __init init_IRQ(void) -{ - ppc_md.init_IRQ(); -} diff --git a/arch/ppc/kernel/l2cr.S b/arch/ppc/kernel/l2cr.S index 861115249b3..d7f4e982b53 100644 --- a/arch/ppc/kernel/l2cr.S +++ b/arch/ppc/kernel/l2cr.S @@ -203,7 +203,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450) * L1 icache */ b 20f - .balign L1_CACHE_LINE_SIZE + .balign L1_CACHE_BYTES 22: sync mtspr SPRN_L2CR,r3 diff --git a/arch/ppc/kernel/machine_kexec.c b/arch/ppc/kernel/machine_kexec.c index a72787747df..a882b0dbe8d 100644 --- a/arch/ppc/kernel/machine_kexec.c +++ b/arch/ppc/kernel/machine_kexec.c @@ -32,7 +32,7 @@ const extern unsigned int relocate_new_kernel_size; * Provide a dummy crash_notes definition while crash dump arrives to ppc. * This prevents breakage of crash_notes attribute in kernel/ksysfs.c. */ -void *crash_notes = NULL; +note_buf_t crash_notes[NR_CPUS]; void machine_shutdown(void) { diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S index 90d917d2e85..5e61124581d 100644 --- a/arch/ppc/kernel/misc.S +++ b/arch/ppc/kernel/misc.S @@ -25,6 +25,11 @@ #include <asm/thread_info.h> #include <asm/asm-offsets.h> +#ifdef CONFIG_8xx +#define ISYNC_8xx isync +#else +#define ISYNC_8xx +#endif .text .align 5 @@ -125,9 +130,8 @@ _GLOBAL(identify_cpu) 1: addis r6,r3,cur_cpu_spec@ha addi r6,r6,cur_cpu_spec@l - slwi r4,r4,2 sub r8,r8,r3 - stwx r8,r4,r6 + stw r8,0(r6) blr /* @@ -186,19 +190,18 @@ _GLOBAL(do_cpu_ftr_fixups) * * Setup function is called with: * r3 = data offset - * r4 = CPU number - * r5 = ptr to CPU spec (relocated) + * r4 = ptr to CPU spec (relocated) */ _GLOBAL(call_setup_cpu) - addis r5,r3,cur_cpu_spec@ha - addi r5,r5,cur_cpu_spec@l - slwi r4,r24,2 - lwzx r5,r4,r5 + addis r4,r3,cur_cpu_spec@ha + addi r4,r4,cur_cpu_spec@l + lwz r4,0(r4) + add r4,r4,r3 + lwz r5,CPU_SPEC_SETUP(r4) + cmpi 0,r5,0 add r5,r5,r3 - lwz r6,CPU_SPEC_SETUP(r5) - add r6,r6,r3 - mtctr r6 - mr r4,r24 + beqlr + mtctr r5 bctr #if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx) @@ -273,134 +276,6 @@ _GLOBAL(low_choose_7447a_dfs) #endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */ -/* void local_save_flags_ptr(unsigned long *flags) */ -_GLOBAL(local_save_flags_ptr) - mfmsr r4 - stw r4,0(r3) - blr - /* - * Need these nops here for taking over save/restore to - * handle lost intrs - * -- Cort - */ - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop -_GLOBAL(local_save_flags_ptr_end) - -/* void local_irq_restore(unsigned long flags) */ -_GLOBAL(local_irq_restore) -/* - * Just set/clear the MSR_EE bit through restore/flags but do not - * change anything else. This is needed by the RT system and makes - * sense anyway. - * -- Cort - */ - mfmsr r4 - /* Copy all except the MSR_EE bit from r4 (current MSR value) - to r3. This is the sort of thing the rlwimi instruction is - designed for. -- paulus. */ - rlwimi r3,r4,0,17,15 - /* Check if things are setup the way we want _already_. */ - cmpw 0,r3,r4 - beqlr -1: SYNC - mtmsr r3 - SYNC - blr - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop -_GLOBAL(local_irq_restore_end) - -_GLOBAL(local_irq_disable) - mfmsr r0 /* Get current interrupt state */ - rlwinm r3,r0,16+1,32-1,31 /* Extract old value of 'EE' */ - rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */ - SYNC /* Some chip revs have problems here... */ - mtmsr r0 /* Update machine state */ - blr /* Done */ - /* - * Need these nops here for taking over save/restore to - * handle lost intrs - * -- Cort - */ - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop -_GLOBAL(local_irq_disable_end) - -_GLOBAL(local_irq_enable) - mfmsr r3 /* Get current state */ - ori r3,r3,MSR_EE /* Turn on 'EE' bit */ - SYNC /* Some chip revs have problems here... */ - mtmsr r3 /* Update machine state */ - blr - /* - * Need these nops here for taking over save/restore to - * handle lost intrs - * -- Cort - */ - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop - nop -_GLOBAL(local_irq_enable_end) - /* * complement mask on the msr then "or" some values on. * _nmask_and_or_msr(nmask, value_to_or) @@ -622,27 +497,27 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) * and invalidate the corresponding instruction cache blocks. * This is a no-op on the 601. * - * flush_icache_range(unsigned long start, unsigned long stop) + * __flush_icache_range(unsigned long start, unsigned long stop) */ -_GLOBAL(flush_icache_range) +_GLOBAL(__flush_icache_range) BEGIN_FTR_SECTION blr /* for 601, do nothing */ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) - li r5,L1_CACHE_LINE_SIZE-1 + li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4 add r4,r4,r5 - srwi. r4,r4,LG_L1_CACHE_LINE_SIZE + srwi. r4,r4,L1_CACHE_SHIFT beqlr mtctr r4 mr r6,r3 1: dcbst 0,r3 - addi r3,r3,L1_CACHE_LINE_SIZE + addi r3,r3,L1_CACHE_BYTES bdnz 1b sync /* wait for dcbst's to get to ram */ mtctr r4 2: icbi 0,r6 - addi r6,r6,L1_CACHE_LINE_SIZE + addi r6,r6,L1_CACHE_BYTES bdnz 2b sync /* additional sync needed on g4 */ isync @@ -655,16 +530,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) * clean_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(clean_dcache_range) - li r5,L1_CACHE_LINE_SIZE-1 + li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4 add r4,r4,r5 - srwi. r4,r4,LG_L1_CACHE_LINE_SIZE + srwi. r4,r4,L1_CACHE_SHIFT beqlr mtctr r4 1: dcbst 0,r3 - addi r3,r3,L1_CACHE_LINE_SIZE + addi r3,r3,L1_CACHE_BYTES bdnz 1b sync /* wait for dcbst's to get to ram */ blr @@ -676,16 +551,16 @@ _GLOBAL(clean_dcache_range) * flush_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(flush_dcache_range) - li r5,L1_CACHE_LINE_SIZE-1 + li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4 add r4,r4,r5 - srwi. r4,r4,LG_L1_CACHE_LINE_SIZE + srwi. r4,r4,L1_CACHE_SHIFT beqlr mtctr r4 1: dcbf 0,r3 - addi r3,r3,L1_CACHE_LINE_SIZE + addi r3,r3,L1_CACHE_BYTES bdnz 1b sync /* wait for dcbst's to get to ram */ blr @@ -698,16 +573,16 @@ _GLOBAL(flush_dcache_range) * invalidate_dcache_range(unsigned long start, unsigned long stop) */ _GLOBAL(invalidate_dcache_range) - li r5,L1_CACHE_LINE_SIZE-1 + li r5,L1_CACHE_BYTES-1 andc r3,r3,r5 subf r4,r3,r4 add r4,r4,r5 - srwi. r4,r4,LG_L1_CACHE_LINE_SIZE + srwi. r4,r4,L1_CACHE_SHIFT beqlr mtctr r4 1: dcbi 0,r3 - addi r3,r3,L1_CACHE_LINE_SIZE + addi r3,r3,L1_CACHE_BYTES bdnz 1b sync /* wait for dcbi's to get to ram */ blr @@ -728,7 +603,7 @@ _GLOBAL(flush_dcache_all) mtctr r4 lis r5, KERNELBASE@h 1: lwz r3, 0(r5) /* Load one word from every line */ - addi r5, r5, L1_CACHE_LINE_SIZE + addi r5, r5, L1_CACHE_BYTES bdnz 1b blr #endif /* CONFIG_NOT_COHERENT_CACHE */ @@ -746,16 +621,16 @@ BEGIN_FTR_SECTION blr /* for 601, do nothing */ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) rlwinm r3,r3,0,0,19 /* Get page base address */ - li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */ + li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ mtctr r4 mr r6,r3 0: dcbst 0,r3 /* Write line to ram */ - addi r3,r3,L1_CACHE_LINE_SIZE + addi r3,r3,L1_CACHE_BYTES bdnz 0b sync mtctr r4 1: icbi 0,r6 - addi r6,r6,L1_CACHE_LINE_SIZE + addi r6,r6,L1_CACHE_BYTES bdnz 1b sync isync @@ -778,16 +653,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) mtmsr r0 isync rlwinm r3,r3,0,0,19 /* Get page base address */ - li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */ + li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */ mtctr r4 mr r6,r3 0: dcbst 0,r3 /* Write line to ram */ - addi r3,r3,L1_CACHE_LINE_SIZE + addi r3,r3,L1_CACHE_BYTES bdnz 0b sync mtctr r4 1: icbi 0,r6 - addi r6,r6,L1_CACHE_LINE_SIZE + addi r6,r6,L1_CACHE_BYTES bdnz 1b sync mtmsr r10 /* restore DR */ @@ -802,7 +677,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) * void clear_pages(void *page, int order) ; */ _GLOBAL(clear_pages) - li r0,4096/L1_CACHE_LINE_SIZE + li r0,4096/L1_CACHE_BYTES slw r0,r0,r4 mtctr r0 #ifdef CONFIG_8xx @@ -814,7 +689,7 @@ _GLOBAL(clear_pages) #else 1: dcbz 0,r3 #endif - addi r3,r3,L1_CACHE_LINE_SIZE + addi r3,r3,L1_CACHE_BYTES bdnz 1b blr @@ -840,7 +715,7 @@ _GLOBAL(copy_page) #ifdef CONFIG_8xx /* don't use prefetch on 8xx */ - li r0,4096/L1_CACHE_LINE_SIZE + li r0,4096/L1_CACHE_BYTES mtctr r0 1: COPY_16_BYTES bdnz 1b @@ -854,13 +729,13 @@ _GLOBAL(copy_page) li r11,4 mtctr r0 11: dcbt r11,r4 - addi r11,r11,L1_CACHE_LINE_SIZE + addi r11,r11,L1_CACHE_BYTES bdnz 11b #else /* MAX_COPY_PREFETCH == 1 */ dcbt r5,r4 - li r11,L1_CACHE_LINE_SIZE+4 + li r11,L1_CACHE_BYTES+4 #endif /* MAX_COPY_PREFETCH */ - li r0,4096/L1_CACHE_LINE_SIZE - MAX_COPY_PREFETCH + li r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH crclr 4*cr0+eq 2: mtctr r0 @@ -868,12 +743,12 @@ _GLOBAL(copy_page) dcbt r11,r4 dcbz r5,r3 COPY_16_BYTES -#if L1_CACHE_LINE_SIZE >= 32 +#if L1_CACHE_BYTES >= 32 COPY_16_BYTES -#if L1_CACHE_LINE_SIZE >= 64 +#if L1_CACHE_BYTES >= 64 COPY_16_BYTES COPY_16_BYTES -#if L1_CACHE_LINE_SIZE >= 128 +#if L1_CACHE_BYTES >= 128 COPY_16_BYTES COPY_16_BYTES COPY_16_BYTES @@ -930,8 +805,18 @@ _GLOBAL(_insb) subi r4,r4,1 blelr- 00: lbz r5,0(r3) - eieio - stbu r5,1(r4) +01: eieio +02: stbu r5,1(r4) + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -941,8 +826,18 @@ _GLOBAL(_outsb) subi r4,r4,1 blelr- 00: lbzu r5,1(r4) - stb r5,0(r3) - eieio +01: stb r5,0(r3) +02: eieio + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -952,8 +847,18 @@ _GLOBAL(_insw) subi r4,r4,2 blelr- 00: lhbrx r5,0,r3 - eieio - sthu r5,2(r4) +01: eieio +02: sthu r5,2(r4) + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -963,8 +868,18 @@ _GLOBAL(_outsw) subi r4,r4,2 blelr- 00: lhzu r5,2(r4) - eieio - sthbrx r5,0,r3 +01: eieio +02: sthbrx r5,0,r3 + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -974,8 +889,18 @@ _GLOBAL(_insl) subi r4,r4,4 blelr- 00: lwbrx r5,0,r3 - eieio - stwu r5,4(r4) +01: eieio +02: stwu r5,4(r4) + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -985,8 +910,18 @@ _GLOBAL(_outsl) subi r4,r4,4 blelr- 00: lwzu r5,4(r4) - stwbrx r5,0,r3 - eieio +01: stwbrx r5,0,r3 +02: eieio + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -997,8 +932,18 @@ _GLOBAL(_insw_ns) subi r4,r4,2 blelr- 00: lhz r5,0(r3) - eieio - sthu r5,2(r4) +01: eieio +02: sthu r5,2(r4) + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -1009,8 +954,18 @@ _GLOBAL(_outsw_ns) subi r4,r4,2 blelr- 00: lhzu r5,2(r4) - sth r5,0(r3) - eieio +01: sth r5,0(r3) +02: eieio + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -1021,8 +976,18 @@ _GLOBAL(_insl_ns) subi r4,r4,4 blelr- 00: lwz r5,0(r3) - eieio - stwu r5,4(r4) +01: eieio +02: stwu r5,4(r4) + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -1033,8 +998,18 @@ _GLOBAL(_outsl_ns) subi r4,r4,4 blelr- 00: lwzu r5,4(r4) - stw r5,0(r3) - eieio +01: stw r5,0(r3) +02: eieio + ISYNC_8xx + .section .fixup,"ax" +03: blr + .text + .section __ex_table, "a" + .align 2 + .long 00b, 03b + .long 01b, 03b + .long 02b, 03b + .text bdnz 00b blr @@ -1098,33 +1073,6 @@ _GLOBAL(_get_SP) blr /* - * These are used in the alignment trap handler when emulating - * single-precision loads and stores. - * We restore and save the fpscr so the task gets the same result - * and exceptions as if the cpu had performed the load or store. - */ - -#ifdef CONFIG_PPC_FPU -_GLOBAL(cvt_fd) - lfd 0,-4(r5) /* load up fpscr value */ - mtfsf 0xff,0 - lfs 0,0(r3) - stfd 0,0(r4) - mffs 0 /* save new fpscr value */ - stfd 0,-4(r5) - blr - -_GLOBAL(cvt_df) - lfd 0,-4(r5) /* load up fpscr value */ - mtfsf 0xff,0 - lfd 0,0(r3) - stfs 0,0(r4) - mffs 0 /* save new fpscr value */ - stfd 0,-4(r5) - blr -#endif - -/* * Create a kernel thread * kernel_thread(fn, arg, flags) */ diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c index 854e45beb38..f7fae5f153b 100644 --- a/arch/ppc/kernel/pci.c +++ b/arch/ppc/kernel/pci.c @@ -21,6 +21,7 @@ #include <asm/byteorder.h> #include <asm/irq.h> #include <asm/uaccess.h> +#include <asm/machdep.h> #undef DEBUG @@ -44,7 +45,6 @@ static void update_bridge_base(struct pci_bus *bus, int i); static void pcibios_fixup_resources(struct pci_dev* dev); static void fixup_broken_pcnet32(struct pci_dev* dev); static int reparent_resources(struct resource *parent, struct resource *res); -static void fixup_rev1_53c810(struct pci_dev* dev); static void fixup_cpc710_pci64(struct pci_dev* dev); #ifdef CONFIG_PPC_OF static u8* pci_to_OF_bus_map; @@ -53,7 +53,7 @@ static u8* pci_to_OF_bus_map; /* By default, we don't re-assign bus numbers. We do this only on * some pmacs */ -int pci_assign_all_busses; +int pci_assign_all_buses; struct pci_controller* hose_head; struct pci_controller** hose_tail = &hose_head; @@ -61,20 +61,6 @@ struct pci_controller** hose_tail = &hose_head; static int pci_bus_count; static void -fixup_rev1_53c810(struct pci_dev* dev) -{ - /* rev 1 ncr53c810 chips don't set the class at all which means - * they don't get their resources remapped. Fix that here. - */ - - if ((dev->class == PCI_CLASS_NOT_DEFINED)) { - printk("NCR 53c810 rev 1 detected, setting PCI class.\n"); - dev->class = PCI_CLASS_STORAGE_SCSI; - } -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810); - -static void fixup_broken_pcnet32(struct pci_dev* dev) { if ((dev->class>>8 == PCI_CLASS_NETWORK_ETHERNET)) { @@ -644,7 +630,7 @@ pcibios_alloc_controller(void) /* * Functions below are used on OpenFirmware machines. */ -static void __openfirmware +static void make_one_node_map(struct device_node* node, u8 pci_bus) { int *bus_range; @@ -678,7 +664,7 @@ make_one_node_map(struct device_node* node, u8 pci_bus) } } -void __openfirmware +void pcibios_make_OF_bus_map(void) { int i; @@ -720,7 +706,7 @@ pcibios_make_OF_bus_map(void) typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data); -static struct device_node* __openfirmware +static struct device_node* scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data) { struct device_node* sub_node; @@ -761,7 +747,7 @@ scan_OF_pci_childs_iterator(struct device_node* node, void* data) return 0; } -static struct device_node* __openfirmware +static struct device_node* scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn) { u8 filter_data[2] = {bus, dev_fn}; @@ -813,18 +799,20 @@ pci_busdev_to_OF_node(struct pci_bus *bus, int devfn) /* Now, lookup childs of the hose */ return scan_OF_childs_for_device(node->child, busnr, devfn); } +EXPORT_SYMBOL(pci_busdev_to_OF_node); struct device_node* pci_device_to_OF_node(struct pci_dev *dev) { return pci_busdev_to_OF_node(dev->bus, dev->devfn); } +EXPORT_SYMBOL(pci_device_to_OF_node); /* This routine is meant to be used early during boot, when the * PCI bus numbers have not yet been assigned, and you need to * issue PCI config cycles to an OF device. * It could also be used to "fix" RTAS config cycles if you want - * to set pci_assign_all_busses to 1 and still use RTAS for PCI + * to set pci_assign_all_buses to 1 and still use RTAS for PCI * config cycles. */ struct pci_controller* @@ -842,7 +830,7 @@ pci_find_hose_for_OF_device(struct device_node* node) return NULL; } -static int __openfirmware +static int find_OF_pci_device_filter(struct device_node* node, void* data) { return ((void *)node == data); @@ -890,6 +878,7 @@ pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn) } return -ENODEV; } +EXPORT_SYMBOL(pci_device_from_OF_node); void __init pci_process_bridge_OF_ranges(struct pci_controller *hose, @@ -1030,6 +1019,10 @@ static ssize_t pci_show_devspec(struct device *dev, struct device_attribute *att } static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL); +#else /* CONFIG_PPC_OF */ +void pcibios_make_OF_bus_map(void) +{ +} #endif /* CONFIG_PPC_OF */ /* Add sysfs properties */ @@ -1262,12 +1255,12 @@ pcibios_init(void) /* Scan all of the recorded PCI controllers. */ for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { - if (pci_assign_all_busses) + if (pci_assign_all_buses) hose->first_busno = next_busno; hose->last_busno = 0xff; bus = pci_scan_bus(hose->first_busno, hose->ops, hose); hose->last_busno = bus->subordinate; - if (pci_assign_all_busses || next_busno <= hose->last_busno) + if (pci_assign_all_buses || next_busno <= hose->last_busno) next_busno = hose->last_busno + pcibios_assign_bus_offset; } pci_bus_count = next_busno; @@ -1276,7 +1269,7 @@ pcibios_init(void) * numbers vs. kernel bus numbers since we may have to * remap them. */ - if (pci_assign_all_busses && have_of) + if (pci_assign_all_buses && have_of) pcibios_make_OF_bus_map(); /* Do machine dependent PCI interrupt routing */ @@ -1586,16 +1579,17 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp, * above routine */ pgprot_t pci_phys_mem_access_prot(struct file *file, - unsigned long offset, + unsigned long pfn, unsigned long size, pgprot_t protection) { struct pci_dev *pdev = NULL; struct resource *found = NULL; unsigned long prot = pgprot_val(protection); + unsigned long offset = pfn << PAGE_SHIFT; int i; - if (page_is_ram(offset >> PAGE_SHIFT)) + if (page_is_ram(pfn)) return prot; prot |= _PAGE_NO_CACHE | _PAGE_GUARDED; diff --git a/arch/ppc/kernel/perfmon.c b/arch/ppc/kernel/perfmon.c deleted file mode 100644 index fa1dad96b83..00000000000 --- a/arch/ppc/kernel/perfmon.c +++ /dev/null @@ -1,93 +0,0 @@ -/* kernel/perfmon.c - * PPC 32 Performance Monitor Infrastructure - * - * Author: Andy Fleming - * Copyright (c) 2004 Freescale Semiconductor, Inc - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/errno.h> -#include <linux/sched.h> -#include <linux/kernel.h> -#include <linux/mm.h> -#include <linux/stddef.h> -#include <linux/unistd.h> -#include <linux/ptrace.h> -#include <linux/slab.h> -#include <linux/user.h> -#include <linux/a.out.h> -#include <linux/interrupt.h> -#include <linux/config.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/prctl.h> - -#include <asm/pgtable.h> -#include <asm/uaccess.h> -#include <asm/system.h> -#include <asm/io.h> -#include <asm/reg.h> -#include <asm/xmon.h> - -/* A lock to regulate grabbing the interrupt */ -DEFINE_SPINLOCK(perfmon_lock); - -#if defined (CONFIG_FSL_BOOKE) && !defined (CONFIG_E200) -static void dummy_perf(struct pt_regs *regs) -{ - unsigned int pmgc0 = mfpmr(PMRN_PMGC0); - - pmgc0 &= ~PMGC0_PMIE; - mtpmr(PMRN_PMGC0, pmgc0); -} - -#else -/* Ensure exceptions are disabled */ - -static void dummy_perf(struct pt_regs *regs) -{ - unsigned int mmcr0 = mfspr(SPRN_MMCR0); - - mmcr0 &= ~MMCR0_PMXE; - mtspr(SPRN_MMCR0, mmcr0); -} -#endif - -void (*perf_irq)(struct pt_regs *) = dummy_perf; - -/* Grab the interrupt, if it's free. - * Returns 0 on success, -1 if the interrupt is taken already */ -int request_perfmon_irq(void (*handler)(struct pt_regs *)) -{ - int err = 0; - - spin_lock(&perfmon_lock); - - if (perf_irq == dummy_perf) - perf_irq = handler; - else { - pr_info("perfmon irq already handled by %p\n", perf_irq); - err = -1; - } - - spin_unlock(&perfmon_lock); - - return err; -} - -void free_perfmon_irq(void) -{ - spin_lock(&perfmon_lock); - - perf_irq = dummy_perf; - - spin_unlock(&perfmon_lock); -} - -EXPORT_SYMBOL(perf_irq); -EXPORT_SYMBOL(request_perfmon_irq); -EXPORT_SYMBOL(free_perfmon_irq); diff --git a/arch/ppc/kernel/perfmon_fsl_booke.c b/arch/ppc/kernel/perfmon_fsl_booke.c index 03526bfb084..32455dfcc36 100644 --- a/arch/ppc/kernel/perfmon_fsl_booke.c +++ b/arch/ppc/kernel/perfmon_fsl_booke.c @@ -32,7 +32,7 @@ #include <asm/io.h> #include <asm/reg.h> #include <asm/xmon.h> -#include <asm/perfmon.h> +#include <asm/pmc.h> static inline u32 get_pmlca(int ctr); static inline void set_pmlca(int ctr, u32 pmlca); diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c index 88f6bb7b696..bb6a5c6a64b 100644 --- a/arch/ppc/kernel/ppc_ksyms.c +++ b/arch/ppc/kernel/ppc_ksyms.c @@ -46,6 +46,7 @@ #include <asm/btext.h> #include <asm/div64.h> #include <asm/xmon.h> +#include <asm/signal.h> #ifdef CONFIG_8xx #include <asm/commproc.h> @@ -53,11 +54,10 @@ extern void transfer_to_handler(void); extern void do_IRQ(struct pt_regs *regs); -extern void MachineCheckException(struct pt_regs *regs); -extern void AlignmentException(struct pt_regs *regs); -extern void ProgramCheckException(struct pt_regs *regs); -extern void SingleStepException(struct pt_regs *regs); -extern int do_signal(sigset_t *, struct pt_regs *); +extern void machine_check_exception(struct pt_regs *regs); +extern void alignment_exception(struct pt_regs *regs); +extern void program_check_exception(struct pt_regs *regs); +extern void single_step_exception(struct pt_regs *regs); extern int pmac_newworld; extern int sys_sigreturn(struct pt_regs *regs); @@ -72,13 +72,12 @@ EXPORT_SYMBOL(clear_user_page); EXPORT_SYMBOL(do_signal); EXPORT_SYMBOL(transfer_to_handler); EXPORT_SYMBOL(do_IRQ); -EXPORT_SYMBOL(MachineCheckException); -EXPORT_SYMBOL(AlignmentException); -EXPORT_SYMBOL(ProgramCheckException); -EXPORT_SYMBOL(SingleStepException); +EXPORT_SYMBOL(machine_check_exception); +EXPORT_SYMBOL(alignment_exception); +EXPORT_SYMBOL(program_check_exception); +EXPORT_SYMBOL(single_step_exception); EXPORT_SYMBOL(sys_sigreturn); EXPORT_SYMBOL(ppc_n_lost_interrupts); -EXPORT_SYMBOL(ppc_lost_interrupts); EXPORT_SYMBOL(ISA_DMA_THRESHOLD); EXPORT_SYMBOL(DMA_MODE_READ); @@ -131,6 +130,11 @@ EXPORT_SYMBOL(outw); EXPORT_SYMBOL(outl); EXPORT_SYMBOL(outsl);*/ +EXPORT_SYMBOL(__ide_mm_insl); +EXPORT_SYMBOL(__ide_mm_outsw); +EXPORT_SYMBOL(__ide_mm_insw); +EXPORT_SYMBOL(__ide_mm_outsl); + EXPORT_SYMBOL(_insb); EXPORT_SYMBOL(_outsb); EXPORT_SYMBOL(_insw); @@ -171,6 +175,7 @@ EXPORT_SYMBOL(pci_bus_to_phys); #endif /* CONFIG_PCI */ #ifdef CONFIG_NOT_COHERENT_CACHE +extern void flush_dcache_all(void); EXPORT_SYMBOL(flush_dcache_all); #endif @@ -179,7 +184,7 @@ EXPORT_SYMBOL(kernel_thread); EXPORT_SYMBOL(flush_instruction_cache); EXPORT_SYMBOL(giveup_fpu); -EXPORT_SYMBOL(flush_icache_range); +EXPORT_SYMBOL(__flush_icache_range); EXPORT_SYMBOL(flush_dcache_range); EXPORT_SYMBOL(flush_icache_user_range); EXPORT_SYMBOL(flush_dcache_page); @@ -212,9 +217,6 @@ EXPORT_SYMBOL(adb_try_handler_change); EXPORT_SYMBOL(cuda_request); EXPORT_SYMBOL(cuda_poll); #endif /* CONFIG_ADB_CUDA */ -#ifdef CONFIG_PPC_MULTIPLATFORM -EXPORT_SYMBOL(_machine); -#endif #ifdef CONFIG_PPC_PMAC EXPORT_SYMBOL(sys_ctrler); EXPORT_SYMBOL(pmac_newworld); @@ -230,9 +232,6 @@ EXPORT_SYMBOL(find_all_nodes); EXPORT_SYMBOL(get_property); EXPORT_SYMBOL(request_OF_resource); EXPORT_SYMBOL(release_OF_resource); -EXPORT_SYMBOL(pci_busdev_to_OF_node); -EXPORT_SYMBOL(pci_device_to_OF_node); -EXPORT_SYMBOL(pci_device_from_OF_node); EXPORT_SYMBOL(of_find_node_by_name); EXPORT_SYMBOL(of_find_node_by_type); EXPORT_SYMBOL(of_find_compatible_node); @@ -272,16 +271,6 @@ EXPORT_SYMBOL(screen_info); #endif EXPORT_SYMBOL(__delay); -#ifndef INLINE_IRQS -EXPORT_SYMBOL(local_irq_enable); -EXPORT_SYMBOL(local_irq_enable_end); -EXPORT_SYMBOL(local_irq_disable); -EXPORT_SYMBOL(local_irq_disable_end); -EXPORT_SYMBOL(local_save_flags_ptr); -EXPORT_SYMBOL(local_save_flags_ptr_end); -EXPORT_SYMBOL(local_irq_restore); -EXPORT_SYMBOL(local_irq_restore_end); -#endif EXPORT_SYMBOL(timer_interrupt); EXPORT_SYMBOL(irq_desc); EXPORT_SYMBOL(tb_ticks_per_jiffy); @@ -335,11 +324,6 @@ EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */ extern long *intercept_table; EXPORT_SYMBOL(intercept_table); #endif /* CONFIG_PPC_STD_MMU */ -EXPORT_SYMBOL(cur_cpu_spec); -#ifdef CONFIG_PPC_PMAC -extern unsigned long agp_special_page; -EXPORT_SYMBOL(agp_special_page); -#endif #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) EXPORT_SYMBOL(__mtdcr); EXPORT_SYMBOL(__mfdcr); diff --git a/arch/ppc/kernel/process.c b/arch/ppc/kernel/process.c index 82de66e4db6..25cbdc8d294 100644 --- a/arch/ppc/kernel/process.c +++ b/arch/ppc/kernel/process.c @@ -152,18 +152,66 @@ int check_stack(struct task_struct *tsk) } #endif /* defined(CHECK_STACK) */ -#ifdef CONFIG_ALTIVEC -int -dump_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs) +/* + * Make sure the floating-point register state in the + * the thread_struct is up to date for task tsk. + */ +void flush_fp_to_thread(struct task_struct *tsk) { - if (regs->msr & MSR_VEC) - giveup_altivec(current); - memcpy(vrregs, ¤t->thread.vr[0], sizeof(*vrregs)); + if (tsk->thread.regs) { + /* + * We need to disable preemption here because if we didn't, + * another process could get scheduled after the regs->msr + * test but before we have finished saving the FP registers + * to the thread_struct. That process could take over the + * FPU, and then when we get scheduled again we would store + * bogus values for the remaining FP registers. + */ + preempt_disable(); + if (tsk->thread.regs->msr & MSR_FP) { +#ifdef CONFIG_SMP + /* + * This should only ever be called for current or + * for a stopped child process. Since we save away + * the FP register state on context switch on SMP, + * there is something wrong if a stopped child appears + * to still have its FP state in the CPU registers. + */ + BUG_ON(tsk != current); +#endif + giveup_fpu(current); + } + preempt_enable(); + } +} + +void enable_kernel_fp(void) +{ + WARN_ON(preemptible()); + +#ifdef CONFIG_SMP + if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) + giveup_fpu(current); + else + giveup_fpu(NULL); /* just enables FP for kernel */ +#else + giveup_fpu(last_task_used_math); +#endif /* CONFIG_SMP */ +} +EXPORT_SYMBOL(enable_kernel_fp); + +int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs) +{ + preempt_disable(); + if (tsk->thread.regs && (tsk->thread.regs->msr & MSR_FP)) + giveup_fpu(tsk); + preempt_enable(); + memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); return 1; } -void -enable_kernel_altivec(void) +#ifdef CONFIG_ALTIVEC +void enable_kernel_altivec(void) { WARN_ON(preemptible()); @@ -177,19 +225,35 @@ enable_kernel_altivec(void) #endif /* __SMP __ */ } EXPORT_SYMBOL(enable_kernel_altivec); -#endif /* CONFIG_ALTIVEC */ -#ifdef CONFIG_SPE -int -dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs) +/* + * Make sure the VMX/Altivec register state in the + * the thread_struct is up to date for task tsk. + */ +void flush_altivec_to_thread(struct task_struct *tsk) { - if (regs->msr & MSR_SPE) - giveup_spe(current); - /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */ - memcpy(evrregs, ¤t->thread.evr[0], sizeof(u32) * 35); + if (tsk->thread.regs) { + preempt_disable(); + if (tsk->thread.regs->msr & MSR_VEC) { +#ifdef CONFIG_SMP + BUG_ON(tsk != current); +#endif + giveup_altivec(current); + } + preempt_enable(); + } +} + +int dump_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs) +{ + if (regs->msr & MSR_VEC) + giveup_altivec(current); + memcpy(vrregs, ¤t->thread.vr[0], sizeof(*vrregs)); return 1; } +#endif /* CONFIG_ALTIVEC */ +#ifdef CONFIG_SPE void enable_kernel_spe(void) { @@ -205,34 +269,30 @@ enable_kernel_spe(void) #endif /* __SMP __ */ } EXPORT_SYMBOL(enable_kernel_spe); -#endif /* CONFIG_SPE */ -void -enable_kernel_fp(void) +void flush_spe_to_thread(struct task_struct *tsk) { - WARN_ON(preemptible()); - + if (tsk->thread.regs) { + preempt_disable(); + if (tsk->thread.regs->msr & MSR_SPE) { #ifdef CONFIG_SMP - if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) - giveup_fpu(current); - else - giveup_fpu(NULL); /* just enables FP for kernel */ -#else - giveup_fpu(last_task_used_math); -#endif /* CONFIG_SMP */ + BUG_ON(tsk != current); +#endif + giveup_spe(current); + } + preempt_enable(); + } } -EXPORT_SYMBOL(enable_kernel_fp); -int -dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs) +int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs) { - preempt_disable(); - if (tsk->thread.regs && (tsk->thread.regs->msr & MSR_FP)) - giveup_fpu(tsk); - preempt_enable(); - memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs)); + if (regs->msr & MSR_SPE) + giveup_spe(current); + /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */ + memcpy(evrregs, ¤t->thread.evr[0], sizeof(u32) * 35); return 1; } +#endif /* CONFIG_SPE */ struct task_struct *__switch_to(struct task_struct *prev, struct task_struct *new) @@ -287,11 +347,13 @@ struct task_struct *__switch_to(struct task_struct *prev, #endif /* CONFIG_SPE */ #endif /* CONFIG_SMP */ +#ifdef CONFIG_ALTIVEC /* Avoid the trap. On smp this this never happens since * we don't set last_task_used_altivec -- Cort */ if (new->thread.regs && last_task_used_altivec == new) new->thread.regs->msr |= MSR_VEC; +#endif #ifdef CONFIG_SPE /* Avoid the trap. On smp this this never happens since * we don't set last_task_used_spe @@ -355,6 +417,7 @@ void show_regs(struct pt_regs * regs) void exit_thread(void) { + preempt_disable(); if (last_task_used_math == current) last_task_used_math = NULL; if (last_task_used_altivec == current) @@ -363,10 +426,12 @@ void exit_thread(void) if (last_task_used_spe == current) last_task_used_spe = NULL; #endif + preempt_enable(); } void flush_thread(void) { + preempt_disable(); if (last_task_used_math == current) last_task_used_math = NULL; if (last_task_used_altivec == current) @@ -375,6 +440,7 @@ void flush_thread(void) if (last_task_used_spe == current) last_task_used_spe = NULL; #endif + preempt_enable(); } void @@ -473,6 +539,7 @@ void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp) regs->nip = nip; regs->gpr[1] = sp; regs->msr = MSR_USER; + preempt_disable(); if (last_task_used_math == current) last_task_used_math = NULL; if (last_task_used_altivec == current) @@ -481,8 +548,9 @@ void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp) if (last_task_used_spe == current) last_task_used_spe = NULL; #endif + preempt_enable(); memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); - current->thread.fpscr = 0; + current->thread.fpscr.val = 0; #ifdef CONFIG_ALTIVEC memset(current->thread.vr, 0, sizeof(current->thread.vr)); memset(¤t->thread.vscr, 0, sizeof(current->thread.vscr)); @@ -557,14 +625,16 @@ int sys_clone(unsigned long clone_flags, unsigned long usp, return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp); } -int sys_fork(int p1, int p2, int p3, int p4, int p5, int p6, +int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3, + unsigned long p4, unsigned long p5, unsigned long p6, struct pt_regs *regs) { CHECK_FULL_REGS(regs); return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL); } -int sys_vfork(int p1, int p2, int p3, int p4, int p5, int p6, +int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3, + unsigned long p4, unsigned long p5, unsigned long p6, struct pt_regs *regs) { CHECK_FULL_REGS(regs); diff --git a/arch/ppc/kernel/ptrace.c b/arch/ppc/kernel/ptrace.c deleted file mode 100644 index e7aee4108de..00000000000 --- a/arch/ppc/kernel/ptrace.c +++ /dev/null @@ -1,507 +0,0 @@ -/* - * arch/ppc/kernel/ptrace.c - * - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Derived from "arch/m68k/kernel/ptrace.c" - * Copyright (C) 1994 by Hamish Macdonald - * Taken from linux/kernel/ptrace.c and modified for M680x0. - * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds - * - * Modified by Cort Dougan (cort@hq.fsmlabs.com) - * and Paul Mackerras (paulus@linuxcare.com.au). - * - * This file is subject to the terms and conditions of the GNU General - * Public License. See the file README.legal in the main directory of - * this archive for more details. - */ - -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/mm.h> -#include <linux/smp.h> -#include <linux/smp_lock.h> -#include <linux/errno.h> -#include <linux/ptrace.h> -#include <linux/user.h> -#include <linux/security.h> -#include <linux/signal.h> -#include <linux/seccomp.h> -#include <linux/audit.h> -#include <linux/module.h> - -#include <asm/uaccess.h> -#include <asm/page.h> -#include <asm/pgtable.h> -#include <asm/system.h> - -/* - * Set of msr bits that gdb can change on behalf of a process. - */ -#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) -#define MSR_DEBUGCHANGE 0 -#else -#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE) -#endif - -/* - * does not yet catch signals sent when the child dies. - * in exit.c or in signal.c. - */ - -/* - * Get contents of register REGNO in task TASK. - */ -static inline unsigned long get_reg(struct task_struct *task, int regno) -{ - if (regno < sizeof(struct pt_regs) / sizeof(unsigned long) - && task->thread.regs != NULL) - return ((unsigned long *)task->thread.regs)[regno]; - return (0); -} - -/* - * Write contents of register REGNO in task TASK. - */ -static inline int put_reg(struct task_struct *task, int regno, - unsigned long data) -{ - if (regno <= PT_MQ && task->thread.regs != NULL) { - if (regno == PT_MSR) - data = (data & MSR_DEBUGCHANGE) - | (task->thread.regs->msr & ~MSR_DEBUGCHANGE); - ((unsigned long *)task->thread.regs)[regno] = data; - return 0; - } - return -EIO; -} - -#ifdef CONFIG_ALTIVEC -/* - * Get contents of AltiVec register state in task TASK - */ -static inline int get_vrregs(unsigned long __user *data, struct task_struct *task) -{ - int i, j; - - if (!access_ok(VERIFY_WRITE, data, 133 * sizeof(unsigned long))) - return -EFAULT; - - /* copy AltiVec registers VR[0] .. VR[31] */ - for (i = 0; i < 32; i++) - for (j = 0; j < 4; j++, data++) - if (__put_user(task->thread.vr[i].u[j], data)) - return -EFAULT; - - /* copy VSCR */ - for (i = 0; i < 4; i++, data++) - if (__put_user(task->thread.vscr.u[i], data)) - return -EFAULT; - - /* copy VRSAVE */ - if (__put_user(task->thread.vrsave, data)) - return -EFAULT; - - return 0; -} - -/* - * Write contents of AltiVec register state into task TASK. - */ -static inline int set_vrregs(struct task_struct *task, unsigned long __user *data) -{ - int i, j; - - if (!access_ok(VERIFY_READ, data, 133 * sizeof(unsigned long))) - return -EFAULT; - - /* copy AltiVec registers VR[0] .. VR[31] */ - for (i = 0; i < 32; i++) - for (j = 0; j < 4; j++, data++) - if (__get_user(task->thread.vr[i].u[j], data)) - return -EFAULT; - - /* copy VSCR */ - for (i = 0; i < 4; i++, data++) - if (__get_user(task->thread.vscr.u[i], data)) - return -EFAULT; - - /* copy VRSAVE */ - if (__get_user(task->thread.vrsave, data)) - return -EFAULT; - - return 0; -} -#endif - -#ifdef CONFIG_SPE - -/* - * For get_evrregs/set_evrregs functions 'data' has the following layout: - * - * struct { - * u32 evr[32]; - * u64 acc; - * u32 spefscr; - * } - */ - -/* - * Get contents of SPE register state in task TASK. - */ -static inline int get_evrregs(unsigned long *data, struct task_struct *task) -{ - int i; - - if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long))) - return -EFAULT; - - /* copy SPEFSCR */ - if (__put_user(task->thread.spefscr, &data[34])) - return -EFAULT; - - /* copy SPE registers EVR[0] .. EVR[31] */ - for (i = 0; i < 32; i++, data++) - if (__put_user(task->thread.evr[i], data)) - return -EFAULT; - - /* copy ACC */ - if (__put_user64(task->thread.acc, (unsigned long long *)data)) - return -EFAULT; - - return 0; -} - -/* - * Write contents of SPE register state into task TASK. - */ -static inline int set_evrregs(struct task_struct *task, unsigned long *data) -{ - int i; - - if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long))) - return -EFAULT; - - /* copy SPEFSCR */ - if (__get_user(task->thread.spefscr, &data[34])) - return -EFAULT; - - /* copy SPE registers EVR[0] .. EVR[31] */ - for (i = 0; i < 32; i++, data++) - if (__get_user(task->thread.evr[i], data)) - return -EFAULT; - /* copy ACC */ - if (__get_user64(task->thread.acc, (unsigned long long*)data)) - return -EFAULT; - - return 0; -} -#endif /* CONFIG_SPE */ - -static inline void -set_single_step(struct task_struct *task) -{ - struct pt_regs *regs = task->thread.regs; - - if (regs != NULL) { -#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) - task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC; - regs->msr |= MSR_DE; -#else - regs->msr |= MSR_SE; -#endif - } -} - -static inline void -clear_single_step(struct task_struct *task) -{ - struct pt_regs *regs = task->thread.regs; - - if (regs != NULL) { -#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) - task->thread.dbcr0 = 0; - regs->msr &= ~MSR_DE; -#else - regs->msr &= ~MSR_SE; -#endif - } -} - -/* - * Called by kernel/ptrace.c when detaching.. - * - * Make sure single step bits etc are not set. - */ -void ptrace_disable(struct task_struct *child) -{ - /* make sure the single step bit is not set. */ - clear_single_step(child); -} - -int sys_ptrace(long request, long pid, long addr, long data) -{ - struct task_struct *child; - int ret = -EPERM; - - lock_kernel(); - if (request == PTRACE_TRACEME) { - /* are we already being traced? */ - if (current->ptrace & PT_PTRACED) - goto out; - ret = security_ptrace(current->parent, current); - if (ret) - goto out; - /* set the ptrace bit in the process flags. */ - current->ptrace |= PT_PTRACED; - ret = 0; - goto out; - } - ret = -ESRCH; - read_lock(&tasklist_lock); - child = find_task_by_pid(pid); - if (child) - get_task_struct(child); - read_unlock(&tasklist_lock); - if (!child) - goto out; - - ret = -EPERM; - if (pid == 1) /* you may not mess with init */ - goto out_tsk; - - if (request == PTRACE_ATTACH) { - ret = ptrace_attach(child); - goto out_tsk; - } - - ret = ptrace_check_attach(child, request == PTRACE_KILL); - if (ret < 0) - goto out_tsk; - - switch (request) { - /* when I and D space are separate, these will need to be fixed. */ - case PTRACE_PEEKTEXT: /* read word at location addr. */ - case PTRACE_PEEKDATA: { - unsigned long tmp; - int copied; - - copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); - ret = -EIO; - if (copied != sizeof(tmp)) - break; - ret = put_user(tmp,(unsigned long __user *) data); - break; - } - - /* read the word at location addr in the USER area. */ - /* XXX this will need fixing for 64-bit */ - case PTRACE_PEEKUSR: { - unsigned long index, tmp; - - ret = -EIO; - /* convert to index and check */ - index = (unsigned long) addr >> 2; - if ((addr & 3) || index > PT_FPSCR - || child->thread.regs == NULL) - break; - - CHECK_FULL_REGS(child->thread.regs); - if (index < PT_FPR0) { - tmp = get_reg(child, (int) index); - } else { - preempt_disable(); - if (child->thread.regs->msr & MSR_FP) - giveup_fpu(child); - preempt_enable(); - tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; - } - ret = put_user(tmp,(unsigned long __user *) data); - break; - } - - /* If I and D space are separate, this will have to be fixed. */ - case PTRACE_POKETEXT: /* write the word at location addr. */ - case PTRACE_POKEDATA: - ret = 0; - if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data)) - break; - ret = -EIO; - break; - - /* write the word at location addr in the USER area */ - case PTRACE_POKEUSR: { - unsigned long index; - - ret = -EIO; - /* convert to index and check */ - index = (unsigned long) addr >> 2; - if ((addr & 3) || index > PT_FPSCR - || child->thread.regs == NULL) - break; - - CHECK_FULL_REGS(child->thread.regs); - if (index == PT_ORIG_R3) - break; - if (index < PT_FPR0) { - ret = put_reg(child, index, data); - } else { - preempt_disable(); - if (child->thread.regs->msr & MSR_FP) - giveup_fpu(child); - preempt_enable(); - ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; - ret = 0; - } - break; - } - - case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */ - case PTRACE_CONT: { /* restart after signal. */ - ret = -EIO; - if (!valid_signal(data)) - break; - if (request == PTRACE_SYSCALL) { - set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); - } else { - clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); - } - child->exit_code = data; - /* make sure the single step bit is not set. */ - clear_single_step(child); - wake_up_process(child); - ret = 0; - break; - } - -/* - * make the child exit. Best I can do is send it a sigkill. - * perhaps it should be put in the status that it wants to - * exit. - */ - case PTRACE_KILL: { - ret = 0; - if (child->exit_state == EXIT_ZOMBIE) /* already dead */ - break; - child->exit_code = SIGKILL; - /* make sure the single step bit is not set. */ - clear_single_step(child); - wake_up_process(child); - break; - } - - case PTRACE_SINGLESTEP: { /* set the trap flag. */ - ret = -EIO; - if (!valid_signal(data)) - break; - clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); - set_single_step(child); - child->exit_code = data; - /* give it a chance to run. */ - wake_up_process(child); - ret = 0; - break; - } - - case PTRACE_DETACH: - ret = ptrace_detach(child, data); - break; - -#ifdef CONFIG_ALTIVEC - case PTRACE_GETVRREGS: - /* Get the child altivec register state. */ - preempt_disable(); - if (child->thread.regs->msr & MSR_VEC) - giveup_altivec(child); - preempt_enable(); - ret = get_vrregs((unsigned long __user *)data, child); - break; - - case PTRACE_SETVRREGS: - /* Set the child altivec register state. */ - /* this is to clear the MSR_VEC bit to force a reload - * of register state from memory */ - preempt_disable(); - if (child->thread.regs->msr & MSR_VEC) - giveup_altivec(child); - preempt_enable(); - ret = set_vrregs(child, (unsigned long __user *)data); - break; -#endif -#ifdef CONFIG_SPE - case PTRACE_GETEVRREGS: - /* Get the child spe register state. */ - if (child->thread.regs->msr & MSR_SPE) - giveup_spe(child); - ret = get_evrregs((unsigned long __user *)data, child); - break; - - case PTRACE_SETEVRREGS: - /* Set the child spe register state. */ - /* this is to clear the MSR_SPE bit to force a reload - * of register state from memory */ - if (child->thread.regs->msr & MSR_SPE) - giveup_spe(child); - ret = set_evrregs(child, (unsigned long __user *)data); - break; -#endif - - default: - ret = ptrace_request(child, request, addr, data); - break; - } -out_tsk: - put_task_struct(child); -out: - unlock_kernel(); - return ret; -} - -static void do_syscall_trace(void) -{ - /* the 0x80 provides a way for the tracing parent to distinguish - between a syscall stop and SIGTRAP delivery */ - ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) - ? 0x80 : 0)); - - /* - * this isn't the same as continuing with a signal, but it will do - * for normal use. strace only continues with a signal if the - * stopping signal is not SIGTRAP. -brl - */ - if (current->exit_code) { - send_sig(current->exit_code, current, 1); - current->exit_code = 0; - } -} - -void do_syscall_trace_enter(struct pt_regs *regs) -{ - if (test_thread_flag(TIF_SYSCALL_TRACE) - && (current->ptrace & PT_PTRACED)) - do_syscall_trace(); - - if (unlikely(current->audit_context)) - audit_syscall_entry(current, AUDIT_ARCH_PPC, - regs->gpr[0], - regs->gpr[3], regs->gpr[4], - regs->gpr[5], regs->gpr[6]); -} - -void do_syscall_trace_leave(struct pt_regs *regs) -{ - secure_computing(regs->gpr[0]); - - if (unlikely(current->audit_context)) - audit_syscall_exit(current, - (regs->ccr&0x1000)?AUDITSC_FAILURE:AUDITSC_SUCCESS, - regs->result); - - if ((test_thread_flag(TIF_SYSCALL_TRACE)) - && (current->ptrace & PT_PTRACED)) - do_syscall_trace(); -} - -EXPORT_SYMBOL(do_syscall_trace_enter); -EXPORT_SYMBOL(do_syscall_trace_leave); diff --git a/arch/ppc/kernel/rio.c b/arch/ppc/kernel/rio.c new file mode 100644 index 00000000000..29487fedfc7 --- /dev/null +++ b/arch/ppc/kernel/rio.c @@ -0,0 +1,52 @@ +/* + * RapidIO PPC32 support + * + * Copyright 2005 MontaVista Software, Inc. + * Matt Porter <mporter@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/rio.h> + +#include <asm/rio.h> + +/** + * platform_rio_init - Do platform specific RIO init + * + * Any platform specific initialization of RapdIO + * hardware is done here as well as registration + * of any active master ports in the system. + */ +void __attribute__ ((weak)) + platform_rio_init(void) +{ + printk(KERN_WARNING "RIO: No platform_rio_init() present\n"); +} + +/** + * ppc_rio_init - Do PPC32 RIO init + * + * Calls platform-specific RIO init code and then calls + * rio_init_mports() to initialize any master ports that + * have been registered with the RIO subsystem. + */ +static int __init ppc_rio_init(void) +{ + printk(KERN_INFO "RIO: RapidIO init\n"); + + /* Platform specific initialization */ + platform_rio_init(); + + /* Enumerate all registered ports */ + rio_init_mports(); + + return 0; +} + +subsys_initcall(ppc_rio_init); diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c index 545cfd0fab5..0eb0b7085e6 100644 --- a/arch/ppc/kernel/setup.c +++ b/arch/ppc/kernel/setup.c @@ -71,10 +71,12 @@ struct ide_machdep_calls ppc_ide_md; unsigned long boot_mem_size; unsigned long ISA_DMA_THRESHOLD; -unsigned long DMA_MODE_READ, DMA_MODE_WRITE; +unsigned int DMA_MODE_READ; +unsigned int DMA_MODE_WRITE; #ifdef CONFIG_PPC_MULTIPLATFORM int _machine = 0; +EXPORT_SYMBOL(_machine); extern void prep_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7); @@ -82,8 +84,18 @@ extern void pmac_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7); extern void chrp_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7); + +dev_t boot_dev; #endif /* CONFIG_PPC_MULTIPLATFORM */ +int have_of; +EXPORT_SYMBOL(have_of); + +#ifdef __DO_IRQ_CANON +int ppc_do_canonicalize_irqs; +EXPORT_SYMBOL(ppc_do_canonicalize_irqs); +#endif + #ifdef CONFIG_MAGIC_SYSRQ unsigned long SYSRQ_KEY = 0x54; #endif /* CONFIG_MAGIC_SYSRQ */ @@ -185,18 +197,18 @@ int show_cpuinfo(struct seq_file *m, void *v) seq_printf(m, "processor\t: %d\n", i); seq_printf(m, "cpu\t\t: "); - if (cur_cpu_spec[i]->pvr_mask) - seq_printf(m, "%s", cur_cpu_spec[i]->cpu_name); + if (cur_cpu_spec->pvr_mask) + seq_printf(m, "%s", cur_cpu_spec->cpu_name); else seq_printf(m, "unknown (%08x)", pvr); #ifdef CONFIG_ALTIVEC - if (cur_cpu_spec[i]->cpu_features & CPU_FTR_ALTIVEC) + if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC) seq_printf(m, ", altivec supported"); #endif seq_printf(m, "\n"); #ifdef CONFIG_TAU - if (cur_cpu_spec[i]->cpu_features & CPU_FTR_TAU) { + if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { #ifdef CONFIG_TAU_AVERAGE /* more straightforward, but potentially misleading */ seq_printf(m, "temperature \t: %u C (uncalibrated)\n", @@ -339,7 +351,7 @@ early_init(int r3, int r4, int r5) * Assume here that all clock rates are the same in a * smp system. -- Cort */ -int __openfirmware +int of_show_percpuinfo(struct seq_file *m, int i) { struct device_node *cpu_node; @@ -404,11 +416,15 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, _machine = _MACH_prep; } +#ifdef CONFIG_PPC_PREP /* not much more to do here, if prep */ if (_machine == _MACH_prep) { prep_init(r3, r4, r5, r6, r7); return; } +#endif + + have_of = 1; /* prom_init has already been called from __start */ if (boot_infos) @@ -479,12 +495,16 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, #endif /* CONFIG_ADB */ switch (_machine) { +#ifdef CONFIG_PPC_PMAC case _MACH_Pmac: pmac_init(r3, r4, r5, r6, r7); break; +#endif +#ifdef CONFIG_PPC_CHRP case _MACH_chrp: chrp_init(r3, r4, r5, r6, r7); break; +#endif } } @@ -582,7 +602,19 @@ void parse_bootinfo(struct bi_record *rec) #endif /* CONFIG_BLK_DEV_INITRD */ #ifdef CONFIG_PPC_MULTIPLATFORM case BI_MACHTYPE: - _machine = data[0]; + /* Machine types changed with the merge. Since the + * bootinfo are now deprecated, we can just hard code + * the appropriate conversion here for when we are + * called with yaboot which passes us a machine type + * this way. + */ + switch(data[0]) { + case 1: _machine = _MACH_prep; break; + case 2: _machine = _MACH_Pmac; break; + case 4: _machine = _MACH_chrp; break; + default: + _machine = data[0]; + } break; #endif case BI_MEMSIZE: @@ -721,7 +753,7 @@ void __init setup_arch(char **cmdline_p) #endif #ifdef CONFIG_XMON - xmon_map_scc(); + xmon_init(1); if (strstr(cmd_line, "xmon")) xmon(NULL); #endif /* CONFIG_XMON */ @@ -745,12 +777,12 @@ void __init setup_arch(char **cmdline_p) * for a possibly more accurate value. */ if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) { - dcache_bsize = cur_cpu_spec[0]->dcache_bsize; - icache_bsize = cur_cpu_spec[0]->icache_bsize; + dcache_bsize = cur_cpu_spec->dcache_bsize; + icache_bsize = cur_cpu_spec->icache_bsize; ucache_bsize = 0; } else ucache_bsize = dcache_bsize = icache_bsize - = cur_cpu_spec[0]->dcache_bsize; + = cur_cpu_spec->dcache_bsize; /* reboot on panic */ panic_timeout = 180; diff --git a/arch/ppc/kernel/signal.c b/arch/ppc/kernel/signal.c deleted file mode 100644 index 2244bf91e59..00000000000 --- a/arch/ppc/kernel/signal.c +++ /dev/null @@ -1,771 +0,0 @@ -/* - * arch/ppc/kernel/signal.c - * - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Derived from "arch/i386/kernel/signal.c" - * Copyright (C) 1991, 1992 Linus Torvalds - * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/sched.h> -#include <linux/mm.h> -#include <linux/smp.h> -#include <linux/smp_lock.h> -#include <linux/kernel.h> -#include <linux/signal.h> -#include <linux/errno.h> -#include <linux/wait.h> -#include <linux/ptrace.h> -#include <linux/unistd.h> -#include <linux/stddef.h> -#include <linux/elf.h> -#include <linux/tty.h> -#include <linux/binfmts.h> -#include <linux/suspend.h> -#include <asm/ucontext.h> -#include <asm/uaccess.h> -#include <asm/pgtable.h> -#include <asm/cacheflush.h> - -#undef DEBUG_SIG - -#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) - -extern void sigreturn_exit(struct pt_regs *); - -#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs)) - -int do_signal(sigset_t *oldset, struct pt_regs *regs); - -/* - * Atomically swap in the new signal mask, and wait for a signal. - */ -int -sys_sigsuspend(old_sigset_t mask, int p2, int p3, int p4, int p6, int p7, - struct pt_regs *regs) -{ - sigset_t saveset; - - mask &= _BLOCKABLE; - spin_lock_irq(¤t->sighand->siglock); - saveset = current->blocked; - siginitset(¤t->blocked, mask); - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - regs->result = -EINTR; - regs->gpr[3] = EINTR; - regs->ccr |= 0x10000000; - while (1) { - current->state = TASK_INTERRUPTIBLE; - schedule(); - if (do_signal(&saveset, regs)) - sigreturn_exit(regs); - } -} - -int -sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, int p3, int p4, - int p6, int p7, struct pt_regs *regs) -{ - sigset_t saveset, newset; - - /* XXX: Don't preclude handling different sized sigset_t's. */ - if (sigsetsize != sizeof(sigset_t)) - return -EINVAL; - - if (copy_from_user(&newset, unewset, sizeof(newset))) - return -EFAULT; - sigdelsetmask(&newset, ~_BLOCKABLE); - - spin_lock_irq(¤t->sighand->siglock); - saveset = current->blocked; - current->blocked = newset; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - regs->result = -EINTR; - regs->gpr[3] = EINTR; - regs->ccr |= 0x10000000; - while (1) { - current->state = TASK_INTERRUPTIBLE; - schedule(); - if (do_signal(&saveset, regs)) - sigreturn_exit(regs); - } -} - - -int -sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, int r5, - int r6, int r7, int r8, struct pt_regs *regs) -{ - return do_sigaltstack(uss, uoss, regs->gpr[1]); -} - -int -sys_sigaction(int sig, const struct old_sigaction __user *act, - struct old_sigaction __user *oact) -{ - struct k_sigaction new_ka, old_ka; - int ret; - - if (act) { - old_sigset_t mask; - if (!access_ok(VERIFY_READ, act, sizeof(*act)) || - __get_user(new_ka.sa.sa_handler, &act->sa_handler) || - __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) - return -EFAULT; - __get_user(new_ka.sa.sa_flags, &act->sa_flags); - __get_user(mask, &act->sa_mask); - siginitset(&new_ka.sa.sa_mask, mask); - } - - ret = do_sigaction(sig, (act? &new_ka: NULL), (oact? &old_ka: NULL)); - - if (!ret && oact) { - if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || - __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || - __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) - return -EFAULT; - __put_user(old_ka.sa.sa_flags, &oact->sa_flags); - __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); - } - - return ret; -} - -/* - * When we have signals to deliver, we set up on the - * user stack, going down from the original stack pointer: - * a sigregs struct - * a sigcontext struct - * a gap of __SIGNAL_FRAMESIZE bytes - * - * Each of these things must be a multiple of 16 bytes in size. - * - */ -struct sigregs { - struct mcontext mctx; /* all the register values */ - /* Programs using the rs6000/xcoff abi can save up to 19 gp regs - and 18 fp regs below sp before decrementing it. */ - int abigap[56]; -}; - -/* We use the mc_pad field for the signal return trampoline. */ -#define tramp mc_pad - -/* - * When we have rt signals to deliver, we set up on the - * user stack, going down from the original stack pointer: - * one rt_sigframe struct (siginfo + ucontext + ABI gap) - * a gap of __SIGNAL_FRAMESIZE+16 bytes - * (the +16 is to get the siginfo and ucontext in the same - * positions as in older kernels). - * - * Each of these things must be a multiple of 16 bytes in size. - * - */ -struct rt_sigframe -{ - struct siginfo info; - struct ucontext uc; - /* Programs using the rs6000/xcoff abi can save up to 19 gp regs - and 18 fp regs below sp before decrementing it. */ - int abigap[56]; -}; - -/* - * Save the current user registers on the user stack. - * We only save the altivec/spe registers if the process has used - * altivec/spe instructions at some point. - */ -static int -save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, int sigret) -{ - /* save general and floating-point registers */ - CHECK_FULL_REGS(regs); - preempt_disable(); - if (regs->msr & MSR_FP) - giveup_fpu(current); -#ifdef CONFIG_ALTIVEC - if (current->thread.used_vr && (regs->msr & MSR_VEC)) - giveup_altivec(current); -#endif /* CONFIG_ALTIVEC */ -#ifdef CONFIG_SPE - if (current->thread.used_spe && (regs->msr & MSR_SPE)) - giveup_spe(current); -#endif /* CONFIG_ALTIVEC */ - preempt_enable(); - - if (__copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE) - || __copy_to_user(&frame->mc_fregs, current->thread.fpr, - ELF_NFPREG * sizeof(double))) - return 1; - - current->thread.fpscr = 0; /* turn off all fp exceptions */ - -#ifdef CONFIG_ALTIVEC - /* save altivec registers */ - if (current->thread.used_vr) { - if (__copy_to_user(&frame->mc_vregs, current->thread.vr, - ELF_NVRREG * sizeof(vector128))) - return 1; - /* set MSR_VEC in the saved MSR value to indicate that - frame->mc_vregs contains valid data */ - if (__put_user(regs->msr | MSR_VEC, &frame->mc_gregs[PT_MSR])) - return 1; - } - /* else assert((regs->msr & MSR_VEC) == 0) */ - - /* We always copy to/from vrsave, it's 0 if we don't have or don't - * use altivec. Since VSCR only contains 32 bits saved in the least - * significant bits of a vector, we "cheat" and stuff VRSAVE in the - * most significant bits of that same vector. --BenH - */ - if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32])) - return 1; -#endif /* CONFIG_ALTIVEC */ - -#ifdef CONFIG_SPE - /* save spe registers */ - if (current->thread.used_spe) { - if (__copy_to_user(&frame->mc_vregs, current->thread.evr, - ELF_NEVRREG * sizeof(u32))) - return 1; - /* set MSR_SPE in the saved MSR value to indicate that - frame->mc_vregs contains valid data */ - if (__put_user(regs->msr | MSR_SPE, &frame->mc_gregs[PT_MSR])) - return 1; - } - /* else assert((regs->msr & MSR_SPE) == 0) */ - - /* We always copy to/from spefscr */ - if (__put_user(current->thread.spefscr, (u32 *)&frame->mc_vregs + ELF_NEVRREG)) - return 1; -#endif /* CONFIG_SPE */ - - if (sigret) { - /* Set up the sigreturn trampoline: li r0,sigret; sc */ - if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) - || __put_user(0x44000002UL, &frame->tramp[1])) - return 1; - flush_icache_range((unsigned long) &frame->tramp[0], - (unsigned long) &frame->tramp[2]); - } - - return 0; -} - -/* - * Restore the current user register values from the user stack, - * (except for MSR). - */ -static int -restore_user_regs(struct pt_regs *regs, struct mcontext __user *sr, int sig) -{ - unsigned long save_r2 = 0; -#if defined(CONFIG_ALTIVEC) || defined(CONFIG_SPE) - unsigned long msr; -#endif - - /* backup/restore the TLS as we don't want it to be modified */ - if (!sig) - save_r2 = regs->gpr[2]; - /* copy up to but not including MSR */ - if (__copy_from_user(regs, &sr->mc_gregs, PT_MSR * sizeof(elf_greg_t))) - return 1; - /* copy from orig_r3 (the word after the MSR) up to the end */ - if (__copy_from_user(®s->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3], - GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t))) - return 1; - if (!sig) - regs->gpr[2] = save_r2; - - /* force the process to reload the FP registers from - current->thread when it next does FP instructions */ - regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1); - if (__copy_from_user(current->thread.fpr, &sr->mc_fregs, - sizeof(sr->mc_fregs))) - return 1; - -#ifdef CONFIG_ALTIVEC - /* force the process to reload the altivec registers from - current->thread when it next does altivec instructions */ - regs->msr &= ~MSR_VEC; - if (!__get_user(msr, &sr->mc_gregs[PT_MSR]) && (msr & MSR_VEC) != 0) { - /* restore altivec registers from the stack */ - if (__copy_from_user(current->thread.vr, &sr->mc_vregs, - sizeof(sr->mc_vregs))) - return 1; - } else if (current->thread.used_vr) - memset(¤t->thread.vr, 0, ELF_NVRREG * sizeof(vector128)); - - /* Always get VRSAVE back */ - if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32])) - return 1; -#endif /* CONFIG_ALTIVEC */ - -#ifdef CONFIG_SPE - /* force the process to reload the spe registers from - current->thread when it next does spe instructions */ - regs->msr &= ~MSR_SPE; - if (!__get_user(msr, &sr->mc_gregs[PT_MSR]) && (msr & MSR_SPE) != 0) { - /* restore spe registers from the stack */ - if (__copy_from_user(current->thread.evr, &sr->mc_vregs, - ELF_NEVRREG * sizeof(u32))) - return 1; - } else if (current->thread.used_spe) - memset(¤t->thread.evr, 0, ELF_NEVRREG * sizeof(u32)); - - /* Always get SPEFSCR back */ - if (__get_user(current->thread.spefscr, (u32 *)&sr->mc_vregs + ELF_NEVRREG)) - return 1; -#endif /* CONFIG_SPE */ - -#ifndef CONFIG_SMP - preempt_disable(); - if (last_task_used_math == current) - last_task_used_math = NULL; - if (last_task_used_altivec == current) - last_task_used_altivec = NULL; - if (last_task_used_spe == current) - last_task_used_spe = NULL; - preempt_enable(); -#endif - return 0; -} - -/* - * Restore the user process's signal mask - */ -static void -restore_sigmask(sigset_t *set) -{ - sigdelsetmask(set, ~_BLOCKABLE); - spin_lock_irq(¤t->sighand->siglock); - current->blocked = *set; - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); -} - -/* - * Set up a signal frame for a "real-time" signal handler - * (one which gets siginfo). - */ -static void -handle_rt_signal(unsigned long sig, struct k_sigaction *ka, - siginfo_t *info, sigset_t *oldset, struct pt_regs * regs, - unsigned long newsp) -{ - struct rt_sigframe __user *rt_sf; - struct mcontext __user *frame; - unsigned long origsp = newsp; - - /* Set up Signal Frame */ - /* Put a Real Time Context onto stack */ - newsp -= sizeof(*rt_sf); - rt_sf = (struct rt_sigframe __user *) newsp; - - /* create a stack frame for the caller of the handler */ - newsp -= __SIGNAL_FRAMESIZE + 16; - - if (!access_ok(VERIFY_WRITE, (void __user *) newsp, origsp - newsp)) - goto badframe; - - /* Put the siginfo & fill in most of the ucontext */ - if (copy_siginfo_to_user(&rt_sf->info, info) - || __put_user(0, &rt_sf->uc.uc_flags) - || __put_user(0, &rt_sf->uc.uc_link) - || __put_user(current->sas_ss_sp, &rt_sf->uc.uc_stack.ss_sp) - || __put_user(sas_ss_flags(regs->gpr[1]), - &rt_sf->uc.uc_stack.ss_flags) - || __put_user(current->sas_ss_size, &rt_sf->uc.uc_stack.ss_size) - || __put_user(&rt_sf->uc.uc_mcontext, &rt_sf->uc.uc_regs) - || __copy_to_user(&rt_sf->uc.uc_sigmask, oldset, sizeof(*oldset))) - goto badframe; - - /* Save user registers on the stack */ - frame = &rt_sf->uc.uc_mcontext; - if (save_user_regs(regs, frame, __NR_rt_sigreturn)) - goto badframe; - - if (put_user(regs->gpr[1], (unsigned long __user *)newsp)) - goto badframe; - regs->gpr[1] = newsp; - regs->gpr[3] = sig; - regs->gpr[4] = (unsigned long) &rt_sf->info; - regs->gpr[5] = (unsigned long) &rt_sf->uc; - regs->gpr[6] = (unsigned long) rt_sf; - regs->nip = (unsigned long) ka->sa.sa_handler; - regs->link = (unsigned long) frame->tramp; - regs->trap = 0; - - return; - -badframe: -#ifdef DEBUG_SIG - printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n", - regs, frame, newsp); -#endif - force_sigsegv(sig, current); -} - -static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig) -{ - sigset_t set; - struct mcontext __user *mcp; - - if (__copy_from_user(&set, &ucp->uc_sigmask, sizeof(set)) - || __get_user(mcp, &ucp->uc_regs)) - return -EFAULT; - restore_sigmask(&set); - if (restore_user_regs(regs, mcp, sig)) - return -EFAULT; - - return 0; -} - -int sys_swapcontext(struct ucontext __user *old_ctx, - struct ucontext __user *new_ctx, - int ctx_size, int r6, int r7, int r8, struct pt_regs *regs) -{ - unsigned char tmp; - - /* Context size is for future use. Right now, we only make sure - * we are passed something we understand - */ - if (ctx_size < sizeof(struct ucontext)) - return -EINVAL; - - if (old_ctx != NULL) { - if (!access_ok(VERIFY_WRITE, old_ctx, sizeof(*old_ctx)) - || save_user_regs(regs, &old_ctx->uc_mcontext, 0) - || __copy_to_user(&old_ctx->uc_sigmask, - ¤t->blocked, sizeof(sigset_t)) - || __put_user(&old_ctx->uc_mcontext, &old_ctx->uc_regs)) - return -EFAULT; - } - if (new_ctx == NULL) - return 0; - if (!access_ok(VERIFY_READ, new_ctx, sizeof(*new_ctx)) - || __get_user(tmp, (u8 __user *) new_ctx) - || __get_user(tmp, (u8 __user *) (new_ctx + 1) - 1)) - return -EFAULT; - - /* - * If we get a fault copying the context into the kernel's - * image of the user's registers, we can't just return -EFAULT - * because the user's registers will be corrupted. For instance - * the NIP value may have been updated but not some of the - * other registers. Given that we have done the access_ok - * and successfully read the first and last bytes of the region - * above, this should only happen in an out-of-memory situation - * or if another thread unmaps the region containing the context. - * We kill the task with a SIGSEGV in this situation. - */ - if (do_setcontext(new_ctx, regs, 0)) - do_exit(SIGSEGV); - sigreturn_exit(regs); - /* doesn't actually return back to here */ - return 0; -} - -int sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8, - struct pt_regs *regs) -{ - struct rt_sigframe __user *rt_sf; - - /* Always make any pending restarted system calls return -EINTR */ - current_thread_info()->restart_block.fn = do_no_restart_syscall; - - rt_sf = (struct rt_sigframe __user *) - (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16); - if (!access_ok(VERIFY_READ, rt_sf, sizeof(struct rt_sigframe))) - goto bad; - if (do_setcontext(&rt_sf->uc, regs, 1)) - goto bad; - - /* - * It's not clear whether or why it is desirable to save the - * sigaltstack setting on signal delivery and restore it on - * signal return. But other architectures do this and we have - * always done it up until now so it is probably better not to - * change it. -- paulus - */ - do_sigaltstack(&rt_sf->uc.uc_stack, NULL, regs->gpr[1]); - - sigreturn_exit(regs); /* doesn't return here */ - return 0; - - bad: - force_sig(SIGSEGV, current); - return 0; -} - -int sys_debug_setcontext(struct ucontext __user *ctx, - int ndbg, struct sig_dbg_op __user *dbg, - int r6, int r7, int r8, - struct pt_regs *regs) -{ - struct sig_dbg_op op; - int i; - unsigned long new_msr = regs->msr; -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) - unsigned long new_dbcr0 = current->thread.dbcr0; -#endif - - for (i=0; i<ndbg; i++) { - if (__copy_from_user(&op, dbg, sizeof(op))) - return -EFAULT; - switch (op.dbg_type) { - case SIG_DBG_SINGLE_STEPPING: -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) - if (op.dbg_value) { - new_msr |= MSR_DE; - new_dbcr0 |= (DBCR0_IDM | DBCR0_IC); - } else { - new_msr &= ~MSR_DE; - new_dbcr0 &= ~(DBCR0_IDM | DBCR0_IC); - } -#else - if (op.dbg_value) - new_msr |= MSR_SE; - else - new_msr &= ~MSR_SE; -#endif - break; - case SIG_DBG_BRANCH_TRACING: -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) - return -EINVAL; -#else - if (op.dbg_value) - new_msr |= MSR_BE; - else - new_msr &= ~MSR_BE; -#endif - break; - - default: - return -EINVAL; - } - } - - /* We wait until here to actually install the values in the - registers so if we fail in the above loop, it will not - affect the contents of these registers. After this point, - failure is a problem, anyway, and it's very unlikely unless - the user is really doing something wrong. */ - regs->msr = new_msr; -#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) - current->thread.dbcr0 = new_dbcr0; -#endif - - /* - * If we get a fault copying the context into the kernel's - * image of the user's registers, we can't just return -EFAULT - * because the user's registers will be corrupted. For instance - * the NIP value may have been updated but not some of the - * other registers. Given that we have done the access_ok - * and successfully read the first and last bytes of the region - * above, this should only happen in an out-of-memory situation - * or if another thread unmaps the region containing the context. - * We kill the task with a SIGSEGV in this situation. - */ - if (do_setcontext(ctx, regs, 1)) { - force_sig(SIGSEGV, current); - goto out; - } - - /* - * It's not clear whether or why it is desirable to save the - * sigaltstack setting on signal delivery and restore it on - * signal return. But other architectures do this and we have - * always done it up until now so it is probably better not to - * change it. -- paulus - */ - do_sigaltstack(&ctx->uc_stack, NULL, regs->gpr[1]); - - sigreturn_exit(regs); - /* doesn't actually return back to here */ - - out: - return 0; -} - -/* - * OK, we're invoking a handler - */ -static void -handle_signal(unsigned long sig, struct k_sigaction *ka, - siginfo_t *info, sigset_t *oldset, struct pt_regs * regs, - unsigned long newsp) -{ - struct sigcontext __user *sc; - struct sigregs __user *frame; - unsigned long origsp = newsp; - - /* Set up Signal Frame */ - newsp -= sizeof(struct sigregs); - frame = (struct sigregs __user *) newsp; - - /* Put a sigcontext on the stack */ - newsp -= sizeof(*sc); - sc = (struct sigcontext __user *) newsp; - - /* create a stack frame for the caller of the handler */ - newsp -= __SIGNAL_FRAMESIZE; - - if (!access_ok(VERIFY_WRITE, (void __user *) newsp, origsp - newsp)) - goto badframe; - -#if _NSIG != 64 -#error "Please adjust handle_signal()" -#endif - if (__put_user((unsigned long) ka->sa.sa_handler, &sc->handler) - || __put_user(oldset->sig[0], &sc->oldmask) - || __put_user(oldset->sig[1], &sc->_unused[3]) - || __put_user((struct pt_regs __user *)frame, &sc->regs) - || __put_user(sig, &sc->signal)) - goto badframe; - - if (save_user_regs(regs, &frame->mctx, __NR_sigreturn)) - goto badframe; - - if (put_user(regs->gpr[1], (unsigned long __user *)newsp)) - goto badframe; - regs->gpr[1] = newsp; - regs->gpr[3] = sig; - regs->gpr[4] = (unsigned long) sc; - regs->nip = (unsigned long) ka->sa.sa_handler; - regs->link = (unsigned long) frame->mctx.tramp; - regs->trap = 0; - - return; - -badframe: -#ifdef DEBUG_SIG - printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n", - regs, frame, newsp); -#endif - force_sigsegv(sig, current); -} - -/* - * Do a signal return; undo the signal stack. - */ -int sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8, - struct pt_regs *regs) -{ - struct sigcontext __user *sc; - struct sigcontext sigctx; - struct mcontext __user *sr; - sigset_t set; - - /* Always make any pending restarted system calls return -EINTR */ - current_thread_info()->restart_block.fn = do_no_restart_syscall; - - sc = (struct sigcontext __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE); - if (copy_from_user(&sigctx, sc, sizeof(sigctx))) - goto badframe; - - set.sig[0] = sigctx.oldmask; - set.sig[1] = sigctx._unused[3]; - restore_sigmask(&set); - - sr = (struct mcontext __user *) sigctx.regs; - if (!access_ok(VERIFY_READ, sr, sizeof(*sr)) - || restore_user_regs(regs, sr, 1)) - goto badframe; - - sigreturn_exit(regs); /* doesn't return */ - return 0; - -badframe: - force_sig(SIGSEGV, current); - return 0; -} - -/* - * Note that 'init' is a special process: it doesn't get signals it doesn't - * want to handle. Thus you cannot kill init even with a SIGKILL even by - * mistake. - */ -int do_signal(sigset_t *oldset, struct pt_regs *regs) -{ - siginfo_t info; - struct k_sigaction ka; - unsigned long frame, newsp; - int signr, ret; - - if (try_to_freeze()) { - signr = 0; - if (!signal_pending(current)) - goto no_signal; - } - - if (!oldset) - oldset = ¤t->blocked; - - newsp = frame = 0; - - signr = get_signal_to_deliver(&info, &ka, regs, NULL); - no_signal: - if (TRAP(regs) == 0x0C00 /* System Call! */ - && regs->ccr & 0x10000000 /* error signalled */ - && ((ret = regs->gpr[3]) == ERESTARTSYS - || ret == ERESTARTNOHAND || ret == ERESTARTNOINTR - || ret == ERESTART_RESTARTBLOCK)) { - - if (signr > 0 - && (ret == ERESTARTNOHAND || ret == ERESTART_RESTARTBLOCK - || (ret == ERESTARTSYS - && !(ka.sa.sa_flags & SA_RESTART)))) { - /* make the system call return an EINTR error */ - regs->result = -EINTR; - regs->gpr[3] = EINTR; - /* note that the cr0.SO bit is already set */ - } else { - regs->nip -= 4; /* Back up & retry system call */ - regs->result = 0; - regs->trap = 0; - if (ret == ERESTART_RESTARTBLOCK) - regs->gpr[0] = __NR_restart_syscall; - else - regs->gpr[3] = regs->orig_gpr3; - } - } - - if (signr == 0) - return 0; /* no signals delivered */ - - if ((ka.sa.sa_flags & SA_ONSTACK) && current->sas_ss_size - && !on_sig_stack(regs->gpr[1])) - newsp = current->sas_ss_sp + current->sas_ss_size; - else - newsp = regs->gpr[1]; - newsp &= ~0xfUL; - - /* Whee! Actually deliver the signal. */ - if (ka.sa.sa_flags & SA_SIGINFO) - handle_rt_signal(signr, &ka, &info, oldset, regs, newsp); - else - handle_signal(signr, &ka, &info, oldset, regs, newsp); - - spin_lock_irq(¤t->sighand->siglock); - sigorsets(¤t->blocked,¤t->blocked,&ka.sa.sa_mask); - if (!(ka.sa.sa_flags & SA_NODEFER)) - sigaddset(¤t->blocked, signr); - recalc_sigpending(); - spin_unlock_irq(¤t->sighand->siglock); - - return 1; -} - diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c index 726fe7ce174..43b8fc2ca59 100644 --- a/arch/ppc/kernel/smp.c +++ b/arch/ppc/kernel/smp.c @@ -34,11 +34,11 @@ #include <asm/thread_info.h> #include <asm/tlbflush.h> #include <asm/xmon.h> +#include <asm/machdep.h> volatile int smp_commenced; int smp_tb_synchronized; struct cpuinfo_PPC cpu_data[NR_CPUS]; -struct klock_info_struct klock_info = { KLOCK_CLEAR, 0 }; atomic_t ipi_recv; atomic_t ipi_sent; cpumask_t cpu_online_map; @@ -51,7 +51,7 @@ EXPORT_SYMBOL(cpu_online_map); EXPORT_SYMBOL(cpu_possible_map); /* SMP operations for this machine */ -static struct smp_ops_t *smp_ops; +struct smp_ops_t *smp_ops; /* all cpu mappings are 1-1 -- Cort */ volatile unsigned long cpu_callin_map[NR_CPUS]; @@ -74,11 +74,11 @@ extern void __save_cpu_setup(void); #define PPC_MSG_XMON_BREAK 3 static inline void -smp_message_pass(int target, int msg, unsigned long data, int wait) +smp_message_pass(int target, int msg) { - if (smp_ops){ + if (smp_ops) { atomic_inc(&ipi_sent); - smp_ops->message_pass(target,msg,data,wait); + smp_ops->message_pass(target, msg); } } @@ -119,7 +119,7 @@ void smp_message_recv(int msg, struct pt_regs *regs) void smp_send_tlb_invalidate(int cpu) { if ( PVR_VER(mfspr(SPRN_PVR)) == 8 ) - smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB, 0, 0); + smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB); } void smp_send_reschedule(int cpu) @@ -135,13 +135,13 @@ void smp_send_reschedule(int cpu) */ /* This is only used if `cpu' is running an idle task, so it will reschedule itself anyway... */ - smp_message_pass(cpu, PPC_MSG_RESCHEDULE, 0, 0); + smp_message_pass(cpu, PPC_MSG_RESCHEDULE); } #ifdef CONFIG_XMON void smp_send_xmon_break(int cpu) { - smp_message_pass(cpu, PPC_MSG_XMON_BREAK, 0, 0); + smp_message_pass(cpu, PPC_MSG_XMON_BREAK); } #endif /* CONFIG_XMON */ @@ -224,7 +224,7 @@ static int __smp_call_function(void (*func) (void *info), void *info, spin_lock(&call_lock); call_data = &data; /* Send a message to all other CPUs and wait for them to respond */ - smp_message_pass(target, PPC_MSG_CALL_FUNCTION, 0, 0); + smp_message_pass(target, PPC_MSG_CALL_FUNCTION); /* Wait for response */ timeout = 1000000; @@ -294,7 +294,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus) smp_store_cpu_info(smp_processor_id()); cpu_callin_map[smp_processor_id()] = 1; - smp_ops = ppc_md.smp_ops; if (smp_ops == NULL) { printk("SMP not supported on this machine.\n"); return; @@ -308,9 +307,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus) /* Backup CPU 0 state */ __save_cpu_setup(); - if (smp_ops->space_timers) - smp_ops->space_timers(num_cpus); - for_each_cpu(cpu) { if (cpu == smp_processor_id()) continue; @@ -345,6 +341,7 @@ int __devinit start_secondary(void *unused) cpu = smp_processor_id(); smp_store_cpu_info(cpu); set_dec(tb_ticks_per_jiffy); + preempt_disable(); cpu_callin_map[cpu] = 1; printk("CPU %d done callin...\n", cpu); diff --git a/arch/ppc/kernel/syscalls.c b/arch/ppc/kernel/syscalls.c deleted file mode 100644 index 127f040de9d..00000000000 --- a/arch/ppc/kernel/syscalls.c +++ /dev/null @@ -1,268 +0,0 @@ -/* - * arch/ppc/kernel/sys_ppc.c - * - * PowerPC version - * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) - * - * Derived from "arch/i386/kernel/sys_i386.c" - * Adapted from the i386 version by Gary Thomas - * Modified by Cort Dougan (cort@cs.nmt.edu) - * and Paul Mackerras (paulus@cs.anu.edu.au). - * - * This file contains various random system calls that - * have a non-standard calling sequence on the Linux/PPC - * platform. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -#include <linux/errno.h> -#include <linux/sched.h> -#include <linux/mm.h> -#include <linux/smp.h> -#include <linux/smp_lock.h> -#include <linux/sem.h> -#include <linux/msg.h> -#include <linux/shm.h> -#include <linux/stat.h> -#include <linux/syscalls.h> -#include <linux/mman.h> -#include <linux/sys.h> -#include <linux/ipc.h> -#include <linux/utsname.h> -#include <linux/file.h> -#include <linux/unistd.h> - -#include <asm/uaccess.h> -#include <asm/ipc.h> -#include <asm/semaphore.h> - - -/* - * sys_ipc() is the de-multiplexer for the SysV IPC calls.. - * - * This is really horribly ugly. - */ -int -sys_ipc (uint call, int first, int second, int third, void __user *ptr, long fifth) -{ - int version, ret; - - version = call >> 16; /* hack for backward compatibility */ - call &= 0xffff; - - ret = -ENOSYS; - switch (call) { - case SEMOP: - ret = sys_semtimedop (first, (struct sembuf __user *)ptr, - second, NULL); - break; - case SEMTIMEDOP: - ret = sys_semtimedop (first, (struct sembuf __user *)ptr, - second, (const struct timespec __user *) fifth); - break; - case SEMGET: - ret = sys_semget (first, second, third); - break; - case SEMCTL: { - union semun fourth; - - if (!ptr) - break; - if ((ret = access_ok(VERIFY_READ, ptr, sizeof(long)) ? 0 : -EFAULT) - || (ret = get_user(fourth.__pad, (void __user *__user *)ptr))) - break; - ret = sys_semctl (first, second, third, fourth); - break; - } - case MSGSND: - ret = sys_msgsnd (first, (struct msgbuf __user *) ptr, second, third); - break; - case MSGRCV: - switch (version) { - case 0: { - struct ipc_kludge tmp; - - if (!ptr) - break; - if ((ret = access_ok(VERIFY_READ, ptr, sizeof(tmp)) ? 0 : -EFAULT) - || (ret = copy_from_user(&tmp, - (struct ipc_kludge __user *) ptr, - sizeof (tmp)) ? -EFAULT : 0)) - break; - ret = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp, - third); - break; - } - default: - ret = sys_msgrcv (first, (struct msgbuf __user *) ptr, - second, fifth, third); - break; - } - break; - case MSGGET: - ret = sys_msgget ((key_t) first, second); - break; - case MSGCTL: - ret = sys_msgctl (first, second, (struct msqid_ds __user *) ptr); - break; - case SHMAT: { - ulong raddr; - - if ((ret = access_ok(VERIFY_WRITE, (ulong __user *) third, - sizeof(ulong)) ? 0 : -EFAULT)) - break; - ret = do_shmat (first, (char __user *) ptr, second, &raddr); - if (ret) - break; - ret = put_user (raddr, (ulong __user *) third); - break; - } - case SHMDT: - ret = sys_shmdt ((char __user *)ptr); - break; - case SHMGET: - ret = sys_shmget (first, second, third); - break; - case SHMCTL: - ret = sys_shmctl (first, second, (struct shmid_ds __user *) ptr); - break; - } - - return ret; -} - -/* - * sys_pipe() is the normal C calling standard for creating - * a pipe. It's not the way unix traditionally does this, though. - */ -int sys_pipe(int __user *fildes) -{ - int fd[2]; - int error; - - error = do_pipe(fd); - if (!error) { - if (copy_to_user(fildes, fd, 2*sizeof(int))) - error = -EFAULT; - } - return error; -} - -static inline unsigned long -do_mmap2(unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - struct file * file = NULL; - int ret = -EBADF; - - flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE); - if (!(flags & MAP_ANONYMOUS)) { - if (!(file = fget(fd))) - goto out; - } - - down_write(¤t->mm->mmap_sem); - ret = do_mmap_pgoff(file, addr, len, prot, flags, pgoff); - up_write(¤t->mm->mmap_sem); - if (file) - fput(file); -out: - return ret; -} - -unsigned long sys_mmap2(unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, unsigned long pgoff) -{ - return do_mmap2(addr, len, prot, flags, fd, pgoff); -} - -unsigned long sys_mmap(unsigned long addr, size_t len, - unsigned long prot, unsigned long flags, - unsigned long fd, off_t offset) -{ - int err = -EINVAL; - - if (offset & ~PAGE_MASK) - goto out; - - err = do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); -out: - return err; -} - -/* - * Due to some executables calling the wrong select we sometimes - * get wrong args. This determines how the args are being passed - * (a single ptr to them all args passed) then calls - * sys_select() with the appropriate args. -- Cort - */ -int -ppc_select(int n, fd_set __user *inp, fd_set __user *outp, fd_set __user *exp, struct timeval __user *tvp) -{ - if ( (unsigned long)n >= 4096 ) - { - unsigned long __user *buffer = (unsigned long __user *)n; - if (!access_ok(VERIFY_READ, buffer, 5*sizeof(unsigned long)) - || __get_user(n, buffer) - || __get_user(inp, ((fd_set __user * __user *)(buffer+1))) - || __get_user(outp, ((fd_set __user * __user *)(buffer+2))) - || __get_user(exp, ((fd_set __user * __user *)(buffer+3))) - || __get_user(tvp, ((struct timeval __user * __user *)(buffer+4)))) - return -EFAULT; - } - return sys_select(n, inp, outp, exp, tvp); -} - -int sys_uname(struct old_utsname __user * name) -{ - int err = -EFAULT; - - down_read(&uts_sem); - if (name && !copy_to_user(name, &system_utsname, sizeof (*name))) - err = 0; - up_read(&uts_sem); - return err; -} - -int sys_olduname(struct oldold_utsname __user * name) -{ - int error; - - if (!name) - return -EFAULT; - if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname))) - return -EFAULT; - - down_read(&uts_sem); - error = __copy_to_user(&name->sysname,&system_utsname.sysname,__OLD_UTS_LEN); - error -= __put_user(0,name->sysname+__OLD_UTS_LEN); - error -= __copy_to_user(&name->nodename,&system_utsname.nodename,__OLD_UTS_LEN); - error -= __put_user(0,name->nodename+__OLD_UTS_LEN); - error -= __copy_to_user(&name->release,&system_utsname.release,__OLD_UTS_LEN); - error -= __put_user(0,name->release+__OLD_UTS_LEN); - error -= __copy_to_user(&name->version,&system_utsname.version,__OLD_UTS_LEN); - error -= __put_user(0,name->version+__OLD_UTS_LEN); - error -= __copy_to_user(&name->machine,&system_utsname.machine,__OLD_UTS_LEN); - error = __put_user(0,name->machine+__OLD_UTS_LEN); - up_read(&uts_sem); - - error = error ? -EFAULT : 0; - return error; -} - -/* - * We put the arguments in a different order so we only use 6 - * registers for arguments, rather than 7 as sys_fadvise64_64 needs - * (because `offset' goes in r5/r6). - */ -long ppc_fadvise64_64(int fd, int advice, loff_t offset, loff_t len) -{ - return sys_fadvise64_64(fd, offset, len, advice); -} diff --git a/arch/ppc/kernel/time.c b/arch/ppc/kernel/time.c index 22d7fd1e0ae..53ea723af60 100644 --- a/arch/ppc/kernel/time.c +++ b/arch/ppc/kernel/time.c @@ -66,11 +66,6 @@ #include <asm/time.h> -/* XXX false sharing with below? */ -u64 jiffies_64 = INITIAL_JIFFIES; - -EXPORT_SYMBOL(jiffies_64); - unsigned long disarm_decr[NR_CPUS]; extern struct timezone sys_tz; @@ -121,6 +116,15 @@ unsigned long profile_pc(struct pt_regs *regs) EXPORT_SYMBOL(profile_pc); #endif +void wakeup_decrementer(void) +{ + set_dec(tb_ticks_per_jiffy); + /* No currently-supported powerbook has a 601, + * so use get_tbl, not native + */ + last_jiffy_stamp(0) = tb_last_stamp = get_tbl(); +} + /* * timer_interrupt - gets called when the decrementer overflows, * with interrupts disabled. diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c index 961ede87be7..9dbc4d28fa2 100644 --- a/arch/ppc/kernel/traps.c +++ b/arch/ppc/kernel/traps.c @@ -41,10 +41,15 @@ #ifdef CONFIG_PMAC_BACKLIGHT #include <asm/backlight.h> #endif -#include <asm/perfmon.h> +#include <asm/pmc.h> #ifdef CONFIG_XMON -void (*debugger)(struct pt_regs *regs) = xmon; +extern int xmon_bpt(struct pt_regs *regs); +extern int xmon_sstep(struct pt_regs *regs); +extern int xmon_iabr_match(struct pt_regs *regs); +extern int xmon_dabr_match(struct pt_regs *regs); + +int (*debugger)(struct pt_regs *regs) = xmon; int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt; int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep; int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match; @@ -52,7 +57,7 @@ int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match; void (*debugger_fault_handler)(struct pt_regs *regs); #else #ifdef CONFIG_KGDB -void (*debugger)(struct pt_regs *regs); +int (*debugger)(struct pt_regs *regs); int (*debugger_bpt)(struct pt_regs *regs); int (*debugger_sstep)(struct pt_regs *regs); int (*debugger_iabr_match)(struct pt_regs *regs); @@ -74,7 +79,7 @@ void (*debugger_fault_handler)(struct pt_regs *regs); DEFINE_SPINLOCK(die_lock); -void die(const char * str, struct pt_regs * fp, long err) +int die(const char * str, struct pt_regs * fp, long err) { static int die_counter; int nl = 0; @@ -154,7 +159,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr) */ static inline int check_io_access(struct pt_regs *regs) { -#ifdef CONFIG_PPC_PMAC +#if defined CONFIG_PPC_PMAC || defined CONFIG_8xx unsigned long msr = regs->msr; const struct exception_table_entry *entry; unsigned int *nip = (unsigned int *)regs->nip; @@ -173,7 +178,11 @@ static inline int check_io_access(struct pt_regs *regs) nip -= 2; else if (*nip == 0x4c00012c) /* isync */ --nip; - if (*nip == 0x7c0004ac || (*nip >> 26) == 3) { + /* eieio from I/O string functions */ + else if ((*nip) == 0x7c0006ac || *(nip+1) == 0x7c0006ac) + nip += 2; + if (*nip == 0x7c0004ac || (*nip >> 26) == 3 || + (*(nip+1) >> 26) == 3) { /* sync or twi */ unsigned int rb; @@ -232,7 +241,7 @@ platform_machine_check(struct pt_regs *regs) { } -void MachineCheckException(struct pt_regs *regs) +void machine_check_exception(struct pt_regs *regs) { unsigned long reason = get_mc_reason(regs); @@ -393,14 +402,14 @@ void SMIException(struct pt_regs *regs) #endif } -void UnknownException(struct pt_regs *regs) +void unknown_exception(struct pt_regs *regs) { printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n", regs->nip, regs->msr, regs->trap, print_tainted()); _exception(SIGTRAP, regs, 0, 0); } -void InstructionBreakpoint(struct pt_regs *regs) +void instruction_breakpoint_exception(struct pt_regs *regs) { if (debugger_iabr_match(regs)) return; @@ -575,7 +584,7 @@ extern struct bug_entry __start___bug_table[], __stop___bug_table[]; #define module_find_bug(x) NULL #endif -static struct bug_entry *find_bug(unsigned long bugaddr) +struct bug_entry *find_bug(unsigned long bugaddr) { struct bug_entry *bug; @@ -601,28 +610,28 @@ int check_bug_trap(struct pt_regs *regs) if (bug->line & BUG_WARNING_TRAP) { /* this is a WARN_ON rather than BUG/BUG_ON */ #ifdef CONFIG_XMON - xmon_printf(KERN_ERR "Badness in %s at %s:%d\n", + xmon_printf(KERN_ERR "Badness in %s at %s:%ld\n", bug->function, bug->file, bug->line & ~BUG_WARNING_TRAP); #endif /* CONFIG_XMON */ - printk(KERN_ERR "Badness in %s at %s:%d\n", + printk(KERN_ERR "Badness in %s at %s:%ld\n", bug->function, bug->file, bug->line & ~BUG_WARNING_TRAP); dump_stack(); return 1; } #ifdef CONFIG_XMON - xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%d!\n", + xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%ld!\n", bug->function, bug->file, bug->line); xmon(regs); #endif /* CONFIG_XMON */ - printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n", + printk(KERN_CRIT "kernel BUG in %s at %s:%ld!\n", bug->function, bug->file, bug->line); return 0; } -void ProgramCheckException(struct pt_regs *regs) +void program_check_exception(struct pt_regs *regs) { unsigned int reason = get_reason(regs); extern int do_mathemu(struct pt_regs *regs); @@ -654,7 +663,7 @@ void ProgramCheckException(struct pt_regs *regs) giveup_fpu(current); preempt_enable(); - fpscr = current->thread.fpscr; + fpscr = current->thread.fpscr.val; fpscr &= fpscr << 22; /* mask summary bits with enables */ if (fpscr & FPSCR_VX) code = FPE_FLTINV; @@ -701,7 +710,7 @@ void ProgramCheckException(struct pt_regs *regs) _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); } -void SingleStepException(struct pt_regs *regs) +void single_step_exception(struct pt_regs *regs) { regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ if (debugger_sstep(regs)) @@ -709,7 +718,7 @@ void SingleStepException(struct pt_regs *regs) _exception(SIGTRAP, regs, TRAP_TRACE, 0); } -void AlignmentException(struct pt_regs *regs) +void alignment_exception(struct pt_regs *regs) { int fixed; @@ -814,7 +823,18 @@ void TAUException(struct pt_regs *regs) } #endif /* CONFIG_INT_TAU */ -void AltivecUnavailException(struct pt_regs *regs) +/* + * FP unavailable trap from kernel - print a message, but let + * the task use FP in the kernel until it returns to user mode. + */ +void kernel_fp_unavailable_exception(struct pt_regs *regs) +{ + regs->msr |= MSR_FP; + printk(KERN_ERR "floating point used in kernel (task=%p, pc=%lx)\n", + current, regs->nip); +} + +void altivec_unavailable_exception(struct pt_regs *regs) { static int kernel_altivec_count; @@ -835,7 +855,7 @@ void AltivecUnavailException(struct pt_regs *regs) } #ifdef CONFIG_ALTIVEC -void AltivecAssistException(struct pt_regs *regs) +void altivec_assist_exception(struct pt_regs *regs) { int err; @@ -872,7 +892,7 @@ void AltivecAssistException(struct pt_regs *regs) #endif /* CONFIG_ALTIVEC */ #ifdef CONFIG_E500 -void PerformanceMonitorException(struct pt_regs *regs) +void performance_monitor_exception(struct pt_regs *regs) { perf_irq(regs); } diff --git a/arch/ppc/kernel/vecemu.c b/arch/ppc/kernel/vecemu.c deleted file mode 100644 index 604d0947cb2..00000000000 --- a/arch/ppc/kernel/vecemu.c +++ /dev/null @@ -1,345 +0,0 @@ -/* - * Routines to emulate some Altivec/VMX instructions, specifically - * those that can trap when given denormalized operands in Java mode. - */ -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/sched.h> -#include <asm/ptrace.h> -#include <asm/processor.h> -#include <asm/uaccess.h> - -/* Functions in vector.S */ -extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b); -extern void vsubfp(vector128 *dst, vector128 *a, vector128 *b); -extern void vmaddfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c); -extern void vnmsubfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c); -extern void vrefp(vector128 *dst, vector128 *src); -extern void vrsqrtefp(vector128 *dst, vector128 *src); -extern void vexptep(vector128 *dst, vector128 *src); - -static unsigned int exp2s[8] = { - 0x800000, - 0x8b95c2, - 0x9837f0, - 0xa5fed7, - 0xb504f3, - 0xc5672a, - 0xd744fd, - 0xeac0c7 -}; - -/* - * Computes an estimate of 2^x. The `s' argument is the 32-bit - * single-precision floating-point representation of x. - */ -static unsigned int eexp2(unsigned int s) -{ - int exp, pwr; - unsigned int mant, frac; - - /* extract exponent field from input */ - exp = ((s >> 23) & 0xff) - 127; - if (exp > 7) { - /* check for NaN input */ - if (exp == 128 && (s & 0x7fffff) != 0) - return s | 0x400000; /* return QNaN */ - /* 2^-big = 0, 2^+big = +Inf */ - return (s & 0x80000000)? 0: 0x7f800000; /* 0 or +Inf */ - } - if (exp < -23) - return 0x3f800000; /* 1.0 */ - - /* convert to fixed point integer in 9.23 representation */ - pwr = (s & 0x7fffff) | 0x800000; - if (exp > 0) - pwr <<= exp; - else - pwr >>= -exp; - if (s & 0x80000000) - pwr = -pwr; - - /* extract integer part, which becomes exponent part of result */ - exp = (pwr >> 23) + 126; - if (exp >= 254) - return 0x7f800000; - if (exp < -23) - return 0; - - /* table lookup on top 3 bits of fraction to get mantissa */ - mant = exp2s[(pwr >> 20) & 7]; - - /* linear interpolation using remaining 20 bits of fraction */ - asm("mulhwu %0,%1,%2" : "=r" (frac) - : "r" (pwr << 12), "r" (0x172b83ff)); - asm("mulhwu %0,%1,%2" : "=r" (frac) : "r" (frac), "r" (mant)); - mant += frac; - - if (exp >= 0) - return mant + (exp << 23); - - /* denormalized result */ - exp = -exp; - mant += 1 << (exp - 1); - return mant >> exp; -} - -/* - * Computes an estimate of log_2(x). The `s' argument is the 32-bit - * single-precision floating-point representation of x. - */ -static unsigned int elog2(unsigned int s) -{ - int exp, mant, lz, frac; - - exp = s & 0x7f800000; - mant = s & 0x7fffff; - if (exp == 0x7f800000) { /* Inf or NaN */ - if (mant != 0) - s |= 0x400000; /* turn NaN into QNaN */ - return s; - } - if ((exp | mant) == 0) /* +0 or -0 */ - return 0xff800000; /* return -Inf */ - - if (exp == 0) { - /* denormalized */ - asm("cntlzw %0,%1" : "=r" (lz) : "r" (mant)); - mant <<= lz - 8; - exp = (-118 - lz) << 23; - } else { - mant |= 0x800000; - exp -= 127 << 23; - } - - if (mant >= 0xb504f3) { /* 2^0.5 * 2^23 */ - exp |= 0x400000; /* 0.5 * 2^23 */ - asm("mulhwu %0,%1,%2" : "=r" (mant) - : "r" (mant), "r" (0xb504f334)); /* 2^-0.5 * 2^32 */ - } - if (mant >= 0x9837f0) { /* 2^0.25 * 2^23 */ - exp |= 0x200000; /* 0.25 * 2^23 */ - asm("mulhwu %0,%1,%2" : "=r" (mant) - : "r" (mant), "r" (0xd744fccb)); /* 2^-0.25 * 2^32 */ - } - if (mant >= 0x8b95c2) { /* 2^0.125 * 2^23 */ - exp |= 0x100000; /* 0.125 * 2^23 */ - asm("mulhwu %0,%1,%2" : "=r" (mant) - : "r" (mant), "r" (0xeac0c6e8)); /* 2^-0.125 * 2^32 */ - } - if (mant > 0x800000) { /* 1.0 * 2^23 */ - /* calculate (mant - 1) * 1.381097463 */ - /* 1.381097463 == 0.125 / (2^0.125 - 1) */ - asm("mulhwu %0,%1,%2" : "=r" (frac) - : "r" ((mant - 0x800000) << 1), "r" (0xb0c7cd3a)); - exp += frac; - } - s = exp & 0x80000000; - if (exp != 0) { - if (s) - exp = -exp; - asm("cntlzw %0,%1" : "=r" (lz) : "r" (exp)); - lz = 8 - lz; - if (lz > 0) - exp >>= lz; - else if (lz < 0) - exp <<= -lz; - s += ((lz + 126) << 23) + exp; - } - return s; -} - -#define VSCR_SAT 1 - -static int ctsxs(unsigned int x, int scale, unsigned int *vscrp) -{ - int exp, mant; - - exp = (x >> 23) & 0xff; - mant = x & 0x7fffff; - if (exp == 255 && mant != 0) - return 0; /* NaN -> 0 */ - exp = exp - 127 + scale; - if (exp < 0) - return 0; /* round towards zero */ - if (exp >= 31) { - /* saturate, unless the result would be -2^31 */ - if (x + (scale << 23) != 0xcf000000) - *vscrp |= VSCR_SAT; - return (x & 0x80000000)? 0x80000000: 0x7fffffff; - } - mant |= 0x800000; - mant = (mant << 7) >> (30 - exp); - return (x & 0x80000000)? -mant: mant; -} - -static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp) -{ - int exp; - unsigned int mant; - - exp = (x >> 23) & 0xff; - mant = x & 0x7fffff; - if (exp == 255 && mant != 0) - return 0; /* NaN -> 0 */ - exp = exp - 127 + scale; - if (exp < 0) - return 0; /* round towards zero */ - if (x & 0x80000000) { - /* negative => saturate to 0 */ - *vscrp |= VSCR_SAT; - return 0; - } - if (exp >= 32) { - /* saturate */ - *vscrp |= VSCR_SAT; - return 0xffffffff; - } - mant |= 0x800000; - mant = (mant << 8) >> (31 - exp); - return mant; -} - -/* Round to floating integer, towards 0 */ -static unsigned int rfiz(unsigned int x) -{ - int exp; - - exp = ((x >> 23) & 0xff) - 127; - if (exp == 128 && (x & 0x7fffff) != 0) - return x | 0x400000; /* NaN -> make it a QNaN */ - if (exp >= 23) - return x; /* it's an integer already (or Inf) */ - if (exp < 0) - return x & 0x80000000; /* |x| < 1.0 rounds to 0 */ - return x & ~(0x7fffff >> exp); -} - -/* Round to floating integer, towards +/- Inf */ -static unsigned int rfii(unsigned int x) -{ - int exp, mask; - - exp = ((x >> 23) & 0xff) - 127; - if (exp == 128 && (x & 0x7fffff) != 0) - return x | 0x400000; /* NaN -> make it a QNaN */ - if (exp >= 23) - return x; /* it's an integer already (or Inf) */ - if ((x & 0x7fffffff) == 0) - return x; /* +/-0 -> +/-0 */ - if (exp < 0) - /* 0 < |x| < 1.0 rounds to +/- 1.0 */ - return (x & 0x80000000) | 0x3f800000; - mask = 0x7fffff >> exp; - /* mantissa overflows into exponent - that's OK, - it can't overflow into the sign bit */ - return (x + mask) & ~mask; -} - -/* Round to floating integer, to nearest */ -static unsigned int rfin(unsigned int x) -{ - int exp, half; - - exp = ((x >> 23) & 0xff) - 127; - if (exp == 128 && (x & 0x7fffff) != 0) - return x | 0x400000; /* NaN -> make it a QNaN */ - if (exp >= 23) - return x; /* it's an integer already (or Inf) */ - if (exp < -1) - return x & 0x80000000; /* |x| < 0.5 -> +/-0 */ - if (exp == -1) - /* 0.5 <= |x| < 1.0 rounds to +/- 1.0 */ - return (x & 0x80000000) | 0x3f800000; - half = 0x400000 >> exp; - /* add 0.5 to the magnitude and chop off the fraction bits */ - return (x + half) & ~(0x7fffff >> exp); -} - -int emulate_altivec(struct pt_regs *regs) -{ - unsigned int instr, i; - unsigned int va, vb, vc, vd; - vector128 *vrs; - - if (get_user(instr, (unsigned int __user *) regs->nip)) - return -EFAULT; - if ((instr >> 26) != 4) - return -EINVAL; /* not an altivec instruction */ - vd = (instr >> 21) & 0x1f; - va = (instr >> 16) & 0x1f; - vb = (instr >> 11) & 0x1f; - vc = (instr >> 6) & 0x1f; - - vrs = current->thread.vr; - switch (instr & 0x3f) { - case 10: - switch (vc) { - case 0: /* vaddfp */ - vaddfp(&vrs[vd], &vrs[va], &vrs[vb]); - break; - case 1: /* vsubfp */ - vsubfp(&vrs[vd], &vrs[va], &vrs[vb]); - break; - case 4: /* vrefp */ - vrefp(&vrs[vd], &vrs[vb]); - break; - case 5: /* vrsqrtefp */ - vrsqrtefp(&vrs[vd], &vrs[vb]); - break; - case 6: /* vexptefp */ - for (i = 0; i < 4; ++i) - vrs[vd].u[i] = eexp2(vrs[vb].u[i]); - break; - case 7: /* vlogefp */ - for (i = 0; i < 4; ++i) - vrs[vd].u[i] = elog2(vrs[vb].u[i]); - break; - case 8: /* vrfin */ - for (i = 0; i < 4; ++i) - vrs[vd].u[i] = rfin(vrs[vb].u[i]); - break; - case 9: /* vrfiz */ - for (i = 0; i < 4; ++i) - vrs[vd].u[i] = rfiz(vrs[vb].u[i]); - break; - case 10: /* vrfip */ - for (i = 0; i < 4; ++i) { - u32 x = vrs[vb].u[i]; - x = (x & 0x80000000)? rfiz(x): rfii(x); - vrs[vd].u[i] = x; - } - break; - case 11: /* vrfim */ - for (i = 0; i < 4; ++i) { - u32 x = vrs[vb].u[i]; - x = (x & 0x80000000)? rfii(x): rfiz(x); - vrs[vd].u[i] = x; - } - break; - case 14: /* vctuxs */ - for (i = 0; i < 4; ++i) - vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va, - ¤t->thread.vscr.u[3]); - break; - case 15: /* vctsxs */ - for (i = 0; i < 4; ++i) - vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va, - ¤t->thread.vscr.u[3]); - break; - default: - return -EINVAL; - } - break; - case 46: /* vmaddfp */ - vmaddfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]); - break; - case 47: /* vnmsubfp */ - vnmsubfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]); - break; - default: - return -EINVAL; - } - - return 0; -} diff --git a/arch/ppc/kernel/vector.S b/arch/ppc/kernel/vector.S deleted file mode 100644 index 82a21346bf8..00000000000 --- a/arch/ppc/kernel/vector.S +++ /dev/null @@ -1,217 +0,0 @@ -#include <asm/ppc_asm.h> -#include <asm/processor.h> - -/* - * The routines below are in assembler so we can closely control the - * usage of floating-point registers. These routines must be called - * with preempt disabled. - */ - .data -fpzero: - .long 0 -fpone: - .long 0x3f800000 /* 1.0 in single-precision FP */ -fphalf: - .long 0x3f000000 /* 0.5 in single-precision FP */ - - .text -/* - * Internal routine to enable floating point and set FPSCR to 0. - * Don't call it from C; it doesn't use the normal calling convention. - */ -fpenable: - mfmsr r10 - ori r11,r10,MSR_FP - mtmsr r11 - isync - stfd fr0,24(r1) - stfd fr1,16(r1) - stfd fr31,8(r1) - lis r11,fpzero@ha - mffs fr31 - lfs fr1,fpzero@l(r11) - mtfsf 0xff,fr1 - blr - -fpdisable: - mtfsf 0xff,fr31 - lfd fr31,8(r1) - lfd fr1,16(r1) - lfd fr0,24(r1) - mtmsr r10 - isync - blr - -/* - * Vector add, floating point. - */ - .globl vaddfp -vaddfp: - stwu r1,-32(r1) - mflr r0 - stw r0,36(r1) - bl fpenable - li r0,4 - mtctr r0 - li r6,0 -1: lfsx fr0,r4,r6 - lfsx fr1,r5,r6 - fadds fr0,fr0,fr1 - stfsx fr0,r3,r6 - addi r6,r6,4 - bdnz 1b - bl fpdisable - lwz r0,36(r1) - mtlr r0 - addi r1,r1,32 - blr - -/* - * Vector subtract, floating point. - */ - .globl vsubfp -vsubfp: - stwu r1,-32(r1) - mflr r0 - stw r0,36(r1) - bl fpenable - li r0,4 - mtctr r0 - li r6,0 -1: lfsx fr0,r4,r6 - lfsx fr1,r5,r6 - fsubs fr0,fr0,fr1 - stfsx fr0,r3,r6 - addi r6,r6,4 - bdnz 1b - bl fpdisable - lwz r0,36(r1) - mtlr r0 - addi r1,r1,32 - blr - -/* - * Vector multiply and add, floating point. - */ - .globl vmaddfp -vmaddfp: - stwu r1,-48(r1) - mflr r0 - stw r0,52(r1) - bl fpenable - stfd fr2,32(r1) - li r0,4 - mtctr r0 - li r7,0 -1: lfsx fr0,r4,r7 - lfsx fr1,r5,r7 - lfsx fr2,r6,r7 - fmadds fr0,fr0,fr2,fr1 - stfsx fr0,r3,r7 - addi r7,r7,4 - bdnz 1b - lfd fr2,32(r1) - bl fpdisable - lwz r0,52(r1) - mtlr r0 - addi r1,r1,48 - blr - -/* - * Vector negative multiply and subtract, floating point. - */ - .globl vnmsubfp -vnmsubfp: - stwu r1,-48(r1) - mflr r0 - stw r0,52(r1) - bl fpenable - stfd fr2,32(r1) - li r0,4 - mtctr r0 - li r7,0 -1: lfsx fr0,r4,r7 - lfsx fr1,r5,r7 - lfsx fr2,r6,r7 - fnmsubs fr0,fr0,fr2,fr1 - stfsx fr0,r3,r7 - addi r7,r7,4 - bdnz 1b - lfd fr2,32(r1) - bl fpdisable - lwz r0,52(r1) - mtlr r0 - addi r1,r1,48 - blr - -/* - * Vector reciprocal estimate. We just compute 1.0/x. - * r3 -> destination, r4 -> source. - */ - .globl vrefp -vrefp: - stwu r1,-32(r1) - mflr r0 - stw r0,36(r1) - bl fpenable - lis r9,fpone@ha - li r0,4 - lfs fr1,fpone@l(r9) - mtctr r0 - li r6,0 -1: lfsx fr0,r4,r6 - fdivs fr0,fr1,fr0 - stfsx fr0,r3,r6 - addi r6,r6,4 - bdnz 1b - bl fpdisable - lwz r0,36(r1) - mtlr r0 - addi r1,r1,32 - blr - -/* - * Vector reciprocal square-root estimate, floating point. - * We use the frsqrte instruction for the initial estimate followed - * by 2 iterations of Newton-Raphson to get sufficient accuracy. - * r3 -> destination, r4 -> source. - */ - .globl vrsqrtefp -vrsqrtefp: - stwu r1,-48(r1) - mflr r0 - stw r0,52(r1) - bl fpenable - stfd fr2,32(r1) - stfd fr3,40(r1) - stfd fr4,48(r1) - stfd fr5,56(r1) - lis r9,fpone@ha - lis r8,fphalf@ha - li r0,4 - lfs fr4,fpone@l(r9) - lfs fr5,fphalf@l(r8) - mtctr r0 - li r6,0 -1: lfsx fr0,r4,r6 - frsqrte fr1,fr0 /* r = frsqrte(s) */ - fmuls fr3,fr1,fr0 /* r * s */ - fmuls fr2,fr1,fr5 /* r * 0.5 */ - fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */ - fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */ - fmuls fr3,fr1,fr0 /* r * s */ - fmuls fr2,fr1,fr5 /* r * 0.5 */ - fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */ - fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */ - stfsx fr1,r3,r6 - addi r6,r6,4 - bdnz 1b - lfd fr5,56(r1) - lfd fr4,48(r1) - lfd fr3,40(r1) - lfd fr2,32(r1) - bl fpdisable - lwz r0,36(r1) - mtlr r0 - addi r1,r1,32 - blr diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S index 17d2db7e537..09c6525cfa6 100644 --- a/arch/ppc/kernel/vmlinux.lds.S +++ b/arch/ppc/kernel/vmlinux.lds.S @@ -149,32 +149,6 @@ SECTIONS . = ALIGN(4096); _sextratext = .; - __pmac_begin = .; - .pmac.text : { *(.pmac.text) } - .pmac.data : { *(.pmac.data) } - . = ALIGN(4096); - __pmac_end = .; - - . = ALIGN(4096); - __prep_begin = .; - .prep.text : { *(.prep.text) } - .prep.data : { *(.prep.data) } - . = ALIGN(4096); - __prep_end = .; - - . = ALIGN(4096); - __chrp_begin = .; - .chrp.text : { *(.chrp.text) } - .chrp.data : { *(.chrp.data) } - . = ALIGN(4096); - __chrp_end = .; - - . = ALIGN(4096); - __openfirmware_begin = .; - .openfirmware.text : { *(.openfirmware.text) } - .openfirmware.data : { *(.openfirmware.data) } - . = ALIGN(4096); - __openfirmware_end = .; _eextratext = .; __bss_start = .; diff --git a/arch/ppc/lib/string.S b/arch/ppc/lib/string.S index 36c9b97fd92..2e258c49e8b 100644 --- a/arch/ppc/lib/string.S +++ b/arch/ppc/lib/string.S @@ -65,9 +65,9 @@ .stabs "arch/ppc/lib/",N_SO,0,0,0f .stabs "string.S",N_SO,0,0,0f -CACHELINE_BYTES = L1_CACHE_LINE_SIZE -LG_CACHELINE_BYTES = LG_L1_CACHE_LINE_SIZE -CACHELINE_MASK = (L1_CACHE_LINE_SIZE-1) +CACHELINE_BYTES = L1_CACHE_BYTES +LG_CACHELINE_BYTES = L1_CACHE_SHIFT +CACHELINE_MASK = (L1_CACHE_BYTES-1) _GLOBAL(strcpy) addi r5,r3,-1 @@ -265,12 +265,12 @@ _GLOBAL(cacheable_memcpy) dcbz r11,r6 #endif COPY_16_BYTES -#if L1_CACHE_LINE_SIZE >= 32 +#if L1_CACHE_BYTES >= 32 COPY_16_BYTES -#if L1_CACHE_LINE_SIZE >= 64 +#if L1_CACHE_BYTES >= 64 COPY_16_BYTES COPY_16_BYTES -#if L1_CACHE_LINE_SIZE >= 128 +#if L1_CACHE_BYTES >= 128 COPY_16_BYTES COPY_16_BYTES COPY_16_BYTES @@ -485,12 +485,12 @@ _GLOBAL(__copy_tofrom_user) .text /* the main body of the cacheline loop */ COPY_16_BYTES_WITHEX(0) -#if L1_CACHE_LINE_SIZE >= 32 +#if L1_CACHE_BYTES >= 32 COPY_16_BYTES_WITHEX(1) -#if L1_CACHE_LINE_SIZE >= 64 +#if L1_CACHE_BYTES >= 64 COPY_16_BYTES_WITHEX(2) COPY_16_BYTES_WITHEX(3) -#if L1_CACHE_LINE_SIZE >= 128 +#if L1_CACHE_BYTES >= 128 COPY_16_BYTES_WITHEX(4) COPY_16_BYTES_WITHEX(5) COPY_16_BYTES_WITHEX(6) @@ -544,12 +544,12 @@ _GLOBAL(__copy_tofrom_user) * 104f (if in read part) or 105f (if in write part), after updating r5 */ COPY_16_BYTES_EXCODE(0) -#if L1_CACHE_LINE_SIZE >= 32 +#if L1_CACHE_BYTES >= 32 COPY_16_BYTES_EXCODE(1) -#if L1_CACHE_LINE_SIZE >= 64 +#if L1_CACHE_BYTES >= 64 COPY_16_BYTES_EXCODE(2) COPY_16_BYTES_EXCODE(3) -#if L1_CACHE_LINE_SIZE >= 128 +#if L1_CACHE_BYTES >= 128 COPY_16_BYTES_EXCODE(4) COPY_16_BYTES_EXCODE(5) COPY_16_BYTES_EXCODE(6) diff --git a/arch/ppc/math-emu/sfp-machine.h b/arch/ppc/math-emu/sfp-machine.h index 686e06d2918..4b17d83cfcd 100644 --- a/arch/ppc/math-emu/sfp-machine.h +++ b/arch/ppc/math-emu/sfp-machine.h @@ -166,7 +166,7 @@ extern int fp_pack_ds(void *, long, unsigned long, unsigned long, long, long); #include <linux/kernel.h> #include <linux/sched.h> -#define __FPU_FPSCR (current->thread.fpscr) +#define __FPU_FPSCR (current->thread.fpscr.val) /* We only actually write to the destination register * if exceptions signalled (if any) will not trap. diff --git a/arch/ppc/mm/4xx_mmu.c b/arch/ppc/mm/4xx_mmu.c index b7bcbc232f3..4d006aa1a0d 100644 --- a/arch/ppc/mm/4xx_mmu.c +++ b/arch/ppc/mm/4xx_mmu.c @@ -110,13 +110,11 @@ unsigned long __init mmu_mapin_ram(void) pmd_t *pmdp; unsigned long val = p | _PMD_SIZE_16M | _PAGE_HWEXEC | _PAGE_HWWRITE; - spin_lock(&init_mm.page_table_lock); pmdp = pmd_offset(pgd_offset_k(v), v); pmd_val(*pmdp++) = val; pmd_val(*pmdp++) = val; pmd_val(*pmdp++) = val; pmd_val(*pmdp++) = val; - spin_unlock(&init_mm.page_table_lock); v += LARGE_PAGE_SIZE_16M; p += LARGE_PAGE_SIZE_16M; @@ -127,10 +125,8 @@ unsigned long __init mmu_mapin_ram(void) pmd_t *pmdp; unsigned long val = p | _PMD_SIZE_4M | _PAGE_HWEXEC | _PAGE_HWWRITE; - spin_lock(&init_mm.page_table_lock); pmdp = pmd_offset(pgd_offset_k(v), v); pmd_val(*pmdp) = val; - spin_unlock(&init_mm.page_table_lock); v += LARGE_PAGE_SIZE_4M; p += LARGE_PAGE_SIZE_4M; diff --git a/arch/ppc/mm/fsl_booke_mmu.c b/arch/ppc/mm/fsl_booke_mmu.c index af9ca0eb6d5..5d581bb3aa1 100644 --- a/arch/ppc/mm/fsl_booke_mmu.c +++ b/arch/ppc/mm/fsl_booke_mmu.c @@ -1,5 +1,5 @@ /* - * Modifications by Kumar Gala (kumar.gala@freescale.com) to support + * Modifications by Kumar Gala (galak@kernel.crashing.org) to support * E500 Book E processors. * * Copyright 2004 Freescale Semiconductor, Inc diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c index f421a4b337f..45f0782059f 100644 --- a/arch/ppc/mm/init.c +++ b/arch/ppc/mm/init.c @@ -69,15 +69,12 @@ int init_bootmem_done; int boot_mapsize; #ifdef CONFIG_PPC_PMAC unsigned long agp_special_page; +EXPORT_SYMBOL(agp_special_page); #endif extern char _end[]; extern char etext[], _stext[]; extern char __init_begin, __init_end; -extern char __prep_begin, __prep_end; -extern char __chrp_begin, __chrp_end; -extern char __pmac_begin, __pmac_end; -extern char __openfirmware_begin, __openfirmware_end; #ifdef CONFIG_HIGHMEM pte_t *kmap_pte; @@ -167,14 +164,6 @@ void free_initmem(void) printk ("Freeing unused kernel memory:"); FREESEC(init); - if (_machine != _MACH_Pmac) - FREESEC(pmac); - if (_machine != _MACH_chrp) - FREESEC(chrp); - if (_machine != _MACH_prep) - FREESEC(prep); - if (!have_of) - FREESEC(openfirmware); printk("\n"); ppc_md.progress = NULL; #undef FREESEC @@ -608,21 +597,20 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, if (pfn_valid(pfn)) { struct page *page = pfn_to_page(pfn); - if (!PageReserved(page) - && !test_bit(PG_arch_1, &page->flags)) { - if (vma->vm_mm == current->active_mm) { #ifdef CONFIG_8xx - /* On 8xx, cache control instructions (particularly - * "dcbst" from flush_dcache_icache) fault as write - * operation if there is an unpopulated TLB entry - * for the address in question. To workaround that, - * we invalidate the TLB here, thus avoiding dcbst - * misbehaviour. - */ - _tlbie(address); + /* On 8xx, the TLB handlers work in 2 stages: + * First, a zeroed entry is loaded by TLBMiss handler, + * which causes the TLBError handler to be triggered. + * That means the zeroed TLB has to be invalidated + * whenever a page miss occurs. + */ + _tlbie(address); #endif + if (!PageReserved(page) + && !test_bit(PG_arch_1, &page->flags)) { + if (vma->vm_mm == current->active_mm) __flush_dcache_icache((void *) address); - } else + else flush_dcache_icache_page(page); set_bit(PG_arch_1, &page->flags); } @@ -648,18 +636,16 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, */ int page_is_ram(unsigned long pfn) { - unsigned long paddr = (pfn << PAGE_SHIFT); - - return paddr < __pa(high_memory); + return pfn < max_pfn; } -pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr, +pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, unsigned long size, pgprot_t vma_prot) { if (ppc_md.phys_mem_access_prot) - return ppc_md.phys_mem_access_prot(file, addr, size, vma_prot); + return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot); - if (!page_is_ram(addr >> PAGE_SHIFT)) + if (!page_is_ram(pfn)) vma_prot = __pgprot(pgprot_val(vma_prot) | _PAGE_GUARDED | _PAGE_NO_CACHE); return vma_prot; diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c index 81a3d7446d3..6ea9185fd12 100644 --- a/arch/ppc/mm/pgtable.c +++ b/arch/ppc/mm/pgtable.c @@ -114,9 +114,9 @@ struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address) struct page *ptepage; #ifdef CONFIG_HIGHPTE - int flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT; + gfp_t flags = GFP_KERNEL | __GFP_HIGHMEM | __GFP_REPEAT; #else - int flags = GFP_KERNEL | __GFP_REPEAT; + gfp_t flags = GFP_KERNEL | __GFP_REPEAT; #endif ptepage = alloc_pages(flags, 0); @@ -280,18 +280,16 @@ map_page(unsigned long va, phys_addr_t pa, int flags) pte_t *pg; int err = -ENOMEM; - spin_lock(&init_mm.page_table_lock); /* Use upper 10 bits of VA to index the first level map */ pd = pmd_offset(pgd_offset_k(va), va); /* Use middle 10 bits of VA to index the second-level map */ - pg = pte_alloc_kernel(&init_mm, pd, va); + pg = pte_alloc_kernel(pd, va); if (pg != 0) { err = 0; set_pte_at(&init_mm, va, pg, pfn_pte(pa >> PAGE_SHIFT, __pgprot(flags))); if (mem_init_done) flush_HPTE(0, va, pmd_val(*pd)); } - spin_unlock(&init_mm.page_table_lock); return err; } diff --git a/arch/ppc/oprofile/Kconfig b/arch/ppc/oprofile/Kconfig deleted file mode 100644 index 19d37730b66..00000000000 --- a/arch/ppc/oprofile/Kconfig +++ /dev/null @@ -1,23 +0,0 @@ - -menu "Profiling support" - depends on EXPERIMENTAL - -config PROFILING - bool "Profiling support (EXPERIMENTAL)" - help - Say Y here to enable the extended profiling support mechanisms used - by profilers such as OProfile. - - -config OPROFILE - tristate "OProfile system profiling (EXPERIMENTAL)" - depends on PROFILING - help - OProfile is a profiling system capable of profiling the - whole system, include the kernel, kernel modules, libraries, - and applications. - - If unsure, say N. - -endmenu - diff --git a/arch/ppc/oprofile/Makefile b/arch/ppc/oprofile/Makefile deleted file mode 100644 index e2218d32a4e..00000000000 --- a/arch/ppc/oprofile/Makefile +++ /dev/null @@ -1,14 +0,0 @@ -obj-$(CONFIG_OPROFILE) += oprofile.o - -DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \ - oprof.o cpu_buffer.o buffer_sync.o \ - event_buffer.o oprofile_files.o \ - oprofilefs.o oprofile_stats.o \ - timer_int.o ) - -oprofile-y := $(DRIVER_OBJS) common.o - -ifeq ($(CONFIG_FSL_BOOKE),y) - oprofile-y += op_model_fsl_booke.o -endif - diff --git a/arch/ppc/oprofile/common.c b/arch/ppc/oprofile/common.c deleted file mode 100644 index 3169c67abea..00000000000 --- a/arch/ppc/oprofile/common.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * PPC 32 oprofile support - * Based on PPC64 oprofile support - * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM - * - * Copyright (C) Freescale Semiconductor, Inc 2004 - * - * Author: Andy Fleming - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/oprofile.h> -#include <linux/slab.h> -#include <linux/init.h> -#include <linux/smp.h> -#include <linux/errno.h> -#include <asm/ptrace.h> -#include <asm/system.h> -#include <asm/perfmon.h> -#include <asm/cputable.h> - -#include "op_impl.h" - -static struct op_ppc32_model *model; - -static struct op_counter_config ctr[OP_MAX_COUNTER]; -static struct op_system_config sys; - -static void op_handle_interrupt(struct pt_regs *regs) -{ - model->handle_interrupt(regs, ctr); -} - -static int op_ppc32_setup(void) -{ - /* Install our interrupt handler into the existing hook. */ - if(request_perfmon_irq(&op_handle_interrupt)) - return -EBUSY; - - mb(); - - /* Pre-compute the values to stuff in the hardware registers. */ - model->reg_setup(ctr, &sys, model->num_counters); - -#if 0 - /* FIXME: Make multi-cpu work */ - /* Configure the registers on all cpus. */ - on_each_cpu(model->reg_setup, NULL, 0, 1); -#endif - - return 0; -} - -static void op_ppc32_shutdown(void) -{ - mb(); - - /* Remove our interrupt handler. We may be removing this module. */ - free_perfmon_irq(); -} - -static void op_ppc32_cpu_start(void *dummy) -{ - model->start(ctr); -} - -static int op_ppc32_start(void) -{ - on_each_cpu(op_ppc32_cpu_start, NULL, 0, 1); - return 0; -} - -static inline void op_ppc32_cpu_stop(void *dummy) -{ - model->stop(); -} - -static void op_ppc32_stop(void) -{ - on_each_cpu(op_ppc32_cpu_stop, NULL, 0, 1); -} - -static int op_ppc32_create_files(struct super_block *sb, struct dentry *root) -{ - int i; - - for (i = 0; i < model->num_counters; ++i) { - struct dentry *dir; - char buf[3]; - - snprintf(buf, sizeof buf, "%d", i); - dir = oprofilefs_mkdir(sb, root, buf); - - oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled); - oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event); - oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count); - oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel); - oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user); - - /* FIXME: Not sure if this is used */ - oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask); - } - - oprofilefs_create_ulong(sb, root, "enable_kernel", &sys.enable_kernel); - oprofilefs_create_ulong(sb, root, "enable_user", &sys.enable_user); - - /* Default to tracing both kernel and user */ - sys.enable_kernel = 1; - sys.enable_user = 1; - - return 0; -} - -static struct oprofile_operations oprof_ppc32_ops = { - .create_files = op_ppc32_create_files, - .setup = op_ppc32_setup, - .shutdown = op_ppc32_shutdown, - .start = op_ppc32_start, - .stop = op_ppc32_stop, - .cpu_type = NULL /* To be filled in below. */ -}; - -int __init oprofile_arch_init(struct oprofile_operations *ops) -{ - char *name; - int cpu_id = smp_processor_id(); - -#ifdef CONFIG_FSL_BOOKE - model = &op_model_fsl_booke; -#else - return -ENODEV; -#endif - - name = kmalloc(32, GFP_KERNEL); - - if (NULL == name) - return -ENOMEM; - - sprintf(name, "ppc/%s", cur_cpu_spec[cpu_id]->cpu_name); - - oprof_ppc32_ops.cpu_type = name; - - model->num_counters = cur_cpu_spec[cpu_id]->num_pmcs; - - *ops = oprof_ppc32_ops; - - printk(KERN_INFO "oprofile: using %s performance monitoring.\n", - oprof_ppc32_ops.cpu_type); - - return 0; -} - -void oprofile_arch_exit(void) -{ - kfree(oprof_ppc32_ops.cpu_type); - oprof_ppc32_ops.cpu_type = NULL; -} diff --git a/arch/ppc/oprofile/op_impl.h b/arch/ppc/oprofile/op_impl.h deleted file mode 100644 index bc336dc971e..00000000000 --- a/arch/ppc/oprofile/op_impl.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM - * - * Based on alpha version. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef OP_IMPL_H -#define OP_IMPL_H 1 - -#define OP_MAX_COUNTER 8 - -/* Per-counter configuration as set via oprofilefs. */ -struct op_counter_config { - unsigned long enabled; - unsigned long event; - unsigned long count; - unsigned long kernel; - unsigned long user; - unsigned long unit_mask; -}; - -/* System-wide configuration as set via oprofilefs. */ -struct op_system_config { - unsigned long enable_kernel; - unsigned long enable_user; -}; - -/* Per-arch configuration */ -struct op_ppc32_model { - void (*reg_setup) (struct op_counter_config *, - struct op_system_config *, - int num_counters); - void (*start) (struct op_counter_config *); - void (*stop) (void); - void (*handle_interrupt) (struct pt_regs *, - struct op_counter_config *); - int num_counters; -}; - -#endif /* OP_IMPL_H */ diff --git a/arch/ppc/oprofile/op_model_fsl_booke.c b/arch/ppc/oprofile/op_model_fsl_booke.c deleted file mode 100644 index fc9c859358c..00000000000 --- a/arch/ppc/oprofile/op_model_fsl_booke.c +++ /dev/null @@ -1,184 +0,0 @@ -/* - * oprofile/op_model_e500.c - * - * Freescale Book-E oprofile support, based on ppc64 oprofile support - * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM - * - * Copyright (c) 2004 Freescale Semiconductor, Inc - * - * Author: Andy Fleming - * Maintainer: Kumar Gala <Kumar.Gala@freescale.com> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/oprofile.h> -#include <linux/init.h> -#include <linux/smp.h> -#include <asm/ptrace.h> -#include <asm/system.h> -#include <asm/processor.h> -#include <asm/cputable.h> -#include <asm/reg_booke.h> -#include <asm/page.h> -#include <asm/perfmon.h> - -#include "op_impl.h" - -static unsigned long reset_value[OP_MAX_COUNTER]; - -static int num_counters; -static int oprofile_running; - -static inline unsigned int ctr_read(unsigned int i) -{ - switch(i) { - case 0: - return mfpmr(PMRN_PMC0); - case 1: - return mfpmr(PMRN_PMC1); - case 2: - return mfpmr(PMRN_PMC2); - case 3: - return mfpmr(PMRN_PMC3); - default: - return 0; - } -} - -static inline void ctr_write(unsigned int i, unsigned int val) -{ - switch(i) { - case 0: - mtpmr(PMRN_PMC0, val); - break; - case 1: - mtpmr(PMRN_PMC1, val); - break; - case 2: - mtpmr(PMRN_PMC2, val); - break; - case 3: - mtpmr(PMRN_PMC3, val); - break; - default: - break; - } -} - - -static void fsl_booke_reg_setup(struct op_counter_config *ctr, - struct op_system_config *sys, - int num_ctrs) -{ - int i; - - num_counters = num_ctrs; - - /* freeze all counters */ - pmc_stop_ctrs(); - - /* Our counters count up, and "count" refers to - * how much before the next interrupt, and we interrupt - * on overflow. So we calculate the starting value - * which will give us "count" until overflow. - * Then we set the events on the enabled counters */ - for (i = 0; i < num_counters; ++i) { - reset_value[i] = 0x80000000UL - ctr[i].count; - - init_pmc_stop(i); - - set_pmc_event(i, ctr[i].event); - - set_pmc_user_kernel(i, ctr[i].user, ctr[i].kernel); - } -} - -static void fsl_booke_start(struct op_counter_config *ctr) -{ - int i; - - mtmsr(mfmsr() | MSR_PMM); - - for (i = 0; i < num_counters; ++i) { - if (ctr[i].enabled) { - ctr_write(i, reset_value[i]); - /* Set Each enabled counterd to only - * count when the Mark bit is not set */ - set_pmc_marked(i, 1, 0); - pmc_start_ctr(i, 1); - } else { - ctr_write(i, 0); - - /* Set the ctr to be stopped */ - pmc_start_ctr(i, 0); - } - } - - /* Clear the freeze bit, and enable the interrupt. - * The counters won't actually start until the rfi clears - * the PMM bit */ - pmc_start_ctrs(1); - - oprofile_running = 1; - - pr_debug("start on cpu %d, pmgc0 %x\n", smp_processor_id(), - mfpmr(PMRN_PMGC0)); -} - -static void fsl_booke_stop(void) -{ - /* freeze counters */ - pmc_stop_ctrs(); - - oprofile_running = 0; - - pr_debug("stop on cpu %d, pmgc0 %x\n", smp_processor_id(), - mfpmr(PMRN_PMGC0)); - - mb(); -} - - -static void fsl_booke_handle_interrupt(struct pt_regs *regs, - struct op_counter_config *ctr) -{ - unsigned long pc; - int is_kernel; - int val; - int i; - - /* set the PMM bit (see comment below) */ - mtmsr(mfmsr() | MSR_PMM); - - pc = regs->nip; - is_kernel = (pc >= KERNELBASE); - - for (i = 0; i < num_counters; ++i) { - val = ctr_read(i); - if (val < 0) { - if (oprofile_running && ctr[i].enabled) { - oprofile_add_pc(pc, is_kernel, i); - ctr_write(i, reset_value[i]); - } else { - ctr_write(i, 0); - } - } - } - - /* The freeze bit was set by the interrupt. */ - /* Clear the freeze bit, and reenable the interrupt. - * The counters won't actually start until the rfi clears - * the PMM bit */ - pmc_start_ctrs(1); -} - -struct op_ppc32_model op_model_fsl_booke = { - .reg_setup = fsl_booke_reg_setup, - .start = fsl_booke_start, - .stop = fsl_booke_stop, - .handle_interrupt = fsl_booke_handle_interrupt, -}; diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig index 76f4476cab4..d8837911bbc 100644 --- a/arch/ppc/platforms/4xx/Kconfig +++ b/arch/ppc/platforms/4xx/Kconfig @@ -82,6 +82,12 @@ config LUAN help This option enables support for the IBM PPC440SP evaluation board. +config YUCCA + bool "Yucca" + select WANT_EARLY_SERIAL + help + This option enables support for the AMCC PPC440SPe evaluation board. + config OCOTEA bool "Ocotea" select WANT_EARLY_SERIAL @@ -124,9 +130,14 @@ config 440SP depends on LUAN default y +config 440SPE + bool + depends on YUCCA + default y + config 440 bool - depends on 440GP || 440SP || 440EP + depends on 440GP || 440SP || 440SPE || 440EP default y config 440A @@ -158,7 +169,7 @@ config BOOKE config IBM_OCP bool - depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT + depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT default y config XILINX_OCP @@ -168,7 +179,7 @@ config XILINX_OCP config IBM_EMAC4 bool - depends on 440GX || 440SP + depends on 440GX || 440SP || 440SPE default y config BIOS_FIXUP @@ -214,7 +225,7 @@ config EMBEDDEDBOOT config IBM_OPENBIOS bool - depends on ASH || BUBINGA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT + depends on ASH || REDWOOD_5 || REDWOOD_6 default y config PPC4xx_DMA diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile index 1dd6d7fd6a9..c9bb6117095 100644 --- a/arch/ppc/platforms/4xx/Makefile +++ b/arch/ppc/platforms/4xx/Makefile @@ -7,6 +7,7 @@ obj-$(CONFIG_EBONY) += ebony.o obj-$(CONFIG_EP405) += ep405.o obj-$(CONFIG_BUBINGA) += bubinga.o obj-$(CONFIG_LUAN) += luan.o +obj-$(CONFIG_YUCCA) += yucca.o obj-$(CONFIG_OCOTEA) += ocotea.o obj-$(CONFIG_REDWOOD_5) += redwood5.o obj-$(CONFIG_REDWOOD_6) += redwood6.o @@ -22,6 +23,7 @@ obj-$(CONFIG_440EP) += ibm440ep.o obj-$(CONFIG_440GP) += ibm440gp.o obj-$(CONFIG_440GX) += ibm440gx.o obj-$(CONFIG_440SP) += ibm440sp.o +obj-$(CONFIG_440SPE) += ppc440spe.o obj-$(CONFIG_405EP) += ibm405ep.o obj-$(CONFIG_405GPR) += ibm405gpr.o obj-$(CONFIG_VIRTEX_II_PRO) += virtex-ii_pro.o diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c index ac391d463d7..159b228eca1 100644 --- a/arch/ppc/platforms/4xx/bamboo.c +++ b/arch/ppc/platforms/4xx/bamboo.c @@ -27,7 +27,6 @@ #include <linux/delay.h> #include <linux/ide.h> #include <linux/initrd.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/tty.h> @@ -52,7 +51,7 @@ #include <syslib/gen550.h> #include <syslib/ibm440gx_common.h> -bd_t __res; +extern bd_t __res; static struct ibm44x_clocks clocks __initdata; @@ -426,17 +425,7 @@ bamboo_setup_arch(void) void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { - parse_bootinfo(find_bootinfo()); - - /* - * If we were passed in a board information, copy it into the - * residual data area. - */ - if (r3) - __res = *(bd_t *)(r3 + KERNELBASE); - - - ibm44x_platform_init(); + ibm44x_platform_init(r3, r4, r5, r6, r7); ppc_md.setup_arch = bamboo_setup_arch; ppc_md.show_cpuinfo = bamboo_show_cpuinfo; diff --git a/arch/ppc/platforms/4xx/bubinga.c b/arch/ppc/platforms/4xx/bubinga.c index 3678abf8631..8110f55668c 100644 --- a/arch/ppc/platforms/4xx/bubinga.c +++ b/arch/ppc/platforms/4xx/bubinga.c @@ -89,7 +89,7 @@ bubinga_early_serial_map(void) * by 16. */ uart_div = (mfdcr(DCRN_CPC0_UCR_BASE) & DCRN_CPC0_UCR_U0DIV); - uart_clock = __res.bi_pllouta_freq / uart_div; + uart_clock = __res.bi_procfreq / uart_div; /* Setup serial port access */ memset(&port, 0, sizeof(port)); diff --git a/arch/ppc/platforms/4xx/bubinga.h b/arch/ppc/platforms/4xx/bubinga.h index b1df856f8e2..b5380cfaf5c 100644 --- a/arch/ppc/platforms/4xx/bubinga.h +++ b/arch/ppc/platforms/4xx/bubinga.h @@ -1,52 +1,34 @@ /* - * Support for IBM PPC 405EP evaluation board (Bubinga). + * arch/ppc/platforms/4xx/bubinga.h * - * Author: SAW (IBM), derived from walnut.h. - * Maintained by MontaVista Software <source@mvista.com> + * Bubinga board definitions + * + * Copyright (c) 2005 DENX Software Engineering + * Stefan Roese <sr@denx.de> + * + * Based on original work by + * SAW (IBM) + * 2003 (c) MontaVista Softare Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. * - * 2003 (c) MontaVista Softare Inc. This file is licensed under the - * terms of the GNU General Public License version 2. This program is - * licensed "as is" without any warranty of any kind, whether express - * or implied. */ #ifdef __KERNEL__ #ifndef __BUBINGA_H__ #define __BUBINGA_H__ -/* 405EP */ +#include <linux/config.h> #include <platforms/4xx/ibm405ep.h> - -#ifndef __ASSEMBLY__ -/* - * Data structure defining board information maintained by the boot - * ROM on IBM's evaluation board. An effort has been made to - * keep the field names consistent with the 8xx 'bd_t' board info - * structures. - */ - -typedef struct board_info { - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[30]; /* Version of the IBM ROM */ - unsigned int bi_memsize; /* DRAM installed, in bytes */ - unsigned char bi_enetaddr[2][6]; /* Local Ethernet MAC address */ unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ - unsigned int bi_opb_busfreq; /* OPB Bus speed, in Hz */ - unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */ -} bd_t; - -/* Some 4xx parts use a different timebase frequency from the internal clock. -*/ -#define bi_tbfreq bi_intfreq - +#include <asm/ppcboot.h> /* Memory map for the Bubinga board. * Generic 4xx plus RTC. */ -extern void *bubinga_rtc_base; #define BUBINGA_RTC_PADDR ((uint)0xf0000000) #define BUBINGA_RTC_VADDR BUBINGA_RTC_PADDR #define BUBINGA_RTC_SIZE ((uint)8*1024) @@ -58,12 +40,18 @@ extern void *bubinga_rtc_base; * for typical configurations at various CPU speeds. * The base baud is calculated as (FWDA / EXT UART DIV / 16) */ -#define BASE_BAUD 0 +#define BASE_BAUD 0 -#define BUBINGA_FPGA_BASE 0xF0300000 +/* Flash */ +#define PPC40x_FPGA_BASE 0xF0300000 +#define PPC40x_FPGA_REG_OFFS 1 /* offset to flash map reg */ +#define PPC40x_FLASH_ONBD_N(x) (x & 0x02) +#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) +#define PPC40x_FLASH_LOW 0xFFF00000 +#define PPC40x_FLASH_HIGH 0xFFF80000 +#define PPC40x_FLASH_SIZE 0x80000 -#define PPC4xx_MACHINE_NAME "IBM Bubinga" +#define PPC4xx_MACHINE_NAME "IBM Bubinga" -#endif /* !__ASSEMBLY__ */ #endif /* __BUBINGA_H__ */ #endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c index d6b2b1965dc..64ebae19cdb 100644 --- a/arch/ppc/platforms/4xx/ebony.c +++ b/arch/ppc/platforms/4xx/ebony.c @@ -30,7 +30,6 @@ #include <linux/delay.h> #include <linux/ide.h> #include <linux/initrd.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/tty.h> @@ -55,7 +54,7 @@ #include <syslib/gen550.h> #include <syslib/ibm440gp_common.h> -bd_t __res; +extern bd_t __res; static struct ibm44x_clocks clocks __initdata; @@ -91,7 +90,7 @@ ebony_calibrate_decr(void) * on Rev. C silicon then errata forces us to * use the internal clock. */ - if (strcmp(cur_cpu_spec[0]->cpu_name, "440GP Rev. B") == 0) + if (strcmp(cur_cpu_spec->cpu_name, "440GP Rev. B") == 0) freq = EBONY_440GP_RB_SYSCLK; else freq = EBONY_440GP_RC_SYSCLK; @@ -318,16 +317,7 @@ ebony_setup_arch(void) void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { - parse_bootinfo(find_bootinfo()); - - /* - * If we were passed in a board information, copy it into the - * residual data area. - */ - if (r3) - __res = *(bd_t *)(r3 + KERNELBASE); - - ibm44x_platform_init(); + ibm44x_platform_init(r3, r4, r5, r6, r7); ppc_md.setup_arch = ebony_setup_arch; ppc_md.show_cpuinfo = ebony_show_cpuinfo; diff --git a/arch/ppc/platforms/4xx/ebony.h b/arch/ppc/platforms/4xx/ebony.h index d08faa46a0a..b91ad4272df 100644 --- a/arch/ppc/platforms/4xx/ebony.h +++ b/arch/ppc/platforms/4xx/ebony.h @@ -24,8 +24,8 @@ #define PPC44x_EMAC0_MR0 0xE0000800 /* Where to find the MAC info */ -#define EBONY_OPENBIOS_MAC_BASE 0xfffffe0c -#define EBONY_OPENBIOS_MAC_OFFSET 0x0c +#define OPENBIOS_MAC_BASE 0xfffffe0c +#define OPENBIOS_MAC_OFFSET 0x0c /* Default clock rates for Rev. B and Rev. C silicon */ #define EBONY_440GP_RB_SYSCLK 33000000 diff --git a/arch/ppc/platforms/4xx/ibm440ep.c b/arch/ppc/platforms/4xx/ibm440ep.c index 4712de8ff80..65ac0b9c2d0 100644 --- a/arch/ppc/platforms/4xx/ibm440ep.c +++ b/arch/ppc/platforms/4xx/ibm440ep.c @@ -14,6 +14,7 @@ */ #include <linux/init.h> #include <linux/module.h> +#include <linux/platform_device.h> #include <platforms/4xx/ibm440ep.h> #include <asm/ocp.h> #include <asm/ppc4xx_pic.h> diff --git a/arch/ppc/platforms/4xx/ibmstb4.c b/arch/ppc/platforms/4xx/ibmstb4.c index d90627b68fa..7e33bb63544 100644 --- a/arch/ppc/platforms/4xx/ibmstb4.c +++ b/arch/ppc/platforms/4xx/ibmstb4.c @@ -10,6 +10,7 @@ */ #include <linux/init.h> +#include <linux/platform_device.h> #include <asm/ocp.h> #include <asm/ppc4xx_pic.h> #include <platforms/4xx/ibmstb4.h> diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c index a38e6f9ef85..d810b736d9b 100644 --- a/arch/ppc/platforms/4xx/luan.c +++ b/arch/ppc/platforms/4xx/luan.c @@ -28,7 +28,6 @@ #include <linux/delay.h> #include <linux/ide.h> #include <linux/initrd.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/tty.h> @@ -53,7 +52,7 @@ #include <syslib/ibm440gx_common.h> #include <syslib/ibm440sp_common.h> -bd_t __res; +extern bd_t __res; static struct ibm44x_clocks clocks __initdata; @@ -356,16 +355,7 @@ luan_setup_arch(void) void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { - parse_bootinfo(find_bootinfo()); - - /* - * If we were passed in a board information, copy it into the - * residual data area. - */ - if (r3) - __res = *(bd_t *)(r3 + KERNELBASE); - - ibm44x_platform_init(); + ibm44x_platform_init(r3, r4, r5, r6, r7); ppc_md.setup_arch = luan_setup_arch; ppc_md.show_cpuinfo = luan_show_cpuinfo; diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c index 80028df1b44..73b2c98158f 100644 --- a/arch/ppc/platforms/4xx/ocotea.c +++ b/arch/ppc/platforms/4xx/ocotea.c @@ -28,7 +28,6 @@ #include <linux/delay.h> #include <linux/ide.h> #include <linux/initrd.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/tty.h> @@ -53,7 +52,7 @@ #include <syslib/gen550.h> #include <syslib/ibm440gx_common.h> -bd_t __res; +extern bd_t __res; static struct ibm44x_clocks clocks __initdata; @@ -287,6 +286,15 @@ ocotea_setup_arch(void) ibm440gx_tah_enable(); + /* + * Determine various clocks. + * To be completely correct we should get SysClk + * from FPGA, because it can be changed by on-board switches + * --ebs + */ + ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); + ocp_sys_info.opb_bus_freq = clocks.opb; + /* Setup TODC access */ TODC_INIT(TODC_TYPE_DS1743, 0, @@ -325,25 +333,7 @@ static void __init ocotea_init(void) void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) { - parse_bootinfo(find_bootinfo()); - - /* - * If we were passed in a board information, copy it into the - * residual data area. - */ - if (r3) - __res = *(bd_t *)(r3 + KERNELBASE); - - /* - * Determine various clocks. - * To be completely correct we should get SysClk - * from FPGA, because it can be changed by on-board switches - * --ebs - */ - ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); - ocp_sys_info.opb_bus_freq = clocks.opb; - - ibm44x_platform_init(); + ibm44x_platform_init(r3, r4, r5, r6, r7); ppc_md.setup_arch = ocotea_setup_arch; ppc_md.show_cpuinfo = ocotea_show_cpuinfo; diff --git a/arch/ppc/platforms/4xx/ppc440spe.c b/arch/ppc/platforms/4xx/ppc440spe.c new file mode 100644 index 00000000000..6139a0b3393 --- /dev/null +++ b/arch/ppc/platforms/4xx/ppc440spe.c @@ -0,0 +1,148 @@ +/* + * arch/ppc/platforms/4xx/ppc440spe.c + * + * PPC440SPe I/O descriptions + * + * Roland Dreier <rolandd@cisco.com> + * Copyright (c) 2005 Cisco Systems. All rights reserved. + * + * Matt Porter <mporter@kernel.crashing.org> + * Copyright 2002-2005 MontaVista Software Inc. + * + * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> + * Copyright (c) 2003, 2004 Zultys Technologies + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ +#include <linux/init.h> +#include <linux/module.h> +#include <platforms/4xx/ppc440spe.h> +#include <asm/ocp.h> +#include <asm/ppc4xx_pic.h> + +static struct ocp_func_emac_data ppc440spe_emac0_def = { + .rgmii_idx = -1, /* No RGMII */ + .rgmii_mux = -1, /* No RGMII */ + .zmii_idx = -1, /* No ZMII */ + .zmii_mux = -1, /* No ZMII */ + .mal_idx = 0, /* MAL device index */ + .mal_rx_chan = 0, /* MAL rx channel number */ + .mal_tx_chan = 0, /* MAL tx channel number */ + .wol_irq = 61, /* WOL interrupt number */ + .mdio_idx = -1, /* No shared MDIO */ + .tah_idx = -1, /* No TAH */ +}; +OCP_SYSFS_EMAC_DATA() + +static struct ocp_func_mal_data ppc440spe_mal0_def = { + .num_tx_chans = 1, /* Number of TX channels */ + .num_rx_chans = 1, /* Number of RX channels */ + .txeob_irq = 38, /* TX End Of Buffer IRQ */ + .rxeob_irq = 39, /* RX End Of Buffer IRQ */ + .txde_irq = 34, /* TX Descriptor Error IRQ */ + .rxde_irq = 35, /* RX Descriptor Error IRQ */ + .serr_irq = 33, /* MAL System Error IRQ */ + .dcr_base = DCRN_MAL_BASE /* MAL0_CFG DCR number */ +}; +OCP_SYSFS_MAL_DATA() + +static struct ocp_func_iic_data ppc440spe_iic0_def = { + .fast_mode = 0, /* Use standad mode (100Khz) */ +}; + +static struct ocp_func_iic_data ppc440spe_iic1_def = { + .fast_mode = 0, /* Use standad mode (100Khz) */ +}; +OCP_SYSFS_IIC_DATA() + +struct ocp_def core_ocp[] = { + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_16550, + .index = 0, + .paddr = PPC440SPE_UART0_ADDR, + .irq = UART0_INT, + .pm = IBM_CPM_UART0, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_16550, + .index = 1, + .paddr = PPC440SPE_UART1_ADDR, + .irq = UART1_INT, + .pm = IBM_CPM_UART1, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_16550, + .index = 2, + .paddr = PPC440SPE_UART2_ADDR, + .irq = UART2_INT, + .pm = IBM_CPM_UART2, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_IIC, + .index = 0, + .paddr = 0x00000004f0000400ULL, + .irq = 2, + .pm = IBM_CPM_IIC0, + .additions = &ppc440spe_iic0_def, + .show = &ocp_show_iic_data + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_IIC, + .index = 1, + .paddr = 0x00000004f0000500ULL, + .irq = 3, + .pm = IBM_CPM_IIC1, + .additions = &ppc440spe_iic1_def, + .show = &ocp_show_iic_data + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_GPIO, + .index = 0, + .paddr = 0x00000004f0000700ULL, + .irq = OCP_IRQ_NA, + .pm = IBM_CPM_GPIO0, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_MAL, + .paddr = OCP_PADDR_NA, + .irq = OCP_IRQ_NA, + .pm = OCP_CPM_NA, + .additions = &ppc440spe_mal0_def, + .show = &ocp_show_mal_data, + }, + { .vendor = OCP_VENDOR_IBM, + .function = OCP_FUNC_EMAC, + .index = 0, + .paddr = 0x00000004f0000800ULL, + .irq = 60, + .pm = OCP_CPM_NA, + .additions = &ppc440spe_emac0_def, + .show = &ocp_show_emac_data, + }, + { .vendor = OCP_VENDOR_INVALID + } +}; + +/* Polarity and triggering settings for internal interrupt sources */ +struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = { + { .polarity = 0xffffffff, + .triggering = 0x010f0004, + .ext_irq_mask = 0x00000000, + }, + { .polarity = 0xffffffff, + .triggering = 0x001f8040, + .ext_irq_mask = 0x00007c30, /* IRQ6 - IRQ7, IRQ8 - IRQ12 */ + }, + { .polarity = 0xffffffff, + .triggering = 0x00000000, + .ext_irq_mask = 0x000000fc, /* IRQ0 - IRQ5 */ + }, + { .polarity = 0xffffffff, + .triggering = 0x00000000, + .ext_irq_mask = 0x00000000, + }, +}; diff --git a/arch/ppc/platforms/4xx/ppc440spe.h b/arch/ppc/platforms/4xx/ppc440spe.h new file mode 100644 index 00000000000..2216846973b --- /dev/null +++ b/arch/ppc/platforms/4xx/ppc440spe.h @@ -0,0 +1,66 @@ +/* + * arch/ppc/platforms/4xx/ibm440spe.h + * + * PPC440SPe definitions + * + * Roland Dreier <rolandd@cisco.com> + * Copyright (c) 2005 Cisco Systems. All rights reserved. + * + * Matt Porter <mporter@kernel.crashing.org> + * Copyright 2004-2005 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifdef __KERNEL__ +#ifndef __PPC_PLATFORMS_PPC440SPE_H +#define __PPC_PLATFORMS_PPC440SPE_H + +#include <linux/config.h> + +#include <asm/ibm44x.h> + +/* UART */ +#define PPC440SPE_UART0_ADDR 0x00000004f0000200ULL +#define PPC440SPE_UART1_ADDR 0x00000004f0000300ULL +#define PPC440SPE_UART2_ADDR 0x00000004f0000600ULL +#define UART0_INT 0 +#define UART1_INT 1 +#define UART2_INT 37 + +/* Clock and Power Management */ +#define IBM_CPM_IIC0 0x80000000 /* IIC interface */ +#define IBM_CPM_IIC1 0x40000000 /* IIC interface */ +#define IBM_CPM_PCI 0x20000000 /* PCI bridge */ +#define IBM_CPM_CPU 0x02000000 /* processor core */ +#define IBM_CPM_DMA 0x01000000 /* DMA controller */ +#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */ +#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */ +#define IBM_CPM_EBC 0x00200000 /* External Bux Controller */ +#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */ +#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */ +#define IBM_CPM_PLB 0x00040000 /* PLB bus arbiter */ +#define IBM_CPM_SRAM 0x00020000 /* SRAM memory controller */ +#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */ +#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */ +#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */ +#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */ +#define IBM_CPM_UART0 0x00000200 /* serial port 0 */ +#define IBM_CPM_UART1 0x00000100 /* serial port 1 */ +#define IBM_CPM_UART2 0x00000100 /* serial port 1 */ +#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */ +#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */ +#define IBM_CPM_EMAC0 0x00000020 /* EMAC 0 */ + +#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC | IBM_CPM_UIC1 | IBM_CPM_CPU \ + | IBM_CPM_EBC | IBM_CPM_SRAM | IBM_CPM_BGO \ + | IBM_CPM_EBM | IBM_CPM_PLB | IBM_CPM_OPB \ + | IBM_CPM_TMRCLK | IBM_CPM_DMA | IBM_CPM_PCI \ + | IBM_CPM_TAHOE0 | IBM_CPM_TAHOE1 \ + | IBM_CPM_EMAC0 | IBM_CPM_EMAC1 \ + | IBM_CPM_EMAC2 | IBM_CPM_EMAC3 ) +#endif /* __PPC_PLATFORMS_PPC440SP_H */ +#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/redwood5.c b/arch/ppc/platforms/4xx/redwood5.c index bee8b4ac8af..611ac861804 100644 --- a/arch/ppc/platforms/4xx/redwood5.c +++ b/arch/ppc/platforms/4xx/redwood5.c @@ -14,7 +14,7 @@ #include <linux/config.h> #include <linux/init.h> #include <linux/pagemap.h> -#include <linux/device.h> +#include <linux/platform_device.h> #include <linux/ioport.h> #include <asm/io.h> #include <asm/machdep.h> diff --git a/arch/ppc/platforms/4xx/redwood6.c b/arch/ppc/platforms/4xx/redwood6.c index 8b1012994df..b1311669128 100644 --- a/arch/ppc/platforms/4xx/redwood6.c +++ b/arch/ppc/platforms/4xx/redwood6.c @@ -12,7 +12,7 @@ #include <linux/config.h> #include <linux/init.h> #include <linux/pagemap.h> -#include <linux/device.h> +#include <linux/platform_device.h> #include <linux/ioport.h> #include <asm/io.h> #include <asm/ppc4xx_pic.h> diff --git a/arch/ppc/platforms/4xx/sycamore.c b/arch/ppc/platforms/4xx/sycamore.c index d8019eec470..281b4a2ffb9 100644 --- a/arch/ppc/platforms/4xx/sycamore.c +++ b/arch/ppc/platforms/4xx/sycamore.c @@ -88,9 +88,6 @@ ppc405_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) void __init sycamore_setup_arch(void) { -#define SYCAMORE_PS2_BASE 0xF0100000 -#define SYCAMORE_FPGA_BASE 0xF0300000 - void *fpga_brdc; unsigned char fpga_brdc_data; void *fpga_enable; @@ -100,7 +97,7 @@ sycamore_setup_arch(void) ppc4xx_setup_arch(); - ibm_ocp_set_emac(0, 1); + ibm_ocp_set_emac(0, 0); kb_data = ioremap(SYCAMORE_PS2_BASE, 8); if (!kb_data) { @@ -111,7 +108,7 @@ sycamore_setup_arch(void) kb_cs = kb_data + 1; - fpga_status = ioremap(SYCAMORE_FPGA_BASE, 8); + fpga_status = ioremap(PPC40x_FPGA_BASE, 8); if (!fpga_status) { printk(KERN_CRIT "sycamore_setup_arch() fpga_status ioremap failed\n"); diff --git a/arch/ppc/platforms/4xx/sycamore.h b/arch/ppc/platforms/4xx/sycamore.h index 3e7b4e2c8c5..1cd6c824fd6 100644 --- a/arch/ppc/platforms/4xx/sycamore.h +++ b/arch/ppc/platforms/4xx/sycamore.h @@ -1,67 +1,52 @@ /* * arch/ppc/platforms/4xx/sycamore.h * - * Macros, definitions, and data structures specific to the IBM PowerPC - * 405GPr "Sycamore" evaluation board. + * Sycamore board definitions * - * Author: Armin Kuster <akuster@mvista.com> + * Copyright (c) 2005 DENX Software Engineering + * Stefan Roese <sr@denx.de> + * + * Based on original work by + * Armin Kuster <akuster@mvista.com> + * 2000 (c) MontaVista, Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. * - * 2000 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. */ #ifdef __KERNEL__ #ifndef __ASM_SYCAMORE_H__ #define __ASM_SYCAMORE_H__ +#include <linux/config.h> #include <platforms/4xx/ibm405gpr.h> +#include <asm/ppcboot.h> -#ifndef __ASSEMBLY__ -/* - * Data structure defining board information maintained by the boot - * ROM on IBM's "Sycamore" evaluation board. An effort has been made to - * keep the field names consistent with the 8xx 'bd_t' board info - * structures. - */ - -typedef struct board_info { - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[30]; /* Version of the IBM ROM */ - unsigned int bi_memsize; /* DRAM installed, in bytes */ - unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */ - unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ -} bd_t; - -/* Some 4xx parts use a different timebase frequency from the internal clock. -*/ -#define bi_tbfreq bi_intfreq - - -/* Memory map for the IBM "Sycamore" 405GP evaluation board. +/* Memory map for the IBM "Sycamore" 405GPr evaluation board. * Generic 4xx plus RTC. */ -extern void *sycamore_rtc_base; #define SYCAMORE_RTC_PADDR ((uint)0xf0000000) #define SYCAMORE_RTC_VADDR SYCAMORE_RTC_PADDR -#define SYCAMORE_RTC_SIZE ((uint)8*1024) +#define SYCAMORE_RTC_SIZE ((uint)8*1024) -#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK -#define BASE_BAUD 201600 -#else #define BASE_BAUD 691200 -#endif -#define SYCAMORE_PS2_BASE 0xF0100000 -#define SYCAMORE_FPGA_BASE 0xF0300000 +#define SYCAMORE_PS2_BASE 0xF0100000 + +/* Flash */ +#define PPC40x_FPGA_BASE 0xF0300000 +#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */ +#define PPC40x_FLASH_ONBD_N(x) (x & 0x02) +#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) +#define PPC40x_FLASH_LOW 0xFFF00000 +#define PPC40x_FLASH_HIGH 0xFFF80000 +#define PPC40x_FLASH_SIZE 0x80000 #define PPC4xx_MACHINE_NAME "IBM Sycamore" -#endif /* !__ASSEMBLY__ */ #endif /* __ASM_SYCAMORE_H__ */ #endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/walnut.c b/arch/ppc/platforms/4xx/walnut.c index a33eda4b748..74cb33182d9 100644 --- a/arch/ppc/platforms/4xx/walnut.c +++ b/arch/ppc/platforms/4xx/walnut.c @@ -90,7 +90,7 @@ walnut_setup_arch(void) kb_cs = kb_data + 1; - fpga_status = ioremap(WALNUT_FPGA_BASE, 8); + fpga_status = ioremap(PPC40x_FPGA_BASE, 8); if (!fpga_status) { printk(KERN_CRIT "walnut_setup_arch() fpga_status ioremap failed\n"); diff --git a/arch/ppc/platforms/4xx/walnut.h b/arch/ppc/platforms/4xx/walnut.h index 04cfbf3696b..dcf2691698c 100644 --- a/arch/ppc/platforms/4xx/walnut.h +++ b/arch/ppc/platforms/4xx/walnut.h @@ -1,72 +1,55 @@ /* * arch/ppc/platforms/4xx/walnut.h * - * Macros, definitions, and data structures specific to the IBM PowerPC - * 405GP "Walnut" evaluation board. + * Walnut board definitions * - * Authors: Grant Erickson <grant@lcse.umn.edu>, Frank Rowand - * <frank_rowand@mvista.com>, Debbie Chu <debbie_chu@mvista.com> or - * source@mvista.com + * Copyright (c) 2005 DENX Software Engineering + * Stefan Roese <sr@denx.de> * - * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu> + * Based on original work by + * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu> + * Frank Rowand <frank_rowand@mvista.com> + * Debbie Chu <debbie_chu@mvista.com> + * 2000 (c) MontaVista, Software, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. * - * 2000 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. */ #ifdef __KERNEL__ #ifndef __ASM_WALNUT_H__ #define __ASM_WALNUT_H__ -/* We have a 405GP core */ +#include <linux/config.h> #include <platforms/4xx/ibm405gp.h> - -#ifndef __ASSEMBLY__ -/* - * Data structure defining board information maintained by the boot - * ROM on IBM's "Walnut" evaluation board. An effort has been made to - * keep the field names consistent with the 8xx 'bd_t' board info - * structures. - */ - -typedef struct board_info { - unsigned char bi_s_version[4]; /* Version of this structure */ - unsigned char bi_r_version[30]; /* Version of the IBM ROM */ - unsigned int bi_memsize; /* DRAM installed, in bytes */ - unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */ - unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */ - unsigned int bi_intfreq; /* Processor speed, in Hz */ - unsigned int bi_busfreq; /* PLB Bus speed, in Hz */ - unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */ -} bd_t; - -/* Some 4xx parts use a different timebase frequency from the internal clock. -*/ -#define bi_tbfreq bi_intfreq - +#include <asm/ppcboot.h> /* Memory map for the IBM "Walnut" 405GP evaluation board. * Generic 4xx plus RTC. */ -extern void *walnut_rtc_base; #define WALNUT_RTC_PADDR ((uint)0xf0000000) #define WALNUT_RTC_VADDR WALNUT_RTC_PADDR #define WALNUT_RTC_SIZE ((uint)8*1024) -#ifdef CONFIG_PPC405GP_INTERNAL_CLOCK -#define BASE_BAUD 201600 -#else #define BASE_BAUD 691200 -#endif #define WALNUT_PS2_BASE 0xF0100000 -#define WALNUT_FPGA_BASE 0xF0300000 + +/* Flash */ +#define PPC40x_FPGA_BASE 0xF0300000 +#define PPC40x_FPGA_REG_OFFS 5 /* offset to flash map reg */ +#define PPC40x_FLASH_ONBD_N(x) (x & 0x02) +#define PPC40x_FLASH_SRAM_SEL(x) (x & 0x01) +#define PPC40x_FLASH_LOW 0xFFF00000 +#define PPC40x_FLASH_HIGH 0xFFF80000 +#define PPC40x_FLASH_SIZE 0x80000 +#define WALNUT_FPGA_BASE PPC40x_FPGA_BASE #define PPC4xx_MACHINE_NAME "IBM Walnut" -#endif /* !__ASSEMBLY__ */ #endif /* __ASM_WALNUT_H__ */ #endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/4xx/yucca.c b/arch/ppc/platforms/4xx/yucca.c new file mode 100644 index 00000000000..e60f4bd437e --- /dev/null +++ b/arch/ppc/platforms/4xx/yucca.c @@ -0,0 +1,395 @@ +/* + * arch/ppc/platforms/4xx/yucca.c + * + * Yucca board specific routines + * + * Roland Dreier <rolandd@cisco.com> (based on luan.c by Matt Porter) + * + * Copyright 2004-2005 MontaVista Software Inc. + * Copyright (c) 2005 Cisco Systems. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/config.h> +#include <linux/stddef.h> +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/errno.h> +#include <linux/reboot.h> +#include <linux/pci.h> +#include <linux/kdev_t.h> +#include <linux/types.h> +#include <linux/major.h> +#include <linux/blkdev.h> +#include <linux/console.h> +#include <linux/delay.h> +#include <linux/ide.h> +#include <linux/initrd.h> +#include <linux/seq_file.h> +#include <linux/root_dev.h> +#include <linux/tty.h> +#include <linux/serial.h> +#include <linux/serial_core.h> + +#include <asm/system.h> +#include <asm/pgtable.h> +#include <asm/page.h> +#include <asm/dma.h> +#include <asm/io.h> +#include <asm/machdep.h> +#include <asm/ocp.h> +#include <asm/pci-bridge.h> +#include <asm/time.h> +#include <asm/todc.h> +#include <asm/bootinfo.h> +#include <asm/ppc4xx_pic.h> +#include <asm/ppcboot.h> + +#include <syslib/ibm44x_common.h> +#include <syslib/ibm440gx_common.h> +#include <syslib/ibm440sp_common.h> +#include <syslib/ppc440spe_pcie.h> + +extern bd_t __res; + +static struct ibm44x_clocks clocks __initdata; + +static void __init +yucca_calibrate_decr(void) +{ + unsigned int freq; + + if (mfspr(SPRN_CCR1) & CCR1_TCS) + freq = YUCCA_TMR_CLK; + else + freq = clocks.cpu; + + ibm44x_calibrate_decr(freq); +} + +static int +yucca_show_cpuinfo(struct seq_file *m) +{ + seq_printf(m, "vendor\t\t: AMCC\n"); + seq_printf(m, "machine\t\t: PPC440SPe EVB (Yucca)\n"); + + return 0; +} + +static enum { + HOSE_UNKNOWN, + HOSE_PCIX, + HOSE_PCIE0, + HOSE_PCIE1, + HOSE_PCIE2 +} hose_type[4]; + +static inline int +yucca_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) +{ + struct pci_controller *hose = pci_bus_to_hose(dev->bus->number); + + if (hose_type[hose->index] == HOSE_PCIX) { + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + { 81, -1, -1, -1 }, /* IDSEL 1 - PCIX0 Slot 0 */ + }; + const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; + } else if (hose_type[hose->index] == HOSE_PCIE0) { + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + { 96, 97, 98, 99 }, + }; + const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; + } else if (hose_type[hose->index] == HOSE_PCIE1) { + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + { 100, 101, 102, 103 }, + }; + const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; + } else if (hose_type[hose->index] == HOSE_PCIE2) { + static char pci_irq_table[][4] = + /* + * PCI IDSEL/INTPIN->INTLINE + * A B C D + */ + { + { 104, 105, 106, 107 }, + }; + const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4; + return PCI_IRQ_TABLE_LOOKUP; + } + return -1; +} + +static void __init yucca_set_emacdata(void) +{ + struct ocp_def *def; + struct ocp_func_emac_data *emacdata; + + /* Set phy_map, phy_mode, and mac_addr for the EMAC */ + def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0); + emacdata = def->additions; + emacdata->phy_map = 0x00000001; /* Skip 0x00 */ + emacdata->phy_mode = PHY_MODE_GMII; + memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); +} + +static int __init yucca_pcie_card_present(int port) +{ + void __iomem *pcie_fpga_base; + u16 reg; + + pcie_fpga_base = ioremap64(YUCCA_FPGA_REG_BASE, YUCCA_FPGA_REG_SIZE); + reg = in_be16(pcie_fpga_base + FPGA_REG1C); + iounmap(pcie_fpga_base); + + switch(port) { + case 0: return !(reg & FPGA_REG1C_PE0_PRSNT); + case 1: return !(reg & FPGA_REG1C_PE1_PRSNT); + case 2: return !(reg & FPGA_REG1C_PE2_PRSNT); + default: return 0; + } +} + +/* + * For the given slot, set rootpoint mode, send power to the slot, + * turn on the green LED and turn off the yellow LED, enable the clock + * and turn off reset. + */ +static void __init yucca_setup_pcie_fpga_rootpoint(int port) +{ + void __iomem *pcie_reg_fpga_base; + u16 power, clock, green_led, yellow_led, reset_off, rootpoint, endpoint; + + pcie_reg_fpga_base = ioremap64(YUCCA_FPGA_REG_BASE, YUCCA_FPGA_REG_SIZE); + + switch(port) { + case 0: + rootpoint = FPGA_REG1C_PE0_ROOTPOINT; + endpoint = 0; + power = FPGA_REG1A_PE0_PWRON; + green_led = FPGA_REG1A_PE0_GLED; + clock = FPGA_REG1A_PE0_REFCLK_ENABLE; + yellow_led = FPGA_REG1A_PE0_YLED; + reset_off = FPGA_REG1C_PE0_PERST; + break; + case 1: + rootpoint = 0; + endpoint = FPGA_REG1C_PE1_ENDPOINT; + power = FPGA_REG1A_PE1_PWRON; + green_led = FPGA_REG1A_PE1_GLED; + clock = FPGA_REG1A_PE1_REFCLK_ENABLE; + yellow_led = FPGA_REG1A_PE1_YLED; + reset_off = FPGA_REG1C_PE1_PERST; + break; + case 2: + rootpoint = 0; + endpoint = FPGA_REG1C_PE2_ENDPOINT; + power = FPGA_REG1A_PE2_PWRON; + green_led = FPGA_REG1A_PE2_GLED; + clock = FPGA_REG1A_PE2_REFCLK_ENABLE; + yellow_led = FPGA_REG1A_PE2_YLED; + reset_off = FPGA_REG1C_PE2_PERST; + break; + + default: + return; + } + + out_be16(pcie_reg_fpga_base + FPGA_REG1A, + ~(power | clock | green_led) & + (yellow_led | in_be16(pcie_reg_fpga_base + FPGA_REG1A))); + out_be16(pcie_reg_fpga_base + FPGA_REG1C, + ~(endpoint | reset_off) & + (rootpoint | in_be16(pcie_reg_fpga_base + FPGA_REG1C))); + + /* + * Leave device in reset for a while after powering on the + * slot to give it a chance to initialize. + */ + mdelay(250); + + out_be16(pcie_reg_fpga_base + FPGA_REG1C, + reset_off | in_be16(pcie_reg_fpga_base + FPGA_REG1C)); + + iounmap(pcie_reg_fpga_base); +} + +static void __init +yucca_setup_hoses(void) +{ + struct pci_controller *hose; + char name[20]; + int i; + + if (0 && ppc440spe_init_pcie()) { + printk(KERN_WARNING "PPC440SPe PCI Express initialization failed\n"); + return; + } + + for (i = 0; i <= 2; ++i) { + if (!yucca_pcie_card_present(i)) + continue; + + printk(KERN_INFO "PCIE%d: card present\n", i); + yucca_setup_pcie_fpga_rootpoint(i); + if (ppc440spe_init_pcie_rootport(i)) { + printk(KERN_WARNING "PCIE%d: initialization failed\n", i); + continue; + } + + hose = pcibios_alloc_controller(); + if (!hose) + return; + + sprintf(name, "PCIE%d host bridge", i); + pci_init_resource(&hose->io_resource, + YUCCA_PCIX_LOWER_IO, + YUCCA_PCIX_UPPER_IO, + IORESOURCE_IO, + name); + + hose->mem_space.start = YUCCA_PCIE_LOWER_MEM + + i * YUCCA_PCIE_MEM_SIZE; + hose->mem_space.end = hose->mem_space.start + + YUCCA_PCIE_MEM_SIZE - 1; + + pci_init_resource(&hose->mem_resources[0], + hose->mem_space.start, + hose->mem_space.end, + IORESOURCE_MEM, + name); + + hose->first_busno = 0; + hose->last_busno = 15; + hose_type[hose->index] = HOSE_PCIE0 + i; + + ppc440spe_setup_pcie(hose, i); + hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); + } + + ppc_md.pci_swizzle = common_swizzle; + ppc_md.pci_map_irq = yucca_map_irq; +} + +TODC_ALLOC(); + +static void __init +yucca_early_serial_map(void) +{ + struct uart_port port; + + /* Setup ioremapped serial port access */ + memset(&port, 0, sizeof(port)); + port.membase = ioremap64(PPC440SPE_UART0_ADDR, 8); + port.irq = UART0_INT; + port.uartclk = clocks.uart0; + port.regshift = 0; + port.iotype = SERIAL_IO_MEM; + port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; + port.line = 0; + + if (early_serial_setup(&port) != 0) { + printk("Early serial init of port 0 failed\n"); + } + + port.membase = ioremap64(PPC440SPE_UART1_ADDR, 8); + port.irq = UART1_INT; + port.uartclk = clocks.uart1; + port.line = 1; + + if (early_serial_setup(&port) != 0) { + printk("Early serial init of port 1 failed\n"); + } + + port.membase = ioremap64(PPC440SPE_UART2_ADDR, 8); + port.irq = UART2_INT; + port.uartclk = BASE_BAUD; + port.line = 2; + + if (early_serial_setup(&port) != 0) { + printk("Early serial init of port 2 failed\n"); + } +} + +static void __init +yucca_setup_arch(void) +{ + yucca_set_emacdata(); + +#if !defined(CONFIG_BDI_SWITCH) + /* + * The Abatron BDI JTAG debugger does not tolerate others + * mucking with the debug registers. + */ + mtspr(SPRN_DBCR0, (DBCR0_TDE | DBCR0_IDM)); +#endif + + /* + * Determine various clocks. + * To be completely correct we should get SysClk + * from FPGA, because it can be changed by on-board switches + * --ebs + */ + /* 440GX and 440SPe clocking is the same - rd */ + ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); + ocp_sys_info.opb_bus_freq = clocks.opb; + + /* init to some ~sane value until calibrate_delay() runs */ + loops_per_jiffy = 50000000/HZ; + + /* Setup PCIXn host bridges */ + yucca_setup_hoses(); + +#ifdef CONFIG_BLK_DEV_INITRD + if (initrd_start) + ROOT_DEV = Root_RAM0; + else +#endif +#ifdef CONFIG_ROOT_NFS + ROOT_DEV = Root_NFS; +#else + ROOT_DEV = Root_HDA1; +#endif + + yucca_early_serial_map(); + + /* Identify the system */ + printk("Yucca port (Roland Dreier <rolandd@cisco.com>)\n"); +} + +void __init platform_init(unsigned long r3, unsigned long r4, + unsigned long r5, unsigned long r6, unsigned long r7) +{ + ibm44x_platform_init(r3, r4, r5, r6, r7); + + ppc_md.setup_arch = yucca_setup_arch; + ppc_md.show_cpuinfo = yucca_show_cpuinfo; + ppc_md.find_end_of_memory = ibm440sp_find_end_of_memory; + ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ + + ppc_md.calibrate_decr = yucca_calibrate_decr; +#ifdef CONFIG_KGDB + ppc_md.early_serial_map = yucca_early_serial_map; +#endif +} diff --git a/arch/ppc/platforms/4xx/yucca.h b/arch/ppc/platforms/4xx/yucca.h new file mode 100644 index 00000000000..01a4afea151 --- /dev/null +++ b/arch/ppc/platforms/4xx/yucca.h @@ -0,0 +1,111 @@ +/* + * arch/ppc/platforms/4xx/yucca.h + * + * Yucca board definitions + * + * Roland Dreier <rolandd@cisco.com> (based on luan.h by Matt Porter) + * + * Copyright 2004-2005 MontaVista Software Inc. + * Copyright (c) 2005 Cisco Systems. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + */ + +#ifdef __KERNEL__ +#ifndef __ASM_YUCCA_H__ +#define __ASM_YUCCA_H__ + +#include <linux/config.h> +#include <platforms/4xx/ppc440spe.h> + +/* F/W TLB mapping used in bootloader glue to reset EMAC */ +#define PPC44x_EMAC0_MR0 0xa0000800 + +/* Location of MAC addresses in PIBS image */ +#define PIBS_FLASH_BASE 0xffe00000 +#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0x1b0400) + +/* External timer clock frequency */ +#define YUCCA_TMR_CLK 25000000 + +/* + * FPGA registers + */ +#define YUCCA_FPGA_REG_BASE 0x00000004e2000000ULL +#define YUCCA_FPGA_REG_SIZE 0x24 + +#define FPGA_REG1A 0x1a + +#define FPGA_REG1A_PE0_GLED 0x8000 +#define FPGA_REG1A_PE1_GLED 0x4000 +#define FPGA_REG1A_PE2_GLED 0x2000 +#define FPGA_REG1A_PE0_YLED 0x1000 +#define FPGA_REG1A_PE1_YLED 0x0800 +#define FPGA_REG1A_PE2_YLED 0x0400 +#define FPGA_REG1A_PE0_PWRON 0x0200 +#define FPGA_REG1A_PE1_PWRON 0x0100 +#define FPGA_REG1A_PE2_PWRON 0x0080 +#define FPGA_REG1A_PE0_REFCLK_ENABLE 0x0040 +#define FPGA_REG1A_PE1_REFCLK_ENABLE 0x0020 +#define FPGA_REG1A_PE2_REFCLK_ENABLE 0x0010 +#define FPGA_REG1A_PE_SPREAD0 0x0008 +#define FPGA_REG1A_PE_SPREAD1 0x0004 +#define FPGA_REG1A_PE_SELSOURCE_0 0x0002 +#define FPGA_REG1A_PE_SELSOURCE_1 0x0001 + +#define FPGA_REG1C 0x1c + +#define FPGA_REG1C_PE0_ROOTPOINT 0x8000 +#define FPGA_REG1C_PE1_ENDPOINT 0x4000 +#define FPGA_REG1C_PE2_ENDPOINT 0x2000 +#define FPGA_REG1C_PE0_PRSNT 0x1000 +#define FPGA_REG1C_PE1_PRSNT 0x0800 +#define FPGA_REG1C_PE2_PRSNT 0x0400 +#define FPGA_REG1C_PE0_WAKE 0x0080 +#define FPGA_REG1C_PE1_WAKE 0x0040 +#define FPGA_REG1C_PE2_WAKE 0x0020 +#define FPGA_REG1C_PE0_PERST 0x0010 +#define FPGA_REG1C_PE1_PERST 0x0008 +#define FPGA_REG1C_PE2_PERST 0x0004 + +/* + * Serial port defines + */ +#define RS_TABLE_SIZE 3 + +/* PIBS defined UART mappings, used before early_serial_setup */ +#define UART0_IO_BASE 0xa0000200 +#define UART1_IO_BASE 0xa0000300 +#define UART2_IO_BASE 0xa0000600 + +#define BASE_BAUD 11059200 +#define STD_UART_OP(num) \ + { 0, BASE_BAUD, 0, UART##num##_INT, \ + (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ + iomem_base: (void*)UART##num##_IO_BASE, \ + io_type: SERIAL_IO_MEM}, + +#define SERIAL_PORT_DFNS \ + STD_UART_OP(0) \ + STD_UART_OP(1) \ + STD_UART_OP(2) + +/* PCI support */ +#define YUCCA_PCIX_LOWER_IO 0x00000000 +#define YUCCA_PCIX_UPPER_IO 0x0000ffff +#define YUCCA_PCIX_LOWER_MEM 0x80000000 +#define YUCCA_PCIX_UPPER_MEM 0x8fffffff +#define YUCCA_PCIE_LOWER_MEM 0x90000000 +#define YUCCA_PCIE_MEM_SIZE 0x10000000 + +#define YUCCA_PCIX_MEM_SIZE 0x10000000 +#define YUCCA_PCIX_MEM_OFFSET 0x00000000 +#define YUCCA_PCIE_MEM_SIZE 0x10000000 +#define YUCCA_PCIE_MEM_OFFSET 0x00000000 + +#endif /* __ASM_YUCCA_H__ */ +#endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c index b38a851a64e..04bdc39bf47 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.c +++ b/arch/ppc/platforms/83xx/mpc834x_sys.c @@ -3,7 +3,7 @@ * * MPC834x SYS board specific routines * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor Inc. * @@ -24,7 +24,6 @@ #include <linux/major.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/serial.h> @@ -52,6 +51,9 @@ #include <syslib/ppc83xx_setup.h> +static const char *GFAR_PHY_0 = "phy0:0"; +static const char *GFAR_PHY_1 = "phy0:1"; + #ifndef CONFIG_PCI unsigned long isa_io_base = 0; unsigned long isa_mem_base = 0; @@ -71,12 +73,19 @@ mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) * A B C D */ { - {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */ - {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */ - {PIRQD, PIRQA, PIRQB, PIRQC} /* idsel 0x13 */ + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */ + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */ + {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */ + {0, 0, 0, 0}, + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */ + {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */ + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */ + {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */ + {0, 0, 0, 0}, /* idsel 0x19 */ + {0, 0, 0, 0}, /* idsel 0x20 */ }; - const long min_idsel = 0x11, max_idsel = 0x13, irqs_per_slot = 4; + const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4; return PCI_IRQ_TABLE_LOOKUP; } @@ -98,6 +107,7 @@ mpc834x_sys_setup_arch(void) bd_t *binfo = (bd_t *) __res; unsigned int freq; struct gianfar_platform_data *pdata; + struct gianfar_mdio_data *mdata; /* get the core frequency */ freq = binfo->bi_intfreq; @@ -112,24 +122,27 @@ mpc834x_sys_setup_arch(void) #endif mpc83xx_early_serial_map(); + /* setup the board related info for the MDIO bus */ + mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC83xx_MDIO); + + mdata->irq[0] = MPC83xx_IRQ_EXT1; + mdata->irq[1] = MPC83xx_IRQ_EXT2; + mdata->irq[2] = -1; + mdata->irq[31] = -1; + mdata->paddr += binfo->bi_immr_base; + /* setup the board related information for the enet controllers */ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC83xx_IRQ_EXT1; - pdata->phyid = 0; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_0; memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC83xx_IRQ_EXT2; - pdata->phyid = 1; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_1; memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); } diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h index 1584cd77a9e..2e514d316fb 100644 --- a/arch/ppc/platforms/83xx/mpc834x_sys.h +++ b/arch/ppc/platforms/83xx/mpc834x_sys.h @@ -3,7 +3,7 @@ * * MPC834X SYS common board definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor, Inc. * @@ -19,7 +19,6 @@ #include <linux/config.h> #include <linux/init.h> -#include <linux/seq_file.h> #include <syslib/ppc83xx_setup.h> #include <asm/ppcboot.h> diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c index f761fdf160d..c5cde97c6ef 100644 --- a/arch/ppc/platforms/85xx/mpc8540_ads.c +++ b/arch/ppc/platforms/85xx/mpc8540_ads.c @@ -3,7 +3,7 @@ * * MPC8540ADS board specific routines * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * @@ -24,7 +24,6 @@ #include <linux/major.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/serial.h> @@ -53,6 +52,10 @@ #include <syslib/ppc85xx_setup.h> +static const char *GFAR_PHY_0 = "phy0:0"; +static const char *GFAR_PHY_1 = "phy0:1"; +static const char *GFAR_PHY_3 = "phy0:3"; + /* ************************************************************************ * * Setup the architecture @@ -64,6 +67,7 @@ mpc8540ads_setup_arch(void) bd_t *binfo = (bd_t *) __res; unsigned int freq; struct gianfar_platform_data *pdata; + struct gianfar_mdio_data *mdata; /* get the core frequency */ freq = binfo->bi_intfreq; @@ -90,34 +94,35 @@ mpc8540ads_setup_arch(void) invalidate_tlbcam_entry(num_tlbcam_entries - 1); #endif + /* setup the board related info for the MDIO bus */ + mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); + + mdata->irq[0] = MPC85xx_IRQ_EXT5; + mdata->irq[1] = MPC85xx_IRQ_EXT5; + mdata->irq[2] = -1; + mdata->irq[3] = MPC85xx_IRQ_EXT5; + mdata->irq[31] = -1; + mdata->paddr += binfo->bi_immr_base; + /* setup the board related information for the enet controllers */ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 0; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_0; memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 1; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_1; memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); if (pdata) { pdata->board_flags = 0; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 3; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_3; memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); } diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.h b/arch/ppc/platforms/85xx/mpc8540_ads.h index 3d05d7c4a93..e48ca3a9739 100644 --- a/arch/ppc/platforms/85xx/mpc8540_ads.h +++ b/arch/ppc/platforms/85xx/mpc8540_ads.h @@ -3,7 +3,7 @@ * * MPC8540ADS board definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc8555_cds.h b/arch/ppc/platforms/85xx/mpc8555_cds.h index e0e75568bc5..1a8e6c67355 100644 --- a/arch/ppc/platforms/85xx/mpc8555_cds.h +++ b/arch/ppc/platforms/85xx/mpc8555_cds.h @@ -3,7 +3,7 @@ * * MPC8555CDS board definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c index f2748c88665..8e39a551709 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.c +++ b/arch/ppc/platforms/85xx/mpc8560_ads.c @@ -3,7 +3,7 @@ * * MPC8560ADS board specific routines * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * @@ -24,7 +24,6 @@ #include <linux/major.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/serial.h> @@ -57,6 +56,10 @@ #include <syslib/ppc85xx_setup.h> +static const char *GFAR_PHY_0 = "phy0:0"; +static const char *GFAR_PHY_1 = "phy0:1"; +static const char *GFAR_PHY_3 = "phy0:3"; + /* ************************************************************************ * * Setup the architecture @@ -69,6 +72,7 @@ mpc8560ads_setup_arch(void) bd_t *binfo = (bd_t *) __res; unsigned int freq; struct gianfar_platform_data *pdata; + struct gianfar_mdio_data *mdata; cpm2_reset(); @@ -87,24 +91,28 @@ mpc8560ads_setup_arch(void) mpc85xx_setup_hose(); #endif + /* setup the board related info for the MDIO bus */ + mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); + + mdata->irq[0] = MPC85xx_IRQ_EXT5; + mdata->irq[1] = MPC85xx_IRQ_EXT5; + mdata->irq[2] = -1; + mdata->irq[3] = MPC85xx_IRQ_EXT5; + mdata->irq[31] = -1; + mdata->paddr += binfo->bi_immr_base; + /* setup the board related information for the enet controllers */ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 0; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_0; memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 1; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_1; memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); } diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.h b/arch/ppc/platforms/85xx/mpc8560_ads.h index 7df885d73e9..143ae7eefa7 100644 --- a/arch/ppc/platforms/85xx/mpc8560_ads.h +++ b/arch/ppc/platforms/85xx/mpc8560_ads.h @@ -3,7 +3,7 @@ * * MPC8540ADS board definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c index 18e952d1767..17ce48fe350 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c +++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c @@ -3,7 +3,7 @@ * * MPC85xx ADS board common routines * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * @@ -24,7 +24,6 @@ #include <linux/major.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/serial.h> #include <linux/module.h> @@ -46,6 +45,8 @@ #include <mm/mmu_decl.h> +#include <syslib/ppc85xx_rio.h> + #include <platforms/85xx/mpc85xx_ads_common.h> #ifndef CONFIG_PCI @@ -190,3 +191,11 @@ mpc85xx_exclude_device(u_char bus, u_char devfn) } #endif /* CONFIG_PCI */ + +#ifdef CONFIG_RAPIDIO +void platform_rio_init(void) +{ + /* 512MB RIO LAW at 0xc0000000 */ + mpc85xx_rio_setup(0xc0000000, 0x20000000); +} +#endif /* CONFIG_RAPIDIO */ diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h index 3875e839cff..198a6a02cde 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h +++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h @@ -3,7 +3,7 @@ * * MPC85XX ADS common board definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * @@ -19,13 +19,14 @@ #include <linux/config.h> #include <linux/init.h> -#include <linux/seq_file.h> #include <asm/ppcboot.h> #define BOARD_CCSRBAR ((uint)0xe0000000) #define BCSR_ADDR ((uint)0xf8000000) #define BCSR_SIZE ((uint)(32 * 1024)) +struct seq_file; + extern int mpc85xx_ads_show_cpuinfo(struct seq_file *m); extern void mpc85xx_ads_init_IRQ(void) __init; extern void mpc85xx_ads_map_io(void) __init; diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c index 6267b294f70..d8991b88dc9 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c +++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c @@ -3,7 +3,7 @@ * * MPC85xx CDS board specific routines * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor, Inc * @@ -24,7 +24,6 @@ #include <linux/major.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/serial.h> #include <linux/module.h> @@ -174,10 +173,7 @@ mpc85xx_cds_init_IRQ(void) #ifdef CONFIG_PCI openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq); - for (i = 0; i < NUM_8259_INTERRUPTS; i++) - irq_desc[i].handler = &i8259_pic; - - i8259_init(0); + i8259_init(0, 0); #endif #ifdef CONFIG_CPM2 @@ -395,6 +391,9 @@ mpc85xx_cds_pcibios_fixup(void) TODC_ALLOC(); +static const char *GFAR_PHY_0 = "phy0:0"; +static const char *GFAR_PHY_1 = "phy0:1"; + /* ************************************************************************ * * Setup the architecture @@ -406,6 +405,7 @@ mpc85xx_cds_setup_arch(void) bd_t *binfo = (bd_t *) __res; unsigned int freq; struct gianfar_platform_data *pdata; + struct gianfar_mdio_data *mdata; /* get the core frequency */ freq = binfo->bi_intfreq; @@ -449,44 +449,42 @@ mpc85xx_cds_setup_arch(void) invalidate_tlbcam_entry(num_tlbcam_entries - 1); #endif + /* setup the board related info for the MDIO bus */ + mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); + + mdata->irq[0] = MPC85xx_IRQ_EXT5; + mdata->irq[1] = MPC85xx_IRQ_EXT5; + mdata->irq[2] = -1; + mdata->irq[3] = -1; + mdata->irq[31] = -1; + mdata->paddr += binfo->bi_immr_base; + /* setup the board related information for the enet controllers */ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 0; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_0; memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 1; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_1; memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 0; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_0; memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 1; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_1; memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); } diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h index 12b292c6ae3..5b588cfd0e4 100644 --- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h +++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h @@ -3,7 +3,7 @@ * * MPC85xx CDS board definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor, Inc * diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c index 165df94d4aa..45a5b81b4ed 100644 --- a/arch/ppc/platforms/85xx/sbc8560.c +++ b/arch/ppc/platforms/85xx/sbc8560.c @@ -3,7 +3,7 @@ * * Wind River SBC8560 board specific routines * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala * * Copyright 2004 Freescale Semiconductor Inc. * @@ -24,7 +24,6 @@ #include <linux/major.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/serial.h> @@ -92,6 +91,9 @@ sbc8560_early_serial_map(void) } #endif +static const char *GFAR_PHY_25 = "phy0:25"; +static const char *GFAR_PHY_26 = "phy0:26"; + /* ************************************************************************ * * Setup the architecture @@ -103,6 +105,7 @@ sbc8560_setup_arch(void) bd_t *binfo = (bd_t *) __res; unsigned int freq; struct gianfar_platform_data *pdata; + struct gianfar_mdio_data *mdata; /* get the core frequency */ freq = binfo->bi_intfreq; @@ -127,24 +130,26 @@ sbc8560_setup_arch(void) invalidate_tlbcam_entry(num_tlbcam_entries - 1); #endif + /* setup the board related info for the MDIO bus */ + mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); + + mdata->irq[25] = MPC85xx_IRQ_EXT6; + mdata->irq[26] = MPC85xx_IRQ_EXT7; + mdata->irq[31] = -1; + mdata->paddr += binfo->bi_immr_base; + /* setup the board related information for the enet controllers */ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT6; - pdata->phyid = 25; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_25; memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); if (pdata) { pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; - pdata->interruptPHY = MPC85xx_IRQ_EXT7; - pdata->phyid = 26; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_26; memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); } diff --git a/arch/ppc/platforms/85xx/sbc85xx.c b/arch/ppc/platforms/85xx/sbc85xx.c index 4f6d1ddd6fb..c02f110219f 100644 --- a/arch/ppc/platforms/85xx/sbc85xx.c +++ b/arch/ppc/platforms/85xx/sbc85xx.c @@ -23,7 +23,6 @@ #include <linux/major.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/serial.h> #include <linux/module.h> diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c index c99b365d611..15ce9d07063 100644 --- a/arch/ppc/platforms/85xx/stx_gp3.c +++ b/arch/ppc/platforms/85xx/stx_gp3.c @@ -30,7 +30,6 @@ #include <linux/blkdev.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/root_dev.h> #include <linux/seq_file.h> #include <linux/serial.h> @@ -38,6 +37,7 @@ #include <linux/module.h> #include <linux/fsl_devices.h> #include <linux/interrupt.h> +#include <linux/rio.h> #include <asm/system.h> #include <asm/pgtable.h> @@ -58,6 +58,7 @@ #include <syslib/cpm2_pic.h> #include <syslib/ppc85xx_common.h> +#include <syslib/ppc85xx_rio.h> unsigned char __res[sizeof(bd_t)]; @@ -92,6 +93,9 @@ static u8 gp3_openpic_initsenses[] __initdata = { 0x0, /* External 11: */ }; +static const char *GFAR_PHY_2 = "phy0:2"; +static const char *GFAR_PHY_4 = "phy0:4"; + /* * Setup the architecture */ @@ -101,6 +105,7 @@ gp3_setup_arch(void) bd_t *binfo = (bd_t *) __res; unsigned int freq; struct gianfar_platform_data *pdata; + struct gianfar_mdio_data *mdata; cpm2_reset(); @@ -119,23 +124,26 @@ gp3_setup_arch(void) mpc85xx_setup_hose(); #endif + /* setup the board related info for the MDIO bus */ + mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO); + + mdata->irq[2] = MPC85xx_IRQ_EXT5; + mdata->irq[4] = MPC85xx_IRQ_EXT5; + mdata->irq[31] = -1; + mdata->paddr += binfo->bi_immr_base; + /* setup the board related information for the enet controllers */ pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); if (pdata) { /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 2; - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_2; memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); } pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); if (pdata) { /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ - pdata->interruptPHY = MPC85xx_IRQ_EXT5; - pdata->phyid = 4; - /* fixup phy address */ - pdata->phy_reg_addr += binfo->bi_immr_base; + pdata->bus_id = GFAR_PHY_4; memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); } @@ -267,6 +275,18 @@ int mpc85xx_exclude_device(u_char bus, u_char devfn) } #endif /* CONFIG_PCI */ +#ifdef CONFIG_RAPIDIO +void +platform_rio_init(void) +{ + /* + * The STx firmware configures the RapidIO Local Access Window + * at 0xc0000000 with a size of 512MB. + */ + mpc85xx_rio_setup(0xc0000000, 0x20000000); +} +#endif /* CONFIG_RAPIDIO */ + void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, unsigned long r6, unsigned long r7) diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h index 7bcc6c35a41..2f25b519515 100644 --- a/arch/ppc/platforms/85xx/stx_gp3.h +++ b/arch/ppc/platforms/85xx/stx_gp3.h @@ -21,7 +21,6 @@ #include <linux/config.h> #include <linux/init.h> -#include <linux/seq_file.h> #include <asm/ppcboot.h> #define BOARD_CCSRBAR ((uint)0xe0000000) @@ -43,7 +42,6 @@ extern void mpc85xx_setup_hose(void) __init; extern void mpc85xx_restart(char *cmd); extern void mpc85xx_power_off(void); extern void mpc85xx_halt(void); -extern int mpc85xx_show_cpuinfo(struct seq_file *m); extern void mpc85xx_init_IRQ(void) __init; extern unsigned long mpc85xx_find_end_of_memory(void) __init; extern void mpc85xx_calibrate_decr(void) __init; diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile index ff7452e5d8e..7c5cdabf6f3 100644 --- a/arch/ppc/platforms/Makefile +++ b/arch/ppc/platforms/Makefile @@ -14,6 +14,9 @@ obj-$(CONFIG_PPC_PMAC) += pmac_pic.o pmac_setup.o pmac_time.o \ pmac_low_i2c.o pmac_cache.o obj-$(CONFIG_PPC_CHRP) += chrp_setup.o chrp_time.o chrp_pci.o \ chrp_pegasos_eth.o +ifeq ($(CONFIG_PPC_CHRP),y) +obj-$(CONFIG_NVRAM) += chrp_nvram.o +endif obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o ifeq ($(CONFIG_PPC_PMAC),y) obj-$(CONFIG_NVRAM) += pmac_nvram.o diff --git a/arch/ppc/platforms/chestnut.c b/arch/ppc/platforms/chestnut.c index 7786818bd9d..48a4a510d59 100644 --- a/arch/ppc/platforms/chestnut.c +++ b/arch/ppc/platforms/chestnut.c @@ -35,7 +35,6 @@ #include <asm/time.h> #include <asm/dma.h> #include <asm/io.h> -#include <linux/irq.h> #include <asm/hw_irq.h> #include <asm/machdep.h> #include <asm/kgdb.h> @@ -542,7 +541,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.setup_arch = chestnut_setup_arch; ppc_md.show_cpuinfo = chestnut_show_cpuinfo; - ppc_md.irq_canonicalize = NULL; ppc_md.init_IRQ = mv64360_init_irq; ppc_md.get_irq = mv64360_get_irq; ppc_md.init = NULL; diff --git a/arch/ppc/platforms/chrp_nvram.c b/arch/ppc/platforms/chrp_nvram.c new file mode 100644 index 00000000000..465ba9b090e --- /dev/null +++ b/arch/ppc/platforms/chrp_nvram.c @@ -0,0 +1,83 @@ +/* + * c 2001 PPC 64 Team, IBM Corp + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * /dev/nvram driver for PPC + * + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/slab.h> +#include <linux/spinlock.h> +#include <asm/uaccess.h> +#include <asm/prom.h> +#include <asm/machdep.h> + +static unsigned int nvram_size; +static unsigned char nvram_buf[4]; +static DEFINE_SPINLOCK(nvram_lock); + +static unsigned char chrp_nvram_read(int addr) +{ + unsigned long done, flags; + unsigned char ret; + + if (addr >= nvram_size) { + printk(KERN_DEBUG "%s: read addr %d > nvram_size %u\n", + current->comm, addr, nvram_size); + return 0xff; + } + spin_lock_irqsave(&nvram_lock, flags); + if ((call_rtas("nvram-fetch", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done) + ret = 0xff; + else + ret = nvram_buf[0]; + spin_unlock_irqrestore(&nvram_lock, flags); + + return ret; +} + +static void chrp_nvram_write(int addr, unsigned char val) +{ + unsigned long done, flags; + + if (addr >= nvram_size) { + printk(KERN_DEBUG "%s: write addr %d > nvram_size %u\n", + current->comm, addr, nvram_size); + return; + } + spin_lock_irqsave(&nvram_lock, flags); + nvram_buf[0] = val; + if ((call_rtas("nvram-store", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done) + printk(KERN_DEBUG "rtas IO error storing 0x%02x at %d", val, addr); + spin_unlock_irqrestore(&nvram_lock, flags); +} + +void __init chrp_nvram_init(void) +{ + struct device_node *nvram; + unsigned int *nbytes_p, proplen; + + nvram = of_find_node_by_type(NULL, "nvram"); + if (nvram == NULL) + return; + + nbytes_p = (unsigned int *)get_property(nvram, "#bytes", &proplen); + if (nbytes_p == NULL || proplen != sizeof(unsigned int)) + return; + + nvram_size = *nbytes_p; + + printk(KERN_INFO "CHRP nvram contains %u bytes\n", nvram_size); + of_node_put(nvram); + + ppc_md.nvram_read_val = chrp_nvram_read; + ppc_md.nvram_write_val = chrp_nvram_write; + + return; +} diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c index 7d3fbb5c5db..bd047aac01b 100644 --- a/arch/ppc/platforms/chrp_pci.c +++ b/arch/ppc/platforms/chrp_pci.c @@ -29,7 +29,7 @@ void __iomem *gg2_pci_config_base; * limit the bus number to 3 bits */ -int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off, +int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off, int len, u32 *val) { volatile void __iomem *cfg_data; @@ -56,7 +56,7 @@ int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off, return PCIBIOS_SUCCESSFUL; } -int __chrp gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off, +int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off, int len, u32 val) { volatile void __iomem *cfg_data; @@ -92,7 +92,7 @@ static struct pci_ops gg2_pci_ops = /* * Access functions for PCI config space using RTAS calls. */ -int __chrp +int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) { @@ -108,7 +108,7 @@ rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL; } -int __chrp +int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) { @@ -203,7 +203,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d printk ("RTAS supporting Pegasos OF not found, please upgrade" " your firmware\n"); } - pci_assign_all_busses = 1; + pci_assign_all_buses = 1; } void __init diff --git a/arch/ppc/platforms/chrp_pegasos_eth.c b/arch/ppc/platforms/chrp_pegasos_eth.c index cad5bfa153b..108a6e26518 100644 --- a/arch/ppc/platforms/chrp_pegasos_eth.c +++ b/arch/ppc/platforms/chrp_pegasos_eth.c @@ -13,11 +13,24 @@ #include <linux/types.h> #include <linux/init.h> #include <linux/ioport.h> -#include <linux/device.h> +#include <linux/platform_device.h> #include <linux/mv643xx.h> #include <linux/pci.h> -/* Pegasos 2 specific Marvell MV 64361 gigabit ethernet port setup */ +#define PEGASOS2_MARVELL_REGBASE (0xf1000000) +#define PEGASOS2_MARVELL_REGSIZE (0x00004000) +#define PEGASOS2_SRAM_BASE (0xf2000000) +#define PEGASOS2_SRAM_SIZE (256*1024) + +#define PEGASOS2_SRAM_BASE_ETH0 (PEGASOS2_SRAM_BASE) +#define PEGASOS2_SRAM_BASE_ETH1 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) ) + + +#define PEGASOS2_SRAM_RXRING_SIZE (PEGASOS2_SRAM_SIZE/4) +#define PEGASOS2_SRAM_TXRING_SIZE (PEGASOS2_SRAM_SIZE/4) + +#undef BE_VERBOSE + static struct resource mv643xx_eth_shared_resources[] = { [0] = { .name = "ethernet shared base", @@ -44,7 +57,16 @@ static struct resource mv643xx_eth0_resources[] = { }, }; -static struct mv643xx_eth_platform_data eth0_pd; + +static struct mv643xx_eth_platform_data eth0_pd = { + .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0, + .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE, + .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16, + + .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE, + .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE, + .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16, +}; static struct platform_device eth0_device = { .name = MV643XX_ETH_NAME, @@ -65,7 +87,15 @@ static struct resource mv643xx_eth1_resources[] = { }, }; -static struct mv643xx_eth_platform_data eth1_pd; +static struct mv643xx_eth_platform_data eth1_pd = { + .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1, + .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE, + .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16, + + .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE, + .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE, + .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16, +}; static struct platform_device eth1_device = { .name = MV643XX_ETH_NAME, @@ -83,9 +113,62 @@ static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { ð1_device, }; +/***********/ +/***********/ +#define MV_READ(offset,val) { val = readl(mv643xx_reg_base + offset); } +#define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset) + +static void __iomem *mv643xx_reg_base; + +static int Enable_SRAM(void) +{ + u32 ALong; + + if (mv643xx_reg_base == NULL) + mv643xx_reg_base = ioremap(PEGASOS2_MARVELL_REGBASE, + PEGASOS2_MARVELL_REGSIZE); + + if (mv643xx_reg_base == NULL) + return -ENOMEM; + +#ifdef BE_VERBOSE + printk("Pegasos II/Marvell MV64361: register remapped from %p to %p\n", + (void *)PEGASOS2_MARVELL_REGBASE, (void *)mv643xx_reg_base); +#endif + + MV_WRITE(MV64340_SRAM_CONFIG, 0); -int -mv643xx_eth_add_pds(void) + MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16); + + MV_READ(MV64340_BASE_ADDR_ENABLE, ALong); + ALong &= ~(1 << 19); + MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong); + + ALong = 0x02; + ALong |= PEGASOS2_SRAM_BASE & 0xffff0000; + MV_WRITE(MV643XX_ETH_BAR_4, ALong); + + MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000); + + MV_READ(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong); + ALong &= ~(1 << 4); + MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong); + +#ifdef BE_VERBOSE + printk("Pegasos II/Marvell MV64361: register unmapped\n"); + printk("Pegasos II/Marvell MV64361: SRAM at %p, size=%x\n", (void*) PEGASOS2_SRAM_BASE, PEGASOS2_SRAM_SIZE); +#endif + + iounmap(mv643xx_reg_base); + mv643xx_reg_base = NULL; + + return 1; +} + + +/***********/ +/***********/ +int mv643xx_eth_add_pds(void) { int ret = 0; static struct pci_device_id pci_marvell_mv64360[] = { @@ -93,9 +176,38 @@ mv643xx_eth_add_pds(void) { } }; +#ifdef BE_VERBOSE + printk("Pegasos II/Marvell MV64361: init\n"); +#endif + if (pci_dev_present(pci_marvell_mv64360)) { - ret = platform_add_devices(mv643xx_eth_pd_devs, ARRAY_SIZE(mv643xx_eth_pd_devs)); + ret = platform_add_devices(mv643xx_eth_pd_devs, + ARRAY_SIZE(mv643xx_eth_pd_devs)); + + if ( Enable_SRAM() < 0) + { + eth0_pd.tx_sram_addr = 0; + eth0_pd.tx_sram_size = 0; + eth0_pd.rx_sram_addr = 0; + eth0_pd.rx_sram_size = 0; + + eth1_pd.tx_sram_addr = 0; + eth1_pd.tx_sram_size = 0; + eth1_pd.rx_sram_addr = 0; + eth1_pd.rx_sram_size = 0; + +#ifdef BE_VERBOSE + printk("Pegasos II/Marvell MV64361: Can't enable the " + "SRAM\n"); +#endif + } } + +#ifdef BE_VERBOSE + printk("Pegasos II/Marvell MV64361: init is over\n"); +#endif + return ret; } + device_initcall(mv643xx_eth_add_pds); diff --git a/arch/ppc/platforms/chrp_setup.c b/arch/ppc/platforms/chrp_setup.c index 57f29ab29bd..f1b70ab3c6f 100644 --- a/arch/ppc/platforms/chrp_setup.c +++ b/arch/ppc/platforms/chrp_setup.c @@ -32,7 +32,6 @@ #include <linux/module.h> #include <linux/delay.h> #include <linux/ide.h> -#include <linux/irq.h> #include <linux/console.h> #include <linux/seq_file.h> #include <linux/root_dev.h> @@ -105,7 +104,7 @@ static const char *gg2_cachemodes[4] = { "Disabled", "Write-Through", "Copy-Back", "Transparent Mode" }; -int __chrp +int chrp_show_cpuinfo(struct seq_file *m) { int i, sdramen; @@ -303,7 +302,7 @@ void __init chrp_setup_arch(void) pci_create_OF_bus_map(); } -void __chrp +void chrp_event_scan(void) { unsigned char log[1024]; @@ -314,7 +313,7 @@ chrp_event_scan(void) ppc_md.heartbeat_count = ppc_md.heartbeat_reset; } -void __chrp +void chrp_restart(char *cmd) { printk("RTAS system-reboot returned %d\n", @@ -322,7 +321,7 @@ chrp_restart(char *cmd) for (;;); } -void __chrp +void chrp_power_off(void) { /* allow power on only with power button press */ @@ -331,20 +330,12 @@ chrp_power_off(void) for (;;); } -void __chrp +void chrp_halt(void) { chrp_power_off(); } -u_int __chrp -chrp_irq_canonicalize(u_int irq) -{ - if (irq == 2) - return 9; - return irq; -} - /* * Finds the open-pic node and sets OpenPIC_Addr based on its reg property. * Then checks if it has an interrupt-ranges property. If it does then @@ -445,9 +436,7 @@ void __init chrp_init_IRQ(void) i8259_irq); } - for (i = 0; i < NUM_8259_INTERRUPTS; i++) - irq_desc[i].handler = &i8259_pic; - i8259_init(chrp_int_ack); + i8259_init(chrp_int_ack, 0); #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) /* see if there is a keyboard in the device tree @@ -465,8 +454,7 @@ void __init chrp_init2(void) { #ifdef CONFIG_NVRAM -// XX replace this in a more saner way -// pmac_nvram_init(); + chrp_nvram_init(); #endif request_region(0x20,0x20,"pic1"); @@ -500,6 +488,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5, DMA_MODE_READ = 0x44; DMA_MODE_WRITE = 0x48; isa_io_base = CHRP_ISA_IO_BASE; /* default value */ + ppc_do_canonicalize_irqs = 1; if (root) machine = get_property(root, "model", NULL); @@ -518,7 +507,6 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.show_percpuinfo = of_show_percpuinfo; ppc_md.show_cpuinfo = chrp_show_cpuinfo; - ppc_md.irq_canonicalize = chrp_irq_canonicalize; ppc_md.init_IRQ = chrp_init_IRQ; if (_chrp_type == _CHRP_Pegasos) ppc_md.get_irq = i8259_irq; @@ -562,7 +550,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5, #endif #ifdef CONFIG_SMP - ppc_md.smp_ops = &chrp_smp_ops; + smp_ops = &chrp_smp_ops; #endif /* CONFIG_SMP */ /* @@ -572,7 +560,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5, if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0); } -void __chrp +void rtas_display_progress(char *s, unsigned short hex) { int width; @@ -599,7 +587,7 @@ rtas_display_progress(char *s, unsigned short hex) call_rtas( "display-character", 1, 1, NULL, ' ' ); } -void __chrp +void rtas_indicator_progress(char *s, unsigned short hex) { call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex); diff --git a/arch/ppc/platforms/chrp_smp.c b/arch/ppc/platforms/chrp_smp.c index 0ea1f7d9e46..97e539557ec 100644 --- a/arch/ppc/platforms/chrp_smp.c +++ b/arch/ppc/platforms/chrp_smp.c @@ -31,6 +31,7 @@ #include <asm/residual.h> #include <asm/time.h> #include <asm/open_pic.h> +#include <asm/machdep.h> extern unsigned long smp_chrp_cpu_nr; @@ -88,7 +89,7 @@ smp_chrp_take_timebase(void) } /* CHRP with openpic */ -struct smp_ops_t chrp_smp_ops __chrpdata = { +struct smp_ops_t chrp_smp_ops = { .message_pass = smp_openpic_message_pass, .probe = smp_chrp_probe, .kick_cpu = smp_chrp_kick_cpu, diff --git a/arch/ppc/platforms/chrp_time.c b/arch/ppc/platforms/chrp_time.c index 6037ce7796f..29d074c305f 100644 --- a/arch/ppc/platforms/chrp_time.c +++ b/arch/ppc/platforms/chrp_time.c @@ -52,7 +52,7 @@ long __init chrp_time_init(void) return 0; } -int __chrp chrp_cmos_clock_read(int addr) +int chrp_cmos_clock_read(int addr) { if (nvram_as1 != 0) outb(addr>>8, nvram_as1); @@ -60,7 +60,7 @@ int __chrp chrp_cmos_clock_read(int addr) return (inb(nvram_data)); } -void __chrp chrp_cmos_clock_write(unsigned long val, int addr) +void chrp_cmos_clock_write(unsigned long val, int addr) { if (nvram_as1 != 0) outb(addr>>8, nvram_as1); @@ -72,7 +72,7 @@ void __chrp chrp_cmos_clock_write(unsigned long val, int addr) /* * Set the hardware clock. -- Cort */ -int __chrp chrp_set_rtc_time(unsigned long nowtime) +int chrp_set_rtc_time(unsigned long nowtime) { unsigned char save_control, save_freq_select; struct rtc_time tm; @@ -118,7 +118,7 @@ int __chrp chrp_set_rtc_time(unsigned long nowtime) return 0; } -unsigned long __chrp chrp_get_rtc_time(void) +unsigned long chrp_get_rtc_time(void) { unsigned int year, mon, day, hour, min, sec; int uip, i; diff --git a/arch/ppc/platforms/cpci690.c b/arch/ppc/platforms/cpci690.c index f64ac2acb60..6ca7bcac947 100644 --- a/arch/ppc/platforms/cpci690.c +++ b/arch/ppc/platforms/cpci690.c @@ -21,6 +21,7 @@ #include <linux/initrd.h> #include <linux/root_dev.h> #include <linux/mv643xx.h> +#include <linux/platform_device.h> #include <asm/bootinfo.h> #include <asm/machdep.h> #include <asm/todc.h> diff --git a/arch/ppc/platforms/ev64260.c b/arch/ppc/platforms/ev64260.c index aa50637a5cf..32358b3fb23 100644 --- a/arch/ppc/platforms/ev64260.c +++ b/arch/ppc/platforms/ev64260.c @@ -33,6 +33,7 @@ #include <linux/console.h> #include <linux/initrd.h> #include <linux/root_dev.h> +#include <linux/platform_device.h> #if !defined(CONFIG_SERIAL_MPSC_CONSOLE) #include <linux/serial.h> #include <linux/tty.h> diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c index 9811a8a52c2..b9d844f88c2 100644 --- a/arch/ppc/platforms/ev64360.c +++ b/arch/ppc/platforms/ev64360.c @@ -25,6 +25,7 @@ #include <linux/bootmem.h> #include <linux/mtd/physmap.h> #include <linux/mv643xx.h> +#include <linux/platform_device.h> #ifdef CONFIG_BOOTIMG #include <linux/bootimg.h> #endif @@ -35,6 +36,7 @@ #include <asm/bootinfo.h> #include <asm/ppcboot.h> #include <asm/mv64x60.h> +#include <asm/machdep.h> #include <platforms/ev64360.h> #define BOARD_VENDOR "Marvell" @@ -50,6 +52,8 @@ static u32 ev64360_bus_frequency; unsigned char __res[sizeof(bd_t)]; +TODC_ALLOC(); + static int __init ev64360_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) { @@ -180,6 +184,9 @@ ev64360_setup_peripherals(void) EV64360_RTC_WINDOW_BASE, EV64360_RTC_WINDOW_SIZE, 0); bh.ci->enable_window_32bit(&bh, MV64x60_CPU2DEV_1_WIN); + TODC_INIT(TODC_TYPE_DS1501, 0, 0, + ioremap(EV64360_RTC_WINDOW_BASE, EV64360_RTC_WINDOW_SIZE), 8); + mv64x60_set_32bit_window(&bh, MV64x60_CPU2SRAM_WIN, EV64360_INTERNAL_SRAM_BASE, MV64360_SRAM_SIZE, 0); bh.ci->enable_window_32bit(&bh, MV64x60_CPU2SRAM_WIN); @@ -494,6 +501,13 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.power_off = ev64360_power_off; ppc_md.halt = ev64360_halt; ppc_md.find_end_of_memory = ev64360_find_end_of_memory; + ppc_md.init = NULL; + + ppc_md.time_init = todc_time_init; + ppc_md.set_rtc_time = todc_set_rtc_time; + ppc_md.get_rtc_time = todc_get_rtc_time; + ppc_md.nvram_read_val = todc_direct_read_val; + ppc_md.nvram_write_val = todc_direct_write_val; ppc_md.calibrate_decr = ev64360_calibrate_decr; #if defined(CONFIG_SERIAL_TEXT_DEBUG) && defined(CONFIG_SERIAL_MPSC_CONSOLE) diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h index b60c56450b6..a48fb8d723e 100644 --- a/arch/ppc/platforms/fads.h +++ b/arch/ppc/platforms/fads.h @@ -25,6 +25,8 @@ #if defined(CONFIG_MPC86XADS) +#define BOARD_CHIP_NAME "MPC86X" + /* U-Boot maps BCSR to 0xff080000 */ #define BCSR_ADDR ((uint)0xff080000) diff --git a/arch/ppc/platforms/gemini_setup.c b/arch/ppc/platforms/gemini_setup.c index e391e52383c..729897c5903 100644 --- a/arch/ppc/platforms/gemini_setup.c +++ b/arch/ppc/platforms/gemini_setup.c @@ -21,7 +21,6 @@ #include <linux/major.h> #include <linux/initrd.h> #include <linux/console.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/bcd.h> @@ -36,6 +35,7 @@ #include <asm/time.h> #include <asm/open_pic.h> #include <asm/bootinfo.h> +#include <asm/machdep.h> void gemini_find_bridges(void); static int gemini_get_clock_speed(void); @@ -556,7 +556,6 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.setup_arch = gemini_setup_arch; ppc_md.show_cpuinfo = gemini_show_cpuinfo; - ppc_md.irq_canonicalize = NULL; ppc_md.init_IRQ = gemini_init_IRQ; ppc_md.get_irq = openpic_get_irq; ppc_md.init = NULL; @@ -576,6 +575,6 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup; #ifdef CONFIG_SMP - ppc_md.smp_ops = &gemini_smp_ops; + smp_ops = &gemini_smp_ops; #endif /* CONFIG_SMP */ } diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c index ff379686012..50039a204c2 100644 --- a/arch/ppc/platforms/hdpu.c +++ b/arch/ppc/platforms/hdpu.c @@ -22,6 +22,7 @@ #include <linux/irq.h> #include <linux/ide.h> #include <linux/seq_file.h> +#include <linux/platform_device.h> #include <linux/initrd.h> #include <linux/root_dev.h> @@ -609,11 +610,6 @@ static void parse_bootinfo(unsigned long r3, } #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) -static int hdpu_ide_check_region(ide_ioreg_t from, unsigned int extent) -{ - return check_region(from, extent); -} - static void hdpu_ide_request_region(ide_ioreg_t from, unsigned int extent, const char *name) { @@ -753,7 +749,7 @@ static int smp_hdpu_probe(void) } static void -smp_hdpu_message_pass(int target, int msg, unsigned long data, int wait) +smp_hdpu_message_pass(int target, int msg) { if (msg > 0x3) { printk("SMP %d: smp_message_pass: unknown msg %d\n", @@ -949,7 +945,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, #endif /* CONFIG_SERIAL_TEXT_DEBUG */ #ifdef CONFIG_SMP - ppc_md.smp_ops = &hdpu_smp_ops; + smp_ops = &hdpu_smp_ops; #endif /* CONFIG_SMP */ #if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c index 2b53afae0e9..6e58e30ceed 100644 --- a/arch/ppc/platforms/katana.c +++ b/arch/ppc/platforms/katana.c @@ -29,6 +29,7 @@ #include <linux/seq_file.h> #include <linux/mtd/physmap.h> #include <linux/mv643xx.h> +#include <linux/platform_device.h> #ifdef CONFIG_BOOTIMG #include <linux/bootimg.h> #endif @@ -42,6 +43,7 @@ #include <asm/ppcboot.h> #include <asm/mv64x60.h> #include <platforms/katana.h> +#include <asm/machdep.h> static struct mv64x60_handle bh; static katana_id_t katana_id; @@ -520,7 +522,7 @@ katana_fixup_resources(struct pci_dev *dev) { u16 v16; - pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_LINE_SIZE>>2); + pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES>>2); pci_read_config_word(dev, PCI_COMMAND, &v16); v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK; diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c index b604cf8b3ca..d44cc991179 100644 --- a/arch/ppc/platforms/lite5200.c +++ b/arch/ppc/platforms/lite5200.c @@ -35,6 +35,7 @@ #include <asm/io.h> #include <asm/mpc52xx.h> #include <asm/ppc_sys.h> +#include <asm/machdep.h> #include <syslib/mpc52xx_pci.h> diff --git a/arch/ppc/platforms/lopec.c b/arch/ppc/platforms/lopec.c index a5569525e0a..06d247c23b8 100644 --- a/arch/ppc/platforms/lopec.c +++ b/arch/ppc/platforms/lopec.c @@ -144,15 +144,6 @@ lopec_show_cpuinfo(struct seq_file *m) return 0; } -static u32 -lopec_irq_canonicalize(u32 irq) -{ - if (irq == 2) - return 9; - else - return irq; -} - static void lopec_restart(char *cmd) { @@ -276,15 +267,11 @@ lopec_init_IRQ(void) openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", &i8259_irq); - /* Map i8259 interrupts */ - for(i = 0; i < NUM_8259_INTERRUPTS; i++) - irq_desc[i].handler = &i8259_pic; - /* * The EPIC allows for a read in the range of 0xFEF00000 -> * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction. */ - i8259_init(0xfef00000); + i8259_init(0xfef00000, 0); } static int __init @@ -379,10 +366,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ISA_DMA_THRESHOLD = 0x00ffffff; DMA_MODE_READ = 0x44; DMA_MODE_WRITE = 0x48; + ppc_do_canonicalize_irqs = 1; ppc_md.setup_arch = lopec_setup_arch; ppc_md.show_cpuinfo = lopec_show_cpuinfo; - ppc_md.irq_canonicalize = lopec_irq_canonicalize; ppc_md.init_IRQ = lopec_init_IRQ; ppc_md.get_irq = openpic_get_irq; diff --git a/arch/ppc/platforms/mpc885ads.h b/arch/ppc/platforms/mpc885ads.h index eb386635b0f..a80b7d116b4 100644 --- a/arch/ppc/platforms/mpc885ads.h +++ b/arch/ppc/platforms/mpc885ads.h @@ -88,5 +88,7 @@ #define SICR_ENET_MASK ((uint)0x00ff0000) #define SICR_ENET_CLKRT ((uint)0x002c0000) +#define BOARD_CHIP_NAME "MPC885" + #endif /* __ASM_MPC885ADS_H__ */ #endif /* __KERNEL__ */ diff --git a/arch/ppc/platforms/mvme5100.c b/arch/ppc/platforms/mvme5100.c index b292b44b760..108eb182ddd 100644 --- a/arch/ppc/platforms/mvme5100.c +++ b/arch/ppc/platforms/mvme5100.c @@ -20,7 +20,6 @@ #include <linux/initrd.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/ide.h> #include <linux/seq_file.h> #include <linux/kdev_t.h> @@ -224,11 +223,7 @@ mvme5100_init_IRQ(void) openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", &i8259_irq); - /* Map i8259 interrupts. */ - for (i = 0; i < NUM_8259_INTERRUPTS; i++) - irq_desc[i].handler = &i8259_pic; - - i8259_init(0); + i8259_init(0, 0); #else openpic_init(0); #endif diff --git a/arch/ppc/platforms/pal4_setup.c b/arch/ppc/platforms/pal4_setup.c index 12446b93e38..f93a3f87193 100644 --- a/arch/ppc/platforms/pal4_setup.c +++ b/arch/ppc/platforms/pal4_setup.c @@ -28,6 +28,7 @@ #include <asm/io.h> #include <asm/todc.h> #include <asm/bootinfo.h> +#include <asm/machdep.h> #include <syslib/cpc700.h> diff --git a/arch/ppc/platforms/pmac_backlight.c b/arch/ppc/platforms/pmac_backlight.c index ed2b1cebc19..8be2f7d071f 100644 --- a/arch/ppc/platforms/pmac_backlight.c +++ b/arch/ppc/platforms/pmac_backlight.c @@ -37,7 +37,7 @@ static int backlight_req_enable = -1; static void backlight_callback(void *); static DECLARE_WORK(backlight_work, backlight_callback, NULL); -void __pmac register_backlight_controller(struct backlight_controller *ctrler, +void register_backlight_controller(struct backlight_controller *ctrler, void *data, char *type) { struct device_node* bk_node; @@ -99,7 +99,7 @@ void __pmac register_backlight_controller(struct backlight_controller *ctrler, } EXPORT_SYMBOL(register_backlight_controller); -void __pmac unregister_backlight_controller(struct backlight_controller +void unregister_backlight_controller(struct backlight_controller *ctrler, void *data) { /* We keep the current backlight level (for now) */ @@ -108,7 +108,7 @@ void __pmac unregister_backlight_controller(struct backlight_controller } EXPORT_SYMBOL(unregister_backlight_controller); -static int __pmac __set_backlight_enable(int enable) +static int __set_backlight_enable(int enable) { int rc; @@ -122,7 +122,7 @@ static int __pmac __set_backlight_enable(int enable) release_console_sem(); return rc; } -int __pmac set_backlight_enable(int enable) +int set_backlight_enable(int enable) { if (!backlighter) return -ENODEV; @@ -133,7 +133,7 @@ int __pmac set_backlight_enable(int enable) EXPORT_SYMBOL(set_backlight_enable); -int __pmac get_backlight_enable(void) +int get_backlight_enable(void) { if (!backlighter) return -ENODEV; @@ -141,7 +141,7 @@ int __pmac get_backlight_enable(void) } EXPORT_SYMBOL(get_backlight_enable); -static int __pmac __set_backlight_level(int level) +static int __set_backlight_level(int level) { int rc = 0; @@ -165,7 +165,7 @@ static int __pmac __set_backlight_level(int level) } return rc; } -int __pmac set_backlight_level(int level) +int set_backlight_level(int level) { if (!backlighter) return -ENODEV; @@ -176,7 +176,7 @@ int __pmac set_backlight_level(int level) EXPORT_SYMBOL(set_backlight_level); -int __pmac get_backlight_level(void) +int get_backlight_level(void) { if (!backlighter) return -ENODEV; diff --git a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c index c0605244edd..fba7e4d7c0b 100644 --- a/arch/ppc/platforms/pmac_cpufreq.c +++ b/arch/ppc/platforms/pmac_cpufreq.c @@ -136,7 +136,7 @@ static inline void debug_calc_bogomips(void) /* Switch CPU speed under 750FX CPU control */ -static int __pmac cpu_750fx_cpu_speed(int low_speed) +static int cpu_750fx_cpu_speed(int low_speed) { u32 hid2; @@ -172,7 +172,7 @@ static int __pmac cpu_750fx_cpu_speed(int low_speed) return 0; } -static unsigned int __pmac cpu_750fx_get_cpu_speed(void) +static unsigned int cpu_750fx_get_cpu_speed(void) { if (mfspr(SPRN_HID1) & HID1_PS) return low_freq; @@ -181,7 +181,7 @@ static unsigned int __pmac cpu_750fx_get_cpu_speed(void) } /* Switch CPU speed using DFS */ -static int __pmac dfs_set_cpu_speed(int low_speed) +static int dfs_set_cpu_speed(int low_speed) { if (low_speed == 0) { /* ramping up, set voltage first */ @@ -205,7 +205,7 @@ static int __pmac dfs_set_cpu_speed(int low_speed) return 0; } -static unsigned int __pmac dfs_get_cpu_speed(void) +static unsigned int dfs_get_cpu_speed(void) { if (mfspr(SPRN_HID1) & HID1_DFS) return low_freq; @@ -216,7 +216,7 @@ static unsigned int __pmac dfs_get_cpu_speed(void) /* Switch CPU speed using slewing GPIOs */ -static int __pmac gpios_set_cpu_speed(int low_speed) +static int gpios_set_cpu_speed(int low_speed) { int gpio, timeout = 0; @@ -258,7 +258,7 @@ static int __pmac gpios_set_cpu_speed(int low_speed) /* Switch CPU speed under PMU control */ -static int __pmac pmu_set_cpu_speed(int low_speed) +static int pmu_set_cpu_speed(int low_speed) { struct adb_request req; unsigned long save_l2cr; @@ -354,7 +354,7 @@ static int __pmac pmu_set_cpu_speed(int low_speed) return 0; } -static int __pmac do_set_cpu_speed(int speed_mode, int notify) +static int do_set_cpu_speed(int speed_mode, int notify) { struct cpufreq_freqs freqs; unsigned long l3cr; @@ -391,17 +391,17 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify) return 0; } -static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu) +static unsigned int pmac_cpufreq_get_speed(unsigned int cpu) { return cur_freq; } -static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy) +static int pmac_cpufreq_verify(struct cpufreq_policy *policy) { return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs); } -static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy, +static int pmac_cpufreq_target( struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) { @@ -414,13 +414,13 @@ static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy, return do_set_cpu_speed(newstate, 1); } -unsigned int __pmac pmac_get_one_cpufreq(int i) +unsigned int pmac_get_one_cpufreq(int i) { /* Supports only one CPU for now */ return (i == 0) ? cur_freq : 0; } -static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) +static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) { if (policy->cpu != 0) return -ENODEV; @@ -433,7 +433,7 @@ static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs); } -static u32 __pmac read_gpio(struct device_node *np) +static u32 read_gpio(struct device_node *np) { u32 *reg = (u32 *)get_property(np, "reg", NULL); u32 offset; @@ -452,7 +452,7 @@ static u32 __pmac read_gpio(struct device_node *np) return offset; } -static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg) +static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg) { /* Ok, this could be made a bit smarter, but let's be robust for now. We * always force a speed change to high speed before sleep, to make sure @@ -468,7 +468,7 @@ static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message return 0; } -static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy) +static int pmac_cpufreq_resume(struct cpufreq_policy *policy) { /* If we resume, first check if we have a get() function */ if (get_speed_proc) @@ -501,7 +501,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = { }; -static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) +static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) { struct device_node *volt_gpio_np = of_find_node_by_name(NULL, "voltage-gpio"); @@ -593,7 +593,7 @@ static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) return 0; } -static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode) +static int pmac_cpufreq_init_7447A(struct device_node *cpunode) { struct device_node *volt_gpio_np; @@ -620,7 +620,7 @@ static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode) return 0; } -static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode) +static int pmac_cpufreq_init_750FX(struct device_node *cpunode) { struct device_node *volt_gpio_np; u32 pvr, *value; @@ -695,6 +695,13 @@ static int __init pmac_cpufreq_setup(void) set_speed_proc = pmu_set_cpu_speed; is_pmu_based = 1; } + /* Else check for TiPb 550 */ + else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) { + hi_freq = cur_freq; + low_freq = 500000; + set_speed_proc = pmu_set_cpu_speed; + is_pmu_based = 1; + } /* Else check for TiPb 400 & 500 */ else if (machine_is_compatible("PowerBook3,2")) { /* We only know about the 400 MHz and the 500Mhz model diff --git a/arch/ppc/platforms/pmac_feature.c b/arch/ppc/platforms/pmac_feature.c index 867336ad5d3..1e69b059316 100644 --- a/arch/ppc/platforms/pmac_feature.c +++ b/arch/ppc/platforms/pmac_feature.c @@ -63,7 +63,7 @@ extern struct device_node *k2_skiplist[2]; * We use a single global lock to protect accesses. Each driver has * to take care of its own locking */ -static DEFINE_SPINLOCK(feature_lock __pmacdata); +static DEFINE_SPINLOCK(feature_lock); #define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); #define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); @@ -72,9 +72,9 @@ static DEFINE_SPINLOCK(feature_lock __pmacdata); /* * Instance of some macio stuffs */ -struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata; +struct macio_chip macio_chips[MAX_MACIO_CHIPS]; -struct macio_chip* __pmac macio_find(struct device_node* child, int type) +struct macio_chip* macio_find(struct device_node* child, int type) { while(child) { int i; @@ -89,7 +89,7 @@ struct macio_chip* __pmac macio_find(struct device_node* child, int type) } EXPORT_SYMBOL_GPL(macio_find); -static const char* macio_names[] __pmacdata = +static const char* macio_names[] = { "Unknown", "Grand Central", @@ -116,10 +116,10 @@ static const char* macio_names[] __pmacdata = #define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) #define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) -static struct device_node* uninorth_node __pmacdata; -static u32 __iomem * uninorth_base __pmacdata; -static u32 uninorth_rev __pmacdata; -static int uninorth_u3 __pmacdata; +static struct device_node* uninorth_node; +static u32 __iomem * uninorth_base; +static u32 uninorth_rev; +static int uninorth_u3; static void __iomem *u3_ht; /* @@ -142,13 +142,13 @@ struct pmac_mb_def struct feature_table_entry* features; unsigned long board_flags; }; -static struct pmac_mb_def pmac_mb __pmacdata; +static struct pmac_mb_def pmac_mb; /* * Here are the chip specific feature functions */ -static inline int __pmac +static inline int simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value) { struct macio_chip* macio; @@ -170,7 +170,7 @@ simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int #ifndef CONFIG_POWER4 -static long __pmac +static long ohare_htw_scc_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -263,21 +263,21 @@ ohare_htw_scc_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long ohare_floppy_enable(struct device_node* node, long param, long value) { return simple_feature_tweak(node, macio_ohare, OHARE_FCR, OH_FLOPPY_ENABLE, value); } -static long __pmac +static long ohare_mesh_enable(struct device_node* node, long param, long value) { return simple_feature_tweak(node, macio_ohare, OHARE_FCR, OH_MESH_ENABLE, value); } -static long __pmac +static long ohare_ide_enable(struct device_node* node, long param, long value) { switch(param) { @@ -298,7 +298,7 @@ ohare_ide_enable(struct device_node* node, long param, long value) } } -static long __pmac +static long ohare_ide_reset(struct device_node* node, long param, long value) { switch(param) { @@ -313,7 +313,7 @@ ohare_ide_reset(struct device_node* node, long param, long value) } } -static long __pmac +static long ohare_sleep_state(struct device_node* node, long param, long value) { struct macio_chip* macio = &macio_chips[0]; @@ -329,7 +329,7 @@ ohare_sleep_state(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long heathrow_modem_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -373,7 +373,7 @@ heathrow_modem_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long heathrow_floppy_enable(struct device_node* node, long param, long value) { return simple_feature_tweak(node, macio_unknown, @@ -382,7 +382,7 @@ heathrow_floppy_enable(struct device_node* node, long param, long value) value); } -static long __pmac +static long heathrow_mesh_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -411,7 +411,7 @@ heathrow_mesh_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long heathrow_ide_enable(struct device_node* node, long param, long value) { switch(param) { @@ -426,7 +426,7 @@ heathrow_ide_enable(struct device_node* node, long param, long value) } } -static long __pmac +static long heathrow_ide_reset(struct device_node* node, long param, long value) { switch(param) { @@ -441,7 +441,7 @@ heathrow_ide_reset(struct device_node* node, long param, long value) } } -static long __pmac +static long heathrow_bmac_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -470,7 +470,7 @@ heathrow_bmac_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long heathrow_sound_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -501,16 +501,16 @@ heathrow_sound_enable(struct device_node* node, long param, long value) return 0; } -static u32 save_fcr[6] __pmacdata; -static u32 save_mbcr __pmacdata; -static u32 save_gpio_levels[2] __pmacdata; -static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata; -static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata; -static u32 save_unin_clock_ctl __pmacdata; -static struct dbdma_regs save_dbdma[13] __pmacdata; -static struct dbdma_regs save_alt_dbdma[13] __pmacdata; +static u32 save_fcr[6]; +static u32 save_mbcr; +static u32 save_gpio_levels[2]; +static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT]; +static u8 save_gpio_normal[KEYLARGO_GPIO_CNT]; +static u32 save_unin_clock_ctl; +static struct dbdma_regs save_dbdma[13]; +static struct dbdma_regs save_alt_dbdma[13]; -static void __pmac +static void dbdma_save(struct macio_chip* macio, struct dbdma_regs* save) { int i; @@ -527,7 +527,7 @@ dbdma_save(struct macio_chip* macio, struct dbdma_regs* save) } } -static void __pmac +static void dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save) { int i; @@ -547,7 +547,7 @@ dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save) } } -static void __pmac +static void heathrow_sleep(struct macio_chip* macio, int secondary) { if (secondary) { @@ -580,7 +580,7 @@ heathrow_sleep(struct macio_chip* macio, int secondary) (void)MACIO_IN32(HEATHROW_FCR); } -static void __pmac +static void heathrow_wakeup(struct macio_chip* macio, int secondary) { if (secondary) { @@ -605,7 +605,7 @@ heathrow_wakeup(struct macio_chip* macio, int secondary) } } -static long __pmac +static long heathrow_sleep_state(struct device_node* node, long param, long value) { if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) @@ -622,7 +622,7 @@ heathrow_sleep_state(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long core99_scc_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -723,7 +723,7 @@ core99_scc_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long core99_modem_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -775,7 +775,7 @@ core99_modem_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long pangea_modem_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -830,7 +830,7 @@ pangea_modem_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long core99_ata100_enable(struct device_node* node, long value) { unsigned long flags; @@ -860,7 +860,7 @@ core99_ata100_enable(struct device_node* node, long value) return 0; } -static long __pmac +static long core99_ide_enable(struct device_node* node, long param, long value) { /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2 @@ -883,7 +883,7 @@ core99_ide_enable(struct device_node* node, long param, long value) } } -static long __pmac +static long core99_ide_reset(struct device_node* node, long param, long value) { switch(param) { @@ -901,7 +901,7 @@ core99_ide_reset(struct device_node* node, long param, long value) } } -static long __pmac +static long core99_gmac_enable(struct device_node* node, long param, long value) { unsigned long flags; @@ -918,7 +918,7 @@ core99_gmac_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long core99_gmac_phy_reset(struct device_node* node, long param, long value) { unsigned long flags; @@ -943,7 +943,7 @@ core99_gmac_phy_reset(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long core99_sound_chip_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -973,7 +973,7 @@ core99_sound_chip_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long core99_airport_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -1060,7 +1060,7 @@ core99_airport_enable(struct device_node* node, long param, long value) } #ifdef CONFIG_SMP -static long __pmac +static long core99_reset_cpu(struct device_node* node, long param, long value) { unsigned int reset_io = 0; @@ -1104,7 +1104,7 @@ core99_reset_cpu(struct device_node* node, long param, long value) } #endif /* CONFIG_SMP */ -static long __pmac +static long core99_usb_enable(struct device_node* node, long param, long value) { struct macio_chip* macio; @@ -1257,7 +1257,7 @@ core99_usb_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long core99_firewire_enable(struct device_node* node, long param, long value) { unsigned long flags; @@ -1284,7 +1284,7 @@ core99_firewire_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long core99_firewire_cable_power(struct device_node* node, long param, long value) { unsigned long flags; @@ -1315,7 +1315,7 @@ core99_firewire_cable_power(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long intrepid_aack_delay_enable(struct device_node* node, long param, long value) { unsigned long flags; @@ -1336,7 +1336,7 @@ intrepid_aack_delay_enable(struct device_node* node, long param, long value) #endif /* CONFIG_POWER4 */ -static long __pmac +static long core99_read_gpio(struct device_node* node, long param, long value) { struct macio_chip* macio = &macio_chips[0]; @@ -1345,7 +1345,7 @@ core99_read_gpio(struct device_node* node, long param, long value) } -static long __pmac +static long core99_write_gpio(struct device_node* node, long param, long value) { struct macio_chip* macio = &macio_chips[0]; @@ -1356,7 +1356,7 @@ core99_write_gpio(struct device_node* node, long param, long value) #ifdef CONFIG_POWER4 -static long __pmac +static long g5_gmac_enable(struct device_node* node, long param, long value) { struct macio_chip* macio = &macio_chips[0]; @@ -1380,7 +1380,7 @@ g5_gmac_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long g5_fw_enable(struct device_node* node, long param, long value) { struct macio_chip* macio = &macio_chips[0]; @@ -1403,7 +1403,7 @@ g5_fw_enable(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long g5_mpic_enable(struct device_node* node, long param, long value) { unsigned long flags; @@ -1419,7 +1419,7 @@ g5_mpic_enable(struct device_node* node, long param, long value) } #ifdef CONFIG_SMP -static long __pmac +static long g5_reset_cpu(struct device_node* node, long param, long value) { unsigned int reset_io = 0; @@ -1465,7 +1465,7 @@ g5_reset_cpu(struct device_node* node, long param, long value) * This takes the second CPU off the bus on dual CPU machines * running UP */ -void __pmac g5_phy_disable_cpu1(void) +void g5_phy_disable_cpu1(void) { UN_OUT(U3_API_PHY_CONFIG_1, 0); } @@ -1474,7 +1474,7 @@ void __pmac g5_phy_disable_cpu1(void) #ifndef CONFIG_POWER4 -static void __pmac +static void keylargo_shutdown(struct macio_chip* macio, int sleep_mode) { u32 temp; @@ -1528,7 +1528,7 @@ keylargo_shutdown(struct macio_chip* macio, int sleep_mode) (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); } -static void __pmac +static void pangea_shutdown(struct macio_chip* macio, int sleep_mode) { u32 temp; @@ -1562,7 +1562,7 @@ pangea_shutdown(struct macio_chip* macio, int sleep_mode) (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); } -static void __pmac +static void intrepid_shutdown(struct macio_chip* macio, int sleep_mode) { u32 temp; @@ -1591,7 +1591,7 @@ intrepid_shutdown(struct macio_chip* macio, int sleep_mode) } -void __pmac pmac_tweak_clock_spreading(int enable) +void pmac_tweak_clock_spreading(int enable) { struct macio_chip* macio = &macio_chips[0]; @@ -1698,7 +1698,7 @@ void __pmac pmac_tweak_clock_spreading(int enable) } -static int __pmac +static int core99_sleep(void) { struct macio_chip* macio; @@ -1791,7 +1791,7 @@ core99_sleep(void) return 0; } -static int __pmac +static int core99_wake_up(void) { struct macio_chip* macio; @@ -1854,7 +1854,7 @@ core99_wake_up(void) return 0; } -static long __pmac +static long core99_sleep_state(struct device_node* node, long param, long value) { /* Param == 1 means to enter the "fake sleep" mode that is @@ -1884,7 +1884,7 @@ core99_sleep_state(struct device_node* node, long param, long value) #endif /* CONFIG_POWER4 */ -static long __pmac +static long generic_dev_can_wake(struct device_node* node, long param, long value) { /* Todo: eventually check we are really dealing with on-board @@ -1896,7 +1896,7 @@ generic_dev_can_wake(struct device_node* node, long param, long value) return 0; } -static long __pmac +static long generic_get_mb_info(struct device_node* node, long param, long value) { switch(param) { @@ -1919,7 +1919,7 @@ generic_get_mb_info(struct device_node* node, long param, long value) /* Used on any machine */ -static struct feature_table_entry any_features[] __pmacdata = { +static struct feature_table_entry any_features[] = { { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake }, { 0, NULL } @@ -1931,7 +1931,7 @@ static struct feature_table_entry any_features[] __pmacdata = { * 2400,3400 and 3500 series powerbooks. Some older desktops seem * to have issues with turning on/off those asic cells */ -static struct feature_table_entry ohare_features[] __pmacdata = { +static struct feature_table_entry ohare_features[] = { { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, @@ -1945,7 +1945,7 @@ static struct feature_table_entry ohare_features[] __pmacdata = { * Separated as some features couldn't be properly tested * and the serial port control bits appear to confuse it. */ -static struct feature_table_entry heathrow_desktop_features[] __pmacdata = { +static struct feature_table_entry heathrow_desktop_features[] = { { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, @@ -1957,7 +1957,7 @@ static struct feature_table_entry heathrow_desktop_features[] __pmacdata = { /* Heathrow based laptop, that is the Wallstreet and mainstreet * powerbooks. */ -static struct feature_table_entry heathrow_laptop_features[] __pmacdata = { +static struct feature_table_entry heathrow_laptop_features[] = { { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, @@ -1973,7 +1973,7 @@ static struct feature_table_entry heathrow_laptop_features[] __pmacdata = { /* Paddington based machines * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. */ -static struct feature_table_entry paddington_features[] __pmacdata = { +static struct feature_table_entry paddington_features[] = { { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, @@ -1991,7 +1991,7 @@ static struct feature_table_entry paddington_features[] __pmacdata = { * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo * used on iBook2 & iMac "flow power". */ -static struct feature_table_entry core99_features[] __pmacdata = { +static struct feature_table_entry core99_features[] = { { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, @@ -2014,7 +2014,7 @@ static struct feature_table_entry core99_features[] __pmacdata = { /* RackMac */ -static struct feature_table_entry rackmac_features[] __pmacdata = { +static struct feature_table_entry rackmac_features[] = { { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, { PMAC_FTR_IDE_RESET, core99_ide_reset }, @@ -2034,7 +2034,7 @@ static struct feature_table_entry rackmac_features[] __pmacdata = { /* Pangea features */ -static struct feature_table_entry pangea_features[] __pmacdata = { +static struct feature_table_entry pangea_features[] = { { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, @@ -2054,7 +2054,7 @@ static struct feature_table_entry pangea_features[] __pmacdata = { /* Intrepid features */ -static struct feature_table_entry intrepid_features[] __pmacdata = { +static struct feature_table_entry intrepid_features[] = { { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, @@ -2077,7 +2077,7 @@ static struct feature_table_entry intrepid_features[] __pmacdata = { /* G5 features */ -static struct feature_table_entry g5_features[] __pmacdata = { +static struct feature_table_entry g5_features[] = { { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, { PMAC_FTR_1394_ENABLE, g5_fw_enable }, { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, @@ -2091,7 +2091,7 @@ static struct feature_table_entry g5_features[] __pmacdata = { #endif /* CONFIG_POWER4 */ -static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { +static struct pmac_mb_def pmac_mb_defs[] = { #ifndef CONFIG_POWER4 /* * Desktops @@ -2317,6 +2317,14 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, }, + { "PowerBook5,8", "PowerBook G4 15\"", + PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, + PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, + }, + { "PowerBook5,9", "PowerBook G4 17\"", + PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, + PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, + }, { "PowerBook6,1", "PowerBook G4 12\"", PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, @@ -2337,6 +2345,10 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, }, + { "PowerBook6,7", "iBook G4", + PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, + PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, + }, { "PowerBook6,8", "PowerBook G4 12\"", PMAC_TYPE_UNKNOWN_INTREPID, intrepid_features, PMAC_MB_MAY_SLEEP | PMAC_MB_HAS_FW_POWER | PMAC_MB_MOBILE, @@ -2352,7 +2364,7 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { /* * The toplevel feature_call callback */ -long __pmac +long pmac_do_feature_call(unsigned int selector, ...) { struct device_node* node; @@ -2935,8 +2947,8 @@ void __init pmac_check_ht_link(void) * Early video resume hook */ -static void (*pmac_early_vresume_proc)(void *data) __pmacdata; -static void *pmac_early_vresume_data __pmacdata; +static void (*pmac_early_vresume_proc)(void *data); +static void *pmac_early_vresume_data; void pmac_set_early_video_resume(void (*proc)(void *data), void *data) { @@ -2949,7 +2961,7 @@ void pmac_set_early_video_resume(void (*proc)(void *data), void *data) } EXPORT_SYMBOL(pmac_set_early_video_resume); -void __pmac pmac_call_early_video_resume(void) +void pmac_call_early_video_resume(void) { if (pmac_early_vresume_proc) pmac_early_vresume_proc(pmac_early_vresume_data); @@ -2959,11 +2971,11 @@ void __pmac pmac_call_early_video_resume(void) * AGP related suspend/resume code */ -static struct pci_dev *pmac_agp_bridge __pmacdata; -static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata; -static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata; +static struct pci_dev *pmac_agp_bridge; +static int (*pmac_agp_suspend)(struct pci_dev *bridge); +static int (*pmac_agp_resume)(struct pci_dev *bridge); -void __pmac pmac_register_agp_pm(struct pci_dev *bridge, +void pmac_register_agp_pm(struct pci_dev *bridge, int (*suspend)(struct pci_dev *bridge), int (*resume)(struct pci_dev *bridge)) { @@ -2980,7 +2992,7 @@ void __pmac pmac_register_agp_pm(struct pci_dev *bridge, } EXPORT_SYMBOL(pmac_register_agp_pm); -void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev) +void pmac_suspend_agp_for_card(struct pci_dev *dev) { if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) return; @@ -2990,7 +3002,7 @@ void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev) } EXPORT_SYMBOL(pmac_suspend_agp_for_card); -void __pmac pmac_resume_agp_for_card(struct pci_dev *dev) +void pmac_resume_agp_for_card(struct pci_dev *dev) { if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) return; diff --git a/arch/ppc/platforms/pmac_nvram.c b/arch/ppc/platforms/pmac_nvram.c index c9de6420599..8c9b008c722 100644 --- a/arch/ppc/platforms/pmac_nvram.c +++ b/arch/ppc/platforms/pmac_nvram.c @@ -88,17 +88,17 @@ extern int system_running; static int (*core99_write_bank)(int bank, u8* datas); static int (*core99_erase_bank)(int bank); -static char *nvram_image __pmacdata; +static char *nvram_image; -static unsigned char __pmac core99_nvram_read_byte(int addr) +static unsigned char core99_nvram_read_byte(int addr) { if (nvram_image == NULL) return 0xff; return nvram_image[addr]; } -static void __pmac core99_nvram_write_byte(int addr, unsigned char val) +static void core99_nvram_write_byte(int addr, unsigned char val) { if (nvram_image == NULL) return; @@ -106,18 +106,18 @@ static void __pmac core99_nvram_write_byte(int addr, unsigned char val) } -static unsigned char __openfirmware direct_nvram_read_byte(int addr) +static unsigned char direct_nvram_read_byte(int addr) { return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]); } -static void __openfirmware direct_nvram_write_byte(int addr, unsigned char val) +static void direct_nvram_write_byte(int addr, unsigned char val) { out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val); } -static unsigned char __pmac indirect_nvram_read_byte(int addr) +static unsigned char indirect_nvram_read_byte(int addr) { unsigned char val; unsigned long flags; @@ -130,7 +130,7 @@ static unsigned char __pmac indirect_nvram_read_byte(int addr) return val; } -static void __pmac indirect_nvram_write_byte(int addr, unsigned char val) +static void indirect_nvram_write_byte(int addr, unsigned char val) { unsigned long flags; @@ -143,13 +143,13 @@ static void __pmac indirect_nvram_write_byte(int addr, unsigned char val) #ifdef CONFIG_ADB_PMU -static void __pmac pmu_nvram_complete(struct adb_request *req) +static void pmu_nvram_complete(struct adb_request *req) { if (req->arg) complete((struct completion *)req->arg); } -static unsigned char __pmac pmu_nvram_read_byte(int addr) +static unsigned char pmu_nvram_read_byte(int addr) { struct adb_request req; DECLARE_COMPLETION(req_complete); @@ -165,7 +165,7 @@ static unsigned char __pmac pmu_nvram_read_byte(int addr) return req.reply[0]; } -static void __pmac pmu_nvram_write_byte(int addr, unsigned char val) +static void pmu_nvram_write_byte(int addr, unsigned char val) { struct adb_request req; DECLARE_COMPLETION(req_complete); @@ -183,7 +183,7 @@ static void __pmac pmu_nvram_write_byte(int addr, unsigned char val) #endif /* CONFIG_ADB_PMU */ -static u8 __pmac chrp_checksum(struct chrp_header* hdr) +static u8 chrp_checksum(struct chrp_header* hdr) { u8 *ptr; u16 sum = hdr->signature; @@ -194,7 +194,7 @@ static u8 __pmac chrp_checksum(struct chrp_header* hdr) return sum; } -static u32 __pmac core99_calc_adler(u8 *buffer) +static u32 core99_calc_adler(u8 *buffer) { int cnt; u32 low, high; @@ -216,7 +216,7 @@ static u32 __pmac core99_calc_adler(u8 *buffer) return (high << 16) | low; } -static u32 __pmac core99_check(u8* datas) +static u32 core99_check(u8* datas) { struct core99_header* hdr99 = (struct core99_header*)datas; @@ -235,7 +235,7 @@ static u32 __pmac core99_check(u8* datas) return hdr99->generation; } -static int __pmac sm_erase_bank(int bank) +static int sm_erase_bank(int bank) { int stat, i; unsigned long timeout; @@ -267,7 +267,7 @@ static int __pmac sm_erase_bank(int bank) return 0; } -static int __pmac sm_write_bank(int bank, u8* datas) +static int sm_write_bank(int bank, u8* datas) { int i, stat = 0; unsigned long timeout; @@ -302,7 +302,7 @@ static int __pmac sm_write_bank(int bank, u8* datas) return 0; } -static int __pmac amd_erase_bank(int bank) +static int amd_erase_bank(int bank) { int i, stat = 0; unsigned long timeout; @@ -349,7 +349,7 @@ static int __pmac amd_erase_bank(int bank) return 0; } -static int __pmac amd_write_bank(int bank, u8* datas) +static int amd_write_bank(int bank, u8* datas) { int i, stat = 0; unsigned long timeout; @@ -430,7 +430,7 @@ static void __init lookup_partitions(void) DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]); } -static void __pmac core99_nvram_sync(void) +static void core99_nvram_sync(void) { struct core99_header* hdr99; unsigned long flags; @@ -554,12 +554,12 @@ void __init pmac_nvram_init(void) lookup_partitions(); } -int __pmac pmac_get_partition(int partition) +int pmac_get_partition(int partition) { return nvram_partitions[partition]; } -u8 __pmac pmac_xpram_read(int xpaddr) +u8 pmac_xpram_read(int xpaddr) { int offset = nvram_partitions[pmac_nvram_XPRAM]; @@ -569,7 +569,7 @@ u8 __pmac pmac_xpram_read(int xpaddr) return ppc_md.nvram_read_val(xpaddr + offset); } -void __pmac pmac_xpram_write(int xpaddr, u8 data) +void pmac_xpram_write(int xpaddr, u8 data) { int offset = nvram_partitions[pmac_nvram_XPRAM]; diff --git a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c index 719fb49fe2b..786295b6ddd 100644 --- a/arch/ppc/platforms/pmac_pci.c +++ b/arch/ppc/platforms/pmac_pci.c @@ -141,7 +141,7 @@ fixup_bus_range(struct device_node *bridge) |(((unsigned long)(off)) & 0xFCUL) \ |1UL) -static void volatile __iomem * __pmac +static void volatile __iomem * macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset) { unsigned int caddr; @@ -162,7 +162,7 @@ macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset) return hose->cfg_data + offset; } -static int __pmac +static int macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) { @@ -190,7 +190,7 @@ macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset, return PCIBIOS_SUCCESSFUL; } -static int __pmac +static int macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) { @@ -230,7 +230,7 @@ static struct pci_ops macrisc_pci_ops = /* * Verifiy that a specific (bus, dev_fn) exists on chaos */ -static int __pmac +static int chaos_validate_dev(struct pci_bus *bus, int devfn, int offset) { struct device_node *np; @@ -252,7 +252,7 @@ chaos_validate_dev(struct pci_bus *bus, int devfn, int offset) return PCIBIOS_SUCCESSFUL; } -static int __pmac +static int chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) { @@ -264,7 +264,7 @@ chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset, return macrisc_read_config(bus, devfn, offset, len, val); } -static int __pmac +static int chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) { @@ -294,7 +294,7 @@ static struct pci_ops chaos_pci_ops = + (((unsigned long)bus) << 16) \ + 0x01000000UL) -static void volatile __iomem * __pmac +static void volatile __iomem * u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset) { if (bus == hose->first_busno) { @@ -307,7 +307,7 @@ u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset) return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset); } -static int __pmac +static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) { @@ -357,7 +357,7 @@ u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset, return PCIBIOS_SUCCESSFUL; } -static int __pmac +static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) { @@ -575,7 +575,7 @@ pmac_find_bridges(void) * some offset between bus number and domains for now when we * assign all busses should help for now */ - if (pci_assign_all_busses) + if (pci_assign_all_buses) pcibios_assign_bus_offset = 0x10; #ifdef CONFIG_POWER4 @@ -643,7 +643,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) static int __init setup_uninorth(struct pci_controller* hose, struct reg_property* addr) { - pci_assign_all_busses = 1; + pci_assign_all_buses = 1; has_uninorth = 1; hose->ops = ¯isc_pci_ops; hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000); @@ -677,7 +677,7 @@ setup_u3_agp(struct pci_controller* hose, struct reg_property* addr) { /* On G5, we move AGP up to high bus number so we don't need * to reassign bus numbers for HT. If we ever have P2P bridges - * on AGP, we'll have to move pci_assign_all_busses to the + * on AGP, we'll have to move pci_assign_all_buses to the * pci_controller structure so we enable it for AGP and not for * HT childs. * We hard code the address because of the different size of @@ -899,7 +899,7 @@ pmac_pcibios_fixup(void) pcibios_fixup_OF_interrupts(); } -int __pmac +int pmac_pci_enable_device_hook(struct pci_dev *dev, int initial) { struct device_node* node; @@ -1096,7 +1096,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata); * Disable second function on K2-SATA, it's broken * and disable IO BARs on first one */ -void __pmac pmac_pci_fixup_k2_sata(struct pci_dev* dev) +void pmac_pci_fixup_k2_sata(struct pci_dev* dev) { int i; u16 cmd; diff --git a/arch/ppc/platforms/pmac_pic.c b/arch/ppc/platforms/pmac_pic.c index 2ce058895e0..4742bf60935 100644 --- a/arch/ppc/platforms/pmac_pic.c +++ b/arch/ppc/platforms/pmac_pic.c @@ -35,6 +35,7 @@ #include <asm/open_pic.h> #include <asm/xmon.h> #include <asm/pmac_feature.h> +#include <asm/machdep.h> #include "pmac_pic.h" @@ -53,7 +54,7 @@ struct pmac_irq_hw { }; /* Default addresses */ -static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = { +static volatile struct pmac_irq_hw *pmac_irq_hw[4] = { (struct pmac_irq_hw *) 0xf3000020, (struct pmac_irq_hw *) 0xf3000010, (struct pmac_irq_hw *) 0xf4000020, @@ -64,22 +65,25 @@ static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = { #define OHARE_LEVEL_MASK 0x1ff00000 #define HEATHROW_LEVEL_MASK 0x1ff00000 -static int max_irqs __pmacdata; -static int max_real_irqs __pmacdata; -static u32 level_mask[4] __pmacdata; +static int max_irqs; +static int max_real_irqs; +static u32 level_mask[4]; -static DEFINE_SPINLOCK(pmac_pic_lock __pmacdata); +static DEFINE_SPINLOCK(pmac_pic_lock); #define GATWICK_IRQ_POOL_SIZE 10 -static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE] __pmacdata; +static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE]; + +#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) +static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; /* * Mark an irq as "lost". This is only used on the pmac * since it can lose interrupts (see pmac_set_irq_mask). * -- Cort */ -void __pmac +void __set_lost(unsigned long irq_nr, int nokick) { if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) { @@ -89,7 +93,7 @@ __set_lost(unsigned long irq_nr, int nokick) } } -static void __pmac +static void pmac_mask_and_ack_irq(unsigned int irq_nr) { unsigned long bit = 1UL << (irq_nr & 0x1f); @@ -114,7 +118,7 @@ pmac_mask_and_ack_irq(unsigned int irq_nr) spin_unlock_irqrestore(&pmac_pic_lock, flags); } -static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) +static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) { unsigned long bit = 1UL << (irq_nr & 0x1f); int i = irq_nr >> 5; @@ -147,7 +151,7 @@ static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) /* When an irq gets requested for the first client, if it's an * edge interrupt, we clear any previous one on the controller */ -static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr) +static unsigned int pmac_startup_irq(unsigned int irq_nr) { unsigned long bit = 1UL << (irq_nr & 0x1f); int i = irq_nr >> 5; @@ -160,20 +164,20 @@ static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr) return 0; } -static void __pmac pmac_mask_irq(unsigned int irq_nr) +static void pmac_mask_irq(unsigned int irq_nr) { clear_bit(irq_nr, ppc_cached_irq_mask); pmac_set_irq_mask(irq_nr, 0); mb(); } -static void __pmac pmac_unmask_irq(unsigned int irq_nr) +static void pmac_unmask_irq(unsigned int irq_nr) { set_bit(irq_nr, ppc_cached_irq_mask); pmac_set_irq_mask(irq_nr, 0); } -static void __pmac pmac_end_irq(unsigned int irq_nr) +static void pmac_end_irq(unsigned int irq_nr) { if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) && irq_desc[irq_nr].action) { diff --git a/arch/ppc/platforms/pmac_setup.c b/arch/ppc/platforms/pmac_setup.c index b392b9a1598..55d2beffe56 100644 --- a/arch/ppc/platforms/pmac_setup.c +++ b/arch/ppc/platforms/pmac_setup.c @@ -48,7 +48,6 @@ #include <linux/adb.h> #include <linux/cuda.h> #include <linux/pmu.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/root_dev.h> #include <linux/bitops.h> @@ -123,7 +122,7 @@ extern struct smp_ops_t psurge_smp_ops; extern struct smp_ops_t core99_smp_ops; #endif /* CONFIG_SMP */ -static int __pmac +static int pmac_show_cpuinfo(struct seq_file *m) { struct device_node *np; @@ -227,7 +226,7 @@ pmac_show_cpuinfo(struct seq_file *m) return 0; } -static int __openfirmware +static int pmac_show_percpuinfo(struct seq_file *m, int i) { #ifdef CONFIG_CPU_FREQ_PMAC @@ -331,9 +330,9 @@ pmac_setup_arch(void) #ifdef CONFIG_SMP /* Check for Core99 */ if (find_devices("uni-n") || find_devices("u3")) - ppc_md.smp_ops = &core99_smp_ops; + smp_ops = &core99_smp_ops; else - ppc_md.smp_ops = &psurge_smp_ops; + smp_ops = &psurge_smp_ops; #endif /* CONFIG_SMP */ pci_create_OF_bus_map(); @@ -448,7 +447,7 @@ static int pmac_pm_enter(suspend_state_t state) enable_kernel_fp(); #ifdef CONFIG_ALTIVEC - if (cur_cpu_spec[0]->cpu_features & CPU_FTR_ALTIVEC) + if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC) enable_kernel_altivec(); #endif /* CONFIG_ALTIVEC */ @@ -486,7 +485,7 @@ static int pmac_late_init(void) late_initcall(pmac_late_init); /* can't be __init - can be called whenever a disk is first accessed */ -void __pmac +void note_bootable_part(dev_t dev, int part, int goodness) { static int found_boot = 0; @@ -512,7 +511,7 @@ note_bootable_part(dev_t dev, int part, int goodness) } } -static void __pmac +static void pmac_restart(char *cmd) { #ifdef CONFIG_ADB_CUDA @@ -537,7 +536,7 @@ pmac_restart(char *cmd) } } -static void __pmac +static void pmac_power_off(void) { #ifdef CONFIG_ADB_CUDA @@ -562,7 +561,7 @@ pmac_power_off(void) } } -static void __pmac +static void pmac_halt(void) { pmac_power_off(); @@ -662,7 +661,6 @@ pmac_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.setup_arch = pmac_setup_arch; ppc_md.show_cpuinfo = pmac_show_cpuinfo; ppc_md.show_percpuinfo = pmac_show_percpuinfo; - ppc_md.irq_canonicalize = NULL; ppc_md.init_IRQ = pmac_pic_init; ppc_md.get_irq = pmac_get_irq; /* Changed later on ... */ @@ -719,7 +717,8 @@ pmac_declare_of_platform_devices(void) if (np) { for (np = np->child; np != NULL; np = np->sibling) if (strncmp(np->name, "i2c", 3) == 0) { - of_platform_device_create(np, "uni-n-i2c"); + of_platform_device_create(np, "uni-n-i2c", + NULL); break; } } @@ -727,17 +726,18 @@ pmac_declare_of_platform_devices(void) if (np) { for (np = np->child; np != NULL; np = np->sibling) if (strncmp(np->name, "i2c", 3) == 0) { - of_platform_device_create(np, "u3-i2c"); + of_platform_device_create(np, "u3-i2c", + NULL); break; } } np = find_devices("valkyrie"); if (np) - of_platform_device_create(np, "valkyrie"); + of_platform_device_create(np, "valkyrie", NULL); np = find_devices("platinum"); if (np) - of_platform_device_create(np, "platinum"); + of_platform_device_create(np, "platinum", NULL); return 0; } diff --git a/arch/ppc/platforms/pmac_sleep.S b/arch/ppc/platforms/pmac_sleep.S index 88419c77ac4..22b113d19b2 100644 --- a/arch/ppc/platforms/pmac_sleep.S +++ b/arch/ppc/platforms/pmac_sleep.S @@ -387,10 +387,10 @@ turn_on_mmu: #endif /* defined(CONFIG_PM) || defined(CONFIG_CPU_FREQ) */ .section .data - .balign L1_CACHE_LINE_SIZE + .balign L1_CACHE_BYTES sleep_storage: .long 0 - .balign L1_CACHE_LINE_SIZE, 0 + .balign L1_CACHE_BYTES, 0 #endif /* CONFIG_6xx */ .section .text diff --git a/arch/ppc/platforms/pmac_smp.c b/arch/ppc/platforms/pmac_smp.c index 794a23994b8..26ff26238f0 100644 --- a/arch/ppc/platforms/pmac_smp.c +++ b/arch/ppc/platforms/pmac_smp.c @@ -186,7 +186,7 @@ static inline void psurge_clr_ipi(int cpu) */ static unsigned long psurge_smp_message[NR_CPUS]; -void __pmac psurge_smp_message_recv(struct pt_regs *regs) +void psurge_smp_message_recv(struct pt_regs *regs) { int cpu = smp_processor_id(); int msg; @@ -203,14 +203,13 @@ void __pmac psurge_smp_message_recv(struct pt_regs *regs) smp_message_recv(msg, regs); } -irqreturn_t __pmac psurge_primary_intr(int irq, void *d, struct pt_regs *regs) +irqreturn_t psurge_primary_intr(int irq, void *d, struct pt_regs *regs) { psurge_smp_message_recv(regs); return IRQ_HANDLED; } -static void __pmac smp_psurge_message_pass(int target, int msg, unsigned long data, - int wait) +static void smp_psurge_message_pass(int target, int msg) { int i; @@ -629,7 +628,7 @@ void smp_core99_give_timebase(void) /* PowerSurge-style Macs */ -struct smp_ops_t psurge_smp_ops __pmacdata = { +struct smp_ops_t psurge_smp_ops = { .message_pass = smp_psurge_message_pass, .probe = smp_psurge_probe, .kick_cpu = smp_psurge_kick_cpu, @@ -639,7 +638,7 @@ struct smp_ops_t psurge_smp_ops __pmacdata = { }; /* Core99 Macs (dual G4s) */ -struct smp_ops_t core99_smp_ops __pmacdata = { +struct smp_ops_t core99_smp_ops = { .message_pass = smp_openpic_message_pass, .probe = smp_core99_probe, .kick_cpu = smp_core99_kick_cpu, diff --git a/arch/ppc/platforms/pmac_time.c b/arch/ppc/platforms/pmac_time.c index 778ce4fec36..edb9fcc6479 100644 --- a/arch/ppc/platforms/pmac_time.c +++ b/arch/ppc/platforms/pmac_time.c @@ -77,7 +77,7 @@ pmac_time_init(void) #endif } -unsigned long __pmac +unsigned long pmac_get_rtc_time(void) { #if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) @@ -118,7 +118,7 @@ pmac_get_rtc_time(void) return 0; } -int __pmac +int pmac_set_rtc_time(unsigned long nowtime) { #if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) @@ -195,7 +195,7 @@ via_calibrate_decr(void) ; dend = get_dec(); - tb_ticks_per_jiffy = (dstart - dend) / (6 * (HZ/100)); + tb_ticks_per_jiffy = (dstart - dend) / ((6 * HZ)/100); tb_to_us = mulhwu_scale_factor(dstart - dend, 60000); printk(KERN_INFO "via_calibrate_decr: ticks per jiffy = %u (%u ticks)\n", @@ -210,7 +210,7 @@ via_calibrate_decr(void) /* * Reset the time after a sleep. */ -static int __pmac +static int time_sleep_notify(struct pmu_sleep_notifier *self, int when) { static unsigned long time_diff; @@ -235,7 +235,7 @@ time_sleep_notify(struct pmu_sleep_notifier *self, int when) return PBOOK_SLEEP_OK; } -static struct pmu_sleep_notifier time_sleep_notifier __pmacdata = { +static struct pmu_sleep_notifier time_sleep_notifier = { time_sleep_notify, SLEEP_LEVEL_MISC, }; #endif /* CONFIG_PM */ diff --git a/arch/ppc/platforms/powerpmc250.c b/arch/ppc/platforms/powerpmc250.c index 0abe15159e6..e6b520e6e13 100644 --- a/arch/ppc/platforms/powerpmc250.c +++ b/arch/ppc/platforms/powerpmc250.c @@ -26,7 +26,6 @@ #include <linux/initrd.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/slab.h> #include <linux/seq_file.h> #include <linux/ide.h> diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c index 65705c91179..22bd40cfb09 100644 --- a/arch/ppc/platforms/pplus.c +++ b/arch/ppc/platforms/pplus.c @@ -22,7 +22,6 @@ #include <linux/ioport.h> #include <linux/console.h> #include <linux/pci.h> -#include <linux/irq.h> #include <linux/ide.h> #include <linux/seq_file.h> #include <linux/root_dev.h> @@ -647,14 +646,6 @@ static void pplus_power_off(void) pplus_halt(); } -static unsigned int pplus_irq_canonicalize(u_int irq) -{ - if (irq == 2) - return 9; - else - return irq; -} - static void __init pplus_init_IRQ(void) { int i; @@ -674,10 +665,7 @@ static void __init pplus_init_IRQ(void) ppc_md.get_irq = openpic_get_irq; } - for (i = 0; i < NUM_8259_INTERRUPTS; i++) - irq_desc[i].handler = &i8259_pic; - - i8259_init(0); + i8259_init(0, 0); if (ppc_md.progress) ppc_md.progress("init_irq: exit", 0); @@ -873,10 +861,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ISA_DMA_THRESHOLD = 0x00ffffff; DMA_MODE_READ = 0x44; DMA_MODE_WRITE = 0x48; + ppc_do_canonicalize_irqs = 1; ppc_md.setup_arch = pplus_setup_arch; ppc_md.show_cpuinfo = pplus_show_cpuinfo; - ppc_md.irq_canonicalize = pplus_irq_canonicalize; ppc_md.init_IRQ = pplus_init_IRQ; /* this gets changed later on if we have an OpenPIC -- Cort */ ppc_md.get_irq = i8259_irq; @@ -912,6 +900,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.kgdb_map_scc = gen550_kgdb_map_scc; #endif #ifdef CONFIG_SMP - ppc_md.smp_ops = &pplus_smp_ops; + smp_ops = &pplus_smp_ops; #endif /* CONFIG_SMP */ } diff --git a/arch/ppc/platforms/pq2ads.c b/arch/ppc/platforms/pq2ads.c index 6a1475c1e12..71c9fca1fe9 100644 --- a/arch/ppc/platforms/pq2ads.c +++ b/arch/ppc/platforms/pq2ads.c @@ -3,7 +3,7 @@ * * PQ2ADS platform support * - * Author: Kumar Gala <kumar.gala@freescale.com> + * Author: Kumar Gala <galak@kernel.crashing.org> * Derived from: est8260_setup.c by Allen Curtis * * Copyright 2004 Freescale Semiconductor, Inc. diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c index 4760cb64251..e50b9996848 100644 --- a/arch/ppc/platforms/prep_pci.c +++ b/arch/ppc/platforms/prep_pci.c @@ -43,7 +43,7 @@ static unsigned long *ProcInfo; /* Tables for known hardware */ /* Motorola PowerStackII - Utah */ -static char Utah_pci_IRQ_map[23] __prepdata = +static char Utah_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -72,7 +72,7 @@ static char Utah_pci_IRQ_map[23] __prepdata = 0, /* Slot 22 - unused */ }; -static char Utah_pci_IRQ_routes[] __prepdata = +static char Utah_pci_IRQ_routes[] = { 0, /* Line 0 - Unused */ 9, /* Line 1 */ @@ -84,7 +84,7 @@ static char Utah_pci_IRQ_routes[] __prepdata = /* Motorola PowerStackII - Omaha */ /* no integrated SCSI or ethernet */ -static char Omaha_pci_IRQ_map[23] __prepdata = +static char Omaha_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -111,7 +111,7 @@ static char Omaha_pci_IRQ_map[23] __prepdata = 0, }; -static char Omaha_pci_IRQ_routes[] __prepdata = +static char Omaha_pci_IRQ_routes[] = { 0, /* Line 0 - Unused */ 9, /* Line 1 */ @@ -121,7 +121,7 @@ static char Omaha_pci_IRQ_routes[] __prepdata = }; /* Motorola PowerStack */ -static char Blackhawk_pci_IRQ_map[19] __prepdata = +static char Blackhawk_pci_IRQ_map[19] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -144,7 +144,7 @@ static char Blackhawk_pci_IRQ_map[19] __prepdata = 3, /* Slot P5 */ }; -static char Blackhawk_pci_IRQ_routes[] __prepdata = +static char Blackhawk_pci_IRQ_routes[] = { 0, /* Line 0 - Unused */ 9, /* Line 1 */ @@ -154,7 +154,7 @@ static char Blackhawk_pci_IRQ_routes[] __prepdata = }; /* Motorola Mesquite */ -static char Mesquite_pci_IRQ_map[23] __prepdata = +static char Mesquite_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -182,7 +182,7 @@ static char Mesquite_pci_IRQ_map[23] __prepdata = }; /* Motorola Sitka */ -static char Sitka_pci_IRQ_map[21] __prepdata = +static char Sitka_pci_IRQ_map[21] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -208,7 +208,7 @@ static char Sitka_pci_IRQ_map[21] __prepdata = }; /* Motorola MTX */ -static char MTX_pci_IRQ_map[23] __prepdata = +static char MTX_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -237,7 +237,7 @@ static char MTX_pci_IRQ_map[23] __prepdata = /* Motorola MTX Plus */ /* Secondary bus interrupt routing is not supported yet */ -static char MTXplus_pci_IRQ_map[23] __prepdata = +static char MTXplus_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -264,13 +264,13 @@ static char MTXplus_pci_IRQ_map[23] __prepdata = 0, /* Slot 22 - unused */ }; -static char Raven_pci_IRQ_routes[] __prepdata = +static char Raven_pci_IRQ_routes[] = { 0, /* This is a dummy structure */ }; /* Motorola MVME16xx */ -static char Genesis_pci_IRQ_map[16] __prepdata = +static char Genesis_pci_IRQ_map[16] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -290,7 +290,7 @@ static char Genesis_pci_IRQ_map[16] __prepdata = 0, /* Slot 15 - unused */ }; -static char Genesis_pci_IRQ_routes[] __prepdata = +static char Genesis_pci_IRQ_routes[] = { 0, /* Line 0 - Unused */ 10, /* Line 1 */ @@ -299,7 +299,7 @@ static char Genesis_pci_IRQ_routes[] __prepdata = 15 /* Line 4 */ }; -static char Genesis2_pci_IRQ_map[23] __prepdata = +static char Genesis2_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -327,7 +327,7 @@ static char Genesis2_pci_IRQ_map[23] __prepdata = }; /* Motorola Series-E */ -static char Comet_pci_IRQ_map[23] __prepdata = +static char Comet_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -354,7 +354,7 @@ static char Comet_pci_IRQ_map[23] __prepdata = 0, }; -static char Comet_pci_IRQ_routes[] __prepdata = +static char Comet_pci_IRQ_routes[] = { 0, /* Line 0 - Unused */ 10, /* Line 1 */ @@ -364,7 +364,7 @@ static char Comet_pci_IRQ_routes[] __prepdata = }; /* Motorola Series-EX */ -static char Comet2_pci_IRQ_map[23] __prepdata = +static char Comet2_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ @@ -391,7 +391,7 @@ static char Comet2_pci_IRQ_map[23] __prepdata = 0, }; -static char Comet2_pci_IRQ_routes[] __prepdata = +static char Comet2_pci_IRQ_routes[] = { 0, /* Line 0 - Unused */ 10, /* Line 1 */ @@ -405,7 +405,7 @@ static char Comet2_pci_IRQ_routes[] __prepdata = * This is actually based on the Carolina motherboard * -- Cort */ -static char ibm8xx_pci_IRQ_map[23] __prepdata = { +static char ibm8xx_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ 0, /* Slot 2 - unused */ @@ -431,7 +431,7 @@ static char ibm8xx_pci_IRQ_map[23] __prepdata = { 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ }; -static char ibm8xx_pci_IRQ_routes[] __prepdata = { +static char ibm8xx_pci_IRQ_routes[] = { 0, /* Line 0 - unused */ 15, /* Line 1 */ 15, /* Line 2 */ @@ -443,7 +443,7 @@ static char ibm8xx_pci_IRQ_routes[] __prepdata = { * a 6015 ibm board * -- Cort */ -static char ibm6015_pci_IRQ_map[23] __prepdata = { +static char ibm6015_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ 0, /* Slot 2 - unused */ @@ -469,7 +469,7 @@ static char ibm6015_pci_IRQ_map[23] __prepdata = { 2, /* Slot 22 - */ }; -static char ibm6015_pci_IRQ_routes[] __prepdata = { +static char ibm6015_pci_IRQ_routes[] = { 0, /* Line 0 - unused */ 13, /* Line 1 */ 15, /* Line 2 */ @@ -479,7 +479,7 @@ static char ibm6015_pci_IRQ_routes[] __prepdata = { /* IBM Nobis and Thinkpad 850 */ -static char Nobis_pci_IRQ_map[23] __prepdata ={ +static char Nobis_pci_IRQ_map[23] ={ 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ 0, /* Slot 2 - unused */ @@ -498,7 +498,7 @@ static char Nobis_pci_IRQ_map[23] __prepdata ={ 0, /* Slot 15 - unused */ }; -static char Nobis_pci_IRQ_routes[] __prepdata = { +static char Nobis_pci_IRQ_routes[] = { 0, /* Line 0 - Unused */ 13, /* Line 1 */ 13, /* Line 2 */ @@ -510,7 +510,7 @@ static char Nobis_pci_IRQ_routes[] __prepdata = { * IBM RS/6000 43p/140 -- paulus * XXX we should get all this from the residual data */ -static char ibm43p_pci_IRQ_map[23] __prepdata = { +static char ibm43p_pci_IRQ_map[23] = { 0, /* Slot 0 - unused */ 0, /* Slot 1 - unused */ 0, /* Slot 2 - unused */ @@ -536,7 +536,7 @@ static char ibm43p_pci_IRQ_map[23] __prepdata = { 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ }; -static char ibm43p_pci_IRQ_routes[] __prepdata = { +static char ibm43p_pci_IRQ_routes[] = { 0, /* Line 0 - unused */ 15, /* Line 1 */ 15, /* Line 2 */ @@ -559,7 +559,7 @@ struct powerplus_irq_list * are routed to OpenPIC inputs 5-8. These values are offset by * 16 in the table to reflect the Linux kernel interrupt value. */ -struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata = +struct powerplus_irq_list Powerplus_pci_IRQ_list = { {25, 26, 27, 28}, {21, 22, 23, 24} @@ -572,7 +572,7 @@ struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata = * are routed to OpenPIC inputs 12-15. These values are offset by * 16 in the table to reflect the Linux kernel interrupt value. */ -struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata = +struct powerplus_irq_list Mesquite_pci_IRQ_list = { {24, 25, 26, 27}, {28, 29, 30, 31} @@ -582,7 +582,7 @@ struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata = * This table represents the standard PCI swizzle defined in the * PCI bus specification. */ -static unsigned char prep_pci_intpins[4][4] __prepdata = +static unsigned char prep_pci_intpins[4][4] = { { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */ { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */ @@ -622,7 +622,7 @@ static unsigned char prep_pci_intpins[4][4] __prepdata = #define MIN_DEVNR 11 #define MAX_DEVNR 22 -static int __prep +static int prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) { @@ -652,7 +652,7 @@ prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset, return PCIBIOS_SUCCESSFUL; } -static int __prep +static int prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) { @@ -804,7 +804,7 @@ struct mot_info { void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */ struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */ unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */ -} mot_info[] __prepdata = { +} mot_info[] = { {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00}, diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c index bc926be9547..4415748071d 100644 --- a/arch/ppc/platforms/prep_setup.c +++ b/arch/ppc/platforms/prep_setup.c @@ -61,6 +61,15 @@ #include <asm/pci-bridge.h> #include <asm/todc.h> +/* prep registers for L2 */ +#define CACHECRBA 0x80000823 /* Cache configuration register address */ +#define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */ +#define L2CACHE_512KB 0x00 /* 512KB */ +#define L2CACHE_256KB 0x01 /* 256KB */ +#define L2CACHE_1MB 0x02 /* 1MB */ +#define L2CACHE_NONE 0x03 /* NONE */ +#define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */ + TODC_ALLOC(); unsigned char ucSystemType; @@ -89,9 +98,6 @@ extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi #define cached_21 (((char *)(ppc_cached_irq_mask))[3]) #define cached_A1 (((char *)(ppc_cached_irq_mask))[2]) -/* for the mac fs */ -dev_t boot_dev; - #ifdef CONFIG_SOUND_CS4232 long ppc_cs4232_dma, ppc_cs4232_dma2; #endif @@ -173,7 +179,7 @@ prep_carolina_enable_l2(void) } /* cpuinfo code common to all IBM PReP */ -static void __prep +static void prep_ibm_cpuinfo(struct seq_file *m) { unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); @@ -209,14 +215,14 @@ prep_ibm_cpuinfo(struct seq_file *m) } } -static int __prep +static int prep_gen_cpuinfo(struct seq_file *m) { prep_ibm_cpuinfo(m); return 0; } -static int __prep +static int prep_sandalfoot_cpuinfo(struct seq_file *m) { unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); @@ -243,7 +249,7 @@ prep_sandalfoot_cpuinfo(struct seq_file *m) return 0; } -static int __prep +static int prep_thinkpad_cpuinfo(struct seq_file *m) { unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); @@ -314,7 +320,7 @@ prep_thinkpad_cpuinfo(struct seq_file *m) return 0; } -static int __prep +static int prep_carolina_cpuinfo(struct seq_file *m) { unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); @@ -350,7 +356,7 @@ prep_carolina_cpuinfo(struct seq_file *m) return 0; } -static int __prep +static int prep_tiger1_cpuinfo(struct seq_file *m) { unsigned int l2_reg = inb(PREP_IBM_L2INFO); @@ -393,7 +399,7 @@ prep_tiger1_cpuinfo(struct seq_file *m) /* Used by all Motorola PReP */ -static int __prep +static int prep_mot_cpuinfo(struct seq_file *m) { unsigned int cachew = *((unsigned char *)CACHECRBA); @@ -454,7 +460,7 @@ no_l2: return 0; } -static void __prep +static void prep_restart(char *cmd) { #define PREP_SP92 0x92 /* Special Port 92 */ @@ -473,7 +479,7 @@ prep_restart(char *cmd) #undef PREP_SP92 } -static void __prep +static void prep_halt(void) { local_irq_disable(); /* no interrupts */ @@ -488,7 +494,7 @@ prep_halt(void) /* Carrera is the power manager in the Thinkpads. Unfortunately not much is * known about it, so we can't power down. */ -static void __prep +static void prep_carrera_poweroff(void) { prep_halt(); @@ -501,7 +507,7 @@ prep_carrera_poweroff(void) * somewhat in the IBM Carolina Technical Specification. * -Hollis */ -static void __prep +static void utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value) { /* @@ -539,7 +545,7 @@ utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value) udelay(100); /* important: let controller recover */ } -static void __prep +static void prep_sig750_poweroff(void) { /* tweak the power manager found in most IBM PRePs (except Thinkpads) */ @@ -554,7 +560,7 @@ prep_sig750_poweroff(void) /* not reached */ } -static int __prep +static int prep_show_percpuinfo(struct seq_file *m, int i) { /* PREP's without residual data will give incorrect values here */ @@ -700,12 +706,12 @@ prep_set_bat(void) /* * IBM 3-digit status LED */ -static unsigned int ibm_statusled_base __prepdata; +static unsigned int ibm_statusled_base; -static void __prep +static void ibm_statusled_progress(char *s, unsigned short hex); -static int __prep +static int ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2, void * dummy3) { @@ -713,13 +719,13 @@ ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2, return NOTIFY_DONE; } -static struct notifier_block ibm_statusled_block __prepdata = { +static struct notifier_block ibm_statusled_block = { ibm_statusled_panic, NULL, INT_MAX /* try to do it first */ }; -static void __prep +static void ibm_statusled_progress(char *s, unsigned short hex) { static int notifier_installed; @@ -945,19 +951,6 @@ prep_calibrate_decr(void) todc_calibrate_decr(); } -static unsigned int __prep -prep_irq_canonicalize(u_int irq) -{ - if (irq == 2) - { - return 9; - } - else - { - return irq; - } -} - static void __init prep_init_IRQ(void) { @@ -970,11 +963,9 @@ prep_init_IRQ(void) openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", i8259_irq); } - for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ ) - irq_desc[i].handler = &i8259_pic; if (have_residual_data) { - i8259_init(residual_isapic_addr()); + i8259_init(residual_isapic_addr(), 0); return; } @@ -985,18 +976,18 @@ prep_init_IRQ(void) if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA) && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN) || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK))) - i8259_init(0); + i8259_init(0, 0); else /* PCI interrupt ack address given in section 6.1.8 of the * PReP specification. */ - i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR); + i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0); } #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) /* * IDE stuff. */ -static int __prep +static int prep_ide_default_irq(unsigned long base) { switch (base) { @@ -1010,7 +1001,7 @@ prep_ide_default_irq(unsigned long base) } } -static unsigned long __prep +static unsigned long prep_ide_default_io_base(int index) { switch (index) { @@ -1055,7 +1046,7 @@ smp_prep_setup_cpu(int cpu_nr) do_openpic_setup_cpu(); } -static struct smp_ops_t prep_smp_ops __prepdata = { +static struct smp_ops_t prep_smp_ops = { smp_openpic_message_pass, smp_prep_probe, smp_prep_kick_cpu, @@ -1113,6 +1104,7 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5, ISA_DMA_THRESHOLD = 0x00ffffff; DMA_MODE_READ = 0x44; DMA_MODE_WRITE = 0x48; + ppc_do_canonicalize_irqs = 1; /* figure out what kind of prep workstation we are */ if (have_residual_data) { @@ -1139,7 +1131,6 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.setup_arch = prep_setup_arch; ppc_md.show_percpuinfo = prep_show_percpuinfo; ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */ - ppc_md.irq_canonicalize = prep_irq_canonicalize; ppc_md.init_IRQ = prep_init_IRQ; /* this gets changed later on if we have an OpenPIC -- Cort */ ppc_md.get_irq = i8259_irq; @@ -1176,6 +1167,6 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5, #endif #ifdef CONFIG_SMP - ppc_md.smp_ops = &prep_smp_ops; + smp_ops = &prep_smp_ops; #endif /* CONFIG_SMP */ } diff --git a/arch/ppc/platforms/prpmc750.c b/arch/ppc/platforms/prpmc750.c index 24ae1caafc6..0bb14a5e824 100644 --- a/arch/ppc/platforms/prpmc750.c +++ b/arch/ppc/platforms/prpmc750.c @@ -24,7 +24,6 @@ #include <linux/initrd.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/ide.h> #include <linux/root_dev.h> diff --git a/arch/ppc/platforms/prpmc800.c b/arch/ppc/platforms/prpmc800.c index 8b09fa69b35..de7baefacd3 100644 --- a/arch/ppc/platforms/prpmc800.c +++ b/arch/ppc/platforms/prpmc800.c @@ -22,7 +22,6 @@ #include <linux/initrd.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/seq_file.h> #include <linux/ide.h> #include <linux/root_dev.h> diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c index c30607a972d..708b8739ecd 100644 --- a/arch/ppc/platforms/radstone_ppc7d.c +++ b/arch/ppc/platforms/radstone_ppc7d.c @@ -32,7 +32,6 @@ #include <linux/initrd.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/ide.h> #include <linux/seq_file.h> #include <linux/root_dev.h> @@ -41,6 +40,7 @@ #include <linux/serial_core.h> #include <linux/mv643xx.h> #include <linux/netdevice.h> +#include <linux/platform_device.h> #include <asm/system.h> #include <asm/pgtable.h> @@ -59,7 +59,6 @@ #include <asm/mpc10x.h> #include <asm/pci-bridge.h> #include <asm/mv64x60.h> -#include <asm/i8259.h> #include "radstone_ppc7d.h" @@ -516,13 +515,9 @@ static void __init ppc7d_init_irq(void) int irq; pr_debug("%s\n", __FUNCTION__); - i8259_init(0); + i8259_init(0, 0); mv64360_init_irq(); - /* IRQ 0..15 are handled by the cascaded 8259's of the Ali1535 */ - for (irq = 0; irq < 16; irq++) { - irq_desc[irq].handler = &i8259_pic; - } /* IRQs 5,6,9,10,11,14,15 are level sensitive */ irq_desc[5].status |= IRQ_LEVEL; irq_desc[6].status |= IRQ_LEVEL; @@ -1185,18 +1180,18 @@ static void __init ppc7d_setup_arch(void) ROOT_DEV = Root_HDA1; #endif - if ((cur_cpu_spec[0]->cpu_features & CPU_FTR_SPEC7450) || - (cur_cpu_spec[0]->cpu_features & CPU_FTR_L3CR)) + if ((cur_cpu_spec->cpu_features & CPU_FTR_SPEC7450) || + (cur_cpu_spec->cpu_features & CPU_FTR_L3CR)) /* 745x is different. We only want to pass along enable. */ _set_L2CR(L2CR_L2E); - else if (cur_cpu_spec[0]->cpu_features & CPU_FTR_L2CR) + else if (cur_cpu_spec->cpu_features & CPU_FTR_L2CR) /* All modules have 1MB of L2. We also assume that an * L2 divisor of 3 will work. */ _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3 | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF); - if (cur_cpu_spec[0]->cpu_features & CPU_FTR_L3CR) + if (cur_cpu_spec->cpu_features & CPU_FTR_L3CR) /* No L3 cache */ _set_L3CR(0); @@ -1426,6 +1421,7 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ppc_md.setup_arch = ppc7d_setup_arch; ppc_md.init = ppc7d_init2; ppc_md.show_cpuinfo = ppc7d_show_cpuinfo; + /* XXX this is broken... */ ppc_md.irq_canonicalize = ppc7d_irq_canonicalize; ppc_md.init_IRQ = ppc7d_init_irq; ppc_md.get_irq = ppc7d_get_irq; diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c index 0f84ca60361..c9911601cfd 100644 --- a/arch/ppc/platforms/residual.c +++ b/arch/ppc/platforms/residual.c @@ -47,7 +47,7 @@ #include <asm/ide.h> -unsigned char __res[sizeof(RESIDUAL)] __prepdata = {0,}; +unsigned char __res[sizeof(RESIDUAL)] = {0,}; RESIDUAL *res = (RESIDUAL *)&__res; char * PnP_BASE_TYPES[] __initdata = { diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c index 21e31346b12..9eeed357230 100644 --- a/arch/ppc/platforms/sandpoint.c +++ b/arch/ppc/platforms/sandpoint.c @@ -74,7 +74,6 @@ #include <linux/initrd.h> #include <linux/console.h> #include <linux/delay.h> -#include <linux/irq.h> #include <linux/ide.h> #include <linux/seq_file.h> #include <linux/root_dev.h> @@ -495,27 +494,10 @@ sandpoint_init_IRQ(void) i8259_irq); /* - * openpic_init() has set up irq_desc[16-31] to be openpic - * interrupts. We need to set irq_desc[0-15] to be i8259 - * interrupts. - */ - for(i=0; i < NUM_8259_INTERRUPTS; i++) - irq_desc[i].handler = &i8259_pic; - - /* * The EPIC allows for a read in the range of 0xFEF00000 -> * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction. */ - i8259_init(0xfef00000); -} - -static u32 -sandpoint_irq_canonicalize(u32 irq) -{ - if (irq == 2) - return 9; - else - return irq; + i8259_init(0xfef00000, 0); } static unsigned long __init @@ -728,10 +710,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, ISA_DMA_THRESHOLD = 0x00ffffff; DMA_MODE_READ = 0x44; DMA_MODE_WRITE = 0x48; + ppc_do_canonicalize_irqs = 1; ppc_md.setup_arch = sandpoint_setup_arch; ppc_md.show_cpuinfo = sandpoint_show_cpuinfo; - ppc_md.irq_canonicalize = sandpoint_irq_canonicalize; ppc_md.init_IRQ = sandpoint_init_IRQ; ppc_md.get_irq = openpic_get_irq; diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile index b8d08f33f7e..5b7f2b80e56 100644 --- a/arch/ppc/syslib/Makefile +++ b/arch/ppc/syslib/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_440EP) += ibm440gx_common.o obj-$(CONFIG_440GP) += ibm440gp_common.o obj-$(CONFIG_440GX) += ibm440gx_common.o obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o +obj-$(CONFIG_440SPE) += ibm440gx_common.o ibm440sp_common.o ppc440spe_pcie.o ifeq ($(CONFIG_4xx),y) ifeq ($(CONFIG_VIRTEX_II_PRO),y) obj-$(CONFIG_40x) += xilinx_pic.o @@ -31,52 +32,51 @@ obj-$(CONFIG_GEN_RTC) += todc_time.o obj-$(CONFIG_PPC4xx_DMA) += ppc4xx_dma.o obj-$(CONFIG_PPC4xx_EDMA) += ppc4xx_sgdma.o ifeq ($(CONFIG_40x),y) -obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o ppc405_pci.o +obj-$(CONFIG_PCI) += pci_auto.o ppc405_pci.o endif endif obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \ ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o -ifeq ($(CONFIG_8xx),y) -obj-$(CONFIG_PCI) += qspan_pci.o i8259.o -endif -obj-$(CONFIG_PPC_OF) += prom_init.o prom.o of_device.o -obj-$(CONFIG_PPC_PMAC) += open_pic.o indirect_pci.o +obj-$(CONFIG_PCI_QSPAN) += qspan_pci.o +obj-$(CONFIG_PPC_OF) += prom_init.o prom.o +obj-$(CONFIG_PPC_PMAC) += open_pic.o obj-$(CONFIG_POWER4) += open_pic2.o -obj-$(CONFIG_PPC_CHRP) += open_pic.o indirect_pci.o i8259.o -obj-$(CONFIG_PPC_PREP) += open_pic.o indirect_pci.o i8259.o todc_time.o -obj-$(CONFIG_BAMBOO) += indirect_pci.o pci_auto.o todc_time.o +obj-$(CONFIG_PPC_CHRP) += open_pic.o +obj-$(CONFIG_PPC_PREP) += open_pic.o todc_time.o +obj-$(CONFIG_BAMBOO) += pci_auto.o todc_time.o obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o -obj-$(CONFIG_EBONY) += indirect_pci.o pci_auto.o todc_time.o +obj-$(CONFIG_EBONY) += pci_auto.o todc_time.o obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o +obj-$(CONFIG_EV64360) += todc_time.o obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o -obj-$(CONFIG_GEMINI) += open_pic.o indirect_pci.o +obj-$(CONFIG_GEMINI) += open_pic.o obj-$(CONFIG_GT64260) += gt64260_pic.o -obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o +obj-$(CONFIG_LOPEC) += pci_auto.o todc_time.o obj-$(CONFIG_HDPU) += pci_auto.o -obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o +obj-$(CONFIG_LUAN) += pci_auto.o todc_time.o +obj-$(CONFIG_YUCCA) += pci_auto.o todc_time.o obj-$(CONFIG_KATANA) += pci_auto.o obj-$(CONFIG_MV64360) += mv64360_pic.o -obj-$(CONFIG_MV64X60) += mv64x60.o mv64x60_win.o indirect_pci.o -obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \ +obj-$(CONFIG_MV64X60) += mv64x60.o mv64x60_win.o +obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o \ pci_auto.o hawk_common.o -obj-$(CONFIG_MVME5100_IPMC761_PRESENT) += i8259.o -obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o +obj-$(CONFIG_OCOTEA) += pci_auto.o todc_time.o obj-$(CONFIG_PAL4) += cpc700_pic.o obj-$(CONFIG_POWERPMC250) += pci_auto.o -obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o i8259.o \ - indirect_pci.o todc_time.o pci_auto.o -obj-$(CONFIG_PRPMC750) += open_pic.o indirect_pci.o pci_auto.o \ +obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o \ + todc_time.o pci_auto.o +obj-$(CONFIG_PRPMC750) += open_pic.o pci_auto.o \ hawk_common.o obj-$(CONFIG_HARRIER) += harrier.o -obj-$(CONFIG_PRPMC800) += open_pic.o indirect_pci.o pci_auto.o -obj-$(CONFIG_RADSTONE_PPC7D) += i8259.o pci_auto.o -obj-$(CONFIG_SANDPOINT) += i8259.o pci_auto.o todc_time.o +obj-$(CONFIG_PRPMC800) += open_pic.o pci_auto.o +obj-$(CONFIG_RADSTONE_PPC7D) += pci_auto.o +obj-$(CONFIG_SANDPOINT) += pci_auto.o todc_time.o obj-$(CONFIG_SBC82xx) += todc_time.o -obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \ +obj-$(CONFIG_SPRUCE) += cpc700_pic.o pci_auto.o \ todc_time.o obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \ ppc_sys.o -obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o +obj-$(CONFIG_PCI_8260) += m82xx_pci.o pci_auto.o obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o ifeq ($(CONFIG_PPC_GEN550),y) @@ -87,20 +87,19 @@ ifeq ($(CONFIG_SERIAL_MPSC_CONSOLE),y) obj-$(CONFIG_SERIAL_TEXT_DEBUG) += mv64x60_dbg.o endif obj-$(CONFIG_BOOTX_TEXT) += btext.o -obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o indirect_pci.o ppc_sys.o +obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o ppc_sys.o obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o -obj-$(CONFIG_40x) += dcr.o -obj-$(CONFIG_BOOKE) += dcr.o obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \ - ppc_sys.o i8259.o mpc85xx_sys.o \ + ppc_sys.o mpc85xx_sys.o \ mpc85xx_devices.o ifeq ($(CONFIG_85xx),y) -obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o +obj-$(CONFIG_PCI) += pci_auto.o endif +obj-$(CONFIG_RAPIDIO) += ppc85xx_rio.o obj-$(CONFIG_83xx) += ipic.o ppc83xx_setup.o ppc_sys.o \ mpc83xx_sys.o mpc83xx_devices.o ifeq ($(CONFIG_83xx),y) -obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o +obj-$(CONFIG_PCI) += pci_auto.o endif obj-$(CONFIG_MPC8548_CDS) += todc_time.o obj-$(CONFIG_MPC8555_CDS) += todc_time.o diff --git a/arch/ppc/syslib/btext.c b/arch/ppc/syslib/btext.c index 7734f683617..12fa83e6774 100644 --- a/arch/ppc/syslib/btext.c +++ b/arch/ppc/syslib/btext.c @@ -53,8 +53,8 @@ extern char *klimit; * chrp only uses it during early boot. */ #ifdef CONFIG_XMON -#define BTEXT __pmac -#define BTDATA __pmacdata +#define BTEXT +#define BTDATA #else #define BTEXT __init #define BTDATA __initdata @@ -187,7 +187,7 @@ btext_setup_display(int width, int height, int depth, int pitch, * changes. */ -void __openfirmware +void map_boot_text(void) { unsigned long base, offset, size; diff --git a/arch/ppc/syslib/cpm2_pic.c b/arch/ppc/syslib/cpm2_pic.c index c867be6981c..29d95d415ce 100644 --- a/arch/ppc/syslib/cpm2_pic.c +++ b/arch/ppc/syslib/cpm2_pic.c @@ -37,7 +37,7 @@ static u_char irq_to_siureg[] = { static u_char irq_to_siubit[] = { 0, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, - 2, 1, 15, 14, 13, 12, 11, 10, + 2, 1, 0, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 0, 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, 18, 17, 16, diff --git a/arch/ppc/syslib/dcr.S b/arch/ppc/syslib/dcr.S deleted file mode 100644 index 895f10243a4..00000000000 --- a/arch/ppc/syslib/dcr.S +++ /dev/null @@ -1,41 +0,0 @@ -/* - * arch/ppc/syslib/dcr.S - * - * "Indirect" DCR access - * - * Copyright (c) 2004 Eugene Surovegin <ebs@ebshome.net> - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include <asm/ppc_asm.h> -#include <asm/processor.h> - -#define DCR_ACCESS_PROLOG(table) \ - rlwinm r3,r3,4,18,27; \ - lis r5,table@h; \ - ori r5,r5,table@l; \ - add r3,r3,r5; \ - mtctr r3; \ - bctr - -_GLOBAL(__mfdcr) - DCR_ACCESS_PROLOG(__mfdcr_table) - -_GLOBAL(__mtdcr) - DCR_ACCESS_PROLOG(__mtdcr_table) - -__mfdcr_table: - mfdcr r3,0; blr -__mtdcr_table: - mtdcr 0,r4; blr - -dcr = 1 - .rept 1023 - mfdcr r3,dcr; blr - mtdcr dcr,r4; blr - dcr = dcr + 1 - .endr diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c index 44aa8738545..f97b3a9abd1 100644 --- a/arch/ppc/syslib/gt64260_pic.c +++ b/arch/ppc/syslib/gt64260_pic.c @@ -45,6 +45,7 @@ #include <asm/system.h> #include <asm/irq.h> #include <asm/mv64x60.h> +#include <asm/machdep.h> #define CPU_INTR_STR "gt64260 cpu interface error" #define PCI0_INTR_STR "gt64260 pci 0 error" diff --git a/arch/ppc/syslib/i8259.c b/arch/ppc/syslib/i8259.c deleted file mode 100644 index 5c7908c20e4..00000000000 --- a/arch/ppc/syslib/i8259.c +++ /dev/null @@ -1,208 +0,0 @@ -#include <linux/init.h> -#include <linux/ioport.h> -#include <linux/interrupt.h> -#include <asm/io.h> -#include <asm/i8259.h> - -static volatile unsigned char *pci_intack; /* RO, gives us the irq vector */ - -unsigned char cached_8259[2] = { 0xff, 0xff }; -#define cached_A1 (cached_8259[0]) -#define cached_21 (cached_8259[1]) - -static DEFINE_SPINLOCK(i8259_lock); - -int i8259_pic_irq_offset; - -/* - * Acknowledge the IRQ using either the PCI host bridge's interrupt - * acknowledge feature or poll. How i8259_init() is called determines - * which is called. It should be noted that polling is broken on some - * IBM and Motorola PReP boxes so we must use the int-ack feature on them. - */ -int -i8259_irq(struct pt_regs *regs) -{ - int irq; - - spin_lock(&i8259_lock); - - /* Either int-ack or poll for the IRQ */ - if (pci_intack) - irq = *pci_intack; - else { - /* Perform an interrupt acknowledge cycle on controller 1. */ - outb(0x0C, 0x20); /* prepare for poll */ - irq = inb(0x20) & 7; - if (irq == 2 ) { - /* - * Interrupt is cascaded so perform interrupt - * acknowledge on controller 2. - */ - outb(0x0C, 0xA0); /* prepare for poll */ - irq = (inb(0xA0) & 7) + 8; - } - } - - if (irq == 7) { - /* - * This may be a spurious interrupt. - * - * Read the interrupt status register (ISR). If the most - * significant bit is not set then there is no valid - * interrupt. - */ - if (!pci_intack) - outb(0x0B, 0x20); /* ISR register */ - if(~inb(0x20) & 0x80) - irq = -1; - } - - spin_unlock(&i8259_lock); - return irq; -} - -static void i8259_mask_and_ack_irq(unsigned int irq_nr) -{ - unsigned long flags; - - spin_lock_irqsave(&i8259_lock, flags); - if ( irq_nr >= i8259_pic_irq_offset ) - irq_nr -= i8259_pic_irq_offset; - - if (irq_nr > 7) { - cached_A1 |= 1 << (irq_nr-8); - inb(0xA1); /* DUMMY */ - outb(cached_A1,0xA1); - outb(0x20,0xA0); /* Non-specific EOI */ - outb(0x20,0x20); /* Non-specific EOI to cascade */ - } else { - cached_21 |= 1 << irq_nr; - inb(0x21); /* DUMMY */ - outb(cached_21,0x21); - outb(0x20,0x20); /* Non-specific EOI */ - } - spin_unlock_irqrestore(&i8259_lock, flags); -} - -static void i8259_set_irq_mask(int irq_nr) -{ - outb(cached_A1,0xA1); - outb(cached_21,0x21); -} - -static void i8259_mask_irq(unsigned int irq_nr) -{ - unsigned long flags; - - spin_lock_irqsave(&i8259_lock, flags); - if ( irq_nr >= i8259_pic_irq_offset ) - irq_nr -= i8259_pic_irq_offset; - if ( irq_nr < 8 ) - cached_21 |= 1 << irq_nr; - else - cached_A1 |= 1 << (irq_nr-8); - i8259_set_irq_mask(irq_nr); - spin_unlock_irqrestore(&i8259_lock, flags); -} - -static void i8259_unmask_irq(unsigned int irq_nr) -{ - unsigned long flags; - - spin_lock_irqsave(&i8259_lock, flags); - if ( irq_nr >= i8259_pic_irq_offset ) - irq_nr -= i8259_pic_irq_offset; - if ( irq_nr < 8 ) - cached_21 &= ~(1 << irq_nr); - else - cached_A1 &= ~(1 << (irq_nr-8)); - i8259_set_irq_mask(irq_nr); - spin_unlock_irqrestore(&i8259_lock, flags); -} - -static void i8259_end_irq(unsigned int irq) -{ - if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) - && irq_desc[irq].action) - i8259_unmask_irq(irq); -} - -struct hw_interrupt_type i8259_pic = { - .typename = " i8259 ", - .enable = i8259_unmask_irq, - .disable = i8259_mask_irq, - .ack = i8259_mask_and_ack_irq, - .end = i8259_end_irq, -}; - -static struct resource pic1_iores = { - .name = "8259 (master)", - .start = 0x20, - .end = 0x21, - .flags = IORESOURCE_BUSY, -}; - -static struct resource pic2_iores = { - .name = "8259 (slave)", - .start = 0xa0, - .end = 0xa1, - .flags = IORESOURCE_BUSY, -}; - -static struct resource pic_edgectrl_iores = { - .name = "8259 edge control", - .start = 0x4d0, - .end = 0x4d1, - .flags = IORESOURCE_BUSY, -}; - -static struct irqaction i8259_irqaction = { - .handler = no_action, - .flags = SA_INTERRUPT, - .mask = CPU_MASK_NONE, - .name = "82c59 secondary cascade", -}; - -/* - * i8259_init() - * intack_addr - PCI interrupt acknowledge (real) address which will return - * the active irq from the 8259 - */ -void __init -i8259_init(long intack_addr) -{ - unsigned long flags; - - spin_lock_irqsave(&i8259_lock, flags); - /* init master interrupt controller */ - outb(0x11, 0x20); /* Start init sequence */ - outb(0x00, 0x21); /* Vector base */ - outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */ - outb(0x01, 0x21); /* Select 8086 mode */ - - /* init slave interrupt controller */ - outb(0x11, 0xA0); /* Start init sequence */ - outb(0x08, 0xA1); /* Vector base */ - outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */ - outb(0x01, 0xA1); /* Select 8086 mode */ - - /* always read ISR */ - outb(0x0B, 0x20); - outb(0x0B, 0xA0); - - /* Mask all interrupts */ - outb(cached_A1, 0xA1); - outb(cached_21, 0x21); - - spin_unlock_irqrestore(&i8259_lock, flags); - - /* reserve our resources */ - setup_irq( i8259_pic_irq_offset + 2, &i8259_irqaction); - request_resource(&ioport_resource, &pic1_iores); - request_resource(&ioport_resource, &pic2_iores); - request_resource(&ioport_resource, &pic_edgectrl_iores); - - if (intack_addr != 0) - pci_intack = ioremap(intack_addr, 1); -} diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c index 0bb919859b8..c36db279b43 100644 --- a/arch/ppc/syslib/ibm440gx_common.c +++ b/arch/ppc/syslib/ibm440gx_common.c @@ -236,9 +236,9 @@ void __init ibm440gx_l2c_setup(struct ibm44x_clocks* p) /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C, enable it on all other revisions */ - if (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. A") == 0 || - strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. B") == 0 - || (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. C") + if (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. A") == 0 || + strcmp(cur_cpu_spec->cpu_name, "440GX Rev. B") == 0 + || (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C") == 0 && p->cpu > 667000000)) ibm440gx_l2c_disable(); else diff --git a/arch/ppc/syslib/ibm440sp_common.c b/arch/ppc/syslib/ibm440sp_common.c index 417d4cff77a..cdafda127d8 100644 --- a/arch/ppc/syslib/ibm440sp_common.c +++ b/arch/ppc/syslib/ibm440sp_common.c @@ -1,7 +1,7 @@ /* * arch/ppc/syslib/ibm440sp_common.c * - * PPC440SP system library + * PPC440SP/PPC440SPe system library * * Matt Porter <mporter@kernel.crashing.org> * Copyright 2002-2005 MontaVista Software Inc. @@ -35,7 +35,7 @@ unsigned long __init ibm440sp_find_end_of_memory(void) u32 mem_size = 0; /* Read two bank sizes and sum */ - for (i=0; i<2; i++) + for (i=0; i< MQ0_NUM_BANKS; i++) switch (mfdcr(DCRN_MQ0_BS0BAS + i) & MQ0_CONFIG_SIZE_MASK) { case MQ0_CONFIG_SIZE_8M: mem_size += PPC44x_MEM_SIZE_8M; diff --git a/arch/ppc/syslib/ibm44x_common.c b/arch/ppc/syslib/ibm44x_common.c index 7612e0623f9..71db11d2215 100644 --- a/arch/ppc/syslib/ibm44x_common.c +++ b/arch/ppc/syslib/ibm44x_common.c @@ -20,6 +20,7 @@ #include <linux/types.h> #include <linux/serial.h> #include <linux/module.h> +#include <linux/initrd.h> #include <asm/ibm44x.h> #include <asm/mmu.h> @@ -27,9 +28,14 @@ #include <asm/time.h> #include <asm/ppc4xx_pic.h> #include <asm/param.h> +#include <asm/bootinfo.h> +#include <asm/ppcboot.h> #include <syslib/gen550.h> +/* Global Variables */ +bd_t __res; + phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size) { phys_addr_t page_4gb = 0; @@ -150,8 +156,36 @@ static unsigned long __init ibm44x_find_end_of_memory(void) return mem_size; } -void __init ibm44x_platform_init(void) +void __init ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) { + parse_bootinfo(find_bootinfo()); + + /* + * If we were passed in a board information, copy it into the + * residual data area. + */ + if (r3) + __res = *(bd_t *)(r3 + KERNELBASE); + +#if defined(CONFIG_BLK_DEV_INITRD) + /* + * If the init RAM disk has been configured in, and there's a valid + * starting address for it, set it up. + */ + if (r4) { + initrd_start = r4 + KERNELBASE; + initrd_end = r5 + KERNELBASE; + } +#endif /* CONFIG_BLK_DEV_INITRD */ + + /* Copy the kernel command line arguments to a safe place. */ + + if (r6) { + *(char *) (r7 + KERNELBASE) = 0; + strcpy(cmd_line, (char *) (r6 + KERNELBASE)); + } + ppc_md.init_IRQ = ppc4xx_pic_init; ppc_md.find_end_of_memory = ibm44x_find_end_of_memory; ppc_md.restart = ibm44x_restart; @@ -178,12 +212,23 @@ void __init ibm44x_platform_init(void) #endif } -/* Called from MachineCheckException */ +/* Called from machine_check_exception */ void platform_machine_check(struct pt_regs *regs) { +#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) + printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n", + mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL), + mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESRH), + mfdcr(DCRN_PLB0_BESRL)); + printk("PLB1: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x%08x\n", + mfdcr(DCRN_PLB1_BEARH), mfdcr(DCRN_PLB1_BEARL), + mfdcr(DCRN_PLB1_ACR), mfdcr(DCRN_PLB1_BESRH), + mfdcr(DCRN_PLB1_BESRL)); +#else printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n", mfdcr(DCRN_PLB0_BEARH), mfdcr(DCRN_PLB0_BEARL), mfdcr(DCRN_PLB0_ACR), mfdcr(DCRN_PLB0_BESR)); +#endif printk("POB0: BEAR=0x%08x%08x BESR0=0x%08x BESR1=0x%08x\n", mfdcr(DCRN_POB0_BEARH), mfdcr(DCRN_POB0_BEARL), mfdcr(DCRN_POB0_BESR0), mfdcr(DCRN_POB0_BESR1)); diff --git a/arch/ppc/syslib/ibm44x_common.h b/arch/ppc/syslib/ibm44x_common.h index c16b6a5ac6a..b25a8995e4e 100644 --- a/arch/ppc/syslib/ibm44x_common.h +++ b/arch/ppc/syslib/ibm44x_common.h @@ -36,7 +36,8 @@ struct ibm44x_clocks { }; /* common 44x platform init */ -void ibm44x_platform_init(void) __init; +void ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) __init; /* initialize decrementer and tick-related variables */ void ibm44x_calibrate_decr(unsigned int freq) __init; diff --git a/arch/ppc/syslib/indirect_pci.c b/arch/ppc/syslib/indirect_pci.c deleted file mode 100644 index e7148846970..00000000000 --- a/arch/ppc/syslib/indirect_pci.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Support for indirect PCI bridges. - * - * Copyright (C) 1998 Gabriel Paubert. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include <linux/kernel.h> -#include <linux/pci.h> -#include <linux/delay.h> -#include <linux/string.h> -#include <linux/init.h> - -#include <asm/io.h> -#include <asm/prom.h> -#include <asm/pci-bridge.h> -#include <asm/machdep.h> - -#ifdef CONFIG_PPC_INDIRECT_PCI_BE -#define PCI_CFG_OUT out_be32 -#else -#define PCI_CFG_OUT out_le32 -#endif - -static int -indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 *val) -{ - struct pci_controller *hose = bus->sysdata; - volatile void __iomem *cfg_data; - u8 cfg_type = 0; - - if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(bus->number, devfn)) - return PCIBIOS_DEVICE_NOT_FOUND; - - if (hose->set_cfg_type) - if (bus->number != hose->first_busno) - cfg_type = 1; - - PCI_CFG_OUT(hose->cfg_addr, - (0x80000000 | ((bus->number - hose->bus_offset) << 16) - | (devfn << 8) | ((offset & 0xfc) | cfg_type))); - - /* - * Note: the caller has already checked that offset is - * suitably aligned and that len is 1, 2 or 4. - */ - cfg_data = hose->cfg_data + (offset & 3); - switch (len) { - case 1: - *val = in_8(cfg_data); - break; - case 2: - *val = in_le16(cfg_data); - break; - default: - *val = in_le32(cfg_data); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static int -indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, - int len, u32 val) -{ - struct pci_controller *hose = bus->sysdata; - volatile void __iomem *cfg_data; - u8 cfg_type = 0; - - if (ppc_md.pci_exclude_device) - if (ppc_md.pci_exclude_device(bus->number, devfn)) - return PCIBIOS_DEVICE_NOT_FOUND; - - if (hose->set_cfg_type) - if (bus->number != hose->first_busno) - cfg_type = 1; - - PCI_CFG_OUT(hose->cfg_addr, - (0x80000000 | ((bus->number - hose->bus_offset) << 16) - | (devfn << 8) | ((offset & 0xfc) | cfg_type))); - - /* - * Note: the caller has already checked that offset is - * suitably aligned and that len is 1, 2 or 4. - */ - cfg_data = hose->cfg_data + (offset & 3); - switch (len) { - case 1: - out_8(cfg_data, val); - break; - case 2: - out_le16(cfg_data, val); - break; - default: - out_le32(cfg_data, val); - break; - } - return PCIBIOS_SUCCESSFUL; -} - -static struct pci_ops indirect_pci_ops = -{ - indirect_read_config, - indirect_write_config -}; - -void __init -setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr, - void __iomem * cfg_data) -{ - hose->cfg_addr = cfg_addr; - hose->cfg_data = cfg_data; - hose->ops = &indirect_pci_ops; -} - -void __init -setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data) -{ - unsigned long base = cfg_addr & PAGE_MASK; - void __iomem *mbase, *addr, *data; - - mbase = ioremap(base, PAGE_SIZE); - addr = mbase + (cfg_addr & ~PAGE_MASK); - if ((cfg_data & PAGE_MASK) != base) - mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE); - data = mbase + (cfg_data & ~PAGE_MASK); - setup_indirect_pci_nomap(hose, addr, data); -} diff --git a/arch/ppc/syslib/ipic.h b/arch/ppc/syslib/ipic.h index 2b56a4fcf37..a7ce7da8785 100644 --- a/arch/ppc/syslib/ipic.h +++ b/arch/ppc/syslib/ipic.h @@ -3,7 +3,7 @@ * * IPIC private definitions and structure. * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor, Inc * diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c index 8f80a42dfdb..76a2aa4ce65 100644 --- a/arch/ppc/syslib/m8260_setup.c +++ b/arch/ppc/syslib/m8260_setup.c @@ -62,6 +62,10 @@ m8260_setup_arch(void) if (initrd_start) ROOT_DEV = Root_RAM0; #endif + + identify_ppc_sys_by_name_and_id(BOARD_CHIP_NAME, + in_be32(CPM_MAP_ADDR + CPM_IMMR_OFFSET)); + m82xx_board_setup(); } diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c index 9db58c587b4..1941a8c7ca9 100644 --- a/arch/ppc/syslib/m82xx_pci.c +++ b/arch/ppc/syslib/m82xx_pci.c @@ -248,7 +248,8 @@ pq2ads_setup_pci(struct pci_controller *hose) pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) * ( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1); freq = (uint)((2*binfo->bi_cpmfreq)/(pci_div)); - time = (int)666666/freq; + time = (int)66666666/freq; + /* due to PCI Local Bus spec, some devices needs to wait such a long time after RST deassertion. More specifically, 0.508s for 66MHz & twice more for 33 */ printk("%s: The PCI bus is %d Mhz.\nWaiting %s after deasserting RST...\n",__FILE__,freq, @@ -302,11 +303,11 @@ pq2ads_setup_pci(struct pci_controller *hose) void __init pq2_find_bridges(void) { - extern int pci_assign_all_busses; + extern int pci_assign_all_buses; struct pci_controller * hose; int host_bridge; - pci_assign_all_busses = 1; + pci_assign_all_buses = 1; hose = pcibios_alloc_controller(); diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c index 4c888da89b3..1cc3abe6fa4 100644 --- a/arch/ppc/syslib/m8xx_setup.c +++ b/arch/ppc/syslib/m8xx_setup.c @@ -45,6 +45,7 @@ #include <asm/bootinfo.h> #include <asm/time.h> #include <asm/xmon.h> +#include <asm/ppc_sys.h> #include "ppc8xx_pic.h" @@ -144,12 +145,12 @@ void __init m8xx_calibrate_decr(void) int freq, fp, divisor; /* Unlock the SCCR. */ - ((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = ~KAPWR_KEY; - ((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = KAPWR_KEY; + out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, ~KAPWR_KEY); + out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY); /* Force all 8xx processors to use divide by 16 processor clock. */ - ((volatile immap_t *)IMAP_ADDR)->im_clkrst.car_sccr |= 0x02000000; - + out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr, + in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr)|0x02000000); /* Processor frequency is MHz. * The value 'fp' is the number of decrementer ticks per second. */ @@ -175,28 +176,24 @@ void __init m8xx_calibrate_decr(void) * we guarantee the registers are locked, then we unlock them * for our use. */ - ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk = ~KAPWR_KEY; - ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck = ~KAPWR_KEY; - ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk = ~KAPWR_KEY; - ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk = KAPWR_KEY; - ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck = KAPWR_KEY; - ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk = KAPWR_KEY; + out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, ~KAPWR_KEY); + out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, ~KAPWR_KEY); + out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, ~KAPWR_KEY); + out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, KAPWR_KEY); + out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY); + out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY); /* Disable the RTC one second and alarm interrupts. */ - ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc &= - ~(RTCSC_SIE | RTCSC_ALE); + out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE)); /* Enable the RTC */ - ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc |= - (RTCSC_RTF | RTCSC_RTE); + out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE)); /* Enabling the decrementer also enables the timebase interrupts * (or from the other point of view, to get decrementer interrupts * we have to enable the timebase). The decrementer interrupt * is wired into the vector table, nothing to do here for that. */ - ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_tbscr = - ((mk_int_int_mask(DEC_INTERRUPT) << 8) | - (TBSCR_TBF | TBSCR_TBE)); + out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_tbscr, (mk_int_int_mask(DEC_INTERRUPT) << 8) | (TBSCR_TBF | TBSCR_TBE)); if (setup_irq(DEC_INTERRUPT, &tbint_irqaction)) panic("Could not allocate timer IRQ!"); @@ -216,9 +213,9 @@ void __init m8xx_calibrate_decr(void) static int m8xx_set_rtc_time(unsigned long time) { - ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = KAPWR_KEY; - ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtc = time; - ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = ~KAPWR_KEY; + out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, KAPWR_KEY); + out_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc, time); + out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, ~KAPWR_KEY); return(0); } @@ -226,7 +223,7 @@ static unsigned long m8xx_get_rtc_time(void) { /* Get time from the RTC. */ - return((unsigned long)(((immap_t *)IMAP_ADDR)->im_sit.sit_rtc)); + return (unsigned long) in_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc); } static void @@ -235,13 +232,13 @@ m8xx_restart(char *cmd) __volatile__ unsigned char dummy; local_irq_disable(); - ((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr |= 0x00000080; + out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr) | 0x00000080); /* Clear the ME bit in MSR to cause checkstop on machine check */ mtmsr(mfmsr() & ~0x1000); - dummy = ((immap_t *)IMAP_ADDR)->im_clkrst.res[0]; + dummy = in_8(&((immap_t *)IMAP_ADDR)->im_clkrst.res[0]); printk("Restart failed\n"); while(1); } @@ -306,8 +303,7 @@ m8xx_init_IRQ(void) i8259_init(0); /* The i8259 cascade interrupt must be level sensitive. */ - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel &= - ~(0x80000000 >> ISA_BRIDGE_INT); + out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel & ~(0x80000000 >> ISA_BRIDGE_INT))); if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction)) enable_irq(ISA_BRIDGE_INT); @@ -404,9 +400,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5, strcpy(cmd_line, (char *)(r6+KERNELBASE)); } + identify_ppc_sys_by_name(BOARD_CHIP_NAME); + ppc_md.setup_arch = m8xx_setup_arch; ppc_md.show_percpuinfo = m8xx_show_percpuinfo; - ppc_md.irq_canonicalize = NULL; ppc_md.init_IRQ = m8xx_init_IRQ; ppc_md.get_irq = m8xx_get_irq; ppc_md.init = NULL; diff --git a/arch/ppc/syslib/m8xx_wdt.c b/arch/ppc/syslib/m8xx_wdt.c index 2ddc857e7fc..a21632d37e5 100644 --- a/arch/ppc/syslib/m8xx_wdt.c +++ b/arch/ppc/syslib/m8xx_wdt.c @@ -14,6 +14,7 @@ #include <linux/irq.h> #include <linux/kernel.h> #include <linux/sched.h> +#include <asm/io.h> #include <asm/8xx_immap.h> #include <syslib/m8xx_wdt.h> @@ -29,8 +30,8 @@ void m8xx_wdt_reset(void) { volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR; - imap->im_siu_conf.sc_swsr = 0x556c; /* write magic1 */ - imap->im_siu_conf.sc_swsr = 0xaa39; /* write magic2 */ + out_be16(&imap->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */ + out_be16(&imap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */ } static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs) @@ -39,7 +40,7 @@ static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs) m8xx_wdt_reset(); - imap->im_sit.sit_piscr |= PISCR_PS; /* clear irq */ + out_be16(&imap->im_sit.sit_piscr, in_be16(&imap->im_sit.sit_piscr) | PISCR_PS); /* clear irq */ return IRQ_HANDLED; } @@ -51,7 +52,7 @@ void __init m8xx_wdt_handler_install(bd_t * binfo) u32 sypcr; u32 pitrtclk; - sypcr = imap->im_siu_conf.sc_sypcr; + sypcr = in_be32(&imap->im_siu_conf.sc_sypcr); if (!(sypcr & 0x04)) { printk(KERN_NOTICE "m8xx_wdt: wdt disabled (SYPCR: 0x%08X)\n", @@ -87,9 +88,9 @@ void __init m8xx_wdt_handler_install(bd_t * binfo) else pitc = pitrtclk * wdt_timeout / binfo->bi_intfreq / 2; - imap->im_sit.sit_pitc = pitc << 16; - imap->im_sit.sit_piscr = - (mk_int_int_mask(PIT_INTERRUPT) << 8) | PISCR_PIE | PISCR_PTE; + out_be32(&imap->im_sit.sit_pitc, pitc << 16); + + out_be16(&imap->im_sit.sit_piscr, (mk_int_int_mask(PIT_INTERRUPT) << 8) | PISCR_PIE | PISCR_PTE); if (setup_irq(PIT_INTERRUPT, &m8xx_wdt_irqaction)) panic("m8xx_wdt: error setting up the watchdog irq!"); diff --git a/arch/ppc/syslib/mpc52xx_devices.c b/arch/ppc/syslib/mpc52xx_devices.c index ad5182efca1..da3c74bfdc9 100644 --- a/arch/ppc/syslib/mpc52xx_devices.c +++ b/arch/ppc/syslib/mpc52xx_devices.c @@ -15,6 +15,7 @@ #include <linux/fsl_devices.h> #include <linux/resource.h> +#include <linux/platform_device.h> #include <asm/mpc52xx.h> #include <asm/ppc_sys.h> diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c index 59cf3e8bd1a..4ac19080eb8 100644 --- a/arch/ppc/syslib/mpc52xx_pci.c +++ b/arch/ppc/syslib/mpc52xx_pci.c @@ -21,6 +21,7 @@ #include "mpc52xx_pci.h" #include <asm/delay.h> +#include <asm/machdep.h> static int @@ -181,7 +182,7 @@ mpc52xx_find_bridges(void) struct mpc52xx_pci __iomem *pci_regs; struct pci_controller *hose; - pci_assign_all_busses = 1; + pci_assign_all_buses = 1; pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE); if (!pci_regs) diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c index 95b3b8a7f0b..847df440998 100644 --- a/arch/ppc/syslib/mpc83xx_devices.c +++ b/arch/ppc/syslib/mpc83xx_devices.c @@ -3,7 +3,7 @@ * * MPC83xx Device descriptions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor Inc. * @@ -21,23 +21,26 @@ #include <asm/mpc83xx.h> #include <asm/irq.h> #include <asm/ppc_sys.h> +#include <asm/machdep.h> /* We use offsets for IORESOURCE_MEM since we do not know at compile time * what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup */ +struct gianfar_mdio_data mpc83xx_mdio_pdata = { + .paddr = 0x24520, +}; + static struct gianfar_platform_data mpc83xx_tsec1_pdata = { .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | FSL_GIANFAR_DEV_HAS_MULTI_INTR, - .phy_reg_addr = 0x24000, }; static struct gianfar_platform_data mpc83xx_tsec2_pdata = { .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | FSL_GIANFAR_DEV_HAS_MULTI_INTR, - .phy_reg_addr = 0x24000, }; static struct fsl_i2c_platform_data mpc83xx_fsl_i2c1_pdata = { @@ -219,6 +222,12 @@ struct platform_device ppc_sys_platform_devices[] = { }, }, }, + [MPC83xx_MDIO] = { + .name = "fsl-gianfar_mdio", + .id = 0, + .dev.platform_data = &mpc83xx_mdio_pdata, + .num_resources = 0, + }, }; static int __init mach_mpc83xx_fixup(struct platform_device *pdev) diff --git a/arch/ppc/syslib/mpc83xx_sys.c b/arch/ppc/syslib/mpc83xx_sys.c index 29aa6335002..82cf3ab77f4 100644 --- a/arch/ppc/syslib/mpc83xx_sys.c +++ b/arch/ppc/syslib/mpc83xx_sys.c @@ -3,7 +3,7 @@ * * MPC83xx System descriptions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor Inc. * @@ -24,72 +24,96 @@ struct ppc_sys_spec ppc_sys_specs[] = { .ppc_sys_name = "8349E", .mask = 0xFFFF0000, .value = 0x80500000, - .num_devices = 8, + .num_devices = 9, .device_list = (enum ppc_sys_devices[]) { MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2, - MPC83xx_USB2_DR, MPC83xx_USB2_MPH + MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO }, }, { .ppc_sys_name = "8349", .mask = 0xFFFF0000, .value = 0x80510000, - .num_devices = 7, + .num_devices = 8, .device_list = (enum ppc_sys_devices[]) { MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, MPC83xx_IIC2, MPC83xx_DUART, - MPC83xx_USB2_DR, MPC83xx_USB2_MPH + MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO }, }, { .ppc_sys_name = "8347E", .mask = 0xFFFF0000, .value = 0x80520000, - .num_devices = 8, + .num_devices = 9, .device_list = (enum ppc_sys_devices[]) { MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2, - MPC83xx_USB2_DR, MPC83xx_USB2_MPH + MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO }, }, { .ppc_sys_name = "8347", .mask = 0xFFFF0000, .value = 0x80530000, - .num_devices = 7, + .num_devices = 8, .device_list = (enum ppc_sys_devices[]) { MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, MPC83xx_IIC2, MPC83xx_DUART, - MPC83xx_USB2_DR, MPC83xx_USB2_MPH + MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO }, }, { - .ppc_sys_name = "8343E", + .ppc_sys_name = "8347E", .mask = 0xFFFF0000, .value = 0x80540000, - .num_devices = 7, + .num_devices = 9, .device_list = (enum ppc_sys_devices[]) { MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2, - MPC83xx_USB2_DR, + MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO }, }, { - .ppc_sys_name = "8343", + .ppc_sys_name = "8347", .mask = 0xFFFF0000, .value = 0x80550000, - .num_devices = 6, + .num_devices = 8, + .device_list = (enum ppc_sys_devices[]) + { + MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, + MPC83xx_IIC2, MPC83xx_DUART, + MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO + }, + }, + { + .ppc_sys_name = "8343E", + .mask = 0xFFFF0000, + .value = 0x80560000, + .num_devices = 8, + .device_list = (enum ppc_sys_devices[]) + { + MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, + MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2, + MPC83xx_USB2_DR, MPC83xx_MDIO + }, + }, + { + .ppc_sys_name = "8343", + .mask = 0xFFFF0000, + .value = 0x80570000, + .num_devices = 7, .device_list = (enum ppc_sys_devices[]) { MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1, MPC83xx_IIC2, MPC83xx_DUART, - MPC83xx_USB2_DR, + MPC83xx_USB2_DR, MPC83xx_MDIO }, }, { /* default match */ diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c index bbc5ac0de87..69949d25565 100644 --- a/arch/ppc/syslib/mpc85xx_devices.c +++ b/arch/ppc/syslib/mpc85xx_devices.c @@ -3,7 +3,7 @@ * * MPC85xx Device descriptions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor Inc. * @@ -25,19 +25,20 @@ /* We use offsets for IORESOURCE_MEM since we do not know at compile time * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup */ +struct gianfar_mdio_data mpc85xx_mdio_pdata = { + .paddr = MPC85xx_MIIM_OFFSET, +}; static struct gianfar_platform_data mpc85xx_tsec1_pdata = { .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | FSL_GIANFAR_DEV_HAS_MULTI_INTR, - .phy_reg_addr = MPC85xx_ENET1_OFFSET, }; static struct gianfar_platform_data mpc85xx_tsec2_pdata = { .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | FSL_GIANFAR_DEV_HAS_MULTI_INTR, - .phy_reg_addr = MPC85xx_ENET1_OFFSET, }; static struct gianfar_platform_data mpc85xx_etsec1_pdata = { @@ -46,7 +47,6 @@ static struct gianfar_platform_data mpc85xx_etsec1_pdata = { FSL_GIANFAR_DEV_HAS_MULTI_INTR | FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, - .phy_reg_addr = MPC85xx_ENET1_OFFSET, }; static struct gianfar_platform_data mpc85xx_etsec2_pdata = { @@ -55,7 +55,6 @@ static struct gianfar_platform_data mpc85xx_etsec2_pdata = { FSL_GIANFAR_DEV_HAS_MULTI_INTR | FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, - .phy_reg_addr = MPC85xx_ENET1_OFFSET, }; static struct gianfar_platform_data mpc85xx_etsec3_pdata = { @@ -64,7 +63,6 @@ static struct gianfar_platform_data mpc85xx_etsec3_pdata = { FSL_GIANFAR_DEV_HAS_MULTI_INTR | FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, - .phy_reg_addr = MPC85xx_ENET1_OFFSET, }; static struct gianfar_platform_data mpc85xx_etsec4_pdata = { @@ -73,11 +71,10 @@ static struct gianfar_platform_data mpc85xx_etsec4_pdata = { FSL_GIANFAR_DEV_HAS_MULTI_INTR | FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, - .phy_reg_addr = MPC85xx_ENET1_OFFSET, }; static struct gianfar_platform_data mpc85xx_fec_pdata = { - .phy_reg_addr = MPC85xx_ENET1_OFFSET, + .device_flags = 0, }; static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = { @@ -719,6 +716,12 @@ struct platform_device ppc_sys_platform_devices[] = { }, }, }, + [MPC85xx_MDIO] = { + .name = "fsl-gianfar_mdio", + .id = 0, + .dev.platform_data = &mpc85xx_mdio_pdata, + .num_resources = 0, + }, }; static int __init mach_mpc85xx_fixup(struct platform_device *pdev) diff --git a/arch/ppc/syslib/mpc85xx_sys.c b/arch/ppc/syslib/mpc85xx_sys.c index 6e3184ab354..397cfbcce5e 100644 --- a/arch/ppc/syslib/mpc85xx_sys.c +++ b/arch/ppc/syslib/mpc85xx_sys.c @@ -3,7 +3,7 @@ * * MPC85xx System descriptions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor Inc. * @@ -24,19 +24,19 @@ struct ppc_sys_spec ppc_sys_specs[] = { .ppc_sys_name = "8540", .mask = 0xFFFF0000, .value = 0x80300000, - .num_devices = 10, + .num_devices = 11, .device_list = (enum ppc_sys_devices[]) { MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_FEC, MPC85xx_IIC1, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, - MPC85xx_PERFMON, MPC85xx_DUART, + MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_MDIO, }, }, { .ppc_sys_name = "8560", .mask = 0xFFFF0000, .value = 0x80700000, - .num_devices = 19, + .num_devices = 20, .device_list = (enum ppc_sys_devices[]) { MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, @@ -45,14 +45,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1, MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3, MPC85xx_CPM_SCC4, MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, MPC85xx_CPM_FCC3, - MPC85xx_CPM_MCC1, MPC85xx_CPM_MCC2, + MPC85xx_CPM_MCC1, MPC85xx_CPM_MCC2, MPC85xx_MDIO, }, }, { .ppc_sys_name = "8541", .mask = 0xFFFF0000, .value = 0x80720000, - .num_devices = 13, + .num_devices = 14, .device_list = (enum ppc_sys_devices[]) { MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, @@ -60,13 +60,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8541E", .mask = 0xFFFF0000, .value = 0x807A0000, - .num_devices = 14, + .num_devices = 15, .device_list = (enum ppc_sys_devices[]) { MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, @@ -74,13 +75,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8555", .mask = 0xFFFF0000, .value = 0x80710000, - .num_devices = 19, + .num_devices = 20, .device_list = (enum ppc_sys_devices[]) { MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, @@ -91,13 +93,14 @@ struct ppc_sys_spec ppc_sys_specs[] = { MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2, MPC85xx_CPM_USB, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8555E", .mask = 0xFFFF0000, .value = 0x80790000, - .num_devices = 20, + .num_devices = 21, .device_list = (enum ppc_sys_devices[]) { MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, @@ -108,6 +111,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2, MPC85xx_CPM_USB, + MPC85xx_MDIO, }, }, /* SVRs on 8548 rev1.0 matches for 8548/8547/8545 */ @@ -115,104 +119,112 @@ struct ppc_sys_spec ppc_sys_specs[] = { .ppc_sys_name = "8548E", .mask = 0xFFFF00F0, .value = 0x80390010, - .num_devices = 13, + .num_devices = 14, .device_list = (enum ppc_sys_devices[]) { MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3, MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8548", .mask = 0xFFFF00F0, .value = 0x80310010, - .num_devices = 12, + .num_devices = 13, .device_list = (enum ppc_sys_devices[]) { MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3, MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, MPC85xx_PERFMON, MPC85xx_DUART, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8547E", .mask = 0xFFFF00F0, .value = 0x80390010, - .num_devices = 13, + .num_devices = 14, .device_list = (enum ppc_sys_devices[]) { MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3, MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8547", .mask = 0xFFFF00F0, .value = 0x80310010, - .num_devices = 12, + .num_devices = 13, .device_list = (enum ppc_sys_devices[]) { MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3, MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, MPC85xx_PERFMON, MPC85xx_DUART, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8545E", .mask = 0xFFFF00F0, .value = 0x80390010, - .num_devices = 11, + .num_devices = 12, .device_list = (enum ppc_sys_devices[]) { MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_IIC1, MPC85xx_IIC2, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8545", .mask = 0xFFFF00F0, .value = 0x80310010, - .num_devices = 10, + .num_devices = 11, .device_list = (enum ppc_sys_devices[]) { MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_IIC1, MPC85xx_IIC2, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, MPC85xx_PERFMON, MPC85xx_DUART, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8543E", .mask = 0xFFFF00F0, .value = 0x803A0010, - .num_devices = 11, + .num_devices = 12, .device_list = (enum ppc_sys_devices[]) { MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_IIC1, MPC85xx_IIC2, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, + MPC85xx_MDIO, }, }, { .ppc_sys_name = "8543", .mask = 0xFFFF00F0, .value = 0x80320010, - .num_devices = 10, + .num_devices = 11, .device_list = (enum ppc_sys_devices[]) { MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_IIC1, MPC85xx_IIC2, MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, MPC85xx_PERFMON, MPC85xx_DUART, + MPC85xx_MDIO, }, }, { /* default match */ diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c index 2b5f0e70168..92dc98b36bd 100644 --- a/arch/ppc/syslib/mpc8xx_devices.c +++ b/arch/ppc/syslib/mpc8xx_devices.c @@ -3,7 +3,7 @@ * * MPC8xx Device descriptions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug<vbordug@ru.mvista.com> * diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c index a532ccc861c..d3c61752160 100644 --- a/arch/ppc/syslib/mpc8xx_sys.c +++ b/arch/ppc/syslib/mpc8xx_sys.c @@ -3,7 +3,7 @@ * * MPC8xx System descriptions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 MontaVista Software, Inc. by Vitaly Bordug <vbordug@ru.mvista.com> * @@ -24,7 +24,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { .ppc_sys_name = "MPC86X", .mask = 0xFFFFFFFF, .value = 0x00000000, - .num_devices = 2, + .num_devices = 7, .device_list = (enum ppc_sys_devices[]) { MPC8xx_CPM_FEC1, @@ -40,7 +40,7 @@ struct ppc_sys_spec ppc_sys_specs[] = { .ppc_sys_name = "MPC885", .mask = 0xFFFFFFFF, .value = 0x00000000, - .num_devices = 3, + .num_devices = 8, .device_list = (enum ppc_sys_devices[]) { MPC8xx_CPM_FEC1, diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c index 8356da4678a..58b0aa813e8 100644 --- a/arch/ppc/syslib/mv64360_pic.c +++ b/arch/ppc/syslib/mv64360_pic.c @@ -48,6 +48,7 @@ #include <asm/system.h> #include <asm/irq.h> #include <asm/mv64x60.h> +#include <asm/machdep.h> #ifdef CONFIG_IRQ_ALL_CPUS #error "The mv64360 does not support distribution of IRQs on all CPUs" diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c index 839f8872826..94ea346b7b4 100644 --- a/arch/ppc/syslib/mv64x60.c +++ b/arch/ppc/syslib/mv64x60.c @@ -19,6 +19,7 @@ #include <linux/string.h> #include <linux/spinlock.h> #include <linux/mv643xx.h> +#include <linux/platform_device.h> #include <asm/byteorder.h> #include <asm/io.h> @@ -34,7 +35,7 @@ u8 mv64x60_pci_exclude_bridge = 1; DEFINE_SPINLOCK(mv64x60_lock); static phys_addr_t mv64x60_bridge_pbase; -static void *mv64x60_bridge_vbase; +static void __iomem *mv64x60_bridge_vbase; static u32 mv64x60_bridge_type = MV64x60_TYPE_INVALID; static u32 mv64x60_bridge_rev; #if defined(CONFIG_SYSFS) && !defined(CONFIG_GT64260) @@ -938,7 +939,7 @@ mv64x60_setup_for_chip(struct mv64x60_handle *bh) * * Return the virtual address of the bridge's registers. */ -void * +void __iomem * mv64x60_get_bridge_vbase(void) { return mv64x60_bridge_vbase; @@ -1304,7 +1305,7 @@ mv64x60_config_pci_params(struct pci_controller *hose, early_write_config_word(hose, 0, devfn, PCI_COMMAND, u16_val); /* Set latency timer, cache line size, clear BIST */ - u16_val = (pi->latency_timer << 8) | (L1_CACHE_LINE_SIZE >> 2); + u16_val = (pi->latency_timer << 8) | (L1_CACHE_BYTES >> 2); early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val); mv64x60_pci_exclude_bridge = save_exclude; diff --git a/arch/ppc/syslib/mv64x60_dbg.c b/arch/ppc/syslib/mv64x60_dbg.c index 2927c7adf5e..fa5b2e45e0c 100644 --- a/arch/ppc/syslib/mv64x60_dbg.c +++ b/arch/ppc/syslib/mv64x60_dbg.c @@ -24,6 +24,7 @@ #include <linux/irq.h> #include <asm/delay.h> #include <asm/mv64x60.h> +#include <asm/machdep.h> #if defined(CONFIG_SERIAL_TEXT_DEBUG) diff --git a/arch/ppc/syslib/of_device.c b/arch/ppc/syslib/of_device.c deleted file mode 100644 index da8a0f2128d..00000000000 --- a/arch/ppc/syslib/of_device.c +++ /dev/null @@ -1,274 +0,0 @@ -#include <linux/config.h> -#include <linux/string.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/module.h> -#include <linux/mod_devicetable.h> -#include <asm/errno.h> -#include <asm/of_device.h> - -/** - * of_match_device - Tell if an of_device structure has a matching - * of_match structure - * @ids: array of of device match structures to search in - * @dev: the of device structure to match against - * - * Used by a driver to check whether an of_device present in the - * system is in its list of supported devices. - */ -const struct of_device_id * of_match_device(const struct of_device_id *matches, - const struct of_device *dev) -{ - if (!dev->node) - return NULL; - while (matches->name[0] || matches->type[0] || matches->compatible[0]) { - int match = 1; - if (matches->name[0]) - match &= dev->node->name - && !strcmp(matches->name, dev->node->name); - if (matches->type[0]) - match &= dev->node->type - && !strcmp(matches->type, dev->node->type); - if (matches->compatible[0]) - match &= device_is_compatible(dev->node, - matches->compatible); - if (match) - return matches; - matches++; - } - return NULL; -} - -static int of_platform_bus_match(struct device *dev, struct device_driver *drv) -{ - struct of_device * of_dev = to_of_device(dev); - struct of_platform_driver * of_drv = to_of_platform_driver(drv); - const struct of_device_id * matches = of_drv->match_table; - - if (!matches) - return 0; - - return of_match_device(matches, of_dev) != NULL; -} - -struct of_device *of_dev_get(struct of_device *dev) -{ - struct device *tmp; - - if (!dev) - return NULL; - tmp = get_device(&dev->dev); - if (tmp) - return to_of_device(tmp); - else - return NULL; -} - -void of_dev_put(struct of_device *dev) -{ - if (dev) - put_device(&dev->dev); -} - - -static int of_device_probe(struct device *dev) -{ - int error = -ENODEV; - struct of_platform_driver *drv; - struct of_device *of_dev; - const struct of_device_id *match; - - drv = to_of_platform_driver(dev->driver); - of_dev = to_of_device(dev); - - if (!drv->probe) - return error; - - of_dev_get(of_dev); - - match = of_match_device(drv->match_table, of_dev); - if (match) - error = drv->probe(of_dev, match); - if (error) - of_dev_put(of_dev); - - return error; -} - -static int of_device_remove(struct device *dev) -{ - struct of_device * of_dev = to_of_device(dev); - struct of_platform_driver * drv = to_of_platform_driver(dev->driver); - - if (dev->driver && drv->remove) - drv->remove(of_dev); - return 0; -} - -static int of_device_suspend(struct device *dev, pm_message_t state) -{ - struct of_device * of_dev = to_of_device(dev); - struct of_platform_driver * drv = to_of_platform_driver(dev->driver); - int error = 0; - - if (dev->driver && drv->suspend) - error = drv->suspend(of_dev, state); - return error; -} - -static int of_device_resume(struct device * dev) -{ - struct of_device * of_dev = to_of_device(dev); - struct of_platform_driver * drv = to_of_platform_driver(dev->driver); - int error = 0; - - if (dev->driver && drv->resume) - error = drv->resume(of_dev); - return error; -} - -struct bus_type of_platform_bus_type = { - .name = "of_platform", - .match = of_platform_bus_match, - .suspend = of_device_suspend, - .resume = of_device_resume, -}; - -static int __init of_bus_driver_init(void) -{ - return bus_register(&of_platform_bus_type); -} - -postcore_initcall(of_bus_driver_init); - -int of_register_driver(struct of_platform_driver *drv) -{ - int count = 0; - - /* initialize common driver fields */ - drv->driver.name = drv->name; - drv->driver.bus = &of_platform_bus_type; - drv->driver.probe = of_device_probe; - drv->driver.remove = of_device_remove; - - /* register with core */ - count = driver_register(&drv->driver); - return count ? count : 1; -} - -void of_unregister_driver(struct of_platform_driver *drv) -{ - driver_unregister(&drv->driver); -} - - -static ssize_t dev_show_devspec(struct device *dev, struct device_attribute *attr, char *buf) -{ - struct of_device *ofdev; - - ofdev = to_of_device(dev); - return sprintf(buf, "%s", ofdev->node->full_name); -} - -static DEVICE_ATTR(devspec, S_IRUGO, dev_show_devspec, NULL); - -/** - * of_release_dev - free an of device structure when all users of it are finished. - * @dev: device that's been disconnected - * - * Will be called only by the device core when all users of this of device are - * done. - */ -void of_release_dev(struct device *dev) -{ - struct of_device *ofdev; - - ofdev = to_of_device(dev); - of_node_put(ofdev->node); - kfree(ofdev); -} - -int of_device_register(struct of_device *ofdev) -{ - int rc; - struct of_device **odprop; - - BUG_ON(ofdev->node == NULL); - - odprop = (struct of_device **)get_property(ofdev->node, "linux,device", NULL); - if (!odprop) { - struct property *new_prop; - - new_prop = kmalloc(sizeof(struct property) + sizeof(struct of_device *), - GFP_KERNEL); - if (new_prop == NULL) - return -ENOMEM; - new_prop->name = "linux,device"; - new_prop->length = sizeof(sizeof(struct of_device *)); - new_prop->value = (unsigned char *)&new_prop[1]; - odprop = (struct of_device **)new_prop->value; - *odprop = NULL; - prom_add_property(ofdev->node, new_prop); - } - *odprop = ofdev; - - rc = device_register(&ofdev->dev); - if (rc) - return rc; - - device_create_file(&ofdev->dev, &dev_attr_devspec); - - return 0; -} - -void of_device_unregister(struct of_device *ofdev) -{ - struct of_device **odprop; - - device_remove_file(&ofdev->dev, &dev_attr_devspec); - - odprop = (struct of_device **)get_property(ofdev->node, "linux,device", NULL); - if (odprop) - *odprop = NULL; - - device_unregister(&ofdev->dev); -} - -struct of_device* of_platform_device_create(struct device_node *np, const char *bus_id) -{ - struct of_device *dev; - u32 *reg; - - dev = kmalloc(sizeof(*dev), GFP_KERNEL); - if (!dev) - return NULL; - memset(dev, 0, sizeof(*dev)); - - dev->node = of_node_get(np); - dev->dma_mask = 0xffffffffUL; - dev->dev.dma_mask = &dev->dma_mask; - dev->dev.parent = NULL; - dev->dev.bus = &of_platform_bus_type; - dev->dev.release = of_release_dev; - - reg = (u32 *)get_property(np, "reg", NULL); - strlcpy(dev->dev.bus_id, bus_id, BUS_ID_SIZE); - - if (of_device_register(dev) != 0) { - kfree(dev); - return NULL; - } - - return dev; -} - -EXPORT_SYMBOL(of_match_device); -EXPORT_SYMBOL(of_platform_bus_type); -EXPORT_SYMBOL(of_register_driver); -EXPORT_SYMBOL(of_unregister_driver); -EXPORT_SYMBOL(of_device_register); -EXPORT_SYMBOL(of_device_unregister); -EXPORT_SYMBOL(of_dev_get); -EXPORT_SYMBOL(of_dev_put); -EXPORT_SYMBOL(of_platform_device_create); -EXPORT_SYMBOL(of_release_dev); diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c index 53da58523e3..894779712b4 100644 --- a/arch/ppc/syslib/open_pic.c +++ b/arch/ppc/syslib/open_pic.c @@ -13,7 +13,6 @@ #include <linux/kernel.h> #include <linux/sched.h> #include <linux/init.h> -#include <linux/irq.h> #include <linux/interrupt.h> #include <linux/sysdev.h> #include <linux/errno.h> @@ -24,6 +23,7 @@ #include <asm/sections.h> #include <asm/open_pic.h> #include <asm/i8259.h> +#include <asm/machdep.h> #include "open_pic_defs.h" @@ -890,7 +890,7 @@ openpic_get_irq(struct pt_regs *regs) #ifdef CONFIG_SMP void -smp_openpic_message_pass(int target, int msg, unsigned long data, int wait) +smp_openpic_message_pass(int target, int msg) { cpumask_t mask = CPU_MASK_ALL; /* make sure we're sending something that translates to an IPI */ diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c index 9a7e8748e2b..1c40049b9a4 100644 --- a/arch/ppc/syslib/open_pic2.c +++ b/arch/ppc/syslib/open_pic2.c @@ -17,7 +17,6 @@ #include <linux/kernel.h> #include <linux/sched.h> #include <linux/init.h> -#include <linux/irq.h> #include <linux/interrupt.h> #include <linux/sysdev.h> #include <linux/errno.h> @@ -28,6 +27,7 @@ #include <asm/sections.h> #include <asm/open_pic.h> #include <asm/i8259.h> +#include <asm/machdep.h> #include "open_pic_defs.h" diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c index ce4d1deb86e..c46043c4722 100644 --- a/arch/ppc/syslib/ppc403_pic.c +++ b/arch/ppc/syslib/ppc403_pic.c @@ -26,6 +26,7 @@ #include <asm/system.h> #include <asm/irq.h> #include <asm/ppc4xx_pic.h> +#include <asm/machdep.h> /* Function Prototypes */ diff --git a/arch/ppc/syslib/ppc405_pci.c b/arch/ppc/syslib/ppc405_pci.c index 81c83bf98df..d6d838b16da 100644 --- a/arch/ppc/syslib/ppc405_pci.c +++ b/arch/ppc/syslib/ppc405_pci.c @@ -89,13 +89,6 @@ ppc4xx_find_bridges(void) isa_mem_base = 0; pci_dram_offset = 0; -#if (PSR_PCI_ARBIT_EN > 1) - /* Check if running in slave mode */ - if ((mfdcr(DCRN_CHPSR) & PSR_PCI_ARBIT_EN) == 0) { - printk("Running as PCI slave, kernel PCI disabled !\n"); - return; - } -#endif /* Setup PCI32 hose */ hose_a = pcibios_alloc_controller(); if (!hose_a) diff --git a/arch/ppc/syslib/ppc440spe_pcie.c b/arch/ppc/syslib/ppc440spe_pcie.c new file mode 100644 index 00000000000..1509fc1ddfb --- /dev/null +++ b/arch/ppc/syslib/ppc440spe_pcie.c @@ -0,0 +1,442 @@ +/* + * Copyright (c) 2005 Cisco Systems. All rights reserved. + * Roland Dreier <rolandd@cisco.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/config.h> +#include <linux/kernel.h> +#include <linux/delay.h> +#include <linux/pci.h> +#include <linux/init.h> + +#include <asm/reg.h> +#include <asm/io.h> +#include <asm/ibm44x.h> + +#include "ppc440spe_pcie.h" + +static int +pcie_read_config(struct pci_bus *bus, unsigned int devfn, int offset, + int len, u32 *val) +{ + struct pci_controller *hose = bus->sysdata; + + if (PCI_SLOT(devfn) != 1) + return PCIBIOS_DEVICE_NOT_FOUND; + + offset += devfn << 12; + + /* + * Note: the caller has already checked that offset is + * suitably aligned and that len is 1, 2 or 4. + */ + switch (len) { + case 1: + *val = in_8(hose->cfg_data + offset); + break; + case 2: + *val = in_le16(hose->cfg_data + offset); + break; + default: + *val = in_le32(hose->cfg_data + offset); + break; + } + + if (0) printk("%s: read %x(%d) @ %x\n", __func__, *val, len, offset); + + return PCIBIOS_SUCCESSFUL; +} + +static int +pcie_write_config(struct pci_bus *bus, unsigned int devfn, int offset, + int len, u32 val) +{ + struct pci_controller *hose = bus->sysdata; + + if (PCI_SLOT(devfn) != 1) + return PCIBIOS_DEVICE_NOT_FOUND; + + offset += devfn << 12; + + switch (len) { + case 1: + out_8(hose->cfg_data + offset, val); + break; + case 2: + out_le16(hose->cfg_data + offset, val); + break; + default: + out_le32(hose->cfg_data + offset, val); + break; + } + return PCIBIOS_SUCCESSFUL; +} + +static struct pci_ops pcie_pci_ops = +{ + .read = pcie_read_config, + .write = pcie_write_config +}; + +enum { + PTYPE_ENDPOINT = 0x0, + PTYPE_LEGACY_ENDPOINT = 0x1, + PTYPE_ROOT_PORT = 0x4, + + LNKW_X1 = 0x1, + LNKW_X4 = 0x4, + LNKW_X8 = 0x8 +}; + +static void check_error(void) +{ + u32 valPE0, valPE1, valPE2; + + /* SDR0_PEGPLLLCT1 reset */ + if (!(valPE0 = SDR_READ(PESDR0_PLLLCT1) & 0x01000000)) { + printk(KERN_INFO "PCIE: SDR0_PEGPLLLCT1 reset error 0x%8x\n", valPE0); + } + + valPE0 = SDR_READ(PESDR0_RCSSET); + valPE1 = SDR_READ(PESDR1_RCSSET); + valPE2 = SDR_READ(PESDR2_RCSSET); + + /* SDR0_PExRCSSET rstgu */ + if ( !(valPE0 & 0x01000000) || + !(valPE1 & 0x01000000) || + !(valPE2 & 0x01000000)) { + printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstgu error\n"); + } + + /* SDR0_PExRCSSET rstdl */ + if ( !(valPE0 & 0x00010000) || + !(valPE1 & 0x00010000) || + !(valPE2 & 0x00010000)) { + printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstdl error\n"); + } + + /* SDR0_PExRCSSET rstpyn */ + if ( (valPE0 & 0x00001000) || + (valPE1 & 0x00001000) || + (valPE2 & 0x00001000)) { + printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstpyn error\n"); + } + + /* SDR0_PExRCSSET hldplb */ + if ( (valPE0 & 0x10000000) || + (valPE1 & 0x10000000) || + (valPE2 & 0x10000000)) { + printk(KERN_INFO "PCIE: SDR0_PExRCSSET hldplb error\n"); + } + + /* SDR0_PExRCSSET rdy */ + if ( (valPE0 & 0x00100000) || + (valPE1 & 0x00100000) || + (valPE2 & 0x00100000)) { + printk(KERN_INFO "PCIE: SDR0_PExRCSSET rdy error\n"); + } + + /* SDR0_PExRCSSET shutdown */ + if ( (valPE0 & 0x00000100) || + (valPE1 & 0x00000100) || + (valPE2 & 0x00000100)) { + printk(KERN_INFO "PCIE: SDR0_PExRCSSET shutdown error\n"); + } +} + +/* + * Initialize PCI Express core as described in User Manual section 27.12.1 + */ +int ppc440spe_init_pcie(void) +{ + /* Set PLL clock receiver to LVPECL */ + SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) | 1 << 28); + + check_error(); + + printk(KERN_INFO "PCIE initialization OK\n"); + + if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000)) + printk(KERN_INFO "PESDR_PLLCT2 resistance calibration failed (0x%08x)\n", + SDR_READ(PESDR0_PLLLCT2)); + + /* De-assert reset of PCIe PLL, wait for lock */ + SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) & ~(1 << 24)); + udelay(3); + + return 0; +} + +int ppc440spe_init_pcie_rootport(int port) +{ + static int core_init; + void __iomem *utl_base; + u32 val = 0; + int i; + + if (!core_init) { + ++core_init; + i = ppc440spe_init_pcie(); + if (i) + return i; + } + + /* + * Initialize various parts of the PCI Express core for our port: + * + * - Set as a root port and enable max width + * (PXIE0 -> X8, PCIE1 and PCIE2 -> X4). + * - Set up UTL configuration. + * - Increase SERDES drive strength to levels suggested by AMCC. + * - De-assert RSTPYN, RSTDL and RSTGU. + */ + switch (port) { + case 0: + SDR_WRITE(PESDR0_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X8 << 12); + + SDR_WRITE(PESDR0_UTLSET1, 0x21222222); + SDR_WRITE(PESDR0_UTLSET2, 0x11000000); + + SDR_WRITE(PESDR0_HSSL0SET1, 0x35000000); + SDR_WRITE(PESDR0_HSSL1SET1, 0x35000000); + SDR_WRITE(PESDR0_HSSL2SET1, 0x35000000); + SDR_WRITE(PESDR0_HSSL3SET1, 0x35000000); + SDR_WRITE(PESDR0_HSSL4SET1, 0x35000000); + SDR_WRITE(PESDR0_HSSL5SET1, 0x35000000); + SDR_WRITE(PESDR0_HSSL6SET1, 0x35000000); + SDR_WRITE(PESDR0_HSSL7SET1, 0x35000000); + + SDR_WRITE(PESDR0_RCSSET, + (SDR_READ(PESDR0_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12); + break; + + case 1: + SDR_WRITE(PESDR1_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X4 << 12); + + SDR_WRITE(PESDR1_UTLSET1, 0x21222222); + SDR_WRITE(PESDR1_UTLSET2, 0x11000000); + + SDR_WRITE(PESDR1_HSSL0SET1, 0x35000000); + SDR_WRITE(PESDR1_HSSL1SET1, 0x35000000); + SDR_WRITE(PESDR1_HSSL2SET1, 0x35000000); + SDR_WRITE(PESDR1_HSSL3SET1, 0x35000000); + + SDR_WRITE(PESDR1_RCSSET, + (SDR_READ(PESDR1_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12); + break; + + case 2: + SDR_WRITE(PESDR2_DLPSET, PTYPE_ROOT_PORT << 20 | LNKW_X4 << 12); + + SDR_WRITE(PESDR2_UTLSET1, 0x21222222); + SDR_WRITE(PESDR2_UTLSET2, 0x11000000); + + SDR_WRITE(PESDR2_HSSL0SET1, 0x35000000); + SDR_WRITE(PESDR2_HSSL1SET1, 0x35000000); + SDR_WRITE(PESDR2_HSSL2SET1, 0x35000000); + SDR_WRITE(PESDR2_HSSL3SET1, 0x35000000); + + SDR_WRITE(PESDR2_RCSSET, + (SDR_READ(PESDR2_RCSSET) & ~(1 << 24 | 1 << 16)) | 1 << 12); + break; + } + + mdelay(1000); + + switch (port) { + case 0: val = SDR_READ(PESDR0_RCSSTS); break; + case 1: val = SDR_READ(PESDR1_RCSSTS); break; + case 2: val = SDR_READ(PESDR2_RCSSTS); break; + } + + if (!(val & (1 << 20))) + printk(KERN_INFO "PCIE%d: PGRST inactive\n", port); + else + printk(KERN_WARNING "PGRST for PCIE%d failed %08x\n", port, val); + + switch (port) { + case 0: printk(KERN_INFO "PCIE0: LOOP %08x\n", SDR_READ(PESDR0_LOOP)); break; + case 1: printk(KERN_INFO "PCIE1: LOOP %08x\n", SDR_READ(PESDR1_LOOP)); break; + case 2: printk(KERN_INFO "PCIE2: LOOP %08x\n", SDR_READ(PESDR2_LOOP)); break; + } + + /* + * Map UTL registers at 0xc_1000_0n00 + */ + switch (port) { + case 0: + mtdcr(DCRN_PEGPL_REGBAH(PCIE0), 0x0000000c); + mtdcr(DCRN_PEGPL_REGBAL(PCIE0), 0x10000000); + mtdcr(DCRN_PEGPL_REGMSK(PCIE0), 0x00007001); + mtdcr(DCRN_PEGPL_SPECIAL(PCIE0), 0x68782800); + break; + + case 1: + mtdcr(DCRN_PEGPL_REGBAH(PCIE1), 0x0000000c); + mtdcr(DCRN_PEGPL_REGBAL(PCIE1), 0x10001000); + mtdcr(DCRN_PEGPL_REGMSK(PCIE1), 0x00007001); + mtdcr(DCRN_PEGPL_SPECIAL(PCIE1), 0x68782800); + break; + + case 2: + mtdcr(DCRN_PEGPL_REGBAH(PCIE2), 0x0000000c); + mtdcr(DCRN_PEGPL_REGBAL(PCIE2), 0x10002000); + mtdcr(DCRN_PEGPL_REGMSK(PCIE2), 0x00007001); + mtdcr(DCRN_PEGPL_SPECIAL(PCIE2), 0x68782800); + } + + utl_base = ioremap64(0xc10000000ull + 0x1000 * port, 0x100); + + /* + * Set buffer allocations and then assert VRB and TXE. + */ + out_be32(utl_base + PEUTL_OUTTR, 0x08000000); + out_be32(utl_base + PEUTL_INTR, 0x02000000); + out_be32(utl_base + PEUTL_OPDBSZ, 0x10000000); + out_be32(utl_base + PEUTL_PBBSZ, 0x53000000); + out_be32(utl_base + PEUTL_IPHBSZ, 0x08000000); + out_be32(utl_base + PEUTL_IPDBSZ, 0x10000000); + out_be32(utl_base + PEUTL_RCIRQEN, 0x00f00000); + out_be32(utl_base + PEUTL_PCTL, 0x80800066); + + iounmap(utl_base); + + /* + * We map PCI Express configuration access into the 512MB regions + * PCIE0: 0xc_4000_0000 + * PCIE1: 0xc_8000_0000 + * PCIE2: 0xc_c000_0000 + */ + switch (port) { + case 0: + mtdcr(DCRN_PEGPL_CFGBAH(PCIE0), 0x0000000c); + mtdcr(DCRN_PEGPL_CFGBAL(PCIE0), 0x40000000); + mtdcr(DCRN_PEGPL_CFGMSK(PCIE0), 0xe0000001); /* 512MB region, valid */ + break; + + case 1: + mtdcr(DCRN_PEGPL_CFGBAH(PCIE1), 0x0000000c); + mtdcr(DCRN_PEGPL_CFGBAL(PCIE1), 0x80000000); + mtdcr(DCRN_PEGPL_CFGMSK(PCIE1), 0xe0000001); /* 512MB region, valid */ + break; + + case 2: + mtdcr(DCRN_PEGPL_CFGBAH(PCIE2), 0x0000000c); + mtdcr(DCRN_PEGPL_CFGBAL(PCIE2), 0xc0000000); + mtdcr(DCRN_PEGPL_CFGMSK(PCIE2), 0xe0000001); /* 512MB region, valid */ + break; + } + + /* + * Check for VC0 active and assert RDY. + */ + switch (port) { + case 0: + if (!(SDR_READ(PESDR0_RCSSTS) & (1 << 16))) + printk(KERN_WARNING "PCIE0: VC0 not active\n"); + SDR_WRITE(PESDR0_RCSSET, SDR_READ(PESDR0_RCSSET) | 1 << 20); + break; + case 1: + if (!(SDR_READ(PESDR1_RCSSTS) & (1 << 16))) + printk(KERN_WARNING "PCIE0: VC0 not active\n"); + SDR_WRITE(PESDR1_RCSSET, SDR_READ(PESDR1_RCSSET) | 1 << 20); + break; + case 2: + if (!(SDR_READ(PESDR2_RCSSTS) & (1 << 16))) + printk(KERN_WARNING "PCIE0: VC0 not active\n"); + SDR_WRITE(PESDR2_RCSSET, SDR_READ(PESDR2_RCSSET) | 1 << 20); + break; + } + +#if 0 + /* Dump all config regs */ + for (i = 0x300; i <= 0x320; ++i) + printk("[%04x] 0x%08x\n", i, SDR_READ(i)); + for (i = 0x340; i <= 0x353; ++i) + printk("[%04x] 0x%08x\n", i, SDR_READ(i)); + for (i = 0x370; i <= 0x383; ++i) + printk("[%04x] 0x%08x\n", i, SDR_READ(i)); + for (i = 0x3a0; i <= 0x3a2; ++i) + printk("[%04x] 0x%08x\n", i, SDR_READ(i)); + for (i = 0x3c0; i <= 0x3c3; ++i) + printk("[%04x] 0x%08x\n", i, SDR_READ(i)); +#endif + + mdelay(100); + + return 0; +} + +void ppc440spe_setup_pcie(struct pci_controller *hose, int port) +{ + void __iomem *mbase; + + /* + * Map 16MB, which is enough for 4 bits of bus # + */ + hose->cfg_data = ioremap64(0xc40000000ull + port * 0x40000000, + 1 << 24); + hose->ops = &pcie_pci_ops; + + /* + * Set bus numbers on our root port + */ + mbase = ioremap64(0xc50000000ull + port * 0x40000000, 4096); + out_8(mbase + PCI_PRIMARY_BUS, 0); + out_8(mbase + PCI_SECONDARY_BUS, 0); + + /* + * Set up outbound translation to hose->mem_space from PLB + * addresses at an offset of 0xd_0000_0000. We set the low + * bits of the mask to 11 to turn off splitting into 8 + * subregions and to enable the outbound translation. + */ + out_le32(mbase + PECFG_POM0LAH, 0); + out_le32(mbase + PECFG_POM0LAL, hose->mem_space.start); + + switch (port) { + case 0: + mtdcr(DCRN_PEGPL_OMR1BAH(PCIE0), 0x0000000d); + mtdcr(DCRN_PEGPL_OMR1BAL(PCIE0), hose->mem_space.start); + mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE0), 0x7fffffff); + mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE0), + ~(hose->mem_space.end - hose->mem_space.start) | 3); + break; + case 1: + mtdcr(DCRN_PEGPL_OMR1BAH(PCIE1), 0x0000000d); + mtdcr(DCRN_PEGPL_OMR1BAL(PCIE1), hose->mem_space.start); + mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE1), 0x7fffffff); + mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE1), + ~(hose->mem_space.end - hose->mem_space.start) | 3); + + break; + case 2: + mtdcr(DCRN_PEGPL_OMR1BAH(PCIE2), 0x0000000d); + mtdcr(DCRN_PEGPL_OMR1BAL(PCIE2), hose->mem_space.start); + mtdcr(DCRN_PEGPL_OMR1MSKH(PCIE2), 0x7fffffff); + mtdcr(DCRN_PEGPL_OMR1MSKL(PCIE2), + ~(hose->mem_space.end - hose->mem_space.start) | 3); + break; + } + + /* Set up 16GB inbound memory window at 0 */ + out_le32(mbase + PCI_BASE_ADDRESS_0, 0); + out_le32(mbase + PCI_BASE_ADDRESS_1, 0); + out_le32(mbase + PECFG_BAR0HMPA, 0x7fffffc); + out_le32(mbase + PECFG_BAR0LMPA, 0); + out_le32(mbase + PECFG_PIM0LAL, 0); + out_le32(mbase + PECFG_PIM0LAH, 0); + out_le32(mbase + PECFG_PIMEN, 0x1); + + /* Enable I/O, Mem, and Busmaster cycles */ + out_le16(mbase + PCI_COMMAND, + in_le16(mbase + PCI_COMMAND) | + PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + + iounmap(mbase); +} diff --git a/arch/ppc/syslib/ppc440spe_pcie.h b/arch/ppc/syslib/ppc440spe_pcie.h new file mode 100644 index 00000000000..55b765ad327 --- /dev/null +++ b/arch/ppc/syslib/ppc440spe_pcie.h @@ -0,0 +1,149 @@ +/* + * Copyright (c) 2005 Cisco Systems. All rights reserved. + * Roland Dreier <rolandd@cisco.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __PPC_SYSLIB_PPC440SPE_PCIE_H +#define __PPC_SYSLIB_PPC440SPE_PCIE_H + +#define DCRN_SDR0_CFGADDR 0x00e +#define DCRN_SDR0_CFGDATA 0x00f + +#define DCRN_PCIE0_BASE 0x100 +#define DCRN_PCIE1_BASE 0x120 +#define DCRN_PCIE2_BASE 0x140 +#define PCIE0 DCRN_PCIE0_BASE +#define PCIE1 DCRN_PCIE1_BASE +#define PCIE2 DCRN_PCIE2_BASE + +#define DCRN_PEGPL_CFGBAH(base) (base + 0x00) +#define DCRN_PEGPL_CFGBAL(base) (base + 0x01) +#define DCRN_PEGPL_CFGMSK(base) (base + 0x02) +#define DCRN_PEGPL_MSGBAH(base) (base + 0x03) +#define DCRN_PEGPL_MSGBAL(base) (base + 0x04) +#define DCRN_PEGPL_MSGMSK(base) (base + 0x05) +#define DCRN_PEGPL_OMR1BAH(base) (base + 0x06) +#define DCRN_PEGPL_OMR1BAL(base) (base + 0x07) +#define DCRN_PEGPL_OMR1MSKH(base) (base + 0x08) +#define DCRN_PEGPL_OMR1MSKL(base) (base + 0x09) +#define DCRN_PEGPL_REGBAH(base) (base + 0x12) +#define DCRN_PEGPL_REGBAL(base) (base + 0x13) +#define DCRN_PEGPL_REGMSK(base) (base + 0x14) +#define DCRN_PEGPL_SPECIAL(base) (base + 0x15) + +/* + * System DCRs (SDRs) + */ +#define PESDR0_PLLLCT1 0x03a0 +#define PESDR0_PLLLCT2 0x03a1 +#define PESDR0_PLLLCT3 0x03a2 + +#define PESDR0_UTLSET1 0x0300 +#define PESDR0_UTLSET2 0x0301 +#define PESDR0_DLPSET 0x0302 +#define PESDR0_LOOP 0x0303 +#define PESDR0_RCSSET 0x0304 +#define PESDR0_RCSSTS 0x0305 +#define PESDR0_HSSL0SET1 0x0306 +#define PESDR0_HSSL0SET2 0x0307 +#define PESDR0_HSSL0STS 0x0308 +#define PESDR0_HSSL1SET1 0x0309 +#define PESDR0_HSSL1SET2 0x030a +#define PESDR0_HSSL1STS 0x030b +#define PESDR0_HSSL2SET1 0x030c +#define PESDR0_HSSL2SET2 0x030d +#define PESDR0_HSSL2STS 0x030e +#define PESDR0_HSSL3SET1 0x030f +#define PESDR0_HSSL3SET2 0x0310 +#define PESDR0_HSSL3STS 0x0311 +#define PESDR0_HSSL4SET1 0x0312 +#define PESDR0_HSSL4SET2 0x0313 +#define PESDR0_HSSL4STS 0x0314 +#define PESDR0_HSSL5SET1 0x0315 +#define PESDR0_HSSL5SET2 0x0316 +#define PESDR0_HSSL5STS 0x0317 +#define PESDR0_HSSL6SET1 0x0318 +#define PESDR0_HSSL6SET2 0x0319 +#define PESDR0_HSSL6STS 0x031a +#define PESDR0_HSSL7SET1 0x031b +#define PESDR0_HSSL7SET2 0x031c +#define PESDR0_HSSL7STS 0x031d +#define PESDR0_HSSCTLSET 0x031e +#define PESDR0_LANE_ABCD 0x031f +#define PESDR0_LANE_EFGH 0x0320 + +#define PESDR1_UTLSET1 0x0340 +#define PESDR1_UTLSET2 0x0341 +#define PESDR1_DLPSET 0x0342 +#define PESDR1_LOOP 0x0343 +#define PESDR1_RCSSET 0x0344 +#define PESDR1_RCSSTS 0x0345 +#define PESDR1_HSSL0SET1 0x0346 +#define PESDR1_HSSL0SET2 0x0347 +#define PESDR1_HSSL0STS 0x0348 +#define PESDR1_HSSL1SET1 0x0349 +#define PESDR1_HSSL1SET2 0x034a +#define PESDR1_HSSL1STS 0x034b +#define PESDR1_HSSL2SET1 0x034c +#define PESDR1_HSSL2SET2 0x034d +#define PESDR1_HSSL2STS 0x034e +#define PESDR1_HSSL3SET1 0x034f +#define PESDR1_HSSL3SET2 0x0350 +#define PESDR1_HSSL3STS 0x0351 +#define PESDR1_HSSCTLSET 0x0352 +#define PESDR1_LANE_ABCD 0x0353 + +#define PESDR2_UTLSET1 0x0370 +#define PESDR2_UTLSET2 0x0371 +#define PESDR2_DLPSET 0x0372 +#define PESDR2_LOOP 0x0373 +#define PESDR2_RCSSET 0x0374 +#define PESDR2_RCSSTS 0x0375 +#define PESDR2_HSSL0SET1 0x0376 +#define PESDR2_HSSL0SET2 0x0377 +#define PESDR2_HSSL0STS 0x0378 +#define PESDR2_HSSL1SET1 0x0379 +#define PESDR2_HSSL1SET2 0x037a +#define PESDR2_HSSL1STS 0x037b +#define PESDR2_HSSL2SET1 0x037c +#define PESDR2_HSSL2SET2 0x037d +#define PESDR2_HSSL2STS 0x037e +#define PESDR2_HSSL3SET1 0x037f +#define PESDR2_HSSL3SET2 0x0380 +#define PESDR2_HSSL3STS 0x0381 +#define PESDR2_HSSCTLSET 0x0382 +#define PESDR2_LANE_ABCD 0x0383 + +/* + * UTL register offsets + */ +#define PEUTL_PBBSZ 0x20 +#define PEUTL_OPDBSZ 0x68 +#define PEUTL_IPHBSZ 0x70 +#define PEUTL_IPDBSZ 0x78 +#define PEUTL_OUTTR 0x90 +#define PEUTL_INTR 0x98 +#define PEUTL_PCTL 0xa0 +#define PEUTL_RCIRQEN 0xb8 + +/* + * Config space register offsets + */ +#define PECFG_BAR0LMPA 0x210 +#define PECFG_BAR0HMPA 0x214 +#define PECFG_PIMEN 0x33c +#define PECFG_PIM0LAL 0x340 +#define PECFG_PIM0LAH 0x344 +#define PECFG_POM0LAL 0x380 +#define PECFG_POM0LAH 0x384 + +int ppc440spe_init_pcie(void); +int ppc440spe_init_pcie_rootport(int port); +void ppc440spe_setup_pcie(struct pci_controller *hose, int port); + +#endif /* __PPC_SYSLIB_PPC440SPE_PCIE_H */ diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c index 40086212b9c..aa4165144ec 100644 --- a/arch/ppc/syslib/ppc4xx_pic.c +++ b/arch/ppc/syslib/ppc4xx_pic.c @@ -25,6 +25,7 @@ #include <asm/system.h> #include <asm/irq.h> #include <asm/ppc4xx_pic.h> +#include <asm/machdep.h> /* See comment in include/arch-ppc/ppc4xx_pic.h * for more info about these two variables @@ -37,6 +38,7 @@ extern unsigned char ppc4xx_uic_ext_irq_cfg[] __attribute__ ((weak)); #define IRQ_MASK_UICx(irq) (1 << (31 - ((irq) & 0x1f))) #define IRQ_MASK_UIC1(irq) IRQ_MASK_UICx(irq) #define IRQ_MASK_UIC2(irq) IRQ_MASK_UICx(irq) +#define IRQ_MASK_UIC3(irq) IRQ_MASK_UICx(irq) #define UIC_HANDLERS(n) \ static void ppc4xx_uic##n##_enable(unsigned int irq) \ @@ -87,7 +89,38 @@ static void ppc4xx_uic##n##_end(unsigned int irq) \ .end = ppc4xx_uic##n##_end, \ } \ -#if NR_UICS == 3 +#if NR_UICS == 4 +#define ACK_UIC0_PARENT +#define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC); +#define ACK_UIC2_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC2NC); +#define ACK_UIC3_PARENT mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC3NC); +UIC_HANDLERS(0); +UIC_HANDLERS(1); +UIC_HANDLERS(2); +UIC_HANDLERS(3); + +static int ppc4xx_pic_get_irq(struct pt_regs *regs) +{ + u32 uic0 = mfdcr(DCRN_UIC_MSR(UIC0)); + if (uic0 & UIC0_UIC1NC) + return 64 - ffs(mfdcr(DCRN_UIC_MSR(UIC1))); + else if (uic0 & UIC0_UIC2NC) + return 96 - ffs(mfdcr(DCRN_UIC_MSR(UIC2))); + else if (uic0 & UIC0_UIC3NC) + return 128 - ffs(mfdcr(DCRN_UIC_MSR(UIC3))); + else + return uic0 ? 32 - ffs(uic0) : -1; +} + +static void __init ppc4xx_pic_impl_init(void) +{ + /* Enable cascade interrupts in UIC0 */ + ppc_cached_irq_mask[0] |= UIC0_UIC1NC | UIC0_UIC2NC | UIC0_UIC3NC; + mtdcr(DCRN_UIC_SR(UIC0), UIC0_UIC1NC | UIC0_UIC2NC | UIC0_UIC3NC); + mtdcr(DCRN_UIC_ER(UIC0), ppc_cached_irq_mask[0]); +} + +#elif NR_UICS == 3 #define ACK_UIC0_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC0NC); #define ACK_UIC1_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC1NC); #define ACK_UIC2_PARENT mtdcr(DCRN_UIC_SR(UICB), UICB_UIC2NC); @@ -169,6 +202,9 @@ static struct ppc4xx_uic_impl { { .decl = DECLARE_UIC(1), .base = UIC1 }, #if NR_UICS > 2 { .decl = DECLARE_UIC(2), .base = UIC2 }, +#if NR_UICS > 3 + { .decl = DECLARE_UIC(3), .base = UIC3 }, +#endif #endif #endif }; diff --git a/arch/ppc/syslib/ppc4xx_setup.c b/arch/ppc/syslib/ppc4xx_setup.c index b843c4fef25..e83a83fd95e 100644 --- a/arch/ppc/syslib/ppc4xx_setup.c +++ b/arch/ppc/syslib/ppc4xx_setup.c @@ -18,7 +18,6 @@ #include <linux/smp.h> #include <linux/threads.h> #include <linux/spinlock.h> -#include <linux/irq.h> #include <linux/reboot.h> #include <linux/param.h> #include <linux/string.h> @@ -279,7 +278,7 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5, #endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */ } -/* Called from MachineCheckException */ +/* Called from machine_check_exception */ void platform_machine_check(struct pt_regs *regs) { #if defined(DCRN_PLB0_BEAR) diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c index 890484e576e..1b5fe9e398d 100644 --- a/arch/ppc/syslib/ppc83xx_setup.c +++ b/arch/ppc/syslib/ppc83xx_setup.c @@ -3,7 +3,7 @@ * * MPC83XX common board code * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor Inc. * @@ -40,6 +40,7 @@ #include <asm/ppc_sys.h> #include <asm/kgdb.h> #include <asm/delay.h> +#include <asm/machdep.h> #include <syslib/ppc83xx_setup.h> #if defined(CONFIG_PCI) diff --git a/arch/ppc/syslib/ppc83xx_setup.h b/arch/ppc/syslib/ppc83xx_setup.h index c766c1a5f78..a122a7322e5 100644 --- a/arch/ppc/syslib/ppc83xx_setup.h +++ b/arch/ppc/syslib/ppc83xx_setup.h @@ -3,7 +3,7 @@ * * MPC83XX common board definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc85xx_common.c b/arch/ppc/syslib/ppc85xx_common.c index da841dacdc1..19ad537225e 100644 --- a/arch/ppc/syslib/ppc85xx_common.c +++ b/arch/ppc/syslib/ppc85xx_common.c @@ -3,7 +3,7 @@ * * MPC85xx support routines * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc85xx_common.h b/arch/ppc/syslib/ppc85xx_common.h index 2c8f304441b..94edf32151d 100644 --- a/arch/ppc/syslib/ppc85xx_common.h +++ b/arch/ppc/syslib/ppc85xx_common.h @@ -3,7 +3,7 @@ * * MPC85xx support routines * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc85xx_rio.c b/arch/ppc/syslib/ppc85xx_rio.c new file mode 100644 index 00000000000..297f3b54917 --- /dev/null +++ b/arch/ppc/syslib/ppc85xx_rio.c @@ -0,0 +1,938 @@ +/* + * MPC85xx RapidIO support + * + * Copyright 2005 MontaVista Software, Inc. + * Matt Porter <mporter@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/config.h> +#include <linux/init.h> +#include <linux/module.h> +#include <linux/types.h> +#include <linux/dma-mapping.h> +#include <linux/interrupt.h> +#include <linux/rio.h> +#include <linux/rio_drv.h> + +#include <asm/io.h> + +#define RIO_REGS_BASE (CCSRBAR + 0xc0000) +#define RIO_ATMU_REGS_OFFSET 0x10c00 +#define RIO_MSG_REGS_OFFSET 0x11000 +#define RIO_MAINT_WIN_SIZE 0x400000 +#define RIO_DBELL_WIN_SIZE 0x1000 + +#define RIO_MSG_OMR_MUI 0x00000002 +#define RIO_MSG_OSR_TE 0x00000080 +#define RIO_MSG_OSR_QOI 0x00000020 +#define RIO_MSG_OSR_QFI 0x00000010 +#define RIO_MSG_OSR_MUB 0x00000004 +#define RIO_MSG_OSR_EOMI 0x00000002 +#define RIO_MSG_OSR_QEI 0x00000001 + +#define RIO_MSG_IMR_MI 0x00000002 +#define RIO_MSG_ISR_TE 0x00000080 +#define RIO_MSG_ISR_QFI 0x00000010 +#define RIO_MSG_ISR_DIQI 0x00000001 + +#define RIO_MSG_DESC_SIZE 32 +#define RIO_MSG_BUFFER_SIZE 4096 +#define RIO_MIN_TX_RING_SIZE 2 +#define RIO_MAX_TX_RING_SIZE 2048 +#define RIO_MIN_RX_RING_SIZE 2 +#define RIO_MAX_RX_RING_SIZE 2048 + +#define DOORBELL_DMR_DI 0x00000002 +#define DOORBELL_DSR_TE 0x00000080 +#define DOORBELL_DSR_QFI 0x00000010 +#define DOORBELL_DSR_DIQI 0x00000001 +#define DOORBELL_TID_OFFSET 0x03 +#define DOORBELL_SID_OFFSET 0x05 +#define DOORBELL_INFO_OFFSET 0x06 + +#define DOORBELL_MESSAGE_SIZE 0x08 +#define DBELL_SID(x) (*(u8 *)(x + DOORBELL_SID_OFFSET)) +#define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET)) +#define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET)) + +#define is_power_of_2(x) (((x) & ((x) - 1)) == 0) + +struct rio_atmu_regs { + u32 rowtar; + u32 pad1; + u32 rowbar; + u32 pad2; + u32 rowar; + u32 pad3[3]; +}; + +struct rio_msg_regs { + u32 omr; + u32 osr; + u32 pad1; + u32 odqdpar; + u32 pad2; + u32 osar; + u32 odpr; + u32 odatr; + u32 odcr; + u32 pad3; + u32 odqepar; + u32 pad4[13]; + u32 imr; + u32 isr; + u32 pad5; + u32 ifqdpar; + u32 pad6; + u32 ifqepar; + u32 pad7[250]; + u32 dmr; + u32 dsr; + u32 pad8; + u32 dqdpar; + u32 pad9; + u32 dqepar; + u32 pad10[26]; + u32 pwmr; + u32 pwsr; + u32 pad11; + u32 pwqbar; +}; + +struct rio_tx_desc { + u32 res1; + u32 saddr; + u32 dport; + u32 dattr; + u32 res2; + u32 res3; + u32 dwcnt; + u32 res4; +}; + +static u32 regs_win; +static struct rio_atmu_regs *atmu_regs; +static struct rio_atmu_regs *maint_atmu_regs; +static struct rio_atmu_regs *dbell_atmu_regs; +static u32 dbell_win; +static u32 maint_win; +static struct rio_msg_regs *msg_regs; + +static struct rio_dbell_ring { + void *virt; + dma_addr_t phys; +} dbell_ring; + +static struct rio_msg_tx_ring { + void *virt; + dma_addr_t phys; + void *virt_buffer[RIO_MAX_TX_RING_SIZE]; + dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE]; + int tx_slot; + int size; + void *dev_id; +} msg_tx_ring; + +static struct rio_msg_rx_ring { + void *virt; + dma_addr_t phys; + void *virt_buffer[RIO_MAX_RX_RING_SIZE]; + int rx_slot; + int size; + void *dev_id; +} msg_rx_ring; + +/** + * mpc85xx_rio_doorbell_send - Send a MPC85xx doorbell message + * @index: ID of RapidIO interface + * @destid: Destination ID of target device + * @data: 16-bit info field of RapidIO doorbell message + * + * Sends a MPC85xx doorbell message. Returns %0 on success or + * %-EINVAL on failure. + */ +static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data) +{ + pr_debug("mpc85xx_doorbell_send: index %d destid %4.4x data %4.4x\n", + index, destid, data); + out_be32((void *)&dbell_atmu_regs->rowtar, destid << 22); + out_be16((void *)(dbell_win), data); + + return 0; +} + +/** + * mpc85xx_local_config_read - Generate a MPC85xx local config space read + * @index: ID of RapdiIO interface + * @offset: Offset into configuration space + * @len: Length (in bytes) of the maintenance transaction + * @data: Value to be read into + * + * Generates a MPC85xx local configuration space read. Returns %0 on + * success or %-EINVAL on failure. + */ +static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data) +{ + pr_debug("mpc85xx_local_config_read: index %d offset %8.8x\n", index, + offset); + *data = in_be32((void *)(regs_win + offset)); + + return 0; +} + +/** + * mpc85xx_local_config_write - Generate a MPC85xx local config space write + * @index: ID of RapdiIO interface + * @offset: Offset into configuration space + * @len: Length (in bytes) of the maintenance transaction + * @data: Value to be written + * + * Generates a MPC85xx local configuration space write. Returns %0 on + * success or %-EINVAL on failure. + */ +static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data) +{ + pr_debug + ("mpc85xx_local_config_write: index %d offset %8.8x data %8.8x\n", + index, offset, data); + out_be32((void *)(regs_win + offset), data); + + return 0; +} + +/** + * mpc85xx_rio_config_read - Generate a MPC85xx read maintenance transaction + * @index: ID of RapdiIO interface + * @destid: Destination ID of transaction + * @hopcount: Number of hops to target device + * @offset: Offset into configuration space + * @len: Length (in bytes) of the maintenance transaction + * @val: Location to be read into + * + * Generates a MPC85xx read maintenance transaction. Returns %0 on + * success or %-EINVAL on failure. + */ +static int +mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len, + u32 * val) +{ + u8 *data; + + pr_debug + ("mpc85xx_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n", + index, destid, hopcount, offset, len); + out_be32((void *)&maint_atmu_regs->rowtar, + (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); + + data = (u8 *) maint_win + offset; + switch (len) { + case 1: + *val = in_8((u8 *) data); + break; + case 2: + *val = in_be16((u16 *) data); + break; + default: + *val = in_be32((u32 *) data); + break; + } + + return 0; +} + +/** + * mpc85xx_rio_config_write - Generate a MPC85xx write maintenance transaction + * @index: ID of RapdiIO interface + * @destid: Destination ID of transaction + * @hopcount: Number of hops to target device + * @offset: Offset into configuration space + * @len: Length (in bytes) of the maintenance transaction + * @val: Value to be written + * + * Generates an MPC85xx write maintenance transaction. Returns %0 on + * success or %-EINVAL on failure. + */ +static int +mpc85xx_rio_config_write(int index, u16 destid, u8 hopcount, u32 offset, + int len, u32 val) +{ + u8 *data; + pr_debug + ("mpc85xx_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n", + index, destid, hopcount, offset, len, val); + out_be32((void *)&maint_atmu_regs->rowtar, + (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9)); + + data = (u8 *) maint_win + offset; + switch (len) { + case 1: + out_8((u8 *) data, val); + break; + case 2: + out_be16((u16 *) data, val); + break; + default: + out_be32((u32 *) data, val); + break; + } + + return 0; +} + +/** + * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue + * @mport: Master port with outbound message queue + * @rdev: Target of outbound message + * @mbox: Outbound mailbox + * @buffer: Message to add to outbound queue + * @len: Length of message + * + * Adds the @buffer message to the MPC85xx outbound message queue. Returns + * %0 on success or %-EINVAL on failure. + */ +int +rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox, + void *buffer, size_t len) +{ + u32 omr; + struct rio_tx_desc *desc = + (struct rio_tx_desc *)msg_tx_ring.virt + msg_tx_ring.tx_slot; + int ret = 0; + + pr_debug + ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n", + rdev->destid, mbox, (int)buffer, len); + + if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) { + ret = -EINVAL; + goto out; + } + + /* Copy and clear rest of buffer */ + memcpy(msg_tx_ring.virt_buffer[msg_tx_ring.tx_slot], buffer, len); + if (len < (RIO_MAX_MSG_SIZE - 4)) + memset((void *)((u32) msg_tx_ring. + virt_buffer[msg_tx_ring.tx_slot] + len), 0, + RIO_MAX_MSG_SIZE - len); + + /* Set mbox field for message */ + desc->dport = mbox & 0x3; + + /* Enable EOMI interrupt, set priority, and set destid */ + desc->dattr = 0x28000000 | (rdev->destid << 2); + + /* Set transfer size aligned to next power of 2 (in double words) */ + desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len); + + /* Set snooping and source buffer address */ + desc->saddr = 0x00000004 | msg_tx_ring.phys_buffer[msg_tx_ring.tx_slot]; + + /* Increment enqueue pointer */ + omr = in_be32((void *)&msg_regs->omr); + out_be32((void *)&msg_regs->omr, omr | RIO_MSG_OMR_MUI); + + /* Go to next descriptor */ + if (++msg_tx_ring.tx_slot == msg_tx_ring.size) + msg_tx_ring.tx_slot = 0; + + out: + return ret; +} + +EXPORT_SYMBOL_GPL(rio_hw_add_outb_message); + +/** + * mpc85xx_rio_tx_handler - MPC85xx outbound message interrupt handler + * @irq: Linux interrupt number + * @dev_instance: Pointer to interrupt-specific data + * @regs: Register context + * + * Handles outbound message interrupts. Executes a register outbound + * mailbox event handler and acks the interrupt occurence. + */ +static irqreturn_t +mpc85xx_rio_tx_handler(int irq, void *dev_instance, struct pt_regs *regs) +{ + int osr; + struct rio_mport *port = (struct rio_mport *)dev_instance; + + osr = in_be32((void *)&msg_regs->osr); + + if (osr & RIO_MSG_OSR_TE) { + pr_info("RIO: outbound message transmission error\n"); + out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_TE); + goto out; + } + + if (osr & RIO_MSG_OSR_QOI) { + pr_info("RIO: outbound message queue overflow\n"); + out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_QOI); + goto out; + } + + if (osr & RIO_MSG_OSR_EOMI) { + u32 dqp = in_be32((void *)&msg_regs->odqdpar); + int slot = (dqp - msg_tx_ring.phys) >> 5; + port->outb_msg[0].mcback(port, msg_tx_ring.dev_id, -1, slot); + + /* Ack the end-of-message interrupt */ + out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_EOMI); + } + + out: + return IRQ_HANDLED; +} + +/** + * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox + * @mport: Master port implementing the outbound message unit + * @dev_id: Device specific pointer to pass on event + * @mbox: Mailbox to open + * @entries: Number of entries in the outbound mailbox ring + * + * Initializes buffer ring, request the outbound message interrupt, + * and enables the outbound message unit. Returns %0 on success and + * %-EINVAL or %-ENOMEM on failure. + */ +int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) +{ + int i, j, rc = 0; + + if ((entries < RIO_MIN_TX_RING_SIZE) || + (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) { + rc = -EINVAL; + goto out; + } + + /* Initialize shadow copy ring */ + msg_tx_ring.dev_id = dev_id; + msg_tx_ring.size = entries; + + for (i = 0; i < msg_tx_ring.size; i++) { + if (! + (msg_tx_ring.virt_buffer[i] = + dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE, + &msg_tx_ring.phys_buffer[i], + GFP_KERNEL))) { + rc = -ENOMEM; + for (j = 0; j < msg_tx_ring.size; j++) + if (msg_tx_ring.virt_buffer[j]) + dma_free_coherent(NULL, + RIO_MSG_BUFFER_SIZE, + msg_tx_ring. + virt_buffer[j], + msg_tx_ring. + phys_buffer[j]); + goto out; + } + } + + /* Initialize outbound message descriptor ring */ + if (!(msg_tx_ring.virt = dma_alloc_coherent(NULL, + msg_tx_ring.size * + RIO_MSG_DESC_SIZE, + &msg_tx_ring.phys, + GFP_KERNEL))) { + rc = -ENOMEM; + goto out_dma; + } + memset(msg_tx_ring.virt, 0, msg_tx_ring.size * RIO_MSG_DESC_SIZE); + msg_tx_ring.tx_slot = 0; + + /* Point dequeue/enqueue pointers at first entry in ring */ + out_be32((void *)&msg_regs->odqdpar, msg_tx_ring.phys); + out_be32((void *)&msg_regs->odqepar, msg_tx_ring.phys); + + /* Configure for snooping */ + out_be32((void *)&msg_regs->osar, 0x00000004); + + /* Clear interrupt status */ + out_be32((void *)&msg_regs->osr, 0x000000b3); + + /* Hook up outbound message handler */ + if ((rc = + request_irq(MPC85xx_IRQ_RIO_TX, mpc85xx_rio_tx_handler, 0, + "msg_tx", (void *)mport)) < 0) + goto out_irq; + + /* + * Configure outbound message unit + * Snooping + * Interrupts (all enabled, except QEIE) + * Chaining mode + * Disable + */ + out_be32((void *)&msg_regs->omr, 0x00100220); + + /* Set number of entries */ + out_be32((void *)&msg_regs->omr, + in_be32((void *)&msg_regs->omr) | + ((get_bitmask_order(entries) - 2) << 12)); + + /* Now enable the unit */ + out_be32((void *)&msg_regs->omr, in_be32((void *)&msg_regs->omr) | 0x1); + + out: + return rc; + + out_irq: + dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE, + msg_tx_ring.virt, msg_tx_ring.phys); + + out_dma: + for (i = 0; i < msg_tx_ring.size; i++) + dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE, + msg_tx_ring.virt_buffer[i], + msg_tx_ring.phys_buffer[i]); + + return rc; +} + +/** + * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox + * @mport: Master port implementing the outbound message unit + * @mbox: Mailbox to close + * + * Disables the outbound message unit, free all buffers, and + * frees the outbound message interrupt. + */ +void rio_close_outb_mbox(struct rio_mport *mport, int mbox) +{ + /* Disable inbound message unit */ + out_be32((void *)&msg_regs->omr, 0); + + /* Free ring */ + dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE, + msg_tx_ring.virt, msg_tx_ring.phys); + + /* Free interrupt */ + free_irq(MPC85xx_IRQ_RIO_TX, (void *)mport); +} + +/** + * mpc85xx_rio_rx_handler - MPC85xx inbound message interrupt handler + * @irq: Linux interrupt number + * @dev_instance: Pointer to interrupt-specific data + * @regs: Register context + * + * Handles inbound message interrupts. Executes a registered inbound + * mailbox event handler and acks the interrupt occurence. + */ +static irqreturn_t +mpc85xx_rio_rx_handler(int irq, void *dev_instance, struct pt_regs *regs) +{ + int isr; + struct rio_mport *port = (struct rio_mport *)dev_instance; + + isr = in_be32((void *)&msg_regs->isr); + + if (isr & RIO_MSG_ISR_TE) { + pr_info("RIO: inbound message reception error\n"); + out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_TE); + goto out; + } + + /* XXX Need to check/dispatch until queue empty */ + if (isr & RIO_MSG_ISR_DIQI) { + /* + * We implement *only* mailbox 0, but can receive messages + * for any mailbox/letter to that mailbox destination. So, + * make the callback with an unknown/invalid mailbox number + * argument. + */ + port->inb_msg[0].mcback(port, msg_rx_ring.dev_id, -1, -1); + + /* Ack the queueing interrupt */ + out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_DIQI); + } + + out: + return IRQ_HANDLED; +} + +/** + * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox + * @mport: Master port implementing the inbound message unit + * @dev_id: Device specific pointer to pass on event + * @mbox: Mailbox to open + * @entries: Number of entries in the inbound mailbox ring + * + * Initializes buffer ring, request the inbound message interrupt, + * and enables the inbound message unit. Returns %0 on success + * and %-EINVAL or %-ENOMEM on failure. + */ +int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries) +{ + int i, rc = 0; + + if ((entries < RIO_MIN_RX_RING_SIZE) || + (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) { + rc = -EINVAL; + goto out; + } + + /* Initialize client buffer ring */ + msg_rx_ring.dev_id = dev_id; + msg_rx_ring.size = entries; + msg_rx_ring.rx_slot = 0; + for (i = 0; i < msg_rx_ring.size; i++) + msg_rx_ring.virt_buffer[i] = NULL; + + /* Initialize inbound message ring */ + if (!(msg_rx_ring.virt = dma_alloc_coherent(NULL, + msg_rx_ring.size * + RIO_MAX_MSG_SIZE, + &msg_rx_ring.phys, + GFP_KERNEL))) { + rc = -ENOMEM; + goto out; + } + + /* Point dequeue/enqueue pointers at first entry in ring */ + out_be32((void *)&msg_regs->ifqdpar, (u32) msg_rx_ring.phys); + out_be32((void *)&msg_regs->ifqepar, (u32) msg_rx_ring.phys); + + /* Clear interrupt status */ + out_be32((void *)&msg_regs->isr, 0x00000091); + + /* Hook up inbound message handler */ + if ((rc = + request_irq(MPC85xx_IRQ_RIO_RX, mpc85xx_rio_rx_handler, 0, + "msg_rx", (void *)mport)) < 0) { + dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE, + msg_tx_ring.virt_buffer[i], + msg_tx_ring.phys_buffer[i]); + goto out; + } + + /* + * Configure inbound message unit: + * Snooping + * 4KB max message size + * Unmask all interrupt sources + * Disable + */ + out_be32((void *)&msg_regs->imr, 0x001b0060); + + /* Set number of queue entries */ + out_be32((void *)&msg_regs->imr, + in_be32((void *)&msg_regs->imr) | + ((get_bitmask_order(entries) - 2) << 12)); + + /* Now enable the unit */ + out_be32((void *)&msg_regs->imr, in_be32((void *)&msg_regs->imr) | 0x1); + + out: + return rc; +} + +/** + * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox + * @mport: Master port implementing the inbound message unit + * @mbox: Mailbox to close + * + * Disables the inbound message unit, free all buffers, and + * frees the inbound message interrupt. + */ +void rio_close_inb_mbox(struct rio_mport *mport, int mbox) +{ + /* Disable inbound message unit */ + out_be32((void *)&msg_regs->imr, 0); + + /* Free ring */ + dma_free_coherent(NULL, msg_rx_ring.size * RIO_MAX_MSG_SIZE, + msg_rx_ring.virt, msg_rx_ring.phys); + + /* Free interrupt */ + free_irq(MPC85xx_IRQ_RIO_RX, (void *)mport); +} + +/** + * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue + * @mport: Master port implementing the inbound message unit + * @mbox: Inbound mailbox number + * @buf: Buffer to add to inbound queue + * + * Adds the @buf buffer to the MPC85xx inbound message queue. Returns + * %0 on success or %-EINVAL on failure. + */ +int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf) +{ + int rc = 0; + + pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n", + msg_rx_ring.rx_slot); + + if (msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot]) { + printk(KERN_ERR + "RIO: error adding inbound buffer %d, buffer exists\n", + msg_rx_ring.rx_slot); + rc = -EINVAL; + goto out; + } + + msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot] = buf; + if (++msg_rx_ring.rx_slot == msg_rx_ring.size) + msg_rx_ring.rx_slot = 0; + + out: + return rc; +} + +EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer); + +/** + * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit + * @mport: Master port implementing the inbound message unit + * @mbox: Inbound mailbox number + * + * Gets the next available inbound message from the inbound message queue. + * A pointer to the message is returned on success or NULL on failure. + */ +void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox) +{ + u32 imr; + u32 phys_buf, virt_buf; + void *buf = NULL; + int buf_idx; + + phys_buf = in_be32((void *)&msg_regs->ifqdpar); + + /* If no more messages, then bail out */ + if (phys_buf == in_be32((void *)&msg_regs->ifqepar)) + goto out2; + + virt_buf = (u32) msg_rx_ring.virt + (phys_buf - msg_rx_ring.phys); + buf_idx = (phys_buf - msg_rx_ring.phys) / RIO_MAX_MSG_SIZE; + buf = msg_rx_ring.virt_buffer[buf_idx]; + + if (!buf) { + printk(KERN_ERR + "RIO: inbound message copy failed, no buffers\n"); + goto out1; + } + + /* Copy max message size, caller is expected to allocate that big */ + memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE); + + /* Clear the available buffer */ + msg_rx_ring.virt_buffer[buf_idx] = NULL; + + out1: + imr = in_be32((void *)&msg_regs->imr); + out_be32((void *)&msg_regs->imr, imr | RIO_MSG_IMR_MI); + + out2: + return buf; +} + +EXPORT_SYMBOL_GPL(rio_hw_get_inb_message); + +/** + * mpc85xx_rio_dbell_handler - MPC85xx doorbell interrupt handler + * @irq: Linux interrupt number + * @dev_instance: Pointer to interrupt-specific data + * @regs: Register context + * + * Handles doorbell interrupts. Parses a list of registered + * doorbell event handlers and executes a matching event handler. + */ +static irqreturn_t +mpc85xx_rio_dbell_handler(int irq, void *dev_instance, struct pt_regs *regs) +{ + int dsr; + struct rio_mport *port = (struct rio_mport *)dev_instance; + + dsr = in_be32((void *)&msg_regs->dsr); + + if (dsr & DOORBELL_DSR_TE) { + pr_info("RIO: doorbell reception error\n"); + out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_TE); + goto out; + } + + if (dsr & DOORBELL_DSR_QFI) { + pr_info("RIO: doorbell queue full\n"); + out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_QFI); + goto out; + } + + /* XXX Need to check/dispatch until queue empty */ + if (dsr & DOORBELL_DSR_DIQI) { + u32 dmsg = + (u32) dbell_ring.virt + + (in_be32((void *)&msg_regs->dqdpar) & 0xfff); + u32 dmr; + struct rio_dbell *dbell; + int found = 0; + + pr_debug + ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n", + DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg)); + + list_for_each_entry(dbell, &port->dbells, node) { + if ((dbell->res->start <= DBELL_INF(dmsg)) && + (dbell->res->end >= DBELL_INF(dmsg))) { + found = 1; + break; + } + } + if (found) { + dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg), + DBELL_INF(dmsg)); + } else { + pr_debug + ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n", + DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg)); + } + dmr = in_be32((void *)&msg_regs->dmr); + out_be32((void *)&msg_regs->dmr, dmr | DOORBELL_DMR_DI); + out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_DIQI); + } + + out: + return IRQ_HANDLED; +} + +/** + * mpc85xx_rio_doorbell_init - MPC85xx doorbell interface init + * @mport: Master port implementing the inbound doorbell unit + * + * Initializes doorbell unit hardware and inbound DMA buffer + * ring. Called from mpc85xx_rio_setup(). Returns %0 on success + * or %-ENOMEM on failure. + */ +static int mpc85xx_rio_doorbell_init(struct rio_mport *mport) +{ + int rc = 0; + + /* Map outbound doorbell window immediately after maintenance window */ + if (!(dbell_win = + (u32) ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE, + RIO_DBELL_WIN_SIZE))) { + printk(KERN_ERR + "RIO: unable to map outbound doorbell window\n"); + rc = -ENOMEM; + goto out; + } + + /* Initialize inbound doorbells */ + if (!(dbell_ring.virt = dma_alloc_coherent(NULL, + 512 * DOORBELL_MESSAGE_SIZE, + &dbell_ring.phys, + GFP_KERNEL))) { + printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n"); + rc = -ENOMEM; + iounmap((void *)dbell_win); + goto out; + } + + /* Point dequeue/enqueue pointers at first entry in ring */ + out_be32((void *)&msg_regs->dqdpar, (u32) dbell_ring.phys); + out_be32((void *)&msg_regs->dqepar, (u32) dbell_ring.phys); + + /* Clear interrupt status */ + out_be32((void *)&msg_regs->dsr, 0x00000091); + + /* Hook up doorbell handler */ + if ((rc = + request_irq(MPC85xx_IRQ_RIO_BELL, mpc85xx_rio_dbell_handler, 0, + "dbell_rx", (void *)mport) < 0)) { + iounmap((void *)dbell_win); + dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE, + dbell_ring.virt, dbell_ring.phys); + printk(KERN_ERR + "MPC85xx RIO: unable to request inbound doorbell irq"); + goto out; + } + + /* Configure doorbells for snooping, 512 entries, and enable */ + out_be32((void *)&msg_regs->dmr, 0x00108161); + + out: + return rc; +} + +static char *cmdline = NULL; + +static int mpc85xx_rio_get_hdid(int index) +{ + /* XXX Need to parse multiple entries in some format */ + if (!cmdline) + return -1; + + return simple_strtol(cmdline, NULL, 0); +} + +static int mpc85xx_rio_get_cmdline(char *s) +{ + if (!s) + return 0; + + cmdline = s; + return 1; +} + +__setup("riohdid=", mpc85xx_rio_get_cmdline); + +/** + * mpc85xx_rio_setup - Setup MPC85xx RapidIO interface + * @law_start: Starting physical address of RapidIO LAW + * @law_size: Size of RapidIO LAW + * + * Initializes MPC85xx RapidIO hardware interface, configures + * master port with system-specific info, and registers the + * master port with the RapidIO subsystem. + */ +void mpc85xx_rio_setup(int law_start, int law_size) +{ + struct rio_ops *ops; + struct rio_mport *port; + + ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL); + ops->lcread = mpc85xx_local_config_read; + ops->lcwrite = mpc85xx_local_config_write; + ops->cread = mpc85xx_rio_config_read; + ops->cwrite = mpc85xx_rio_config_write; + ops->dsend = mpc85xx_rio_doorbell_send; + + port = kmalloc(sizeof(struct rio_mport), GFP_KERNEL); + port->id = 0; + port->index = 0; + INIT_LIST_HEAD(&port->dbells); + port->iores.start = law_start; + port->iores.end = law_start + law_size; + port->iores.flags = IORESOURCE_MEM; + + rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff); + rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0); + rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0); + strcpy(port->name, "RIO0 mport"); + + port->ops = ops; + port->host_deviceid = mpc85xx_rio_get_hdid(port->id); + + rio_register_mport(port); + + regs_win = (u32) ioremap(RIO_REGS_BASE, 0x20000); + atmu_regs = (struct rio_atmu_regs *)(regs_win + RIO_ATMU_REGS_OFFSET); + maint_atmu_regs = atmu_regs + 1; + dbell_atmu_regs = atmu_regs + 2; + msg_regs = (struct rio_msg_regs *)(regs_win + RIO_MSG_REGS_OFFSET); + + /* Configure maintenance transaction window */ + out_be32((void *)&maint_atmu_regs->rowbar, 0x000c0000); + out_be32((void *)&maint_atmu_regs->rowar, 0x80077015); + + maint_win = (u32) ioremap(law_start, RIO_MAINT_WIN_SIZE); + + /* Configure outbound doorbell window */ + out_be32((void *)&dbell_atmu_regs->rowbar, 0x000c0400); + out_be32((void *)&dbell_atmu_regs->rowar, 0x8004200b); + mpc85xx_rio_doorbell_init(port); +} diff --git a/arch/ppc/syslib/ppc85xx_rio.h b/arch/ppc/syslib/ppc85xx_rio.h new file mode 100644 index 00000000000..c0827a2c3ee --- /dev/null +++ b/arch/ppc/syslib/ppc85xx_rio.h @@ -0,0 +1,21 @@ +/* + * MPC85xx RapidIO definitions + * + * Copyright 2005 MontaVista Software, Inc. + * Matt Porter <mporter@kernel.crashing.org> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __PPC_SYSLIB_PPC85XX_RIO_H +#define __PPC_SYSLIB_PPC85XX_RIO_H + +#include <linux/config.h> +#include <linux/init.h> + +extern void mpc85xx_rio_setup(int law_start, int law_size); + +#endif /* __PPC_SYSLIB_PPC85XX_RIO_H */ diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c index b7242f1bd93..1a47ff4b831 100644 --- a/arch/ppc/syslib/ppc85xx_setup.c +++ b/arch/ppc/syslib/ppc85xx_setup.c @@ -3,7 +3,7 @@ * * MPC85XX common board code * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * @@ -29,6 +29,7 @@ #include <asm/mmu.h> #include <asm/ppc_sys.h> #include <asm/kgdb.h> +#include <asm/machdep.h> #include <syslib/ppc85xx_setup.h> @@ -184,8 +185,8 @@ mpc85xx_setup_pci1(struct pci_controller *hose) pci->powar1 = 0x80044000 | (__ilog2(MPC85XX_PCI1_UPPER_MEM - MPC85XX_PCI1_LOWER_MEM + 1) - 1); - /* Setup outboud IO windows @ MPC85XX_PCI1_IO_BASE */ - pci->potar2 = 0x00000000; + /* Setup outbound IO windows @ MPC85XX_PCI1_IO_BASE */ + pci->potar2 = (MPC85XX_PCI1_LOWER_IO >> 12) & 0x000fffff; pci->potear2 = 0x00000000; pci->powbar2 = (MPC85XX_PCI1_IO_BASE >> 12) & 0x000fffff; /* Enable, IO R/W */ @@ -235,8 +236,8 @@ mpc85xx_setup_pci2(struct pci_controller *hose) pci->powar1 = 0x80044000 | (__ilog2(MPC85XX_PCI2_UPPER_MEM - MPC85XX_PCI2_LOWER_MEM + 1) - 1); - /* Setup outboud IO windows @ MPC85XX_PCI2_IO_BASE */ - pci->potar2 = 0x00000000; + /* Setup outbound IO windows @ MPC85XX_PCI2_IO_BASE */ + pci->potar2 = (MPC85XX_PCI2_LOWER_IO >> 12) & 0x000fffff;; pci->potear2 = 0x00000000; pci->powbar2 = (MPC85XX_PCI2_IO_BASE >> 12) & 0x000fffff; /* Enable, IO R/W */ diff --git a/arch/ppc/syslib/ppc85xx_setup.h b/arch/ppc/syslib/ppc85xx_setup.h index 6e6cfe162fa..e340b0545fb 100644 --- a/arch/ppc/syslib/ppc85xx_setup.h +++ b/arch/ppc/syslib/ppc85xx_setup.h @@ -3,7 +3,7 @@ * * MPC85XX common board definitions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2004 Freescale Semiconductor Inc. * diff --git a/arch/ppc/syslib/ppc8xx_pic.c b/arch/ppc/syslib/ppc8xx_pic.c index d3b01c6c97d..3e6f51a61d4 100644 --- a/arch/ppc/syslib/ppc8xx_pic.c +++ b/arch/ppc/syslib/ppc8xx_pic.c @@ -6,6 +6,7 @@ #include <linux/signal.h> #include <linux/interrupt.h> #include <asm/irq.h> +#include <asm/io.h> #include <asm/8xx_immap.h> #include <asm/mpc8xx.h> #include "ppc8xx_pic.h" @@ -29,8 +30,7 @@ static void m8xx_mask_irq(unsigned int irq_nr) word = irq_nr >> 5; ppc_cached_irq_mask[word] &= ~(1 << (31-bit)); - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = - ppc_cached_irq_mask[word]; + out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]); } static void m8xx_unmask_irq(unsigned int irq_nr) @@ -41,8 +41,7 @@ static void m8xx_unmask_irq(unsigned int irq_nr) word = irq_nr >> 5; ppc_cached_irq_mask[word] |= (1 << (31-bit)); - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = - ppc_cached_irq_mask[word]; + out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]); } static void m8xx_end_irq(unsigned int irq_nr) @@ -55,8 +54,7 @@ static void m8xx_end_irq(unsigned int irq_nr) word = irq_nr >> 5; ppc_cached_irq_mask[word] |= (1 << (31-bit)); - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = - ppc_cached_irq_mask[word]; + out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]); } } @@ -69,9 +67,8 @@ static void m8xx_mask_and_ack(unsigned int irq_nr) word = irq_nr >> 5; ppc_cached_irq_mask[word] &= ~(1 << (31-bit)); - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = - ppc_cached_irq_mask[word]; - ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 1 << (31-bit); + out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]); + out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend, 1 << (31-bit)); } struct hw_interrupt_type ppc8xx_pic = { @@ -93,7 +90,7 @@ m8xx_get_irq(struct pt_regs *regs) /* For MPC8xx, read the SIVEC register and shift the bits down * to get the irq number. */ - irq = ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26; + irq = in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec) >> 26; /* * When we read the sivec without an interrupt to process, we will diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c index 52ba0c68078..c0b93c4191e 100644 --- a/arch/ppc/syslib/ppc_sys.c +++ b/arch/ppc/syslib/ppc_sys.c @@ -3,7 +3,7 @@ * * PPC System library functions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * Copyright 2005 Freescale Semiconductor Inc. * Copyright 2005 MontaVista, Inc. by Vitaly Bordug <vbordug@ru.mvista.com> @@ -14,6 +14,7 @@ * option) any later version. */ +#include <linux/string.h> #include <asm/ppc_sys.h> int (*ppc_sys_device_fixup) (struct platform_device * pdev); @@ -69,6 +70,9 @@ static int __init find_chip_by_name_and_id(char *name, u32 id) matched[j++] = i; i++; } + + ret = i; + if (j != 0) { for (i = 0; i < j; i++) { if ((ppc_sys_specs[matched[i]].mask & id) == diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c index 1d3869768f9..6ff3aab82fc 100644 --- a/arch/ppc/syslib/pq2_devices.c +++ b/arch/ppc/syslib/pq2_devices.c @@ -3,7 +3,7 @@ * * PQ2 Device descriptions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any @@ -13,11 +13,12 @@ #include <linux/init.h> #include <linux/module.h> -#include <linux/device.h> +#include <linux/platform_device.h> #include <linux/ioport.h> #include <asm/cpm2.h> #include <asm/irq.h> #include <asm/ppc_sys.h> +#include <asm/machdep.h> struct platform_device ppc_sys_platform_devices[] = { [MPC82xx_CPM_FCC1] = { diff --git a/arch/ppc/syslib/pq2_sys.c b/arch/ppc/syslib/pq2_sys.c index 7b6c9ebdb9e..36d6e217994 100644 --- a/arch/ppc/syslib/pq2_sys.c +++ b/arch/ppc/syslib/pq2_sys.c @@ -3,7 +3,7 @@ * * PQ2 System descriptions * - * Maintainer: Kumar Gala <kumar.gala@freescale.com> + * Maintainer: Kumar Gala <galak@kernel.crashing.org> * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any diff --git a/arch/ppc/syslib/prep_nvram.c b/arch/ppc/syslib/prep_nvram.c index 8599850ca77..2c6364d9641 100644 --- a/arch/ppc/syslib/prep_nvram.c +++ b/arch/ppc/syslib/prep_nvram.c @@ -22,14 +22,14 @@ static char nvramData[MAX_PREP_NVRAM]; static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0]; -unsigned char __prep prep_nvram_read_val(int addr) +unsigned char prep_nvram_read_val(int addr) { outb(addr, PREP_NVRAM_AS0); outb(addr>>8, PREP_NVRAM_AS1); return inb(PREP_NVRAM_DATA); } -void __prep prep_nvram_write_val(int addr, +void prep_nvram_write_val(int addr, unsigned char val) { outb(addr, PREP_NVRAM_AS0); @@ -81,8 +81,7 @@ void __init init_prep_nvram(void) } } -__prep -char __prep *prep_nvram_get_var(const char *name) +char *prep_nvram_get_var(const char *name) { char *cp; int namelen; @@ -101,8 +100,7 @@ char __prep *prep_nvram_get_var(const char *name) return NULL; } -__prep -char __prep *prep_nvram_first_var(void) +char *prep_nvram_first_var(void) { if (nvram->Header.GELength == 0) { return NULL; @@ -112,8 +110,7 @@ char __prep *prep_nvram_first_var(void) } } -__prep -char __prep *prep_nvram_next_var(char *name) +char *prep_nvram_next_var(char *name) { char *cp; diff --git a/arch/ppc/syslib/prom.c b/arch/ppc/syslib/prom.c index 2c64ed62747..af4deace49e 100644 --- a/arch/ppc/syslib/prom.c +++ b/arch/ppc/syslib/prom.c @@ -13,7 +13,6 @@ #include <linux/kernel.h> #include <linux/string.h> #include <linux/init.h> -#include <linux/version.h> #include <linux/threads.h> #include <linux/spinlock.h> #include <linux/ioport.h> @@ -89,7 +88,7 @@ extern char cmd_line[512]; /* XXX */ extern boot_infos_t *boot_infos; unsigned long dev_tree_size; -void __openfirmware +void phys_call_rtas(int service, int nargs, int nret, ...) { va_list list; @@ -862,7 +861,7 @@ find_type_devices(const char *type) /* * Returns all nodes linked together */ -struct device_node * __openfirmware +struct device_node * find_all_nodes(void) { struct device_node *head, **prevp, *np; @@ -1165,7 +1164,7 @@ get_property(struct device_node *np, const char *name, int *lenp) /* * Add a property to a node */ -void __openfirmware +int prom_add_property(struct device_node* np, struct property* prop) { struct property **next = &np->properties; @@ -1174,10 +1173,12 @@ prom_add_property(struct device_node* np, struct property* prop) while (*next) next = &(*next)->next; *next = prop; + + return 0; } /* I quickly hacked that one, check against spec ! */ -static inline unsigned long __openfirmware +static inline unsigned long bus_space_to_resource_flags(unsigned int bus_space) { u8 space = (bus_space >> 24) & 0xf; @@ -1194,7 +1195,7 @@ bus_space_to_resource_flags(unsigned int bus_space) } } -static struct resource* __openfirmware +static struct resource* find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range) { unsigned long mask; @@ -1224,7 +1225,7 @@ find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range) * or other nodes attached to the root node. Ultimately, put some * link to resources in the OF node. */ -struct resource* __openfirmware +struct resource* request_OF_resource(struct device_node* node, int index, const char* name_postfix) { struct pci_dev* pcidev; @@ -1280,7 +1281,7 @@ fail: return NULL; } -int __openfirmware +int release_OF_resource(struct device_node* node, int index) { struct pci_dev* pcidev; @@ -1335,10 +1336,8 @@ release_OF_resource(struct device_node* node, int index) if (!res) return -ENODEV; - if (res->name) { - kfree(res->name); - res->name = NULL; - } + kfree(res->name); + res->name = NULL; release_resource(res); kfree(res); @@ -1346,7 +1345,7 @@ release_OF_resource(struct device_node* node, int index) } #if 0 -void __openfirmware +void print_properties(struct device_node *np) { struct property *pp; @@ -1400,7 +1399,7 @@ print_properties(struct device_node *np) static DEFINE_SPINLOCK(rtas_lock); /* this can be called after setup -- Cort */ -int __openfirmware +int call_rtas(const char *service, int nargs, int nret, unsigned long *outputs, ...) { diff --git a/arch/ppc/syslib/prom_init.c b/arch/ppc/syslib/prom_init.c index 7f15136830f..df14422ae1c 100644 --- a/arch/ppc/syslib/prom_init.c +++ b/arch/ppc/syslib/prom_init.c @@ -9,7 +9,6 @@ #include <linux/kernel.h> #include <linux/string.h> #include <linux/init.h> -#include <linux/version.h> #include <linux/threads.h> #include <linux/spinlock.h> #include <linux/ioport.h> diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c index 2cbcad278ce..47f04c71fe9 100644 --- a/arch/ppc/syslib/xilinx_pic.c +++ b/arch/ppc/syslib/xilinx_pic.c @@ -17,6 +17,7 @@ #include <asm/io.h> #include <asm/xparameters.h> #include <asm/ibm4xx.h> +#include <asm/machdep.h> /* No one else should require these constants, so define them locally here. */ #define ISR 0 /* Interrupt Status Register */ diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c index 507d4eeffe0..c80177f8ec0 100644 --- a/arch/ppc/xmon/start.c +++ b/arch/ppc/xmon/start.c @@ -184,7 +184,9 @@ xmon_map_scc(void) sccc = base + (addr & ~PAGE_MASK); sccd = sccc + 0x10; - } else { + } +#ifdef CONFIG_PPC_CHRP + else { base = (volatile unsigned char *) isa_io_base; if (_machine == _MACH_chrp) base = (volatile unsigned char *) @@ -200,6 +202,7 @@ xmon_map_scc(void) RXRDY = 1; DLAB = 0x80; } +#endif /* CONFIG_PPC_CHRP */ #elif defined(CONFIG_GEMINI) /* should already be mapped by the kernel boot */ sccc = (volatile unsigned char *) 0xffeffb0d; @@ -478,8 +481,9 @@ void *xmon_stdout; void *xmon_stderr; void -xmon_init(void) +xmon_init(int arg) { + xmon_map_scc(); } int diff --git a/arch/ppc/xmon/xmon.c b/arch/ppc/xmon/xmon.c index be7869e3946..2b483b4f160 100644 --- a/arch/ppc/xmon/xmon.c +++ b/arch/ppc/xmon/xmon.c @@ -148,9 +148,14 @@ Commands:\n\ r print registers\n\ S print special registers\n\ t print backtrace\n\ - la lookup address in system.map\n\ - ls lookup symbol in system.map\n\ + la lookup address\n\ + ls lookup symbol\n\ + C checksum\n\ + p call function with arguments\n\ + T print time\n\ x exit monitor\n\ + zr reboot\n\ + zh halt\n\ "; static int xmon_trace[NR_CPUS]; @@ -215,8 +220,7 @@ static void get_tb(unsigned *p) p[1] = lo; } -void -xmon(struct pt_regs *excp) +int xmon(struct pt_regs *excp) { struct pt_regs regs; int msr, cmd; @@ -285,6 +289,8 @@ xmon(struct pt_regs *excp) #endif /* CONFIG_SMP */ set_msr(msr); /* restore interrupt enable */ get_tb(start_tb[smp_processor_id()]); + + return cmd != 'X'; } irqreturn_t |