diff options
Diffstat (limited to 'arch/sh/boards')
| -rw-r--r-- | arch/sh/boards/Kconfig | 18 | ||||
| -rw-r--r-- | arch/sh/boards/Makefile | 2 | ||||
| -rw-r--r-- | arch/sh/boards/board-sh2007.c | 133 | ||||
| -rw-r--r-- | arch/sh/boards/board-sh7757lcr.c | 374 | ||||
| -rw-r--r-- | arch/sh/boards/mach-ecovec24/setup.c | 6 | ||||
| -rw-r--r-- | arch/sh/boards/mach-landisk/gio.c | 1 | ||||
| -rw-r--r-- | arch/sh/boards/mach-sdk7786/Makefile | 5 | ||||
| -rw-r--r-- | arch/sh/boards/mach-sdk7786/gpio.c | 49 | ||||
| -rw-r--r-- | arch/sh/boards/mach-sdk7786/setup.c | 54 | ||||
| -rw-r--r-- | arch/sh/boards/mach-sdk7786/sram.c | 72 | ||||
| -rw-r--r-- | arch/sh/boards/mach-x3proto/Makefile | 2 | ||||
| -rw-r--r-- | arch/sh/boards/mach-x3proto/gpio.c | 135 | ||||
| -rw-r--r-- | arch/sh/boards/mach-x3proto/ilsel.c | 18 | ||||
| -rw-r--r-- | arch/sh/boards/mach-x3proto/setup.c | 132 |
14 files changed, 979 insertions, 22 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index 07b35ca2f64..9c94711aa6c 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -155,6 +155,8 @@ config SH_SDK7786 depends on CPU_SUBTYPE_SH7786 select SYS_SUPPORTS_PCI select NO_IOPORT if !PCI + select ARCH_WANT_OPTIONAL_GPIOLIB + select HAVE_SRAM_POOL help Select SDK7786 if configuring for a Renesas Technology Europe SH7786-65nm board. @@ -165,6 +167,11 @@ config SH_HIGHLANDER select SYS_SUPPORTS_PCI select IO_TRAPPED if MMU +config SH_SH7757LCR + bool "SH7757LCR" + depends on CPU_SUBTYPE_SH7757 + select ARCH_REQUIRE_GPIOLIB + config SH_SH7785LCR bool "SH7785LCR" depends on CPU_SUBTYPE_SH7785 @@ -309,6 +316,17 @@ config SH_POLARIS help Select if configuring for an SMSC Polaris development board +config SH_SH2007 + bool "SH-2007 board" + select NO_IOPORT + depends on CPU_SUBTYPE_SH7780 + help + SH-2007 is a single-board computer based around SH7780 chip + intended for embedded applications. + It has an Ethernet interface (SMC9118), direct connected + Compact Flash socket, two serial ports and PC-104 bus. + More information at <http://sh2000.sh-linux.org>. + endmenu source "arch/sh/boards/mach-r2d/Kconfig" diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile index 4f90f9b7a92..38ef655cc0f 100644 --- a/arch/sh/boards/Makefile +++ b/arch/sh/boards/Makefile @@ -2,6 +2,7 @@ # Specific board support, not covered by a mach group. # obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o +obj-$(CONFIG_SH_SH2007) += board-sh2007.o obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o obj-$(CONFIG_SH_URQUELL) += board-urquell.o obj-$(CONFIG_SH_SHMIN) += board-shmin.o @@ -9,3 +10,4 @@ obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o obj-$(CONFIG_SH_ESPT) += board-espt.o obj-$(CONFIG_SH_POLARIS) += board-polaris.o obj-$(CONFIG_SH_TITAN) += board-titan.o +obj-$(CONFIG_SH_SH7757LCR) += board-sh7757lcr.o diff --git a/arch/sh/boards/board-sh2007.c b/arch/sh/boards/board-sh2007.c new file mode 100644 index 00000000000..b90b78f6a82 --- /dev/null +++ b/arch/sh/boards/board-sh2007.c @@ -0,0 +1,133 @@ +/* + * SH-2007 board support. + * + * Copyright (C) 2003, 2004 SUGIOKA Toshinobu + * Copyright (C) 2010 Hitoshi Mitake <mitake@dcl.info.waseda.ac.jp> + */ +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/smsc911x.h> +#include <linux/platform_device.h> +#include <linux/ata_platform.h> +#include <linux/io.h> +#include <asm/machvec.h> +#include <mach/sh2007.h> + +struct smsc911x_platform_config smc911x_info = { + .flags = SMSC911X_USE_32BIT, + .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, + .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, +}; + +static struct resource smsc9118_0_resources[] = { + [0] = { + .start = SMC0_BASE, + .end = SMC0_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = evt2irq(0x240), + .end = evt2irq(0x240), + .flags = IORESOURCE_IRQ, + } +}; + +static struct resource smsc9118_1_resources[] = { + [0] = { + .start = SMC1_BASE, + .end = SMC1_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = evt2irq(0x280), + .end = evt2irq(0x280), + .flags = IORESOURCE_IRQ, + } +}; + +static struct platform_device smsc9118_0_device = { + .name = "smsc911x", + .id = 0, + .num_resources = ARRAY_SIZE(smsc9118_0_resources), + .resource = smsc9118_0_resources, + .dev = { + .platform_data = &smc911x_info, + }, +}; + +static struct platform_device smsc9118_1_device = { + .name = "smsc911x", + .id = 1, + .num_resources = ARRAY_SIZE(smsc9118_1_resources), + .resource = smsc9118_1_resources, + .dev = { + .platform_data = &smc911x_info, + }, +}; + +static struct resource cf_resources[] = { + [0] = { + .start = CF_BASE + CF_OFFSET, + .end = CF_BASE + CF_OFFSET + 0x0f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = CF_BASE + CF_OFFSET + 0x206, + .end = CF_BASE + CF_OFFSET + 0x20f, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = evt2irq(0x2c0), + .end = evt2irq(0x2c0), + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device cf_device = { + .name = "pata_platform", + .id = 0, + .num_resources = ARRAY_SIZE(cf_resources), + .resource = cf_resources, +}; + +static struct platform_device *sh2007_devices[] __initdata = { + &smsc9118_0_device, + &smsc9118_1_device, + &cf_device, +}; + +static int __init sh2007_io_init(void) +{ + platform_add_devices(sh2007_devices, ARRAY_SIZE(sh2007_devices)); + return 0; +} +subsys_initcall(sh2007_io_init); + +static void __init sh2007_init_irq(void) +{ + plat_irq_setup_pins(IRQ_MODE_IRQ); +} + +/* + * Initialize the board + */ +static void __init sh2007_setup(char **cmdline_p) +{ + printk(KERN_INFO "SH-2007 Setup..."); + + /* setup wait control registers for area 5 */ + __raw_writel(CS5BCR_D, CS5BCR); + __raw_writel(CS5WCR_D, CS5WCR); + __raw_writel(CS5PCR_D, CS5PCR); + + printk(KERN_INFO " done.\n"); +} + +/* + * The Machine Vector + */ +struct sh_machine_vector mv_sh2007 __initmv = { + .mv_setup = sh2007_setup, + .mv_name = "sh2007", + .mv_init_irq = sh2007_init_irq, +}; diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c new file mode 100644 index 00000000000..c475f1056ab --- /dev/null +++ b/arch/sh/boards/board-sh7757lcr.c @@ -0,0 +1,374 @@ +/* + * Renesas R0P7757LC0012RL Support. + * + * Copyright (C) 2009 - 2010 Renesas Solutions Corp. + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/gpio.h> +#include <linux/irq.h> +#include <linux/spi/spi.h> +#include <linux/spi/flash.h> +#include <linux/io.h> +#include <cpu/sh7757.h> +#include <asm/sh_eth.h> +#include <asm/heartbeat.h> + +static struct resource heartbeat_resource = { + .start = 0xffec005c, /* PUDR */ + .end = 0xffec005c, + .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, +}; + +static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 }; + +static struct heartbeat_data heartbeat_data = { + .bit_pos = heartbeat_bit_pos, + .nr_bits = ARRAY_SIZE(heartbeat_bit_pos), + .flags = HEARTBEAT_INVERTED, +}; + +static struct platform_device heartbeat_device = { + .name = "heartbeat", + .id = -1, + .dev = { + .platform_data = &heartbeat_data, + }, + .num_resources = 1, + .resource = &heartbeat_resource, +}; + +/* Fast Ethernet */ +static struct resource sh_eth0_resources[] = { + { + .start = 0xfef00000, + .end = 0xfef001ff, + .flags = IORESOURCE_MEM, + }, { + .start = 84, + .end = 84, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct sh_eth_plat_data sh7757_eth0_pdata = { + .phy = 1, + .edmac_endian = EDMAC_LITTLE_ENDIAN, +}; + +static struct platform_device sh7757_eth0_device = { + .name = "sh-eth", + .resource = sh_eth0_resources, + .id = 0, + .num_resources = ARRAY_SIZE(sh_eth0_resources), + .dev = { + .platform_data = &sh7757_eth0_pdata, + }, +}; + +static struct resource sh_eth1_resources[] = { + { + .start = 0xfef00800, + .end = 0xfef009ff, + .flags = IORESOURCE_MEM, + }, { + .start = 84, + .end = 84, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct sh_eth_plat_data sh7757_eth1_pdata = { + .phy = 1, + .edmac_endian = EDMAC_LITTLE_ENDIAN, +}; + +static struct platform_device sh7757_eth1_device = { + .name = "sh-eth", + .resource = sh_eth1_resources, + .id = 1, + .num_resources = ARRAY_SIZE(sh_eth1_resources), + .dev = { + .platform_data = &sh7757_eth1_pdata, + }, +}; + +static struct platform_device *sh7757lcr_devices[] __initdata = { + &heartbeat_device, + &sh7757_eth0_device, + &sh7757_eth1_device, +}; + +static int __init sh7757lcr_devices_setup(void) +{ + /* RGMII (PTA) */ + gpio_request(GPIO_FN_ET0_MDC, NULL); + gpio_request(GPIO_FN_ET0_MDIO, NULL); + gpio_request(GPIO_FN_ET1_MDC, NULL); + gpio_request(GPIO_FN_ET1_MDIO, NULL); + + /* ONFI (PTB, PTZ) */ + gpio_request(GPIO_FN_ON_NRE, NULL); + gpio_request(GPIO_FN_ON_NWE, NULL); + gpio_request(GPIO_FN_ON_NWP, NULL); + gpio_request(GPIO_FN_ON_NCE0, NULL); + gpio_request(GPIO_FN_ON_R_B0, NULL); + gpio_request(GPIO_FN_ON_ALE, NULL); + gpio_request(GPIO_FN_ON_CLE, NULL); + + gpio_request(GPIO_FN_ON_DQ7, NULL); + gpio_request(GPIO_FN_ON_DQ6, NULL); + gpio_request(GPIO_FN_ON_DQ5, NULL); + gpio_request(GPIO_FN_ON_DQ4, NULL); + gpio_request(GPIO_FN_ON_DQ3, NULL); + gpio_request(GPIO_FN_ON_DQ2, NULL); + gpio_request(GPIO_FN_ON_DQ1, NULL); + gpio_request(GPIO_FN_ON_DQ0, NULL); + + /* IRQ8 to 0 (PTB, PTC) */ + gpio_request(GPIO_FN_IRQ8, NULL); + gpio_request(GPIO_FN_IRQ7, NULL); + gpio_request(GPIO_FN_IRQ6, NULL); + gpio_request(GPIO_FN_IRQ5, NULL); + gpio_request(GPIO_FN_IRQ4, NULL); + gpio_request(GPIO_FN_IRQ3, NULL); + gpio_request(GPIO_FN_IRQ2, NULL); + gpio_request(GPIO_FN_IRQ1, NULL); + gpio_request(GPIO_FN_IRQ0, NULL); + + /* SPI0 (PTD) */ + gpio_request(GPIO_FN_SP0_MOSI, NULL); + gpio_request(GPIO_FN_SP0_MISO, NULL); + gpio_request(GPIO_FN_SP0_SCK, NULL); + gpio_request(GPIO_FN_SP0_SCK_FB, NULL); + gpio_request(GPIO_FN_SP0_SS0, NULL); + gpio_request(GPIO_FN_SP0_SS1, NULL); + gpio_request(GPIO_FN_SP0_SS2, NULL); + gpio_request(GPIO_FN_SP0_SS3, NULL); + + /* RMII 0/1 (PTE, PTF) */ + gpio_request(GPIO_FN_RMII0_CRS_DV, NULL); + gpio_request(GPIO_FN_RMII0_TXD1, NULL); + gpio_request(GPIO_FN_RMII0_TXD0, NULL); + gpio_request(GPIO_FN_RMII0_TXEN, NULL); + gpio_request(GPIO_FN_RMII0_REFCLK, NULL); + gpio_request(GPIO_FN_RMII0_RXD1, NULL); + gpio_request(GPIO_FN_RMII0_RXD0, NULL); + gpio_request(GPIO_FN_RMII0_RX_ER, NULL); + gpio_request(GPIO_FN_RMII1_CRS_DV, NULL); + gpio_request(GPIO_FN_RMII1_TXD1, NULL); + gpio_request(GPIO_FN_RMII1_TXD0, NULL); + gpio_request(GPIO_FN_RMII1_TXEN, NULL); + gpio_request(GPIO_FN_RMII1_REFCLK, NULL); + gpio_request(GPIO_FN_RMII1_RXD1, NULL); + gpio_request(GPIO_FN_RMII1_RXD0, NULL); + gpio_request(GPIO_FN_RMII1_RX_ER, NULL); + + /* eMMC (PTG) */ + gpio_request(GPIO_FN_MMCCLK, NULL); + gpio_request(GPIO_FN_MMCCMD, NULL); + gpio_request(GPIO_FN_MMCDAT7, NULL); + gpio_request(GPIO_FN_MMCDAT6, NULL); + gpio_request(GPIO_FN_MMCDAT5, NULL); + gpio_request(GPIO_FN_MMCDAT4, NULL); + gpio_request(GPIO_FN_MMCDAT3, NULL); + gpio_request(GPIO_FN_MMCDAT2, NULL); + gpio_request(GPIO_FN_MMCDAT1, NULL); + gpio_request(GPIO_FN_MMCDAT0, NULL); + + /* LPC (PTG, PTH, PTQ, PTU) */ + gpio_request(GPIO_FN_SERIRQ, NULL); + gpio_request(GPIO_FN_LPCPD, NULL); + gpio_request(GPIO_FN_LDRQ, NULL); + gpio_request(GPIO_FN_WP, NULL); + gpio_request(GPIO_FN_FMS0, NULL); + gpio_request(GPIO_FN_LAD3, NULL); + gpio_request(GPIO_FN_LAD2, NULL); + gpio_request(GPIO_FN_LAD1, NULL); + gpio_request(GPIO_FN_LAD0, NULL); + gpio_request(GPIO_FN_LFRAME, NULL); + gpio_request(GPIO_FN_LRESET, NULL); + gpio_request(GPIO_FN_LCLK, NULL); + gpio_request(GPIO_FN_LGPIO7, NULL); + gpio_request(GPIO_FN_LGPIO6, NULL); + gpio_request(GPIO_FN_LGPIO5, NULL); + gpio_request(GPIO_FN_LGPIO4, NULL); + + /* SPI1 (PTH) */ + gpio_request(GPIO_FN_SP1_MOSI, NULL); + gpio_request(GPIO_FN_SP1_MISO, NULL); + gpio_request(GPIO_FN_SP1_SCK, NULL); + gpio_request(GPIO_FN_SP1_SCK_FB, NULL); + gpio_request(GPIO_FN_SP1_SS0, NULL); + gpio_request(GPIO_FN_SP1_SS1, NULL); + + /* SDHI (PTI) */ + gpio_request(GPIO_FN_SD_WP, NULL); + gpio_request(GPIO_FN_SD_CD, NULL); + gpio_request(GPIO_FN_SD_CLK, NULL); + gpio_request(GPIO_FN_SD_CMD, NULL); + gpio_request(GPIO_FN_SD_D3, NULL); + gpio_request(GPIO_FN_SD_D2, NULL); + gpio_request(GPIO_FN_SD_D1, NULL); + gpio_request(GPIO_FN_SD_D0, NULL); + + /* SCIF3/4 (PTJ, PTW) */ + gpio_request(GPIO_FN_RTS3, NULL); + gpio_request(GPIO_FN_CTS3, NULL); + gpio_request(GPIO_FN_TXD3, NULL); + gpio_request(GPIO_FN_RXD3, NULL); + gpio_request(GPIO_FN_RTS4, NULL); + gpio_request(GPIO_FN_RXD4, NULL); + gpio_request(GPIO_FN_TXD4, NULL); + gpio_request(GPIO_FN_CTS4, NULL); + + /* SERMUX (PTK, PTL, PTO, PTV) */ + gpio_request(GPIO_FN_COM2_TXD, NULL); + gpio_request(GPIO_FN_COM2_RXD, NULL); + gpio_request(GPIO_FN_COM2_RTS, NULL); + gpio_request(GPIO_FN_COM2_CTS, NULL); + gpio_request(GPIO_FN_COM2_DTR, NULL); + gpio_request(GPIO_FN_COM2_DSR, NULL); + gpio_request(GPIO_FN_COM2_DCD, NULL); + gpio_request(GPIO_FN_COM2_RI, NULL); + gpio_request(GPIO_FN_RAC_RXD, NULL); + gpio_request(GPIO_FN_RAC_RTS, NULL); + gpio_request(GPIO_FN_RAC_CTS, NULL); + gpio_request(GPIO_FN_RAC_DTR, NULL); + gpio_request(GPIO_FN_RAC_DSR, NULL); + gpio_request(GPIO_FN_RAC_DCD, NULL); + gpio_request(GPIO_FN_RAC_TXD, NULL); + gpio_request(GPIO_FN_COM1_TXD, NULL); + gpio_request(GPIO_FN_COM1_RXD, NULL); + gpio_request(GPIO_FN_COM1_RTS, NULL); + gpio_request(GPIO_FN_COM1_CTS, NULL); + + writeb(0x10, 0xfe470000); /* SMR0: SerMux mode 0 */ + + /* IIC (PTM, PTR, PTS) */ + gpio_request(GPIO_FN_SDA7, NULL); + gpio_request(GPIO_FN_SCL7, NULL); + gpio_request(GPIO_FN_SDA6, NULL); + gpio_request(GPIO_FN_SCL6, NULL); + gpio_request(GPIO_FN_SDA5, NULL); + gpio_request(GPIO_FN_SCL5, NULL); + gpio_request(GPIO_FN_SDA4, NULL); + gpio_request(GPIO_FN_SCL4, NULL); + gpio_request(GPIO_FN_SDA3, NULL); + gpio_request(GPIO_FN_SCL3, NULL); + gpio_request(GPIO_FN_SDA2, NULL); + gpio_request(GPIO_FN_SCL2, NULL); + gpio_request(GPIO_FN_SDA1, NULL); + gpio_request(GPIO_FN_SCL1, NULL); + gpio_request(GPIO_FN_SDA0, NULL); + gpio_request(GPIO_FN_SCL0, NULL); + + /* USB (PTN) */ + gpio_request(GPIO_FN_VBUS_EN, NULL); + gpio_request(GPIO_FN_VBUS_OC, NULL); + + /* SGPIO1/0 (PTN, PTO) */ + gpio_request(GPIO_FN_SGPIO1_CLK, NULL); + gpio_request(GPIO_FN_SGPIO1_LOAD, NULL); + gpio_request(GPIO_FN_SGPIO1_DI, NULL); + gpio_request(GPIO_FN_SGPIO1_DO, NULL); + gpio_request(GPIO_FN_SGPIO0_CLK, NULL); + gpio_request(GPIO_FN_SGPIO0_LOAD, NULL); + gpio_request(GPIO_FN_SGPIO0_DI, NULL); + gpio_request(GPIO_FN_SGPIO0_DO, NULL); + + /* WDT (PTN) */ + gpio_request(GPIO_FN_SUB_CLKIN, NULL); + + /* System (PTT) */ + gpio_request(GPIO_FN_STATUS1, NULL); + gpio_request(GPIO_FN_STATUS0, NULL); + + /* PWMX (PTT) */ + gpio_request(GPIO_FN_PWMX1, NULL); + gpio_request(GPIO_FN_PWMX0, NULL); + + /* R-SPI (PTV) */ + gpio_request(GPIO_FN_R_SPI_MOSI, NULL); + gpio_request(GPIO_FN_R_SPI_MISO, NULL); + gpio_request(GPIO_FN_R_SPI_RSPCK, NULL); + gpio_request(GPIO_FN_R_SPI_SSL0, NULL); + gpio_request(GPIO_FN_R_SPI_SSL1, NULL); + + /* EVC (PTV, PTW) */ + gpio_request(GPIO_FN_EVENT7, NULL); + gpio_request(GPIO_FN_EVENT6, NULL); + gpio_request(GPIO_FN_EVENT5, NULL); + gpio_request(GPIO_FN_EVENT4, NULL); + gpio_request(GPIO_FN_EVENT3, NULL); + gpio_request(GPIO_FN_EVENT2, NULL); + gpio_request(GPIO_FN_EVENT1, NULL); + gpio_request(GPIO_FN_EVENT0, NULL); + + /* LED for heartbeat */ + gpio_request(GPIO_PTU3, NULL); + gpio_direction_output(GPIO_PTU3, 1); + gpio_request(GPIO_PTU2, NULL); + gpio_direction_output(GPIO_PTU2, 1); + gpio_request(GPIO_PTU1, NULL); + gpio_direction_output(GPIO_PTU1, 1); + gpio_request(GPIO_PTU0, NULL); + gpio_direction_output(GPIO_PTU0, 1); + + /* control for MDIO of Gigabit Ethernet */ + gpio_request(GPIO_PTT4, NULL); + gpio_direction_output(GPIO_PTT4, 1); + + /* control for eMMC */ + gpio_request(GPIO_PTT7, NULL); /* eMMC_RST# */ + gpio_direction_output(GPIO_PTT7, 0); + gpio_request(GPIO_PTT6, NULL); /* eMMC_INDEX# */ + gpio_direction_output(GPIO_PTT6, 0); + gpio_request(GPIO_PTT5, NULL); /* eMMC_PRST# */ + gpio_direction_output(GPIO_PTT5, 1); + + /* General platform */ + return platform_add_devices(sh7757lcr_devices, + ARRAY_SIZE(sh7757lcr_devices)); +} +arch_initcall(sh7757lcr_devices_setup); + +/* Initialize IRQ setting */ +void __init init_sh7757lcr_IRQ(void) +{ + plat_irq_setup_pins(IRQ_MODE_IRQ7654); + plat_irq_setup_pins(IRQ_MODE_IRQ3210); +} + +/* Initialize the board */ +static void __init sh7757lcr_setup(char **cmdline_p) +{ + printk(KERN_INFO "Renesas R0P7757LC0012RL support.\n"); +} + +static int sh7757lcr_mode_pins(void) +{ + int value = 0; + + /* These are the factory default settings of S3 (Low active). + * If you change these dip switches then you will need to + * adjust the values below as well. + */ + value |= MODE_PIN0; /* Clock Mode: 1 */ + + return value; +} + +/* The Machine Vector */ +static struct sh_machine_vector mv_sh7757lcr __initmv = { + .mv_name = "SH7757LCR", + .mv_setup = sh7757lcr_setup, + .mv_init_irq = init_sh7757lcr_IRQ, + .mv_mode_pins = sh7757lcr_mode_pins, +}; + diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index feadf5dada7..0161deb770c 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c @@ -1260,14 +1260,14 @@ static int __init arch_setup(void) /* set SPU2 clock to 83.4 MHz */ clk = clk_get(NULL, "spu_clk"); - if (clk) { + if (!IS_ERR(clk)) { clk_set_rate(clk, clk_round_rate(clk, 83333333)); clk_put(clk); } /* change parent of FSI B */ clk = clk_get(NULL, "fsib_clk"); - if (clk) { + if (!IS_ERR(clk)) { clk_register(&fsimckb_clk); clk_set_parent(clk, &fsimckb_clk); clk_set_rate(clk, 11000); @@ -1285,7 +1285,7 @@ static int __init arch_setup(void) /* set VPU clock to 166 MHz */ clk = clk_get(NULL, "vpu_clk"); - if (clk) { + if (!IS_ERR(clk)) { clk_set_rate(clk, clk_round_rate(clk, 166000000)); clk_put(clk); } diff --git a/arch/sh/boards/mach-landisk/gio.c b/arch/sh/boards/mach-landisk/gio.c index 01e6abb769b..8132dff078f 100644 --- a/arch/sh/boards/mach-landisk/gio.c +++ b/arch/sh/boards/mach-landisk/gio.c @@ -128,6 +128,7 @@ static const struct file_operations gio_fops = { .open = gio_open, /* open */ .release = gio_close, /* release */ .unlocked_ioctl = gio_ioctl, + .llseek = noop_llseek, }; static int __init gio_init(void) diff --git a/arch/sh/boards/mach-sdk7786/Makefile b/arch/sh/boards/mach-sdk7786/Makefile index a29f19e85b6..23ff7d4ac49 100644 --- a/arch/sh/boards/mach-sdk7786/Makefile +++ b/arch/sh/boards/mach-sdk7786/Makefile @@ -1 +1,4 @@ -obj-y := setup.o fpga.o irq.o +obj-y := fpga.o irq.o setup.o + +obj-$(CONFIG_GENERIC_GPIO) += gpio.o +obj-$(CONFIG_HAVE_SRAM_POOL) += sram.o diff --git a/arch/sh/boards/mach-sdk7786/gpio.c b/arch/sh/boards/mach-sdk7786/gpio.c new file mode 100644 index 00000000000..f71ce09d4e1 --- /dev/null +++ b/arch/sh/boards/mach-sdk7786/gpio.c @@ -0,0 +1,49 @@ +/* + * SDK7786 FPGA USRGPIR Support. + * + * Copyright (C) 2010 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/gpio.h> +#include <linux/irq.h> +#include <linux/kernel.h> +#include <linux/spinlock.h> +#include <linux/io.h> +#include <mach/fpga.h> + +#define NR_FPGA_GPIOS 8 + +static const char *usrgpir_gpio_names[NR_FPGA_GPIOS] = { + "in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7", +}; + +static int usrgpir_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) +{ + /* always in */ + return 0; +} + +static int usrgpir_gpio_get(struct gpio_chip *chip, unsigned gpio) +{ + return !!(fpga_read_reg(USRGPIR) & (1 << gpio)); +} + +static struct gpio_chip usrgpir_gpio_chip = { + .label = "sdk7786-fpga", + .names = usrgpir_gpio_names, + .direction_input = usrgpir_gpio_direction_input, + .get = usrgpir_gpio_get, + .base = -1, /* don't care */ + .ngpio = NR_FPGA_GPIOS, +}; + +static int __init usrgpir_gpio_setup(void) +{ + return gpiochip_add(&usrgpir_gpio_chip); +} +device_initcall(usrgpir_gpio_setup); diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c index 2ec1ea5cf8e..7e0c4e3878e 100644 --- a/arch/sh/boards/mach-sdk7786/setup.c +++ b/arch/sh/boards/mach-sdk7786/setup.c @@ -20,6 +20,8 @@ #include <asm/machvec.h> #include <asm/heartbeat.h> #include <asm/sizes.h> +#include <asm/clock.h> +#include <asm/clkdev.h> #include <asm/reboot.h> #include <asm/smp-ops.h> @@ -140,6 +142,45 @@ static int sdk7786_mode_pins(void) return fpga_read_reg(MODSWR); } +/* + * FPGA-driven PCIe clocks + * + * Historically these include the oscillator, clock B (slots 2/3/4) and + * clock A (slot 1 and the CPU clock). Newer revs of the PCB shove + * everything under a single PCIe clocks enable bit that happens to map + * to the same bit position as the oscillator bit for earlier FPGA + * versions. + * + * Given that the legacy clocks have the side-effect of shutting the CPU + * off through the FPGA along with the PCI slots, we simply leave them in + * their initial state and don't bother registering them with the clock + * framework. + */ +static int sdk7786_pcie_clk_enable(struct clk *clk) +{ + fpga_write_reg(fpga_read_reg(PCIECR) | PCIECR_CLKEN, PCIECR); + return 0; +} + +static void sdk7786_pcie_clk_disable(struct clk *clk) +{ + fpga_write_reg(fpga_read_reg(PCIECR) & ~PCIECR_CLKEN, PCIECR); +} + +static struct clk_ops sdk7786_pcie_clk_ops = { + .enable = sdk7786_pcie_clk_enable, + .disable = sdk7786_pcie_clk_disable, +}; + +static struct clk sdk7786_pcie_clk = { + .ops = &sdk7786_pcie_clk_ops, +}; + +static struct clk_lookup sdk7786_pcie_cl = { + .con_id = "pcie_plat_clk", + .clk = &sdk7786_pcie_clk, +}; + static int sdk7786_clk_init(void) { struct clk *clk; @@ -158,7 +199,18 @@ static int sdk7786_clk_init(void) ret = clk_set_rate(clk, 33333333); clk_put(clk); - return ret; + /* + * Setup the FPGA clocks. + */ + ret = clk_register(&sdk7786_pcie_clk); + if (unlikely(ret)) { + pr_err("FPGA clock registration failed\n"); + return ret; + } + + clkdev_add(&sdk7786_pcie_cl); + + return 0; } static void sdk7786_restart(char *cmd) diff --git a/arch/sh/boards/mach-sdk7786/sram.c b/arch/sh/boards/mach-sdk7786/sram.c new file mode 100644 index 00000000000..c81c3abbe01 --- /dev/null +++ b/arch/sh/boards/mach-sdk7786/sram.c @@ -0,0 +1,72 @@ +/* + * SDK7786 FPGA SRAM Support. + * + * Copyright (C) 2010 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/io.h> +#include <linux/string.h> +#include <mach/fpga.h> +#include <asm/sram.h> +#include <asm/sizes.h> + +static int __init fpga_sram_init(void) +{ + unsigned long phys; + unsigned int area; + void __iomem *vaddr; + int ret; + u16 data; + + /* Enable FPGA SRAM */ + data = fpga_read_reg(LCLASR); + data |= LCLASR_FRAMEN; + fpga_write_reg(data, LCLASR); + + /* + * FPGA_SEL determines the area mapping + */ + area = (data & LCLASR_FPGA_SEL_MASK) >> LCLASR_FPGA_SEL_SHIFT; + if (unlikely(area == LCLASR_AREA_MASK)) { + pr_err("FPGA memory unmapped.\n"); + return -ENXIO; + } + + /* + * The memory itself occupies a 2KiB range at the top of the area + * immediately below the system registers. + */ + phys = (area << 26) + SZ_64M - SZ_4K; + + /* + * The FPGA SRAM resides in translatable physical space, so set + * up a mapping prior to inserting it in to the pool. + */ + vaddr = ioremap(phys, SZ_2K); + if (unlikely(!vaddr)) { + pr_err("Failed remapping FPGA memory.\n"); + return -ENXIO; + } + + pr_info("Adding %dKiB of FPGA memory at 0x%08lx-0x%08lx " + "(area %d) to pool.\n", + SZ_2K >> 10, phys, phys + SZ_2K - 1, area); + + ret = gen_pool_add(sram_pool, (unsigned long)vaddr, SZ_2K, -1); + if (unlikely(ret < 0)) { + pr_err("Failed adding memory\n"); + iounmap(vaddr); + return ret; + } + + return 0; +} +postcore_initcall(fpga_sram_init); diff --git a/arch/sh/boards/mach-x3proto/Makefile b/arch/sh/boards/mach-x3proto/Makefile index 983e4551fec..708c21c919f 100644 --- a/arch/sh/boards/mach-x3proto/Makefile +++ b/arch/sh/boards/mach-x3proto/Makefile @@ -1 +1,3 @@ obj-y += setup.o ilsel.o + +obj-$(CONFIG_GENERIC_GPIO) += gpio.o diff --git a/arch/sh/boards/mach-x3proto/gpio.c b/arch/sh/boards/mach-x3proto/gpio.c new file mode 100644 index 00000000000..594adf76e46 --- /dev/null +++ b/arch/sh/boards/mach-x3proto/gpio.c @@ -0,0 +1,135 @@ +/* + * arch/sh/boards/mach-x3proto/gpio.c + * + * Renesas SH-X3 Prototype Baseboard GPIO Support. + * + * Copyright (C) 2010 Paul Mundt + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/gpio.h> +#include <linux/irq.h> +#include <linux/kernel.h> +#include <linux/spinlock.h> +#include <linux/io.h> +#include <mach/ilsel.h> +#include <mach/hardware.h> + +#define KEYCTLR 0xb81c0000 +#define KEYOUTR 0xb81c0002 +#define KEYDETR 0xb81c0004 + +static DEFINE_SPINLOCK(x3proto_gpio_lock); +static unsigned int x3proto_gpio_irq_map[NR_BASEBOARD_GPIOS] = { 0, }; + +static int x3proto_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) +{ + unsigned long flags; + unsigned int data; + + spin_lock_irqsave(&x3proto_gpio_lock, flags); + data = __raw_readw(KEYCTLR); + data |= (1 << gpio); + __raw_writew(data, KEYCTLR); + spin_unlock_irqrestore(&x3proto_gpio_lock, flags); + + return 0; +} + +static int x3proto_gpio_get(struct gpio_chip *chip, unsigned gpio) +{ + return !!(__raw_readw(KEYDETR) & (1 << gpio)); +} + +static int x3proto_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) +{ + return x3proto_gpio_irq_map[gpio]; +} + +static void x3proto_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + struct irq_chip *chip = get_irq_desc_chip(desc); + unsigned long mask; + int pin; + + chip->mask_ack(irq); + + mask = __raw_readw(KEYDETR); + + for_each_set_bit(pin, &mask, NR_BASEBOARD_GPIOS) + generic_handle_irq(x3proto_gpio_to_irq(NULL, pin)); + + chip->unmask(irq); +} + +struct gpio_chip x3proto_gpio_chip = { + .label = "x3proto-gpio", + .direction_input = x3proto_gpio_direction_input, + .get = x3proto_gpio_get, + .to_irq = x3proto_gpio_to_irq, + .base = -1, + .ngpio = NR_BASEBOARD_GPIOS, +}; + +int __init x3proto_gpio_setup(void) +{ + int ilsel; + int ret, i; + + ilsel = ilsel_enable(ILSEL_KEY); + if (unlikely(ilsel < 0)) + return ilsel; + + ret = gpiochip_add(&x3proto_gpio_chip); + if (unlikely(ret)) + goto err_gpio; + + for (i = 0; i < NR_BASEBOARD_GPIOS; i++) { + unsigned long flags; + int irq = create_irq(); + + if (unlikely(irq < 0)) { + ret = -EINVAL; + goto err_irq; + } + + spin_lock_irqsave(&x3proto_gpio_lock, flags); + x3proto_gpio_irq_map[i] = irq; + set_irq_chip_and_handler_name(irq, &dummy_irq_chip, + handle_simple_irq, "gpio"); + spin_unlock_irqrestore(&x3proto_gpio_lock, flags); + } + + pr_info("registering '%s' support, handling GPIOs %u -> %u, " + "bound to IRQ %u\n", + x3proto_gpio_chip.label, x3proto_gpio_chip.base, + x3proto_gpio_chip.base + x3proto_gpio_chip.ngpio, + ilsel); + + set_irq_chained_handler(ilsel, x3proto_gpio_irq_handler); + set_irq_wake(ilsel, 1); + + return 0; + +err_irq: + for (; i >= 0; --i) + if (x3proto_gpio_irq_map[i]) + destroy_irq(x3proto_gpio_irq_map[i]); + + ret = gpiochip_remove(&x3proto_gpio_chip); + if (unlikely(ret)) + pr_err("Failed deregistering GPIO\n"); + +err_gpio: + synchronize_irq(ilsel); + + ilsel_disable(ILSEL_KEY); + + return ret; +} diff --git a/arch/sh/boards/mach-x3proto/ilsel.c b/arch/sh/boards/mach-x3proto/ilsel.c index 5c9842704c6..95e34613951 100644 --- a/arch/sh/boards/mach-x3proto/ilsel.c +++ b/arch/sh/boards/mach-x3proto/ilsel.c @@ -1,20 +1,22 @@ /* - * arch/sh/boards/renesas/x3proto/ilsel.c + * arch/sh/boards/mach-x3proto/ilsel.c * * Helper routines for SH-X3 proto board ILSEL. * - * Copyright (C) 2007 Paul Mundt + * Copyright (C) 2007 - 2010 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + #include <linux/init.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/bitmap.h> #include <linux/io.h> -#include <asm/ilsel.h> +#include <mach/ilsel.h> /* * ILSEL is split across: @@ -64,6 +66,8 @@ static void __ilsel_enable(ilsel_source_t set, unsigned int bit) unsigned int tmp, shift; unsigned long addr; + pr_notice("enabling ILSEL set %d\n", set); + addr = mk_ilsel_addr(bit); shift = mk_ilsel_shift(bit); @@ -92,8 +96,10 @@ int ilsel_enable(ilsel_source_t set) { unsigned int bit; - /* Aliased sources must use ilsel_enable_fixed() */ - BUG_ON(set > ILSEL_KEY); + if (unlikely(set > ILSEL_KEY)) { + pr_err("Aliased sources must use ilsel_enable_fixed()\n"); + return -EINVAL; + } do { bit = find_first_zero_bit(&ilsel_level_map, ILSEL_LEVELS); @@ -140,6 +146,8 @@ void ilsel_disable(unsigned int irq) unsigned long addr; unsigned int tmp; + pr_notice("disabling ILSEL set %d\n", irq); + addr = mk_ilsel_addr(irq); tmp = __raw_readw(addr); diff --git a/arch/sh/boards/mach-x3proto/setup.c b/arch/sh/boards/mach-x3proto/setup.c index 102bf56befb..d682e2b6a85 100644 --- a/arch/sh/boards/mach-x3proto/setup.c +++ b/arch/sh/boards/mach-x3proto/setup.c @@ -1,9 +1,9 @@ /* - * arch/sh/boards/renesas/x3proto/setup.c + * arch/sh/boards/mach-x3proto/setup.c * * Renesas SH-X3 Prototype Board Support. * - * Copyright (C) 2007 - 2008 Paul Mundt + * Copyright (C) 2007 - 2010 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -16,9 +16,13 @@ #include <linux/smc91x.h> #include <linux/irq.h> #include <linux/interrupt.h> +#include <linux/input.h> #include <linux/usb/r8a66597.h> #include <linux/usb/m66592.h> -#include <asm/ilsel.h> +#include <linux/gpio.h> +#include <linux/gpio_keys.h> +#include <mach/ilsel.h> +#include <mach/hardware.h> #include <asm/smp-ops.h> static struct resource heartbeat_resources[] = { @@ -122,15 +126,128 @@ static struct platform_device m66592_usb_peripheral_device = { .resource = m66592_usb_peripheral_resources, }; +static struct gpio_keys_button baseboard_buttons[NR_BASEBOARD_GPIOS] = { + { + .desc = "key44", + .code = KEY_POWER, + .active_low = 1, + .wakeup = 1, + }, { + .desc = "key43", + .code = KEY_SUSPEND, + .active_low = 1, + .wakeup = 1, + }, { + .desc = "key42", + .code = KEY_KATAKANAHIRAGANA, + .active_low = 1, + }, { + .desc = "key41", + .code = KEY_SWITCHVIDEOMODE, + .active_low = 1, + }, { + .desc = "key34", + .code = KEY_F12, + .active_low = 1, + }, { + .desc = "key33", + .code = KEY_F11, + .active_low = 1, + }, { + .desc = "key32", + .code = KEY_F10, + .active_low = 1, + }, { + .desc = "key31", + .code = KEY_F9, + .active_low = 1, + }, { + .desc = "key24", + .code = KEY_F8, + .active_low = 1, + }, { + .desc = "key23", + .code = KEY_F7, + .active_low = 1, + }, { + .desc = "key22", + .code = KEY_F6, + .active_low = 1, + }, { + .desc = "key21", + .code = KEY_F5, + .active_low = 1, + }, { + .desc = "key14", + .code = KEY_F4, + .active_low = 1, + }, { + .desc = "key13", + .code = KEY_F3, + .active_low = 1, + }, { + .desc = "key12", + .code = KEY_F2, + .active_low = 1, + }, { + .desc = "key11", + .code = KEY_F1, + .active_low = 1, + }, +}; + +static struct gpio_keys_platform_data baseboard_buttons_data = { + .buttons = baseboard_buttons, + .nbuttons = ARRAY_SIZE(baseboard_buttons), +}; + +static struct platform_device baseboard_buttons_device = { + .name = "gpio-keys", + .id = -1, + .dev = { + .platform_data = &baseboard_buttons_data, + }, +}; + static struct platform_device *x3proto_devices[] __initdata = { &heartbeat_device, &smc91x_device, &r8a66597_usb_host_device, &m66592_usb_peripheral_device, + &baseboard_buttons_device, }; +static void __init x3proto_init_irq(void) +{ + plat_irq_setup_pins(IRQ_MODE_IRL3210); + + /* Set ICR0.LVLMODE */ + __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000); +} + static int __init x3proto_devices_setup(void) { + int ret, i; + + /* + * IRLs are only needed for ILSEL mappings, so flip over the INTC + * pins at a later point to enable the GPIOs to settle. + */ + x3proto_init_irq(); + + /* + * Now that ILSELs are available, set up the baseboard GPIOs. + */ + ret = x3proto_gpio_setup(); + if (unlikely(ret)) + return ret; + + /* + * Propagate dynamic GPIOs for the baseboard button device. + */ + for (i = 0; i < ARRAY_SIZE(baseboard_buttons); i++) + baseboard_buttons[i].gpio = x3proto_gpio_chip.base + i; + r8a66597_usb_host_resources[1].start = r8a66597_usb_host_resources[1].end = ilsel_enable(ILSEL_USBH_I); @@ -145,14 +262,6 @@ static int __init x3proto_devices_setup(void) } device_initcall(x3proto_devices_setup); -static void __init x3proto_init_irq(void) -{ - plat_irq_setup_pins(IRQ_MODE_IRL3210); - - /* Set ICR0.LVLMODE */ - __raw_writel(__raw_readl(0xfe410000) | (1 << 21), 0xfe410000); -} - static void __init x3proto_setup(char **cmdline_p) { register_smp_ops(&shx3_smp_ops); @@ -161,5 +270,4 @@ static void __init x3proto_setup(char **cmdline_p) static struct sh_machine_vector mv_x3proto __initmv = { .mv_name = "x3proto", .mv_setup = x3proto_setup, - .mv_init_irq = x3proto_init_irq, }; |