diff options
Diffstat (limited to 'arch/sh/include')
-rw-r--r-- | arch/sh/include/asm/cacheflush.h | 37 | ||||
-rw-r--r-- | arch/sh/include/cpu-common/cpu/cacheflush.h | 37 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh4/cpu/cacheflush.h | 31 | ||||
-rw-r--r-- | arch/sh/include/cpu-sh5/cpu/cacheflush.h | 10 |
4 files changed, 26 insertions, 89 deletions
diff --git a/arch/sh/include/asm/cacheflush.h b/arch/sh/include/asm/cacheflush.h index b1cf30f423a..25b7f46494d 100644 --- a/arch/sh/include/asm/cacheflush.h +++ b/arch/sh/include/asm/cacheflush.h @@ -1,46 +1,11 @@ #ifndef __ASM_SH_CACHEFLUSH_H #define __ASM_SH_CACHEFLUSH_H -#include <linux/mm.h> - #ifdef __KERNEL__ -#ifdef CONFIG_CACHE_OFF -/* - * Nothing to do when the cache is disabled, initial flush and explicit - * disabling is handled at CPU init time. - * - * See arch/sh/kernel/cpu/init.c:cache_init(). - */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_cache_sigtramp(vaddr) do { } while (0) -#define __flush_wback_region(start, size) do { (void)(start); } while (0) -#define __flush_purge_region(start, size) do { (void)(start); } while (0) -#define __flush_invalidate_region(start, size) do { (void)(start); } while (0) -#else +#include <linux/mm.h> #include <cpu/cacheflush.h> -/* - * Consistent DMA requires that the __flush_xxx() primitives must be set - * for any of the enabled non-coherent caches (most of the UP CPUs), - * regardless of PIPT or VIPT cache configurations. - */ - -/* Flush (write-back only) a region (smaller than a page) */ -extern void __flush_wback_region(void *start, int size); -/* Flush (write-back & invalidate) a region (smaller than a page) */ -extern void __flush_purge_region(void *start, int size); -/* Flush (invalidate only) a region (smaller than a page) */ -extern void __flush_invalidate_region(void *start, int size); -#endif - #define ARCH_HAS_FLUSH_ANON_PAGE extern void __flush_anon_page(struct page *page, unsigned long); diff --git a/arch/sh/include/cpu-common/cpu/cacheflush.h b/arch/sh/include/cpu-common/cpu/cacheflush.h index 5dc3736218e..8189dbd68f8 100644 --- a/arch/sh/include/cpu-common/cpu/cacheflush.h +++ b/arch/sh/include/cpu-common/cpu/cacheflush.h @@ -1,14 +1,12 @@ /* - * include/asm-sh/cpu-sh2/cacheflush.h - * * Copyright (C) 2003 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ -#ifndef __ASM_CPU_SH2_CACHEFLUSH_H -#define __ASM_CPU_SH2_CACHEFLUSH_H +#ifndef __ASM_CPU_SH_CACHEFLUSH_H +#define __ASM_CPU_SH_CACHEFLUSH_H /* * Cache flushing: @@ -22,18 +20,23 @@ * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache * - flush_icache_range(start, end) flushes(invalidates) a range for icache * - flush_icache_page(vma, pg) flushes(invalidates) a page for icache - * - * Caches are indexed (effectively) by physical address on SH-2, so - * we don't need them. + * - flush_cache_sigtramp(vaddr) flushes the signal trampoline */ -#define flush_cache_all() do { } while (0) -#define flush_cache_mm(mm) do { } while (0) -#define flush_cache_dup_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_page(page) do { } while (0) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma,pg) do { } while (0) -#define flush_cache_sigtramp(vaddr) do { } while (0) +extern void (*flush_cache_all)(void); +extern void (*flush_cache_mm)(struct mm_struct *mm); +extern void (*flush_cache_dup_mm)(struct mm_struct *mm); +extern void (*flush_cache_page)(struct vm_area_struct *vma, + unsigned long addr, unsigned long pfn); +extern void (*flush_cache_range)(struct vm_area_struct *vma, + unsigned long start, unsigned long end); +extern void (*flush_dcache_page)(struct page *page); +extern void (*flush_icache_range)(unsigned long start, unsigned long end); +extern void (*flush_icache_page)(struct vm_area_struct *vma, + struct page *page); +extern void (*flush_cache_sigtramp)(unsigned long address); + +extern void (*__flush_wback_region)(void *start, int size); +extern void (*__flush_purge_region)(void *start, int size); +extern void (*__flush_invalidate_region)(void *start, int size); -#endif /* __ASM_CPU_SH2_CACHEFLUSH_H */ +#endif /* __ASM_CPU_SH_CACHEFLUSH_H */ diff --git a/arch/sh/include/cpu-sh4/cpu/cacheflush.h b/arch/sh/include/cpu-sh4/cpu/cacheflush.h deleted file mode 100644 index d6bd396d7df..00000000000 --- a/arch/sh/include/cpu-sh4/cpu/cacheflush.h +++ /dev/null @@ -1,31 +0,0 @@ -/* - * include/asm-sh/cpu-sh4/cacheflush.h - * - * Copyright (C) 1999 Niibe Yutaka - * Copyright (C) 2003 Paul Mundt - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - */ -#ifndef __ASM_CPU_SH4_CACHEFLUSH_H -#define __ASM_CPU_SH4_CACHEFLUSH_H - -/* - * Caches are broken on SH-4 (unless we use write-through - * caching; in which case they're only semi-broken), - * so we need them. - */ -void flush_cache_all(void); -void flush_cache_mm(struct mm_struct *mm); -#define flush_cache_dup_mm(mm) flush_cache_mm(mm) -void flush_cache_range(struct vm_area_struct *vma, unsigned long start, - unsigned long end); -void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, - unsigned long pfn); -void flush_dcache_page(struct page *pg); -void flush_icache_range(unsigned long start, unsigned long end); - -#define flush_icache_page(vma,pg) do { } while (0) - -#endif /* __ASM_CPU_SH4_CACHEFLUSH_H */ diff --git a/arch/sh/include/cpu-sh5/cpu/cacheflush.h b/arch/sh/include/cpu-sh5/cpu/cacheflush.h index 740d10a316e..202f637a0e1 100644 --- a/arch/sh/include/cpu-sh5/cpu/cacheflush.h +++ b/arch/sh/include/cpu-sh5/cpu/cacheflush.h @@ -3,10 +3,6 @@ #ifndef __ASSEMBLY__ -struct vm_area_struct; -struct page; -struct mm_struct; - extern void flush_cache_all(void); extern void flush_cache_mm(struct mm_struct *mm); extern void flush_cache_sigtramp(unsigned long vaddr); @@ -16,10 +12,14 @@ extern void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, uns extern void flush_dcache_page(struct page *pg); extern void flush_icache_range(unsigned long start, unsigned long end); +/* XXX .. */ +extern void (*__flush_wback_region)(void *start, int size); +extern void (*__flush_purge_region)(void *start, int size); +extern void (*__flush_invalidate_region)(void *start, int size); + #define flush_cache_dup_mm(mm) flush_cache_mm(mm) #define flush_icache_page(vma, page) do { } while (0) #endif /* __ASSEMBLY__ */ #endif /* __ASM_SH_CPU_SH5_CACHEFLUSH_H */ - |