diff options
Diffstat (limited to 'arch/sh/kernel')
| -rw-r--r-- | arch/sh/kernel/cpu/irq/Makefile | 2 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/irq/pint.c | 56 | ||||
| -rw-r--r-- | arch/sh/kernel/cpu/sh3/setup-sh7705.c | 54 |
3 files changed, 105 insertions, 7 deletions
diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile index 0049d217561..1c23308cfc2 100644 --- a/arch/sh/kernel/cpu/irq/Makefile +++ b/arch/sh/kernel/cpu/irq/Makefile @@ -4,6 +4,6 @@ obj-y += imask.o obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o -obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o +obj-$(CONFIG_CPU_HAS_PINT_IRQ) += pint.o obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o diff --git a/arch/sh/kernel/cpu/irq/pint.c b/arch/sh/kernel/cpu/irq/pint.c index f60007783a2..67602685df1 100644 --- a/arch/sh/kernel/cpu/irq/pint.c +++ b/arch/sh/kernel/cpu/irq/pint.c @@ -18,6 +18,58 @@ #include <asm/io.h> #include <asm/machvec.h> +#if defined(CONFIG_CPU_SUBTYPE_SH7705) +#define INTC_INTER 0xA4000014UL +#define INTC_IPRD 0xA4000018UL +#define INTC_ICR2 0xA4000012UL + +/* PFC */ +#define PORT_PACR 0xA4000100UL +#define PORT_PBCR 0xA4000102UL +#define PORT_PCCR 0xA4000104UL +#define PORT_PDCR 0xA4000106UL +#define PORT_PECR 0xA4000108UL +#define PORT_PFCR 0xA400010AUL +#define PORT_PGCR 0xA400010CUL +#define PORT_PHCR 0xA400010EUL +#define PORT_PJCR 0xA4000110UL +#define PORT_PKCR 0xA4000112UL +#define PORT_PLCR 0xA4000114UL +#define PORT_PMCR 0xA4000118UL +#define PORT_PNCR 0xA400011AUL +#define PORT_PECR2 0xA4050148UL +#define PORT_PFCR2 0xA405014AUL +#define PORT_PNCR2 0xA405015AUL + +/* I/O port */ +#define PORT_PADR 0xA4000120UL +#define PORT_PBDR 0xA4000122UL +#define PORT_PCDR 0xA4000124UL +#define PORT_PDDR 0xA4000126UL +#define PORT_PEDR 0xA4000128UL +#define PORT_PFDR 0xA400012AUL +#define PORT_PGDR 0xA400012CUL +#define PORT_PHDR 0xA400012EUL +#define PORT_PJDR 0xA4000130UL +#define PORT_PKDR 0xA4000132UL +#define PORT_PLDR 0xA4000134UL +#define PORT_PMDR 0xA4000138UL +#define PORT_PNDR 0xA400013AUL + +#define PINT0_IRQ 40 +#define PINT8_IRQ 41 +#define PINT_IRQ_BASE 86 + +#define PINT0_IPR_ADDR INTC_IPRD +#define PINT0_IPR_POS 3 +#define PINT0_PRIORITY 2 + +#define PINT8_IPR_ADDR INTC_IPRD +#define PINT8_IPR_POS 2 +#define PINT8_PRIORITY 2 + +#endif /* CONFIG_CPU_SUBTYPE_SH7705 */ + static unsigned char pint_map[256]; static unsigned long portcr_mask; @@ -126,7 +178,7 @@ int ipr_irq_demux(int irq) unsigned long creg, dreg, d, sav; if (irq == PINT0_IRQ) { -#if defined(CONFIG_CPU_SUBTYPE_SH7707) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707) creg = PORT_PACR; dreg = PORT_PADR; #else @@ -144,7 +196,7 @@ int ipr_irq_demux(int irq) return PINT_IRQ_BASE + pint_map[d]; } else if (irq == PINT8_IRQ) { -#if defined(CONFIG_CPU_SUBTYPE_SH7707) +#if defined(CONFIG_CPU_SUBTYPE_SH7705) || defined(CONFIG_CPU_SUBTYPE_SH7707) creg = PORT_PBCR; dreg = PORT_PBDR; #else diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c index a8e41c5241f..1983fb7ad6e 100644 --- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c +++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c @@ -2,6 +2,7 @@ * SH7705 Setup * * Copyright (C) 2006 Paul Mundt + * Copyright (C) 2007 Nobuhiro Iwamatsu * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -14,15 +15,15 @@ static struct plat_sci_port sci_platform_data[] = { { - .mapbase = 0xa4400000, + .mapbase = 0xa4410000, .flags = UPF_BOOT_AUTOCONF, .type = PORT_SCIF, - .irqs = { 52, 53, 55, 54 }, + .irqs = { 56, 57, 59 }, }, { - .mapbase = 0xa4410000, + .mapbase = 0xa4400000, .flags = UPF_BOOT_AUTOCONF, .type = PORT_SCIF, - .irqs = { 56, 57, 59, 58 }, + .irqs = { 52, 53, 55 }, }, { .flags = 0, } @@ -46,3 +47,48 @@ static int __init sh7705_devices_setup(void) ARRAY_SIZE(sh7705_devices)); } __initcall(sh7705_devices_setup); + +static struct ipr_data sh7705_ipr_map[] = { + /* IRQ, IPR-idx, shift, priority */ + { 16, 0, 12, 2 }, /* TMU0 TUNI*/ + { 17, 0, 8, 2 }, /* TMU1 TUNI */ + { 18, 0, 4, 2 }, /* TMU2 TUNI */ + { 27, 1, 12, 2 }, /* WDT ITI */ + { 20, 0, 0, 2 }, /* RTC ATI (alarm) */ + { 21, 0, 0, 2 }, /* RTC PRI (period) */ + { 22, 0, 0, 2 }, /* RTC CUI (carry) */ + { 48, 4, 12, 7 }, /* DMAC DMTE0 */ + { 49, 4, 12, 7 }, /* DMAC DMTE1 */ + { 50, 4, 12, 7 }, /* DMAC DMTE2 */ + { 51, 4, 12, 7 }, /* DMAC DMTE3 */ + { 52, 4, 8, 3 }, /* SCIF0 ERI */ + { 53, 4, 8, 3 }, /* SCIF0 RXI */ + { 55, 4, 8, 3 }, /* SCIF0 TXI */ + { 56, 4, 4, 3 }, /* SCIF1 ERI */ + { 57, 4, 4, 3 }, /* SCIF1 RXI */ + { 59, 4, 4, 3 }, /* SCIF1 TXI */ +}; + +static unsigned long ipr_offsets[] = { + 0xFFFFFEE2 /* 0: IPRA */ +, 0xFFFFFEE4 /* 1: IPRB */ +, 0xA4000016 /* 2: IPRC */ +, 0xA4000018 /* 3: IPRD */ +, 0xA400001A /* 4: IPRE */ +, 0xA4080000 /* 5: IPRF */ +, 0xA4080002 /* 6: IPRG */ +, 0xA4080004 /* 7: IPRH */ +}; + +/* given the IPR index return the address of the IPR register */ +unsigned int map_ipridx_to_addr(int idx) +{ + if (idx >= ARRAY_SIZE(ipr_offsets)) + return 0; + return ipr_offsets[idx]; +} + +void __init init_IRQ_ipr() +{ + make_ipr_irq(sh7705_ipr_map, ARRAY_SIZE(sh7705_ipr_map)); +} |