diff options
Diffstat (limited to 'arch/sparc/include/asm')
| -rw-r--r-- | arch/sparc/include/asm/perfctr.h | 4 | ||||
| -rw-r--r-- | arch/sparc/include/asm/system_64.h | 15 | ||||
| -rw-r--r-- | arch/sparc/include/asm/thread_info_64.h | 25 |
3 files changed, 10 insertions, 34 deletions
diff --git a/arch/sparc/include/asm/perfctr.h b/arch/sparc/include/asm/perfctr.h index 836873002b7..8d8720a8770 100644 --- a/arch/sparc/include/asm/perfctr.h +++ b/arch/sparc/include/asm/perfctr.h @@ -10,8 +10,8 @@ * from enumeration below. The meaning of further arguments * are determined by the operation code. * - * int sys_perfctr(int opcode, unsigned long arg0, - * unsigned long arg1, unsigned long arg2) + * NOTE: This system call is no longer provided, use the perf_events + * infrastructure. * * Pointers which are passed by the user are pointers to 64-bit * integers. diff --git a/arch/sparc/include/asm/system_64.h b/arch/sparc/include/asm/system_64.h index d47a98e6697..d24cfe16afc 100644 --- a/arch/sparc/include/asm/system_64.h +++ b/arch/sparc/include/asm/system_64.h @@ -143,15 +143,7 @@ do { \ * and 2 stores in this critical code path. -DaveM */ #define switch_to(prev, next, last) \ -do { if (test_thread_flag(TIF_PERFCTR)) { \ - unsigned long __tmp; \ - read_pcr(__tmp); \ - current_thread_info()->pcr_reg = __tmp; \ - read_pic(__tmp); \ - current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\ - current_thread_info()->kernel_cntd1 += ((__tmp) >> 32); \ - } \ - flush_tlb_pending(); \ +do { flush_tlb_pending(); \ save_and_clear_fpu(); \ /* If you are tempted to conditionalize the following */ \ /* so that ASI is only written if it changes, think again. */ \ @@ -197,11 +189,6 @@ do { if (test_thread_flag(TIF_PERFCTR)) { \ "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ "i0", "i1", "i2", "i3", "i4", "i5", \ "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ - /* If you fuck with this, update ret_from_syscall code too. */ \ - if (test_thread_flag(TIF_PERFCTR)) { \ - write_pcr(current_thread_info()->pcr_reg); \ - reset_pic(); \ - } \ } while(0) static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) diff --git a/arch/sparc/include/asm/thread_info_64.h b/arch/sparc/include/asm/thread_info_64.h index 39be9f256e5..9e2d9447f2a 100644 --- a/arch/sparc/include/asm/thread_info_64.h +++ b/arch/sparc/include/asm/thread_info_64.h @@ -58,11 +58,6 @@ struct thread_info { unsigned long gsr[7]; unsigned long xfsr[7]; - __u64 __user *user_cntd0; - __u64 __user *user_cntd1; - __u64 kernel_cntd0, kernel_cntd1; - __u64 pcr_reg; - struct restart_block restart_block; struct pt_regs *kern_una_regs; @@ -96,15 +91,10 @@ struct thread_info { #define TI_RWIN_SPTRS 0x000003c8 #define TI_GSR 0x00000400 #define TI_XFSR 0x00000438 -#define TI_USER_CNTD0 0x00000470 -#define TI_USER_CNTD1 0x00000478 -#define TI_KERN_CNTD0 0x00000480 -#define TI_KERN_CNTD1 0x00000488 -#define TI_PCR 0x00000490 -#define TI_RESTART_BLOCK 0x00000498 -#define TI_KUNA_REGS 0x000004c8 -#define TI_KUNA_INSN 0x000004d0 -#define TI_FPREGS 0x00000500 +#define TI_RESTART_BLOCK 0x00000470 +#define TI_KUNA_REGS 0x000004a0 +#define TI_KUNA_INSN 0x000004a8 +#define TI_FPREGS 0x000004c0 /* We embed this in the uppermost byte of thread_info->flags */ #define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */ @@ -199,7 +189,7 @@ register struct thread_info *current_thread_info_reg asm("g6"); * * On trap return we need to test several values: * - * user: need_resched, notify_resume, sigpending, wsaved, perfctr + * user: need_resched, notify_resume, sigpending, wsaved * kernel: fpdepth * * So to check for work in the kernel case we simply load the fpdepth @@ -220,7 +210,7 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define TIF_NOTIFY_RESUME 1 /* callback before returning to user */ #define TIF_SIGPENDING 2 /* signal pending */ #define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_PERFCTR 4 /* performance counters active */ +/* flag bit 4 is available */ #define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ /* flag bit 6 is available */ #define TIF_32BIT 7 /* 32-bit binary */ @@ -241,7 +231,6 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) #define _TIF_SIGPENDING (1<<TIF_SIGPENDING) #define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) -#define _TIF_PERFCTR (1<<TIF_PERFCTR) #define _TIF_UNALIGNED (1<<TIF_UNALIGNED) #define _TIF_32BIT (1<<TIF_32BIT) #define _TIF_SECCOMP (1<<TIF_SECCOMP) @@ -252,7 +241,7 @@ register struct thread_info *current_thread_info_reg asm("g6"); #define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ _TIF_DO_NOTIFY_RESUME_MASK | \ - _TIF_NEED_RESCHED | _TIF_PERFCTR) + _TIF_NEED_RESCHED) #define _TIF_DO_NOTIFY_RESUME_MASK (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING) /* |