diff options
Diffstat (limited to 'arch')
-rw-r--r-- | arch/sparc/kernel/apc.c | 2 | ||||
-rw-r--r-- | arch/sparc/kernel/head.S | 1 | ||||
-rw-r--r-- | arch/sparc64/kernel/trampoline.S | 18 |
3 files changed, 16 insertions, 5 deletions
diff --git a/arch/sparc/kernel/apc.c b/arch/sparc/kernel/apc.c index 4dd1ba752ce..9c115823c4b 100644 --- a/arch/sparc/kernel/apc.c +++ b/arch/sparc/kernel/apc.c @@ -31,7 +31,7 @@ #define APC_DEVNAME "apc" static u8 __iomem *regs; -static int apc_no_idle __initdata = 0; +static int apc_no_idle __devinitdata = 0; #define apc_readb(offs) (sbus_readb(regs+offs)) #define apc_writeb(val, offs) (sbus_writeb(val, regs+offs)) diff --git a/arch/sparc/kernel/head.S b/arch/sparc/kernel/head.S index 2d325fd8457..2fe2c117e77 100644 --- a/arch/sparc/kernel/head.S +++ b/arch/sparc/kernel/head.S @@ -465,6 +465,7 @@ gokernel: mov %o7, %g4 ! Save %o7 /* Jump to it, and pray... */ + __INIT current_pc: call 1f nop diff --git a/arch/sparc64/kernel/trampoline.S b/arch/sparc64/kernel/trampoline.S index 704a3afcfd0..83abd5ae88a 100644 --- a/arch/sparc64/kernel/trampoline.S +++ b/arch/sparc64/kernel/trampoline.S @@ -328,6 +328,12 @@ after_lock_tlb: wrpr %g0, 0, %wstate + sethi %hi(prom_entry_lock), %g2 +1: ldstub [%g2 + %lo(prom_entry_lock)], %g1 + membar #StoreLoad | #StoreStore + brnz,pn %g1, 1b + nop + /* As a hack, put &init_thread_union into %g6. * prom_world() loads from here to restore the %asi * register. @@ -337,7 +343,7 @@ after_lock_tlb: sethi %hi(is_sun4v), %o0 lduw [%o0 + %lo(is_sun4v)], %o0 - brz,pt %o0, 1f + brz,pt %o0, 2f nop TRAP_LOAD_TRAP_BLOCK(%g2, %g3) @@ -369,10 +375,10 @@ after_lock_tlb: call %o1 add %sp, (2047 + 128), %o0 - ba,pt %xcc, 2f + ba,pt %xcc, 3f nop -1: sethi %hi(sparc64_ttable_tl0), %o0 +2: sethi %hi(sparc64_ttable_tl0), %o0 set prom_set_trap_table_name, %g2 stx %g2, [%sp + 2047 + 128 + 0x00] mov 1, %g2 @@ -386,7 +392,11 @@ after_lock_tlb: call %o1 add %sp, (2047 + 128), %o0 -2: ldx [%l0], %g6 +3: sethi %hi(prom_entry_lock), %g2 + stb %g0, [%g2 + %lo(prom_entry_lock)] + membar #StoreStore | #StoreLoad + + ldx [%l0], %g6 ldx [%g6 + TI_TASK], %g4 mov 1, %g5 |