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-rw-r--r--arch/arm/boot/dts/atlas6.dtsi3
-rw-r--r--arch/arm/boot/dts/marco.dtsi3
-rw-r--r--arch/arm/boot/dts/prima2.dtsi3
-rw-r--r--arch/arm/mach-prima2/Kconfig1
-rw-r--r--arch/arm/mach-prima2/rstc.c93
5 files changed, 66 insertions, 37 deletions
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index f8674bcc448..f7f9cafb42f 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -65,9 +65,10 @@
#clock-cells = <1>;
};
- reset-controller@88010000 {
+ rstc: reset-controller@88010000 {
compatible = "sirf,prima2-rstc";
reg = <0x88010000 0x1000>;
+ #reset-cells = <1>;
};
rsc-controller@88020000 {
diff --git a/arch/arm/boot/dts/marco.dtsi b/arch/arm/boot/dts/marco.dtsi
index 1579c3491cc..0c9647d2876 100644
--- a/arch/arm/boot/dts/marco.dtsi
+++ b/arch/arm/boot/dts/marco.dtsi
@@ -58,9 +58,10 @@
#size-cells = <1>;
ranges = <0xc2000000 0xc2000000 0x1000000>;
- reset-controller@c2000000 {
+ rstc: reset-controller@c2000000 {
compatible = "sirf,marco-rstc";
reg = <0xc2000000 0x10000>;
+ #reset-cells = <1>;
};
};
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 0e219932d7c..0ca0d7fd7a6 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -76,9 +76,10 @@
#clock-cells = <1>;
};
- reset-controller@88010000 {
+ rstc: reset-controller@88010000 {
compatible = "sirf,prima2-rstc";
reg = <0x88010000 0x1000>;
+ #reset-cells = <1>;
};
rsc-controller@88020000 {
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
index 6988b117fc1..f37a1de1a11 100644
--- a/arch/arm/mach-prima2/Kconfig
+++ b/arch/arm/mach-prima2/Kconfig
@@ -1,5 +1,6 @@
config ARCH_SIRF
bool "CSR SiRF" if ARCH_MULTI_V7
+ select ARCH_HAS_RESET_CONTROLLER
select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
diff --git a/arch/arm/mach-prima2/rstc.c b/arch/arm/mach-prima2/rstc.c
index ccb53391147..a5997674333 100644
--- a/arch/arm/mach-prima2/rstc.c
+++ b/arch/arm/mach-prima2/rstc.c
@@ -13,57 +13,36 @@
#include <linux/device.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/platform_device.h>
#include <linux/reboot.h>
+#include <linux/reset-controller.h>
+
+#define SIRFSOC_RSTBIT_NUM 64
void __iomem *sirfsoc_rstc_base;
static DEFINE_MUTEX(rstc_lock);
-static struct of_device_id rstc_ids[] = {
- { .compatible = "sirf,prima2-rstc" },
- { .compatible = "sirf,marco-rstc" },
- {},
-};
-
-static int __init sirfsoc_of_rstc_init(void)
-{
- struct device_node *np;
-
- np = of_find_matching_node(NULL, rstc_ids);
- if (!np) {
- pr_err("unable to find compatible sirf rstc node in dtb\n");
- return -ENOENT;
- }
-
- sirfsoc_rstc_base = of_iomap(np, 0);
- if (!sirfsoc_rstc_base)
- panic("unable to map rstc cpu registers\n");
-
- of_node_put(np);
-
- return 0;
-}
-early_initcall(sirfsoc_of_rstc_init);
-
-int sirfsoc_reset_device(struct device *dev)
+static int sirfsoc_reset_module(struct reset_controller_dev *rcdev,
+ unsigned long sw_reset_idx)
{
- u32 reset_bit;
+ u32 reset_bit = sw_reset_idx;
- if (of_property_read_u32(dev->of_node, "reset-bit", &reset_bit))
+ if (reset_bit >= SIRFSOC_RSTBIT_NUM)
return -EINVAL;
mutex_lock(&rstc_lock);
- if (of_device_is_compatible(dev->of_node, "sirf,prima2-rstc")) {
+ if (of_device_is_compatible(rcdev->of_node, "sirf,prima2-rstc")) {
/*
* Writing 1 to this bit resets corresponding block. Writing 0 to this
* bit de-asserts reset signal of the corresponding block.
* datasheet doesn't require explicit delay between the set and clear
* of reset bit. it could be shorter if tests pass.
*/
- writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | reset_bit,
+ writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | (1 << reset_bit),
sirfsoc_rstc_base + (reset_bit / 32) * 4);
msleep(10);
- writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~reset_bit,
+ writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~(1 << reset_bit),
sirfsoc_rstc_base + (reset_bit / 32) * 4);
} else {
/*
@@ -73,9 +52,9 @@ int sirfsoc_reset_device(struct device *dev)
* datasheet doesn't require explicit delay between the set and clear
* of reset bit. it could be shorter if tests pass.
*/
- writel(reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8);
+ writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8);
msleep(10);
- writel(reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
+ writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);
}
mutex_unlock(&rstc_lock);
@@ -83,6 +62,52 @@ int sirfsoc_reset_device(struct device *dev)
return 0;
}
+static struct reset_control_ops sirfsoc_rstc_ops = {
+ .reset = sirfsoc_reset_module,
+};
+
+static struct reset_controller_dev sirfsoc_reset_controller = {
+ .ops = &sirfsoc_rstc_ops,
+ .nr_resets = SIRFSOC_RSTBIT_NUM,
+};
+
+static int sirfsoc_rstc_probe(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ sirfsoc_rstc_base = of_iomap(np, 0);
+ if (!sirfsoc_rstc_base) {
+ dev_err(&pdev->dev, "unable to map rstc cpu registers\n");
+ return -ENOMEM;
+ }
+
+ sirfsoc_reset_controller.of_node = np;
+
+ reset_controller_register(&sirfsoc_reset_controller);
+
+ return 0;
+}
+
+static const struct of_device_id rstc_ids[] = {
+ { .compatible = "sirf,prima2-rstc" },
+ { .compatible = "sirf,marco-rstc" },
+ {},
+};
+
+static struct platform_driver sirfsoc_rstc_driver = {
+ .probe = sirfsoc_rstc_probe,
+ .driver = {
+ .name = "sirfsoc_rstc",
+ .owner = THIS_MODULE,
+ .of_match_table = rstc_ids,
+ },
+};
+
+static int __init sirfsoc_rstc_init(void)
+{
+ return platform_driver_register(&sirfsoc_rstc_driver);
+}
+subsys_initcall(sirfsoc_rstc_init);
+
#define SIRFSOC_SYS_RST_BIT BIT(31)
void sirfsoc_restart(enum reboot_mode mode, const char *cmd)
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-11-20 13:14:15 +0000