diff options
Diffstat (limited to 'drivers/char/drm/mga_drm.h')
| -rw-r--r-- | drivers/char/drm/mga_drm.h | 142 |
1 files changed, 67 insertions, 75 deletions
diff --git a/drivers/char/drm/mga_drm.h b/drivers/char/drm/mga_drm.h index d20aab3bd57..44d1293e294 100644 --- a/drivers/char/drm/mga_drm.h +++ b/drivers/char/drm/mga_drm.h @@ -44,10 +44,10 @@ /* WARP pipe flags */ -#define MGA_F 0x1 /* fog */ -#define MGA_A 0x2 /* alpha */ -#define MGA_S 0x4 /* specular */ -#define MGA_T2 0x8 /* multitexture */ +#define MGA_F 0x1 /* fog */ +#define MGA_A 0x2 /* alpha */ +#define MGA_S 0x4 /* specular */ +#define MGA_T2 0x8 /* multitexture */ #define MGA_WARP_TGZ 0 #define MGA_WARP_TGZF (MGA_F) @@ -66,14 +66,14 @@ #define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) #define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) -#define MGA_MAX_G200_PIPES 8 /* no multitex */ +#define MGA_MAX_G200_PIPES 8 /* no multitex */ #define MGA_MAX_G400_PIPES 16 #define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES -#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ +#define MGA_WARP_UCODE_SIZE 32768 /* in bytes */ #define MGA_CARD_TYPE_G200 1 #define MGA_CARD_TYPE_G400 2 -#define MGA_CARD_TYPE_G450 3 /* not currently used */ +#define MGA_CARD_TYPE_G450 3 /* not currently used */ #define MGA_CARD_TYPE_G550 4 #define MGA_FRONT 0x1 @@ -86,14 +86,14 @@ #define MGA_UPLOAD_TEX0 0x2 #define MGA_UPLOAD_TEX1 0x4 #define MGA_UPLOAD_PIPE 0x8 -#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ -#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ +#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ +#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ #define MGA_UPLOAD_2D 0x40 -#define MGA_WAIT_AGE 0x80 /* handled client-side */ -#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ +#define MGA_WAIT_AGE 0x80 /* handled client-side */ +#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ #if 0 -#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock - quiescent */ +#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock + quiescent */ #endif /* 32 buffers of 64k each, total 2 meg. @@ -120,8 +120,7 @@ #define DRM_MGA_IDLE_RETRY 2048 -#endif /* __MGA_SAREA_DEFINES__ */ - +#endif /* __MGA_SAREA_DEFINES__ */ /* Setup registers for 3D context */ @@ -165,25 +164,25 @@ typedef struct { /* General aging mechanism */ typedef struct { - unsigned int head; /* Position of head pointer */ - unsigned int wrap; /* Primary DMA wrap count */ + unsigned int head; /* Position of head pointer */ + unsigned int wrap; /* Primary DMA wrap count */ } drm_mga_age_t; typedef struct _drm_mga_sarea { /* The channel for communication of state information to the kernel * on firing a vertex dma buffer. */ - drm_mga_context_regs_t context_state; - drm_mga_server_regs_t server_state; - drm_mga_texture_regs_t tex_state[2]; - unsigned int warp_pipe; - unsigned int dirty; - unsigned int vertsize; + drm_mga_context_regs_t context_state; + drm_mga_server_regs_t server_state; + drm_mga_texture_regs_t tex_state[2]; + unsigned int warp_pipe; + unsigned int dirty; + unsigned int vertsize; /* The current cliprects, or a subset thereof. */ - drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; - unsigned int nbox; + drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; + unsigned int nbox; /* Information about the most recently used 3d drawable. The * client fills in the req_* fields, the server fills in the @@ -192,18 +191,18 @@ typedef struct _drm_mga_sarea { * The client clears the exported_drawable field before * clobbering the boxes data. */ - unsigned int req_drawable; /* the X drawable id */ - unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ + unsigned int req_drawable; /* the X drawable id */ + unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ - unsigned int exported_drawable; + unsigned int exported_drawable; unsigned int exported_index; - unsigned int exported_stamp; - unsigned int exported_buffers; - unsigned int exported_nfront; - unsigned int exported_nback; + unsigned int exported_stamp; + unsigned int exported_buffers; + unsigned int exported_nfront; + unsigned int exported_nback; int exported_back_x, exported_front_x, exported_w; int exported_back_y, exported_front_y, exported_h; - drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; + drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; /* Counters for aging textures and for client-side throttling. */ @@ -211,21 +210,20 @@ typedef struct _drm_mga_sarea { unsigned int last_wrap; drm_mga_age_t last_frame; - unsigned int last_enqueue; /* last time a buffer was enqueued */ + unsigned int last_enqueue; /* last time a buffer was enqueued */ unsigned int last_dispatch; /* age of the most recently dispatched buffer */ - unsigned int last_quiescent; /* */ + unsigned int last_quiescent; /* */ /* LRU lists for texture memory in agp space and on the card. */ - drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; + drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1]; unsigned int texAge[MGA_NR_TEX_HEAPS]; /* Mechanism to validate card state. */ - int ctxOwner; + int ctxOwner; } drm_mga_sarea_t; - /* MGA specific ioctls * The device specific ioctl range is 0x40 to 0x79. */ @@ -247,7 +245,6 @@ typedef struct _drm_mga_sarea { #define DRM_MGA_WAIT_FENCE 0x0b #define DRM_MGA_DMA_BOOTSTRAP 0x0c - #define DRM_IOCTL_MGA_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_INIT, drm_mga_init_t) #define DRM_IOCTL_MGA_FLUSH DRM_IOW( DRM_COMMAND_BASE + DRM_MGA_FLUSH, drm_lock_t) #define DRM_IOCTL_MGA_RESET DRM_IO( DRM_COMMAND_BASE + DRM_MGA_RESET) @@ -263,33 +260,33 @@ typedef struct _drm_mga_sarea { #define DRM_IOCTL_MGA_DMA_BOOTSTRAP DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_DMA_BOOTSTRAP, drm_mga_dma_bootstrap_t) typedef struct _drm_mga_warp_index { - int installed; - unsigned long phys_addr; - int size; + int installed; + unsigned long phys_addr; + int size; } drm_mga_warp_index_t; typedef struct drm_mga_init { - enum { - MGA_INIT_DMA = 0x01, - MGA_CLEANUP_DMA = 0x02 + enum { + MGA_INIT_DMA = 0x01, + MGA_CLEANUP_DMA = 0x02 } func; - unsigned long sarea_priv_offset; + unsigned long sarea_priv_offset; int chipset; - int sgram; + int sgram; unsigned int maccess; - unsigned int fb_cpp; + unsigned int fb_cpp; unsigned int front_offset, front_pitch; - unsigned int back_offset, back_pitch; + unsigned int back_offset, back_pitch; - unsigned int depth_cpp; - unsigned int depth_offset, depth_pitch; + unsigned int depth_cpp; + unsigned int depth_offset, depth_pitch; - unsigned int texture_offset[MGA_NR_TEX_HEAPS]; - unsigned int texture_size[MGA_NR_TEX_HEAPS]; + unsigned int texture_offset[MGA_NR_TEX_HEAPS]; + unsigned int texture_size[MGA_NR_TEX_HEAPS]; unsigned long fb_offset; unsigned long mmio_offset; @@ -302,64 +299,59 @@ typedef struct drm_mga_init { typedef struct drm_mga_dma_bootstrap { /** * \name AGP texture region - * + * * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, these fields will * be filled in with the actual AGP texture settings. - * + * * \warning * If these fields are non-zero, but dma_mga_dma_bootstrap::agp_mode * is zero, it means that PCI memory (most likely through the use of * an IOMMU) is being used for "AGP" textures. */ - /*@{*/ + /*@{ */ unsigned long texture_handle; /**< Handle used to map AGP textures. */ - uint32_t texture_size; /**< Size of the AGP texture region. */ - /*@}*/ - + uint32_t texture_size; /**< Size of the AGP texture region. */ + /*@} */ /** * Requested size of the primary DMA region. - * + * * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be * filled in with the actual AGP mode. If AGP was not available */ uint32_t primary_size; - /** * Requested number of secondary DMA buffers. - * + * * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be * filled in with the actual number of secondary DMA buffers * allocated. Particularly when PCI DMA is used, this may be * (subtantially) less than the number requested. */ uint32_t secondary_bin_count; - - + /** * Requested size of each secondary DMA buffer. - * + * * While the kernel \b is free to reduce * dma_mga_dma_bootstrap::secondary_bin_count, it is \b not allowed * to reduce dma_mga_dma_bootstrap::secondary_bin_size. */ uint32_t secondary_bin_size; - /** * Bit-wise mask of AGPSTAT2_* values. Currently only \c AGPSTAT2_1X, * \c AGPSTAT2_2X, and \c AGPSTAT2_4X are supported. If this value is * zero, it means that PCI DMA should be used, even if AGP is * possible. - * + * * On return from the DRM_MGA_DMA_BOOTSTRAP ioctl, this field will be * filled in with the actual AGP mode. If AGP was not available * (i.e., PCI DMA was used), this value will be zero. */ uint32_t agp_mode; - /** * Desired AGP GART size, measured in megabytes. */ @@ -375,16 +367,16 @@ typedef struct drm_mga_clear { } drm_mga_clear_t; typedef struct drm_mga_vertex { - int idx; /* buffer to queue */ - int used; /* bytes in use */ - int discard; /* client finished with buffer? */ + int idx; /* buffer to queue */ + int used; /* bytes in use */ + int discard; /* client finished with buffer? */ } drm_mga_vertex_t; typedef struct drm_mga_indices { - int idx; /* buffer to queue */ + int idx; /* buffer to queue */ unsigned int start; unsigned int end; - int discard; /* client finished with buffer? */ + int discard; /* client finished with buffer? */ } drm_mga_indices_t; typedef struct drm_mga_iload { @@ -400,12 +392,12 @@ typedef struct _drm_mga_blit { int src_pitch, dst_pitch; int delta_sx, delta_sy; int delta_dx, delta_dy; - int height, ydir; /* flip image vertically */ + int height, ydir; /* flip image vertically */ int source_pitch, dest_pitch; } drm_mga_blit_t; /* 3.1: An ioctl to get parameters that aren't available to the 3d - * client any other way. + * client any other way. */ #define MGA_PARAM_IRQ_NR 1 |