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-rw-r--r--drivers/char/drm/ati_pcigart.c102
-rw-r--r--drivers/char/drm/drmP.h3
-rw-r--r--drivers/char/drm/drm_fops.c7
-rw-r--r--drivers/char/drm/drm_lock.c35
-rw-r--r--drivers/char/drm/drm_pciids.h7
-rw-r--r--drivers/char/drm/drm_scatter.c11
-rw-r--r--drivers/char/drm/drm_vm.c20
-rw-r--r--drivers/char/drm/i915_dma.c3
-rw-r--r--drivers/char/drm/r128_cce.c1
-rw-r--r--drivers/char/drm/r300_cmdbuf.c54
-rw-r--r--drivers/char/drm/radeon_cp.c1
-rw-r--r--drivers/char/drm/radeon_drm.h12
-rw-r--r--drivers/char/drm/radeon_mem.c8
-rw-r--r--drivers/char/drm/via_dma.c59
-rw-r--r--drivers/char/drm/via_dmablit.c2
-rw-r--r--drivers/char/hw_random/Kconfig9
-rw-r--r--drivers/char/ip2/i2lib.c12
-rw-r--r--drivers/char/n_tty.c2
-rw-r--r--drivers/char/nozomi.c20
-rw-r--r--drivers/char/rio/riotable.c4
-rw-r--r--drivers/char/rio/riotty.c4
-rw-r--r--drivers/char/rocket.c37
-rw-r--r--drivers/char/rocket_int.h83
23 files changed, 294 insertions, 202 deletions
diff --git a/drivers/char/drm/ati_pcigart.c b/drivers/char/drm/ati_pcigart.c
index d352dbb4ccf..141f4dfa0a1 100644
--- a/drivers/char/drm/ati_pcigart.c
+++ b/drivers/char/drm/ati_pcigart.c
@@ -35,42 +35,23 @@
# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
-static void *drm_ati_alloc_pcigart_table(int order)
+static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
+ struct drm_ati_pcigart_info *gart_info)
{
- unsigned long address;
- struct page *page;
- int i;
-
- DRM_DEBUG("%d order\n", order);
-
- address = __get_free_pages(GFP_KERNEL | __GFP_COMP,
- order);
- if (address == 0UL) {
- return NULL;
- }
-
- page = virt_to_page(address);
-
- for (i = 0; i < order; i++, page++)
- SetPageReserved(page);
+ gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
+ PAGE_SIZE,
+ gart_info->table_mask);
+ if (gart_info->table_handle == NULL)
+ return -ENOMEM;
- DRM_DEBUG("returning 0x%08lx\n", address);
- return (void *)address;
+ return 0;
}
-static void drm_ati_free_pcigart_table(void *address, int order)
+static void drm_ati_free_pcigart_table(struct drm_device *dev,
+ struct drm_ati_pcigart_info *gart_info)
{
- struct page *page;
- int i;
- int num_pages = 1 << order;
- DRM_DEBUG("\n");
-
- page = virt_to_page((unsigned long)address);
-
- for (i = 0; i < num_pages; i++, page++)
- ClearPageReserved(page);
-
- free_pages((unsigned long)address, order);
+ drm_pci_free(dev, gart_info->table_handle);
+ gart_info->table_handle = NULL;
}
int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
@@ -78,8 +59,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
struct drm_sg_mem *entry = dev->sg;
unsigned long pages;
int i;
- int order;
- int num_pages, max_pages;
+ int max_pages;
/* we need to support large memory configurations */
if (!entry) {
@@ -87,15 +67,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
return 0;
}
- order = drm_order((gart_info->table_size + (PAGE_SIZE-1)) / PAGE_SIZE);
- num_pages = 1 << order;
-
if (gart_info->bus_addr) {
- if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
- pci_unmap_single(dev->pdev, gart_info->bus_addr,
- num_pages * PAGE_SIZE,
- PCI_DMA_TODEVICE);
- }
max_pages = (gart_info->table_size / sizeof(u32));
pages = (entry->pages <= max_pages)
@@ -112,10 +84,9 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
gart_info->bus_addr = 0;
}
- if (gart_info->gart_table_location == DRM_ATI_GART_MAIN
- && gart_info->addr) {
- drm_ati_free_pcigart_table(gart_info->addr, order);
- gart_info->addr = NULL;
+ if (gart_info->gart_table_location == DRM_ATI_GART_MAIN &&
+ gart_info->table_handle) {
+ drm_ati_free_pcigart_table(dev, gart_info);
}
return 1;
@@ -127,11 +98,10 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
struct drm_sg_mem *entry = dev->sg;
void *address = NULL;
unsigned long pages;
- u32 *pci_gart, page_base, bus_address = 0;
+ u32 *pci_gart, page_base;
+ dma_addr_t bus_address = 0;
int i, j, ret = 0;
- int order;
int max_pages;
- int num_pages;
if (!entry) {
DRM_ERROR("no scatter/gather memory!\n");
@@ -141,36 +111,20 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
- order = drm_order((gart_info->table_size +
- (PAGE_SIZE-1)) / PAGE_SIZE);
- num_pages = 1 << order;
- address = drm_ati_alloc_pcigart_table(order);
- if (!address) {
+ ret = drm_ati_alloc_pcigart_table(dev, gart_info);
+ if (ret) {
DRM_ERROR("cannot allocate PCI GART page!\n");
goto done;
}
- if (!dev->pdev) {
- DRM_ERROR("PCI device unknown!\n");
- goto done;
- }
-
- bus_address = pci_map_single(dev->pdev, address,
- num_pages * PAGE_SIZE,
- PCI_DMA_TODEVICE);
- if (bus_address == 0) {
- DRM_ERROR("unable to map PCIGART pages!\n");
- order = drm_order((gart_info->table_size +
- (PAGE_SIZE-1)) / PAGE_SIZE);
- drm_ati_free_pcigart_table(address, order);
- address = NULL;
- goto done;
- }
+ address = gart_info->table_handle->vaddr;
+ bus_address = gart_info->table_handle->busaddr;
} else {
address = gart_info->addr;
bus_address = gart_info->bus_addr;
- DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n",
- bus_address, (unsigned long)address);
+ DRM_DEBUG("PCI: Gart Table: VRAM %08LX mapped at %08lX\n",
+ (unsigned long long)bus_address,
+ (unsigned long)address);
}
pci_gart = (u32 *) address;
@@ -214,6 +168,12 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
}
}
+ if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
+ dma_sync_single_for_device(&dev->pdev->dev,
+ bus_address,
+ max_pages * sizeof(u32),
+ PCI_DMA_TODEVICE);
+
ret = 1;
#if defined(__i386__) || defined(__x86_64__)
diff --git a/drivers/char/drm/drmP.h b/drivers/char/drm/drmP.h
index a6789f25009..8ea9dd1717a 100644
--- a/drivers/char/drm/drmP.h
+++ b/drivers/char/drm/drmP.h
@@ -54,6 +54,7 @@
#include <linux/pci.h>
#include <linux/jiffies.h>
#include <linux/smp_lock.h> /* For (un)lock_kernel */
+#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/cdev.h>
#include <linux/mutex.h>
@@ -551,6 +552,8 @@ struct drm_ati_pcigart_info {
int gart_reg_if;
void *addr;
dma_addr_t bus_addr;
+ dma_addr_t table_mask;
+ struct drm_dma_handle *table_handle;
drm_local_map_t mapping;
int table_size;
};
diff --git a/drivers/char/drm/drm_fops.c b/drivers/char/drm/drm_fops.c
index 3992f73299c..f09d4b5002b 100644
--- a/drivers/char/drm/drm_fops.c
+++ b/drivers/char/drm/drm_fops.c
@@ -326,6 +326,7 @@ int drm_release(struct inode *inode, struct file *filp)
struct drm_file *file_priv = filp->private_data;
struct drm_device *dev = file_priv->head->dev;
int retcode = 0;
+ unsigned long irqflags;
lock_kernel();
@@ -357,9 +358,11 @@ int drm_release(struct inode *inode, struct file *filp)
*/
do{
- spin_lock(&dev->lock.spinlock);
+ spin_lock_irqsave(&dev->lock.spinlock,
+ irqflags);
locked = dev->lock.idle_has_lock;
- spin_unlock(&dev->lock.spinlock);
+ spin_unlock_irqrestore(&dev->lock.spinlock,
+ irqflags);
if (locked)
break;
schedule();
diff --git a/drivers/char/drm/drm_lock.c b/drivers/char/drm/drm_lock.c
index bea2a7d5b2b..12dcdd1832f 100644
--- a/drivers/char/drm/drm_lock.c
+++ b/drivers/char/drm/drm_lock.c
@@ -53,6 +53,7 @@ int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
DECLARE_WAITQUEUE(entry, current);
struct drm_lock *lock = data;
int ret = 0;
+ unsigned long irqflags;
++file_priv->lock_count;
@@ -71,9 +72,9 @@ int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
return -EINVAL;
add_wait_queue(&dev->lock.lock_queue, &entry);
- spin_lock(&dev->lock.spinlock);
+ spin_lock_irqsave(&dev->lock.spinlock, irqflags);
dev->lock.user_waiters++;
- spin_unlock(&dev->lock.spinlock);
+ spin_unlock_irqrestore(&dev->lock.spinlock, irqflags);
for (;;) {
__set_current_state(TASK_INTERRUPTIBLE);
if (!dev->lock.hw_lock) {
@@ -95,9 +96,9 @@ int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
break;
}
}
- spin_lock(&dev->lock.spinlock);
+ spin_lock_irqsave(&dev->lock.spinlock, irqflags);
dev->lock.user_waiters--;
- spin_unlock(&dev->lock.spinlock);
+ spin_unlock_irqrestore(&dev->lock.spinlock, irqflags);
__set_current_state(TASK_RUNNING);
remove_wait_queue(&dev->lock.lock_queue, &entry);
@@ -198,8 +199,9 @@ int drm_lock_take(struct drm_lock_data *lock_data,
{
unsigned int old, new, prev;
volatile unsigned int *lock = &lock_data->hw_lock->lock;
+ unsigned long irqflags;
- spin_lock(&lock_data->spinlock);
+ spin_lock_irqsave(&lock_data->spinlock, irqflags);
do {
old = *lock;
if (old & _DRM_LOCK_HELD)
@@ -211,7 +213,7 @@ int drm_lock_take(struct drm_lock_data *lock_data,
}
prev = cmpxchg(lock, old, new);
} while (prev != old);
- spin_unlock(&lock_data->spinlock);
+ spin_unlock_irqrestore(&lock_data->spinlock, irqflags);
if (_DRM_LOCKING_CONTEXT(old) == context) {
if (old & _DRM_LOCK_HELD) {
@@ -272,15 +274,16 @@ int drm_lock_free(struct drm_lock_data *lock_data, unsigned int context)
{
unsigned int old, new, prev;
volatile unsigned int *lock = &lock_data->hw_lock->lock;
+ unsigned long irqflags;
- spin_lock(&lock_data->spinlock);
+ spin_lock_irqsave(&lock_data->spinlock, irqflags);
if (lock_data->kernel_waiters != 0) {
drm_lock_transfer(lock_data, 0);
lock_data->idle_has_lock = 1;
- spin_unlock(&lock_data->spinlock);
+ spin_unlock_irqrestore(&lock_data->spinlock, irqflags);
return 1;
}
- spin_unlock(&lock_data->spinlock);
+ spin_unlock_irqrestore(&lock_data->spinlock, irqflags);
do {
old = *lock;
@@ -344,19 +347,20 @@ static int drm_notifier(void *priv)
void drm_idlelock_take(struct drm_lock_data *lock_data)
{
int ret = 0;
+ unsigned long irqflags;
- spin_lock(&lock_data->spinlock);
+ spin_lock_irqsave(&lock_data->spinlock, irqflags);
lock_data->kernel_waiters++;
if (!lock_data->idle_has_lock) {
- spin_unlock(&lock_data->spinlock);
+ spin_unlock_irqrestore(&lock_data->spinlock, irqflags);
ret = drm_lock_take(lock_data, DRM_KERNEL_CONTEXT);
- spin_lock(&lock_data->spinlock);
+ spin_lock_irqsave(&lock_data->spinlock, irqflags);
if (ret == 1)
lock_data->idle_has_lock = 1;
}
- spin_unlock(&lock_data->spinlock);
+ spin_unlock_irqrestore(&lock_data->spinlock, irqflags);
}
EXPORT_SYMBOL(drm_idlelock_take);
@@ -364,8 +368,9 @@ void drm_idlelock_release(struct drm_lock_data *lock_data)
{
unsigned int old, prev;
volatile unsigned int *lock = &lock_data->hw_lock->lock;
+ unsigned long irqflags;
- spin_lock(&lock_data->spinlock);
+ spin_lock_irqsave(&lock_data->spinlock, irqflags);
if (--lock_data->kernel_waiters == 0) {
if (lock_data->idle_has_lock) {
do {
@@ -376,7 +381,7 @@ void drm_idlelock_release(struct drm_lock_data *lock_data)
lock_data->idle_has_lock = 0;
}
}
- spin_unlock(&lock_data->spinlock);
+ spin_unlock_irqrestore(&lock_data->spinlock, irqflags);
}
EXPORT_SYMBOL(drm_idlelock_release);
diff --git a/drivers/char/drm/drm_pciids.h b/drivers/char/drm/drm_pciids.h
index 715b361f0c2..a6a499f97e2 100644
--- a/drivers/char/drm/drm_pciids.h
+++ b/drivers/char/drm/drm_pciids.h
@@ -205,9 +205,9 @@
{0x1002, 0x71D6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
{0x1002, 0x71DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \
{0x1002, 0x71DE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
- {0x1002, 0x7200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_NEW_MEMMAP}, \
- {0x1002, 0x7210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
- {0x1002, 0x7211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
+ {0x1002, 0x7200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_NEW_MEMMAP}, \
+ {0x1002, 0x7210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
+ {0x1002, 0x7211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
{0x1002, 0x7240, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \
{0x1002, 0x7243, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \
{0x1002, 0x7244, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_R580|RADEON_NEW_MEMMAP}, \
@@ -238,6 +238,7 @@
{0x1002, 0x7834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_NEW_MEMMAP}, \
{0x1002, 0x7835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
{0x1002, 0x791e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
+ {0x1002, 0x791f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART}, \
{0, 0, 0}
#define r128_PCI_IDS \
diff --git a/drivers/char/drm/drm_scatter.c b/drivers/char/drm/drm_scatter.c
index 26d8f675ed5..b2b0f3d4171 100644
--- a/drivers/char/drm/drm_scatter.c
+++ b/drivers/char/drm/drm_scatter.c
@@ -36,6 +36,15 @@
#define DEBUG_SCATTER 0
+static inline void *drm_vmalloc_dma(unsigned long size)
+{
+#if defined(__powerpc__) && defined(CONFIG_NOT_COHERENT_CACHE)
+ return __vmalloc(size, GFP_KERNEL, PAGE_KERNEL | _PAGE_NO_CACHE);
+#else
+ return vmalloc_32(size);
+#endif
+}
+
void drm_sg_cleanup(struct drm_sg_mem * entry)
{
struct page *page;
@@ -104,7 +113,7 @@ int drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather * request)
}
memset((void *)entry->busaddr, 0, pages * sizeof(*entry->busaddr));
- entry->virtual = vmalloc_32(pages << PAGE_SHIFT);
+ entry->virtual = drm_vmalloc_dma(pages << PAGE_SHIFT);
if (!entry->virtual) {
drm_free(entry->busaddr,
entry->pages * sizeof(*entry->busaddr), DRM_MEM_PAGES);
diff --git a/drivers/char/drm/drm_vm.c b/drivers/char/drm/drm_vm.c
index 3d65c4dcd0c..945df72a51a 100644
--- a/drivers/char/drm/drm_vm.c
+++ b/drivers/char/drm/drm_vm.c
@@ -54,13 +54,24 @@ static pgprot_t drm_io_prot(uint32_t map_type, struct vm_area_struct *vma)
pgprot_val(tmp) |= _PAGE_NO_CACHE;
if (map_type == _DRM_REGISTERS)
pgprot_val(tmp) |= _PAGE_GUARDED;
-#endif
-#if defined(__ia64__)
+#elif defined(__ia64__)
if (efi_range_is_wc(vma->vm_start, vma->vm_end -
vma->vm_start))
tmp = pgprot_writecombine(tmp);
else
tmp = pgprot_noncached(tmp);
+#elif defined(__sparc__)
+ tmp = pgprot_noncached(tmp);
+#endif
+ return tmp;
+}
+
+static pgprot_t drm_dma_prot(uint32_t map_type, struct vm_area_struct *vma)
+{
+ pgprot_t tmp = vm_get_page_prot(vma->vm_flags);
+
+#if defined(__powerpc__) && defined(CONFIG_NOT_COHERENT_CACHE)
+ tmp |= _PAGE_NO_CACHE;
#endif
return tmp;
}
@@ -603,9 +614,6 @@ static int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
offset = dev->driver->get_reg_ofs(dev);
vma->vm_flags |= VM_IO; /* not in core dump */
vma->vm_page_prot = drm_io_prot(map->type, vma);
-#ifdef __sparc__
- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
-#endif
if (io_remap_pfn_range(vma, vma->vm_start,
(map->offset + offset) >> PAGE_SHIFT,
vma->vm_end - vma->vm_start,
@@ -624,6 +632,7 @@ static int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
page_to_pfn(virt_to_page(map->handle)),
vma->vm_end - vma->vm_start, vma->vm_page_prot))
return -EAGAIN;
+ vma->vm_page_prot = drm_dma_prot(map->type, vma);
/* fall through to _DRM_SHM */
case _DRM_SHM:
vma->vm_ops = &drm_vm_shm_ops;
@@ -631,6 +640,7 @@ static int drm_mmap_locked(struct file *filp, struct vm_area_struct *vma)
/* Don't let this area swap. Change when
DRM_KERNEL advisory is supported. */
vma->vm_flags |= VM_RESERVED;
+ vma->vm_page_prot = drm_dma_prot(map->type, vma);
break;
case _DRM_SCATTER_GATHER:
vma->vm_ops = &drm_vm_sg_ops;
diff --git a/drivers/char/drm/i915_dma.c b/drivers/char/drm/i915_dma.c
index e9d6663bec7..a043bb12301 100644
--- a/drivers/char/drm/i915_dma.c
+++ b/drivers/char/drm/i915_dma.c
@@ -804,6 +804,9 @@ void i915_driver_lastclose(struct drm_device * dev)
{
drm_i915_private_t *dev_priv = dev->dev_private;
+ if (!dev_priv)
+ return;
+
if (dev_priv->agp_heap)
i915_mem_takedown(&(dev_priv->agp_heap));
diff --git a/drivers/char/drm/r128_cce.c b/drivers/char/drm/r128_cce.c
index 892e0a58984..f36adbd3aaf 100644
--- a/drivers/char/drm/r128_cce.c
+++ b/drivers/char/drm/r128_cce.c
@@ -558,6 +558,7 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
#if __OS_HAS_AGP
if (dev_priv->is_pci) {
#endif
+ dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN;
dev_priv->gart_info.table_size = R128_PCIGART_TABLE_SIZE;
dev_priv->gart_info.addr = NULL;
diff --git a/drivers/char/drm/r300_cmdbuf.c b/drivers/char/drm/r300_cmdbuf.c
index 0f4afc44245..f535812e405 100644
--- a/drivers/char/drm/r300_cmdbuf.c
+++ b/drivers/char/drm/r300_cmdbuf.c
@@ -729,6 +729,47 @@ static void r300_discard_buffer(struct drm_device * dev, struct drm_buf * buf)
buf->used = 0;
}
+static void r300_cmd_wait(drm_radeon_private_t * dev_priv,
+ drm_r300_cmd_header_t header)
+{
+ u32 wait_until;
+ RING_LOCALS;
+
+ if (!header.wait.flags)
+ return;
+
+ wait_until = 0;
+
+ switch(header.wait.flags) {
+ case R300_WAIT_2D:
+ wait_until = RADEON_WAIT_2D_IDLE;
+ break;
+ case R300_WAIT_3D:
+ wait_until = RADEON_WAIT_3D_IDLE;
+ break;
+ case R300_NEW_WAIT_2D_3D:
+ wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_3D_IDLE;
+ break;
+ case R300_NEW_WAIT_2D_2D_CLEAN:
+ wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_2D_IDLECLEAN;
+ break;
+ case R300_NEW_WAIT_3D_3D_CLEAN:
+ wait_until = RADEON_WAIT_3D_IDLE|RADEON_WAIT_3D_IDLECLEAN;
+ break;
+ case R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN:
+ wait_until = RADEON_WAIT_2D_IDLE|RADEON_WAIT_2D_IDLECLEAN;
+ wait_until |= RADEON_WAIT_3D_IDLE|RADEON_WAIT_3D_IDLECLEAN;
+ break;
+ default:
+ return;
+ }
+
+ BEGIN_RING(2);
+ OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
+ OUT_RING(wait_until);
+ ADVANCE_RING();
+}
+
static int r300_scratch(drm_radeon_private_t *dev_priv,
drm_radeon_kcmd_buffer_t *cmdbuf,
drm_r300_cmd_header_t header)
@@ -909,19 +950,8 @@ int r300_do_cp_cmdbuf(struct drm_device *dev,
break;
case R300_CMD_WAIT:
- /* simple enough, we can do it here */
DRM_DEBUG("R300_CMD_WAIT\n");
- if (header.wait.flags == 0)
- break; /* nothing to do */
-
- {
- RING_LOCALS;
-
- BEGIN_RING(2);
- OUT_RING(CP_PACKET0(RADEON_WAIT_UNTIL, 0));
- OUT_RING((header.wait.flags & 0xf) << 14);
- ADVANCE_RING();
- }
+ r300_cmd_wait(dev_priv, header);
break;
case R300_CMD_SCRATCH:
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 833abc7e55f..9072e4a1894 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -1807,6 +1807,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
} else
#endif
{
+ dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
/* if we have an offset set from userspace */
if (dev_priv->pcigart_offset_set) {
dev_priv->gart_info.bus_addr =
diff --git a/drivers/char/drm/radeon_drm.h b/drivers/char/drm/radeon_drm.h
index 71e5b21fad2..aab82e121e0 100644
--- a/drivers/char/drm/radeon_drm.h
+++ b/drivers/char/drm/radeon_drm.h
@@ -225,8 +225,20 @@ typedef union {
#define R300_CMD_WAIT 7
# define R300_WAIT_2D 0x1
# define R300_WAIT_3D 0x2
+/* these two defines are DOING IT WRONG - however
+ * we have userspace which relies on using these.
+ * The wait interface is backwards compat new
+ * code should use the NEW_WAIT defines below
+ * THESE ARE NOT BIT FIELDS
+ */
# define R300_WAIT_2D_CLEAN 0x3
# define R300_WAIT_3D_CLEAN 0x4
+
+# define R300_NEW_WAIT_2D_3D 0x3
+# define R300_NEW_WAIT_2D_2D_CLEAN 0x4
+# define R300_NEW_WAIT_3D_3D_CLEAN 0x6
+# define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN 0x8
+
#define R300_CMD_SCRATCH 8
typedef union {
diff --git a/drivers/char/drm/radeon_mem.c b/drivers/char/drm/radeon_mem.c
index 78b34fa7c89..4af5286a36f 100644
--- a/drivers/char/drm/radeon_mem.c
+++ b/drivers/char/drm/radeon_mem.c
@@ -88,7 +88,7 @@ static struct mem_block *alloc_block(struct mem_block *heap, int size,
list_for_each(p, heap) {
int start = (p->start + mask) & ~mask;
- if (p->file_priv == 0 && start + size <= p->start + p->size)
+ if (p->file_priv == NULL && start + size <= p->start + p->size)
return split_block(p, start, size, file_priv);
}
@@ -113,7 +113,7 @@ static void free_block(struct mem_block *p)
/* Assumes a single contiguous range. Needs a special file_priv in
* 'heap' to stop it being subsumed.
*/
- if (p->next->file_priv == 0) {
+ if (p->next->file_priv == NULL) {
struct mem_block *q = p->next;
p->size += q->size;
p->next = q->next;
@@ -121,7 +121,7 @@ static void free_block(struct mem_block *p)
drm_free(q, sizeof(*q), DRM_MEM_BUFS);
}
- if (p->prev->file_priv == 0) {
+ if (p->prev->file_priv == NULL) {
struct mem_block *q = p->prev;
q->size += p->size;
q->next = p->next;
@@ -174,7 +174,7 @@ void radeon_mem_release(struct drm_file *file_priv, struct mem_block *heap)
* 'heap' to stop it being subsumed.
*/
list_for_each(p, heap) {
- while (p->file_priv == 0 && p->next->file_priv == 0) {
+ while (p->file_priv == NULL && p->next->file_priv == NULL) {
struct mem_block *q = p->next;
p->size += q->size;
p->next = q->next;
diff --git a/drivers/char/drm/via_dma.c b/drivers/char/drm/via_dma.c
index 94baec692b5..7a339dba6a6 100644
--- a/drivers/char/drm/via_dma.c
+++ b/drivers/char/drm/via_dma.c
@@ -126,6 +126,8 @@ via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size)
hw_addr, cur_addr, next_addr);
return -1;
}
+ if ((cur_addr < hw_addr) && (next_addr >= hw_addr))
+ msleep(1);
} while ((cur_addr < hw_addr) && (next_addr >= hw_addr));
return 0;
}
@@ -416,27 +418,50 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
int paused, count;
volatile uint32_t *paused_at = dev_priv->last_pause_ptr;
uint32_t reader,ptr;
+ uint32_t diff;
paused = 0;
via_flush_write_combine();
(void) *(volatile uint32_t *)(via_get_dma(dev_priv) -1);
+
*paused_at = pause_addr_lo;
via_flush_write_combine();
(void) *paused_at;
+
reader = *(dev_priv->hw_addr_ptr);
ptr = ((volatile char *)paused_at - dev_priv->dma_ptr) +
dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr + 4;
+
dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
- if ((ptr - reader) <= dev_priv->dma_diff ) {
- count = 10000000;
- while (!(paused = (VIA_READ(0x41c) & 0x80000000)) && count--);
+ /*
+ * If there is a possibility that the command reader will
+ * miss the new pause address and pause on the old one,
+ * In that case we need to program the new start address
+ * using PCI.
+ */
+
+ diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
+ count = 10000000;
+ while(diff == 0 && count--) {
+ paused = (VIA_READ(0x41c) & 0x80000000);
+ if (paused)
+ break;
+ reader = *(dev_priv->hw_addr_ptr);
+ diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
}
+ paused = VIA_READ(0x41c) & 0x80000000;
+
if (paused && !no_pci_fire) {
reader = *(dev_priv->hw_addr_ptr);
- if ((ptr - reader) == dev_priv->dma_diff) {
-
+ diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
+ diff &= (dev_priv->dma_high - 1);
+ if (diff != 0 && diff < (dev_priv->dma_high >> 1)) {
+ DRM_ERROR("Paused at incorrect address. "
+ "0x%08x, 0x%08x 0x%08x\n",
+ ptr, reader, dev_priv->dma_diff);
+ } else if (diff == 0) {
/*
* There is a concern that these writes may stall the PCI bus
* if the GPU is not idle. However, idling the GPU first
@@ -577,6 +602,7 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
uint32_t pause_addr_lo, pause_addr_hi;
uint32_t jump_addr_lo, jump_addr_hi;
volatile uint32_t *last_pause_ptr;
+ uint32_t dma_low_save1, dma_low_save2;
agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
via_align_cmd(dev_priv, HC_HAGPBpID_JUMP, 0, &jump_addr_hi,
@@ -603,8 +629,29 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
&pause_addr_lo, 0);
*last_pause_ptr = pause_addr_lo;
+ dma_low_save1 = dev_priv->dma_low;
- via_hook_segment( dev_priv, jump_addr_hi, jump_addr_lo, 0);
+ /*
+ * Now, set a trap that will pause the regulator if it tries to rerun the old
+ * command buffer. (Which may happen if via_hook_segment detecs a command regulator pause
+ * and reissues the jump command over PCI, while the regulator has already taken the jump
+ * and actually paused at the current buffer end).
+ * There appears to be no other way to detect this condition, since the hw_addr_pointer
+ * does not seem to get updated immediately when a jump occurs.
+ */
+
+ last_pause_ptr =
+ via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
+ &pause_addr_lo, 0) - 1;
+ via_align_cmd(dev_priv, HC_HAGPBpID_PAUSE, 0, &pause_addr_hi,
+ &pause_addr_lo, 0);
+ *last_pause_ptr = pause_addr_lo;
+
+ dma_low_save2 = dev_priv->dma_low;
+ dev_priv->dma_low = dma_low_save1;
+ via_hook_segment(dev_priv, jump_addr_hi, jump_addr_lo, 0);
+ dev_priv->dma_low = dma_low_save2;
+ via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0);
}
diff --git a/drivers/char/drm/via_dmablit.c b/drivers/char/drm/via_dmablit.c
index 33c5197b73c..409e00afdd0 100644
--- a/drivers/char/drm/via_dmablit.c
+++ b/drivers/char/drm/via_dmablit.c
@@ -603,7 +603,7 @@ via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmabli
* (Not a big limitation anyway.)
*/
- if ((xfer->mem_stride - xfer->line_length) >= PAGE_SIZE) {
+ if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) {
DRM_ERROR("Too large system memory stride. Stride: %d, "
"Length: %d\n", xfer->mem_stride, xfer->line_length);
return -EINVAL;
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 6bbd4fa50f3..8d6c2089d2a 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -9,7 +9,14 @@ config HW_RANDOM
Hardware Random Number Generator Core infrastructure.
To compile this driver as a module, choose M here: the
- module will be called rng-core.
+ module will be called rng-core. This provides a device
+ that's usually called /dev/hw_random, and which exposes one
+ of possibly several hardware random number generators.
+
+ These hardware random number generators do not feed directly
+ into the kernel's random number generator. That is usually
+ handled by the "rngd" daemon. Documentation/hw_random.txt
+ has more information.
If unsure, say Y.
diff --git a/drivers/char/ip2/i2lib.c b/drivers/char/ip2/i2lib.c
index d6567b32fb5..9c25320121e 100644
--- a/drivers/char/ip2/i2lib.c
+++ b/drivers/char/ip2/i2lib.c
@@ -644,12 +644,12 @@ i2QueueCommands(int type, i2ChanStrPtr pCh, int timeout, int nCommands,
// Normal Expected path - We still hold LOCK
break; /* from for()- Enough room: goto proceed */
}
- }
-
- ip2trace (CHANN, ITRC_QUEUE, 3, 1, totalsize );
+ ip2trace(CHANN, ITRC_QUEUE, 3, 1, totalsize);
+ WRITE_UNLOCK_IRQRESTORE(lock_var_p, flags);
+ } else
+ ip2trace(CHANN, ITRC_QUEUE, 3, 1, totalsize);
- // Prepare to wait for buffers to empty
- WRITE_UNLOCK_IRQRESTORE(lock_var_p,flags);
+ /* Prepare to wait for buffers to empty */
serviceOutgoingFifo(pB); // Dump what we got
if (timeout == 0) {
@@ -1830,6 +1830,8 @@ i2StripFifo(i2eBordStrPtr pB)
default: // Neither packet? should be impossible
ip2trace (ITRC_NO_PORT, ITRC_SFIFO, 5, 1,
PTYPE_OF(pB->i2eLeadoffWord) );
+ WRITE_UNLOCK_IRQRESTORE(&pB->read_fifo_spinlock,
+ bflags);
break;
} // End of switch on type of packets
diff --git a/drivers/char/n_tty.c b/drivers/char/n_tty.c
index 46b2a1cc8b5..0c09409fa45 100644
--- a/drivers/char/n_tty.c
+++ b/drivers/char/n_tty.c
@@ -1183,7 +1183,7 @@ static int copy_from_read_buf(struct tty_struct *tty,
return retval;
}
-extern ssize_t redirected_tty_write(struct file *, const char *,
+extern ssize_t redirected_tty_write(struct file *, const char __user *,
size_t, loff_t *);
/**
diff --git a/drivers/char/nozomi.c b/drivers/char/nozomi.c
index 6d0dc5f9b6b..6a6843a0a67 100644
--- a/drivers/char/nozomi.c
+++ b/drivers/char/nozomi.c
@@ -438,7 +438,7 @@ static void read_mem32(u32 *buf, const void __iomem *mem_addr_start,
u32 size_bytes)
{
u32 i = 0;
- const u32 *ptr = (__force u32 *) mem_addr_start;
+ const u32 __iomem *ptr = mem_addr_start;
u16 *buf16;
if (unlikely(!ptr || !buf))
@@ -448,11 +448,11 @@ static void read_mem32(u32 *buf, const void __iomem *mem_addr_start,
switch (size_bytes) {
case 2: /* 2 bytes */
buf16 = (u16 *) buf;
- *buf16 = __le16_to_cpu(readw((void __iomem *)ptr));
+ *buf16 = __le16_to_cpu(readw(ptr));
goto out;
break;
case 4: /* 4 bytes */
- *(buf) = __le32_to_cpu(readl((void __iomem *)ptr));
+ *(buf) = __le32_to_cpu(readl(ptr));
goto out;
break;
}
@@ -461,11 +461,11 @@ static void read_mem32(u32 *buf, const void __iomem *mem_addr_start,
if (size_bytes - i == 2) {
/* Handle 2 bytes in the end */
buf16 = (u16 *) buf;
- *(buf16) = __le16_to_cpu(readw((void __iomem *)ptr));
+ *(buf16) = __le16_to_cpu(readw(ptr));
i += 2;
} else {
/* Read 4 bytes */
- *(buf) = __le32_to_cpu(readl((void __iomem *)ptr));
+ *(buf) = __le32_to_cpu(readl(ptr));
i += 4;
}
buf++;
@@ -484,7 +484,7 @@ static u32 write_mem32(void __iomem *mem_addr_start, const u32 *buf,
u32 size_bytes)
{
u32 i = 0;
- u32 *ptr = (__force u32 *) mem_addr_start;
+ u32 __iomem *ptr = mem_addr_start;
const u16 *buf16;
if (unlikely(!ptr || !buf))
@@ -494,7 +494,7 @@ static u32 write_mem32(void __iomem *mem_addr_start, const u32 *buf,
switch (size_bytes) {
case 2: /* 2 bytes */
buf16 = (const u16 *)buf;
- writew(__cpu_to_le16(*buf16), (void __iomem *)ptr);
+ writew(__cpu_to_le16(*buf16), ptr);
return 2;
break;
case 1: /*
@@ -502,7 +502,7 @@ static u32 write_mem32(void __iomem *mem_addr_start, const u32 *buf,
* so falling through..
*/
case 4: /* 4 bytes */
- writel(__cpu_to_le32(*buf), (void __iomem *)ptr);
+ writel(__cpu_to_le32(*buf), ptr);
return 4;
break;
}
@@ -511,11 +511,11 @@ static u32 write_mem32(void __iomem *mem_addr_start, const u32 *buf,
if (size_bytes - i == 2) {
/* 2 bytes */
buf16 = (const u16 *)buf;
- writew(__cpu_to_le16(*buf16), (void __iomem *)ptr);
+ writew(__cpu_to_le16(*buf16), ptr);
i += 2;
} else {
/* 4 bytes */
- writel(__cpu_to_le32(*buf), (void __iomem *)ptr);
+ writel(__cpu_to_le32(*buf), ptr);
i += 4;
}
buf++;
diff --git a/drivers/char/rio/riotable.c b/drivers/char/rio/riotable.c
index 991119c9f47..9b52892a501 100644
--- a/drivers/char/rio/riotable.c
+++ b/drivers/char/rio/riotable.c
@@ -425,8 +425,10 @@ int RIOApel(struct rio_info *p)
MapP = &p->RIOConnectTable[Next++];
MapP->HostUniqueNum = HostP->UniqueNum;
- if ((HostP->Flags & RUN_STATE) != RC_RUNNING)
+ if ((HostP->Flags & RUN_STATE) != RC_RUNNING) {
+ rio_spin_unlock_irqrestore(&HostP->HostLock, flags);
continue;
+ }
MapP->RtaUniqueNum = 0;
MapP->ID = 0;
MapP->Flags = SLOT_IN_USE;
diff --git a/drivers/char/rio/riotty.c b/drivers/char/rio/riotty.c
index a4f0b1e3e7f..cfa54361473 100644
--- a/drivers/char/rio/riotty.c
+++ b/drivers/char/rio/riotty.c
@@ -319,6 +319,7 @@ int riotopen(struct tty_struct *tty, struct file *filp)
PortP->State |= RIO_WOPEN;
rio_spin_unlock_irqrestore(&PortP->portSem, flags);
if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) {
+ rio_spin_lock_irqsave(&PortP->portSem, flags);
/*
** ACTION: verify that this is a good thing
** to do here. -- ???
@@ -334,6 +335,7 @@ int riotopen(struct tty_struct *tty, struct file *filp)
func_exit();
return -EINTR;
}
+ rio_spin_lock_irqsave(&PortP->portSem, flags);
}
PortP->State &= ~RIO_WOPEN;
}
@@ -493,6 +495,7 @@ int riotclose(void *ptr)
if (RIOShortCommand(p, PortP, CLOSE, 1, 0) == RIO_FAIL) {
RIOPreemptiveCmd(p, PortP, FCLOSE);
+ rio_spin_lock_irqsave(&PortP->portSem, flags);
goto close_end;
}
@@ -508,6 +511,7 @@ int riotclose(void *ptr)
if (p->RIOHalted) {
RIOClearUp(PortP);
+ rio_spin_lock_irqsave(&PortP->portSem, flags);
goto close_end;
}
if (RIODelay(PortP, HUNDRED_MS) == RIO_FAIL) {
diff --git a/drivers/char/rocket.c b/drivers/char/rocket.c
index 72f289279d8..f585bc8579e 100644
--- a/drivers/char/rocket.c
+++ b/drivers/char/rocket.c
@@ -83,6 +83,7 @@
#include <linux/pci.h>
#include <asm/uaccess.h>
#include <asm/atomic.h>
+#include <asm/unaligned.h>
#include <linux/bitops.h>
#include <linux/spinlock.h>
#include <linux/init.h>
@@ -1312,7 +1313,7 @@ static int rp_tiocmset(struct tty_struct *tty, struct file *file,
if (clear & TIOCM_DTR)
info->channel.TxControl[3] &= ~SET_DTR;
- sOutDW(info->channel.IndexAddr, *(DWord_t *) & (info->channel.TxControl[0]));
+ out32(info->channel.IndexAddr, info->channel.TxControl);
return 0;
}
@@ -1748,7 +1749,7 @@ static int rp_write(struct tty_struct *tty,
/* Write remaining data into the port's xmit_buf */
while (1) {
- if (info->tty == 0) /* Seemingly obligatory check... */
+ if (!info->tty) /* Seemingly obligatory check... */
goto end;
c = min(count, min(XMIT_BUF_SIZE - info->xmit_cnt - 1, XMIT_BUF_SIZE - info->xmit_head));
@@ -2798,7 +2799,7 @@ static int sReadAiopNumChan(WordIO_t io)
static Byte_t R[4] = { 0x00, 0x00, 0x34, 0x12 };
/* write to chan 0 SRAM */
- sOutDW((DWordIO_t) io + _INDX_ADDR, *((DWord_t *) & R[0]));
+ out32((DWordIO_t) io + _INDX_ADDR, R);
sOutW(io + _INDX_ADDR, 0); /* read from SRAM, chan 0 */
x = sInW(io + _INDX_DATA);
sOutW(io + _INDX_ADDR, 0x4000); /* read from SRAM, chan 4 */
@@ -2864,7 +2865,7 @@ static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
R[1] = RData[i + 1] + 0x10 * ChanNum;
R[2] = RData[i + 2];
R[3] = RData[i + 3];
- sOutDW(ChP->IndexAddr, *((DWord_t *) & R[0]));
+ out32(ChP->IndexAddr, R);
}
ChR = ChP->R;
@@ -2887,43 +2888,43 @@ static int sInitChan(CONTROLLER_T * CtlP, CHANNEL_T * ChP, int AiopNum,
ChP->BaudDiv[1] = (Byte_t) ((ChOff + _BAUD) >> 8);
ChP->BaudDiv[2] = (Byte_t) brd9600;
ChP->BaudDiv[3] = (Byte_t) (brd9600 >> 8);
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->BaudDiv[0]);
+ out32(ChP->IndexAddr, ChP->BaudDiv);
ChP->TxControl[0] = (Byte_t) (ChOff + _TX_CTRL);
ChP->TxControl[1] = (Byte_t) ((ChOff + _TX_CTRL) >> 8);
ChP->TxControl[2] = 0;
ChP->TxControl[3] = 0;
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
+ out32(ChP->IndexAddr, ChP->TxControl);
ChP->RxControl[0] = (Byte_t) (ChOff + _RX_CTRL);
ChP->RxControl[1] = (Byte_t) ((ChOff + _RX_CTRL) >> 8);
ChP->RxControl[2] = 0;
ChP->RxControl[3] = 0;
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
+ out32(ChP->IndexAddr, ChP->RxControl);
ChP->TxEnables[0] = (Byte_t) (ChOff + _TX_ENBLS);
ChP->TxEnables[1] = (Byte_t) ((ChOff + _TX_ENBLS) >> 8);
ChP->TxEnables[2] = 0;
ChP->TxEnables[3] = 0;
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxEnables[0]);
+ out32(ChP->IndexAddr, ChP->TxEnables);
ChP->TxCompare[0] = (Byte_t) (ChOff + _TXCMP1);
ChP->TxCompare[1] = (Byte_t) ((ChOff + _TXCMP1) >> 8);
ChP->TxCompare[2] = 0;
ChP->TxCompare[3] = 0;
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxCompare[0]);
+ out32(ChP->IndexAddr, ChP->TxCompare);
ChP->TxReplace1[0] = (Byte_t) (ChOff + _TXREP1B1);
ChP->TxReplace1[1] = (Byte_t) ((ChOff + _TXREP1B1) >> 8);
ChP->TxReplace1[2] = 0;
ChP->TxReplace1[3] = 0;
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxReplace1[0]);
+ out32(ChP->IndexAddr, ChP->TxReplace1);
ChP->TxReplace2[0] = (Byte_t) (ChOff + _TXREP2);
ChP->TxReplace2[1] = (Byte_t) ((ChOff + _TXREP2) >> 8);
ChP->TxReplace2[2] = 0;
ChP->TxReplace2[3] = 0;
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxReplace2[0]);
+ out32(ChP->IndexAddr, ChP->TxReplace2);
ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
ChP->TxFIFO = ChOff + _TX_FIFO;
@@ -2979,7 +2980,7 @@ static void sStopRxProcessor(CHANNEL_T * ChP)
R[1] = ChP->R[1];
R[2] = 0x0a;
R[3] = ChP->R[3];
- sOutDW(ChP->IndexAddr, *(DWord_t *) & R[0]);
+ out32(ChP->IndexAddr, R);
}
/***************************************************************************
@@ -3094,13 +3095,13 @@ static int sWriteTxPrioByte(CHANNEL_T * ChP, Byte_t Data)
*WordPtr = ChP->TxPrioBuf; /* data byte address */
DWBuf[2] = Data; /* data byte value */
- sOutDW(IndexAddr, *((DWord_t *) (&DWBuf[0]))); /* write it out */
+ out32(IndexAddr, DWBuf); /* write it out */
*WordPtr = ChP->TxPrioCnt; /* Tx priority count address */
DWBuf[2] = PRI_PEND + 1; /* indicate 1 byte pending */
DWBuf[3] = 0; /* priority buffer pointer */
- sOutDW(IndexAddr, *((DWord_t *) (&DWBuf[0]))); /* write it out */
+ out32(IndexAddr, DWBuf); /* write it out */
} else { /* write it to Tx FIFO */
sWriteTxByte(sGetTxRxDataIO(ChP), Data);
@@ -3147,11 +3148,11 @@ static void sEnInterrupts(CHANNEL_T * ChP, Word_t Flags)
ChP->RxControl[2] |=
((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
+ out32(ChP->IndexAddr, ChP->RxControl);
ChP->TxControl[2] |= ((Byte_t) Flags & TXINT_EN);
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
+ out32(ChP->IndexAddr, ChP->TxControl);
if (Flags & CHANINT_EN) {
Mask = sInB(ChP->IntMask) | sBitMapSetTbl[ChP->ChanNum];
@@ -3190,9 +3191,9 @@ static void sDisInterrupts(CHANNEL_T * ChP, Word_t Flags)
ChP->RxControl[2] &=
~((Byte_t) Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->RxControl[0]);
+ out32(ChP->IndexAddr, ChP->RxControl);
ChP->TxControl[2] &= ~((Byte_t) Flags & TXINT_EN);
- sOutDW(ChP->IndexAddr, *(DWord_t *) & ChP->TxControl[0]);
+ out32(ChP->IndexAddr, ChP->TxControl);
if (Flags & CHANINT_EN) {
Mask = sInB(ChP->IntMask) & sBitMapClrTbl[ChP->ChanNum];
diff --git a/drivers/char/rocket_int.h b/drivers/char/rocket_int.h
index f3a75791b81..b01d38125a8 100644
--- a/drivers/char/rocket_int.h
+++ b/drivers/char/rocket_int.h
@@ -26,7 +26,6 @@ typedef unsigned int ByteIO_t;
typedef unsigned int Word_t;
typedef unsigned int WordIO_t;
-typedef unsigned long DWord_t;
typedef unsigned int DWordIO_t;
/*
@@ -38,7 +37,6 @@ typedef unsigned int DWordIO_t;
* instruction.
*/
-#ifdef ROCKET_DEBUG_IO
static inline void sOutB(unsigned short port, unsigned char value)
{
#ifdef ROCKET_DEBUG_IO
@@ -55,12 +53,13 @@ static inline void sOutW(unsigned short port, unsigned short value)
outw_p(value, port);
}
-static inline void sOutDW(unsigned short port, unsigned long value)
+static inline void out32(unsigned short port, Byte_t *p)
{
+ u32 value = le32_to_cpu(get_unaligned((__le32 *)p));
#ifdef ROCKET_DEBUG_IO
- printk(KERN_DEBUG "sOutDW(%x, %lx)...\n", port, value);
+ printk(KERN_DEBUG "out32(%x, %lx)...\n", port, value);
#endif
- outl_p(cpu_to_le32(value), port);
+ outl_p(value, port);
}
static inline unsigned char sInB(unsigned short port)
@@ -73,14 +72,6 @@ static inline unsigned short sInW(unsigned short port)
return inw_p(port);
}
-#else /* !ROCKET_DEBUG_IO */
-#define sOutB(a, b) outb_p(b, a)
-#define sOutW(a, b) outw_p(b, a)
-#define sOutDW(port, value) outl_p(cpu_to_le32(value), port)
-#define sInB(a) (inb_p(a))
-#define sInW(a) (inw_p(a))
-#endif /* ROCKET_DEBUG_IO */
-
/* This is used to move arrays of bytes so byte swapping isn't appropriate. */
#define sOutStrW(port, addr, count) if (count) outsw(port, addr, count)
#define sInStrW(port, addr, count) if (count) insw(port, addr, count)
@@ -390,7 +381,7 @@ Call: sClrBreak(ChP)
#define sClrBreak(ChP) \
do { \
(ChP)->TxControl[3] &= ~SETBREAK; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -402,7 +393,7 @@ Call: sClrDTR(ChP)
#define sClrDTR(ChP) \
do { \
(ChP)->TxControl[3] &= ~SET_DTR; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -415,7 +406,7 @@ Call: sClrRTS(ChP)
do { \
if ((ChP)->rtsToggle) break; \
(ChP)->TxControl[3] &= ~SET_RTS; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -489,7 +480,7 @@ Call: sDisCTSFlowCtl(ChP)
#define sDisCTSFlowCtl(ChP) \
do { \
(ChP)->TxControl[2] &= ~CTSFC_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -501,7 +492,7 @@ Call: sDisIXANY(ChP)
#define sDisIXANY(ChP) \
do { \
(ChP)->R[0x0e] = 0x86; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x0c]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \
} while (0)
/***************************************************************************
@@ -515,7 +506,7 @@ Comments: Function sSetParity() can be used in place of functions sEnParity(),
#define sDisParity(ChP) \
do { \
(ChP)->TxControl[2] &= ~PARITY_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -527,7 +518,7 @@ Call: sDisRTSToggle(ChP)
#define sDisRTSToggle(ChP) \
do { \
(ChP)->TxControl[2] &= ~RTSTOG_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
(ChP)->rtsToggle = 0; \
} while (0)
@@ -540,7 +531,7 @@ Call: sDisRxFIFO(ChP)
#define sDisRxFIFO(ChP) \
do { \
(ChP)->R[0x32] = 0x0a; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \
} while (0)
/***************************************************************************
@@ -567,7 +558,7 @@ Call: sDisTransmit(ChP)
#define sDisTransmit(ChP) \
do { \
(ChP)->TxControl[3] &= ~TX_ENABLE; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -579,7 +570,7 @@ Call: sDisTxSoftFlowCtl(ChP)
#define sDisTxSoftFlowCtl(ChP) \
do { \
(ChP)->R[0x06] = 0x8a; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
} while (0)
/***************************************************************************
@@ -604,7 +595,7 @@ Call: sEnCTSFlowCtl(ChP)
#define sEnCTSFlowCtl(ChP) \
do { \
(ChP)->TxControl[2] |= CTSFC_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -616,7 +607,7 @@ Call: sEnIXANY(ChP)
#define sEnIXANY(ChP) \
do { \
(ChP)->R[0x0e] = 0x21; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x0c]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x0c]); \
} while (0)
/***************************************************************************
@@ -633,7 +624,7 @@ Warnings: Before enabling parity odd or even parity should be chosen using
#define sEnParity(ChP) \
do { \
(ChP)->TxControl[2] |= PARITY_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -647,10 +638,10 @@ Comments: This function will disable RTS flow control and clear the RTS
#define sEnRTSToggle(ChP) \
do { \
(ChP)->RxControl[2] &= ~RTSFC_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->RxControl); \
(ChP)->TxControl[2] |= RTSTOG_EN; \
(ChP)->TxControl[3] &= ~SET_RTS; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
(ChP)->rtsToggle = 1; \
} while (0)
@@ -663,7 +654,7 @@ Call: sEnRxFIFO(ChP)
#define sEnRxFIFO(ChP) \
do { \
(ChP)->R[0x32] = 0x08; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x30]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x30]); \
} while (0)
/***************************************************************************
@@ -684,7 +675,7 @@ Warnings: This function must be called after valid microcode has been
#define sEnRxProcessor(ChP) \
do { \
(ChP)->RxControl[2] |= RXPROC_EN; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->RxControl); \
} while (0)
/***************************************************************************
@@ -708,7 +699,7 @@ Call: sEnTransmit(ChP)
#define sEnTransmit(ChP) \
do { \
(ChP)->TxControl[3] |= TX_ENABLE; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -720,7 +711,7 @@ Call: sEnTxSoftFlowCtl(ChP)
#define sEnTxSoftFlowCtl(ChP) \
do { \
(ChP)->R[0x06] = 0xc5; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
} while (0)
/***************************************************************************
@@ -927,7 +918,7 @@ Call: sSendBreak(ChP)
#define sSendBreak(ChP) \
do { \
(ChP)->TxControl[3] |= SETBREAK; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -941,7 +932,7 @@ Call: sSetBaud(ChP,Divisor)
do { \
(ChP)->BaudDiv[2] = (Byte_t)(DIVISOR); \
(ChP)->BaudDiv[3] = (Byte_t)((DIVISOR) >> 8); \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->BaudDiv[0]); \
+ out32((ChP)->IndexAddr,(ChP)->BaudDiv); \
} while (0)
/***************************************************************************
@@ -953,7 +944,7 @@ Call: sSetData7(ChP)
#define sSetData7(ChP) \
do { \
(ChP)->TxControl[2] &= ~DATA8BIT; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -965,7 +956,7 @@ Call: sSetData8(ChP)
#define sSetData8(ChP) \
do { \
(ChP)->TxControl[2] |= DATA8BIT; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -977,7 +968,7 @@ Call: sSetDTR(ChP)
#define sSetDTR(ChP) \
do { \
(ChP)->TxControl[3] |= SET_DTR; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -994,7 +985,7 @@ Warnings: This function has no effect unless parity is enabled with function
#define sSetEvenParity(ChP) \
do { \
(ChP)->TxControl[2] |= EVEN_PAR; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1011,7 +1002,7 @@ Warnings: This function has no effect unless parity is enabled with function
#define sSetOddParity(ChP) \
do { \
(ChP)->TxControl[2] &= ~EVEN_PAR; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1024,7 +1015,7 @@ Call: sSetRTS(ChP)
do { \
if ((ChP)->rtsToggle) break; \
(ChP)->TxControl[3] |= SET_RTS; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1050,7 +1041,7 @@ Comments: An interrupt will be generated when the trigger level is reached
do { \
(ChP)->RxControl[2] &= ~TRIG_MASK; \
(ChP)->RxControl[2] |= LEVEL; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->RxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->RxControl); \
} while (0)
/***************************************************************************
@@ -1062,7 +1053,7 @@ Call: sSetStop1(ChP)
#define sSetStop1(ChP) \
do { \
(ChP)->TxControl[2] &= ~STOP2; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1074,7 +1065,7 @@ Call: sSetStop2(ChP)
#define sSetStop2(ChP) \
do { \
(ChP)->TxControl[2] |= STOP2; \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->TxControl[0]); \
+ out32((ChP)->IndexAddr,(ChP)->TxControl); \
} while (0)
/***************************************************************************
@@ -1087,7 +1078,7 @@ Call: sSetTxXOFFChar(ChP,Ch)
#define sSetTxXOFFChar(ChP,CH) \
do { \
(ChP)->R[0x07] = (CH); \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x04]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x04]); \
} while (0)
/***************************************************************************
@@ -1100,7 +1091,7 @@ Call: sSetTxXONChar(ChP,Ch)
#define sSetTxXONChar(ChP,CH) \
do { \
(ChP)->R[0x0b] = (CH); \
- sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0x08]); \
+ out32((ChP)->IndexAddr,&(ChP)->R[0x08]); \
} while (0)
/***************************************************************************
@@ -1113,7 +1104,7 @@ Comments: This function is used to start a Rx processor after it was
will restart both the Rx processor and software input flow control.
*/
-#define sStartRxProcessor(ChP) sOutDW((ChP)->IndexAddr,*(DWord_t *)&(ChP)->R[0])
+#define sStartRxProcessor(ChP) out32((ChP)->IndexAddr,&(ChP)->R[0])
/***************************************************************************
Function: sWriteTxByte
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-11-15 03:32:07 +0000