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path: root/drivers/gpio/gpio-em.c
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Diffstat (limited to 'drivers/gpio/gpio-em.c')
-rw-r--r--drivers/gpio/gpio-em.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/drivers/gpio/gpio-em.c b/drivers/gpio/gpio-em.c
index ae37181798b..efb4c2d0d13 100644
--- a/drivers/gpio/gpio-em.c
+++ b/drivers/gpio/gpio-em.c
@@ -85,22 +85,16 @@ static inline void em_gio_write(struct em_gio_priv *p, int offs,
iowrite32(value, p->base1 + (offs - GIO_IDT0));
}
-static inline struct em_gio_priv *irq_to_priv(struct irq_data *d)
-{
- struct irq_chip *chip = irq_data_get_irq_chip(d);
- return container_of(chip, struct em_gio_priv, irq_chip);
-}
-
static void em_gio_irq_disable(struct irq_data *d)
{
- struct em_gio_priv *p = irq_to_priv(d);
+ struct em_gio_priv *p = irq_data_get_irq_chip_data(d);
em_gio_write(p, GIO_IDS, BIT(irqd_to_hwirq(d)));
}
static void em_gio_irq_enable(struct irq_data *d)
{
- struct em_gio_priv *p = irq_to_priv(d);
+ struct em_gio_priv *p = irq_data_get_irq_chip_data(d);
em_gio_write(p, GIO_IEN, BIT(irqd_to_hwirq(d)));
}
@@ -118,7 +112,7 @@ static unsigned char em_gio_sense_table[IRQ_TYPE_SENSE_MASK + 1] = {
static int em_gio_irq_set_type(struct irq_data *d, unsigned int type)
{
unsigned char value = em_gio_sense_table[type & IRQ_TYPE_SENSE_MASK];
- struct em_gio_priv *p = irq_to_priv(d);
+ struct em_gio_priv *p = irq_data_get_irq_chip_data(d);
unsigned int reg, offset, shift;
unsigned long flags;
unsigned long tmp;
@@ -247,9 +241,9 @@ static int __devinit em_gio_irq_domain_init(struct em_gio_priv *p)
p->irq_base = irq_alloc_descs(pdata->irq_base, 0,
pdata->number_of_pins, numa_node_id());
- if (IS_ERR_VALUE(p->irq_base)) {
+ if (p->irq_base < 0) {
dev_err(&pdev->dev, "cannot get irq_desc\n");
- return -ENXIO;
+ return p->irq_base;
}
pr_debug("gio: hw base = %d, nr = %d, sw base = %d\n",
pdata->gpio_base, pdata->number_of_pins, p->irq_base);