diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau')
| -rw-r--r-- | drivers/gpu/drm/nouveau/Makefile | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/include/subdev/bios.h | 34 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/include/subdev/bios/bit.h | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/include/subdev/bios/bmp.h | 39 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/os.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/bios/base.c | 451 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/bios/bit.c | 52 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/device/nv04.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/device/nv10.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/device/nv20.c | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/device/nv30.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/device/nv40.c | 17 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/device/nv50.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/device/nve0.c | 3 |
15 files changed, 660 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile index f6927ae8ebe..d10ec93c5ad 100644 --- a/drivers/gpu/drm/nouveau/Makefile +++ b/drivers/gpu/drm/nouveau/Makefile @@ -18,6 +18,8 @@ nouveau-y += core/core/printk.o nouveau-y += core/core/ramht.o nouveau-y += core/core/subdev.o +nouveau-y += core/subdev/bios/base.o +nouveau-y += core/subdev/bios/bit.o nouveau-y += core/subdev/device/base.o nouveau-y += core/subdev/device/nv04.o nouveau-y += core/subdev/device/nv10.o diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/bios.h b/drivers/gpu/drm/nouveau/core/include/subdev/bios.h new file mode 100644 index 00000000000..d145b25e6be --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/include/subdev/bios.h @@ -0,0 +1,34 @@ +#ifndef __NOUVEAU_BIOS_H__ +#define __NOUVEAU_BIOS_H__ + +#include <core/subdev.h> +#include <core/device.h> + +struct nouveau_bios { + struct nouveau_subdev base; + u32 size; + u8 *data; + + u32 bmp_offset; + u32 bit_offset; + + struct { + u8 major; + u8 chip; + u8 minor; + u8 micro; + } version; +}; + +static inline struct nouveau_bios * +nouveau_bios(void *obj) +{ + return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_VBIOS]; +} + +u8 nvbios_checksum(const u8 *data, int size); +u16 nvbios_findstr(const u8 *data, int size, const char *str, int len); + +extern struct nouveau_oclass nouveau_bios_oclass; + +#endif diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/bios/bit.h b/drivers/gpu/drm/nouveau/core/include/subdev/bios/bit.h new file mode 100644 index 00000000000..73f060b0798 --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/include/subdev/bios/bit.h @@ -0,0 +1,13 @@ +#ifndef __NVBIOS_BIT_H__ +#define __NVBIOS_BIT_H__ + +struct bit_entry { + u8 id; + u8 version; + u16 length; + u16 offset; +}; + +int bit_entry(struct nouveau_bios *, u8 id, struct bit_entry *); + +#endif diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/bios/bmp.h b/drivers/gpu/drm/nouveau/core/include/subdev/bios/bmp.h new file mode 100644 index 00000000000..10e4dbca649 --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/include/subdev/bios/bmp.h @@ -0,0 +1,39 @@ +#ifndef __NVBIOS_BMP_H__ +#define __NVBIOS_BMP_H__ + +static inline u16 +bmp_version(struct nouveau_bios *bios) +{ + if (bios->bmp_offset) { + return nv_ro08(bios, bios->bmp_offset + 5) << 8 | + nv_ro08(bios, bios->bmp_offset + 6); + } + + return 0x0000; +} + +static inline u16 +bmp_mem_init_table(struct nouveau_bios *bios) +{ + if (bmp_version(bios) >= 0x0300) + return nv_ro16(bios, bios->bmp_offset + 24); + return 0x0000; +} + +static inline u16 +bmp_sdr_seq_table(struct nouveau_bios *bios) +{ + if (bmp_version(bios) >= 0x0300) + return nv_ro16(bios, bios->bmp_offset + 26); + return 0x0000; +} + +static inline u16 +bmp_ddr_seq_table(struct nouveau_bios *bios) +{ + if (bmp_version(bios) >= 0x0300) + return nv_ro16(bios, bios->bmp_offset + 28); + return 0x0000; +} + +#endif diff --git a/drivers/gpu/drm/nouveau/core/os.h b/drivers/gpu/drm/nouveau/core/os.h index 3bfb478edea..76bdb0efc1e 100644 --- a/drivers/gpu/drm/nouveau/core/os.h +++ b/drivers/gpu/drm/nouveau/core/os.h @@ -18,6 +18,8 @@ #include <asm/unaligned.h> +#include <asm/unaligned.h> + static inline int ffsll(u64 mask) { diff --git a/drivers/gpu/drm/nouveau/core/subdev/bios/base.c b/drivers/gpu/drm/nouveau/core/subdev/bios/base.c new file mode 100644 index 00000000000..e8e46eca947 --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/subdev/bios/base.c @@ -0,0 +1,451 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ + +#include <core/object.h> +#include <core/device.h> +#include <core/subdev.h> +#include <core/option.h> + +#include <subdev/bios.h> +#include <subdev/bios/bmp.h> +#include <subdev/bios/bit.h> + +u8 +nvbios_checksum(const u8 *data, int size) +{ + u8 sum = 0; + while (size--) + sum += *data++; + return sum; +} + +u16 +nvbios_findstr(const u8 *data, int size, const char *str, int len) +{ + int i, j; + + for (i = 0; i <= (size - len); i++) { + for (j = 0; j < len; j++) + if ((char)data[i + j] != str[j]) + break; + if (j == len) + return i; + } + + return 0; +} + +static void +nouveau_bios_shadow_pramin(struct nouveau_bios *bios) +{ + struct nouveau_device *device = nv_device(bios); + u32 bar0 = 0; + int i; + + if (device->card_type >= NV_50) { + u64 addr = (u64)(nv_rd32(bios, 0x619f04) & 0xffffff00) << 8; + if (!addr) { + addr = (u64)nv_rd32(bios, 0x001700) << 16; + addr += 0xf0000; + } + + bar0 = nv_mask(bios, 0x001700, 0xffffffff, addr >> 16); + } + + /* bail if no rom signature */ + if (nv_rd08(bios, 0x700000) != 0x55 || + nv_rd08(bios, 0x700001) != 0xaa) + goto out; + + bios->size = nv_rd08(bios, 0x700002) * 512; + bios->data = kmalloc(bios->size, GFP_KERNEL); + if (bios->data) { + for (i = 0; i < bios->size; i++) + nv_wo08(bios, i, nv_rd08(bios, 0x700000 + i)); + } + +out: + if (device->card_type >= NV_50) + nv_wr32(bios, 0x001700, bar0); +} + +static void +nouveau_bios_shadow_prom(struct nouveau_bios *bios) +{ + struct nouveau_device *device = nv_device(bios); + u32 pcireg, access; + u16 pcir; + int i; + + /* enable access to rom */ + if (device->card_type >= NV_50) + pcireg = 0x088050; + else + pcireg = 0x001850; + access = nv_mask(bios, pcireg, 0x00000001, 0x00000000); + + /* bail if no rom signature, with a workaround for a PROM reading + * issue on some chipsets. the first read after a period of + * inactivity returns the wrong result, so retry the first header + * byte a few times before giving up as a workaround + */ + i = 16; + do { + if (nv_rd08(bios, 0x300000) == 0x55) + break; + } while (i--); + + if (!i || nv_rd08(bios, 0x300001) != 0xaa) + goto out; + + /* additional check (see note below) - read PCI record header */ + pcir = nv_rd08(bios, 0x300018) | + nv_rd08(bios, 0x300019) << 8; + if (nv_rd08(bios, 0x300000 + pcir) != 'P' || + nv_rd08(bios, 0x300001 + pcir) != 'C' || + nv_rd08(bios, 0x300002 + pcir) != 'I' || + nv_rd08(bios, 0x300003 + pcir) != 'R') + goto out; + + /* read entire bios image to system memory */ + bios->size = nv_rd08(bios, 0x300002) * 512; + bios->data = kmalloc(bios->size, GFP_KERNEL); + if (bios->data) { + for (i = 0; i < bios->size; i++) + nv_wo08(bios, i, nv_rd08(bios, 0x300000 + i)); + } + +out: + /* disable access to rom */ + nv_wr32(bios, pcireg, access); +} + +#if defined(CONFIG_ACPI) +int nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len); +bool nouveau_acpi_rom_supported(struct pci_dev *pdev); +#else +static inline bool +nouveau_acpi_rom_supported(struct pci_dev *pdev) { + return false; +} + +static inline int +nouveau_acpi_get_bios_chunk(uint8_t *bios, int offset, int len) { + return -EINVAL; +} +#endif + +static void +nouveau_bios_shadow_acpi(struct nouveau_bios *bios) +{ + struct pci_dev *pdev = nv_device(bios)->pdev; + int cnt = 65536 / 4096; + int ret; + + if (!nouveau_acpi_rom_supported(pdev)) + return; + + bios->data = kmalloc(65536, GFP_KERNEL); + bios->size = 0; + if (!bios->data) + return; + + while (cnt--) { + ret = nouveau_acpi_get_bios_chunk(bios->data, bios->size, 4096); + if (ret != 4096) + return; + + bios->size += 4096; + } +} + +static void +nouveau_bios_shadow_pci(struct nouveau_bios *bios) +{ + struct pci_dev *pdev = nv_device(bios)->pdev; + size_t size; + + if (!pci_enable_rom(pdev)) { + void __iomem *rom = pci_map_rom(pdev, &size); + if (rom && size) { + bios->data = kmalloc(size, GFP_KERNEL); + if (bios->data) { + memcpy_fromio(bios->data, rom, size); + bios->size = size; + } + } + if (rom) + pci_unmap_rom(pdev, rom); + + pci_disable_rom(pdev); + } +} + +static int +nouveau_bios_score(struct nouveau_bios *bios, const bool writeable) +{ + if (!bios->data || bios->data[0] != 0x55 || bios->data[1] != 0xAA) { + nv_info(bios, "... signature not found\n"); + return 0; + } + + if (nvbios_checksum(bios->data, bios->data[2] * 512)) { + nv_info(bios, "... checksum invalid\n"); + /* if a ro image is somewhat bad, it's probably all rubbish */ + return writeable ? 2 : 1; + } + + nv_info(bios, "... appears to be valid\n"); + return 3; +} + +struct methods { + const char desc[8]; + void (*shadow)(struct nouveau_bios *); + const bool rw; + int score; + u32 size; + u8 *data; +}; + +static int +nouveau_bios_shadow(struct nouveau_bios *bios) +{ + struct methods shadow_methods[] = { + { "PRAMIN", nouveau_bios_shadow_pramin, true, 0, 0, NULL }, + { "PROM", nouveau_bios_shadow_prom, false, 0, 0, NULL }, + { "ACPI", nouveau_bios_shadow_acpi, true, 0, 0, NULL }, + { "PCIROM", nouveau_bios_shadow_pci, true, 0, 0, NULL }, + {} + }; + struct methods *mthd, *best; + const struct firmware *fw; + const char *optarg; + int optlen, ret; + char *source; + + optarg = nouveau_stropt(nv_device(bios)->cfgopt, "NvBios", &optlen); + source = optarg ? kstrndup(optarg, optlen, GFP_KERNEL) : NULL; + if (source) { + /* try to match one of the built-in methods */ + mthd = shadow_methods; + do { + if (strcasecmp(source, mthd->desc)) + continue; + nv_info(bios, "source: %s\n", mthd->desc); + + mthd->shadow(bios); + mthd->score = nouveau_bios_score(bios, mthd->rw); + if (mthd->score) { + kfree(source); + return 0; + } + } while ((++mthd)->shadow); + + /* attempt to load firmware image */ + ret = request_firmware(&fw, source, &nv_device(bios)->pdev->dev); + if (ret == 0) { + bios->size = fw->size; + bios->data = kmemdup(fw->data, fw->size, GFP_KERNEL); + release_firmware(fw); + + nv_info(bios, "image: %s\n", source); + if (nouveau_bios_score(bios, 1)) { + kfree(source); + return 0; + } + + kfree(bios->data); + bios->data = NULL; + } + + nv_error(bios, "source \'%s\' invalid\n", source); + kfree(source); + } + + mthd = shadow_methods; + do { + nv_info(bios, "checking %s for image...\n", mthd->desc); + mthd->shadow(bios); + mthd->score = nouveau_bios_score(bios, mthd->rw); + mthd->size = bios->size; + mthd->data = bios->data; + bios->data = NULL; + } while (mthd->score != 3 && (++mthd)->shadow); + + mthd = shadow_methods; + best = mthd; + do { + if (mthd->score > best->score) { + kfree(best->data); + best = mthd; + } + } while ((++mthd)->shadow); + + if (best->score) { + nv_info(bios, "using image from %s\n", best->desc); + bios->size = best->size; + bios->data = best->data; + return 0; + } + + nv_error(bios, "unable to locate usable image\n"); + return -EINVAL; +} + +static u8 +nouveau_bios_rd08(struct nouveau_object *object, u32 addr) +{ + struct nouveau_bios *bios = (void *)object; + return bios->data[addr]; +} + +static u16 +nouveau_bios_rd16(struct nouveau_object *object, u32 addr) +{ + struct nouveau_bios *bios = (void *)object; + return get_unaligned_le16(&bios->data[addr]); +} + +static u32 +nouveau_bios_rd32(struct nouveau_object *object, u32 addr) +{ + struct nouveau_bios *bios = (void *)object; + return get_unaligned_le32(&bios->data[addr]); +} + +static void +nouveau_bios_wr08(struct nouveau_object *object, u32 addr, u8 data) +{ + struct nouveau_bios *bios = (void *)object; + bios->data[addr] = data; +} + +static void +nouveau_bios_wr16(struct nouveau_object *object, u32 addr, u16 data) +{ + struct nouveau_bios *bios = (void *)object; + put_unaligned_le16(data, &bios->data[addr]); +} + +static void +nouveau_bios_wr32(struct nouveau_object *object, u32 addr, u32 data) +{ + struct nouveau_bios *bios = (void *)object; + put_unaligned_le32(data, &bios->data[addr]); +} + +static int +nouveau_bios_ctor(struct nouveau_object *parent, + struct nouveau_object *engine, + struct nouveau_oclass *oclass, void *data, u32 size, + struct nouveau_object **pobject) +{ + struct nouveau_bios *bios; + struct bit_entry bit_i; + int ret; + + ret = nouveau_subdev_create(parent, engine, oclass, 0, + "VBIOS", "bios", &bios); + *pobject = nv_object(bios); + if (ret) + return ret; + + ret = nouveau_bios_shadow(bios); + if (ret) + return ret; + + /* detect type of vbios we're dealing with */ + bios->bmp_offset = nvbios_findstr(bios->data, bios->size, + "\xff\x7f""NV\0", 5); + if (bios->bmp_offset) { + nv_info(bios, "BMP version %x.%x\n", + bmp_version(bios) >> 8, + bmp_version(bios) & 0xff); + } + + bios->bit_offset = nvbios_findstr(bios->data, bios->size, + "\xff\xb8""BIT", 5); + if (bios->bit_offset) + nv_info(bios, "BIT signature found\n"); + + /* determine the vbios version number */ + if (!bit_entry(bios, 'i', &bit_i) && bit_i.length >= 4) { + bios->version.major = nv_ro08(bios, bit_i.offset + 3); + bios->version.chip = nv_ro08(bios, bit_i.offset + 2); + bios->version.minor = nv_ro08(bios, bit_i.offset + 1); + bios->version.micro = nv_ro08(bios, bit_i.offset + 0); + } else + if (bmp_version(bios)) { + bios->version.major = nv_ro08(bios, bios->bmp_offset + 13); + bios->version.chip = nv_ro08(bios, bios->bmp_offset + 12); + bios->version.minor = nv_ro08(bios, bios->bmp_offset + 11); + bios->version.micro = nv_ro08(bios, bios->bmp_offset + 10); + } + + nv_info(bios, "version %02x.%02x.%02x.%02x\n", + bios->version.major, bios->version.chip, + bios->version.minor, bios->version.micro); + + return 0; +} + +static void +nouveau_bios_dtor(struct nouveau_object *object) +{ + struct nouveau_bios *bios = (void *)object; + kfree(bios->data); + nouveau_subdev_destroy(&bios->base); +} + +static int +nouveau_bios_init(struct nouveau_object *object) +{ + struct nouveau_bios *bios = (void *)object; + return nouveau_subdev_init(&bios->base); +} + +static int +nouveau_bios_fini(struct nouveau_object *object, bool suspend) +{ + struct nouveau_bios *bios = (void *)object; + return nouveau_subdev_fini(&bios->base, suspend); +} + +struct nouveau_oclass +nouveau_bios_oclass = { + .handle = NV_SUBDEV(VBIOS, 0x00), + .ofuncs = &(struct nouveau_ofuncs) { + .ctor = nouveau_bios_ctor, + .dtor = nouveau_bios_dtor, + .init = nouveau_bios_init, + .fini = nouveau_bios_fini, + .rd08 = nouveau_bios_rd08, + .rd16 = nouveau_bios_rd16, + .rd32 = nouveau_bios_rd32, + .wr08 = nouveau_bios_wr08, + .wr16 = nouveau_bios_wr16, + .wr32 = nouveau_bios_wr32, + }, +}; diff --git a/drivers/gpu/drm/nouveau/core/subdev/bios/bit.c b/drivers/gpu/drm/nouveau/core/subdev/bios/bit.c new file mode 100644 index 00000000000..1d03a3f2b2d --- /dev/null +++ b/drivers/gpu/drm/nouveau/core/subdev/bios/bit.c @@ -0,0 +1,52 @@ +/* + * Copyright 2012 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Ben Skeggs + */ + +#include "core/object.h" + +#include "subdev/bios.h" +#include "subdev/bios/bit.h" + +int +bit_entry(struct nouveau_bios *bios, u8 id, struct bit_entry *bit) +{ + if (likely(bios->bit_offset)) { + u8 entries = nv_ro08(bios, bios->bit_offset + 10); + u32 entry = bios->bit_offset + 12; + while (entries--) { + if (nv_ro08(bios, entry + 0) == id) { + bit->id = nv_ro08(bios, entry + 0); + bit->version = nv_ro08(bios, entry + 1); + bit->length = nv_ro16(bios, entry + 2); + bit->offset = nv_ro16(bios, entry + 4); + return 0; + } + + entry += nv_ro08(bios, bios->bit_offset + 9); + } + + return -ENOENT; + } + + return -EINVAL; +} diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nv04.c b/drivers/gpu/drm/nouveau/core/subdev/device/nv04.c index 8ded9d34c32..d54daa3f0df 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/device/nv04.c +++ b/drivers/gpu/drm/nouveau/core/subdev/device/nv04.c @@ -23,14 +23,17 @@ */ #include <subdev/device.h> +#include <subdev/bios.h> int nv04_identify(struct nouveau_device *device) { switch (device->chipset) { case 0x04: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x05: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; default: nv_fatal(device, "unknown RIVA chipset\n"); diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nv10.c b/drivers/gpu/drm/nouveau/core/subdev/device/nv10.c index 04d14d12157..f9e42887518 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/device/nv10.c +++ b/drivers/gpu/drm/nouveau/core/subdev/device/nv10.c @@ -23,26 +23,35 @@ */ #include <subdev/device.h> +#include <subdev/bios.h> int nv10_identify(struct nouveau_device *device) { switch (device->chipset) { case 0x10: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x15: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x16: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x1a: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x11: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x17: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x1f: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x18: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; default: nv_fatal(device, "unknown Celsius chipset\n"); diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nv20.c b/drivers/gpu/drm/nouveau/core/subdev/device/nv20.c index 1805bee2360..b5dfb7e8483 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/device/nv20.c +++ b/drivers/gpu/drm/nouveau/core/subdev/device/nv20.c @@ -23,18 +23,23 @@ */ #include <subdev/device.h> +#include <subdev/bios.h> int nv20_identify(struct nouveau_device *device) { switch (device->chipset) { case 0x20: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x25: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x28: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x2a: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; default: nv_fatal(device, "unknown Kelvin chipset\n"); diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nv30.c b/drivers/gpu/drm/nouveau/core/subdev/device/nv30.c index 1e7a8b19a89..b2e50e39dc8 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/device/nv30.c +++ b/drivers/gpu/drm/nouveau/core/subdev/device/nv30.c @@ -23,20 +23,26 @@ */ #include <subdev/device.h> +#include <subdev/bios.h> int nv30_identify(struct nouveau_device *device) { switch (device->chipset) { case 0x30: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x35: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x31: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x36: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x34: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; default: nv_fatal(device, "unknown Rankine chipset\n"); diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nv40.c b/drivers/gpu/drm/nouveau/core/subdev/device/nv40.c index 5c54f6154a0..4a3e3a857a0 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/device/nv40.c +++ b/drivers/gpu/drm/nouveau/core/subdev/device/nv40.c @@ -23,42 +23,59 @@ */ #include <subdev/device.h> +#include <subdev/bios.h> int nv40_identify(struct nouveau_device *device) { switch (device->chipset) { case 0x40: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x41: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x42: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x43: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x45: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x47: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x49: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x4b: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x44: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x46: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x4a: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x4c: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x4e: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x63: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x67: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x68: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; default: nv_fatal(device, "unknown Curie chipset\n"); diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nv50.c b/drivers/gpu/drm/nouveau/core/subdev/device/nv50.c index a699bd9b9ad..018c7115767 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/device/nv50.c +++ b/drivers/gpu/drm/nouveau/core/subdev/device/nv50.c @@ -23,38 +23,53 @@ */ #include <subdev/device.h> +#include <subdev/bios.h> int nv50_identify(struct nouveau_device *device) { switch (device->chipset) { case 0x50: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x84: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x86: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x92: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x94: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x96: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0x98: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xa0: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xaa: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xac: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xa3: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xa5: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xa8: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xaf: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; default: nv_fatal(device, "unknown Tesla chipset\n"); diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c index 805268c1d6b..0e8127793c5 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/device/nvc0.c @@ -23,26 +23,35 @@ */ #include <subdev/device.h> +#include <subdev/bios.h> int nvc0_identify(struct nouveau_device *device) { switch (device->chipset) { case 0xc0: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xc4: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xc3: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xce: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xcf: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xc1: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xc8: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xd9: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; default: nv_fatal(device, "unknown Fermi chipset\n"); diff --git a/drivers/gpu/drm/nouveau/core/subdev/device/nve0.c b/drivers/gpu/drm/nouveau/core/subdev/device/nve0.c index 3c3fe69844f..15cae4364e9 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/device/nve0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/device/nve0.c @@ -23,14 +23,17 @@ */ #include <subdev/device.h> +#include <subdev/bios.h> int nve0_identify(struct nouveau_device *device) { switch (device->chipset) { case 0xe4: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; case 0xe7: + device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass; break; default: nv_fatal(device, "unknown Kepler chipset\n"); |