diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_asic.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 70 |
1 files changed, 46 insertions, 24 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 0b202c07fe5..aba0a893ea9 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c @@ -934,6 +934,8 @@ static struct radeon_asic r600_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &r600_mc_wait_for_idle, + .get_xclk = &r600_get_xclk, + .get_gpu_clock_counter = &r600_get_gpu_clock_counter, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -946,7 +948,7 @@ static struct radeon_asic r600_asic = { .cs_parse = &r600_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &r600_gpu_is_lockup, + .is_lockup = &r600_gfx_is_lockup, }, [R600_RING_TYPE_DMA_INDEX] = { .ib_execute = &r600_dma_ring_ib_execute, @@ -1018,6 +1020,8 @@ static struct radeon_asic rs780_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &r600_mc_wait_for_idle, + .get_xclk = &r600_get_xclk, + .get_gpu_clock_counter = &r600_get_gpu_clock_counter, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1030,7 +1034,7 @@ static struct radeon_asic rs780_asic = { .cs_parse = &r600_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &r600_gpu_is_lockup, + .is_lockup = &r600_gfx_is_lockup, }, [R600_RING_TYPE_DMA_INDEX] = { .ib_execute = &r600_dma_ring_ib_execute, @@ -1102,6 +1106,8 @@ static struct radeon_asic rv770_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &r600_mc_wait_for_idle, + .get_xclk = &rv770_get_xclk, + .get_gpu_clock_counter = &r600_get_gpu_clock_counter, .gart = { .tlb_flush = &r600_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1114,7 +1120,7 @@ static struct radeon_asic rv770_asic = { .cs_parse = &r600_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &r600_gpu_is_lockup, + .is_lockup = &r600_gfx_is_lockup, }, [R600_RING_TYPE_DMA_INDEX] = { .ib_execute = &r600_dma_ring_ib_execute, @@ -1186,6 +1192,8 @@ static struct radeon_asic evergreen_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle, + .get_xclk = &rv770_get_xclk, + .get_gpu_clock_counter = &r600_get_gpu_clock_counter, .gart = { .tlb_flush = &evergreen_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1198,7 +1206,7 @@ static struct radeon_asic evergreen_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &evergreen_gfx_is_lockup, }, [R600_RING_TYPE_DMA_INDEX] = { .ib_execute = &evergreen_dma_ring_ib_execute, @@ -1207,7 +1215,7 @@ static struct radeon_asic evergreen_asic = { .cs_parse = &evergreen_dma_cs_parse, .ring_test = &r600_dma_ring_test, .ib_test = &r600_dma_ib_test, - .is_lockup = &r600_dma_is_lockup, + .is_lockup = &evergreen_dma_is_lockup, } }, .irq = { @@ -1270,6 +1278,8 @@ static struct radeon_asic sumo_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle, + .get_xclk = &r600_get_xclk, + .get_gpu_clock_counter = &r600_get_gpu_clock_counter, .gart = { .tlb_flush = &evergreen_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1282,7 +1292,7 @@ static struct radeon_asic sumo_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &evergreen_gfx_is_lockup, }, [R600_RING_TYPE_DMA_INDEX] = { .ib_execute = &evergreen_dma_ring_ib_execute, @@ -1291,7 +1301,7 @@ static struct radeon_asic sumo_asic = { .cs_parse = &evergreen_dma_cs_parse, .ring_test = &r600_dma_ring_test, .ib_test = &r600_dma_ib_test, - .is_lockup = &r600_dma_is_lockup, + .is_lockup = &evergreen_dma_is_lockup, } }, .irq = { @@ -1354,6 +1364,8 @@ static struct radeon_asic btc_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle, + .get_xclk = &rv770_get_xclk, + .get_gpu_clock_counter = &r600_get_gpu_clock_counter, .gart = { .tlb_flush = &evergreen_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1366,7 +1378,7 @@ static struct radeon_asic btc_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &evergreen_gfx_is_lockup, }, [R600_RING_TYPE_DMA_INDEX] = { .ib_execute = &evergreen_dma_ring_ib_execute, @@ -1375,7 +1387,7 @@ static struct radeon_asic btc_asic = { .cs_parse = &evergreen_dma_cs_parse, .ring_test = &r600_dma_ring_test, .ib_test = &r600_dma_ib_test, - .is_lockup = &r600_dma_is_lockup, + .is_lockup = &evergreen_dma_is_lockup, } }, .irq = { @@ -1438,6 +1450,8 @@ static struct radeon_asic cayman_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle, + .get_xclk = &rv770_get_xclk, + .get_gpu_clock_counter = &r600_get_gpu_clock_counter, .gart = { .tlb_flush = &cayman_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1445,7 +1459,7 @@ static struct radeon_asic cayman_asic = { .vm = { .init = &cayman_vm_init, .fini = &cayman_vm_fini, - .pt_ring_index = RADEON_RING_TYPE_GFX_INDEX, + .pt_ring_index = R600_RING_TYPE_DMA_INDEX, .set_page = &cayman_vm_set_page, }, .ring = { @@ -1457,7 +1471,7 @@ static struct radeon_asic cayman_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &cayman_gfx_is_lockup, .vm_flush = &cayman_vm_flush, }, [CAYMAN_RING_TYPE_CP1_INDEX] = { @@ -1468,7 +1482,7 @@ static struct radeon_asic cayman_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &cayman_gfx_is_lockup, .vm_flush = &cayman_vm_flush, }, [CAYMAN_RING_TYPE_CP2_INDEX] = { @@ -1479,7 +1493,7 @@ static struct radeon_asic cayman_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &cayman_gfx_is_lockup, .vm_flush = &cayman_vm_flush, }, [R600_RING_TYPE_DMA_INDEX] = { @@ -1565,6 +1579,8 @@ static struct radeon_asic trinity_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle, + .get_xclk = &r600_get_xclk, + .get_gpu_clock_counter = &r600_get_gpu_clock_counter, .gart = { .tlb_flush = &cayman_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1572,7 +1588,7 @@ static struct radeon_asic trinity_asic = { .vm = { .init = &cayman_vm_init, .fini = &cayman_vm_fini, - .pt_ring_index = RADEON_RING_TYPE_GFX_INDEX, + .pt_ring_index = R600_RING_TYPE_DMA_INDEX, .set_page = &cayman_vm_set_page, }, .ring = { @@ -1584,7 +1600,7 @@ static struct radeon_asic trinity_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &cayman_gfx_is_lockup, .vm_flush = &cayman_vm_flush, }, [CAYMAN_RING_TYPE_CP1_INDEX] = { @@ -1595,7 +1611,7 @@ static struct radeon_asic trinity_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &cayman_gfx_is_lockup, .vm_flush = &cayman_vm_flush, }, [CAYMAN_RING_TYPE_CP2_INDEX] = { @@ -1606,7 +1622,7 @@ static struct radeon_asic trinity_asic = { .cs_parse = &evergreen_cs_parse, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &evergreen_gpu_is_lockup, + .is_lockup = &cayman_gfx_is_lockup, .vm_flush = &cayman_vm_flush, }, [R600_RING_TYPE_DMA_INDEX] = { @@ -1692,6 +1708,8 @@ static struct radeon_asic si_asic = { .ioctl_wait_idle = r600_ioctl_wait_idle, .gui_idle = &r600_gui_idle, .mc_wait_for_idle = &evergreen_mc_wait_for_idle, + .get_xclk = &si_get_xclk, + .get_gpu_clock_counter = &si_get_gpu_clock_counter, .gart = { .tlb_flush = &si_pcie_gart_tlb_flush, .set_page = &rs600_gart_set_page, @@ -1699,7 +1717,7 @@ static struct radeon_asic si_asic = { .vm = { .init = &si_vm_init, .fini = &si_vm_fini, - .pt_ring_index = RADEON_RING_TYPE_GFX_INDEX, + .pt_ring_index = R600_RING_TYPE_DMA_INDEX, .set_page = &si_vm_set_page, }, .ring = { @@ -1711,7 +1729,7 @@ static struct radeon_asic si_asic = { .cs_parse = NULL, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &si_gpu_is_lockup, + .is_lockup = &si_gfx_is_lockup, .vm_flush = &si_vm_flush, }, [CAYMAN_RING_TYPE_CP1_INDEX] = { @@ -1722,7 +1740,7 @@ static struct radeon_asic si_asic = { .cs_parse = NULL, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &si_gpu_is_lockup, + .is_lockup = &si_gfx_is_lockup, .vm_flush = &si_vm_flush, }, [CAYMAN_RING_TYPE_CP2_INDEX] = { @@ -1733,7 +1751,7 @@ static struct radeon_asic si_asic = { .cs_parse = NULL, .ring_test = &r600_ring_test, .ib_test = &r600_ib_test, - .is_lockup = &si_gpu_is_lockup, + .is_lockup = &si_gfx_is_lockup, .vm_flush = &si_vm_flush, }, [R600_RING_TYPE_DMA_INDEX] = { @@ -1744,7 +1762,7 @@ static struct radeon_asic si_asic = { .cs_parse = NULL, .ring_test = &r600_dma_ring_test, .ib_test = &r600_dma_ib_test, - .is_lockup = &cayman_dma_is_lockup, + .is_lockup = &si_dma_is_lockup, .vm_flush = &si_dma_vm_flush, }, [CAYMAN_RING_TYPE_DMA1_INDEX] = { @@ -1755,7 +1773,7 @@ static struct radeon_asic si_asic = { .cs_parse = NULL, .ring_test = &r600_dma_ring_test, .ib_test = &r600_dma_ib_test, - .is_lockup = &cayman_dma_is_lockup, + .is_lockup = &si_dma_is_lockup, .vm_flush = &si_dma_vm_flush, } }, @@ -1944,9 +1962,13 @@ int radeon_asic_init(struct radeon_device *rdev) case CHIP_TAHITI: case CHIP_PITCAIRN: case CHIP_VERDE: + case CHIP_OLAND: rdev->asic = &si_asic; /* set num crtcs */ - rdev->num_crtc = 6; + if (rdev->family == CHIP_OLAND) + rdev->num_crtc = 2; + else + rdev->num_crtc = 6; break; default: /* FIXME: not supported yet */ |