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-rw-r--r--drivers/ide/pci/cmd640.c34
-rw-r--r--drivers/ide/pci/delkin_cb.c8
-rw-r--r--drivers/ide/pci/hpt366.c61
-rw-r--r--drivers/ide/pci/it821x.c2
-rw-r--r--drivers/ide/pci/ns87415.c4
-rw-r--r--drivers/ide/pci/scc_pata.c70
-rw-r--r--drivers/ide/pci/sgiioc4.c20
-rw-r--r--drivers/ide/pci/siimage.c43
-rw-r--r--drivers/ide/pci/sl82c105.c4
-rw-r--r--drivers/ide/pci/tc86c001.c36
10 files changed, 93 insertions, 189 deletions
diff --git a/drivers/ide/pci/cmd640.c b/drivers/ide/pci/cmd640.c
index 29fbc5ead03..a1cfe033a55 100644
--- a/drivers/ide/pci/cmd640.c
+++ b/drivers/ide/pci/cmd640.c
@@ -409,19 +409,9 @@ static void __init check_prefetch (unsigned int index)
*/
static void __init setup_device_ptrs (void)
{
- unsigned int i;
+ cmd_hwif0 = &ide_hwifs[0];
+ cmd_hwif1 = &ide_hwifs[1];
- cmd_hwif0 = &ide_hwifs[0]; /* default, if not found below */
- cmd_hwif1 = &ide_hwifs[1]; /* default, if not found below */
- for (i = 0; i < MAX_HWIFS; i++) {
- ide_hwif_t *hwif = &ide_hwifs[i];
- if (hwif->chipset == ide_unknown || hwif->chipset == ide_forced) {
- if (hwif->io_ports[IDE_DATA_OFFSET] == 0x1f0)
- cmd_hwif0 = hwif;
- else if (hwif->io_ports[IDE_DATA_OFFSET] == 0x170)
- cmd_hwif1 = hwif;
- }
- }
cmd_drives[0] = &cmd_hwif0->drives[0];
cmd_drives[1] = &cmd_hwif0->drives[1];
cmd_drives[2] = &cmd_hwif1->drives[0];
@@ -724,6 +714,7 @@ static int __init cmd640x_init(void)
unsigned int index;
u8 b, cfr;
u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
+ hw_regs_t hw[2];
if (cmd640_vlb && probe_for_cmd640_vlb()) {
bus_type = "VLB";
@@ -762,12 +753,23 @@ static int __init cmd640x_init(void)
return 0;
}
+ memset(&hw, 0, sizeof(hw));
+
+ ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
+ hw[0].irq = 14;
+
+ ide_std_init_ports(&hw[1], 0x170, 0x376);
+ hw[1].irq = 15;
+
+ printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x"
+ "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr);
+
/*
* Initialize data for primary port
*/
setup_device_ptrs ();
- printk("%s: buggy cmd640%c interface on %s, config=0x%02x\n",
- cmd_hwif0->name, 'a' + cmd640_chip_version - 1, bus_type, cfr);
+
+ ide_init_port_hw(cmd_hwif0, &hw[0]);
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode;
#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
@@ -787,8 +789,7 @@ static int __init cmd640x_init(void)
/*
* Try to enable the secondary interface, if not already enabled
*/
- if (cmd_hwif1->noprobe ||
- (cmd_hwif1->drives[0].noprobe && cmd_hwif1->drives[1].noprobe)) {
+ if (cmd_hwif1->drives[0].noprobe && cmd_hwif1->drives[1].noprobe) {
port2 = "not probed";
} else {
b = get_cmd640_reg(CNTRL);
@@ -820,6 +821,7 @@ static int __init cmd640x_init(void)
* Initialize data for secondary cmd640 port, if enabled
*/
if (second_port_cmd640) {
+ ide_init_port_hw(cmd_hwif1, &hw[1]);
#ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode;
#endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
diff --git a/drivers/ide/pci/delkin_cb.c b/drivers/ide/pci/delkin_cb.c
index 3f9cd64c26a..961698d655e 100644
--- a/drivers/ide/pci/delkin_cb.c
+++ b/drivers/ide/pci/delkin_cb.c
@@ -78,15 +78,15 @@ delkin_cb_probe (struct pci_dev *dev, const struct pci_device_id *id)
hw.irq = dev->irq;
hw.chipset = ide_pci; /* this enables IRQ sharing */
- hwif = ide_deprecated_find_port(hw.io_ports[IDE_DATA_OFFSET]);
+ hwif = ide_find_port(hw.io_ports[IDE_DATA_OFFSET]);
if (hwif == NULL)
goto out_disable;
i = hwif->index;
if (hwif->present)
- ide_unregister(i, 0, 0);
- else if (!hwif->hold)
+ ide_unregister(i);
+ else
ide_init_port_data(hwif, i);
ide_init_port_hw(hwif, &hw);
@@ -120,7 +120,7 @@ delkin_cb_remove (struct pci_dev *dev)
ide_hwif_t *hwif = pci_get_drvdata(dev);
if (hwif)
- ide_unregister(hwif->index, 0, 0);
+ ide_unregister(hwif->index);
pci_disable_device(dev);
}
diff --git a/drivers/ide/pci/hpt366.c b/drivers/ide/pci/hpt366.c
index 6357bb6269a..82d0e318a1f 100644
--- a/drivers/ide/pci/hpt366.c
+++ b/drivers/ide/pci/hpt366.c
@@ -760,7 +760,7 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
}
} else
outb(mask ? (drive->ctl | 2) : (drive->ctl & ~2),
- IDE_CONTROL_REG);
+ hwif->io_ports[IDE_CONTROL_OFFSET]);
}
/*
@@ -929,64 +929,6 @@ static void hpt3xxn_rw_disk(ide_drive_t *drive, struct request *rq)
hpt3xxn_set_clock(HWIF(drive), rq_data_dir(rq) ? 0x23 : 0x21);
}
-/*
- * Set/get power state for a drive.
- * NOTE: affects both drives on each channel.
- *
- * When we turn the power back on, we need to re-initialize things.
- */
-#define TRISTATE_BIT 0x8000
-
-static int hpt3xx_busproc(ide_drive_t *drive, int state)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 mcr_addr = hwif->select_data + 2;
- u8 resetmask = hwif->channel ? 0x80 : 0x40;
- u8 bsr2 = 0;
- u16 mcr = 0;
-
- hwif->bus_state = state;
-
- /* Grab the status. */
- pci_read_config_word(dev, mcr_addr, &mcr);
- pci_read_config_byte(dev, 0x59, &bsr2);
-
- /*
- * Set the state. We don't set it if we don't need to do so.
- * Make sure that the drive knows that it has failed if it's off.
- */
- switch (state) {
- case BUSSTATE_ON:
- if (!(bsr2 & resetmask))
- return 0;
- hwif->drives[0].failures = hwif->drives[1].failures = 0;
-
- pci_write_config_byte(dev, 0x59, bsr2 & ~resetmask);
- pci_write_config_word(dev, mcr_addr, mcr & ~TRISTATE_BIT);
- return 0;
- case BUSSTATE_OFF:
- if ((bsr2 & resetmask) && !(mcr & TRISTATE_BIT))
- return 0;
- mcr &= ~TRISTATE_BIT;
- break;
- case BUSSTATE_TRISTATE:
- if ((bsr2 & resetmask) && (mcr & TRISTATE_BIT))
- return 0;
- mcr |= TRISTATE_BIT;
- break;
- default:
- return -EINVAL;
- }
-
- hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
- hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
-
- pci_write_config_word(dev, mcr_addr, mcr);
- pci_write_config_byte(dev, 0x59, bsr2 | resetmask);
- return 0;
-}
-
/**
* hpt37x_calibrate_dpll - calibrate the DPLL
* @dev: PCI device
@@ -1334,7 +1276,6 @@ static void __devinit init_hwif_hpt366(ide_hwif_t *hwif)
hwif->quirkproc = &hpt3xx_quirkproc;
hwif->maskproc = &hpt3xx_maskproc;
- hwif->busproc = &hpt3xx_busproc;
hwif->udma_filter = &hpt3xx_udma_filter;
hwif->mdma_filter = &hpt3xx_mdma_filter;
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 1597f0cc1bf..d8a167451fd 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -667,7 +667,7 @@ static int __init it821x_ide_init(void)
module_init(it821x_ide_init);
module_param_named(noraid, it8212_noraid, int, S_IRUGO);
-MODULE_PARM_DESC(it8212_noraid, "Force card into bypass mode");
+MODULE_PARM_DESC(noraid, "Force card into bypass mode");
MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("PCI driver module for the ITE 821x");
diff --git a/drivers/ide/pci/ns87415.c b/drivers/ide/pci/ns87415.c
index bf0d3b2931f..75513320aad 100644
--- a/drivers/ide/pci/ns87415.c
+++ b/drivers/ide/pci/ns87415.c
@@ -181,6 +181,10 @@ static int ns87415_ide_dma_setup(ide_drive_t *drive)
return 1;
}
+#ifndef ide_default_irq
+#define ide_default_irq(irq) 0
+#endif
+
static void __devinit init_hwif_ns87415 (ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index 238e3e181e8..ef07c7a8b97 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -334,7 +334,8 @@ static int scc_ide_dma_end(ide_drive_t * drive)
/* errata A308 workaround: Step5 (check data loss) */
/* We don't check non ide_disk because it is limited to UDMA4 */
- if (!(in_be32((void __iomem *)IDE_ALTSTATUS_REG) & ERR_STAT) &&
+ if (!(in_be32((void __iomem *)hwif->io_ports[IDE_ALTSTATUS_OFFSET])
+ & ERR_STAT) &&
drive->media == ide_disk && drive->current_speed > XFER_UDMA_4) {
reg = in_be32((void __iomem *)intsts_port);
if (!(reg & INTSTS_ACTEINT)) {
@@ -437,7 +438,8 @@ static int scc_dma_test_irq(ide_drive_t *drive)
u32 int_stat = in_be32((void __iomem *)hwif->dma_base + 0x014);
/* SCC errata A252,A308 workaround: Step4 */
- if ((in_be32((void __iomem *)IDE_ALTSTATUS_REG) & ERR_STAT) &&
+ if ((in_be32((void __iomem *)hwif->io_ports[IDE_ALTSTATUS_OFFSET])
+ & ERR_STAT) &&
(int_stat & INTSTS_INTRQ))
return 1;
@@ -523,6 +525,43 @@ static int setup_mmio_scc (struct pci_dev *dev, const char *name)
return -ENOMEM;
}
+static int scc_ide_setup_pci_device(struct pci_dev *dev,
+ const struct ide_port_info *d)
+{
+ struct scc_ports *ports = pci_get_drvdata(dev);
+ ide_hwif_t *hwif = NULL;
+ hw_regs_t hw;
+ u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
+ int i;
+
+ for (i = 0; i < MAX_HWIFS; i++) {
+ hwif = &ide_hwifs[i];
+ if (hwif->chipset == ide_unknown)
+ break; /* pick an unused entry */
+ }
+ if (i == MAX_HWIFS) {
+ printk(KERN_ERR "%s: too many IDE interfaces, "
+ "no room in table\n", SCC_PATA_NAME);
+ return -ENOMEM;
+ }
+
+ memset(&hw, 0, sizeof(hw));
+ for (i = IDE_DATA_OFFSET; i <= IDE_CONTROL_OFFSET; i++)
+ hw.io_ports[i] = ports->dma + 0x20 + i * 4;
+ hw.irq = dev->irq;
+ hw.dev = &dev->dev;
+ hw.chipset = ide_pci;
+ ide_init_port_hw(hwif, &hw);
+ hwif->dev = &dev->dev;
+ hwif->cds = d;
+
+ idx[0] = hwif->index;
+
+ ide_device_add(idx, d);
+
+ return 0;
+}
+
/**
* init_setup_scc - set up an SCC PATA Controller
* @dev: PCI device
@@ -545,10 +584,13 @@ static int __devinit init_setup_scc(struct pci_dev *dev,
struct scc_ports *ports;
int rc;
+ rc = pci_enable_device(dev);
+ if (rc)
+ goto end;
+
rc = setup_mmio_scc(dev, d->name);
- if (rc < 0) {
- return rc;
- }
+ if (rc < 0)
+ goto end;
ports = pci_get_drvdata(dev);
ctl_base = ports->ctl;
@@ -583,7 +625,10 @@ static int __devinit init_setup_scc(struct pci_dev *dev,
out_be32((void*)mode_port, MODE_JCUSFEN);
out_be32((void*)intmask_port, INTMASK_MSK);
- return ide_setup_pci_device(dev, d);
+ rc = scc_ide_setup_pci_device(dev, d);
+
+ end:
+ return rc;
}
/**
@@ -610,17 +655,6 @@ static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif)
hwif->OUTSW = scc_ide_outsw;
hwif->OUTSL = scc_ide_outsl;
- hwif->io_ports[IDE_DATA_OFFSET] = dma_base + 0x20;
- hwif->io_ports[IDE_ERROR_OFFSET] = dma_base + 0x24;
- hwif->io_ports[IDE_NSECTOR_OFFSET] = dma_base + 0x28;
- hwif->io_ports[IDE_SECTOR_OFFSET] = dma_base + 0x2c;
- hwif->io_ports[IDE_LCYL_OFFSET] = dma_base + 0x30;
- hwif->io_ports[IDE_HCYL_OFFSET] = dma_base + 0x34;
- hwif->io_ports[IDE_SELECT_OFFSET] = dma_base + 0x38;
- hwif->io_ports[IDE_STATUS_OFFSET] = dma_base + 0x3c;
- hwif->io_ports[IDE_CONTROL_OFFSET] = dma_base + 0x40;
-
- hwif->irq = dev->irq;
hwif->dma_base = dma_base;
hwif->config_data = ports->ctl;
hwif->mmio = 1;
@@ -736,7 +770,7 @@ static void __devexit scc_remove(struct pci_dev *dev)
hwif->dmatable_cpu = NULL;
}
- ide_unregister(hwif->index, 0, 0);
+ ide_unregister(hwif->index);
hwif->chipset = ide_unknown;
iounmap((void*)ports->dma);
diff --git a/drivers/ide/pci/sgiioc4.c b/drivers/ide/pci/sgiioc4.c
index 054626497be..9d1a3038af9 100644
--- a/drivers/ide/pci/sgiioc4.c
+++ b/drivers/ide/pci/sgiioc4.c
@@ -112,10 +112,9 @@ static void
sgiioc4_maskproc(ide_drive_t * drive, int mask)
{
writeb(mask ? (drive->ctl | 2) : (drive->ctl & ~2),
- (void __iomem *)IDE_CONTROL_REG);
+ (void __iomem *)drive->hwif->io_ports[IDE_CONTROL_OFFSET]);
}
-
static int
sgiioc4_checkirq(ide_hwif_t * hwif)
{
@@ -142,18 +141,18 @@ sgiioc4_clearirq(ide_drive_t * drive)
intr_reg = readl((void __iomem *)other_ir);
if (intr_reg & 0x03) { /* Valid IOC4-IDE interrupt */
/*
- * Using sgiioc4_INB to read the IDE_STATUS_REG has a side effect
- * of clearing the interrupt. The first read should clear it
- * if it is set. The second read should return a "clear" status
- * if it got cleared. If not, then spin for a bit trying to
- * clear it.
+ * Using sgiioc4_INB to read the Status register has a side
+ * effect of clearing the interrupt. The first read should
+ * clear it if it is set. The second read should return
+ * a "clear" status if it got cleared. If not, then spin
+ * for a bit trying to clear it.
*/
- u8 stat = sgiioc4_INB(IDE_STATUS_REG);
+ u8 stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]);
int count = 0;
- stat = sgiioc4_INB(IDE_STATUS_REG);
+ stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]);
while ((stat & 0x80) && (count++ < 100)) {
udelay(1);
- stat = sgiioc4_INB(IDE_STATUS_REG);
+ stat = sgiioc4_INB(hwif->io_ports[IDE_STATUS_OFFSET]);
}
if (intr_reg & 0x02) {
@@ -562,7 +561,6 @@ ide_init_sgiioc4(ide_hwif_t * hwif)
clear interrupts */
hwif->maskproc = &sgiioc4_maskproc; /* Mask on/off NIEN register */
hwif->quirkproc = NULL;
- hwif->busproc = NULL;
hwif->INB = &sgiioc4_INB;
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index 8d624afe852..b6be1b45f32 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -370,48 +370,6 @@ static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
}
/**
- * sil_sata_busproc - bus isolation IOCTL
- * @drive: drive to isolate/restore
- * @state: bus state to set
- *
- * Used by the SII3112 to handle bus isolation. As this is a
- * SATA controller the work required is quite limited, we
- * just have to clean up the statistics
- */
-
-static int sil_sata_busproc(ide_drive_t * drive, int state)
-{
- ide_hwif_t *hwif = HWIF(drive);
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u32 stat_config = 0;
- unsigned long addr = siimage_selreg(hwif, 0);
-
- if (hwif->mmio)
- stat_config = readl((void __iomem *)addr);
- else
- pci_read_config_dword(dev, addr, &stat_config);
-
- switch (state) {
- case BUSSTATE_ON:
- hwif->drives[0].failures = 0;
- hwif->drives[1].failures = 0;
- break;
- case BUSSTATE_OFF:
- hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
- hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
- break;
- case BUSSTATE_TRISTATE:
- hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
- hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
- break;
- default:
- return -EINVAL;
- }
- hwif->bus_state = state;
- return 0;
-}
-
-/**
* sil_sata_reset_poll - wait for SATA reset
* @drive: drive we are resetting
*
@@ -818,7 +776,6 @@ static void __devinit init_hwif_siimage(ide_hwif_t *hwif)
if (sata) {
static int first = 1;
- hwif->busproc = &sil_sata_busproc;
hwif->reset_poll = &sil_sata_reset_poll;
hwif->pre_reset = &sil_sata_pre_reset;
hwif->udma_filter = &sil_sata_udma_filter;
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index ee261ae15b6..1f00251a4a8 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -328,6 +328,10 @@ static const struct ide_port_info sl82c105_chipset __devinitdata = {
.enablebits = {{0x40,0x01,0x01}, {0x40,0x10,0x10}},
.host_flags = IDE_HFLAG_IO_32BIT |
IDE_HFLAG_UNMASK_IRQS |
+/* FIXME: check for Compatibility mode in generic IDE PCI code */
+#if defined(CONFIG_LOPEC) || defined(CONFIG_SANDPOINT)
+ IDE_HFLAG_FORCE_LEGACY_IRQS |
+#endif
IDE_HFLAG_NO_AUTODMA |
IDE_HFLAG_BOOTABLE,
.pio_mask = ATA_PIO5,
diff --git a/drivers/ide/pci/tc86c001.c b/drivers/ide/pci/tc86c001.c
index 2ef2ed2f2b3..1e4a6262bce 100644
--- a/drivers/ide/pci/tc86c001.c
+++ b/drivers/ide/pci/tc86c001.c
@@ -126,40 +126,6 @@ static void tc86c001_dma_start(ide_drive_t *drive)
ide_dma_start(drive);
}
-static int tc86c001_busproc(ide_drive_t *drive, int state)
-{
- ide_hwif_t *hwif = HWIF(drive);
- unsigned long sc_base = hwif->config_data;
- u16 scr1;
-
- /* System Control 1 Register bit 11 (ATA Hard Reset) read */
- scr1 = inw(sc_base + 0x00);
-
- switch (state) {
- case BUSSTATE_ON:
- if (!(scr1 & 0x0800))
- return 0;
- scr1 &= ~0x0800;
-
- hwif->drives[0].failures = hwif->drives[1].failures = 0;
- break;
- case BUSSTATE_OFF:
- if (scr1 & 0x0800)
- return 0;
- scr1 |= 0x0800;
-
- hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
- hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
- break;
- default:
- return -EINVAL;
- }
-
- /* System Control 1 Register bit 11 (ATA Hard Reset) write */
- outw(scr1, sc_base + 0x00);
- return 0;
-}
-
static u8 __devinit tc86c001_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
@@ -194,8 +160,6 @@ static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
hwif->set_pio_mode = &tc86c001_set_pio_mode;
hwif->set_dma_mode = &tc86c001_set_mode;
- hwif->busproc = &tc86c001_busproc;
-
hwif->cable_detect = tc86c001_cable_detect;
if (!hwif->dma_base)
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-12-15 15:48:53 +0000