diff options
Diffstat (limited to 'drivers/input/serio/i8042.c')
-rw-r--r-- | drivers/input/serio/i8042.c | 41 |
1 files changed, 31 insertions, 10 deletions
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 65a74cfc187..170f71ee577 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c @@ -885,6 +885,20 @@ static long i8042_panic_blink(long count) #undef DELAY +#ifdef CONFIG_X86 +static void i8042_dritek_enable(void) +{ + char param = 0x90; + int error; + + error = i8042_command(¶m, 0x1059); + if (error) + printk(KERN_WARNING + "Failed to enable DRITEK extension: %d\n", + error); +} +#endif + #ifdef CONFIG_PM /* * Here we try to restore the original BIOS settings. We only want to @@ -938,10 +952,20 @@ static int i8042_resume(struct platform_device *dev) i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS; i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT); if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { - printk(KERN_ERR "i8042: Can't write CTR to resume\n"); - return -EIO; + printk(KERN_WARNING "i8042: Can't write CTR to resume, retrying...\n"); + msleep(50); + if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { + printk(KERN_ERR "i8042: CTR write retry failed\n"); + return -EIO; + } } + +#ifdef CONFIG_X86 + if (i8042_dritek) + i8042_dritek_enable(); +#endif + if (i8042_mux_present) { if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports()) printk(KERN_WARNING @@ -1160,6 +1184,11 @@ static int __devinit i8042_probe(struct platform_device *dev) if (error) return error; +#ifdef CONFIG_X86 + if (i8042_dritek) + i8042_dritek_enable(); +#endif + if (!i8042_noaux) { error = i8042_setup_aux(); if (error && error != -ENODEV && error != -EBUSY) @@ -1171,14 +1200,6 @@ static int __devinit i8042_probe(struct platform_device *dev) if (error) goto out_fail; } -#ifdef CONFIG_X86 - if (i8042_dritek) { - char param = 0x90; - error = i8042_command(¶m, 0x1059); - if (error) - goto out_fail; - } -#endif /* * Ok, everything is ready, let's register all serio ports */ |