diff options
Diffstat (limited to 'drivers/net/ethernet/cadence')
| -rw-r--r-- | drivers/net/ethernet/cadence/Kconfig | 9 | ||||
| -rw-r--r-- | drivers/net/ethernet/cadence/at91_ether.c | 1283 | ||||
| -rw-r--r-- | drivers/net/ethernet/cadence/at91_ether.h | 112 | ||||
| -rw-r--r-- | drivers/net/ethernet/cadence/macb.c | 564 | ||||
| -rw-r--r-- | drivers/net/ethernet/cadence/macb.h | 67 |
5 files changed, 714 insertions, 1321 deletions
diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig index db931916da0..ceb0de0cf62 100644 --- a/drivers/net/ethernet/cadence/Kconfig +++ b/drivers/net/ethernet/cadence/Kconfig @@ -2,13 +2,10 @@ # Atmel device configuration # -config HAVE_NET_MACB - bool - config NET_CADENCE bool "Cadence devices" + depends on HAS_IOMEM default y - depends on HAVE_NET_MACB || (ARM && ARCH_AT91RM9200) ---help--- If you have a network (Ethernet) card belonging to this class, say Y. Make sure you know the name of your card. Read the Ethernet-HOWTO, @@ -25,16 +22,14 @@ if NET_CADENCE config ARM_AT91_ETHER tristate "AT91RM9200 Ethernet support" - depends on ARM && ARCH_AT91RM9200 select NET_CORE - select MII + select MACB ---help--- If you wish to compile a kernel for the AT91RM9200 and enable ethernet support, then you should always answer Y to this. config MACB tristate "Cadence MACB/GEM support" - depends on HAVE_NET_MACB select PHYLIB ---help--- The Cadence MACB ethernet interface is found on many Atmel AT32 and diff --git a/drivers/net/ethernet/cadence/at91_ether.c b/drivers/net/ethernet/cadence/at91_ether.c index 4e980a7886f..3becdb2deb4 100644 --- a/drivers/net/ethernet/cadence/at91_ether.c +++ b/drivers/net/ethernet/cadence/at91_ether.c @@ -6,11 +6,6 @@ * Based on an earlier Atmel EMAC macrocell driver by Atmel and Lineo Inc. * Initial version by Rick Bronson 01/11/2003 * - * Intel LXT971A PHY support by Christopher Bahns & David Knickerbocker - * (Polaroid Corporation) - * - * Realtek RTL8201(B)L PHY support by Roman Avramenko <roman@imsystems.ru> - * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version @@ -20,7 +15,6 @@ #include <linux/module.h> #include <linux/init.h> #include <linux/interrupt.h> -#include <linux/mii.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> #include <linux/skbuff.h> @@ -31,956 +25,248 @@ #include <linux/clk.h> #include <linux/gfp.h> #include <linux/phy.h> +#include <linux/io.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/of_net.h> +#include <linux/pinctrl/consumer.h> -#include <asm/io.h> -#include <asm/uaccess.h> -#include <asm/mach-types.h> - -#include <mach/at91rm9200_emac.h> -#include <asm/gpio.h> -#include <mach/board.h> - -#include "at91_ether.h" - -#define DRV_NAME "at91_ether" -#define DRV_VERSION "1.0" - -#define LINK_POLL_INTERVAL (HZ) - -/* ..................................................................... */ - -/* - * Read from a EMAC register. - */ -static inline unsigned long at91_emac_read(struct at91_private *lp, unsigned int reg) -{ - return __raw_readl(lp->emac_base + reg); -} - -/* - * Write to a EMAC register. - */ -static inline void at91_emac_write(struct at91_private *lp, unsigned int reg, unsigned long value) -{ - __raw_writel(value, lp->emac_base + reg); -} - -/* ........................... PHY INTERFACE ........................... */ - -/* - * Enable the MDIO bit in MAC control register - * When not called from an interrupt-handler, access to the PHY must be - * protected by a spinlock. - */ -static void enable_mdi(struct at91_private *lp) -{ - unsigned long ctl; - - ctl = at91_emac_read(lp, AT91_EMAC_CTL); - at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_MPE); /* enable management port */ -} - -/* - * Disable the MDIO bit in the MAC control register - */ -static void disable_mdi(struct at91_private *lp) -{ - unsigned long ctl; - - ctl = at91_emac_read(lp, AT91_EMAC_CTL); - at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~AT91_EMAC_MPE); /* disable management port */ -} - -/* - * Wait until the PHY operation is complete. - */ -static inline void at91_phy_wait(struct at91_private *lp) -{ - unsigned long timeout = jiffies + 2; - - while (!(at91_emac_read(lp, AT91_EMAC_SR) & AT91_EMAC_SR_IDLE)) { - if (time_after(jiffies, timeout)) { - printk("at91_ether: MIO timeout\n"); - break; - } - cpu_relax(); - } -} - -/* - * Write value to the a PHY register - * Note: MDI interface is assumed to already have been enabled. - */ -static void write_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int value) -{ - at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_W - | ((phy_addr & 0x1f) << 23) | (address << 18) | (value & AT91_EMAC_DATA)); - - /* Wait until IDLE bit in Network Status register is cleared */ - at91_phy_wait(lp); -} - -/* - * Read value stored in a PHY register. - * Note: MDI interface is assumed to already have been enabled. - */ -static void read_phy(struct at91_private *lp, unsigned char phy_addr, unsigned char address, unsigned int *value) -{ - at91_emac_write(lp, AT91_EMAC_MAN, AT91_EMAC_MAN_802_3 | AT91_EMAC_RW_R - | ((phy_addr & 0x1f) << 23) | (address << 18)); - - /* Wait until IDLE bit in Network Status register is cleared */ - at91_phy_wait(lp); - - *value = at91_emac_read(lp, AT91_EMAC_MAN) & AT91_EMAC_DATA; -} - -/* ........................... PHY MANAGEMENT .......................... */ - -/* - * Access the PHY to determine the current link speed and mode, and update the - * MAC accordingly. - * If no link or auto-negotiation is busy, then no changes are made. - */ -static void update_linkspeed(struct net_device *dev, int silent) -{ - struct at91_private *lp = netdev_priv(dev); - unsigned int bmsr, bmcr, lpa, mac_cfg; - unsigned int speed, duplex; - - if (!mii_link_ok(&lp->mii)) { /* no link */ - netif_carrier_off(dev); - if (!silent) - printk(KERN_INFO "%s: Link down.\n", dev->name); - return; - } - - /* Link up, or auto-negotiation still in progress */ - read_phy(lp, lp->phy_address, MII_BMSR, &bmsr); - read_phy(lp, lp->phy_address, MII_BMCR, &bmcr); - if (bmcr & BMCR_ANENABLE) { /* AutoNegotiation is enabled */ - if (!(bmsr & BMSR_ANEGCOMPLETE)) - return; /* Do nothing - another interrupt generated when negotiation complete */ - - read_phy(lp, lp->phy_address, MII_LPA, &lpa); - if ((lpa & LPA_100FULL) || (lpa & LPA_100HALF)) speed = SPEED_100; - else speed = SPEED_10; - if ((lpa & LPA_100FULL) || (lpa & LPA_10FULL)) duplex = DUPLEX_FULL; - else duplex = DUPLEX_HALF; - } else { - speed = (bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10; - duplex = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF; - } - - /* Update the MAC */ - mac_cfg = at91_emac_read(lp, AT91_EMAC_CFG) & ~(AT91_EMAC_SPD | AT91_EMAC_FD); - if (speed == SPEED_100) { - if (duplex == DUPLEX_FULL) /* 100 Full Duplex */ - mac_cfg |= AT91_EMAC_SPD | AT91_EMAC_FD; - else /* 100 Half Duplex */ - mac_cfg |= AT91_EMAC_SPD; - } else { - if (duplex == DUPLEX_FULL) /* 10 Full Duplex */ - mac_cfg |= AT91_EMAC_FD; - else {} /* 10 Half Duplex */ - } - at91_emac_write(lp, AT91_EMAC_CFG, mac_cfg); - - if (!silent) - printk(KERN_INFO "%s: Link now %i-%s\n", dev->name, speed, (duplex == DUPLEX_FULL) ? "FullDuplex" : "HalfDuplex"); - netif_carrier_on(dev); -} - -/* - * Handle interrupts from the PHY - */ -static irqreturn_t at91ether_phy_interrupt(int irq, void *dev_id) -{ - struct net_device *dev = (struct net_device *) dev_id; - struct at91_private *lp = netdev_priv(dev); - unsigned int phy; - - /* - * This hander is triggered on both edges, but the PHY chips expect - * level-triggering. We therefore have to check if the PHY actually has - * an IRQ pending. - */ - enable_mdi(lp); - if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { - read_phy(lp, lp->phy_address, MII_DSINTR_REG, &phy); /* ack interrupt in Davicom PHY */ - if (!(phy & (1 << 0))) - goto done; - } - else if (lp->phy_type == MII_LXT971A_ID) { - read_phy(lp, lp->phy_address, MII_ISINTS_REG, &phy); /* ack interrupt in Intel PHY */ - if (!(phy & (1 << 2))) - goto done; - } - else if (lp->phy_type == MII_BCM5221_ID) { - read_phy(lp, lp->phy_address, MII_BCMINTR_REG, &phy); /* ack interrupt in Broadcom PHY */ - if (!(phy & (1 << 0))) - goto done; - } - else if (lp->phy_type == MII_KS8721_ID) { - read_phy(lp, lp->phy_address, MII_TPISTATUS, &phy); /* ack interrupt in Micrel PHY */ - if (!(phy & ((1 << 2) | 1))) - goto done; - } - else if (lp->phy_type == MII_T78Q21x3_ID) { /* ack interrupt in Teridian PHY */ - read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &phy); - if (!(phy & ((1 << 2) | 1))) - goto done; - } - else if (lp->phy_type == MII_DP83848_ID) { - read_phy(lp, lp->phy_address, MII_DPPHYSTS_REG, &phy); /* ack interrupt in DP83848 PHY */ - if (!(phy & (1 << 7))) - goto done; - } - - update_linkspeed(dev, 0); - -done: - disable_mdi(lp); - - return IRQ_HANDLED; -} - -/* - * Initialize and enable the PHY interrupt for link-state changes - */ -static void enable_phyirq(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - unsigned int dsintr, irq_number; - int status; - - if (!gpio_is_valid(lp->board_data.phy_irq_pin)) { - /* - * PHY doesn't have an IRQ pin (RTL8201, DP83847, AC101L), - * or board does not have it connected. - */ - mod_timer(&lp->check_timer, jiffies + LINK_POLL_INTERVAL); - return; - } - - irq_number = gpio_to_irq(lp->board_data.phy_irq_pin); - status = request_irq(irq_number, at91ether_phy_interrupt, 0, dev->name, dev); - if (status) { - printk(KERN_ERR "at91_ether: PHY IRQ %d request failed - status %d!\n", irq_number, status); - return; - } - - spin_lock_irq(&lp->lock); - enable_mdi(lp); - - if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { /* for Davicom PHY */ - read_phy(lp, lp->phy_address, MII_DSINTR_REG, &dsintr); - dsintr = dsintr & ~0xf00; /* clear bits 8..11 */ - write_phy(lp, lp->phy_address, MII_DSINTR_REG, dsintr); - } - else if (lp->phy_type == MII_LXT971A_ID) { /* for Intel PHY */ - read_phy(lp, lp->phy_address, MII_ISINTE_REG, &dsintr); - dsintr = dsintr | 0xf2; /* set bits 1, 4..7 */ - write_phy(lp, lp->phy_address, MII_ISINTE_REG, dsintr); - } - else if (lp->phy_type == MII_BCM5221_ID) { /* for Broadcom PHY */ - dsintr = (1 << 15) | ( 1 << 14); - write_phy(lp, lp->phy_address, MII_BCMINTR_REG, dsintr); - } - else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */ - dsintr = (1 << 10) | ( 1 << 8); - write_phy(lp, lp->phy_address, MII_TPISTATUS, dsintr); - } - else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */ - read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &dsintr); - dsintr = dsintr | 0x500; /* set bits 8, 10 */ - write_phy(lp, lp->phy_address, MII_T78Q21INT_REG, dsintr); - } - else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */ - read_phy(lp, lp->phy_address, MII_DPMISR_REG, &dsintr); - dsintr = dsintr | 0x3c; /* set bits 2..5 */ - write_phy(lp, lp->phy_address, MII_DPMISR_REG, dsintr); - read_phy(lp, lp->phy_address, MII_DPMICR_REG, &dsintr); - dsintr = dsintr | 0x3; /* set bits 0,1 */ - write_phy(lp, lp->phy_address, MII_DPMICR_REG, dsintr); - } - - disable_mdi(lp); - spin_unlock_irq(&lp->lock); -} - -/* - * Disable the PHY interrupt - */ -static void disable_phyirq(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - unsigned int dsintr; - unsigned int irq_number; - - if (!gpio_is_valid(lp->board_data.phy_irq_pin)) { - del_timer_sync(&lp->check_timer); - return; - } - - spin_lock_irq(&lp->lock); - enable_mdi(lp); - - if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { /* for Davicom PHY */ - read_phy(lp, lp->phy_address, MII_DSINTR_REG, &dsintr); - dsintr = dsintr | 0xf00; /* set bits 8..11 */ - write_phy(lp, lp->phy_address, MII_DSINTR_REG, dsintr); - } - else if (lp->phy_type == MII_LXT971A_ID) { /* for Intel PHY */ - read_phy(lp, lp->phy_address, MII_ISINTE_REG, &dsintr); - dsintr = dsintr & ~0xf2; /* clear bits 1, 4..7 */ - write_phy(lp, lp->phy_address, MII_ISINTE_REG, dsintr); - } - else if (lp->phy_type == MII_BCM5221_ID) { /* for Broadcom PHY */ - read_phy(lp, lp->phy_address, MII_BCMINTR_REG, &dsintr); - dsintr = ~(1 << 14); - write_phy(lp, lp->phy_address, MII_BCMINTR_REG, dsintr); - } - else if (lp->phy_type == MII_KS8721_ID) { /* for Micrel PHY */ - read_phy(lp, lp->phy_address, MII_TPISTATUS, &dsintr); - dsintr = ~((1 << 10) | (1 << 8)); - write_phy(lp, lp->phy_address, MII_TPISTATUS, dsintr); - } - else if (lp->phy_type == MII_T78Q21x3_ID) { /* for Teridian PHY */ - read_phy(lp, lp->phy_address, MII_T78Q21INT_REG, &dsintr); - dsintr = dsintr & ~0x500; /* clear bits 8, 10 */ - write_phy(lp, lp->phy_address, MII_T78Q21INT_REG, dsintr); - } - else if (lp->phy_type == MII_DP83848_ID) { /* National Semiconductor DP83848 PHY */ - read_phy(lp, lp->phy_address, MII_DPMICR_REG, &dsintr); - dsintr = dsintr & ~0x3; /* clear bits 0, 1 */ - write_phy(lp, lp->phy_address, MII_DPMICR_REG, dsintr); - read_phy(lp, lp->phy_address, MII_DPMISR_REG, &dsintr); - dsintr = dsintr & ~0x3c; /* clear bits 2..5 */ - write_phy(lp, lp->phy_address, MII_DPMISR_REG, dsintr); - } - - disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - irq_number = gpio_to_irq(lp->board_data.phy_irq_pin); - free_irq(irq_number, dev); /* Free interrupt handler */ -} - -/* - * Perform a software reset of the PHY. - */ -#if 0 -static void reset_phy(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - unsigned int bmcr; - - spin_lock_irq(&lp->lock); - enable_mdi(lp); - - /* Perform PHY reset */ - write_phy(lp, lp->phy_address, MII_BMCR, BMCR_RESET); - - /* Wait until PHY reset is complete */ - do { - read_phy(lp, lp->phy_address, MII_BMCR, &bmcr); - } while (!(bmcr & BMCR_RESET)); - - disable_mdi(lp); - spin_unlock_irq(&lp->lock); -} -#endif - -static void at91ether_check_link(unsigned long dev_id) -{ - struct net_device *dev = (struct net_device *) dev_id; - struct at91_private *lp = netdev_priv(dev); - - enable_mdi(lp); - update_linkspeed(dev, 1); - disable_mdi(lp); - - mod_timer(&lp->check_timer, jiffies + LINK_POLL_INTERVAL); -} - -/* - * Perform any PHY-specific initialization. - */ -static void __init initialize_phy(struct at91_private *lp) -{ - unsigned int val; - - spin_lock_irq(&lp->lock); - enable_mdi(lp); - - if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) { - read_phy(lp, lp->phy_address, MII_DSCR_REG, &val); - if ((val & (1 << 10)) == 0) /* DSCR bit 10 is 0 -- fiber mode */ - lp->phy_media = PORT_FIBRE; - } else if (machine_is_csb337()) { - /* mix link activity status into LED2 link state */ - write_phy(lp, lp->phy_address, MII_LEDCTRL_REG, 0x0d22); - } else if (machine_is_ecbat91()) - write_phy(lp, lp->phy_address, MII_LEDCTRL_REG, 0x156A); - - disable_mdi(lp); - spin_unlock_irq(&lp->lock); -} - -/* ......................... ADDRESS MANAGEMENT ........................ */ - -/* - * NOTE: Your bootloader must always set the MAC address correctly before - * booting into Linux. - * - * - It must always set the MAC address after reset, even if it doesn't - * happen to access the Ethernet while it's booting. Some versions of - * U-Boot on the AT91RM9200-DK do not do this. - * - * - Likewise it must store the addresses in the correct byte order. - * MicroMonitor (uMon) on the CSB337 does this incorrectly (and - * continues to do so, for bug-compatibility). - */ - -static short __init unpack_mac_address(struct net_device *dev, unsigned int hi, unsigned int lo) -{ - char addr[6]; - - if (machine_is_csb337()) { - addr[5] = (lo & 0xff); /* The CSB337 bootloader stores the MAC the wrong-way around */ - addr[4] = (lo & 0xff00) >> 8; - addr[3] = (lo & 0xff0000) >> 16; - addr[2] = (lo & 0xff000000) >> 24; - addr[1] = (hi & 0xff); - addr[0] = (hi & 0xff00) >> 8; - } - else { - addr[0] = (lo & 0xff); - addr[1] = (lo & 0xff00) >> 8; - addr[2] = (lo & 0xff0000) >> 16; - addr[3] = (lo & 0xff000000) >> 24; - addr[4] = (hi & 0xff); - addr[5] = (hi & 0xff00) >> 8; - } - - if (is_valid_ether_addr(addr)) { - memcpy(dev->dev_addr, &addr, 6); - return 1; - } - return 0; -} - -/* - * Set the ethernet MAC address in dev->dev_addr - */ -static void __init get_mac_address(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - - /* Check Specific-Address 1 */ - if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA1H), at91_emac_read(lp, AT91_EMAC_SA1L))) - return; - /* Check Specific-Address 2 */ - if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA2H), at91_emac_read(lp, AT91_EMAC_SA2L))) - return; - /* Check Specific-Address 3 */ - if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA3H), at91_emac_read(lp, AT91_EMAC_SA3L))) - return; - /* Check Specific-Address 4 */ - if (unpack_mac_address(dev, at91_emac_read(lp, AT91_EMAC_SA4H), at91_emac_read(lp, AT91_EMAC_SA4L))) - return; - - printk(KERN_ERR "at91_ether: Your bootloader did not configure a MAC address.\n"); -} - -/* - * Program the hardware MAC address from dev->dev_addr. - */ -static void update_mac_address(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - - at91_emac_write(lp, AT91_EMAC_SA1L, (dev->dev_addr[3] << 24) | (dev->dev_addr[2] << 16) | (dev->dev_addr[1] << 8) | (dev->dev_addr[0])); - at91_emac_write(lp, AT91_EMAC_SA1H, (dev->dev_addr[5] << 8) | (dev->dev_addr[4])); - - at91_emac_write(lp, AT91_EMAC_SA2L, 0); - at91_emac_write(lp, AT91_EMAC_SA2H, 0); -} - -/* - * Store the new hardware address in dev->dev_addr, and update the MAC. - */ -static int set_mac_address(struct net_device *dev, void* addr) -{ - struct sockaddr *address = addr; - - if (!is_valid_ether_addr(address->sa_data)) - return -EADDRNOTAVAIL; - - memcpy(dev->dev_addr, address->sa_data, dev->addr_len); - update_mac_address(dev); - - printk("%s: Setting MAC address to %pM\n", dev->name, - dev->dev_addr); +#include "macb.h" - return 0; -} - -static int inline hash_bit_value(int bitnr, __u8 *addr) -{ - if (addr[bitnr / 8] & (1 << (bitnr % 8))) - return 1; - return 0; -} +/* 1518 rounded up */ +#define MAX_RBUFF_SZ 0x600 +/* max number of receive buffers */ +#define MAX_RX_DESCR 9 -/* - * The hash address register is 64 bits long and takes up two locations in the memory map. - * The least significant bits are stored in EMAC_HSL and the most significant - * bits in EMAC_HSH. - * - * The unicast hash enable and the multicast hash enable bits in the network configuration - * register enable the reception of hash matched frames. The destination address is - * reduced to a 6 bit index into the 64 bit hash register using the following hash function. - * The hash function is an exclusive or of every sixth bit of the destination address. - * hash_index[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47] - * hash_index[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46] - * hash_index[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45] - * hash_index[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44] - * hash_index[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43] - * hash_index[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42] - * da[0] represents the least significant bit of the first byte received, that is, the multicast/ - * unicast indicator, and da[47] represents the most significant bit of the last byte - * received. - * If the hash index points to a bit that is set in the hash register then the frame will be - * matched according to whether the frame is multicast or unicast. - * A multicast match will be signalled if the multicast hash enable bit is set, da[0] is 1 and - * the hash index points to a bit set in the hash register. - * A unicast match will be signalled if the unicast hash enable bit is set, da[0] is 0 and the - * hash index points to a bit set in the hash register. - * To receive all multicast frames, the hash register should be set with all ones and the - * multicast hash enable bit should be set in the network configuration register. - */ - -/* - * Return the hash index value for the specified address. - */ -static int hash_get_index(__u8 *addr) -{ - int i, j, bitval; - int hash_index = 0; - - for (j = 0; j < 6; j++) { - for (i = 0, bitval = 0; i < 8; i++) - bitval ^= hash_bit_value(i*6 + j, addr); - - hash_index |= (bitval << j); - } - - return hash_index; -} - -/* - * Add multicast addresses to the internal multicast-hash table. - */ -static void at91ether_sethashtable(struct net_device *dev) +/* Initialize and start the Receiver and Transmit subsystems */ +static int at91ether_start(struct net_device *dev) { - struct at91_private *lp = netdev_priv(dev); - struct netdev_hw_addr *ha; - unsigned long mc_filter[2]; - unsigned int bitnr; - - mc_filter[0] = mc_filter[1] = 0; - - netdev_for_each_mc_addr(ha, dev) { - bitnr = hash_get_index(ha->addr); - mc_filter[bitnr >> 5] |= 1 << (bitnr & 31); - } - - at91_emac_write(lp, AT91_EMAC_HSL, mc_filter[0]); - at91_emac_write(lp, AT91_EMAC_HSH, mc_filter[1]); -} + struct macb *lp = netdev_priv(dev); + dma_addr_t addr; + u32 ctl; + int i; -/* - * Enable/Disable promiscuous and multicast modes. - */ -static void at91ether_set_multicast_list(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - unsigned long cfg; - - cfg = at91_emac_read(lp, AT91_EMAC_CFG); - - if (dev->flags & IFF_PROMISC) /* Enable promiscuous mode */ - cfg |= AT91_EMAC_CAF; - else if (dev->flags & (~IFF_PROMISC)) /* Disable promiscuous mode */ - cfg &= ~AT91_EMAC_CAF; - - if (dev->flags & IFF_ALLMULTI) { /* Enable all multicast mode */ - at91_emac_write(lp, AT91_EMAC_HSH, -1); - at91_emac_write(lp, AT91_EMAC_HSL, -1); - cfg |= AT91_EMAC_MTI; - } else if (!netdev_mc_empty(dev)) { /* Enable specific multicasts */ - at91ether_sethashtable(dev); - cfg |= AT91_EMAC_MTI; - } else if (dev->flags & (~IFF_ALLMULTI)) { /* Disable all multicast mode */ - at91_emac_write(lp, AT91_EMAC_HSH, 0); - at91_emac_write(lp, AT91_EMAC_HSL, 0); - cfg &= ~AT91_EMAC_MTI; + lp->rx_ring = dma_alloc_coherent(&lp->pdev->dev, + MAX_RX_DESCR * sizeof(struct macb_dma_desc), + &lp->rx_ring_dma, GFP_KERNEL); + if (!lp->rx_ring) { + netdev_err(dev, "unable to alloc rx ring DMA buffer\n"); + return -ENOMEM; } - at91_emac_write(lp, AT91_EMAC_CFG, cfg); -} - -/* ......................... ETHTOOL SUPPORT ........................... */ - -static int mdio_read(struct net_device *dev, int phy_id, int location) -{ - struct at91_private *lp = netdev_priv(dev); - unsigned int value; - - read_phy(lp, phy_id, location, &value); - return value; -} - -static void mdio_write(struct net_device *dev, int phy_id, int location, int value) -{ - struct at91_private *lp = netdev_priv(dev); - - write_phy(lp, phy_id, location, value); -} - -static int at91ether_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct at91_private *lp = netdev_priv(dev); - int ret; - - spin_lock_irq(&lp->lock); - enable_mdi(lp); + lp->rx_buffers = dma_alloc_coherent(&lp->pdev->dev, + MAX_RX_DESCR * MAX_RBUFF_SZ, + &lp->rx_buffers_dma, GFP_KERNEL); + if (!lp->rx_buffers) { + netdev_err(dev, "unable to alloc rx data DMA buffer\n"); - ret = mii_ethtool_gset(&lp->mii, cmd); - - disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - if (lp->phy_media == PORT_FIBRE) { /* override media type since mii.c doesn't know */ - cmd->supported = SUPPORTED_FIBRE; - cmd->port = PORT_FIBRE; + dma_free_coherent(&lp->pdev->dev, + MAX_RX_DESCR * sizeof(struct macb_dma_desc), + lp->rx_ring, lp->rx_ring_dma); + lp->rx_ring = NULL; + return -ENOMEM; } - return ret; -} - -static int at91ether_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) -{ - struct at91_private *lp = netdev_priv(dev); - int ret; - - spin_lock_irq(&lp->lock); - enable_mdi(lp); - - ret = mii_ethtool_sset(&lp->mii, cmd); - - disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - return ret; -} - -static int at91ether_nwayreset(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - int ret; - - spin_lock_irq(&lp->lock); - enable_mdi(lp); - - ret = mii_nway_restart(&lp->mii); - - disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - return ret; -} - -static void at91ether_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) -{ - strlcpy(info->driver, DRV_NAME, sizeof(info->driver)); - strlcpy(info->version, DRV_VERSION, sizeof(info->version)); - strlcpy(info->bus_info, dev_name(dev->dev.parent), sizeof(info->bus_info)); -} - -static const struct ethtool_ops at91ether_ethtool_ops = { - .get_settings = at91ether_get_settings, - .set_settings = at91ether_set_settings, - .get_drvinfo = at91ether_get_drvinfo, - .nway_reset = at91ether_nwayreset, - .get_link = ethtool_op_get_link, -}; - -static int at91ether_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) -{ - struct at91_private *lp = netdev_priv(dev); - int res; - - if (!netif_running(dev)) - return -EINVAL; - - spin_lock_irq(&lp->lock); - enable_mdi(lp); - res = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL); - disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - return res; -} - -/* ................................ MAC ................................ */ - -/* - * Initialize and start the Receiver and Transmit subsystems - */ -static void at91ether_start(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - struct recv_desc_bufs *dlist, *dlist_phys; - int i; - unsigned long ctl; - - dlist = lp->dlist; - dlist_phys = lp->dlist_phys; - + addr = lp->rx_buffers_dma; for (i = 0; i < MAX_RX_DESCR; i++) { - dlist->descriptors[i].addr = (unsigned int) &dlist_phys->recv_buf[i][0]; - dlist->descriptors[i].size = 0; + lp->rx_ring[i].addr = addr; + lp->rx_ring[i].ctrl = 0; + addr += MAX_RBUFF_SZ; } /* Set the Wrap bit on the last descriptor */ - dlist->descriptors[i-1].addr |= EMAC_DESC_WRAP; + lp->rx_ring[MAX_RX_DESCR - 1].addr |= MACB_BIT(RX_WRAP); /* Reset buffer index */ - lp->rxBuffIndex = 0; + lp->rx_tail = 0; /* Program address of descriptor list in Rx Buffer Queue register */ - at91_emac_write(lp, AT91_EMAC_RBQP, (unsigned long) dlist_phys); + macb_writel(lp, RBQP, lp->rx_ring_dma); /* Enable Receive and Transmit */ - ctl = at91_emac_read(lp, AT91_EMAC_CTL); - at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_RE | AT91_EMAC_TE); + ctl = macb_readl(lp, NCR); + macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE)); + + return 0; } -/* - * Open the ethernet interface - */ +/* Open the ethernet interface */ static int at91ether_open(struct net_device *dev) { - struct at91_private *lp = netdev_priv(dev); - unsigned long ctl; - - if (!is_valid_ether_addr(dev->dev_addr)) - return -EADDRNOTAVAIL; - - clk_enable(lp->ether_clk); /* Re-enable Peripheral clock */ + struct macb *lp = netdev_priv(dev); + u32 ctl; + int ret; /* Clear internal statistics */ - ctl = at91_emac_read(lp, AT91_EMAC_CTL); - at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_CSR); + ctl = macb_readl(lp, NCR); + macb_writel(lp, NCR, ctl | MACB_BIT(CLRSTAT)); - /* Update the MAC address (incase user has changed it) */ - update_mac_address(dev); + macb_set_hwaddr(lp); - /* Enable PHY interrupt */ - enable_phyirq(dev); + ret = at91ether_start(dev); + if (ret) + return ret; /* Enable MAC interrupts */ - at91_emac_write(lp, AT91_EMAC_IER, AT91_EMAC_RCOM | AT91_EMAC_RBNA - | AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM - | AT91_EMAC_ROVR | AT91_EMAC_ABT); - - /* Determine current link speed */ - spin_lock_irq(&lp->lock); - enable_mdi(lp); - update_linkspeed(dev, 0); - disable_mdi(lp); - spin_unlock_irq(&lp->lock); - - at91ether_start(dev); + macb_writel(lp, IER, MACB_BIT(RCOMP) | + MACB_BIT(RXUBR) | + MACB_BIT(ISR_TUND) | + MACB_BIT(ISR_RLE) | + MACB_BIT(TCOMP) | + MACB_BIT(ISR_ROVR) | + MACB_BIT(HRESP)); + + /* schedule a link state check */ + phy_start(lp->phy_dev); + netif_start_queue(dev); + return 0; } -/* - * Close the interface - */ +/* Close the interface */ static int at91ether_close(struct net_device *dev) { - struct at91_private *lp = netdev_priv(dev); - unsigned long ctl; + struct macb *lp = netdev_priv(dev); + u32 ctl; /* Disable Receiver and Transmitter */ - ctl = at91_emac_read(lp, AT91_EMAC_CTL); - at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~(AT91_EMAC_TE | AT91_EMAC_RE)); - - /* Disable PHY interrupt */ - disable_phyirq(dev); + ctl = macb_readl(lp, NCR); + macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE))); /* Disable MAC interrupts */ - at91_emac_write(lp, AT91_EMAC_IDR, AT91_EMAC_RCOM | AT91_EMAC_RBNA - | AT91_EMAC_TUND | AT91_EMAC_RTRY | AT91_EMAC_TCOM - | AT91_EMAC_ROVR | AT91_EMAC_ABT); + macb_writel(lp, IDR, MACB_BIT(RCOMP) | + MACB_BIT(RXUBR) | + MACB_BIT(ISR_TUND) | + MACB_BIT(ISR_RLE) | + MACB_BIT(TCOMP) | + MACB_BIT(ISR_ROVR) | + MACB_BIT(HRESP)); netif_stop_queue(dev); - clk_disable(lp->ether_clk); /* Disable Peripheral clock */ + dma_free_coherent(&lp->pdev->dev, + MAX_RX_DESCR * sizeof(struct macb_dma_desc), + lp->rx_ring, lp->rx_ring_dma); + lp->rx_ring = NULL; + + dma_free_coherent(&lp->pdev->dev, + MAX_RX_DESCR * MAX_RBUFF_SZ, + lp->rx_buffers, lp->rx_buffers_dma); + lp->rx_buffers = NULL; return 0; } -/* - * Transmit packet. - */ +/* Transmit packet */ static int at91ether_start_xmit(struct sk_buff *skb, struct net_device *dev) { - struct at91_private *lp = netdev_priv(dev); + struct macb *lp = netdev_priv(dev); - if (at91_emac_read(lp, AT91_EMAC_TSR) & AT91_EMAC_TSR_BNQ) { + if (macb_readl(lp, TSR) & MACB_BIT(RM9200_BNQ)) { netif_stop_queue(dev); /* Store packet information (to free when Tx completed) */ lp->skb = skb; lp->skb_length = skb->len; - lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE); - dev->stats.tx_bytes += skb->len; + lp->skb_physaddr = dma_map_single(NULL, skb->data, skb->len, + DMA_TO_DEVICE); /* Set address of the data in the Transmit Address register */ - at91_emac_write(lp, AT91_EMAC_TAR, lp->skb_physaddr); + macb_writel(lp, TAR, lp->skb_physaddr); /* Set length of the packet in the Transmit Control register */ - at91_emac_write(lp, AT91_EMAC_TCR, skb->len); + macb_writel(lp, TCR, skb->len); } else { - printk(KERN_ERR "at91_ether.c: at91ether_start_xmit() called, but device is busy!\n"); - return NETDEV_TX_BUSY; /* if we return anything but zero, dev.c:1055 calls kfree_skb(skb) - on this skb, he also reports -ENETDOWN and printk's, so either - we free and return(0) or don't free and return 1 */ + netdev_err(dev, "%s called, but device is busy!\n", __func__); + return NETDEV_TX_BUSY; } return NETDEV_TX_OK; } -/* - * Update the current statistics from the internal statistics registers. - */ -static struct net_device_stats *at91ether_stats(struct net_device *dev) -{ - struct at91_private *lp = netdev_priv(dev); - int ale, lenerr, seqe, lcol, ecol; - - if (netif_running(dev)) { - dev->stats.rx_packets += at91_emac_read(lp, AT91_EMAC_OK); /* Good frames received */ - ale = at91_emac_read(lp, AT91_EMAC_ALE); - dev->stats.rx_frame_errors += ale; /* Alignment errors */ - lenerr = at91_emac_read(lp, AT91_EMAC_ELR) + at91_emac_read(lp, AT91_EMAC_USF); - dev->stats.rx_length_errors += lenerr; /* Excessive Length or Undersize Frame error */ - seqe = at91_emac_read(lp, AT91_EMAC_SEQE); - dev->stats.rx_crc_errors += seqe; /* CRC error */ - dev->stats.rx_fifo_errors += at91_emac_read(lp, AT91_EMAC_DRFC);/* Receive buffer not available */ - dev->stats.rx_errors += (ale + lenerr + seqe - + at91_emac_read(lp, AT91_EMAC_CDE) + at91_emac_read(lp, AT91_EMAC_RJB)); - - dev->stats.tx_packets += at91_emac_read(lp, AT91_EMAC_FRA); /* Frames successfully transmitted */ - dev->stats.tx_fifo_errors += at91_emac_read(lp, AT91_EMAC_TUE); /* Transmit FIFO underruns */ - dev->stats.tx_carrier_errors += at91_emac_read(lp, AT91_EMAC_CSE); /* Carrier Sense errors */ - dev->stats.tx_heartbeat_errors += at91_emac_read(lp, AT91_EMAC_SQEE);/* Heartbeat error */ - - lcol = at91_emac_read(lp, AT91_EMAC_LCOL); - ecol = at91_emac_read(lp, AT91_EMAC_ECOL); - dev->stats.tx_window_errors += lcol; /* Late collisions */ - dev->stats.tx_aborted_errors += ecol; /* 16 collisions */ - - dev->stats.collisions += (at91_emac_read(lp, AT91_EMAC_SCOL) + at91_emac_read(lp, AT91_EMAC_MCOL) + lcol + ecol); - } - return &dev->stats; -} - -/* - * Extract received frame from buffer descriptors and sent to upper layers. +/* Extract received frame from buffer descriptors and sent to upper layers. * (Called from interrupt context) */ static void at91ether_rx(struct net_device *dev) { - struct at91_private *lp = netdev_priv(dev); - struct recv_desc_bufs *dlist; + struct macb *lp = netdev_priv(dev); unsigned char *p_recv; struct sk_buff *skb; unsigned int pktlen; - dlist = lp->dlist; - while (dlist->descriptors[lp->rxBuffIndex].addr & EMAC_DESC_DONE) { - p_recv = dlist->recv_buf[lp->rxBuffIndex]; - pktlen = dlist->descriptors[lp->rxBuffIndex].size & 0x7ff; /* Length of frame including FCS */ + while (lp->rx_ring[lp->rx_tail].addr & MACB_BIT(RX_USED)) { + p_recv = lp->rx_buffers + lp->rx_tail * MAX_RBUFF_SZ; + pktlen = MACB_BF(RX_FRMLEN, lp->rx_ring[lp->rx_tail].ctrl); skb = netdev_alloc_skb(dev, pktlen + 2); - if (skb != NULL) { + if (skb) { skb_reserve(skb, 2); memcpy(skb_put(skb, pktlen), p_recv, pktlen); skb->protocol = eth_type_trans(skb, dev); - dev->stats.rx_bytes += pktlen; + lp->stats.rx_packets++; + lp->stats.rx_bytes += pktlen; netif_rx(skb); + } else { + lp->stats.rx_dropped++; + netdev_notice(dev, "Memory squeeze, dropping packet.\n"); } - else { - dev->stats.rx_dropped += 1; - printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name); - } - if (dlist->descriptors[lp->rxBuffIndex].size & EMAC_MULTICAST) - dev->stats.multicast++; + if (lp->rx_ring[lp->rx_tail].ctrl & MACB_BIT(RX_MHASH_MATCH)) + lp->stats.multicast++; + + /* reset ownership bit */ + lp->rx_ring[lp->rx_tail].addr &= ~MACB_BIT(RX_USED); - dlist->descriptors[lp->rxBuffIndex].addr &= ~EMAC_DESC_DONE; /* reset ownership bit */ - if (lp->rxBuffIndex == MAX_RX_DESCR-1) /* wrap after last buffer */ - lp->rxBuffIndex = 0; + /* wrap after last buffer */ + if (lp->rx_tail == MAX_RX_DESCR - 1) + lp->rx_tail = 0; else - lp->rxBuffIndex++; + lp->rx_tail++; } } -/* - * MAC interrupt handler - */ +/* MAC interrupt handler */ static irqreturn_t at91ether_interrupt(int irq, void *dev_id) { - struct net_device *dev = (struct net_device *) dev_id; - struct at91_private *lp = netdev_priv(dev); - unsigned long intstatus, ctl; + struct net_device *dev = dev_id; + struct macb *lp = netdev_priv(dev); + u32 intstatus, ctl; /* MAC Interrupt Status register indicates what interrupts are pending. - It is automatically cleared once read. */ - intstatus = at91_emac_read(lp, AT91_EMAC_ISR); + * It is automatically cleared once read. + */ + intstatus = macb_readl(lp, ISR); - if (intstatus & AT91_EMAC_RCOM) /* Receive complete */ + /* Receive complete */ + if (intstatus & MACB_BIT(RCOMP)) at91ether_rx(dev); - if (intstatus & AT91_EMAC_TCOM) { /* Transmit complete */ - /* The TCOM bit is set even if the transmission failed. */ - if (intstatus & (AT91_EMAC_TUND | AT91_EMAC_RTRY)) - dev->stats.tx_errors += 1; + /* Transmit complete */ + if (intstatus & MACB_BIT(TCOMP)) { + /* The TCOM bit is set even if the transmission failed */ + if (intstatus & (MACB_BIT(ISR_TUND) | MACB_BIT(ISR_RLE))) + lp->stats.tx_errors++; if (lp->skb) { dev_kfree_skb_irq(lp->skb); lp->skb = NULL; dma_unmap_single(NULL, lp->skb_physaddr, lp->skb_length, DMA_TO_DEVICE); + lp->stats.tx_packets++; + lp->stats.tx_bytes += lp->skb_length; } netif_wake_queue(dev); } - /* Work-around for Errata #11 */ - if (intstatus & AT91_EMAC_RBNA) { - ctl = at91_emac_read(lp, AT91_EMAC_CTL); - at91_emac_write(lp, AT91_EMAC_CTL, ctl & ~AT91_EMAC_RE); - at91_emac_write(lp, AT91_EMAC_CTL, ctl | AT91_EMAC_RE); + /* Work-around for EMAC Errata section 41.3.1 */ + if (intstatus & MACB_BIT(RXUBR)) { + ctl = macb_readl(lp, NCR); + macb_writel(lp, NCR, ctl & ~MACB_BIT(RE)); + macb_writel(lp, NCR, ctl | MACB_BIT(RE)); } - if (intstatus & AT91_EMAC_ROVR) - printk("%s: ROVR error\n", dev->name); + if (intstatus & MACB_BIT(ISR_ROVR)) + netdev_err(dev, "ROVR error\n"); return IRQ_HANDLED; } @@ -1000,10 +286,10 @@ static const struct net_device_ops at91ether_netdev_ops = { .ndo_open = at91ether_open, .ndo_stop = at91ether_close, .ndo_start_xmit = at91ether_start_xmit, - .ndo_get_stats = at91ether_stats, - .ndo_set_rx_mode = at91ether_set_multicast_list, - .ndo_set_mac_address = set_mac_address, - .ndo_do_ioctl = at91ether_ioctl, + .ndo_get_stats = macb_get_stats, + .ndo_set_rx_mode = macb_set_rx_mode, + .ndo_set_mac_address = eth_mac_addr, + .ndo_do_ioctl = macb_ioctl, .ndo_validate_addr = eth_validate_addr, .ndo_change_mtu = eth_change_mtu, #ifdef CONFIG_NET_POLL_CONTROLLER @@ -1011,237 +297,195 @@ static const struct net_device_ops at91ether_netdev_ops = { #endif }; -/* - * Detect the PHY type, and its address. - */ -static int __init at91ether_phy_detect(struct at91_private *lp) +#if defined(CONFIG_OF) +static const struct of_device_id at91ether_dt_ids[] = { + { .compatible = "cdns,at91rm9200-emac" }, + { .compatible = "cdns,emac" }, + { /* sentinel */ } +}; + +MODULE_DEVICE_TABLE(of, at91ether_dt_ids); + +static int at91ether_get_phy_mode_dt(struct platform_device *pdev) { - unsigned int phyid1, phyid2; - unsigned long phy_id; - unsigned short phy_address = 0; - - while (phy_address < PHY_MAX_ADDR) { - /* Read the PHY ID registers */ - enable_mdi(lp); - read_phy(lp, phy_address, MII_PHYSID1, &phyid1); - read_phy(lp, phy_address, MII_PHYSID2, &phyid2); - disable_mdi(lp); - - phy_id = (phyid1 << 16) | (phyid2 & 0xfff0); - switch (phy_id) { - case MII_DM9161_ID: /* Davicom 9161: PHY_ID1 = 0x181, PHY_ID2 = B881 */ - case MII_DM9161A_ID: /* Davicom 9161A: PHY_ID1 = 0x181, PHY_ID2 = B8A0 */ - case MII_LXT971A_ID: /* Intel LXT971A: PHY_ID1 = 0x13, PHY_ID2 = 78E0 */ - case MII_RTL8201_ID: /* Realtek RTL8201: PHY_ID1 = 0, PHY_ID2 = 0x8201 */ - case MII_BCM5221_ID: /* Broadcom BCM5221: PHY_ID1 = 0x40, PHY_ID2 = 0x61e0 */ - case MII_DP83847_ID: /* National Semiconductor DP83847: */ - case MII_DP83848_ID: /* National Semiconductor DP83848: */ - case MII_AC101L_ID: /* Altima AC101L: PHY_ID1 = 0x22, PHY_ID2 = 0x5520 */ - case MII_KS8721_ID: /* Micrel KS8721: PHY_ID1 = 0x22, PHY_ID2 = 0x1610 */ - case MII_T78Q21x3_ID: /* Teridian 78Q21x3: PHY_ID1 = 0x0E, PHY_ID2 = 7237 */ - case MII_LAN83C185_ID: /* SMSC LAN83C185: PHY_ID1 = 0x0007, PHY_ID2 = 0xC0A1 */ - /* store detected values */ - lp->phy_type = phy_id; /* Type of PHY connected */ - lp->phy_address = phy_address; /* MDI address of PHY */ - return 1; - } + struct device_node *np = pdev->dev.of_node; - phy_address++; - } + if (np) + return of_get_phy_mode(np); - return 0; /* not detected */ + return -ENODEV; } +static int at91ether_get_hwaddr_dt(struct macb *bp) +{ + struct device_node *np = bp->pdev->dev.of_node; -/* - * Detect MAC & PHY and perform ethernet interface initialization - */ + if (np) { + const char *mac = of_get_mac_address(np); + if (mac) { + memcpy(bp->dev->dev_addr, mac, ETH_ALEN); + return 0; + } + } + + return -ENODEV; +} +#else +static int at91ether_get_phy_mode_dt(struct platform_device *pdev) +{ + return -ENODEV; +} +static int at91ether_get_hwaddr_dt(struct macb *bp) +{ + return -ENODEV; +} +#endif + +/* Detect MAC & PHY and perform ethernet interface initialization */ static int __init at91ether_probe(struct platform_device *pdev) { struct macb_platform_data *board_data = pdev->dev.platform_data; struct resource *regs; struct net_device *dev; - struct at91_private *lp; + struct phy_device *phydev; + struct pinctrl *pinctrl; + struct macb *lp; int res; + u32 reg; regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!regs) return -ENOENT; - dev = alloc_etherdev(sizeof(struct at91_private)); + pinctrl = devm_pinctrl_get_select_default(&pdev->dev); + if (IS_ERR(pinctrl)) { + res = PTR_ERR(pinctrl); + if (res == -EPROBE_DEFER) + return res; + + dev_warn(&pdev->dev, "No pinctrl provided\n"); + } + + dev = alloc_etherdev(sizeof(struct macb)); if (!dev) return -ENOMEM; lp = netdev_priv(dev); - lp->board_data = *board_data; + lp->pdev = pdev; + lp->dev = dev; spin_lock_init(&lp->lock); - dev->base_addr = regs->start; /* physical base address */ - lp->emac_base = ioremap(regs->start, regs->end - regs->start + 1); - if (!lp->emac_base) { + /* physical base address */ + dev->base_addr = regs->start; + lp->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs)); + if (!lp->regs) { res = -ENOMEM; goto err_free_dev; } /* Clock */ - lp->ether_clk = clk_get(&pdev->dev, "ether_clk"); - if (IS_ERR(lp->ether_clk)) { - res = PTR_ERR(lp->ether_clk); - goto err_ioumap; + lp->pclk = devm_clk_get(&pdev->dev, "ether_clk"); + if (IS_ERR(lp->pclk)) { + res = PTR_ERR(lp->pclk); + goto err_free_dev; } - clk_enable(lp->ether_clk); + clk_enable(lp->pclk); /* Install the interrupt handler */ dev->irq = platform_get_irq(pdev, 0); - if (request_irq(dev->irq, at91ether_interrupt, 0, dev->name, dev)) { - res = -EBUSY; + res = devm_request_irq(&pdev->dev, dev->irq, at91ether_interrupt, 0, dev->name, dev); + if (res) goto err_disable_clock; - } - - /* Allocate memory for DMA Receive descriptors */ - lp->dlist = (struct recv_desc_bufs *) dma_alloc_coherent(NULL, sizeof(struct recv_desc_bufs), (dma_addr_t *) &lp->dlist_phys, GFP_KERNEL); - if (lp->dlist == NULL) { - res = -ENOMEM; - goto err_free_irq; - } ether_setup(dev); dev->netdev_ops = &at91ether_netdev_ops; - dev->ethtool_ops = &at91ether_ethtool_ops; + dev->ethtool_ops = &macb_ethtool_ops; platform_set_drvdata(pdev, dev); SET_NETDEV_DEV(dev, &pdev->dev); - get_mac_address(dev); /* Get ethernet address and store it in dev->dev_addr */ - update_mac_address(dev); /* Program ethernet address into MAC */ - - at91_emac_write(lp, AT91_EMAC_CTL, 0); + res = at91ether_get_hwaddr_dt(lp); + if (res < 0) + macb_get_hwaddr(lp); - if (board_data->is_rmii) - at91_emac_write(lp, AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG | AT91_EMAC_RMII); - else - at91_emac_write(lp, AT91_EMAC_CFG, AT91_EMAC_CLK_DIV32 | AT91_EMAC_BIG); - - /* Detect PHY */ - if (!at91ether_phy_detect(lp)) { - printk(KERN_ERR "at91_ether: Could not detect ethernet PHY\n"); - res = -ENODEV; - goto err_free_dmamem; + res = at91ether_get_phy_mode_dt(pdev); + if (res < 0) { + if (board_data && board_data->is_rmii) + lp->phy_interface = PHY_INTERFACE_MODE_RMII; + else + lp->phy_interface = PHY_INTERFACE_MODE_MII; + } else { + lp->phy_interface = res; } - initialize_phy(lp); + macb_writel(lp, NCR, 0); + + reg = MACB_BF(CLK, MACB_CLK_DIV32) | MACB_BIT(BIG); + if (lp->phy_interface == PHY_INTERFACE_MODE_RMII) + reg |= MACB_BIT(RM9200_RMII); - lp->mii.dev = dev; /* Support for ethtool */ - lp->mii.mdio_read = mdio_read; - lp->mii.mdio_write = mdio_write; - lp->mii.phy_id = lp->phy_address; - lp->mii.phy_id_mask = 0x1f; - lp->mii.reg_num_mask = 0x1f; + macb_writel(lp, NCFGR, reg); /* Register the network interface */ res = register_netdev(dev); if (res) - goto err_free_dmamem; - - /* Determine current link speed */ - spin_lock_irq(&lp->lock); - enable_mdi(lp); - update_linkspeed(dev, 0); - disable_mdi(lp); - spin_unlock_irq(&lp->lock); - netif_carrier_off(dev); /* will be enabled in open() */ - - /* If board has no PHY IRQ, use a timer to poll the PHY */ - if (gpio_is_valid(lp->board_data.phy_irq_pin)) { - gpio_request(board_data->phy_irq_pin, "ethernet_phy"); - } else { - /* If board has no PHY IRQ, use a timer to poll the PHY */ - init_timer(&lp->check_timer); - lp->check_timer.data = (unsigned long)dev; - lp->check_timer.function = at91ether_check_link; - } + goto err_disable_clock; + + if (macb_mii_init(lp) != 0) + goto err_out_unregister_netdev; + + /* will be enabled in open() */ + netif_carrier_off(dev); + + phydev = lp->phy_dev; + netdev_info(dev, "attached PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n", + phydev->drv->name, dev_name(&phydev->dev), + phydev->irq); /* Display ethernet banner */ - printk(KERN_INFO "%s: AT91 ethernet at 0x%08x int=%d %s%s (%pM)\n", - dev->name, (uint) dev->base_addr, dev->irq, - at91_emac_read(lp, AT91_EMAC_CFG) & AT91_EMAC_SPD ? "100-" : "10-", - at91_emac_read(lp, AT91_EMAC_CFG) & AT91_EMAC_FD ? "FullDuplex" : "HalfDuplex", - dev->dev_addr); - if ((lp->phy_type == MII_DM9161_ID) || (lp->phy_type == MII_DM9161A_ID)) - printk(KERN_INFO "%s: Davicom 9161 PHY %s\n", dev->name, (lp->phy_media == PORT_FIBRE) ? "(Fiber)" : "(Copper)"); - else if (lp->phy_type == MII_LXT971A_ID) - printk(KERN_INFO "%s: Intel LXT971A PHY\n", dev->name); - else if (lp->phy_type == MII_RTL8201_ID) - printk(KERN_INFO "%s: Realtek RTL8201(B)L PHY\n", dev->name); - else if (lp->phy_type == MII_BCM5221_ID) - printk(KERN_INFO "%s: Broadcom BCM5221 PHY\n", dev->name); - else if (lp->phy_type == MII_DP83847_ID) - printk(KERN_INFO "%s: National Semiconductor DP83847 PHY\n", dev->name); - else if (lp->phy_type == MII_DP83848_ID) - printk(KERN_INFO "%s: National Semiconductor DP83848 PHY\n", dev->name); - else if (lp->phy_type == MII_AC101L_ID) - printk(KERN_INFO "%s: Altima AC101L PHY\n", dev->name); - else if (lp->phy_type == MII_KS8721_ID) - printk(KERN_INFO "%s: Micrel KS8721 PHY\n", dev->name); - else if (lp->phy_type == MII_T78Q21x3_ID) - printk(KERN_INFO "%s: Teridian 78Q21x3 PHY\n", dev->name); - else if (lp->phy_type == MII_LAN83C185_ID) - printk(KERN_INFO "%s: SMSC LAN83C185 PHY\n", dev->name); - - clk_disable(lp->ether_clk); /* Disable Peripheral clock */ + netdev_info(dev, "AT91 ethernet at 0x%08lx int=%d (%pM)\n", + dev->base_addr, dev->irq, dev->dev_addr); return 0; - -err_free_dmamem: - platform_set_drvdata(pdev, NULL); - dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys); -err_free_irq: - free_irq(dev->irq, dev); +err_out_unregister_netdev: + unregister_netdev(dev); err_disable_clock: - clk_disable(lp->ether_clk); - clk_put(lp->ether_clk); -err_ioumap: - iounmap(lp->emac_base); + clk_disable(lp->pclk); err_free_dev: free_netdev(dev); return res; } -static int __devexit at91ether_remove(struct platform_device *pdev) +static int at91ether_remove(struct platform_device *pdev) { struct net_device *dev = platform_get_drvdata(pdev); - struct at91_private *lp = netdev_priv(dev); + struct macb *lp = netdev_priv(dev); - if (gpio_is_valid(lp->board_data.phy_irq_pin)) - gpio_free(lp->board_data.phy_irq_pin); + if (lp->phy_dev) + phy_disconnect(lp->phy_dev); + mdiobus_unregister(lp->mii_bus); + kfree(lp->mii_bus->irq); + mdiobus_free(lp->mii_bus); unregister_netdev(dev); - free_irq(dev->irq, dev); - dma_free_coherent(NULL, sizeof(struct recv_desc_bufs), lp->dlist, (dma_addr_t)lp->dlist_phys); - clk_put(lp->ether_clk); - - platform_set_drvdata(pdev, NULL); + clk_disable(lp->pclk); free_netdev(dev); + platform_set_drvdata(pdev, NULL); + return 0; } #ifdef CONFIG_PM - static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg) { struct net_device *net_dev = platform_get_drvdata(pdev); - struct at91_private *lp = netdev_priv(net_dev); + struct macb *lp = netdev_priv(net_dev); if (netif_running(net_dev)) { - if (gpio_is_valid(lp->board_data.phy_irq_pin)) { - int phy_irq = gpio_to_irq(lp->board_data.phy_irq_pin); - disable_irq(phy_irq); - } - netif_stop_queue(net_dev); netif_device_detach(net_dev); - clk_disable(lp->ether_clk); + clk_disable(lp->pclk); } return 0; } @@ -1249,34 +493,29 @@ static int at91ether_suspend(struct platform_device *pdev, pm_message_t mesg) static int at91ether_resume(struct platform_device *pdev) { struct net_device *net_dev = platform_get_drvdata(pdev); - struct at91_private *lp = netdev_priv(net_dev); + struct macb *lp = netdev_priv(net_dev); if (netif_running(net_dev)) { - clk_enable(lp->ether_clk); + clk_enable(lp->pclk); netif_device_attach(net_dev); netif_start_queue(net_dev); - - if (gpio_is_valid(lp->board_data.phy_irq_pin)) { - int phy_irq = gpio_to_irq(lp->board_data.phy_irq_pin); - enable_irq(phy_irq); - } } return 0; } - #else #define at91ether_suspend NULL #define at91ether_resume NULL #endif static struct platform_driver at91ether_driver = { - .remove = __devexit_p(at91ether_remove), + .remove = at91ether_remove, .suspend = at91ether_suspend, .resume = at91ether_resume, .driver = { - .name = DRV_NAME, + .name = "at91_ether", .owner = THIS_MODULE, + .of_match_table = of_match_ptr(at91ether_dt_ids), }, }; @@ -1296,4 +535,4 @@ module_exit(at91ether_exit) MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("AT91RM9200 EMAC Ethernet driver"); MODULE_AUTHOR("Andrew Victor"); -MODULE_ALIAS("platform:" DRV_NAME); +MODULE_ALIAS("platform:at91_ether"); diff --git a/drivers/net/ethernet/cadence/at91_ether.h b/drivers/net/ethernet/cadence/at91_ether.h deleted file mode 100644 index 0ef6328fa7f..00000000000 --- a/drivers/net/ethernet/cadence/at91_ether.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Ethernet driver for the Atmel AT91RM9200 (Thunder) - * - * Copyright (C) SAN People (Pty) Ltd - * - * Based on an earlier Atmel EMAC macrocell driver by Atmel and Lineo Inc. - * Initial version by Rick Bronson. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#ifndef AT91_ETHERNET -#define AT91_ETHERNET - - -/* Davicom 9161 PHY */ -#define MII_DM9161_ID 0x0181b880 -#define MII_DM9161A_ID 0x0181b8a0 -#define MII_DSCR_REG 16 -#define MII_DSCSR_REG 17 -#define MII_DSINTR_REG 21 - -/* Intel LXT971A PHY */ -#define MII_LXT971A_ID 0x001378E0 -#define MII_ISINTE_REG 18 -#define MII_ISINTS_REG 19 -#define MII_LEDCTRL_REG 20 - -/* Realtek RTL8201 PHY */ -#define MII_RTL8201_ID 0x00008200 - -/* Broadcom BCM5221 PHY */ -#define MII_BCM5221_ID 0x004061e0 -#define MII_BCMINTR_REG 26 - -/* National Semiconductor DP83847 */ -#define MII_DP83847_ID 0x20005c30 - -/* National Semiconductor DP83848 */ -#define MII_DP83848_ID 0x20005c90 -#define MII_DPPHYSTS_REG 16 -#define MII_DPMICR_REG 17 -#define MII_DPMISR_REG 18 - -/* Altima AC101L PHY */ -#define MII_AC101L_ID 0x00225520 - -/* Micrel KS8721 PHY */ -#define MII_KS8721_ID 0x00221610 - -/* Teridian 78Q2123/78Q2133 */ -#define MII_T78Q21x3_ID 0x000e7230 -#define MII_T78Q21INT_REG 17 - -/* SMSC LAN83C185 */ -#define MII_LAN83C185_ID 0x0007C0A0 - -/* ........................................................................ */ - -#define MAX_RBUFF_SZ 0x600 /* 1518 rounded up */ -#define MAX_RX_DESCR 9 /* max number of receive buffers */ - -#define EMAC_DESC_DONE 0x00000001 /* bit for if DMA is done */ -#define EMAC_DESC_WRAP 0x00000002 /* bit for wrap */ - -#define EMAC_BROADCAST 0x80000000 /* broadcast address */ -#define EMAC_MULTICAST 0x40000000 /* multicast address */ -#define EMAC_UNICAST 0x20000000 /* unicast address */ - -struct rbf_t -{ - unsigned int addr; - unsigned long size; -}; - -struct recv_desc_bufs -{ - struct rbf_t descriptors[MAX_RX_DESCR]; /* must be on sizeof (rbf_t) boundary */ - char recv_buf[MAX_RX_DESCR][MAX_RBUFF_SZ]; /* must be on long boundary */ -}; - -struct at91_private -{ - struct mii_if_info mii; /* ethtool support */ - struct macb_platform_data board_data; /* board-specific - * configuration (shared with - * macb for common data */ - void __iomem *emac_base; /* base register address */ - struct clk *ether_clk; /* clock */ - - /* PHY */ - unsigned long phy_type; /* type of PHY (PHY_ID) */ - spinlock_t lock; /* lock for MDI interface */ - short phy_media; /* media interface type */ - unsigned short phy_address; /* 5-bit MDI address of PHY (0..31) */ - struct timer_list check_timer; /* Poll link status */ - - /* Transmit */ - struct sk_buff *skb; /* holds skb until xmit interrupt completes */ - dma_addr_t skb_physaddr; /* phys addr from pci_map_single */ - int skb_length; /* saved skb length for pci_unmap_single */ - - /* Receive */ - int rxBuffIndex; /* index into receive descriptor list */ - struct recv_desc_bufs *dlist; /* descriptor list address */ - struct recv_desc_bufs *dlist_phys; /* descriptor list physical address */ -}; - -#endif diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index 033064b7b57..a9b0830fb39 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c @@ -14,8 +14,10 @@ #include <linux/moduleparam.h> #include <linux/kernel.h> #include <linux/types.h> +#include <linux/circ_buf.h> #include <linux/slab.h> #include <linux/init.h> +#include <linux/gpio.h> #include <linux/interrupt.h> #include <linux/netdevice.h> #include <linux/etherdevice.h> @@ -26,37 +28,74 @@ #include <linux/of.h> #include <linux/of_device.h> #include <linux/of_net.h> +#include <linux/pinctrl/consumer.h> #include "macb.h" #define RX_BUFFER_SIZE 128 -#define RX_RING_SIZE 512 -#define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE) +#define RX_RING_SIZE 512 /* must be power of 2 */ +#define RX_RING_BYTES (sizeof(struct macb_dma_desc) * RX_RING_SIZE) -/* Make the IP header word-aligned (the ethernet header is 14 bytes) */ -#define RX_OFFSET 2 +#define TX_RING_SIZE 128 /* must be power of 2 */ +#define TX_RING_BYTES (sizeof(struct macb_dma_desc) * TX_RING_SIZE) -#define TX_RING_SIZE 128 -#define DEF_TX_RING_PENDING (TX_RING_SIZE - 1) -#define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE) +/* level of occupied TX descriptors under which we wake up TX process */ +#define MACB_TX_WAKEUP_THRESH (3 * TX_RING_SIZE / 4) -#define TX_RING_GAP(bp) \ - (TX_RING_SIZE - (bp)->tx_pending) -#define TX_BUFFS_AVAIL(bp) \ - (((bp)->tx_tail <= (bp)->tx_head) ? \ - (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \ - (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp)) -#define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1)) +#define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \ + | MACB_BIT(ISR_ROVR)) +#define MACB_TX_ERR_FLAGS (MACB_BIT(ISR_TUND) \ + | MACB_BIT(ISR_RLE) \ + | MACB_BIT(TXERR)) +#define MACB_TX_INT_FLAGS (MACB_TX_ERR_FLAGS | MACB_BIT(TCOMP)) -#define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1)) +/* + * Graceful stop timeouts in us. We should allow up to + * 1 frame time (10 Mbits/s, full-duplex, ignoring collisions) + */ +#define MACB_HALT_TIMEOUT 1230 -/* minimum number of free TX descriptors before waking up TX process */ -#define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4) +/* Ring buffer accessors */ +static unsigned int macb_tx_ring_wrap(unsigned int index) +{ + return index & (TX_RING_SIZE - 1); +} -#define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \ - | MACB_BIT(ISR_ROVR)) +static struct macb_dma_desc *macb_tx_desc(struct macb *bp, unsigned int index) +{ + return &bp->tx_ring[macb_tx_ring_wrap(index)]; +} -static void __macb_set_hwaddr(struct macb *bp) +static struct macb_tx_skb *macb_tx_skb(struct macb *bp, unsigned int index) +{ + return &bp->tx_skb[macb_tx_ring_wrap(index)]; +} + +static dma_addr_t macb_tx_dma(struct macb *bp, unsigned int index) +{ + dma_addr_t offset; + + offset = macb_tx_ring_wrap(index) * sizeof(struct macb_dma_desc); + + return bp->tx_ring_dma + offset; +} + +static unsigned int macb_rx_ring_wrap(unsigned int index) +{ + return index & (RX_RING_SIZE - 1); +} + +static struct macb_dma_desc *macb_rx_desc(struct macb *bp, unsigned int index) +{ + return &bp->rx_ring[macb_rx_ring_wrap(index)]; +} + +static void *macb_rx_buffer(struct macb *bp, unsigned int index) +{ + return bp->rx_buffers + RX_BUFFER_SIZE * macb_rx_ring_wrap(index); +} + +void macb_set_hwaddr(struct macb *bp) { u32 bottom; u16 top; @@ -65,31 +104,58 @@ static void __macb_set_hwaddr(struct macb *bp) macb_or_gem_writel(bp, SA1B, bottom); top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4))); macb_or_gem_writel(bp, SA1T, top); + + /* Clear unused address register sets */ + macb_or_gem_writel(bp, SA2B, 0); + macb_or_gem_writel(bp, SA2T, 0); + macb_or_gem_writel(bp, SA3B, 0); + macb_or_gem_writel(bp, SA3T, 0); + macb_or_gem_writel(bp, SA4B, 0); + macb_or_gem_writel(bp, SA4T, 0); } +EXPORT_SYMBOL_GPL(macb_set_hwaddr); -static void __init macb_get_hwaddr(struct macb *bp) +void macb_get_hwaddr(struct macb *bp) { + struct macb_platform_data *pdata; u32 bottom; u16 top; u8 addr[6]; + int i; - bottom = macb_or_gem_readl(bp, SA1B); - top = macb_or_gem_readl(bp, SA1T); + pdata = bp->pdev->dev.platform_data; - addr[0] = bottom & 0xff; - addr[1] = (bottom >> 8) & 0xff; - addr[2] = (bottom >> 16) & 0xff; - addr[3] = (bottom >> 24) & 0xff; - addr[4] = top & 0xff; - addr[5] = (top >> 8) & 0xff; + /* Check all 4 address register for vaild address */ + for (i = 0; i < 4; i++) { + bottom = macb_or_gem_readl(bp, SA1B + i * 8); + top = macb_or_gem_readl(bp, SA1T + i * 8); + + if (pdata && pdata->rev_eth_addr) { + addr[5] = bottom & 0xff; + addr[4] = (bottom >> 8) & 0xff; + addr[3] = (bottom >> 16) & 0xff; + addr[2] = (bottom >> 24) & 0xff; + addr[1] = top & 0xff; + addr[0] = (top & 0xff00) >> 8; + } else { + addr[0] = bottom & 0xff; + addr[1] = (bottom >> 8) & 0xff; + addr[2] = (bottom >> 16) & 0xff; + addr[3] = (bottom >> 24) & 0xff; + addr[4] = top & 0xff; + addr[5] = (top >> 8) & 0xff; + } - if (is_valid_ether_addr(addr)) { - memcpy(bp->dev->dev_addr, addr, sizeof(addr)); - } else { - netdev_info(bp->dev, "invalid hw address, using random\n"); - eth_hw_addr_random(bp->dev); + if (is_valid_ether_addr(addr)) { + memcpy(bp->dev->dev_addr, addr, sizeof(addr)); + return; + } } + + netdev_info(bp->dev, "invalid hw address, using random\n"); + eth_hw_addr_random(bp->dev); } +EXPORT_SYMBOL_GPL(macb_get_hwaddr); static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum) { @@ -152,13 +218,17 @@ static void macb_handle_link_change(struct net_device *dev) reg = macb_readl(bp, NCFGR); reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD)); + if (macb_is_gem(bp)) + reg &= ~GEM_BIT(GBE); if (phydev->duplex) reg |= MACB_BIT(FD); if (phydev->speed == SPEED_100) reg |= MACB_BIT(SPD); + if (phydev->speed == SPEED_1000) + reg |= GEM_BIT(GBE); - macb_writel(bp, NCFGR, reg); + macb_or_gem_writel(bp, NCFGR, reg); bp->speed = phydev->speed; bp->duplex = phydev->duplex; @@ -196,7 +266,9 @@ static void macb_handle_link_change(struct net_device *dev) static int macb_mii_probe(struct net_device *dev) { struct macb *bp = netdev_priv(dev); + struct macb_platform_data *pdata; struct phy_device *phydev; + int phy_irq; int ret; phydev = phy_find_first(bp->mii_bus); @@ -205,7 +277,14 @@ static int macb_mii_probe(struct net_device *dev) return -1; } - /* TODO : add pin_irq */ + pdata = dev_get_platdata(&bp->pdev->dev); + if (pdata && gpio_is_valid(pdata->phy_irq_pin)) { + ret = devm_gpio_request(&bp->pdev->dev, pdata->phy_irq_pin, "phy int"); + if (!ret) { + phy_irq = gpio_to_irq(pdata->phy_irq_pin); + phydev->irq = (phy_irq < 0) ? PHY_POLL : phy_irq; + } + } /* attach the mac to the phy */ ret = phy_connect_direct(dev, phydev, &macb_handle_link_change, 0, @@ -216,7 +295,10 @@ static int macb_mii_probe(struct net_device *dev) } /* mask with MAC supported features */ - phydev->supported &= PHY_BASIC_FEATURES; + if (macb_is_gem(bp)) + phydev->supported &= PHY_GBIT_FEATURES; + else + phydev->supported &= PHY_BASIC_FEATURES; phydev->advertising = phydev->supported; @@ -228,7 +310,7 @@ static int macb_mii_probe(struct net_device *dev) return 0; } -static int macb_mii_init(struct macb *bp) +int macb_mii_init(struct macb *bp) { struct macb_platform_data *pdata; int err = -ENXIO, i; @@ -284,6 +366,7 @@ err_out_free_mdiobus: err_out: return err; } +EXPORT_SYMBOL_GPL(macb_mii_init); static void macb_update_stats(struct macb *bp) { @@ -297,93 +380,148 @@ static void macb_update_stats(struct macb *bp) *p += __raw_readl(reg); } -static void macb_tx(struct macb *bp) +static int macb_halt_tx(struct macb *bp) { - unsigned int tail; - unsigned int head; - u32 status; + unsigned long halt_time, timeout; + u32 status; - status = macb_readl(bp, TSR); - macb_writel(bp, TSR, status); + macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(THALT)); - netdev_dbg(bp->dev, "macb_tx status = %02lx\n", (unsigned long)status); + timeout = jiffies + usecs_to_jiffies(MACB_HALT_TIMEOUT); + do { + halt_time = jiffies; + status = macb_readl(bp, TSR); + if (!(status & MACB_BIT(TGO))) + return 0; - if (status & (MACB_BIT(UND) | MACB_BIT(TSR_RLE))) { - int i; - netdev_err(bp->dev, "TX %s, resetting buffers\n", - status & MACB_BIT(UND) ? - "underrun" : "retry limit exceeded"); + usleep_range(10, 250); + } while (time_before(halt_time, timeout)); - /* Transfer ongoing, disable transmitter, to avoid confusion */ - if (status & MACB_BIT(TGO)) - macb_writel(bp, NCR, macb_readl(bp, NCR) & ~MACB_BIT(TE)); + return -ETIMEDOUT; +} - head = bp->tx_head; +static void macb_tx_error_task(struct work_struct *work) +{ + struct macb *bp = container_of(work, struct macb, tx_error_task); + struct macb_tx_skb *tx_skb; + struct sk_buff *skb; + unsigned int tail; - /*Mark all the buffer as used to avoid sending a lost buffer*/ - for (i = 0; i < TX_RING_SIZE; i++) - bp->tx_ring[i].ctrl = MACB_BIT(TX_USED); + netdev_vdbg(bp->dev, "macb_tx_error_task: t = %u, h = %u\n", + bp->tx_tail, bp->tx_head); - /* Add wrap bit */ - bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP); + /* Make sure nobody is trying to queue up new packets */ + netif_stop_queue(bp->dev); - /* free transmit buffer in upper layer*/ - for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) { - struct ring_info *rp = &bp->tx_skb[tail]; - struct sk_buff *skb = rp->skb; + /* + * Stop transmission now + * (in case we have just queued new packets) + */ + if (macb_halt_tx(bp)) + /* Just complain for now, reinitializing TX path can be good */ + netdev_err(bp->dev, "BUG: halt tx timed out\n"); - BUG_ON(skb == NULL); + /* No need for the lock here as nobody will interrupt us anymore */ - rmb(); + /* + * Treat frames in TX queue including the ones that caused the error. + * Free transmit buffers in upper layer. + */ + for (tail = bp->tx_tail; tail != bp->tx_head; tail++) { + struct macb_dma_desc *desc; + u32 ctrl; + + desc = macb_tx_desc(bp, tail); + ctrl = desc->ctrl; + tx_skb = macb_tx_skb(bp, tail); + skb = tx_skb->skb; + + if (ctrl & MACB_BIT(TX_USED)) { + netdev_vdbg(bp->dev, "txerr skb %u (data %p) TX complete\n", + macb_tx_ring_wrap(tail), skb->data); + bp->stats.tx_packets++; + bp->stats.tx_bytes += skb->len; + } else { + /* + * "Buffers exhausted mid-frame" errors may only happen + * if the driver is buggy, so complain loudly about those. + * Statistics are updated by hardware. + */ + if (ctrl & MACB_BIT(TX_BUF_EXHAUSTED)) + netdev_err(bp->dev, + "BUG: TX buffers exhausted mid-frame\n"); - dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len, - DMA_TO_DEVICE); - rp->skb = NULL; - dev_kfree_skb_irq(skb); + desc->ctrl = ctrl | MACB_BIT(TX_USED); } - bp->tx_head = bp->tx_tail = 0; - - /* Enable the transmitter again */ - if (status & MACB_BIT(TGO)) - macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TE)); + dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, skb->len, + DMA_TO_DEVICE); + tx_skb->skb = NULL; + dev_kfree_skb(skb); } - if (!(status & MACB_BIT(COMP))) - /* - * This may happen when a buffer becomes complete - * between reading the ISR and scanning the - * descriptors. Nothing to worry about. - */ - return; + /* Make descriptor updates visible to hardware */ + wmb(); + + /* Reinitialize the TX desc queue */ + macb_writel(bp, TBQP, bp->tx_ring_dma); + /* Make TX ring reflect state of hardware */ + bp->tx_head = bp->tx_tail = 0; + + /* Now we are ready to start transmission again */ + netif_wake_queue(bp->dev); + + /* Housework before enabling TX IRQ */ + macb_writel(bp, TSR, macb_readl(bp, TSR)); + macb_writel(bp, IER, MACB_TX_INT_FLAGS); +} + +static void macb_tx_interrupt(struct macb *bp) +{ + unsigned int tail; + unsigned int head; + u32 status; + + status = macb_readl(bp, TSR); + macb_writel(bp, TSR, status); + + netdev_vdbg(bp->dev, "macb_tx_interrupt status = 0x%03lx\n", + (unsigned long)status); head = bp->tx_head; - for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) { - struct ring_info *rp = &bp->tx_skb[tail]; - struct sk_buff *skb = rp->skb; - u32 bufstat; + for (tail = bp->tx_tail; tail != head; tail++) { + struct macb_tx_skb *tx_skb; + struct sk_buff *skb; + struct macb_dma_desc *desc; + u32 ctrl; - BUG_ON(skb == NULL); + desc = macb_tx_desc(bp, tail); + /* Make hw descriptor updates visible to CPU */ rmb(); - bufstat = bp->tx_ring[tail].ctrl; - if (!(bufstat & MACB_BIT(TX_USED))) + ctrl = desc->ctrl; + + if (!(ctrl & MACB_BIT(TX_USED))) break; - netdev_dbg(bp->dev, "skb %u (data %p) TX complete\n", - tail, skb->data); - dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len, + tx_skb = macb_tx_skb(bp, tail); + skb = tx_skb->skb; + + netdev_vdbg(bp->dev, "skb %u (data %p) TX complete\n", + macb_tx_ring_wrap(tail), skb->data); + dma_unmap_single(&bp->pdev->dev, tx_skb->mapping, skb->len, DMA_TO_DEVICE); bp->stats.tx_packets++; bp->stats.tx_bytes += skb->len; - rp->skb = NULL; + tx_skb->skb = NULL; dev_kfree_skb_irq(skb); } bp->tx_tail = tail; - if (netif_queue_stopped(bp->dev) && - TX_BUFFS_AVAIL(bp) > MACB_TX_WAKEUP_THRESH) + if (netif_queue_stopped(bp->dev) + && CIRC_CNT(bp->tx_head, bp->tx_tail, + TX_RING_SIZE) <= MACB_TX_WAKEUP_THRESH) netif_wake_queue(bp->dev); } @@ -392,31 +530,48 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, { unsigned int len; unsigned int frag; - unsigned int offset = 0; + unsigned int offset; struct sk_buff *skb; + struct macb_dma_desc *desc; - len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl); + desc = macb_rx_desc(bp, last_frag); + len = MACB_BFEXT(RX_FRMLEN, desc->ctrl); - netdev_dbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", - first_frag, last_frag, len); + netdev_vdbg(bp->dev, "macb_rx_frame frags %u - %u (len %u)\n", + macb_rx_ring_wrap(first_frag), + macb_rx_ring_wrap(last_frag), len); - skb = netdev_alloc_skb(bp->dev, len + RX_OFFSET); + /* + * The ethernet header starts NET_IP_ALIGN bytes into the + * first buffer. Since the header is 14 bytes, this makes the + * payload word-aligned. + * + * Instead of calling skb_reserve(NET_IP_ALIGN), we just copy + * the two padding bytes into the skb so that we avoid hitting + * the slowpath in memcpy(), and pull them off afterwards. + */ + skb = netdev_alloc_skb(bp->dev, len + NET_IP_ALIGN); if (!skb) { bp->stats.rx_dropped++; - for (frag = first_frag; ; frag = NEXT_RX(frag)) { - bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED); + for (frag = first_frag; ; frag++) { + desc = macb_rx_desc(bp, frag); + desc->addr &= ~MACB_BIT(RX_USED); if (frag == last_frag) break; } + + /* Make descriptor updates visible to hardware */ wmb(); + return 1; } - skb_reserve(skb, RX_OFFSET); + offset = 0; + len += NET_IP_ALIGN; skb_checksum_none_assert(skb); skb_put(skb, len); - for (frag = first_frag; ; frag = NEXT_RX(frag)) { + for (frag = first_frag; ; frag++) { unsigned int frag_len = RX_BUFFER_SIZE; if (offset + frag_len > len) { @@ -424,22 +579,24 @@ static int macb_rx_frame(struct macb *bp, unsigned int first_frag, frag_len = len - offset; } skb_copy_to_linear_data_offset(skb, offset, - (bp->rx_buffers + - (RX_BUFFER_SIZE * frag)), - frag_len); + macb_rx_buffer(bp, frag), frag_len); offset += RX_BUFFER_SIZE; - bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED); - wmb(); + desc = macb_rx_desc(bp, frag); + desc->addr &= ~MACB_BIT(RX_USED); if (frag == last_frag) break; } + /* Make descriptor updates visible to hardware */ + wmb(); + + __skb_pull(skb, NET_IP_ALIGN); skb->protocol = eth_type_trans(skb, bp->dev); bp->stats.rx_packets++; - bp->stats.rx_bytes += len; - netdev_dbg(bp->dev, "received skb of length %u, csum: %08x\n", + bp->stats.rx_bytes += skb->len; + netdev_vdbg(bp->dev, "received skb of length %u, csum: %08x\n", skb->len, skb->csum); netif_receive_skb(skb); @@ -452,8 +609,12 @@ static void discard_partial_frame(struct macb *bp, unsigned int begin, { unsigned int frag; - for (frag = begin; frag != end; frag = NEXT_RX(frag)) - bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED); + for (frag = begin; frag != end; frag++) { + struct macb_dma_desc *desc = macb_rx_desc(bp, frag); + desc->addr &= ~MACB_BIT(RX_USED); + } + + /* Make descriptor updates visible to hardware */ wmb(); /* @@ -466,15 +627,18 @@ static void discard_partial_frame(struct macb *bp, unsigned int begin, static int macb_rx(struct macb *bp, int budget) { int received = 0; - unsigned int tail = bp->rx_tail; + unsigned int tail; int first_frag = -1; - for (; budget > 0; tail = NEXT_RX(tail)) { + for (tail = bp->rx_tail; budget > 0; tail++) { + struct macb_dma_desc *desc = macb_rx_desc(bp, tail); u32 addr, ctrl; + /* Make hw descriptor updates visible to CPU */ rmb(); - addr = bp->rx_ring[tail].addr; - ctrl = bp->rx_ring[tail].ctrl; + + addr = desc->addr; + ctrl = desc->ctrl; if (!(addr & MACB_BIT(RX_USED))) break; @@ -517,7 +681,7 @@ static int macb_poll(struct napi_struct *napi, int budget) work_done = 0; - netdev_dbg(bp->dev, "poll: status = %08lx, budget = %d\n", + netdev_vdbg(bp->dev, "poll: status = %08lx, budget = %d\n", (unsigned long)status, budget); work_done = macb_rx(bp, budget); @@ -552,10 +716,12 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) while (status) { /* close possible race with dev_close */ if (unlikely(!netif_running(dev))) { - macb_writel(bp, IDR, ~0UL); + macb_writel(bp, IDR, -1); break; } + netdev_vdbg(bp->dev, "isr = 0x%08lx\n", (unsigned long)status); + if (status & MACB_RX_INT_FLAGS) { /* * There's no point taking any more interrupts @@ -567,14 +733,19 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) macb_writel(bp, IDR, MACB_RX_INT_FLAGS); if (napi_schedule_prep(&bp->napi)) { - netdev_dbg(bp->dev, "scheduling RX softirq\n"); + netdev_vdbg(bp->dev, "scheduling RX softirq\n"); __napi_schedule(&bp->napi); } } - if (status & (MACB_BIT(TCOMP) | MACB_BIT(ISR_TUND) | - MACB_BIT(ISR_RLE))) - macb_tx(bp); + if (unlikely(status & (MACB_TX_ERR_FLAGS))) { + macb_writel(bp, IDR, MACB_TX_INT_FLAGS); + schedule_work(&bp->tx_error_task); + break; + } + + if (status & MACB_BIT(TCOMP)) + macb_tx_interrupt(bp); /* * Link change detection isn't possible with RMII, so we'll @@ -626,11 +797,13 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) struct macb *bp = netdev_priv(dev); dma_addr_t mapping; unsigned int len, entry; + struct macb_dma_desc *desc; + struct macb_tx_skb *tx_skb; u32 ctrl; unsigned long flags; -#ifdef DEBUG - netdev_dbg(bp->dev, +#if defined(DEBUG) && defined(VERBOSE_DEBUG) + netdev_vdbg(bp->dev, "start_xmit: len %u head %p data %p tail %p end %p\n", skb->len, skb->head, skb->data, skb_tail_pointer(skb), skb_end_pointer(skb)); @@ -642,7 +815,7 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) spin_lock_irqsave(&bp->lock, flags); /* This is a hard error, log it. */ - if (TX_BUFFS_AVAIL(bp) < 1) { + if (CIRC_SPACE(bp->tx_head, bp->tx_tail, TX_RING_SIZE) < 1) { netif_stop_queue(dev); spin_unlock_irqrestore(&bp->lock, flags); netdev_err(bp->dev, "BUG! Tx Ring full when queue awake!\n"); @@ -651,13 +824,16 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) return NETDEV_TX_BUSY; } - entry = bp->tx_head; - netdev_dbg(bp->dev, "Allocated ring entry %u\n", entry); + entry = macb_tx_ring_wrap(bp->tx_head); + bp->tx_head++; + netdev_vdbg(bp->dev, "Allocated ring entry %u\n", entry); mapping = dma_map_single(&bp->pdev->dev, skb->data, len, DMA_TO_DEVICE); - bp->tx_skb[entry].skb = skb; - bp->tx_skb[entry].mapping = mapping; - netdev_dbg(bp->dev, "Mapped skb data %p to DMA addr %08lx\n", + + tx_skb = &bp->tx_skb[entry]; + tx_skb->skb = skb; + tx_skb->mapping = mapping; + netdev_vdbg(bp->dev, "Mapped skb data %p to DMA addr %08lx\n", skb->data, (unsigned long)mapping); ctrl = MACB_BF(TX_FRMLEN, len); @@ -665,18 +841,18 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev) if (entry == (TX_RING_SIZE - 1)) ctrl |= MACB_BIT(TX_WRAP); - bp->tx_ring[entry].addr = mapping; - bp->tx_ring[entry].ctrl = ctrl; - wmb(); + desc = &bp->tx_ring[entry]; + desc->addr = mapping; + desc->ctrl = ctrl; - entry = NEXT_TX(entry); - bp->tx_head = entry; + /* Make newly initialized descriptor visible to hardware */ + wmb(); skb_tx_timestamp(skb); macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART)); - if (TX_BUFFS_AVAIL(bp) < 1) + if (CIRC_SPACE(bp->tx_head, bp->tx_tail, TX_RING_SIZE) < 1) netif_stop_queue(dev); spin_unlock_irqrestore(&bp->lock, flags); @@ -712,7 +888,7 @@ static int macb_alloc_consistent(struct macb *bp) { int size; - size = TX_RING_SIZE * sizeof(struct ring_info); + size = TX_RING_SIZE * sizeof(struct macb_tx_skb); bp->tx_skb = kmalloc(size, GFP_KERNEL); if (!bp->tx_skb) goto out_err; @@ -775,9 +951,6 @@ static void macb_init_rings(struct macb *bp) static void macb_reset_hw(struct macb *bp) { - /* Make sure we have the write buffer for ourselves */ - wmb(); - /* * Disable RX and TX (XXX: Should we halt the transmission * more gracefully?) @@ -788,11 +961,11 @@ static void macb_reset_hw(struct macb *bp) macb_writel(bp, NCR, MACB_BIT(CLRSTAT)); /* Clear all status flags */ - macb_writel(bp, TSR, ~0UL); - macb_writel(bp, RSR, ~0UL); + macb_writel(bp, TSR, -1); + macb_writel(bp, RSR, -1); /* Disable all interrupts */ - macb_writel(bp, IDR, ~0UL); + macb_writel(bp, IDR, -1); macb_readl(bp, ISR); } @@ -860,8 +1033,12 @@ static u32 macb_dbw(struct macb *bp) } /* - * Configure the receive DMA engine to use the correct receive buffer size. - * This is a configurable parameter for GEM. + * Configure the receive DMA engine + * - use the correct receive buffer size + * - set the possibility to use INCR16 bursts + * (if not supported by FIFO, it will fallback to default) + * - set both rx/tx packet buffers to full memory size + * These are configurable parameters for GEM. */ static void macb_configure_dma(struct macb *bp) { @@ -870,6 +1047,8 @@ static void macb_configure_dma(struct macb *bp) if (macb_is_gem(bp)) { dmacfg = gem_readl(bp, DMACFG) & ~GEM_BF(RXBS, -1L); dmacfg |= GEM_BF(RXBS, RX_BUFFER_SIZE / 64); + dmacfg |= GEM_BF(FBLDO, 16); + dmacfg |= GEM_BIT(TXPBMS) | GEM_BF(RXBMS, -1L); gem_writel(bp, DMACFG, dmacfg); } } @@ -879,9 +1058,10 @@ static void macb_init_hw(struct macb *bp) u32 config; macb_reset_hw(bp); - __macb_set_hwaddr(bp); + macb_set_hwaddr(bp); config = macb_mdc_clk_div(bp); + config |= MACB_BF(RBOF, NET_IP_ALIGN); /* Make eth data aligned */ config |= MACB_BIT(PAE); /* PAuse Enable */ config |= MACB_BIT(DRFCS); /* Discard Rx FCS */ config |= MACB_BIT(BIG); /* Receive oversized frames */ @@ -891,6 +1071,8 @@ static void macb_init_hw(struct macb *bp) config |= MACB_BIT(NBC); /* No BroadCast */ config |= macb_dbw(bp); macb_writel(bp, NCFGR, config); + bp->speed = SPEED_10; + bp->duplex = DUPLEX_HALF; macb_configure_dma(bp); @@ -902,13 +1084,8 @@ static void macb_init_hw(struct macb *bp) macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE)); /* Enable interrupts */ - macb_writel(bp, IER, (MACB_BIT(RCOMP) - | MACB_BIT(RXUBR) - | MACB_BIT(ISR_TUND) - | MACB_BIT(ISR_RLE) - | MACB_BIT(TXERR) - | MACB_BIT(TCOMP) - | MACB_BIT(ISR_ROVR) + macb_writel(bp, IER, (MACB_RX_INT_FLAGS + | MACB_TX_INT_FLAGS | MACB_BIT(HRESP))); } @@ -996,7 +1173,7 @@ static void macb_sethashtable(struct net_device *dev) /* * Enable/Disable promiscuous and multicast modes. */ -static void macb_set_rx_mode(struct net_device *dev) +void macb_set_rx_mode(struct net_device *dev) { unsigned long cfg; struct macb *bp = netdev_priv(dev); @@ -1028,6 +1205,7 @@ static void macb_set_rx_mode(struct net_device *dev) macb_writel(bp, NCFGR, cfg); } +EXPORT_SYMBOL_GPL(macb_set_rx_mode); static int macb_open(struct net_device *dev) { @@ -1043,9 +1221,6 @@ static int macb_open(struct net_device *dev) if (!bp->phy_dev) return -EAGAIN; - if (!is_valid_ether_addr(dev->dev_addr)) - return -EADDRNOTAVAIL; - err = macb_alloc_consistent(bp); if (err) { netdev_err(dev, "Unable to allocate DMA memory (error %d)\n", @@ -1135,7 +1310,7 @@ static struct net_device_stats *gem_get_stats(struct macb *bp) return nstat; } -static struct net_device_stats *macb_get_stats(struct net_device *dev) +struct net_device_stats *macb_get_stats(struct net_device *dev) { struct macb *bp = netdev_priv(dev); struct net_device_stats *nstat = &bp->stats; @@ -1181,6 +1356,7 @@ static struct net_device_stats *macb_get_stats(struct net_device *dev) return nstat; } +EXPORT_SYMBOL_GPL(macb_get_stats); static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) { @@ -1204,25 +1380,55 @@ static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) return phy_ethtool_sset(phydev, cmd); } -static void macb_get_drvinfo(struct net_device *dev, - struct ethtool_drvinfo *info) +static int macb_get_regs_len(struct net_device *netdev) +{ + return MACB_GREGS_NBR * sizeof(u32); +} + +static void macb_get_regs(struct net_device *dev, struct ethtool_regs *regs, + void *p) { struct macb *bp = netdev_priv(dev); + unsigned int tail, head; + u32 *regs_buff = p; + + regs->version = (macb_readl(bp, MID) & ((1 << MACB_REV_SIZE) - 1)) + | MACB_GREGS_VERSION; + + tail = macb_tx_ring_wrap(bp->tx_tail); + head = macb_tx_ring_wrap(bp->tx_head); + + regs_buff[0] = macb_readl(bp, NCR); + regs_buff[1] = macb_or_gem_readl(bp, NCFGR); + regs_buff[2] = macb_readl(bp, NSR); + regs_buff[3] = macb_readl(bp, TSR); + regs_buff[4] = macb_readl(bp, RBQP); + regs_buff[5] = macb_readl(bp, TBQP); + regs_buff[6] = macb_readl(bp, RSR); + regs_buff[7] = macb_readl(bp, IMR); - strcpy(info->driver, bp->pdev->dev.driver->name); - strcpy(info->version, "$Revision: 1.14 $"); - strcpy(info->bus_info, dev_name(&bp->pdev->dev)); + regs_buff[8] = tail; + regs_buff[9] = head; + regs_buff[10] = macb_tx_dma(bp, tail); + regs_buff[11] = macb_tx_dma(bp, head); + + if (macb_is_gem(bp)) { + regs_buff[12] = gem_readl(bp, USRIO); + regs_buff[13] = gem_readl(bp, DMACFG); + } } -static const struct ethtool_ops macb_ethtool_ops = { +const struct ethtool_ops macb_ethtool_ops = { .get_settings = macb_get_settings, .set_settings = macb_set_settings, - .get_drvinfo = macb_get_drvinfo, + .get_regs_len = macb_get_regs_len, + .get_regs = macb_get_regs, .get_link = ethtool_op_get_link, .get_ts_info = ethtool_op_get_ts_info, }; +EXPORT_SYMBOL_GPL(macb_ethtool_ops); -static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) +int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) { struct macb *bp = netdev_priv(dev); struct phy_device *phydev = bp->phy_dev; @@ -1235,6 +1441,7 @@ static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) return phy_mii_ioctl(phydev, rq, cmd); } +EXPORT_SYMBOL_GPL(macb_ioctl); static const struct net_device_ops macb_netdev_ops = { .ndo_open = macb_open, @@ -1263,7 +1470,7 @@ static const struct of_device_id macb_dt_ids[] = { MODULE_DEVICE_TABLE(of, macb_dt_ids); -static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev) +static int macb_get_phy_mode_dt(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; @@ -1273,7 +1480,7 @@ static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev) return -ENODEV; } -static int __devinit macb_get_hwaddr_dt(struct macb *bp) +static int macb_get_hwaddr_dt(struct macb *bp) { struct device_node *np = bp->pdev->dev.of_node; if (np) { @@ -1287,11 +1494,11 @@ static int __devinit macb_get_hwaddr_dt(struct macb *bp) return -ENODEV; } #else -static int __devinit macb_get_phy_mode_dt(struct platform_device *pdev) +static int macb_get_phy_mode_dt(struct platform_device *pdev) { return -ENODEV; } -static int __devinit macb_get_hwaddr_dt(struct macb *bp) +static int macb_get_hwaddr_dt(struct macb *bp) { return -ENODEV; } @@ -1306,6 +1513,7 @@ static int __init macb_probe(struct platform_device *pdev) struct phy_device *phydev; u32 config; int err = -ENXIO; + struct pinctrl *pinctrl; regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!regs) { @@ -1313,6 +1521,15 @@ static int __init macb_probe(struct platform_device *pdev) goto err_out; } + pinctrl = devm_pinctrl_get_select_default(&pdev->dev); + if (IS_ERR(pinctrl)) { + err = PTR_ERR(pinctrl); + if (err == -EPROBE_DEFER) + goto err_out; + + dev_warn(&pdev->dev, "No pinctrl provided\n"); + } + err = -ENOMEM; dev = alloc_etherdev(sizeof(*bp)); if (!dev) @@ -1328,6 +1545,7 @@ static int __init macb_probe(struct platform_device *pdev) bp->dev = dev; spin_lock_init(&bp->lock); + INIT_WORK(&bp->tx_error_task, macb_tx_error_task); bp->pclk = clk_get(&pdev->dev, "pclk"); if (IS_ERR(bp->pclk)) { @@ -1384,7 +1602,9 @@ static int __init macb_probe(struct platform_device *pdev) bp->phy_interface = err; } - if (bp->phy_interface == PHY_INTERFACE_MODE_RMII) + if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII) + macb_or_gem_writel(bp, USRIO, GEM_BIT(RGMII)); + else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII) #if defined(CONFIG_ARCH_AT91) macb_or_gem_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN))); @@ -1398,8 +1618,6 @@ static int __init macb_probe(struct platform_device *pdev) macb_or_gem_writel(bp, USRIO, MACB_BIT(MII)); #endif - bp->tx_pending = DEF_TX_RING_PENDING; - err = register_netdev(dev); if (err) { dev_err(&pdev->dev, "Cannot register net device, aborting.\n"); diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 335e288f531..570908b9357 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -10,10 +10,15 @@ #ifndef _MACB_H #define _MACB_H +#define MACB_GREGS_NBR 16 +#define MACB_GREGS_VERSION 1 + /* MACB register offsets */ #define MACB_NCR 0x0000 #define MACB_NCFGR 0x0004 #define MACB_NSR 0x0008 +#define MACB_TAR 0x000c /* AT91RM9200 only */ +#define MACB_TCR 0x0010 /* AT91RM9200 only */ #define MACB_TSR 0x0014 #define MACB_RBQP 0x0018 #define MACB_TBQP 0x001c @@ -69,6 +74,12 @@ #define GEM_HRT 0x0084 #define GEM_SA1B 0x0088 #define GEM_SA1T 0x008C +#define GEM_SA2B 0x0090 +#define GEM_SA2T 0x0094 +#define GEM_SA3B 0x0098 +#define GEM_SA3T 0x009C +#define GEM_SA4B 0x00A0 +#define GEM_SA4T 0x00A4 #define GEM_OTX 0x0100 #define GEM_DCFG1 0x0280 #define GEM_DCFG2 0x0284 @@ -133,6 +144,8 @@ #define MACB_RTY_SIZE 1 #define MACB_PAE_OFFSET 13 #define MACB_PAE_SIZE 1 +#define MACB_RM9200_RMII_OFFSET 13 /* AT91RM9200 only */ +#define MACB_RM9200_RMII_SIZE 1 /* AT91RM9200 only */ #define MACB_RBOF_OFFSET 14 #define MACB_RBOF_SIZE 2 #define MACB_RLCE_OFFSET 16 @@ -145,6 +158,8 @@ #define MACB_IRXFCS_SIZE 1 /* GEM specific NCFGR bitfields. */ +#define GEM_GBE_OFFSET 10 +#define GEM_GBE_SIZE 1 #define GEM_CLK_OFFSET 18 #define GEM_CLK_SIZE 3 #define GEM_DBW_OFFSET 21 @@ -156,8 +171,19 @@ #define GEM_DBW128 2 /* Bitfields in DMACFG. */ +#define GEM_FBLDO_OFFSET 0 +#define GEM_FBLDO_SIZE 5 +#define GEM_RXBMS_OFFSET 8 +#define GEM_RXBMS_SIZE 2 +#define GEM_TXPBMS_OFFSET 10 +#define GEM_TXPBMS_SIZE 1 +#define GEM_TXCOEN_OFFSET 11 +#define GEM_TXCOEN_SIZE 1 #define GEM_RXBS_OFFSET 16 #define GEM_RXBS_SIZE 8 +#define GEM_DDRP_OFFSET 24 +#define GEM_DDRP_SIZE 1 + /* Bitfields in NSR */ #define MACB_NSR_LINK_OFFSET 0 @@ -178,6 +204,8 @@ #define MACB_TGO_SIZE 1 #define MACB_BEX_OFFSET 4 #define MACB_BEX_SIZE 1 +#define MACB_RM9200_BNQ_OFFSET 4 /* AT91RM9200 only */ +#define MACB_RM9200_BNQ_SIZE 1 /* AT91RM9200 only */ #define MACB_COMP_OFFSET 5 #define MACB_COMP_SIZE 1 #define MACB_UND_OFFSET 6 @@ -246,6 +274,8 @@ /* Bitfields in USRIO (AT91) */ #define MACB_RMII_OFFSET 0 #define MACB_RMII_SIZE 1 +#define GEM_RGMII_OFFSET 0 /* GEM gigabit mode */ +#define GEM_RGMII_SIZE 1 #define MACB_CLKEN_OFFSET 1 #define MACB_CLKEN_SIZE 1 @@ -352,7 +382,12 @@ __v; \ }) -struct dma_desc { +/** + * struct macb_dma_desc - Hardware DMA descriptor + * @addr: DMA address of data buffer + * @ctrl: Control and status bits + */ +struct macb_dma_desc { u32 addr; u32 ctrl; }; @@ -417,7 +452,12 @@ struct dma_desc { #define MACB_TX_USED_OFFSET 31 #define MACB_TX_USED_SIZE 1 -struct ring_info { +/** + * struct macb_tx_skb - data about an skb which is being transmitted + * @skb: skb currently being transmitted + * @mapping: DMA address of the skb's data buffer + */ +struct macb_tx_skb { struct sk_buff *skb; dma_addr_t mapping; }; @@ -502,12 +542,12 @@ struct macb { void __iomem *regs; unsigned int rx_tail; - struct dma_desc *rx_ring; + struct macb_dma_desc *rx_ring; void *rx_buffers; unsigned int tx_head, tx_tail; - struct dma_desc *tx_ring; - struct ring_info *tx_skb; + struct macb_dma_desc *tx_ring; + struct macb_tx_skb *tx_skb; spinlock_t lock; struct platform_device *pdev; @@ -515,6 +555,7 @@ struct macb { struct clk *hclk; struct net_device *dev; struct napi_struct napi; + struct work_struct tx_error_task; struct net_device_stats stats; union { struct macb_stats macb; @@ -525,8 +566,6 @@ struct macb { dma_addr_t tx_ring_dma; dma_addr_t rx_buffers_dma; - unsigned int rx_pending, tx_pending; - struct mii_bus *mii_bus; struct phy_device *phy_dev; unsigned int link; @@ -534,8 +573,22 @@ struct macb { unsigned int duplex; phy_interface_t phy_interface; + + /* AT91RM9200 transmit */ + struct sk_buff *skb; /* holds skb until xmit interrupt completes */ + dma_addr_t skb_physaddr; /* phys addr from pci_map_single */ + int skb_length; /* saved skb length for pci_unmap_single */ }; +extern const struct ethtool_ops macb_ethtool_ops; + +int macb_mii_init(struct macb *bp); +int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); +struct net_device_stats *macb_get_stats(struct net_device *dev); +void macb_set_rx_mode(struct net_device *dev); +void macb_set_hwaddr(struct macb *bp); +void macb_get_hwaddr(struct macb *bp); + static inline bool macb_is_gem(struct macb *bp) { return MACB_BFEXT(IDNUM, macb_readl(bp, MID)) == 0x2; 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