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path: root/drivers/net/wireless/ath5k/initvals.c
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Diffstat (limited to 'drivers/net/wireless/ath5k/initvals.c')
-rw-r--r--drivers/net/wireless/ath5k/initvals.c473
1 files changed, 469 insertions, 4 deletions
diff --git a/drivers/net/wireless/ath5k/initvals.c b/drivers/net/wireless/ath5k/initvals.c
index 2c22f1d4ee6..04c84e9da89 100644
--- a/drivers/net/wireless/ath5k/initvals.c
+++ b/drivers/net/wireless/ath5k/initvals.c
@@ -678,8 +678,8 @@ static const struct ath5k_ini ar5212_ini[] = {
{ AR5K_PHY(644), 0x00806333 },
{ AR5K_PHY(645), 0x00106c10 },
{ AR5K_PHY(646), 0x009c4060 },
- /*{ AR5K_PHY(647), 0x1483800a },*/ /* Old value */
{ AR5K_PHY(647), 0x1483800a },
+ /* { AR5K_PHY(648), 0x018830c6 },*/ /* 2413 */
{ AR5K_PHY(648), 0x01831061 },
{ AR5K_PHY(649), 0x00000400 },
/*{ AR5K_PHY(650), 0x000001b5 },*/
@@ -1081,6 +1081,414 @@ static const struct ath5k_ini_mode rf5413_ini_mode_end[] = {
{ 0xf3307ff0, 0xf3307ff0, 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } },
};
+/* Initial mode-specific settings for RF2413/2414 (Written after ar5212_ini) */
+/* XXX: No dumps for turbog yet, so turbog is the same with g here with some
+ * minor tweaking based on dumps from other chips */
+static const struct ath5k_ini_mode rf2413_ini_mode_end[] = {
+ { AR5K_TXCFG,
+ /* b g gTurbo */
+ { 0x00000015, 0x00000015, 0x00000015 } },
+ { AR5K_USEC_5211,
+ { 0x04e01395, 0x12e013ab, 0x098813cf } },
+ { AR5K_PHY(10),
+ { 0x05020000, 0x0a020001, 0x0a020001 } },
+ { AR5K_PHY(13),
+ { 0x00000e00, 0x00000e00, 0x00000e00 } },
+ { AR5K_PHY(14),
+ { 0x0000000a, 0x0000000a, 0x0000000a } },
+ { AR5K_PHY(18),
+ { 0x001a6a64, 0x001a6a64, 0x001a6a64 } },
+ { AR5K_PHY(20),
+ { 0x0de8b0da, 0x0c98b0da, 0x0c98b0da } },
+ { AR5K_PHY_SIG,
+ { 0x7ee80d2e, 0x7ec80d2e, 0x7ec80d2e } },
+ { AR5K_PHY_AGCCOARSE,
+ { 0x3137665e, 0x3139605e, 0x3139605e } },
+ { AR5K_PHY(27),
+ { 0x050cb081, 0x050cb081, 0x050cb081 } },
+ { AR5K_PHY_RX_DELAY,
+ { 0x0000044c, 0x00000898, 0x000007d0 } },
+ { AR5K_PHY_FRAME_CTL_5211,
+ { 0xf7b80d00, 0xf7b81000, 0xf7b81000 } },
+ { AR5K_PHY_CCKTXCTL,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { AR5K_PHY(642),
+ { 0xd03e6788, 0xd03e6788, 0xd03e6788 } },
+ { AR5K_PHY_GAIN_2GHZ,
+ { 0x0042c140, 0x0042c140, 0x0042c140 } },
+ { 0xa21c,
+ { 0x1863800a, 0x1883800a, 0x1883800a } },
+ { AR5K_DCU_FP,
+ { 0x000003e0, 0x000003e0, 0x000003e0 } },
+ { 0x8060,
+ { 0x0000000f, 0x0000000f, 0x0000000f } },
+ { 0x8118,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x811c,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x8120,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x8124,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x8128,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x812c,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x8130,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x8134,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x8138,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x813c,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0x8140,
+ { 0x800000a8, 0x800000a8, 0x800000a8 } },
+ { 0x8144,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { AR5K_PHY_AGC,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { AR5K_PHY(11),
+ { 0x0000a000, 0x0000a000, 0x0000a000 } },
+ { AR5K_PHY(15),
+ { 0x00200400, 0x00200400, 0x00200400 } },
+ { AR5K_PHY(19),
+ { 0x1284233c, 0x1284233c, 0x1284233c } },
+ { AR5K_PHY_SCR,
+ { 0x0000001f, 0x0000001f, 0x0000001f } },
+ { AR5K_PHY_SLMT,
+ { 0x00000080, 0x00000080, 0x00000080 } },
+ { AR5K_PHY_SCAL,
+ { 0x0000000e, 0x0000000e, 0x0000000e } },
+ { AR5K_PHY(86),
+ { 0x000000ff, 0x000000ff, 0x000000ff } },
+ { AR5K_PHY(96),
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { AR5K_PHY(97),
+ { 0x02800000, 0x02800000, 0x02800000 } },
+ { AR5K_PHY(104),
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { AR5K_PHY(120),
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { AR5K_PHY(121),
+ { 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa } },
+ { AR5K_PHY(122),
+ { 0x3c466478, 0x3c466478, 0x3c466478 } },
+ { AR5K_PHY(123),
+ { 0x000000aa, 0x000000aa, 0x000000aa } },
+ { AR5K_PHY_SCLOCK,
+ { 0x0000000c, 0x0000000c, 0x0000000c } },
+ { AR5K_PHY_SDELAY,
+ { 0x000000ff, 0x000000ff, 0x000000ff } },
+ { AR5K_PHY_SPENDING,
+ { 0x00000014, 0x00000014, 0x00000014 } },
+ { 0xa228,
+ { 0x000009b5, 0x000009b5, 0x000009b5 } },
+ { 0xa23c,
+ { 0x93c889af, 0x93c889af, 0x93c889af } },
+ { 0xa24c,
+ { 0x00000001, 0x00000001, 0x00000001 } },
+ { 0xa250,
+ { 0x0000a000, 0x0000a000, 0x0000a000 } },
+ { 0xa254,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0xa258,
+ { 0x0cc75380, 0x0cc75380, 0x0cc75380 } },
+ { 0xa25c,
+ { 0x0f0f0f01, 0x0f0f0f01, 0x0f0f0f01 } },
+ { 0xa260,
+ { 0x5f690f01, 0x5f690f01, 0x5f690f01 } },
+ { 0xa264,
+ { 0x00418a11, 0x00418a11, 0x00418a11 } },
+ { 0xa268,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0xa26c,
+ { 0x0c30c16a, 0x0c30c16a, 0x0c30c16a } },
+ { 0xa270,
+ { 0x00820820, 0x00820820, 0x00820820 } },
+ { 0xa274,
+ { 0x001b7caa, 0x001b7caa, 0x001b7caa } },
+ { 0xa278,
+ { 0x1ce739ce, 0x1ce739ce, 0x1ce739ce } },
+ { 0xa27c,
+ { 0x051701ce, 0x051701ce, 0x051701ce } },
+ { 0xa300,
+ { 0x18010000, 0x18010000, 0x18010000 } },
+ { 0xa304,
+ { 0x30032602, 0x30032602, 0x30032602 } },
+ { 0xa308,
+ { 0x48073e06, 0x48073e06, 0x48073e06 } },
+ { 0xa30c,
+ { 0x560b4c0a, 0x560b4c0a, 0x560b4c0a } },
+ { 0xa310,
+ { 0x641a600f, 0x641a600f, 0x641a600f } },
+ { 0xa314,
+ { 0x784f6e1b, 0x784f6e1b, 0x784f6e1b } },
+ { 0xa318,
+ { 0x868f7c5a, 0x868f7c5a, 0x868f7c5a } },
+ { 0xa31c,
+ { 0x8ecf865b, 0x8ecf865b, 0x8ecf865b } },
+ { 0xa320,
+ { 0x9d4f970f, 0x9d4f970f, 0x9d4f970f } },
+ { 0xa324,
+ { 0xa5cfa18f, 0xa5cfa18f, 0xa5cfa18f } },
+ { 0xa328,
+ { 0xb55faf1f, 0xb55faf1f, 0xb55faf1f } },
+ { 0xa32c,
+ { 0xbddfb99f, 0xbddfb99f, 0xbddfb99f } },
+ { 0xa330,
+ { 0xcd7fc73f, 0xcd7fc73f, 0xcd7fc73f } },
+ { 0xa334,
+ { 0xd5ffd1bf, 0xd5ffd1bf, 0xd5ffd1bf } },
+ { 0xa338,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0xa33c,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0xa340,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0xa344,
+ { 0x00000000, 0x00000000, 0x00000000 } },
+ { 0xa348,
+ { 0x3fffffff, 0x3fffffff, 0x3fffffff } },
+ { 0xa34c,
+ { 0x3fffffff, 0x3fffffff, 0x3fffffff } },
+ { 0xa350,
+ { 0x3fffffff, 0x3fffffff, 0x3fffffff } },
+ { 0xa354,
+ { 0x0003ffff, 0x0003ffff, 0x0003ffff } },
+ { 0xa358,
+ { 0x79a8aa1f, 0x79a8aa1f, 0x79a8aa1f } },
+ { 0xa35c,
+ { 0x066c420f, 0x066c420f, 0x066c420f } },
+ { 0xa360,
+ { 0x0f282207, 0x0f282207, 0x0f282207 } },
+ { 0xa364,
+ { 0x17601685, 0x17601685, 0x17601685 } },
+ { 0xa368,
+ { 0x1f801104, 0x1f801104, 0x1f801104 } },
+ { 0xa36c,
+ { 0x37a00c03, 0x37a00c03, 0x37a00c03 } },
+ { 0xa370,
+ { 0x3fc40883, 0x3fc40883, 0x3fc40883 } },
+ { 0xa374,
+ { 0x57c00803, 0x57c00803, 0x57c00803 } },
+ { 0xa378,
+ { 0x5fd80682, 0x5fd80682, 0x5fd80682 } },
+ { 0xa37c,
+ { 0x7fe00482, 0x7fe00482, 0x7fe00482 } },
+ { 0xa380,
+ { 0x7f3c7bba, 0x7f3c7bba, 0x7f3c7bba } },
+ { 0xa384,
+ { 0xf3307ff0, 0xf3307ff0, 0xf3307ff0 } },
+};
+
+/* Initial mode-specific settings for RF2425 (Written after ar5212_ini) */
+/* XXX: No dumps for turbog yet, so turbog is the same with g here with some
+ * minor tweaking based on dumps from other chips */
+static const struct ath5k_ini_mode rf2425_ini_mode_end[] = {
+ { AR5K_TXCFG,
+ /* g gTurbo */
+ { 0x00000015, 0x00000015 } },
+ { AR5K_USEC_5211,
+ { 0x12e013ab, 0x098813cf } },
+ { AR5K_PHY_TURBO,
+ { 0x00000000, 0x00000003 } },
+ { AR5K_PHY(10),
+ { 0x0a020001, 0x0a020001 } },
+ { AR5K_PHY(13),
+ { 0x00000e0e, 0x00000e0e } },
+ { AR5K_PHY(14),
+ { 0x0000000b, 0x0000000b } },
+ { AR5K_PHY(17),
+ { 0x13721422, 0x13721422 } },
+ { AR5K_PHY(18),
+ { 0x00199a65, 0x00199a65 } },
+ { AR5K_PHY(20),
+ { 0x0c98b0da, 0x0c98b0da } },
+ { AR5K_PHY_SIG,
+ { 0x7ec80d2e, 0x7ec80d2e } },
+ { AR5K_PHY_AGCCOARSE,
+ { 0x3139605e, 0x3139605e } },
+ { AR5K_PHY(27),
+ { 0x050cb081, 0x050cb081 } },
+ { AR5K_PHY_RX_DELAY,
+ { 0x00000898, 0x000007d0 } },
+ { AR5K_PHY_FRAME_CTL_5211,
+ { 0xf7b81000, 0xf7b81000 } },
+ { AR5K_PHY_CCKTXCTL,
+ { 0x00000000, 0x00000000 } },
+ { AR5K_PHY(642),
+ { 0xd03e6788, 0xd03e6788 } },
+ { AR5K_PHY_GAIN_2GHZ,
+ { 0x0052c140, 0x0052c140 } },
+ { 0xa21c,
+ { 0x1883800a, 0x1883800a } },
+ { 0xa324,
+ { 0xa7cfa7cf, 0xa7cfa7cf } },
+ { 0xa328,
+ { 0xa7cfa7cf, 0xa7cfa7cf } },
+ { 0xa32c,
+ { 0xa7cfa7cf, 0xa7cfa7cf } },
+ { 0xa330,
+ { 0xa7cfa7cf, 0xa7cfa7cf } },
+ { 0xa334,
+ { 0xa7cfa7cf, 0xa7cfa7cf } },
+ { AR5K_DCU_FP,
+ { 0x000003e0, 0x000003e0 } },
+ { 0x8060,
+ { 0x0000000f, 0x0000000f } },
+ { 0x809c,
+ { 0x00000000, 0x00000000 } },
+ { 0x80a0,
+ { 0x00000000, 0x00000000 } },
+ { 0x8118,
+ { 0x00000000, 0x00000000 } },
+ { 0x811c,
+ { 0x00000000, 0x00000000 } },
+ { 0x8120,
+ { 0x00000000, 0x00000000 } },
+ { 0x8124,
+ { 0x00000000, 0x00000000 } },
+ { 0x8128,
+ { 0x00000000, 0x00000000 } },
+ { 0x812c,
+ { 0x00000000, 0x00000000 } },
+ { 0x8130,
+ { 0x00000000, 0x00000000 } },
+ { 0x8134,
+ { 0x00000000, 0x00000000 } },
+ { 0x8138,
+ { 0x00000000, 0x00000000 } },
+ { 0x813c,
+ { 0x00000000, 0x00000000 } },
+ { 0x8140,
+ { 0x800003f9, 0x800003f9 } },
+ { 0x8144,
+ { 0x00000000, 0x00000000 } },
+ { AR5K_PHY_AGC,
+ { 0x00000000, 0x00000000 } },
+ { AR5K_PHY(11),
+ { 0x0000a000, 0x0000a000 } },
+ { AR5K_PHY(15),
+ { 0x00200400, 0x00200400 } },
+ { AR5K_PHY(19),
+ { 0x1284233c, 0x1284233c } },
+ { AR5K_PHY_SCR,
+ { 0x0000001f, 0x0000001f } },
+ { AR5K_PHY_SLMT,
+ { 0x00000080, 0x00000080 } },
+ { AR5K_PHY_SCAL,
+ { 0x0000000e, 0x0000000e } },
+ { AR5K_PHY(86),
+ { 0x00081fff, 0x00081fff } },
+ { AR5K_PHY(96),
+ { 0x00000000, 0x00000000 } },
+ { AR5K_PHY(97),
+ { 0x02800000, 0x02800000 } },
+ { AR5K_PHY(104),
+ { 0x00000000, 0x00000000 } },
+ { AR5K_PHY(119),
+ { 0xfebadbe8, 0xfebadbe8 } },
+ { AR5K_PHY(120),
+ { 0x00000000, 0x00000000 } },
+ { AR5K_PHY(121),
+ { 0xaaaaaaaa, 0xaaaaaaaa } },
+ { AR5K_PHY(122),
+ { 0x3c466478, 0x3c466478 } },
+ { AR5K_PHY(123),
+ { 0x000000aa, 0x000000aa } },
+ { AR5K_PHY_SCLOCK,
+ { 0x0000000c, 0x0000000c } },
+ { AR5K_PHY_SDELAY,
+ { 0x000000ff, 0x000000ff } },
+ { AR5K_PHY_SPENDING,
+ { 0x00000014, 0x00000014 } },
+ { 0xa228,
+ { 0x000009b5, 0x000009b5 } },
+ { AR5K_PHY_TXPOWER_RATE3,
+ { 0x20202020, 0x20202020 } },
+ { AR5K_PHY_TXPOWER_RATE4,
+ { 0x20202020, 0x20202020 } },
+ { 0xa23c,
+ { 0x93c889af, 0x93c889af } },
+ { 0xa24c,
+ { 0x00000001, 0x00000001 } },
+ { 0xa250,
+ { 0x0000a000, 0x0000a000 } },
+ { 0xa254,
+ { 0x00000000, 0x00000000 } },
+ { 0xa258,
+ { 0x0cc75380, 0x0cc75380 } },
+ { 0xa25c,
+ { 0x0f0f0f01, 0x0f0f0f01 } },
+ { 0xa260,
+ { 0x5f690f01, 0x5f690f01 } },
+ { 0xa264,
+ { 0x00418a11, 0x00418a11 } },
+ { 0xa268,
+ { 0x00000000, 0x00000000 } },
+ { 0xa26c,
+ { 0x0c30c166, 0x0c30c166 } },
+ { 0xa270,
+ { 0x00820820, 0x00820820 } },
+ { 0xa274,
+ { 0x081a3caa, 0x081a3caa } },
+ { 0xa278,
+ { 0x1ce739ce, 0x1ce739ce } },
+ { 0xa27c,
+ { 0x051701ce, 0x051701ce } },
+ { 0xa300,
+ { 0x16010000, 0x16010000 } },
+ { 0xa304,
+ { 0x2c032402, 0x2c032402 } },
+ { 0xa308,
+ { 0x48433e42, 0x48433e42 } },
+ { 0xa30c,
+ { 0x5a0f500b, 0x5a0f500b } },
+ { 0xa310,
+ { 0x6c4b624a, 0x6c4b624a } },
+ { 0xa314,
+ { 0x7e8b748a, 0x7e8b748a } },
+ { 0xa318,
+ { 0x96cf8ccb, 0x96cf8ccb } },
+ { 0xa31c,
+ { 0xa34f9d0f, 0xa34f9d0f } },
+ { 0xa320,
+ { 0xa7cfa58f, 0xa7cfa58f } },
+ { 0xa348,
+ { 0x3fffffff, 0x3fffffff } },
+ { 0xa34c,
+ { 0x3fffffff, 0x3fffffff } },
+ { 0xa350,
+ { 0x3fffffff, 0x3fffffff } },
+ { 0xa354,
+ { 0x0003ffff, 0x0003ffff } },
+ { 0xa358,
+ { 0x79a8aa1f, 0x79a8aa1f } },
+ { 0xa35c,
+ { 0x066c420f, 0x066c420f } },
+ { 0xa360,
+ { 0x0f282207, 0x0f282207 } },
+ { 0xa364,
+ { 0x17601685, 0x17601685 } },
+ { 0xa368,
+ { 0x1f801104, 0x1f801104 } },
+ { 0xa36c,
+ { 0x37a00c03, 0x37a00c03 } },
+ { 0xa370,
+ { 0x3fc40883, 0x3fc40883 } },
+ { 0xa374,
+ { 0x57c00803, 0x57c00803 } },
+ { 0xa378,
+ { 0x5fd80682, 0x5fd80682 } },
+ { 0xa37c,
+ { 0x7fe00482, 0x7fe00482 } },
+ { 0xa380,
+ { 0x7f3c7bba, 0x7f3c7bba } },
+ { 0xa384,
+ { 0xf3307ff0, 0xf3307ff0 } },
+};
+
/*
* Initial BaseBand Gain settings for RF5111/5112 (AR5210 comes with
* RF5110 only so initial BB Gain settings are included in AR5K_AR5210_INI)
@@ -1290,35 +1698,92 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel)
/* Second set of mode-specific settings */
if (ah->ah_radio == AR5K_RF5111){
+
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(ar5212_rf5111_ini_mode_end),
ar5212_rf5111_ini_mode_end, mode);
+
/* Baseband gain table */
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5111_ini_bbgain),
rf5111_ini_bbgain, change_channel);
+
} else if (ah->ah_radio == AR5K_RF5112){
+
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(ar5212_rf5112_ini_mode_end),
ar5212_rf5112_ini_mode_end, mode);
- /* Baseband gain table */
+
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5112_ini_bbgain),
rf5112_ini_bbgain, change_channel);
+
} else if (ah->ah_radio == AR5K_RF5413){
+
ath5k_hw_ini_mode_registers(ah,
ARRAY_SIZE(rf5413_ini_mode_end),
rf5413_ini_mode_end, mode);
+
+ ath5k_hw_ini_registers(ah,
+ ARRAY_SIZE(rf5112_ini_bbgain),
+ rf5112_ini_bbgain, change_channel);
+
+ } else if (ah->ah_radio == AR5K_RF2413) {
+
+ if (mode < 2) {
+ ATH5K_ERR(ah->ah_sc,
+ "unsupported channel mode: %d\n", mode);
+ return -EINVAL;
+ }
+ mode = mode - 2;
+
+ /* Override a setting from ar5212_ini */
+ ath5k_hw_reg_write(ah, 0x018830c6, AR5K_PHY(648));
+
+ ath5k_hw_ini_mode_registers(ah,
+ ARRAY_SIZE(rf2413_ini_mode_end),
+ rf2413_ini_mode_end, mode);
+
+ /* Baseband gain table */
+ ath5k_hw_ini_registers(ah,
+ ARRAY_SIZE(rf5112_ini_bbgain),
+ rf5112_ini_bbgain, change_channel);
+
+ } else if (ah->ah_radio == AR5K_RF2425) {
+
+ if (mode < 2) {
+ ATH5K_ERR(ah->ah_sc,
+ "unsupported channel mode: %d\n", mode);
+ return -EINVAL;
+ }
+
+ /* Map b to g */
+ if (mode == 2)
+ mode = 0;
+ else
+ mode = mode - 3;
+
+ /* Override a setting from ar5212_ini */
+ ath5k_hw_reg_write(ah, 0x018830c6, AR5K_PHY(648));
+
+ ath5k_hw_ini_mode_registers(ah,
+ ARRAY_SIZE(rf2425_ini_mode_end),
+ rf2425_ini_mode_end, mode);
+
/* Baseband gain table */
ath5k_hw_ini_registers(ah,
ARRAY_SIZE(rf5112_ini_bbgain),
rf5112_ini_bbgain, change_channel);
+
}
+
/* For AR5211 */
} else if (ah->ah_version == AR5K_AR5211) {
- if(mode > 2){ /* AR5K_INI_VAL_11B */
- ATH5K_ERR(ah->ah_sc,"unsupported channel mode: %d\n", mode);
+ /* AR5K_MODE_11B */
+ if (mode > 2) {
+ ATH5K_ERR(ah->ah_sc,
+ "unsupported channel mode: %d\n", mode);
return -EINVAL;
}
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-11-24 09:14:39 +0000