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path: root/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
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Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8192ce/phy.c')
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/phy.c69
1 files changed, 0 insertions, 69 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
index 604540160a3..73ae8a43184 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
@@ -366,75 +366,6 @@ bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
return true;
}
-void rtl92c_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
-{
- struct rtl_priv *rtlpriv = rtl_priv(hw);
- struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
- struct rtl_phy *rtlphy = &(rtlpriv->phy);
- struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
- u8 reg_bw_opmode;
- u8 reg_prsr_rsc;
-
- RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
- ("Switch to %s bandwidth\n",
- rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
- "20MHz" : "40MHz"))
-
- if (is_hal_stop(rtlhal)) {
- rtlphy->set_bwmode_inprogress = false;
- return;
- }
-
- reg_bw_opmode = rtl_read_byte(rtlpriv, REG_BWOPMODE);
- reg_prsr_rsc = rtl_read_byte(rtlpriv, REG_RRSR + 2);
-
- switch (rtlphy->current_chan_bw) {
- case HT_CHANNEL_WIDTH_20:
- reg_bw_opmode |= BW_OPMODE_20MHZ;
- rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
- break;
- case HT_CHANNEL_WIDTH_20_40:
- reg_bw_opmode &= ~BW_OPMODE_20MHZ;
- rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
- reg_prsr_rsc =
- (reg_prsr_rsc & 0x90) | (mac->cur_40_prime_sc << 5);
- rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
- break;
- default:
- RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
- ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
- break;
- }
-
- switch (rtlphy->current_chan_bw) {
- case HT_CHANNEL_WIDTH_20:
- rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0);
- rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0);
- rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1);
- break;
- case HT_CHANNEL_WIDTH_20_40:
- rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1);
- rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1);
-
- rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND,
- (mac->cur_40_prime_sc >> 1));
- rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc);
- rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0);
-
- rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)),
- (mac->cur_40_prime_sc ==
- HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
- break;
- default:
- RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
- ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
- break;
- }
- rtl92ce_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
- rtlphy->set_bwmode_inprogress = false;
- RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
-}
-
void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
{
u8 tmpreg;