diff options
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/tg3.c | 55 | ||||
| -rw-r--r-- | drivers/net/tg3.h | 3 |
2 files changed, 43 insertions, 15 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index af59a293b5b..d6de46b60b7 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -101,9 +101,15 @@ * You can't change the ring sizes, but you can change where you place * them in the NIC onboard memory. */ -#define TG3_RX_STD_RING_SIZE(tp) 512 +#define TG3_RX_STD_RING_SIZE(tp) \ + ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || \ + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) ? \ + RX_STD_MAX_SIZE_5717 : 512) #define TG3_DEF_RX_RING_PENDING 200 -#define TG3_RX_JMB_RING_SIZE(tp) 256 +#define TG3_RX_JMB_RING_SIZE(tp) \ + ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || \ + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) ? \ + 1024 : 256) #define TG3_DEF_RX_JUMBO_RING_PENDING 100 #define TG3_RSS_INDIR_TBL_SIZE 128 @@ -113,9 +119,6 @@ * hw multiply/modulo instructions. Another solution would be to * replace things like '% foo' with '& (foo - 1)'. */ -#define TG3_RX_RCB_RING_SIZE(tp) \ - (((tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) && \ - !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) ? 1024 : 512) #define TG3_TX_RING_SIZE 512 #define TG3_DEF_TX_RING_PENDING (TG3_TX_RING_SIZE - 1) @@ -125,7 +128,7 @@ #define TG3_RX_JMB_RING_BYTES(tp) \ (sizeof(struct tg3_ext_rx_buffer_desc) * TG3_RX_JMB_RING_SIZE(tp)) #define TG3_RX_RCB_RING_BYTES(tp) \ - (sizeof(struct tg3_rx_buffer_desc) * TG3_RX_RCB_RING_SIZE(tp)) + (sizeof(struct tg3_rx_buffer_desc) * (tp->rx_ret_ring_mask + 1)) #define TG3_TX_RING_BYTES (sizeof(struct tg3_tx_buffer_desc) * \ TG3_TX_RING_SIZE) #define NEXT_TX(N) (((N) + 1) & (TG3_TX_RING_SIZE - 1)) @@ -4724,7 +4727,7 @@ next_pkt: } next_pkt_nopost: sw_idx++; - sw_idx &= (TG3_RX_RCB_RING_SIZE(tp) - 1); + sw_idx &= tp->rx_ret_ring_mask; /* Refresh hw_idx to see if there is new work */ if (sw_idx == hw_idx) { @@ -7612,8 +7615,8 @@ static void tg3_rings_reset(struct tg3 *tp) if (tnapi->rx_rcb) { tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping, - (TG3_RX_RCB_RING_SIZE(tp) << - BDINFO_FLAGS_MAXLEN_SHIFT), 0); + (tp->rx_ret_ring_mask + 1) << + BDINFO_FLAGS_MAXLEN_SHIFT, 0); rxrcb += TG3_BDINFO_SIZE; } @@ -7636,7 +7639,7 @@ static void tg3_rings_reset(struct tg3 *tp) } tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping, - (TG3_RX_RCB_RING_SIZE(tp) << + ((tp->rx_ret_ring_mask + 1) << BDINFO_FLAGS_MAXLEN_SHIFT), 0); stblk += 8; @@ -7949,10 +7952,14 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) BDINFO_FLAGS_DISABLED); } - if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) - val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) | - (TG3_RX_STD_DMA_SZ << 2); - else + if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) { + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) + val = RX_STD_MAX_SIZE_5705; + else + val = RX_STD_MAX_SIZE_5717; + val <<= BDINFO_FLAGS_MAXLEN_SHIFT; + val |= (TG3_RX_STD_DMA_SZ << 2); + } else val = TG3_RX_STD_DMA_SZ << BDINFO_FLAGS_MAXLEN_SHIFT; } else val = RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT; @@ -8235,7 +8242,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) tw32(SNDBDC_MODE, SNDBDC_MODE_ENABLE | SNDBDC_MODE_ATTN_ENABLE); tw32(RCVBDI_MODE, RCVBDI_MODE_ENABLE | RCVBDI_MODE_RCB_ATTN_ENAB); - tw32(RCVDBDI_MODE, RCVDBDI_MODE_ENABLE | RCVDBDI_MODE_INV_RING_SZ); + val = RCVDBDI_MODE_ENABLE | RCVDBDI_MODE_INV_RING_SZ; + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) + val |= RCVDBDI_MODE_LRG_RING_SZ; + tw32(RCVDBDI_MODE, val); tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE); if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE | 0x8); @@ -12851,6 +12862,18 @@ static void inline vlan_features_add(struct net_device *dev, unsigned long flags #endif } +static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp) +{ + if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || + GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) + return 4096; + else if ((tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) && + !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) + return 1024; + else + return 512; +} + static int __devinit tg3_get_invariants(struct tg3 *tp) { static struct pci_device_id write_reorder_chipsets[] = { @@ -13606,6 +13629,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) tp->rx_std_ring_mask = TG3_RX_STD_RING_SIZE(tp) - 1; tp->rx_jmb_ring_mask = TG3_RX_JMB_RING_SIZE(tp) - 1; + tp->rx_ret_ring_mask = tg3_rx_ret_ring_size(tp) - 1; + tp->rx_std_max_post = tp->rx_std_ring_mask + 1; /* Increment the rx prod index on the rx std ring by at most diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 9763298c22c..f6b709a3ca3 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -26,6 +26,7 @@ #define TG3_RX_INTERNAL_RING_SZ_5906 32 #define RX_STD_MAX_SIZE_5705 512 +#define RX_STD_MAX_SIZE_5717 2048 #define RX_JUMBO_MAX_SIZE 0xdeadbeef /* XXX */ /* First 256 bytes are a mirror of PCI config space. */ @@ -972,6 +973,7 @@ #define RCVDBDI_MODE_JUMBOBD_NEEDED 0x00000004 #define RCVDBDI_MODE_FRM_TOO_BIG 0x00000008 #define RCVDBDI_MODE_INV_RING_SZ 0x00000010 +#define RCVDBDI_MODE_LRG_RING_SZ 0x00010000 #define RCVDBDI_STATUS 0x00002404 #define RCVDBDI_STATUS_JUMBOBD_NEEDED 0x00000004 #define RCVDBDI_STATUS_FRM_TOO_BIG 0x00000008 @@ -2764,6 +2766,7 @@ struct tg3 { u32 rx_copy_thresh; u32 rx_std_ring_mask; u32 rx_jmb_ring_mask; + u32 rx_ret_ring_mask; u32 rx_pending; u32 rx_jumbo_pending; u32 rx_std_max_post; |