diff options
Diffstat (limited to 'drivers/ntb/ntb_regs.h')
| -rw-r--r-- | drivers/ntb/ntb_regs.h | 50 |
1 files changed, 35 insertions, 15 deletions
diff --git a/drivers/ntb/ntb_regs.h b/drivers/ntb/ntb_regs.h index 5bfa8c06c05..aa4bdd393c5 100644 --- a/drivers/ntb/ntb_regs.h +++ b/drivers/ntb/ntb_regs.h @@ -46,23 +46,24 @@ * Jon Mason <jon.mason@intel.com> */ -#define NTB_LINK_ENABLE 0x0000 -#define NTB_LINK_DISABLE 0x0002 #define NTB_LINK_STATUS_ACTIVE 0x2000 #define NTB_LINK_SPEED_MASK 0x000f #define NTB_LINK_WIDTH_MASK 0x03f0 #define SNB_MSIX_CNT 4 -#define SNB_MAX_SPADS 16 -#define SNB_MAX_COMPAT_SPADS 8 +#define SNB_MAX_B2B_SPADS 16 +#define SNB_MAX_COMPAT_SPADS 16 /* Reserve the uppermost bit for link interrupt */ #define SNB_MAX_DB_BITS 15 #define SNB_DB_BITS_PER_VEC 5 +#define SNB_MAX_MW 2 +#define SNB_ERRATA_MAX_MW 1 #define SNB_DB_HW_LINK 0x8000 #define SNB_PCICMD_OFFSET 0x0504 #define SNB_DEVCTRL_OFFSET 0x0598 +#define SNB_SLINK_STATUS_OFFSET 0x05A2 #define SNB_LINK_STATUS_OFFSET 0x01A2 #define SNB_PBAR2LMT_OFFSET 0x0000 @@ -74,6 +75,9 @@ #define SNB_SBAR2XLAT_OFFSET 0x0030 #define SNB_SBAR4XLAT_OFFSET 0x0038 #define SNB_SBAR0BASE_OFFSET 0x0040 +#define SNB_SBAR0BASE_OFFSET 0x0040 +#define SNB_SBAR2BASE_OFFSET 0x0048 +#define SNB_SBAR4BASE_OFFSET 0x0050 #define SNB_SBAR2BASE_OFFSET 0x0048 #define SNB_SBAR4BASE_OFFSET 0x0050 #define SNB_NTBCNTL_OFFSET 0x0058 @@ -88,19 +92,28 @@ #define SNB_WCCNTRL_OFFSET 0x00e0 #define SNB_B2B_SPAD_OFFSET 0x0100 #define SNB_B2B_DOORBELL_OFFSET 0x0140 -#define SNB_B2B_XLAT_OFFSET 0x0144 +#define SNB_B2B_XLAT_OFFSETL 0x0144 +#define SNB_B2B_XLAT_OFFSETU 0x0148 + +#define SNB_MBAR01_USD_ADDR 0x000000210000000CULL +#define SNB_MBAR23_USD_ADDR 0x000000410000000CULL +#define SNB_MBAR45_USD_ADDR 0x000000810000000CULL +#define SNB_MBAR01_DSD_ADDR 0x000000200000000CULL +#define SNB_MBAR23_DSD_ADDR 0x000000400000000CULL +#define SNB_MBAR45_DSD_ADDR 0x000000800000000CULL #define BWD_MSIX_CNT 34 #define BWD_MAX_SPADS 16 -#define BWD_MAX_COMPAT_SPADS 16 #define BWD_MAX_DB_BITS 34 #define BWD_DB_BITS_PER_VEC 1 +#define BWD_MAX_MW 2 #define BWD_PCICMD_OFFSET 0xb004 #define BWD_MBAR23_OFFSET 0xb018 #define BWD_MBAR45_OFFSET 0xb020 #define BWD_DEVCTRL_OFFSET 0xb048 #define BWD_LINK_STATUS_OFFSET 0xb052 +#define BWD_ERRCORSTS_OFFSET 0xb110 #define BWD_SBAR2XLAT_OFFSET 0x0008 #define BWD_SBAR4XLAT_OFFSET 0x0010 @@ -118,6 +131,22 @@ #define BWD_B2B_SPADSEMA_OFFSET 0x80c0 #define BWD_B2B_STKYSPAD_OFFSET 0x80c4 +#define BWD_MODPHY_PCSREG4 0x1c004 +#define BWD_MODPHY_PCSREG6 0x1c006 + +#define BWD_IP_BASE 0xC000 +#define BWD_DESKEWSTS_OFFSET (BWD_IP_BASE + 0x3024) +#define BWD_LTSSMERRSTS0_OFFSET (BWD_IP_BASE + 0x3180) +#define BWD_LTSSMSTATEJMP_OFFSET (BWD_IP_BASE + 0x3040) +#define BWD_IBSTERRRCRVSTS0_OFFSET (BWD_IP_BASE + 0x3324) + +#define BWD_DESKEWSTS_DBERR (1 << 15) +#define BWD_LTSSMERRSTS0_UNEXPECTEDEI (1 << 20) +#define BWD_LTSSMSTATEJMP_FORCEDETECT (1 << 2) +#define BWD_IBIST_ERR_OFLOW 0x7FFF7FFF + +#define NTB_CNTL_CFG_LOCK (1 << 0) +#define NTB_CNTL_LINK_DISABLE (1 << 1) #define NTB_CNTL_BAR23_SNOOP (1 << 2) #define NTB_CNTL_BAR45_SNOOP (1 << 6) #define BWD_CNTL_LINK_DOWN (1 << 16) @@ -128,12 +157,3 @@ #define BWD_PPD_INIT_LINK 0x0008 #define BWD_PPD_CONN_TYPE 0x0300 #define BWD_PPD_DEV_TYPE 0x1000 - -#define BWD_PBAR2XLAT_USD_ADDR 0x0000004000000000 -#define BWD_PBAR4XLAT_USD_ADDR 0x0000008000000000 -#define BWD_MBAR23_USD_ADDR 0x000000410000000C -#define BWD_MBAR45_USD_ADDR 0x000000810000000C -#define BWD_PBAR2XLAT_DSD_ADDR 0x0000004100000000 -#define BWD_PBAR4XLAT_DSD_ADDR 0x0000008100000000 -#define BWD_MBAR23_DSD_ADDR 0x000000400000000C -#define BWD_MBAR45_DSD_ADDR 0x000000800000000C |