diff options
Diffstat (limited to 'drivers/pinctrl/pinctrl-tegra114.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-tegra114.c | 1100 |
1 files changed, 109 insertions, 991 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra114.c b/drivers/pinctrl/pinctrl-tegra114.c index 93c9e3899d5..63fe7619d3f 100644 --- a/drivers/pinctrl/pinctrl-tegra114.c +++ b/drivers/pinctrl/pinctrl-tegra114.c @@ -1,10 +1,8 @@ /* - * Pinctrl data and driver for the NVIDIA Tegra114 pinmux + * Pinctrl data for the NVIDIA Tegra114 pinmux * * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved. * - * Author: Pritesh Raithatha <praithatha@nvidia.com> - * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, * version 2, as published by the Free Software Foundation. @@ -13,9 +11,6 @@ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see <http://www.gnu.org/licenses/>. */ #include <linux/module.h> @@ -203,8 +198,8 @@ #define TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5 _GPIO(245) /* All non-GPIO pins follow */ -#define NUM_GPIOS (TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5 + 1) -#define _PIN(offset) (NUM_GPIOS + (offset)) +#define NUM_GPIOS (TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5 + 1) +#define _PIN(offset) (NUM_GPIOS + (offset)) /* Non-GPIO pins */ #define TEGRA_PIN_CORE_PWR_REQ _PIN(0) @@ -212,8 +207,11 @@ #define TEGRA_PIN_PWR_INT_N _PIN(2) #define TEGRA_PIN_RESET_OUT_N _PIN(3) #define TEGRA_PIN_OWR _PIN(4) +#define TEGRA_PIN_JTAG_RTCK _PIN(5) +#define TEGRA_PIN_CLK_32K_IN _PIN(6) +#define TEGRA_PIN_GMI_CLK_LB _PIN(7) -static const struct pinctrl_pin_desc tegra114_pins[] = { +static const struct pinctrl_pin_desc tegra114_pins[] = { PINCTRL_PIN(TEGRA_PIN_CLK_32K_OUT_PA0, "CLK_32K_OUT PA0"), PINCTRL_PIN(TEGRA_PIN_UART3_CTS_N_PA1, "UART3_CTS_N PA1"), PINCTRL_PIN(TEGRA_PIN_DAP2_FS_PA2, "DAP2_FS PA2"), @@ -385,9 +383,12 @@ static const struct pinctrl_pin_desc tegra114_pins[] = { PINCTRL_PIN(TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5, "SDMMC3_CLK_LB_IN PEE5"), PINCTRL_PIN(TEGRA_PIN_CORE_PWR_REQ, "CORE_PWR_REQ"), PINCTRL_PIN(TEGRA_PIN_CPU_PWR_REQ, "CPU_PWR_REQ"), - PINCTRL_PIN(TEGRA_PIN_OWR, "OWR"), PINCTRL_PIN(TEGRA_PIN_PWR_INT_N, "PWR_INT_N"), PINCTRL_PIN(TEGRA_PIN_RESET_OUT_N, "RESET_OUT_N"), + PINCTRL_PIN(TEGRA_PIN_OWR, "OWR"), + PINCTRL_PIN(TEGRA_PIN_JTAG_RTCK, "JTAG_RTCK"), + PINCTRL_PIN(TEGRA_PIN_CLK_32K_IN, "CLK_32K_IN"), + PINCTRL_PIN(TEGRA_PIN_GMI_CLK_LB, "GMI_CLK_LB"), }; static const unsigned clk_32k_out_pa0_pins[] = { @@ -1074,10 +1075,6 @@ static const unsigned cpu_pwr_req_pins[] = { TEGRA_PIN_CPU_PWR_REQ, }; -static const unsigned owr_pins[] = { - TEGRA_PIN_OWR, -}; - static const unsigned pwr_int_n_pins[] = { TEGRA_PIN_PWR_INT_N, }; @@ -1086,6 +1083,22 @@ static const unsigned reset_out_n_pins[] = { TEGRA_PIN_RESET_OUT_N, }; +static const unsigned owr_pins[] = { + TEGRA_PIN_OWR, +}; + +static const unsigned jtag_rtck_pins[] = { + TEGRA_PIN_JTAG_RTCK, +}; + +static const unsigned clk_32k_in_pins[] = { + TEGRA_PIN_CLK_32K_IN, +}; + +static const unsigned gmi_clk_lb_pins[] = { + TEGRA_PIN_GMI_CLK_LB, +}; + static const unsigned drive_ao1_pins[] = { TEGRA_PIN_KB_ROW0_PR0, TEGRA_PIN_KB_ROW1_PR1, @@ -1127,7 +1140,6 @@ static const unsigned drive_at1_pins[] = { TEGRA_PIN_GMI_AD13_PH5, TEGRA_PIN_GMI_AD14_PH6, TEGRA_PIN_GMI_AD15_PH7, - TEGRA_PIN_GMI_IORDY_PI5, TEGRA_PIN_GMI_CS7_N_PI6, }; @@ -1141,15 +1153,12 @@ static const unsigned drive_at2_pins[] = { TEGRA_PIN_GMI_AD5_PG5, TEGRA_PIN_GMI_AD6_PG6, TEGRA_PIN_GMI_AD7_PG7, - TEGRA_PIN_GMI_WR_N_PI0, TEGRA_PIN_GMI_OE_N_PI1, TEGRA_PIN_GMI_CS6_N_PI3, TEGRA_PIN_GMI_RST_N_PI4, TEGRA_PIN_GMI_WAIT_PI7, - TEGRA_PIN_GMI_DQS_P_PJ3, - TEGRA_PIN_GMI_ADV_N_PK0, TEGRA_PIN_GMI_CLK_PK1, TEGRA_PIN_GMI_CS4_N_PK2, @@ -1342,14 +1351,37 @@ static const unsigned drive_uda_pins[] = { }; static const unsigned drive_dev3_pins[] = { - TEGRA_PIN_CLK3_OUT_PEE0, - TEGRA_PIN_CLK3_REQ_PEE1, +}; + +static const unsigned drive_cec_pins[] = { +}; + +static const unsigned drive_at6_pins[] = { +}; + +static const unsigned drive_dap5_pins[] = { +}; + +static const unsigned drive_usb_vbus_en_pins[] = { +}; + +static const unsigned drive_ao3_pins[] = { +}; + +static const unsigned drive_hv0_pins[] = { +}; + +static const unsigned drive_sdio4_pins[] = { +}; + +static const unsigned drive_ao0_pins[] = { }; enum tegra_mux { TEGRA_MUX_BLINK, TEGRA_MUX_CEC, TEGRA_MUX_CLDVFS, + TEGRA_MUX_CLK, TEGRA_MUX_CLK12, TEGRA_MUX_CPU, TEGRA_MUX_DAP, @@ -1394,6 +1426,7 @@ enum tegra_mux { TEGRA_MUX_RSVD2, TEGRA_MUX_RSVD3, TEGRA_MUX_RSVD4, + TEGRA_MUX_RTCK, TEGRA_MUX_SDMMC1, TEGRA_MUX_SDMMC2, TEGRA_MUX_SDMMC3, @@ -1425,944 +1458,16 @@ enum tegra_mux { TEGRA_MUX_VI_ALT3, }; -static const char * const blink_groups[] = { - "clk_32k_out_pa0", -}; - -static const char * const cec_groups[] = { - "hdmi_cec_pee3", -}; - -static const char * const cldvfs_groups[] = { - "gmi_ad9_ph1", - "gmi_ad10_ph2", - "kb_row7_pr7", - "kb_row8_ps0", - "dvfs_pwm_px0", - "dvfs_clk_px2", -}; - -static const char * const clk12_groups[] = { - "sdmmc1_wp_n_pv3", - "sdmmc1_clk_pz0", -}; - -static const char * const cpu_groups[] = { - "cpu_pwr_req", -}; - -static const char * const dap_groups[] = { - "clk1_req_pee2", - "clk2_req_pcc5", -}; - -static const char * const dap1_groups[] = { - "clk1_req_pee2", -}; - -static const char * const dap2_groups[] = { - "clk1_out_pw4", - "gpio_x4_aud_px4", -}; - -static const char * const dev3_groups[] = { - "clk3_req_pee1", -}; - -static const char * const displaya_groups[] = { - "dap3_fs_pp0", - "dap3_din_pp1", - "dap3_dout_pp2", - "dap3_sclk_pp3", - "uart3_rts_n_pc0", - "pu3", - "pu4", - "pu5", - "pbb3", - "pbb4", - "pbb5", - "pbb6", - "kb_row3_pr3", - "kb_row4_pr4", - "kb_row5_pr5", - "kb_row6_pr6", - "kb_col3_pq3", - "sdmmc3_dat2_pb5", -}; - -static const char * const displaya_alt_groups[] = { - "kb_row6_pr6", -}; - -static const char * const displayb_groups[] = { - "dap3_fs_pp0", - "dap3_din_pp1", - "dap3_dout_pp2", - "dap3_sclk_pp3", - "pu3", - "pu4", - "pu5", - "pu6", - "pbb3", - "pbb4", - "pbb5", - "pbb6", - "kb_row3_pr3", - "kb_row4_pr4", - "kb_row5_pr5", - "kb_row6_pr6", - "sdmmc3_dat3_pb4", -}; - -static const char * const dtv_groups[] = { - "uart3_cts_n_pa1", - "uart3_rts_n_pc0", - "dap4_fs_pp4", - "dap4_dout_pp6", - "gmi_wait_pi7", - "gmi_ad8_ph0", - "gmi_ad14_ph6", - "gmi_ad15_ph7", -}; - -static const char * const emc_dll_groups[] = { - "kb_col0_pq0", - "kb_col1_pq1", -}; - -static const char * const extperiph1_groups[] = { - "clk1_out_pw4", -}; - -static const char * const extperiph2_groups[] = { - "clk2_out_pw5", -}; - -static const char * const extperiph3_groups[] = { - "clk3_out_pee0", -}; - -static const char * const gmi_groups[] = { - "gmi_wp_n_pc7", - - "gmi_ad0_pg0", - "gmi_ad1_pg1", - "gmi_ad2_pg2", - "gmi_ad3_pg3", - "gmi_ad4_pg4", - "gmi_ad5_pg5", - "gmi_ad6_pg6", - "gmi_ad7_pg7", - "gmi_ad8_ph0", - "gmi_ad9_ph1", - "gmi_ad10_ph2", - "gmi_ad11_ph3", - "gmi_ad12_ph4", - "gmi_ad13_ph5", - "gmi_ad14_ph6", - "gmi_ad15_ph7", - "gmi_wr_n_pi0", - "gmi_oe_n_pi1", - "gmi_cs6_n_pi3", - "gmi_rst_n_pi4", - "gmi_iordy_pi5", - "gmi_cs7_n_pi6", - "gmi_wait_pi7", - "gmi_cs0_n_pj0", - "gmi_cs1_n_pj2", - "gmi_dqs_p_pj3", - "gmi_adv_n_pk0", - "gmi_clk_pk1", - "gmi_cs4_n_pk2", - "gmi_cs2_n_pk3", - "gmi_cs3_n_pk4", - "gmi_a16_pj7", - "gmi_a17_pb0", - "gmi_a18_pb1", - "gmi_a19_pk7", - "gen2_i2c_scl_pt5", - "gen2_i2c_sda_pt6", - "sdmmc4_dat0_paa0", - "sdmmc4_dat1_paa1", - "sdmmc4_dat2_paa2", - "sdmmc4_dat3_paa3", - "sdmmc4_dat4_paa4", - "sdmmc4_dat5_paa5", - "sdmmc4_dat6_paa6", - "sdmmc4_dat7_paa7", - "sdmmc4_clk_pcc4", - "sdmmc4_cmd_pt7", - "dap1_fs_pn0", - "dap1_din_pn1", - "dap1_dout_pn2", - "dap1_sclk_pn3", -}; - -static const char * const gmi_alt_groups[] = { - "gmi_wp_n_pc7", - "gmi_cs3_n_pk4", - "gmi_a16_pj7", -}; - -static const char * const hda_groups[] = { - "dap1_fs_pn0", - "dap1_din_pn1", - "dap1_dout_pn2", - "dap1_sclk_pn3", - "dap2_fs_pa2", - "dap2_sclk_pa3", - "dap2_din_pa4", - "dap2_dout_pa5", -}; - -static const char * const hsi_groups[] = { - "ulpi_data0_po1", - "ulpi_data1_po2", - "ulpi_data2_po3", - "ulpi_data3_po4", - "ulpi_data4_po5", - "ulpi_data5_po6", - "ulpi_data6_po7", - "ulpi_data7_po0", -}; - -static const char * const i2c1_groups[] = { - "gen1_i2c_scl_pc4", - "gen1_i2c_sda_pc5", - "gpio_w2_aud_pw2", - "gpio_w3_aud_pw3", -}; - -static const char * const i2c2_groups[] = { - "gen2_i2c_scl_pt5", - "gen2_i2c_sda_pt6", -}; - -static const char * const i2c3_groups[] = { - "cam_i2c_scl_pbb1", - "cam_i2c_sda_pbb2", -}; - -static const char * const i2c4_groups[] = { - "ddc_scl_pv4", - "ddc_sda_pv5", -}; - -static const char * const i2cpwr_groups[] = { - "pwr_i2c_scl_pz6", - "pwr_i2c_sda_pz7", -}; - -static const char * const i2s0_groups[] = { - "dap1_fs_pn0", - "dap1_din_pn1", - "dap1_dout_pn2", - "dap1_sclk_pn3", -}; - -static const char * const i2s1_groups[] = { - "dap2_fs_pa2", - "dap2_sclk_pa3", - "dap2_din_pa4", - "dap2_dout_pa5", -}; - -static const char * const i2s2_groups[] = { - "dap3_fs_pp0", - "dap3_din_pp1", - "dap3_dout_pp2", - "dap3_sclk_pp3", -}; - -static const char * const i2s3_groups[] = { - "dap4_fs_pp4", - "dap4_din_pp5", - "dap4_dout_pp6", - "dap4_sclk_pp7", -}; - -static const char * const i2s4_groups[] = { - "pcc1", - "pbb0", - "pbb7", - "pcc2", -}; - -static const char * const irda_groups[] = { - "uart2_rxd_pc3", - "uart2_txd_pc2", -}; - -static const char * const kbc_groups[] = { - "kb_row0_pr0", - "kb_row1_pr1", - "kb_row2_pr2", - "kb_row3_pr3", - "kb_row4_pr4", - "kb_row5_pr5", - "kb_row6_pr6", - "kb_row7_pr7", - "kb_row8_ps0", - "kb_row9_ps1", - "kb_row10_ps2", - "kb_col0_pq0", - "kb_col1_pq1", - "kb_col2_pq2", - "kb_col3_pq3", - "kb_col4_pq4", - "kb_col5_pq5", - "kb_col6_pq6", - "kb_col7_pq7", -}; - -static const char * const nand_groups[] = { - "gmi_wp_n_pc7", - "gmi_wait_pi7", - "gmi_adv_n_pk0", - "gmi_clk_pk1", - "gmi_cs0_n_pj0", - "gmi_cs1_n_pj2", - "gmi_cs2_n_pk3", - "gmi_cs3_n_pk4", - "gmi_cs4_n_pk2", - "gmi_cs6_n_pi3", - "gmi_cs7_n_pi6", - "gmi_ad0_pg0", - "gmi_ad1_pg1", - "gmi_ad2_pg2", - "gmi_ad3_pg3", - "gmi_ad4_pg4", - "gmi_ad5_pg5", - "gmi_ad6_pg6", - "gmi_ad7_pg7", - "gmi_ad8_ph0", - "gmi_ad9_ph1", - "gmi_ad10_ph2", - "gmi_ad11_ph3", - "gmi_ad12_ph4", - "gmi_ad13_ph5", - "gmi_ad14_ph6", - "gmi_ad15_ph7", - "gmi_wr_n_pi0", - "gmi_oe_n_pi1", - "gmi_dqs_p_pj3", - "gmi_rst_n_pi4", -}; - -static const char * const nand_alt_groups[] = { - "gmi_cs6_n_pi3", - "gmi_cs7_n_pi6", - "gmi_rst_n_pi4", -}; - -static const char * const owr_groups[] = { - "pu0", - "kb_col4_pq4", - "owr", - "sdmmc3_cd_n_pv2", -}; - -static const char * const pmi_groups[] = { - "pwr_int_n", -}; - -static const char * const pwm0_groups[] = { - "sdmmc1_dat2_py5", - "uart3_rts_n_pc0", - "pu3", - "gmi_ad8_ph0", - "sdmmc3_dat3_pb4", -}; - -static const char * const pwm1_groups[] = { - "sdmmc1_dat1_py6", - "pu4", - "gmi_ad9_ph1", - "sdmmc3_dat2_pb5", -}; - -static const char * const pwm2_groups[] = { - "pu5", - "gmi_ad10_ph2", - "kb_col3_pq3", - "sdmmc3_dat1_pb6", -}; - -static const char * const pwm3_groups[] = { - "pu6", - "gmi_ad11_ph3", - "sdmmc3_cmd_pa7", -}; - -static const char * const pwron_groups[] = { - "core_pwr_req", -}; - -static const char * const reset_out_n_groups[] = { - "reset_out_n", -}; - -static const char * const rsvd1_groups[] = { - "pv1", - "hdmi_int_pn7", - "pu1", - "pu2", - "gmi_wp_n_pc7", - "gmi_adv_n_pk0", - "gmi_cs0_n_pj0", - "gmi_cs1_n_pj2", - "gmi_ad0_pg0", - "gmi_ad1_pg1", - "gmi_ad2_pg2", - "gmi_ad3_pg3", - "gmi_ad4_pg4", - "gmi_ad5_pg5", - "gmi_ad6_pg6", - "gmi_ad7_pg7", - "gmi_wr_n_pi0", - "gmi_oe_n_pi1", - "gpio_x4_aud_px4", - "gpio_x5_aud_px5", - "gpio_x7_aud_px7", - - "reset_out_n", -}; - -static const char * const rsvd2_groups[] = { - "pv0", - "pv1", - "sdmmc1_dat0_py7", - "clk2_out_pw5", - "clk2_req_pcc5", - "hdmi_int_pn7", - "ddc_scl_pv4", - "ddc_sda_pv5", - "uart3_txd_pw6", - "uart3_rxd_pw7", - "gen1_i2c_scl_pc4", - "gen1_i2c_sda_pc5", - "dap4_fs_pp4", - "dap4_din_pp5", - "dap4_dout_pp6", - "dap4_sclk_pp7", - "clk3_out_pee0", - "clk3_req_pee1", - "gmi_iordy_pi5", - "gmi_a17_pb0", - "gmi_a18_pb1", - "gen2_i2c_scl_pt5", - "gen2_i2c_sda_pt6", - "sdmmc4_clk_pcc4", - "sdmmc4_cmd_pt7", - "sdmmc4_dat7_paa7", - "pcc1", - "pbb7", - "pcc2", - "pwr_i2c_scl_pz6", - "pwr_i2c_sda_pz7", - "kb_row0_pr0", - "kb_row1_pr1", - "kb_row2_pr2", - "kb_row7_pr7", - "kb_row8_ps0", - "kb_row9_ps1", - "kb_row10_ps2", - "kb_col1_pq1", - "kb_col2_pq2", - "kb_col5_pq5", - "kb_col6_pq6", - "kb_col7_pq7", - "sys_clk_req_pz5", - "core_pwr_req", - "cpu_pwr_req", - "pwr_int_n", - "owr", - "spdif_out_pk5", - "gpio_x1_aud_px1", - "sdmmc3_clk_pa6", - "sdmmc3_dat0_pb7", - "gpio_w2_aud_pw2", - "usb_vbus_en0_pn4", - "usb_vbus_en1_pn5", - "sdmmc3_clk_lb_out_pee4", - "sdmmc3_clk_lb_in_pee5", - "reset_out_n", -}; - -static const char * const rsvd3_groups[] = { - "pv0", - "pv1", - "sdmmc1_clk_pz0", - "clk2_out_pw5", - "clk2_req_pcc5", - "hdmi_int_pn7", - "ddc_scl_pv4", - "ddc_sda_pv5", - "uart2_rts_n_pj6", - "uart2_cts_n_pj5", - "uart3_txd_pw6", - "uart3_rxd_pw7", - "pu0", - "pu1", - "pu2", - "gen1_i2c_scl_pc4", - "gen1_i2c_sda_pc5", - "dap4_din_pp5", - "dap4_sclk_pp7", - "clk3_out_pee0", - "clk3_req_pee1", - "pcc1", - "cam_i2c_scl_pbb1", - "cam_i2c_sda_pbb2", - "pbb7", - "pcc2", - "pwr_i2c_scl_pz6", - "pwr_i2c_sda_pz7", - "kb_row0_pr0", - "kb_row1_pr1", - "kb_row2_pr2", - "kb_row3_pr3", - "kb_row9_ps1", - "kb_row10_ps2", - "clk_32k_out_pa0", - "sys_clk_req_pz5", - "core_pwr_req", - "cpu_pwr_req", - "pwr_int_n", - "owr", - "clk1_req_pee2", - "clk1_out_pw4", - "spdif_out_pk5", - "spdif_in_pk6", - "dap2_fs_pa2", - "dap2_sclk_pa3", - "dap2_din_pa4", - "dap2_dout_pa5", - "dvfs_pwm_px0", - "gpio_x1_aud_px1", - "gpio_x3_aud_px3", - "dvfs_clk_px2", - "sdmmc3_clk_pa6", - "sdmmc3_dat0_pb7", - "hdmi_cec_pee3", - "sdmmc3_cd_n_pv2", - "usb_vbus_en0_pn4", - "usb_vbus_en1_pn5", - "sdmmc3_clk_lb_out_pee4", - "sdmmc3_clk_lb_in_pee5", - "reset_out_n", -}; - -static const char * const rsvd4_groups[] = { - "pv0", - "pv1", - "sdmmc1_clk_pz0", - "clk2_out_pw5", - "clk2_req_pcc5", - "hdmi_int_pn7", - "ddc_scl_pv4", - "ddc_sda_pv5", - "pu0", - "pu1", - "pu2", - "gen1_i2c_scl_pc4", - "gen1_i2c_sda_pc5", - "dap4_fs_pp4", - "dap4_din_pp5", - "dap4_dout_pp6", - "dap4_sclk_pp7", - "clk3_out_pee0", - "clk3_req_pee1", - "gmi_ad0_pg0", - "gmi_ad1_pg1", - "gmi_ad2_pg2", - "gmi_ad3_pg3", - "gmi_ad4_pg4", - "gmi_ad12_ph4", - "gmi_ad13_ph5", - "gmi_rst_n_pi4", - "gen2_i2c_scl_pt5", - "gen2_i2c_sda_pt6", - "sdmmc4_clk_pcc4", - "sdmmc4_cmd_pt7", - "sdmmc4_dat0_paa0", - "sdmmc4_dat1_paa1", - "sdmmc4_dat2_paa2", - "sdmmc4_dat3_paa3", - "sdmmc4_dat4_paa4", - "sdmmc4_dat5_paa5", - "sdmmc4_dat6_paa6", - "sdmmc4_dat7_paa7", - "cam_mclk_pcc0", - "pcc1", - "cam_i2c_scl_pbb1", - "cam_i2c_sda_pbb2", - "pbb3", - "pbb4", - "pbb5", - "pbb6", - "pbb7", - "pcc2", - "pwr_i2c_scl_pz6", - "pwr_i2c_sda_pz7", - "kb_row0_pr0", - "kb_row1_pr1", - "kb_row2_pr2", - "kb_col2_pq2", - "kb_col5_pq5", - "kb_col6_pq6", - "kb_col7_pq7", - "clk_32k_out_pa0", - "sys_clk_req_pz5", - "core_pwr_req", - "cpu_pwr_req", - "pwr_int_n", - "owr", - "dap1_fs_pn0", - "dap1_din_pn1", - "dap1_dout_pn2", - "dap1_sclk_pn3", - "clk1_req_pee2", - "clk1_out_pw4", - "spdif_in_pk6", - "spdif_out_pk5", - "dap2_fs_pa2", - "dap2_sclk_pa3", - "dap2_din_pa4", - "dap2_dout_pa5", - "dvfs_pwm_px0", - "gpio_x1_aud_px1", - "gpio_x3_aud_px3", - "dvfs_clk_px2", - "gpio_x5_aud_px5", - "gpio_x6_aud_px6", - "gpio_x7_aud_px7", - "sdmmc3_cd_n_pv2", - "usb_vbus_en0_pn4", - "usb_vbus_en1_pn5", - "sdmmc3_clk_lb_in_pee5", - "sdmmc3_clk_lb_out_pee4", -}; - -static const char * const sdmmc1_groups[] = { - - "sdmmc1_clk_pz0", - "sdmmc1_cmd_pz1", - "sdmmc1_dat3_py4", - "sdmmc1_dat2_py5", - "sdmmc1_dat1_py6", - "sdmmc1_dat0_py7", - "uart3_cts_n_pa1", - "kb_col5_pq5", - "sdmmc1_wp_n_pv3", -}; - -static const char * const sdmmc2_groups[] = { - "gmi_iordy_pi5", - "gmi_clk_pk1", - "gmi_cs2_n_pk3", - "gmi_cs3_n_pk4", - "gmi_cs7_n_pi6", - "gmi_ad12_ph4", - "gmi_ad13_ph5", - "gmi_ad14_ph6", - "gmi_ad15_ph7", - "gmi_dqs_p_pj3", -}; - -static const char * const sdmmc3_groups[] = { - "kb_col4_pq4", - "sdmmc3_clk_pa6", - "sdmmc3_cmd_pa7", - "sdmmc3_dat0_pb7", - "sdmmc3_dat1_pb6", - "sdmmc3_dat2_pb5", - "sdmmc3_dat3_pb4", - "hdmi_cec_pee3", - "sdmmc3_cd_n_pv2", - "sdmmc3_clk_lb_in_pee5", - "sdmmc3_clk_lb_out_pee4", -}; - -static const char * const sdmmc4_groups[] = { - "sdmmc4_clk_pcc4", - "sdmmc4_cmd_pt7", - "sdmmc4_dat0_paa0", - "sdmmc4_dat1_paa1", - "sdmmc4_dat2_paa2", - "sdmmc4_dat3_paa3", - "sdmmc4_dat4_paa4", - "sdmmc4_dat5_paa5", - "sdmmc4_dat6_paa6", - "sdmmc4_dat7_paa7", -}; - -static const char * const soc_groups[] = { - "gmi_cs1_n_pj2", - "gmi_oe_n_pi1", - "clk_32k_out_pa0", - "hdmi_cec_pee3", -}; - -static const char * const spdif_groups[] = { - "sdmmc1_cmd_pz1", - "sdmmc1_dat3_py4", - "uart2_rxd_pc3", - "uart2_txd_pc2", - "spdif_in_pk6", - "spdif_out_pk5", -}; - -static const char * const spi1_groups[] = { - "ulpi_clk_py0", - "ulpi_dir_py1", - "ulpi_nxt_py2", - "ulpi_stp_py3", - "gpio_x3_aud_px3", - "gpio_x4_aud_px4", - "gpio_x5_aud_px5", - "gpio_x6_aud_px6", - "gpio_x7_aud_px7", - "gpio_w3_aud_pw3", -}; - -static const char * const spi2_groups[] = { - "ulpi_data4_po5", - "ulpi_data5_po6", - "ulpi_data6_po7", - "ulpi_data7_po0", - "kb_row4_pr4", - "kb_row5_pr5", - "kb_col0_pq0", - "kb_col1_pq1", - "kb_col2_pq2", - "kb_col6_pq6", - "kb_col7_pq7", - "gpio_x4_aud_px4", - "gpio_x5_aud_px5", - "gpio_x6_aud_px6", - "gpio_x7_aud_px7", - "gpio_w2_aud_pw2", - "gpio_w3_aud_pw3", -}; - -static const char * const spi3_groups[] = { - "ulpi_data0_po1", - "ulpi_data1_po2", - "ulpi_data2_po3", - "ulpi_data3_po4", - "sdmmc4_dat0_paa0", - "sdmmc4_dat1_paa1", - "sdmmc4_dat2_paa2", - "sdmmc4_dat3_paa3", - "sdmmc4_dat4_paa4", - "sdmmc4_dat5_paa5", - "sdmmc4_dat6_paa6", - "sdmmc3_clk_pa6", - "sdmmc3_cmd_pa7", - "sdmmc3_dat0_pb7", - "sdmmc3_dat1_pb6", - "sdmmc3_dat2_pb5", - "sdmmc3_dat3_pb4", -}; - -static const char * const spi4_groups[] = { - "sdmmc1_cmd_pz1", - "sdmmc1_dat3_py4", - "sdmmc1_dat2_py5", - "sdmmc1_dat1_py6", - "sdmmc1_dat0_py7", - "uart2_rxd_pc3", - "uart2_txd_pc2", - "uart2_rts_n_pj6", - "uart2_cts_n_pj5", - "uart3_txd_pw6", - "uart3_rxd_pw7", - "uart3_cts_n_pa1", - "gmi_wait_pi7", - "gmi_cs6_n_pi3", - "gmi_ad5_pg5", - "gmi_ad6_pg6", - "gmi_ad7_pg7", - "gmi_a19_pk7", - "gmi_wr_n_pi0", - "sdmmc1_wp_n_pv3", -}; - -static const char * const spi5_groups[] = { - "ulpi_clk_py0", - "ulpi_dir_py1", - "ulpi_nxt_py2", - "ulpi_stp_py3", - "dap3_fs_pp0", - "dap3_din_pp1", - "dap3_dout_pp2", - "dap3_sclk_pp3", -}; - -static const char * const spi6_groups[] = { - "dvfs_pwm_px0", - "gpio_x1_aud_px1", - "gpio_x3_aud_px3", - "dvfs_clk_px2", - "gpio_x6_aud_px6", - "gpio_w2_aud_pw2", - "gpio_w3_aud_pw3", -}; - -static const char * const sysclk_groups[] = { - "sys_clk_req_pz5", -}; - -static const char * const trace_groups[] = { - "gmi_iordy_pi5", - "gmi_adv_n_pk0", - "gmi_clk_pk1", - "gmi_cs2_n_pk3", - "gmi_cs4_n_pk2", - "gmi_a16_pj7", - "gmi_a17_pb0", - "gmi_a18_pb1", - "gmi_a19_pk7", - "gmi_dqs_p_pj3", -}; - -static const char * const uarta_groups[] = { - "ulpi_data0_po1", - "ulpi_data1_po2", - "ulpi_data2_po3", - "ulpi_data3_po4", - "ulpi_data4_po5", - "ulpi_data5_po6", - "ulpi_data6_po7", - "ulpi_data7_po0", - "sdmmc1_cmd_pz1", - "sdmmc1_dat3_py4", - "sdmmc1_dat2_py5", - "sdmmc1_dat1_py6", - "sdmmc1_dat0_py7", - "uart2_rxd_pc3", - "uart2_txd_pc2", - "uart2_rts_n_pj6", - "uart2_cts_n_pj5", - "pu0", - "pu1", - "pu2", - "pu3", - "pu4", - "pu5", - "pu6", - "kb_row7_pr7", - "kb_row8_ps0", - "kb_row9_ps1", - "kb_row10_ps2", - "kb_col3_pq3", - "kb_col4_pq4", - "sdmmc3_cmd_pa7", - "sdmmc3_dat1_pb6", - "sdmmc1_wp_n_pv3", -}; - -static const char * const uartb_groups[] = { - "uart2_rts_n_pj6", - "uart2_cts_n_pj5", -}; - -static const char * const uartc_groups[] = { - "uart3_txd_pw6", - "uart3_rxd_pw7", - "uart3_cts_n_pa1", - "uart3_rts_n_pc0", -}; - -static const char * const uartd_groups[] = { - "ulpi_clk_py0", - "ulpi_dir_py1", - "ulpi_nxt_py2", - "ulpi_stp_py3", - "gmi_a16_pj7", - "gmi_a17_pb0", - "gmi_a18_pb1", - "gmi_a19_pk7", -}; - -static const char * const ulpi_groups[] = { - "ulpi_data0_po1", - "ulpi_data1_po2", - "ulpi_data2_po3", - "ulpi_data3_po4", - "ulpi_data4_po5", - "ulpi_data5_po6", - "ulpi_data6_po7", - "ulpi_data7_po0", - "ulpi_clk_py0", - "ulpi_dir_py1", - "ulpi_nxt_py2", - "ulpi_stp_py3", -}; - -static const char * const usb_groups[] = { - "pv0", - "pu6", - "gmi_cs0_n_pj0", - "gmi_cs4_n_pk2", - "gmi_ad11_ph3", - "kb_col0_pq0", - "spdif_in_pk6", - "usb_vbus_en0_pn4", - "usb_vbus_en1_pn5", -}; - -static const char * const vgp1_groups[] = { - "cam_i2c_scl_pbb1", -}; - -static const char * const vgp2_groups[] = { - "cam_i2c_sda_pbb2", -}; - -static const char * const vgp3_groups[] = { - "pbb3", -}; - -static const char * const vgp4_groups[] = { - "pbb4", -}; - -static const char * const vgp5_groups[] = { - "pbb5", -}; - -static const char * const vgp6_groups[] = { - "pbb6", -}; - -static const char * const vi_groups[] = { - "cam_mclk_pcc0", - "pbb0", -}; - -static const char * const vi_alt1_groups[] = { - "cam_mclk_pcc0", - "pbb0", -}; - -static const char * const vi_alt3_groups[] = { - "cam_mclk_pcc0", - "pbb0", -}; - #define FUNCTION(fname) \ { \ .name = #fname, \ - .groups = fname##_groups, \ - .ngroups = ARRAY_SIZE(fname##_groups), \ } -static const struct tegra_function tegra114_functions[] = { +static struct tegra_function tegra114_functions[] = { FUNCTION(blink), FUNCTION(cec), FUNCTION(cldvfs), + FUNCTION(clk), FUNCTION(clk12), FUNCTION(cpu), FUNCTION(dap), @@ -2407,6 +1512,7 @@ static const struct tegra_function tegra114_functions[] = { FUNCTION(rsvd2), FUNCTION(rsvd3), FUNCTION(rsvd4), + FUNCTION(rtck), FUNCTION(sdmmc1), FUNCTION(sdmmc2), FUNCTION(sdmmc3), @@ -2438,11 +1544,11 @@ static const struct tegra_function tegra114_functions[] = { FUNCTION(vi_alt3), }; -#define DRV_PINGROUP_REG_START 0x868 /* bank 0 */ -#define PINGROUP_REG_START 0x3000 /* bank 1 */ +#define DRV_PINGROUP_REG_A 0x868 /* bank 0 */ +#define PINGROUP_REG_A 0x3000 /* bank 1 */ -#define PINGROUP_REG_Y(r) ((r) - PINGROUP_REG_START) -#define PINGROUP_REG_N(r) -1 +#define PINGROUP_REG_Y(r) ((r) - PINGROUP_REG_A) +#define PINGROUP_REG_N(r) -1 #define PINGROUP(pg_name, f0, f1, f2, f3, f_safe, r, od, ior, rcv_sel) \ { \ @@ -2484,13 +1590,14 @@ static const struct tegra_function tegra114_functions[] = { .drvtype_reg = -1, \ } -#define DRV_PINGROUP_DVRTYPE_Y(r) ((r) - DRV_PINGROUP_REG_START) -#define DRV_PINGROUP_DVRTYPE_N(r) -1 +#define DRV_PINGROUP_REG_Y(r) ((r) - DRV_PINGROUP_REG_A) +#define DRV_PINGROUP_REG_N(r) -1 + #define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, \ - drvdn_b, drvdn_w, drvup_b, drvup_w, \ - slwr_b, slwr_w, slwf_b, slwf_w, \ - drvtype) \ + drvdn_b, drvdn_w, drvup_b, drvup_w, \ + slwr_b, slwr_w, slwf_b, slwf_w, \ + drvtype) \ { \ .name = "drive_" #pg_name, \ .pins = drive_##pg_name##_pins, \ @@ -2503,7 +1610,7 @@ static const struct tegra_function tegra114_functions[] = { .lock_reg = -1, \ .ioreset_reg = -1, \ .rcv_sel_reg = -1, \ - .drv_reg = DRV_PINGROUP_DVRTYPE_Y(r), \ + .drv_reg = DRV_PINGROUP_REG_Y(r), \ .drv_bank = 0, \ .hsm_bit = hsm_b, \ .schmitt_bit = schmitt_b, \ @@ -2516,14 +1623,13 @@ static const struct tegra_function tegra114_functions[] = { .slwr_width = slwr_w, \ .slwf_bit = slwf_b, \ .slwf_width = slwf_w, \ - .drvtype_reg = DRV_PINGROUP_DVRTYPE_##drvtype(r), \ + .drvtype_reg = DRV_PINGROUP_REG_##drvtype(r), \ .drvtype_bank = 0, \ .drvtype_bit = 6, \ } static const struct tegra_pingroup tegra114_groups[] = { /* pg_name, f0, f1, f2, f3, safe, r, od, ior, rcv_sel */ - /* FIXME: Fill in correct data in safe column */ PINGROUP(ulpi_data0_po1, SPI3, HSI, UARTA, ULPI, ULPI, 0x3000, N, N, N), PINGROUP(ulpi_data1_po2, SPI3, HSI, UARTA, ULPI, ULPI, 0x3004, N, N, N), PINGROUP(ulpi_data2_po3, SPI3, HSI, UARTA, ULPI, ULPI, 0x3008, N, N, N), @@ -2635,6 +1741,7 @@ static const struct tegra_pingroup tegra114_groups[] = { PINGROUP(pbb6, VGP6, DISPLAYA, DISPLAYB, RSVD4, RSVD4, 0x32a4, N, N, N), PINGROUP(pbb7, I2S4, RSVD2, RSVD3, RSVD4, RSVD4, 0x32a8, N, N, N), PINGROUP(pcc2, I2S4, RSVD2, RSVD3, RSVD4, RSVD4, 0x32ac, N, N, N), + PINGROUP(jtag_rtck, RTCK, RSVD2, RSVD3, RSVD4, RTCK, 0x32b0, N, N, N), PINGROUP(pwr_i2c_scl_pz6, I2CPWR, RSVD2, RSVD3, RSVD4, RSVD4, 0x32b4, Y, N, N), PINGROUP(pwr_i2c_sda_pz7, I2CPWR, RSVD2, RSVD3, RSVD4, RSVD4, 0x32b8, Y, N, N), PINGROUP(kb_row0_pr0, KBC, RSVD2, RSVD3, RSVD4, RSVD4, 0x32bc, N, N, N), @@ -2661,6 +1768,7 @@ static const struct tegra_pingroup tegra114_groups[] = { PINGROUP(core_pwr_req, PWRON, RSVD2, RSVD3, RSVD4, RSVD4, 0x3324, N, N, N), PINGROUP(cpu_pwr_req, CPU, RSVD2, RSVD3, RSVD4, RSVD4, 0x3328, N, N, N), PINGROUP(pwr_int_n, PMI, RSVD2, RSVD3, RSVD4, RSVD4, 0x332c, N, N, N), + PINGROUP(clk_32k_in, CLK, RSVD2, RSVD3, RSVD4, CLK, 0x3330, N, N, N), PINGROUP(owr, OWR, RSVD2, RSVD3, RSVD4, RSVD4, 0x3334, N, N, Y), PINGROUP(dap1_fs_pn0, I2S0, HDA, GMI, RSVD4, RSVD4, 0x3338, N, N, N), PINGROUP(dap1_din_pn1, I2S0, HDA, GMI, RSVD4, RSVD4, 0x333c, N, N, N), @@ -2697,38 +1805,48 @@ static const struct tegra_pingroup tegra114_groups[] = { PINGROUP(usb_vbus_en1_pn5, USB, RSVD2, RSVD3, RSVD4, RSVD4, 0x33f8, Y, N, N), PINGROUP(sdmmc3_clk_lb_in_pee5, SDMMC3, RSVD2, RSVD3, RSVD4, RSVD4, 0x33fc, N, N, N), PINGROUP(sdmmc3_clk_lb_out_pee4, SDMMC3, RSVD2, RSVD3, RSVD4, RSVD4, 0x3400, N, N, N), + PINGROUP(gmi_clk_lb, SDMMC2, NAND, GMI, RSVD4, GMI, 0x3404, N, N, N), PINGROUP(reset_out_n, RSVD1, RSVD2, RSVD3, RESET_OUT_N, RSVD3, 0x3408, N, N, N), /* pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b, drvdn_w, drvup_b, drvup_w, slwr_b, slwr_w, slwf_b, slwf_w, drvtype */ - DRV_PINGROUP(ao1, 0x868, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(ao2, 0x86c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(at1, 0x870, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, Y), - DRV_PINGROUP(at2, 0x874, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, Y), - DRV_PINGROUP(at3, 0x878, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, Y), - DRV_PINGROUP(at4, 0x87c, 2, 3, 4, 12, 7, 20, 7, 28, 2, 30, 2, Y), - DRV_PINGROUP(at5, 0x880, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(cdev1, 0x884, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(cdev2, 0x888, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(dap1, 0x890, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(dap2, 0x894, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(dap3, 0x898, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(dap4, 0x89c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(dbg, 0x8a0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(sdio3, 0x8b0, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, N), - DRV_PINGROUP(spi, 0x8b4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(uaa, 0x8b8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(uab, 0x8bc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(uart2, 0x8c0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(uart3, 0x8c4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(sdio1, 0x8ec, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, N), - DRV_PINGROUP(ddc, 0x8fc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(gma, 0x900, 2, 3, 4, 14, 5, 20, 5, 28, 2, 30, 2, Y), - DRV_PINGROUP(gme, 0x910, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(gmf, 0x914, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(gmg, 0x918, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(gmh, 0x91c, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(owr, 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), - DRV_PINGROUP(uda, 0x924, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(ao1, 0x868, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(ao2, 0x86c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(at1, 0x870, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, Y), + DRV_PINGROUP(at2, 0x874, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, Y), + DRV_PINGROUP(at3, 0x878, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, Y), + DRV_PINGROUP(at4, 0x87c, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, Y), + DRV_PINGROUP(at5, 0x880, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(cdev1, 0x884, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(cdev2, 0x888, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(dap1, 0x890, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(dap2, 0x894, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(dap3, 0x898, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(dap4, 0x89c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(dbg, 0x8a0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(sdio3, 0x8b0, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, N), + DRV_PINGROUP(spi, 0x8b4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(uaa, 0x8b8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(uab, 0x8bc, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(uart2, 0x8c0, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(uart3, 0x8c4, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(sdio1, 0x8ec, 2, 3, -1, 12, 7, 20, 7, 28, 2, 30, 2, N), + DRV_PINGROUP(ddc, 0x8fc, 2, 3, -1, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(gma, 0x900, 2, 3, -1, 14, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(gme, 0x910, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(gmf, 0x914, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(gmg, 0x918, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(gmh, 0x91c, 2, 3, 4, 14, 5, 19, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(owr, 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(uda, 0x924, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(dev3, 0x92c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(cec, 0x938, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(at6, 0x994, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, Y), + DRV_PINGROUP(dap5, 0x998, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(usb_vbus_en, 0x99c, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(ao3, 0x9a0, 2, 3, 4, 12, 5, -1, -1, 28, 2, -1, -1, N), + DRV_PINGROUP(hv0, 0x9a4, 2, 3, 4, 12, 5, -1, -1, 28, 2, -1, -1, N), + DRV_PINGROUP(sdio4, 0x9a8, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), + DRV_PINGROUP(ao0, 0x9ac, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N), }; static const struct tegra_pinctrl_soc_data tegra114_pinctrl = { |