diff options
Diffstat (limited to 'drivers/staging/brcm80211')
137 files changed, 18123 insertions, 34794 deletions
diff --git a/drivers/staging/brcm80211/Makefile b/drivers/staging/brcm80211/Makefile index e7b3f27847c..8b01f5e7ba2 100644 --- a/drivers/staging/brcm80211/Makefile +++ b/drivers/staging/brcm80211/Makefile @@ -17,8 +17,8 @@ # common flags subdir-ccflags-y := -DBCMDMA32 -subdir-ccflags-$(CONFIG_BRCMDBG) += -DBCMDBG -DBCMDBG_ASSERT +subdir-ccflags-$(CONFIG_BRCMDBG) += -DBCMDBG -obj-$(CONFIG_BRCMUTIL) += util/ +obj-$(CONFIG_BRCMUTIL) += brcmutil/ obj-$(CONFIG_BRCMFMAC) += brcmfmac/ obj-$(CONFIG_BRCMSMAC) += brcmsmac/ diff --git a/drivers/staging/brcm80211/README b/drivers/staging/brcm80211/README index 8ad558675bd..bb86b1b3e58 100644 --- a/drivers/staging/brcm80211/README +++ b/drivers/staging/brcm80211/README @@ -1,64 +1 @@ -Broadcom brcmsmac (mac80211-based softmac PCIe) and brcmfmac (SDIO) drivers. - -Completely open source host drivers, no binary object files. - -Support for the following chips: -=============================== - - brcmsmac (PCIe) - Name Device ID - BCM4313 0x4727 - BCM43224 0x4353 - BCM43225 0x4357 - - brcmfmac (SDIO) - Name - BCM4329 - -Both brcmsmac and brcmfmac drivers require firmware files that need to be -separately downloaded. - -Firmware -====================== -Firmware is available from the Linux firmware repository at: - - git://git.kernel.org/pub/scm/linux/kernel/git/dwmw2/linux-firmware.git - http://git.kernel.org/?p=linux/kernel/git/dwmw2/linux-firmware.git - https://git.kernel.org/?p=linux/kernel/git/dwmw2/linux-firmware.git - - -=============================================================== -Broadcom brcmsmac driver -=============================================================== -- Support for both 32 and 64 bit Linux kernels - - -Firmware installation -====================== -Copy brcm/bcm43xx-0.fw and brcm/bcm43xx_hdr-0.fw to -/lib/firmware/brcm (or wherever firmware is normally installed -on your system). - - -=============================================================== -Broadcom brcmfmac driver -=============================================================== -- Support for 32 bit Linux kernel, 64 bit untested - - -Firmware installation -====================== -Copy brcm/bcm4329-fullmac-4.bin and brcm/bcm4329-fullmac-4.txt -to /lib/firmware/brcm (or wherever firmware is normally installed on your -system). - - -Contact Info: -============= -Brett Rudley brudley@broadcom.com -Henry Ptasinski henryp@broadcom.com -Dowan Kim dowan@broadcom.com -Roland Vossen rvossen@broadcom.com -Arend van Spriel arend@broadcom.com - -For more info, refer to: http://linuxwireless.org/en/users/Drivers/brcm80211 +refer to: http://linuxwireless.org/en/users/Drivers/brcm80211 diff --git a/drivers/staging/brcm80211/TODO b/drivers/staging/brcm80211/TODO index e9c1393a2b9..e2e2ef9bd7a 100644 --- a/drivers/staging/brcm80211/TODO +++ b/drivers/staging/brcm80211/TODO @@ -2,14 +2,12 @@ To Do List for Broadcom Mac80211 driver before getting in mainline Bugs ==== -- Oops on AMPDU traffic, to be solved by new ucode (currently under test) +- none known at this moment -brcmfmac and brcmsmac +brcmfmac ===================== -- ASSERTS not allowed in mainline, replace by warning + error handling -- Replace printk and WL_ERROR() with proper routines +- ASSERTS deprecated in mainline, replace by warning + error handling -brcmfmac +brcm80211 info page ===================== -- Replace driver's proprietary ssb interface with generic kernel ssb module -- Build and test on 64 bit linux kernel +http://linuxwireless.org/en/users/Drivers/brcm80211 diff --git a/drivers/staging/brcm80211/brcmfmac/Makefile b/drivers/staging/brcm80211/brcmfmac/Makefile index c5ec562c364..da3c8057590 100644 --- a/drivers/staging/brcm80211/brcmfmac/Makefile +++ b/drivers/staging/brcm80211/brcmfmac/Makefile @@ -16,23 +16,11 @@ # CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ccflags-y := \ - -DARP_OFFLOAD_SUPPORT \ - -DBCMLXSDMMC \ - -DBCMPLATFORM_BUS \ - -DBCMSDIO \ - -DBDC \ - -DBRCM_FULLMAC \ - -DDHD_FIRSTREAD=64 \ - -DDHD_SCHED \ - -DDHD_SDALIGN=64 \ - -DEMBEDDED_PLATFORM \ - -DMAX_HDR_READ=64 \ - -DMMC_SDIO_ABORT \ - -DPKT_FILTER_SUPPORT \ - -DSHOW_EVENTS \ - -DTOE + -DBRCMF_FIRSTREAD=64 \ + -DBRCMF_SDALIGN=64 \ + -DMAX_HDR_READ=64 -ccflags-$(CONFIG_BRCMDBG) += -DDHD_DEBUG +ccflags-$(CONFIG_BRCMDBG) += -DSHOW_EVENTS ccflags-y += \ -Idrivers/staging/brcm80211/brcmfmac \ @@ -40,17 +28,12 @@ ccflags-y += \ DHDOFILES = \ wl_cfg80211.o \ - wl_iw.o \ dhd_cdc.o \ dhd_common.o \ - dhd_custom_gpio.o \ dhd_sdio.o \ dhd_linux.o \ - dhd_linux_sched.o \ bcmsdh.o \ - bcmsdh_linux.o \ - bcmsdh_sdmmc.o \ - bcmsdh_sdmmc_linux.o + bcmsdh_sdmmc.o obj-$(CONFIG_BRCMFMAC) += brcmfmac.o brcmfmac-objs += $(DHDOFILES) diff --git a/drivers/staging/brcm80211/brcmfmac/README b/drivers/staging/brcm80211/brcmfmac/README deleted file mode 100644 index 139597f9cb0..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/README +++ /dev/null @@ -1,2 +0,0 @@ - - diff --git a/drivers/staging/brcm80211/brcmfmac/aiutils.c b/drivers/staging/brcm80211/brcmfmac/aiutils.c deleted file mode 100644 index e64808648ce..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/aiutils.c +++ /dev/null @@ -1 +0,0 @@ -#include "../util/aiutils.c" diff --git a/drivers/staging/brcm80211/brcmfmac/bcmcdc.h b/drivers/staging/brcm80211/brcmfmac/bcmcdc.h deleted file mode 100644 index ed4c4a517ec..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/bcmcdc.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include <linux/if_ether.h> - -typedef struct cdc_ioctl { - u32 cmd; /* ioctl command value */ - u32 len; /* lower 16: output buflen; upper 16: - input buflen (excludes header) */ - u32 flags; /* flag defns given below */ - u32 status; /* status code returned from the device */ -} cdc_ioctl_t; - -/* Max valid buffer size that can be sent to the dongle */ -#define CDC_MAX_MSG_SIZE (ETH_FRAME_LEN+ETH_FCS_LEN) - -/* len field is divided into input and output buffer lengths */ -#define CDCL_IOC_OUTLEN_MASK 0x0000FFFF /* maximum or expected - response length, */ - /* excluding IOCTL header */ -#define CDCL_IOC_OUTLEN_SHIFT 0 -#define CDCL_IOC_INLEN_MASK 0xFFFF0000 /* input buffer length, - excluding IOCTL header */ -#define CDCL_IOC_INLEN_SHIFT 16 - -/* CDC flag definitions */ -#define CDCF_IOC_ERROR 0x01 /* 0=success, 1=ioctl cmd failed */ -#define CDCF_IOC_SET 0x02 /* 0=get, 1=set cmd */ -#define CDCF_IOC_IF_MASK 0xF000 /* I/F index */ -#define CDCF_IOC_IF_SHIFT 12 -#define CDCF_IOC_ID_MASK 0xFFFF0000 /* used to uniquely id an ioctl - req/resp pairing */ -#define CDCF_IOC_ID_SHIFT 16 /* # of bits of shift for ID Mask */ - -#define CDC_IOC_IF_IDX(flags) \ - (((flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT) -#define CDC_IOC_ID(flags) \ - (((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT) - -#define CDC_GET_IF_IDX(hdr) \ - ((int)((((hdr)->flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT)) -#define CDC_SET_IF_IDX(hdr, idx) \ - ((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | \ - ((idx) << CDCF_IOC_IF_SHIFT))) - -/* - * BDC header - * - * The BDC header is used on data packets to convey priority across USB. - */ - -#define BDC_HEADER_LEN 4 - -#define BDC_PROTO_VER 1 /* Protocol version */ - -#define BDC_FLAG_VER_MASK 0xf0 /* Protocol version mask */ -#define BDC_FLAG_VER_SHIFT 4 /* Protocol version shift */ - -#define BDC_FLAG__UNUSED 0x03 /* Unassigned */ -#define BDC_FLAG_SUM_GOOD 0x04 /* Dongle has verified good - RX checksums */ -#define BDC_FLAG_SUM_NEEDED 0x08 /* Dongle needs to do TX checksums */ - -#define BDC_PRIORITY_MASK 0x7 - -#define BDC_FLAG2_FC_FLAG 0x10 /* flag to indicate if pkt contains */ - /* FLOW CONTROL info only */ -#define BDC_PRIORITY_FC_SHIFT 4 /* flow control info shift */ - -#define BDC_FLAG2_IF_MASK 0x0f /* APSTA: interface on which the - packet was received */ -#define BDC_FLAG2_IF_SHIFT 0 - -#define BDC_GET_IF_IDX(hdr) \ - ((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT)) -#define BDC_SET_IF_IDX(hdr, idx) \ - ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | \ - ((idx) << BDC_FLAG2_IF_SHIFT))) - -struct bdc_header { - u8 flags; /* Flags */ - u8 priority; /* 802.1d Priority 0:2 bits, 4:7 flow - control info for usb */ - u8 flags2; - u8 rssi; -}; diff --git a/drivers/staging/brcm80211/brcmfmac/bcmchip.h b/drivers/staging/brcm80211/brcmfmac/bcmchip.h index c0d4c3bf6d4..d7d3afd5a10 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmchip.h +++ b/drivers/staging/brcm80211/brcmfmac/bcmchip.h @@ -17,12 +17,6 @@ #ifndef _bcmchip_h_ #define _bcmchip_h_ -/* Core reg address translation */ -#define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field)) -#define CORE_BUS_REG(base, field) (base + offsetof(sdpcmd_regs_t, field)) -#define CORE_SB(base, field) \ - (base + SBCONFIGOFF + offsetof(sbconfig_t, field)) - /* bcm4329 */ /* SDIO device core, ID 0x829 */ #define BCM4329_CORE_BUS_BASE 0x18011000 @@ -31,5 +25,8 @@ /* ARM Cortex M3 core, ID 0x82a */ #define BCM4329_CORE_ARM_BASE 0x18002000 #define BCM4329_RAMSIZE 0x48000 +/* firmware name */ +#define BCM4329_FW_NAME "brcm/bcm4329-fullmac-4.bin" +#define BCM4329_NV_NAME "brcm/bcm4329-fullmac-4.txt" #endif /* _bcmchip_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h b/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h deleted file mode 100644 index 53c32915acc..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdbus.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _sdio_api_h_ -#define _sdio_api_h_ - -#define SDIOH_API_RC_SUCCESS (0x00) -#define SDIOH_API_RC_FAIL (0x01) -#define SDIOH_API_SUCCESS(status) (status == 0) - -#define SDIOH_READ 0 /* Read request */ -#define SDIOH_WRITE 1 /* Write request */ - -#define SDIOH_DATA_FIX 0 /* Fixed addressing */ -#define SDIOH_DATA_INC 1 /* Incremental addressing */ - -#define SDIOH_CMD_TYPE_NORMAL 0 /* Normal command */ -#define SDIOH_CMD_TYPE_APPEND 1 /* Append command */ -#define SDIOH_CMD_TYPE_CUTTHRU 2 /* Cut-through command */ - -#define SDIOH_DATA_PIO 0 /* PIO mode */ -#define SDIOH_DATA_DMA 1 /* DMA mode */ - -typedef int SDIOH_API_RC; - -/* SDio Host structure */ -typedef struct sdioh_info sdioh_info_t; - -/* callback function, taking one arg */ -typedef void (*sdioh_cb_fn_t) (void *); - -/* attach, return handler on success, NULL if failed. - * The handler shall be provided by all subsequent calls. No local cache - * cfghdl points to the starting address of pci device mapped memory - */ -extern sdioh_info_t *sdioh_attach(void *cfghdl, uint irq); -extern SDIOH_API_RC sdioh_detach(sdioh_info_t *si); -extern SDIOH_API_RC sdioh_interrupt_register(sdioh_info_t *si, - sdioh_cb_fn_t fn, void *argh); -extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *si); - -/* query whether SD interrupt is enabled or not */ -extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *si, bool *onoff); - -/* enable or disable SD interrupt */ -extern SDIOH_API_RC sdioh_interrupt_set(sdioh_info_t *si, bool enable_disable); - -#if defined(DHD_DEBUG) -extern bool sdioh_interrupt_pending(sdioh_info_t *si); -#endif - -extern int sdioh_claim_host_and_lock(sdioh_info_t *si); -extern int sdioh_release_host_and_unlock(sdioh_info_t *si); - -/* read or write one byte using cmd52 */ -extern SDIOH_API_RC sdioh_request_byte(sdioh_info_t *si, uint rw, uint fnc, - uint addr, u8 *byte); - -/* read or write 2/4 bytes using cmd53 */ -extern SDIOH_API_RC sdioh_request_word(sdioh_info_t *si, uint cmd_type, - uint rw, uint fnc, uint addr, - u32 *word, uint nbyte); - -/* read or write any buffer using cmd53 */ -extern SDIOH_API_RC sdioh_request_buffer(sdioh_info_t *si, uint pio_dma, - uint fix_inc, uint rw, uint fnc_num, - u32 addr, uint regwidth, - u32 buflen, u8 *buffer, - struct sk_buff *pkt); - -/* get cis data */ -extern SDIOH_API_RC sdioh_cis_read(sdioh_info_t *si, uint fuc, u8 *cis, - u32 length); - -extern SDIOH_API_RC sdioh_cfg_read(sdioh_info_t *si, uint fuc, u32 addr, - u8 *data); -extern SDIOH_API_RC sdioh_cfg_write(sdioh_info_t *si, uint fuc, u32 addr, - u8 *data); - -/* query number of io functions */ -extern uint sdioh_query_iofnum(sdioh_info_t *si); - -/* handle iovars */ -extern int sdioh_iovar_op(sdioh_info_t *si, const char *name, - void *params, int plen, void *arg, int len, bool set); - -/* Issue abort to the specified function and clear controller as needed */ -extern int sdioh_abort(sdioh_info_t *si, uint fnc); - -/* Start and Stop SDIO without re-enumerating the SD card. */ -extern int sdioh_start(sdioh_info_t *si, int stage); -extern int sdioh_stop(sdioh_info_t *si); - -/* Reset and re-initialize the device */ -extern int sdioh_sdio_reset(sdioh_info_t *si); - -/* Helper function */ -void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); - -#endif /* _sdio_api_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c index 3750fcf5a87..f4e72ed126b 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh.c @@ -13,29 +13,59 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -/* ****************** BCMSDH Interface Functions *************************** */ +/* ****************** SDIO CARD Interface Functions **************************/ #include <linux/types.h> #include <linux/netdevice.h> +#include <linux/pci.h> #include <linux/pci_ids.h> -#include <bcmdefs.h> -#include <bcmdevs.h> -#include <bcmutils.h> -#include <hndsoc.h> - -#include <bcmsdh.h> /* BRCM API for SDIO - clients (such as wl, dhd) */ -#include <bcmsdbus.h> /* common SDIO/controller interface */ -#include <sbsdio.h> /* BRCM sdio device core */ - -#include <sdio.h> /* sdio spec */ -#include "dngl_stats.h" +#include <linux/sched.h> +#include <linux/completion.h> + +#include <defs.h> +#include <brcm_hw_ids.h> +#include <brcmu_utils.h> +#include <brcmu_wifi.h> +#include <soc.h> #include "dhd.h" +#include "dhd_bus.h" +#include "sdio_host.h" #define SDIOH_API_ACCESS_RETRY_LIMIT 2 -const uint bcmsdh_msglevel = BCMSDH_ERROR_VAL; -struct bcmsdh_info { +#define BRCMF_SD_ERROR_VAL 0x0001 /* Error */ +#define BRCMF_SD_INFO_VAL 0x0002 /* Info */ + + +#ifdef BCMDBG +#define BRCMF_SD_ERROR(x) \ + do { \ + if ((brcmf_sdio_msglevel & BRCMF_SD_ERROR_VAL) && \ + net_ratelimit()) \ + printk x; \ + } while (0) +#define BRCMF_SD_INFO(x) \ + do { \ + if ((brcmf_sdio_msglevel & BRCMF_SD_INFO_VAL) && \ + net_ratelimit()) \ + printk x; \ + } while (0) +#else /* BCMDBG */ +#define BRCMF_SD_ERROR(x) +#define BRCMF_SD_INFO(x) +#endif /* BCMDBG */ + +/* debugging macros */ +#define SDLX_MSG(x) + +#define SDIOH_CMD_TYPE_NORMAL 0 /* Normal command */ +#define SDIOH_CMD_TYPE_APPEND 1 /* Append command */ +#define SDIOH_CMD_TYPE_CUTTHRU 2 /* Cut-through command */ + +#define SDIOH_DATA_PIO 0 /* PIO mode */ +#define SDIOH_DATA_DMA 1 /* DMA mode */ + +struct brcmf_sdio_card { bool init_success; /* underlying driver successfully attached */ void *sdioh; /* handler for sdioh */ u32 vendevid; /* Target Vendor and Device ID on SD bus */ @@ -43,282 +73,232 @@ struct bcmsdh_info { reg_read/reg_write call */ u32 sbwad; /* Save backplane window address */ }; + +/** + * SDIO Host Controller info + */ +struct sdio_hc { + struct sdio_hc *next; + struct device *dev; /* platform device handle */ + void *regs; /* SDIO Host Controller address */ + struct brcmf_sdio_card *card; + void *ch; + unsigned int oob_irq; + unsigned long oob_flags; /* OOB Host specifiction + as edge and etc */ + bool oob_irq_registered; +}; + /* local copy of bcm sd handler */ -bcmsdh_info_t *l_bcmsdh; +static struct brcmf_sdio_card *l_card; -#if defined(OOB_INTR_ONLY) && defined(HW_OOB) -extern int sdioh_enable_hw_oob_intr(void *sdioh, bool enable); +const uint brcmf_sdio_msglevel = BRCMF_SD_ERROR_VAL; -void bcmsdh_enable_hw_oob_intr(bcmsdh_info_t *sdh, bool enable) -{ - sdioh_enable_hw_oob_intr(sdh->sdioh, enable); -} -#endif +static struct sdio_hc *sdhcinfo; + +/* driver info, initialized when brcmf_sdio_register is called */ +static struct brcmf_sdioh_driver drvinfo = { NULL, NULL }; + +/* Module parameters specific to each host-controller driver */ + +module_param(sd_msglevel, uint, 0); -bcmsdh_info_t *bcmsdh_attach(void *cfghdl, void **regsva, uint irq) +extern uint sd_f2_blocksize; +module_param(sd_f2_blocksize, int, 0); + +/* forward declarations */ +int brcmf_sdio_probe(struct device *dev); +EXPORT_SYMBOL(brcmf_sdio_probe); + +int brcmf_sdio_remove(struct device *dev); +EXPORT_SYMBOL(brcmf_sdio_remove); + +struct brcmf_sdio_card* +brcmf_sdcard_attach(void *cfghdl, u32 *regsva, uint irq) { - bcmsdh_info_t *bcmsdh; + struct brcmf_sdio_card *card; - bcmsdh = kzalloc(sizeof(bcmsdh_info_t), GFP_ATOMIC); - if (bcmsdh == NULL) { - BCMSDH_ERROR(("bcmsdh_attach: out of memory")); + card = kzalloc(sizeof(struct brcmf_sdio_card), GFP_ATOMIC); + if (card == NULL) { + BRCMF_SD_ERROR(("sdcard_attach: out of memory")); return NULL; } /* save the handler locally */ - l_bcmsdh = bcmsdh; + l_card = card; - bcmsdh->sdioh = sdioh_attach(cfghdl, irq); - if (!bcmsdh->sdioh) { - bcmsdh_detach(bcmsdh); + card->sdioh = brcmf_sdioh_attach(cfghdl, irq); + if (!card->sdioh) { + brcmf_sdcard_detach(card); return NULL; } - bcmsdh->init_success = true; + card->init_success = true; - *regsva = (u32 *) SI_ENUM_BASE; + *regsva = SI_ENUM_BASE; /* Report the BAR, to fix if needed */ - bcmsdh->sbwad = SI_ENUM_BASE; - return bcmsdh; + card->sbwad = SI_ENUM_BASE; + return card; } -int bcmsdh_detach(void *sdh) +int brcmf_sdcard_detach(struct brcmf_sdio_card *card) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - - if (bcmsdh != NULL) { - if (bcmsdh->sdioh) { - sdioh_detach(bcmsdh->sdioh); - bcmsdh->sdioh = NULL; + if (card != NULL) { + if (card->sdioh) { + brcmf_sdioh_detach(card->sdioh); + card->sdioh = NULL; } - kfree(bcmsdh); + kfree(card); } - l_bcmsdh = NULL; + l_card = NULL; return 0; } int -bcmsdh_iovar_op(void *sdh, const char *name, +brcmf_sdcard_iovar_op(struct brcmf_sdio_card *card, const char *name, void *params, int plen, void *arg, int len, bool set) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - return sdioh_iovar_op(bcmsdh->sdioh, name, params, plen, arg, len, set); -} - -bool bcmsdh_intr_query(void *sdh) -{ - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; - bool on; - - ASSERT(bcmsdh); - status = sdioh_interrupt_query(bcmsdh->sdioh, &on); - if (SDIOH_API_SUCCESS(status)) - return false; - else - return on; -} - -int bcmsdh_intr_enable(void *sdh) -{ - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; - ASSERT(bcmsdh); - - status = sdioh_interrupt_set(bcmsdh->sdioh, true); - return SDIOH_API_SUCCESS(status) ? 0 : -EIO; + return brcmf_sdioh_iovar_op(card->sdioh, name, params, plen, arg, + len, set); } -int bcmsdh_intr_disable(void *sdh) +int brcmf_sdcard_intr_enable(struct brcmf_sdio_card *card) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; - ASSERT(bcmsdh); - - status = sdioh_interrupt_set(bcmsdh->sdioh, false); - return SDIOH_API_SUCCESS(status) ? 0 : -EIO; + return brcmf_sdioh_interrupt_set(card->sdioh, true); } -int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh) +int brcmf_sdcard_intr_disable(struct brcmf_sdio_card *card) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; - ASSERT(bcmsdh); - - status = sdioh_interrupt_register(bcmsdh->sdioh, fn, argh); - return SDIOH_API_SUCCESS(status) ? 0 : -EIO; + return brcmf_sdioh_interrupt_set(card->sdioh, false); } -int bcmsdh_intr_dereg(void *sdh) +int brcmf_sdcard_intr_reg(struct brcmf_sdio_card *card, + void (*fn)(void *), void *argh) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; - ASSERT(bcmsdh); - - status = sdioh_interrupt_deregister(bcmsdh->sdioh); - return SDIOH_API_SUCCESS(status) ? 0 : -EIO; + return brcmf_sdioh_interrupt_register(card->sdioh, fn, argh); } -#if defined(DHD_DEBUG) -bool bcmsdh_intr_pending(void *sdh) +int brcmf_sdcard_intr_dereg(struct brcmf_sdio_card *card) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - - ASSERT(sdh); - return sdioh_interrupt_pending(bcmsdh->sdioh); + return brcmf_sdioh_interrupt_deregister(card->sdioh); } -#endif -int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh) +u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_card *card, uint fnc_num, u32 addr, + int *err) { - ASSERT(sdh); - - /* don't support yet */ - return -ENOTSUPP; -} - -u8 bcmsdh_cfg_read(void *sdh, uint fnc_num, u32 addr, int *err) -{ - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; -#ifdef SDIOH_API_ACCESS_RETRY_LIMIT + int status; s32 retry = 0; -#endif u8 data = 0; - if (!bcmsdh) - bcmsdh = l_bcmsdh; - - ASSERT(bcmsdh->init_success); + if (!card) + card = l_card; -#ifdef SDIOH_API_ACCESS_RETRY_LIMIT do { if (retry) /* wait for 1 ms till bus get settled down */ udelay(1000); -#endif status = - sdioh_cfg_read(bcmsdh->sdioh, fnc_num, addr, + brcmf_sdioh_cfg_read(card->sdioh, fnc_num, addr, (u8 *) &data); -#ifdef SDIOH_API_ACCESS_RETRY_LIMIT - } while (!SDIOH_API_SUCCESS(status) + } while (status != 0 && (retry++ < SDIOH_API_ACCESS_RETRY_LIMIT)); -#endif if (err) - *err = (SDIOH_API_SUCCESS(status) ? 0 : -EIO); + *err = status; - BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, u8data = 0x%x\n", + BRCMF_SD_INFO(("%s:fun = %d, addr = 0x%x, u8data = 0x%x\n", __func__, fnc_num, addr, data)); return data; } void -bcmsdh_cfg_write(void *sdh, uint fnc_num, u32 addr, u8 data, int *err) +brcmf_sdcard_cfg_write(struct brcmf_sdio_card *card, uint fnc_num, u32 addr, + u8 data, int *err) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; -#ifdef SDIOH_API_ACCESS_RETRY_LIMIT + int status; s32 retry = 0; -#endif - if (!bcmsdh) - bcmsdh = l_bcmsdh; + if (!card) + card = l_card; - ASSERT(bcmsdh->init_success); - -#ifdef SDIOH_API_ACCESS_RETRY_LIMIT do { if (retry) /* wait for 1 ms till bus get settled down */ udelay(1000); -#endif status = - sdioh_cfg_write(bcmsdh->sdioh, fnc_num, addr, + brcmf_sdioh_cfg_write(card->sdioh, fnc_num, addr, (u8 *) &data); -#ifdef SDIOH_API_ACCESS_RETRY_LIMIT - } while (!SDIOH_API_SUCCESS(status) + } while (status != 0 && (retry++ < SDIOH_API_ACCESS_RETRY_LIMIT)); -#endif if (err) - *err = SDIOH_API_SUCCESS(status) ? 0 : -EIO; + *err = status; - BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, u8data = 0x%x\n", + BRCMF_SD_INFO(("%s:fun = %d, addr = 0x%x, u8data = 0x%x\n", __func__, fnc_num, addr, data)); } -u32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, u32 addr, int *err) +u32 brcmf_sdcard_cfg_read_word(struct brcmf_sdio_card *card, uint fnc_num, + u32 addr, int *err) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; + int status; u32 data = 0; - if (!bcmsdh) - bcmsdh = l_bcmsdh; - - ASSERT(bcmsdh->init_success); + if (!card) + card = l_card; - status = - sdioh_request_word(bcmsdh->sdioh, SDIOH_CMD_TYPE_NORMAL, SDIOH_READ, - fnc_num, addr, &data, 4); + status = brcmf_sdioh_request_word(card->sdioh, SDIOH_CMD_TYPE_NORMAL, + SDIOH_READ, fnc_num, addr, &data, 4); if (err) - *err = (SDIOH_API_SUCCESS(status) ? 0 : -EIO); + *err = status; - BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, u32data = 0x%x\n", + BRCMF_SD_INFO(("%s:fun = %d, addr = 0x%x, u32data = 0x%x\n", __func__, fnc_num, addr, data)); return data; } void -bcmsdh_cfg_write_word(void *sdh, uint fnc_num, u32 addr, u32 data, - int *err) +brcmf_sdcard_cfg_write_word(struct brcmf_sdio_card *card, uint fnc_num, + u32 addr, u32 data, int *err) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; - - if (!bcmsdh) - bcmsdh = l_bcmsdh; + int status; - ASSERT(bcmsdh->init_success); + if (!card) + card = l_card; status = - sdioh_request_word(bcmsdh->sdioh, SDIOH_CMD_TYPE_NORMAL, + brcmf_sdioh_request_word(card->sdioh, SDIOH_CMD_TYPE_NORMAL, SDIOH_WRITE, fnc_num, addr, &data, 4); if (err) - *err = (SDIOH_API_SUCCESS(status) ? 0 : -EIO); + *err = status; - BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, u32data = 0x%x\n", + BRCMF_SD_INFO(("%s:fun = %d, addr = 0x%x, u32data = 0x%x\n", __func__, fnc_num, addr, data)); } -int bcmsdh_cis_read(void *sdh, uint func, u8 * cis, uint length) +int brcmf_sdcard_cis_read(struct brcmf_sdio_card *card, uint func, u8 * cis, + uint length) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; + int status; u8 *tmp_buf, *tmp_ptr; u8 *ptr; bool ascii = func & ~0xf; func &= 0x7; - if (!bcmsdh) - bcmsdh = l_bcmsdh; + if (!card) + card = l_card; - ASSERT(bcmsdh->init_success); - ASSERT(cis); - ASSERT(length <= SBSDIO_CIS_SIZE_LIMIT); - - status = sdioh_cis_read(bcmsdh->sdioh, func, cis, length); + status = brcmf_sdioh_cis_read(card->sdioh, func, cis, length); if (ascii) { /* Move binary bits to tmp and format them into the provided buffer. */ tmp_buf = kmalloc(length, GFP_ATOMIC); if (tmp_buf == NULL) { - BCMSDH_ERROR(("%s: out of memory\n", __func__)); + BRCMF_SD_ERROR(("%s: out of memory\n", __func__)); return -ENOMEM; } memcpy(tmp_buf, cis, length); @@ -331,60 +311,60 @@ int bcmsdh_cis_read(void *sdh, uint func, u8 * cis, uint length) kfree(tmp_buf); } - return SDIOH_API_SUCCESS(status) ? 0 : -EIO; + return status; } -static int bcmsdhsdio_set_sbaddr_window(void *sdh, u32 address) +static int +brcmf_sdcard_set_sbaddr_window(struct brcmf_sdio_card *card, u32 address) { int err = 0; - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - bcmsdh_cfg_write(bcmsdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW, + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW, (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err); if (!err) - bcmsdh_cfg_write(bcmsdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRMID, - (address >> 16) & SBSDIO_SBADDRMID_MASK, &err); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_FUNC1_SBADDRMID, + (address >> 16) & SBSDIO_SBADDRMID_MASK, + &err); if (!err) - bcmsdh_cfg_write(bcmsdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRHIGH, - (address >> 24) & SBSDIO_SBADDRHIGH_MASK, - &err); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_FUNC1_SBADDRHIGH, + (address >> 24) & SBSDIO_SBADDRHIGH_MASK, + &err); return err; } -u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size) +u32 brcmf_sdcard_reg_read(struct brcmf_sdio_card *card, u32 addr, uint size) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; + int status; u32 word = 0; uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK; - BCMSDH_INFO(("%s:fun = 1, addr = 0x%x, ", __func__, addr)); - - if (!bcmsdh) - bcmsdh = l_bcmsdh; + BRCMF_SD_INFO(("%s:fun = 1, addr = 0x%x, ", __func__, addr)); - ASSERT(bcmsdh->init_success); + if (!card) + card = l_card; - if (bar0 != bcmsdh->sbwad) { - if (bcmsdhsdio_set_sbaddr_window(bcmsdh, bar0)) + if (bar0 != card->sbwad) { + if (brcmf_sdcard_set_sbaddr_window(card, bar0)) return 0xFFFFFFFF; - bcmsdh->sbwad = bar0; + card->sbwad = bar0; } addr &= SBSDIO_SB_OFT_ADDR_MASK; if (size == 4) addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; - status = sdioh_request_word(bcmsdh->sdioh, SDIOH_CMD_TYPE_NORMAL, + status = brcmf_sdioh_request_word(card->sdioh, SDIOH_CMD_TYPE_NORMAL, SDIOH_READ, SDIO_FUNC_1, addr, &word, size); - bcmsdh->regfail = !(SDIOH_API_SUCCESS(status)); + card->regfail = (status != 0); - BCMSDH_INFO(("u32data = 0x%x\n", word)); + BRCMF_SD_INFO(("u32data = 0x%x\n", word)); /* if ok, return appropriately masked word */ - if (SDIOH_API_SUCCESS(status)) { + if (status == 0) { switch (size) { case sizeof(u8): return word & 0xff; @@ -393,90 +373,86 @@ u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size) case sizeof(u32): return word; default: - bcmsdh->regfail = true; + card->regfail = true; } } /* otherwise, bad sdio access or invalid size */ - BCMSDH_ERROR(("%s: error reading addr 0x%04x size %d\n", __func__, + BRCMF_SD_ERROR(("%s: error reading addr 0x%04x size %d\n", __func__, addr, size)); return 0xFFFFFFFF; } -u32 bcmsdh_reg_write(void *sdh, u32 addr, uint size, u32 data) +u32 brcmf_sdcard_reg_write(struct brcmf_sdio_card *card, u32 addr, uint size, + u32 data) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; + int status; uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK; int err = 0; - BCMSDH_INFO(("%s:fun = 1, addr = 0x%x, uint%ddata = 0x%x\n", + BRCMF_SD_INFO(("%s:fun = 1, addr = 0x%x, uint%ddata = 0x%x\n", __func__, addr, size * 8, data)); - if (!bcmsdh) - bcmsdh = l_bcmsdh; - - ASSERT(bcmsdh->init_success); + if (!card) + card = l_card; - if (bar0 != bcmsdh->sbwad) { - err = bcmsdhsdio_set_sbaddr_window(bcmsdh, bar0); + if (bar0 != card->sbwad) { + err = brcmf_sdcard_set_sbaddr_window(card, bar0); if (err) return err; - bcmsdh->sbwad = bar0; + card->sbwad = bar0; } addr &= SBSDIO_SB_OFT_ADDR_MASK; if (size == 4) addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; status = - sdioh_request_word(bcmsdh->sdioh, SDIOH_CMD_TYPE_NORMAL, + brcmf_sdioh_request_word(card->sdioh, SDIOH_CMD_TYPE_NORMAL, SDIOH_WRITE, SDIO_FUNC_1, addr, &data, size); - bcmsdh->regfail = !(SDIOH_API_SUCCESS(status)); + card->regfail = (status != 0); - if (SDIOH_API_SUCCESS(status)) + if (status == 0) return 0; - BCMSDH_ERROR(("%s: error writing 0x%08x to addr 0x%04x size %d\n", + BRCMF_SD_ERROR(("%s: error writing 0x%08x to addr 0x%04x size %d\n", __func__, data, addr, size)); return 0xFFFFFFFF; } -bool bcmsdh_regfail(void *sdh) +bool brcmf_sdcard_regfail(struct brcmf_sdio_card *card) { - return ((bcmsdh_info_t *) sdh)->regfail; + return card->regfail; } int -bcmsdh_recv_buf(void *sdh, u32 addr, uint fn, uint flags, - u8 *buf, uint nbytes, struct sk_buff *pkt, - bcmsdh_cmplt_fn_t complete, void *handle) -{ - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; +brcmf_sdcard_recv_buf(struct brcmf_sdio_card *card, u32 addr, uint fn, + uint flags, + u8 *buf, uint nbytes, struct sk_buff *pkt, + void (*complete)(void *handle, int status, + bool sync_waiting), + void *handle) +{ + int status; uint incr_fix; uint width; uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK; int err = 0; - ASSERT(bcmsdh); - ASSERT(bcmsdh->init_success); - - BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, size = %d\n", + BRCMF_SD_INFO(("%s:fun = %d, addr = 0x%x, size = %d\n", __func__, fn, addr, nbytes)); /* Async not implemented yet */ - ASSERT(!(flags & SDIO_REQ_ASYNC)); if (flags & SDIO_REQ_ASYNC) return -ENOTSUPP; - if (bar0 != bcmsdh->sbwad) { - err = bcmsdhsdio_set_sbaddr_window(bcmsdh, bar0); + if (bar0 != card->sbwad) { + err = brcmf_sdcard_set_sbaddr_window(card, bar0); if (err) return err; - bcmsdh->sbwad = bar0; + card->sbwad = bar0; } addr &= SBSDIO_SB_OFT_ADDR_MASK; @@ -486,42 +462,37 @@ bcmsdh_recv_buf(void *sdh, u32 addr, uint fn, uint flags, if (width == 4) addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; - status = sdioh_request_buffer(bcmsdh->sdioh, SDIOH_DATA_PIO, incr_fix, - SDIOH_READ, fn, addr, width, nbytes, buf, - pkt); + status = brcmf_sdioh_request_buffer(card->sdioh, SDIOH_DATA_PIO, + incr_fix, SDIOH_READ, fn, addr, width, nbytes, buf, pkt); - return SDIOH_API_SUCCESS(status) ? 0 : -EIO; + return status; } int -bcmsdh_send_buf(void *sdh, u32 addr, uint fn, uint flags, - u8 *buf, uint nbytes, void *pkt, - bcmsdh_cmplt_fn_t complete, void *handle) +brcmf_sdcard_send_buf(struct brcmf_sdio_card *card, u32 addr, uint fn, + uint flags, u8 *buf, uint nbytes, void *pkt, + void (*complete)(void *handle, int status, + bool sync_waiting), + void *handle) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; uint incr_fix; uint width; uint bar0 = addr & ~SBSDIO_SB_OFT_ADDR_MASK; int err = 0; - ASSERT(bcmsdh); - ASSERT(bcmsdh->init_success); - - BCMSDH_INFO(("%s:fun = %d, addr = 0x%x, size = %d\n", + BRCMF_SD_INFO(("%s:fun = %d, addr = 0x%x, size = %d\n", __func__, fn, addr, nbytes)); /* Async not implemented yet */ - ASSERT(!(flags & SDIO_REQ_ASYNC)); if (flags & SDIO_REQ_ASYNC) return -ENOTSUPP; - if (bar0 != bcmsdh->sbwad) { - err = bcmsdhsdio_set_sbaddr_window(bcmsdh, bar0); + if (bar0 != card->sbwad) { + err = brcmf_sdcard_set_sbaddr_window(card, bar0); if (err) return err; - bcmsdh->sbwad = bar0; + card->sbwad = bar0; } addr &= SBSDIO_SB_OFT_ADDR_MASK; @@ -531,101 +502,141 @@ bcmsdh_send_buf(void *sdh, u32 addr, uint fn, uint flags, if (width == 4) addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; - status = sdioh_request_buffer(bcmsdh->sdioh, SDIOH_DATA_PIO, incr_fix, - SDIOH_WRITE, fn, addr, width, nbytes, buf, - pkt); - - return SDIOH_API_SUCCESS(status) ? 0 : -EIO; + return brcmf_sdioh_request_buffer(card->sdioh, SDIOH_DATA_PIO, + incr_fix, SDIOH_WRITE, fn, addr, width, nbytes, buf, pkt); } -int bcmsdh_rwdata(void *sdh, uint rw, u32 addr, u8 *buf, uint nbytes) +int brcmf_sdcard_rwdata(struct brcmf_sdio_card *card, uint rw, u32 addr, + u8 *buf, uint nbytes) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - SDIOH_API_RC status; - - ASSERT(bcmsdh); - ASSERT(bcmsdh->init_success); - ASSERT((addr & SBSDIO_SBWINDOW_MASK) == 0); - addr &= SBSDIO_SB_OFT_ADDR_MASK; addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; - status = - sdioh_request_buffer(bcmsdh->sdioh, SDIOH_DATA_PIO, SDIOH_DATA_INC, - (rw ? SDIOH_WRITE : SDIOH_READ), SDIO_FUNC_1, - addr, 4, nbytes, buf, NULL); - - return SDIOH_API_SUCCESS(status) ? 0 : -EIO; + return brcmf_sdioh_request_buffer(card->sdioh, SDIOH_DATA_PIO, + SDIOH_DATA_INC, (rw ? SDIOH_WRITE : SDIOH_READ), SDIO_FUNC_1, + addr, 4, nbytes, buf, NULL); } -int bcmsdh_abort(void *sdh, uint fn) +int brcmf_sdcard_abort(struct brcmf_sdio_card *card, uint fn) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - - return sdioh_abort(bcmsdh->sdioh, fn); + return brcmf_sdioh_abort(card->sdioh, fn); } -int bcmsdh_start(void *sdh, int stage) +int brcmf_sdcard_query_device(struct brcmf_sdio_card *card) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - - return sdioh_start(bcmsdh->sdioh, stage); + card->vendevid = (PCI_VENDOR_ID_BROADCOM << 16) | 0; + return card->vendevid; } -int bcmsdh_stop(void *sdh) +u32 brcmf_sdcard_cur_sbwad(struct brcmf_sdio_card *card) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; + if (!card) + card = l_card; - return sdioh_stop(bcmsdh->sdioh); + return card->sbwad; } -int bcmsdh_query_device(void *sdh) +int brcmf_sdio_probe(struct device *dev) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; - bcmsdh->vendevid = (PCI_VENDOR_ID_BROADCOM << 16) | 0; - return bcmsdh->vendevid; -} + struct sdio_hc *sdhc = NULL; + u32 regs = 0; + struct brcmf_sdio_card *card = NULL; + int irq = 0; + u32 vendevid; + unsigned long irq_flags = 0; -uint bcmsdh_query_iofnum(void *sdh) -{ - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; + /* allocate SDIO Host Controller state info */ + sdhc = kzalloc(sizeof(struct sdio_hc), GFP_ATOMIC); + if (!sdhc) { + SDLX_MSG(("%s: out of memory\n", __func__)); + goto err; + } + sdhc->dev = (void *)dev; - if (!bcmsdh) - bcmsdh = l_bcmsdh; + card = brcmf_sdcard_attach((void *)0, ®s, irq); + if (!card) { + SDLX_MSG(("%s: attach failed\n", __func__)); + goto err; + } - return sdioh_query_iofnum(bcmsdh->sdioh); -} + sdhc->card = card; + sdhc->oob_irq = irq; + sdhc->oob_flags = irq_flags; + sdhc->oob_irq_registered = false; /* to make sure.. */ + + /* chain SDIO Host Controller info together */ + sdhc->next = sdhcinfo; + sdhcinfo = sdhc; + /* Read the vendor/device ID from the CIS */ + vendevid = brcmf_sdcard_query_device(card); + + /* try to attach to the target device */ + sdhc->ch = drvinfo.attach((vendevid >> 16), (vendevid & 0xFFFF), + 0, 0, 0, 0, regs, card); + if (!sdhc->ch) { + SDLX_MSG(("%s: device attach failed\n", __func__)); + goto err; + } -int bcmsdh_reset(bcmsdh_info_t *sdh) -{ - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; + return 0; - return sdioh_sdio_reset(bcmsdh->sdioh); -} + /* error handling */ +err: + if (sdhc) { + if (sdhc->card) + brcmf_sdcard_detach(sdhc->card); + kfree(sdhc); + } -void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh) -{ - ASSERT(sdh); - return sdh->sdioh; + return -ENODEV; } -/* Function to pass device-status bits to DHD. */ -u32 bcmsdh_get_dstatus(void *sdh) +int brcmf_sdio_remove(struct device *dev) { + struct sdio_hc *sdhc, *prev; + + sdhc = sdhcinfo; + drvinfo.detach(sdhc->ch); + brcmf_sdcard_detach(sdhc->card); + /* find the SDIO Host Controller state for this pdev + and take it out from the list */ + for (sdhc = sdhcinfo, prev = NULL; sdhc; sdhc = sdhc->next) { + if (sdhc->dev == (void *)dev) { + if (prev) + prev->next = sdhc->next; + else + sdhcinfo = NULL; + break; + } + prev = sdhc; + } + if (!sdhc) { + SDLX_MSG(("%s: failed\n", __func__)); + return 0; + } + + /* release SDIO Host Controller info */ + kfree(sdhc); return 0; } -u32 bcmsdh_cur_sbwad(void *sdh) +int brcmf_sdio_register(struct brcmf_sdioh_driver *driver) { - bcmsdh_info_t *bcmsdh = (bcmsdh_info_t *) sdh; + drvinfo = *driver; - if (!bcmsdh) - bcmsdh = l_bcmsdh; + SDLX_MSG(("Linux Kernel SDIO/MMC Driver\n")); + return brcmf_sdio_function_init(); +} - return bcmsdh->sbwad; +void brcmf_sdio_unregister(void) +{ + brcmf_sdio_function_cleanup(); } -void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev) +void brcmf_sdio_wdtmr_enable(bool enable) { - return; + if (enable) + brcmf_sdbrcm_wd_timer(sdhcinfo->ch, brcmf_watchdog_ms); + else + brcmf_sdbrcm_wd_timer(sdhcinfo->ch, 0); } diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c deleted file mode 100644 index 465f623760f..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_linux.c +++ /dev/null @@ -1,386 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -/** - * @file bcmsdh_linux.c - */ - -#define __UNDEF_NO_VERSION__ - -#include <linux/netdevice.h> -#include <linux/pci.h> -#include <linux/completion.h> - -#include <pcicfg.h> -#include <bcmdefs.h> -#include <bcmdevs.h> -#include <bcmutils.h> - -#if defined(OOB_INTR_ONLY) -#include <linux/irq.h> -extern void dhdsdio_isr(void *args); -#include <dngl_stats.h> -#include <dhd.h> -#endif /* defined(OOB_INTR_ONLY) */ -#if defined(CONFIG_MACH_SANDGATE2G) || defined(CONFIG_MACH_LOGICPD_PXA270) -#if !defined(BCMPLATFORM_BUS) -#define BCMPLATFORM_BUS -#endif /* !defined(BCMPLATFORM_BUS) */ - -#include <linux/platform_device.h> -#endif /* CONFIG_MACH_SANDGATE2G */ - -#include "dngl_stats.h" -#include "dhd.h" - -/** - * SDIO Host Controller info - */ -typedef struct bcmsdh_hc bcmsdh_hc_t; - -struct bcmsdh_hc { - bcmsdh_hc_t *next; -#ifdef BCMPLATFORM_BUS - struct device *dev; /* platform device handle */ -#else - struct pci_dev *dev; /* pci device handle */ -#endif /* BCMPLATFORM_BUS */ - void *regs; /* SDIO Host Controller address */ - bcmsdh_info_t *sdh; /* SDIO Host Controller handle */ - void *ch; - unsigned int oob_irq; - unsigned long oob_flags; /* OOB Host specifiction - as edge and etc */ - bool oob_irq_registered; -#if defined(OOB_INTR_ONLY) - spinlock_t irq_lock; -#endif -}; -static bcmsdh_hc_t *sdhcinfo; - -/* driver info, initialized when bcmsdh_register is called */ -static bcmsdh_driver_t drvinfo = { NULL, NULL }; - -/* debugging macros */ -#define SDLX_MSG(x) - -/** - * Checks to see if vendor and device IDs match a supported SDIO Host Controller. - */ -bool bcmsdh_chipmatch(u16 vendor, u16 device) -{ - /* Add other vendors and devices as required */ - -#ifdef BCMSDIOH_STD - /* Check for Arasan host controller */ - if (vendor == VENDOR_SI_IMAGE) - return true; - - /* Check for BRCM 27XX Standard host controller */ - if (device == BCM27XX_SDIOH_ID && vendor == PCI_VENDOR_ID_BROADCOM) - return true; - - /* Check for BRCM Standard host controller */ - if (device == SDIOH_FPGA_ID && vendor == PCI_VENDOR_ID_BROADCOM) - return true; - - /* Check for TI PCIxx21 Standard host controller */ - if (device == PCIXX21_SDIOH_ID && vendor == VENDOR_TI) - return true; - - if (device == PCIXX21_SDIOH0_ID && vendor == VENDOR_TI) - return true; - - /* Ricoh R5C822 Standard SDIO Host */ - if (device == R5C822_SDIOH_ID && vendor == VENDOR_RICOH) - return true; - - /* JMicron Standard SDIO Host */ - if (device == JMICRON_SDIOH_ID && vendor == VENDOR_JMICRON) - return true; -#endif /* BCMSDIOH_STD */ -#ifdef BCMSDIOH_SPI - /* This is the PciSpiHost. */ - if (device == SPIH_FPGA_ID && vendor == PCI_VENDOR_ID_BROADCOM) { - return true; - } -#endif /* BCMSDIOH_SPI */ - - return false; -} - -#if defined(BCMPLATFORM_BUS) -#if defined(BCMLXSDMMC) -/* forward declarations */ -int bcmsdh_probe(struct device *dev); -EXPORT_SYMBOL(bcmsdh_probe); - -int bcmsdh_remove(struct device *dev); -EXPORT_SYMBOL(bcmsdh_remove); - -#else -/* forward declarations */ -static int __devinit bcmsdh_probe(struct device *dev); -static int __devexit bcmsdh_remove(struct device *dev); -#endif /* BCMLXSDMMC */ - -#ifndef BCMLXSDMMC -static -#endif /* BCMLXSDMMC */ -int bcmsdh_probe(struct device *dev) -{ - bcmsdh_hc_t *sdhc = NULL; - unsigned long regs = 0; - bcmsdh_info_t *sdh = NULL; -#if !defined(BCMLXSDMMC) && defined(BCMPLATFORM_BUS) - struct platform_device *pdev; - struct resource *r; -#endif /* BCMLXSDMMC */ - int irq = 0; - u32 vendevid; - unsigned long irq_flags = 0; - -#if !defined(BCMLXSDMMC) && defined(BCMPLATFORM_BUS) - pdev = to_platform_device(dev); - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - irq = platform_get_irq(pdev, 0); - if (!r || irq == NO_IRQ) - return -ENXIO; -#endif /* BCMLXSDMMC */ - -#if defined(OOB_INTR_ONLY) -#ifdef HW_OOB - irq_flags = - IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL | - IORESOURCE_IRQ_SHAREABLE; -#else - irq_flags = IRQF_TRIGGER_FALLING; -#endif /* HW_OOB */ - irq = dhd_customer_oob_irq_map(&irq_flags); - if (irq < 0) { - SDLX_MSG(("%s: Host irq is not defined\n", __func__)); - return 1; - } -#endif /* defined(OOB_INTR_ONLY) */ - /* allocate SDIO Host Controller state info */ - sdhc = kzalloc(sizeof(bcmsdh_hc_t), GFP_ATOMIC); - if (!sdhc) { - SDLX_MSG(("%s: out of memory\n", __func__)); - goto err; - } - sdhc->dev = (void *)dev; - -#ifdef BCMLXSDMMC - sdh = bcmsdh_attach((void *)0, (void **)®s, irq); - if (!sdh) { - SDLX_MSG(("%s: bcmsdh_attach failed\n", __func__)); - goto err; - } -#else - sdh = bcmsdh_attach((void *)r->start, (void **)®s, irq); - if (!sdh) { - SDLX_MSG(("%s: bcmsdh_attach failed\n", __func__)); - goto err; - } -#endif /* BCMLXSDMMC */ - sdhc->sdh = sdh; - sdhc->oob_irq = irq; - sdhc->oob_flags = irq_flags; - sdhc->oob_irq_registered = false; /* to make sure.. */ -#if defined(OOB_INTR_ONLY) - spin_lock_init(&sdhc->irq_lock); -#endif - - /* chain SDIO Host Controller info together */ - sdhc->next = sdhcinfo; - sdhcinfo = sdhc; - /* Read the vendor/device ID from the CIS */ - vendevid = bcmsdh_query_device(sdh); - - /* try to attach to the target device */ - sdhc->ch = drvinfo.attach((vendevid >> 16), (vendevid & 0xFFFF), - 0, 0, 0, 0, (void *)regs, sdh); - if (!sdhc->ch) { - SDLX_MSG(("%s: device attach failed\n", __func__)); - goto err; - } - - return 0; - - /* error handling */ -err: - if (sdhc) { - if (sdhc->sdh) - bcmsdh_detach(sdhc->sdh); - kfree(sdhc); - } - - return -ENODEV; -} - -#ifndef BCMLXSDMMC -static -#endif /* BCMLXSDMMC */ -int bcmsdh_remove(struct device *dev) -{ - bcmsdh_hc_t *sdhc, *prev; - - sdhc = sdhcinfo; - drvinfo.detach(sdhc->ch); - bcmsdh_detach(sdhc->sdh); - /* find the SDIO Host Controller state for this pdev - and take it out from the list */ - for (sdhc = sdhcinfo, prev = NULL; sdhc; sdhc = sdhc->next) { - if (sdhc->dev == (void *)dev) { - if (prev) - prev->next = sdhc->next; - else - sdhcinfo = NULL; - break; - } - prev = sdhc; - } - if (!sdhc) { - SDLX_MSG(("%s: failed\n", __func__)); - return 0; - } - - /* release SDIO Host Controller info */ - kfree(sdhc); - -#if !defined(BCMLXSDMMC) - dev_set_drvdata(dev, NULL); -#endif /* !defined(BCMLXSDMMC) */ - - return 0; -} -#endif /* BCMPLATFORM_BUS */ - -extern int sdio_function_init(void); - -int bcmsdh_register(bcmsdh_driver_t *driver) -{ - drvinfo = *driver; - - SDLX_MSG(("Linux Kernel SDIO/MMC Driver\n")); - return sdio_function_init(); -} - -extern void sdio_function_cleanup(void); - -void bcmsdh_unregister(void) -{ - sdio_function_cleanup(); -} - -#if defined(OOB_INTR_ONLY) -void bcmsdh_oob_intr_set(bool enable) -{ - static bool curstate = 1; - unsigned long flags; - - spin_lock_irqsave(&sdhcinfo->irq_lock, flags); - if (curstate != enable) { - if (enable) - enable_irq(sdhcinfo->oob_irq); - else - disable_irq_nosync(sdhcinfo->oob_irq); - curstate = enable; - } - spin_unlock_irqrestore(&sdhcinfo->irq_lock, flags); -} - -static irqreturn_t wlan_oob_irq(int irq, void *dev_id) -{ - dhd_pub_t *dhdp; - - dhdp = (dhd_pub_t *) dev_get_drvdata(sdhcinfo->dev); - - bcmsdh_oob_intr_set(0); - - if (dhdp == NULL) { - SDLX_MSG(("Out of band GPIO interrupt fired way too early\n")); - return IRQ_HANDLED; - } - - dhdsdio_isr((void *)dhdp->bus); - - return IRQ_HANDLED; -} - -int bcmsdh_register_oob_intr(void *dhdp) -{ - int error = 0; - - SDLX_MSG(("%s Enter\n", __func__)); - - sdhcinfo->oob_flags = - IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL | - IORESOURCE_IRQ_SHAREABLE; - dev_set_drvdata(sdhcinfo->dev, dhdp); - - if (!sdhcinfo->oob_irq_registered) { - SDLX_MSG(("%s IRQ=%d Type=%X\n", __func__, - (int)sdhcinfo->oob_irq, (int)sdhcinfo->oob_flags)); - /* Refer to customer Host IRQ docs about - proper irqflags definition */ - error = - request_irq(sdhcinfo->oob_irq, wlan_oob_irq, - sdhcinfo->oob_flags, "bcmsdh_sdmmc", NULL); - if (error) - return -ENODEV; - - irq_set_irq_wake(sdhcinfo->oob_irq, 1); - sdhcinfo->oob_irq_registered = true; - } - - return 0; -} - -void bcmsdh_unregister_oob_intr(void) -{ - SDLX_MSG(("%s: Enter\n", __func__)); - - irq_set_irq_wake(sdhcinfo->oob_irq, 0); - disable_irq(sdhcinfo->oob_irq); /* just in case.. */ - free_irq(sdhcinfo->oob_irq, NULL); - sdhcinfo->oob_irq_registered = false; -} -#endif /* defined(OOB_INTR_ONLY) */ -/* Module parameters specific to each host-controller driver */ - -extern uint sd_msglevel; /* Debug message level */ -module_param(sd_msglevel, uint, 0); - -extern uint sd_power; /* 0 = SD Power OFF, - 1 = SD Power ON. */ -module_param(sd_power, uint, 0); - -extern uint sd_clock; /* SD Clock Control, 0 = SD Clock OFF, - 1 = SD Clock ON */ -module_param(sd_clock, uint, 0); - -extern uint sd_divisor; /* Divisor (-1 means external clock) */ -module_param(sd_divisor, uint, 0); - -extern uint sd_sdmode; /* Default is SD4, 0=SPI, 1=SD1, 2=SD4 */ -module_param(sd_sdmode, uint, 0); - -extern uint sd_hiok; /* Ok to use hi-speed mode */ -module_param(sd_hiok, uint, 0); - -extern uint sd_f2_blocksize; -module_param(sd_f2_blocksize, int, 0); diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c index c0ffbd35e0c..38bd9ba3096 100644 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c +++ b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.c @@ -15,64 +15,179 @@ */ #include <linux/types.h> #include <linux/netdevice.h> -#include <bcmdefs.h> -#include <bcmdevs.h> -#include <bcmutils.h> -#include <sdio.h> /* SDIO Device and Protocol Specs */ -#include <sdioh.h> /* SDIO Host Controller Specification */ -#include <bcmsdbus.h> /* bcmsdh to/from specific controller APIs */ -#include <sdiovar.h> /* ioctl/iovars */ - +#include <linux/mmc/sdio.h> #include <linux/mmc/core.h> #include <linux/mmc/sdio_func.h> #include <linux/mmc/sdio_ids.h> +#include <linux/mmc/card.h> #include <linux/suspend.h> +#include <linux/errno.h> +#include <linux/sched.h> /* request_irq() */ +#include <net/cfg80211.h> -#include <dngl_stats.h> -#include <dhd.h> +#include <defs.h> +#include <brcm_hw_ids.h> +#include <brcmu_utils.h> +#include <brcmu_wifi.h> +#include "sdio_host.h" +#include "dhd.h" +#include "dhd_dbg.h" +#include "wl_cfg80211.h" -#include "bcmsdh_sdmmc.h" +#define BLOCK_SIZE_64 64 +#define BLOCK_SIZE_512 512 +#define BLOCK_SIZE_4318 64 +#define BLOCK_SIZE_4328 512 -extern int sdio_function_init(void); -extern void sdio_function_cleanup(void); +/* private bus modes */ +#define SDIOH_MODE_SD4 2 -#if !defined(OOB_INTR_ONLY) -static void IRQHandler(struct sdio_func *func); -static void IRQHandlerF2(struct sdio_func *func); -#endif /* !defined(OOB_INTR_ONLY) */ -static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr); -extern int sdio_reset_comm(struct mmc_card *card); +#define CLIENT_INTR 0x100 /* Get rid of this! */ -extern PBCMSDH_SDMMC_INSTANCE gInstance; +#if !defined(SDIO_VENDOR_ID_BROADCOM) +#define SDIO_VENDOR_ID_BROADCOM 0x02d0 +#endif /* !defined(SDIO_VENDOR_ID_BROADCOM) */ -uint sd_sdmode = SDIOH_MODE_SD4; /* Use SD4 mode by default */ -uint sd_f2_blocksize = 512; /* Default blocksize */ +#define SDIO_DEVICE_ID_BROADCOM_DEFAULT 0x0000 + +#define DMA_ALIGN_MASK 0x03 -uint sd_divisor = 2; /* Default 48MHz/2 = 24MHz */ +#if !defined(SDIO_DEVICE_ID_BROADCOM_4325_SDGWB) +#define SDIO_DEVICE_ID_BROADCOM_4325_SDGWB 0x0492 /* BCM94325SDGWB */ +#endif /* !defined(SDIO_DEVICE_ID_BROADCOM_4325_SDGWB) */ +#if !defined(SDIO_DEVICE_ID_BROADCOM_4325) +#define SDIO_DEVICE_ID_BROADCOM_4325 0x0493 +#endif /* !defined(SDIO_DEVICE_ID_BROADCOM_4325) */ +#if !defined(SDIO_DEVICE_ID_BROADCOM_4329) +#define SDIO_DEVICE_ID_BROADCOM_4329 0x4329 +#endif /* !defined(SDIO_DEVICE_ID_BROADCOM_4329) */ +#if !defined(SDIO_DEVICE_ID_BROADCOM_4319) +#define SDIO_DEVICE_ID_BROADCOM_4319 0x4319 +#endif /* !defined(SDIO_DEVICE_ID_BROADCOM_4329) */ + +/* Common msglevel constants */ +#define SDH_ERROR_VAL 0x0001 /* Error */ +#define SDH_TRACE_VAL 0x0002 /* Trace */ +#define SDH_INFO_VAL 0x0004 /* Info */ +#define SDH_DEBUG_VAL 0x0008 /* Debug */ +#define SDH_DATA_VAL 0x0010 /* Data */ +#define SDH_CTRL_VAL 0x0020 /* Control Regs */ +#define SDH_LOG_VAL 0x0040 /* Enable bcmlog */ +#define SDH_DMA_VAL 0x0080 /* DMA */ + +#ifdef BCMDBG +#define sd_err(x) \ + do { \ + if ((sd_msglevel & SDH_ERROR_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#define sd_trace(x) \ + do { \ + if ((sd_msglevel & SDH_TRACE_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#define sd_info(x) \ + do { \ + if ((sd_msglevel & SDH_INFO_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#define sd_debug(x) \ + do { \ + if ((sd_msglevel & SDH_DEBUG_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#define sd_data(x) \ + do { \ + if ((sd_msglevel & SDH_DATA_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#define sd_ctrl(x) \ + do { \ + if ((sd_msglevel & SDH_CTRL_VAL) && net_ratelimit()) \ + printk x; \ + } while (0) +#else +#define sd_err(x) +#define sd_trace(x) +#define sd_info(x) +#define sd_debug(x) +#define sd_data(x) +#define sd_ctrl(x) +#endif + +struct sdos_info { + struct sdioh_info *sd; + spinlock_t lock; +}; + +static void brcmf_sdioh_irqhandler(struct sdio_func *func); +static void brcmf_sdioh_irqhandler_f2(struct sdio_func *func); +static int brcmf_sdioh_get_cisaddr(struct sdioh_info *sd, u32 regaddr); +static int brcmf_ops_sdio_probe(struct sdio_func *func, + const struct sdio_device_id *id); +static void brcmf_ops_sdio_remove(struct sdio_func *func); + +#ifdef CONFIG_PM +static int brcmf_sdio_suspend(struct device *dev); +static int brcmf_sdio_resume(struct device *dev); +#endif /* CONFIG_PM */ + +uint sd_f2_blocksize = 512; /* Default blocksize */ -uint sd_power = 1; /* Default to SD Slot powered ON */ -uint sd_clock = 1; /* Default to SD Clock turned ON */ -uint sd_hiok = false; /* Don't use hi-speed mode by default */ uint sd_msglevel = 0x01; -uint sd_use_dma = true; -DHD_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait); -DHD_PM_RESUME_WAIT_INIT(sdioh_request_word_wait); -DHD_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait); -DHD_PM_RESUME_WAIT_INIT(sdioh_request_buffer_wait); -#define DMA_ALIGN_MASK 0x03 +/* module param defaults */ +static int clockoverride; -int sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr, - int regsize, u32 *data); +module_param(clockoverride, int, 0644); +MODULE_PARM_DESC(clockoverride, "SDIO card clock override"); -void sdioh_sdio_set_host_pm_flags(int flag) -{ - if (sdio_set_host_pm_flags(gInstance->func[1], flag)) - printk(KERN_ERR "%s: Failed to set pm_flags 0x%08x\n",\ - __func__, (unsigned int)flag); -} +struct brcmf_sdmmc_instance *gInstance; + +struct device sdmmc_dev; + +/* devices we support, null terminated */ +static const struct sdio_device_id brcmf_sdmmc_ids[] = { + {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_DEFAULT)}, + {SDIO_DEVICE + (SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4325_SDGWB)}, + {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4325)}, + {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4329)}, + {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4319)}, + { /* end: all zeroes */ }, +}; + +#ifdef CONFIG_PM +static const struct dev_pm_ops brcmf_sdio_pm_ops = { + .suspend = brcmf_sdio_suspend, + .resume = brcmf_sdio_resume, +}; +#endif /* CONFIG_PM */ + +static struct sdio_driver brcmf_sdmmc_driver = { + .probe = brcmf_ops_sdio_probe, + .remove = brcmf_ops_sdio_remove, + .name = "brcmfmac", + .id_table = brcmf_sdmmc_ids, +#ifdef CONFIG_PM + .drv = { + .pm = &brcmf_sdio_pm_ops, + }, +#endif /* CONFIG_PM */ +}; + +MODULE_DEVICE_TABLE(sdio, brcmf_sdmmc_ids); + +BRCMF_PM_RESUME_WAIT_INIT(sdioh_request_byte_wait); +BRCMF_PM_RESUME_WAIT_INIT(sdioh_request_word_wait); +BRCMF_PM_RESUME_WAIT_INIT(sdioh_request_packet_wait); +BRCMF_PM_RESUME_WAIT_INIT(sdioh_request_buffer_wait); -static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd) +static int +brcmf_sdioh_card_regread(struct sdioh_info *sd, int func, u32 regaddr, + int regsize, u32 *data); + +static int brcmf_sdioh_enablefuncs(struct sdioh_info *sd) { int err_ret; u32 fbraddr; @@ -81,16 +196,16 @@ static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd) sd_trace(("%s\n", __func__)); /* Get the Card's common CIS address */ - sd->com_cis_ptr = sdioh_sdmmc_get_cisaddr(sd, SDIOD_CCCR_CISPTR_0); + sd->com_cis_ptr = brcmf_sdioh_get_cisaddr(sd, SDIO_CCCR_CIS); sd->func_cis_ptr[0] = sd->com_cis_ptr; sd_info(("%s: Card's Common CIS Ptr = 0x%x\n", __func__, sd->com_cis_ptr)); /* Get the Card's function CIS (for each function) */ - for (fbraddr = SDIOD_FBR_STARTADDR, func = 1; + for (fbraddr = SDIO_FBR_BASE(1), func = 1; func <= sd->num_funcs; func++, fbraddr += SDIOD_FBR_SIZE) { sd->func_cis_ptr[func] = - sdioh_sdmmc_get_cisaddr(sd, SDIOD_FBR_CISPTR_0 + fbraddr); + brcmf_sdioh_get_cisaddr(sd, SDIO_FBR_CIS + fbraddr); sd_info(("%s: Function %d CIS Ptr = 0x%x\n", __func__, func, sd->func_cis_ptr[func])); } @@ -104,8 +219,8 @@ static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd) err_ret = sdio_enable_func(gInstance->func[1]); sdio_release_host(gInstance->func[1]); if (err_ret) { - sd_err(("bcmsdh_sdmmc: Failed to enable F1 Err: 0x%08x", - err_ret)); + sd_err(("brcmf_sdioh_enablefuncs: Failed to enable F1 " + "Err: 0x%08x\n", err_ret)); } return false; @@ -114,9 +229,9 @@ static int sdioh_sdmmc_card_enablefuncs(sdioh_info_t *sd) /* * Public entry points & extern's */ -sdioh_info_t *sdioh_attach(void *bar0, uint irq) +struct sdioh_info *brcmf_sdioh_attach(void *bar0, uint irq) { - sdioh_info_t *sd; + struct sdioh_info *sd; int err_ret; sd_trace(("%s\n", __func__)); @@ -126,19 +241,18 @@ sdioh_info_t *sdioh_attach(void *bar0, uint irq) return NULL; } - sd = kzalloc(sizeof(sdioh_info_t), GFP_ATOMIC); + sd = kzalloc(sizeof(struct sdioh_info), GFP_ATOMIC); if (sd == NULL) { sd_err(("sdioh_attach: out of memory\n")); return NULL; } - if (sdioh_sdmmc_osinit(sd) != 0) { + if (brcmf_sdioh_osinit(sd) != 0) { sd_err(("%s:sdioh_sdmmc_osinit() failed\n", __func__)); kfree(sd); return NULL; } sd->num_funcs = 2; - sd->sd_blockmode = true; sd->use_client_ints = true; sd->client_block_size[0] = 64; @@ -150,7 +264,7 @@ sdioh_info_t *sdioh_attach(void *bar0, uint irq) sd->client_block_size[1] = 64; err_ret = sdio_set_block_size(gInstance->func[1], 64); if (err_ret) - sd_err(("bcmsdh_sdmmc: Failed to set F1 blocksize\n")); + sd_err(("brcmf_sdioh_attach: Failed to set F1 blocksize\n")); /* Release host controller F1 */ sdio_release_host(gInstance->func[1]); @@ -163,20 +277,20 @@ sdioh_info_t *sdioh_attach(void *bar0, uint irq) err_ret = sdio_set_block_size(gInstance->func[2], sd_f2_blocksize); if (err_ret) - sd_err(("bcmsdh_sdmmc: Failed to set F2 blocksize " - "to %d\n", sd_f2_blocksize)); + sd_err(("brcmf_sdioh_attach: Failed to set F2 blocksize" + " to %d\n", sd_f2_blocksize)); /* Release host controller F2 */ sdio_release_host(gInstance->func[2]); } - sdioh_sdmmc_card_enablefuncs(sd); + brcmf_sdioh_enablefuncs(sd); sd_trace(("%s: Done\n", __func__)); return sd; } -extern SDIOH_API_RC sdioh_detach(sdioh_info_t *sd) +extern int brcmf_sdioh_detach(struct sdioh_info *sd) { sd_trace(("%s\n", __func__)); @@ -193,92 +307,25 @@ extern SDIOH_API_RC sdioh_detach(sdioh_info_t *sd) sdio_release_host(gInstance->func[1]); /* deregister irq */ - sdioh_sdmmc_osfree(sd); + brcmf_sdioh_osfree(sd); kfree(sd); } - return SDIOH_API_RC_SUCCESS; -} - -#if defined(OOB_INTR_ONLY) && defined(HW_OOB) - -extern SDIOH_API_RC sdioh_enable_func_intr(void) -{ - u8 reg; - int err; - - if (gInstance->func[0]) { - sdio_claim_host(gInstance->func[0]); - - reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err); - if (err) { - sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n", - __func__, err)); - sdio_release_host(gInstance->func[0]); - return SDIOH_API_RC_FAIL; - } - - /* Enable F1 and F2 interrupts, set master enable */ - reg |= - (INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN | - INTR_CTL_MASTER_EN); - - sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err); - sdio_release_host(gInstance->func[0]); - - if (err) { - sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n", - __func__, err)); - return SDIOH_API_RC_FAIL; - } - } - - return SDIOH_API_RC_SUCCESS; -} - -extern SDIOH_API_RC sdioh_disable_func_intr(void) -{ - u8 reg; - int err; - - if (gInstance->func[0]) { - sdio_claim_host(gInstance->func[0]); - reg = sdio_readb(gInstance->func[0], SDIOD_CCCR_INTEN, &err); - if (err) { - sd_err(("%s: error for read SDIO_CCCR_IENx : 0x%x\n", - __func__, err)); - sdio_release_host(gInstance->func[0]); - return SDIOH_API_RC_FAIL; - } - - reg &= ~(INTR_CTL_FUNC1_EN | INTR_CTL_FUNC2_EN); - /* Disable master interrupt with the last function interrupt */ - if (!(reg & 0xFE)) - reg = 0; - sdio_writeb(gInstance->func[0], reg, SDIOD_CCCR_INTEN, &err); - - sdio_release_host(gInstance->func[0]); - if (err) { - sd_err(("%s: error for write SDIO_CCCR_IENx : 0x%x\n", - __func__, err)); - return SDIOH_API_RC_FAIL; - } - } - return SDIOH_API_RC_SUCCESS; + return 0; } -#endif /* defined(OOB_INTR_ONLY) && defined(HW_OOB) */ /* Configure callback to client when we receive client interrupt */ -extern SDIOH_API_RC -sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh) +extern int +brcmf_sdioh_interrupt_register(struct sdioh_info *sd, void (*fn)(void *), + void *argh) { sd_trace(("%s: Entering\n", __func__)); if (fn == NULL) { sd_err(("%s: interrupt handler is NULL, not registering\n", __func__)); - return SDIOH_API_RC_FAIL; + return -EINVAL; } -#if !defined(OOB_INTR_ONLY) + sd->intr_handler = fn; sd->intr_handler_arg = argh; sd->intr_handler_valid = true; @@ -286,26 +333,23 @@ sdioh_interrupt_register(sdioh_info_t *sd, sdioh_cb_fn_t fn, void *argh) /* register and unmask irq */ if (gInstance->func[2]) { sdio_claim_host(gInstance->func[2]); - sdio_claim_irq(gInstance->func[2], IRQHandlerF2); + sdio_claim_irq(gInstance->func[2], brcmf_sdioh_irqhandler_f2); sdio_release_host(gInstance->func[2]); } if (gInstance->func[1]) { sdio_claim_host(gInstance->func[1]); - sdio_claim_irq(gInstance->func[1], IRQHandler); + sdio_claim_irq(gInstance->func[1], brcmf_sdioh_irqhandler); sdio_release_host(gInstance->func[1]); } -#elif defined(HW_OOB) - sdioh_enable_func_intr(); -#endif /* defined(OOB_INTR_ONLY) */ - return SDIOH_API_RC_SUCCESS; + + return 0; } -extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *sd) +extern int brcmf_sdioh_interrupt_deregister(struct sdioh_info *sd) { sd_trace(("%s: Entering\n", __func__)); -#if !defined(OOB_INTR_ONLY) if (gInstance->func[1]) { /* register and unmask irq */ sdio_claim_host(gInstance->func[1]); @@ -324,73 +368,28 @@ extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *sd) sd->intr_handler_valid = false; sd->intr_handler = NULL; sd->intr_handler_arg = NULL; -#elif defined(HW_OOB) - sdioh_disable_func_intr(); -#endif /* !defined(OOB_INTR_ONLY) */ - return SDIOH_API_RC_SUCCESS; -} - -extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *sd, bool *onoff) -{ - sd_trace(("%s: Entering\n", __func__)); - *onoff = sd->client_intr_enabled; - return SDIOH_API_RC_SUCCESS; -} -#if defined(DHD_DEBUG) -extern bool sdioh_interrupt_pending(sdioh_info_t *sd) -{ return 0; } -#endif - -uint sdioh_query_iofnum(sdioh_info_t *sd) -{ - return sd->num_funcs; -} /* IOVar table */ enum { IOV_MSGLEVEL = 1, - IOV_BLOCKMODE, IOV_BLOCKSIZE, - IOV_DMA, IOV_USEINTS, IOV_NUMINTS, - IOV_NUMLOCALINTS, - IOV_HOSTREG, IOV_DEVREG, - IOV_DIVISOR, - IOV_SDMODE, - IOV_HISPEED, IOV_HCIREGS, - IOV_POWER, - IOV_CLOCK, IOV_RXCHAIN }; -const bcm_iovar_t sdioh_iovars[] = { +const struct brcmu_iovar sdioh_iovars[] = { {"sd_msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0}, - {"sd_blockmode", IOV_BLOCKMODE, 0, IOVT_BOOL, 0}, {"sd_blocksize", IOV_BLOCKSIZE, 0, IOVT_UINT32, 0},/* ((fn << 16) | size) */ - {"sd_dma", IOV_DMA, 0, IOVT_BOOL, 0}, {"sd_ints", IOV_USEINTS, 0, IOVT_BOOL, 0}, {"sd_numints", IOV_NUMINTS, 0, IOVT_UINT32, 0}, - {"sd_numlocalints", IOV_NUMLOCALINTS, 0, IOVT_UINT32, 0}, - {"sd_hostreg", IOV_HOSTREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} - , - {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} - , - {"sd_divisor", IOV_DIVISOR, 0, IOVT_UINT32, 0} - , - {"sd_power", IOV_POWER, 0, IOVT_UINT32, 0} - , - {"sd_clock", IOV_CLOCK, 0, IOVT_UINT32, 0} - , - {"sd_mode", IOV_SDMODE, 0, IOVT_UINT32, 100} - , - {"sd_highspeed", IOV_HISPEED, 0, IOVT_UINT32, 0} + {"sd_devreg", IOV_DEVREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)} , {"sd_rxchain", IOV_RXCHAIN, 0, IOVT_BOOL, 0} , @@ -398,33 +397,37 @@ const bcm_iovar_t sdioh_iovars[] = { }; int -sdioh_iovar_op(sdioh_info_t *si, const char *name, - void *params, int plen, void *arg, int len, bool set) +brcmf_sdioh_iovar_op(struct sdioh_info *si, const char *name, + void *params, int plen, void *arg, int len, bool set) { - const bcm_iovar_t *vi = NULL; + const struct brcmu_iovar *vi = NULL; int bcmerror = 0; int val_size; s32 int_val = 0; bool bool_val; u32 actionid; - ASSERT(name); - ASSERT(len >= 0); + if (name == NULL || len <= 0) + return -EINVAL; + + /* Set does not take qualifiers */ + if (set && (params || plen)) + return -EINVAL; - /* Get must have return space; Set does not take qualifiers */ - ASSERT(set || (arg && len)); - ASSERT(!set || (!params && !plen)); + /* Get must have return space;*/ + if (!set && !(arg && len)) + return -EINVAL; sd_trace(("%s: Enter (%s %s)\n", __func__, (set ? "set" : "get"), name)); - vi = bcm_iovar_lookup(sdioh_iovars, name); + vi = brcmu_iovar_lookup(sdioh_iovars, name); if (vi == NULL) { bcmerror = -ENOTSUPP; goto exit; } - bcmerror = bcm_iovar_lencheck(vi, arg, len, set); + bcmerror = brcmu_iovar_lencheck(vi, arg, len, set); if (bcmerror != 0) goto exit; @@ -457,16 +460,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, sd_msglevel = int_val; break; - case IOV_GVAL(IOV_BLOCKMODE): - int_val = (s32) si->sd_blockmode; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_BLOCKMODE): - si->sd_blockmode = (bool) int_val; - /* Haven't figured out how to make non-block mode with DMA */ - break; - case IOV_GVAL(IOV_BLOCKSIZE): if ((u32) int_val > si->num_funcs) { bcmerror = -EINVAL; @@ -518,15 +511,6 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, memcpy(arg, &int_val, val_size); break; - case IOV_GVAL(IOV_DMA): - int_val = (s32) si->sd_use_dma; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_DMA): - si->sd_use_dma = (bool) int_val; - break; - case IOV_GVAL(IOV_USEINTS): int_val = (s32) si->use_client_ints; memcpy(arg, &int_val, val_size); @@ -541,117 +525,18 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, break; - case IOV_GVAL(IOV_DIVISOR): - int_val = (u32) sd_divisor; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_DIVISOR): - sd_divisor = int_val; - break; - - case IOV_GVAL(IOV_POWER): - int_val = (u32) sd_power; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_POWER): - sd_power = int_val; - break; - - case IOV_GVAL(IOV_CLOCK): - int_val = (u32) sd_clock; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_CLOCK): - sd_clock = int_val; - break; - - case IOV_GVAL(IOV_SDMODE): - int_val = (u32) sd_sdmode; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_SDMODE): - sd_sdmode = int_val; - break; - - case IOV_GVAL(IOV_HISPEED): - int_val = (u32) sd_hiok; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_HISPEED): - sd_hiok = int_val; - break; - case IOV_GVAL(IOV_NUMINTS): int_val = (s32) si->intrcount; memcpy(arg, &int_val, val_size); break; - case IOV_GVAL(IOV_NUMLOCALINTS): - int_val = (s32) 0; - memcpy(arg, &int_val, val_size); - break; - - case IOV_GVAL(IOV_HOSTREG): - { - sdreg_t *sd_ptr = (sdreg_t *) params; - - if (sd_ptr->offset < SD_SysAddr - || sd_ptr->offset > SD_MaxCurCap) { - sd_err(("%s: bad offset 0x%x\n", __func__, - sd_ptr->offset)); - bcmerror = -EINVAL; - break; - } - - sd_trace(("%s: rreg%d at offset %d\n", __func__, - (sd_ptr->offset & 1) ? 8 - : ((sd_ptr->offset & 2) ? 16 : 32), - sd_ptr->offset)); - if (sd_ptr->offset & 1) - int_val = 8; /* sdioh_sdmmc_rreg8(si, - sd_ptr->offset); */ - else if (sd_ptr->offset & 2) - int_val = 16; /* sdioh_sdmmc_rreg16(si, - sd_ptr->offset); */ - else - int_val = 32; /* sdioh_sdmmc_rreg(si, - sd_ptr->offset); */ - - memcpy(arg, &int_val, sizeof(int_val)); - break; - } - - case IOV_SVAL(IOV_HOSTREG): - { - sdreg_t *sd_ptr = (sdreg_t *) params; - - if (sd_ptr->offset < SD_SysAddr - || sd_ptr->offset > SD_MaxCurCap) { - sd_err(("%s: bad offset 0x%x\n", __func__, - sd_ptr->offset)); - bcmerror = -EINVAL; - break; - } - - sd_trace(("%s: wreg%d value 0x%08x at offset %d\n", - __func__, sd_ptr->value, - (sd_ptr->offset & 1) ? 8 - : ((sd_ptr->offset & 2) ? 16 : 32), - sd_ptr->offset)); - break; - } - case IOV_GVAL(IOV_DEVREG): { - sdreg_t *sd_ptr = (sdreg_t *) params; + struct brcmf_sdreg *sd_ptr = + (struct brcmf_sdreg *) params; u8 data = 0; - if (sdioh_cfg_read + if (brcmf_sdioh_cfg_read (si, sd_ptr->func, sd_ptr->offset, &data)) { bcmerror = -EIO; break; @@ -664,10 +549,11 @@ sdioh_iovar_op(sdioh_info_t *si, const char *name, case IOV_SVAL(IOV_DEVREG): { - sdreg_t *sd_ptr = (sdreg_t *) params; + struct brcmf_sdreg *sd_ptr = + (struct brcmf_sdreg *) params; u8 data = (u8) sd_ptr->value; - if (sdioh_cfg_write + if (brcmf_sdioh_cfg_write (si, sd_ptr->func, sd_ptr->offset, &data)) { bcmerror = -EIO; break; @@ -684,50 +570,32 @@ exit: return bcmerror; } -#if defined(OOB_INTR_ONLY) && defined(HW_OOB) - -SDIOH_API_RC sdioh_enable_hw_oob_intr(sdioh_info_t *sd, bool enable) -{ - SDIOH_API_RC status; - u8 data; - - if (enable) - data = 3; /* enable hw oob interrupt */ - else - data = 4; /* disable hw oob interrupt */ - data |= 4; /* Active HIGH */ - - status = sdioh_request_byte(sd, SDIOH_WRITE, 0, 0xf2, &data); - return status; -} -#endif /* defined(OOB_INTR_ONLY) && defined(HW_OOB) */ - -extern SDIOH_API_RC -sdioh_cfg_read(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data) +extern int +brcmf_sdioh_cfg_read(struct sdioh_info *sd, uint fnc_num, u32 addr, u8 *data) { - SDIOH_API_RC status; - /* No lock needed since sdioh_request_byte does locking */ - status = sdioh_request_byte(sd, SDIOH_READ, fnc_num, addr, data); + int status; + /* No lock needed since brcmf_sdioh_request_byte does locking */ + status = brcmf_sdioh_request_byte(sd, SDIOH_READ, fnc_num, addr, data); return status; } -extern SDIOH_API_RC -sdioh_cfg_write(sdioh_info_t *sd, uint fnc_num, u32 addr, u8 *data) +extern int +brcmf_sdioh_cfg_write(struct sdioh_info *sd, uint fnc_num, u32 addr, u8 *data) { - /* No lock needed since sdioh_request_byte does locking */ - SDIOH_API_RC status; - status = sdioh_request_byte(sd, SDIOH_WRITE, fnc_num, addr, data); + /* No lock needed since brcmf_sdioh_request_byte does locking */ + int status; + status = brcmf_sdioh_request_byte(sd, SDIOH_WRITE, fnc_num, addr, data); return status; } -static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr) +static int brcmf_sdioh_get_cisaddr(struct sdioh_info *sd, u32 regaddr) { /* read 24 bits and return valid 17 bit addr */ int i; u32 scratch, regdata; u8 *ptr = (u8 *)&scratch; for (i = 0; i < 3; i++) { - if ((sdioh_sdmmc_card_regread(sd, 0, regaddr, 1, ®data)) != + if ((brcmf_sdioh_card_regread(sd, 0, regaddr, 1, ®data)) != SUCCESS) sd_err(("%s: Can't read!\n", __func__)); @@ -741,8 +609,8 @@ static int sdioh_sdmmc_get_cisaddr(sdioh_info_t *sd, u32 regaddr) return scratch; } -extern SDIOH_API_RC -sdioh_cis_read(sdioh_info_t *sd, uint func, u8 *cisd, u32 length) +extern int +brcmf_sdioh_cis_read(struct sdioh_info *sd, uint func, u8 *cisd, u32 length) { u32 count; int offset; @@ -754,7 +622,7 @@ sdioh_cis_read(sdioh_info_t *sd, uint func, u8 *cisd, u32 length) if (!sd->func_cis_ptr[func]) { memset(cis, 0, length); sd_err(("%s: no func_cis_ptr[%d]\n", __func__, func)); - return SDIOH_API_RC_FAIL; + return -ENOTSUPP; } sd_err(("%s: func_cis_ptr[%d]=0x%04x\n", __func__, func, @@ -762,37 +630,37 @@ sdioh_cis_read(sdioh_info_t *sd, uint func, u8 *cisd, u32 length) for (count = 0; count < length; count++) { offset = sd->func_cis_ptr[func] + count; - if (sdioh_sdmmc_card_regread(sd, 0, offset, 1, &foo) < 0) { + if (brcmf_sdioh_card_regread(sd, 0, offset, 1, &foo) < 0) { sd_err(("%s: regread failed: Can't read CIS\n", __func__)); - return SDIOH_API_RC_FAIL; + return -EIO; } *cis = (u8) (foo & 0xff); cis++; } - return SDIOH_API_RC_SUCCESS; + return 0; } -extern SDIOH_API_RC -sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr, - u8 *byte) +extern int +brcmf_sdioh_request_byte(struct sdioh_info *sd, uint rw, uint func, + uint regaddr, u8 *byte) { int err_ret; sd_info(("%s: rw=%d, func=%d, addr=0x%05x\n", __func__, rw, func, regaddr)); - DHD_PM_RESUME_WAIT(sdioh_request_byte_wait); - DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL); + BRCMF_PM_RESUME_WAIT(sdioh_request_byte_wait); + BRCMF_PM_RESUME_RETURN_ERROR(-EIO); if (rw) { /* CMD52 Write */ if (func == 0) { /* Can only directly write to some F0 registers. * Handle F2 enable * as a special case. */ - if (regaddr == SDIOD_CCCR_IOEN) { + if (regaddr == SDIO_CCCR_IOEx) { if (gInstance->func[2]) { sdio_claim_host(gInstance->func[2]); if (*byte & SDIO_FUNC_ENABLE_2) { @@ -801,7 +669,9 @@ sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr, sdio_enable_func (gInstance->func[2]); if (err_ret) - sd_err(("bcmsdh_sdmmc: enable F2 failed:%d", + sd_err(("request_byte: " + "enable F2 " + "failed:%d\n", err_ret)); } else { /* Disable Function 2 */ @@ -809,15 +679,16 @@ sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr, sdio_disable_func (gInstance->func[2]); if (err_ret) - sd_err(("bcmsdh_sdmmc: Disab F2 failed:%d", + sd_err(("request_byte: " + "Disab F2 " + "failed:%d\n", err_ret)); } sdio_release_host(gInstance->func[2]); } } -#if defined(MMC_SDIO_ABORT) /* to allow abort command through F1 */ - else if (regaddr == SDIOD_CCCR_IOABORT) { + else if (regaddr == SDIO_CCCR_ABORT) { sdio_claim_host(gInstance->func[func]); /* * this sdio_f0_writeb() can be replaced @@ -828,10 +699,8 @@ sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr, sdio_writeb(gInstance->func[func], *byte, regaddr, &err_ret); sdio_release_host(gInstance->func[func]); - } -#endif /* MMC_SDIO_ABORT */ - else if (regaddr < 0xF0) { - sd_err(("bcmsdh_sdmmc: F0 Wr:0x%02x: write " + } else if (regaddr < 0xF0) { + sd_err(("brcmf: F0 Wr:0x%02x: write " "disallowed\n", regaddr)); } else { /* Claim host controller, perform F0 write, @@ -867,29 +736,29 @@ sdioh_request_byte(sdioh_info_t *sd, uint rw, uint func, uint regaddr, } if (err_ret) - sd_err(("bcmsdh_sdmmc: Failed to %s byte F%d:@0x%05x=%02x, " + sd_err(("brcmf: Failed to %s byte F%d:@0x%05x=%02x, " "Err: %d\n", rw ? "Write" : "Read", func, regaddr, *byte, err_ret)); - return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL); + return err_ret; } -extern SDIOH_API_RC -sdioh_request_word(sdioh_info_t *sd, uint cmd_type, uint rw, uint func, - uint addr, u32 *word, uint nbytes) +extern int +brcmf_sdioh_request_word(struct sdioh_info *sd, uint cmd_type, uint rw, + uint func, uint addr, u32 *word, uint nbytes) { - int err_ret = SDIOH_API_RC_FAIL; + int err_ret = -EIO; if (func == 0) { sd_err(("%s: Only CMD52 allowed to F0.\n", __func__)); - return SDIOH_API_RC_FAIL; + return -EINVAL; } sd_info(("%s: cmd_type=%d, rw=%d, func=%d, addr=0x%05x, nbytes=%d\n", __func__, cmd_type, rw, func, addr, nbytes)); - DHD_PM_RESUME_WAIT(sdioh_request_word_wait); - DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL); + BRCMF_PM_RESUME_WAIT(sdioh_request_word_wait); + BRCMF_PM_RESUME_RETURN_ERROR(-EIO); /* Claim host controller */ sdio_claim_host(gInstance->func[func]); @@ -920,16 +789,16 @@ sdioh_request_word(sdioh_info_t *sd, uint cmd_type, uint rw, uint func, sdio_release_host(gInstance->func[func]); if (err_ret) { - sd_err(("bcmsdh_sdmmc: Failed to %s word, Err: 0x%08x", + sd_err(("brcmf: Failed to %s word, Err: 0x%08x\n", rw ? "Write" : "Read", err_ret)); } - return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL); + return err_ret; } -static SDIOH_API_RC -sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func, - uint addr, struct sk_buff *pkt) +static int +brcmf_sdioh_request_packet(struct sdioh_info *sd, uint fix_inc, uint write, + uint func, uint addr, struct sk_buff *pkt) { bool fifo = (fix_inc == SDIOH_DATA_FIX); u32 SGCount = 0; @@ -939,9 +808,8 @@ sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func, sd_trace(("%s: Enter\n", __func__)); - ASSERT(pkt); - DHD_PM_RESUME_WAIT(sdioh_request_packet_wait); - DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL); + BRCMF_PM_RESUME_WAIT(sdioh_request_packet_wait); + BRCMF_PM_RESUME_RETURN_ERROR(-EIO); /* Claim host controller */ sdio_claim_host(gInstance->func[func]); @@ -950,21 +818,6 @@ sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func, pkt_len += 3; pkt_len &= 0xFFFFFFFC; -#ifdef CONFIG_MMC_MSM7X00A - if ((pkt_len % 64) == 32) { - sd_trace(("%s: Rounding up TX packet +=32\n", - __func__)); - pkt_len += 32; - } -#endif /* CONFIG_MMC_MSM7X00A */ - /* Make sure the packet is aligned properly. - * If it isn't, then this - * is the fault of sdioh_request_buffer() which - * is supposed to give - * us something we can work with. - */ - ASSERT(((u32) (pkt->data) & DMA_ALIGN_MASK) == 0); - if ((write) && (!fifo)) { err_ret = sdio_memcpy_toio(gInstance->func[func], addr, ((u8 *) (pnext->data)), @@ -1005,7 +858,7 @@ sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func, sdio_release_host(gInstance->func[func]); sd_trace(("%s: Exit\n", __func__)); - return ((err_ret == 0) ? SDIOH_API_RC_SUCCESS : SDIOH_API_RC_FAIL); + return err_ret; } /* @@ -1023,114 +876,101 @@ sdioh_request_packet(sdioh_info_t *sd, uint fix_inc, uint write, uint func, * aligned packet. * */ -extern SDIOH_API_RC -sdioh_request_buffer(sdioh_info_t *sd, uint pio_dma, uint fix_inc, uint write, - uint func, uint addr, uint reg_width, uint buflen_u, - u8 *buffer, struct sk_buff *pkt) +extern int +brcmf_sdioh_request_buffer(struct sdioh_info *sd, uint pio_dma, uint fix_inc, + uint write, uint func, uint addr, uint reg_width, + uint buflen_u, u8 *buffer, struct sk_buff *pkt) { - SDIOH_API_RC Status; + int Status; struct sk_buff *mypkt = NULL; sd_trace(("%s: Enter\n", __func__)); - DHD_PM_RESUME_WAIT(sdioh_request_buffer_wait); - DHD_PM_RESUME_RETURN_ERROR(SDIOH_API_RC_FAIL); + BRCMF_PM_RESUME_WAIT(sdioh_request_buffer_wait); + BRCMF_PM_RESUME_RETURN_ERROR(-EIO); /* Case 1: we don't have a packet. */ if (pkt == NULL) { sd_data(("%s: Creating new %s Packet, len=%d\n", __func__, write ? "TX" : "RX", buflen_u)); - mypkt = bcm_pkt_buf_get_skb(buflen_u); + mypkt = brcmu_pkt_buf_get_skb(buflen_u); if (!mypkt) { - sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n", + sd_err(("%s: brcmu_pkt_buf_get_skb failed: len %d\n", __func__, buflen_u)); - return SDIOH_API_RC_FAIL; + return -EIO; } /* For a write, copy the buffer data into the packet. */ if (write) memcpy(mypkt->data, buffer, buflen_u); - Status = - sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt); + Status = brcmf_sdioh_request_packet(sd, fix_inc, write, func, + addr, mypkt); /* For a read, copy the packet data back to the buffer. */ if (!write) memcpy(buffer, mypkt->data, buflen_u); - bcm_pkt_buf_free_skb(mypkt); - } else if (((u32) (pkt->data) & DMA_ALIGN_MASK) != 0) { - /* Case 2: We have a packet, but it is unaligned. */ - - /* In this case, we cannot have a chain. */ - ASSERT(pkt->next == NULL); - + brcmu_pkt_buf_free_skb(mypkt); + } else if (((ulong) (pkt->data) & DMA_ALIGN_MASK) != 0) { + /* + * Case 2: We have a packet, but it is unaligned. + * In this case, we cannot have a chain (pkt->next == NULL) + */ sd_data(("%s: Creating aligned %s Packet, len=%d\n", __func__, write ? "TX" : "RX", pkt->len)); - mypkt = bcm_pkt_buf_get_skb(pkt->len); + mypkt = brcmu_pkt_buf_get_skb(pkt->len); if (!mypkt) { - sd_err(("%s: bcm_pkt_buf_get_skb failed: len %d\n", + sd_err(("%s: brcmu_pkt_buf_get_skb failed: len %d\n", __func__, pkt->len)); - return SDIOH_API_RC_FAIL; + return -EIO; } /* For a write, copy the buffer data into the packet. */ if (write) memcpy(mypkt->data, pkt->data, pkt->len); - Status = - sdioh_request_packet(sd, fix_inc, write, func, addr, mypkt); + Status = brcmf_sdioh_request_packet(sd, fix_inc, write, func, + addr, mypkt); /* For a read, copy the packet data back to the buffer. */ if (!write) memcpy(pkt->data, mypkt->data, mypkt->len); - bcm_pkt_buf_free_skb(mypkt); + brcmu_pkt_buf_free_skb(mypkt); } else { /* case 3: We have a packet and it is aligned. */ sd_data(("%s: Aligned %s Packet, direct DMA\n", __func__, write ? "Tx" : "Rx")); - Status = - sdioh_request_packet(sd, fix_inc, write, func, addr, pkt); + Status = brcmf_sdioh_request_packet(sd, fix_inc, write, func, + addr, pkt); } return Status; } /* this function performs "abort" for both of host & device */ -extern int sdioh_abort(sdioh_info_t *sd, uint func) +extern int brcmf_sdioh_abort(struct sdioh_info *sd, uint func) { -#if defined(MMC_SDIO_ABORT) char t_func = (char)func; -#endif /* defined(MMC_SDIO_ABORT) */ sd_trace(("%s: Enter\n", __func__)); -#if defined(MMC_SDIO_ABORT) - /* issue abort cmd52 command through F1 */ - sdioh_request_byte(sd, SD_IO_OP_WRITE, SDIO_FUNC_0, SDIOD_CCCR_IOABORT, + /* issue abort cmd52 command through F0 */ + brcmf_sdioh_request_byte(sd, SDIOH_WRITE, SDIO_FUNC_0, SDIO_CCCR_ABORT, &t_func); -#endif /* defined(MMC_SDIO_ABORT) */ - - sd_trace(("%s: Exit\n", __func__)); - return SDIOH_API_RC_SUCCESS; -} -/* Reset and re-initialize the device */ -int sdioh_sdio_reset(sdioh_info_t *si) -{ - sd_trace(("%s: Enter\n", __func__)); sd_trace(("%s: Exit\n", __func__)); - return SDIOH_API_RC_SUCCESS; + return 0; } /* Disable device interrupt */ -void sdioh_sdmmc_devintr_off(sdioh_info_t *sd) +void brcmf_sdioh_dev_intr_off(struct sdioh_info *sd) { sd_trace(("%s: %d\n", __func__, sd->use_client_ints)); sd->intmask &= ~CLIENT_INTR; } /* Enable device interrupt */ -void sdioh_sdmmc_devintr_on(sdioh_info_t *sd) +void brcmf_sdioh_dev_intr_on(struct sdioh_info *sd) { sd_trace(("%s: %d\n", __func__, sd->use_client_ints)); sd->intmask |= CLIENT_INTR; @@ -1138,19 +978,19 @@ void sdioh_sdmmc_devintr_on(sdioh_info_t *sd) /* Read client card reg */ int -sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr, +brcmf_sdioh_card_regread(struct sdioh_info *sd, int func, u32 regaddr, int regsize, u32 *data) { if ((func == 0) || (regsize == 1)) { u8 temp = 0; - sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp); + brcmf_sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp); *data = temp; *data &= 0xff; sd_data(("%s: byte read data=0x%02x\n", __func__, *data)); } else { - sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, data, + brcmf_sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, data, regsize); if (regsize == 2) *data &= 0xffff; @@ -1161,25 +1001,20 @@ sdioh_sdmmc_card_regread(sdioh_info_t *sd, int func, u32 regaddr, return SUCCESS; } -#if !defined(OOB_INTR_ONLY) -/* bcmsdh_sdmmc interrupt handler */ -static void IRQHandler(struct sdio_func *func) +static void brcmf_sdioh_irqhandler(struct sdio_func *func) { - sdioh_info_t *sd; + struct sdioh_info *sd; - sd_trace(("bcmsdh_sdmmc: ***IRQHandler\n")); + sd_trace(("brcmf: ***IRQHandler\n")); sd = gInstance->sd; - ASSERT(sd != NULL); sdio_release_host(gInstance->func[0]); if (sd->use_client_ints) { sd->intrcount++; - ASSERT(sd->intr_handler); - ASSERT(sd->intr_handler_arg); (sd->intr_handler) (sd->intr_handler_arg); } else { - sd_err(("bcmsdh_sdmmc: ***IRQHandler\n")); + sd_err(("brcmf: ***IRQHandler\n")); sd_err(("%s: Not ready for intr: enabled %d, handler %p\n", __func__, sd->client_intr_enabled, sd->intr_handler)); @@ -1188,52 +1023,174 @@ static void IRQHandler(struct sdio_func *func) sdio_claim_host(gInstance->func[0]); } -/* bcmsdh_sdmmc interrupt handler for F2 (dummy handler) */ -static void IRQHandlerF2(struct sdio_func *func) +/* interrupt handler for F2 (dummy handler) */ +static void brcmf_sdioh_irqhandler_f2(struct sdio_func *func) { - sdioh_info_t *sd; + struct sdioh_info *sd; - sd_trace(("bcmsdh_sdmmc: ***IRQHandlerF2\n")); + sd_trace(("brcmf: ***IRQHandlerF2\n")); sd = gInstance->sd; +} + +static int brcmf_ops_sdio_probe(struct sdio_func *func, + const struct sdio_device_id *id) +{ + int ret = 0; + static struct sdio_func sdio_func_0; + sd_trace(("sdio_probe: %s Enter\n", __func__)); + sd_trace(("sdio_probe: func->class=%x\n", func->class)); + sd_trace(("sdio_vendor: 0x%04x\n", func->vendor)); + sd_trace(("sdio_device: 0x%04x\n", func->device)); + sd_trace(("Function#: 0x%04x\n", func->num)); + + if (func->num == 1) { + sdio_func_0.num = 0; + sdio_func_0.card = func->card; + gInstance->func[0] = &sdio_func_0; + if (func->device == 0x4) { /* 4318 */ + gInstance->func[2] = NULL; + sd_trace(("NIC found, calling brcmf_sdio_probe...\n")); + ret = brcmf_sdio_probe(&sdmmc_dev); + } + } - ASSERT(sd != NULL); + gInstance->func[func->num] = func; + + if (func->num == 2) { + brcmf_cfg80211_sdio_func(func); + sd_trace(("F2 found, calling brcmf_sdio_probe...\n")); + ret = brcmf_sdio_probe(&sdmmc_dev); + } + + return ret; } -#endif /* !defined(OOB_INTR_ONLY) */ -#ifdef NOTUSED -/* Write client card reg */ -static int -sdioh_sdmmc_card_regwrite(sdioh_info_t *sd, int func, u32 regaddr, - int regsize, u32 data) +static void brcmf_ops_sdio_remove(struct sdio_func *func) { + sd_trace(("%s Enter\n", __func__)); + sd_info(("func->class=%x\n", func->class)); + sd_info(("sdio_vendor: 0x%04x\n", func->vendor)); + sd_info(("sdio_device: 0x%04x\n", func->device)); + sd_info(("Function#: 0x%04x\n", func->num)); + + if (func->num == 2) { + sd_trace(("F2 found, calling brcmf_sdio_remove...\n")); + brcmf_sdio_remove(&sdmmc_dev); + } +} - if ((func == 0) || (regsize == 1)) { - u8 temp; - temp = data & 0xff; - sdioh_request_byte(sd, SDIOH_READ, func, regaddr, &temp); - sd_data(("%s: byte write data=0x%02x\n", __func__, data)); - } else { - if (regsize == 2) - data &= 0xffff; +#ifdef CONFIG_PM +static int brcmf_sdio_suspend(struct device *dev) +{ + mmc_pm_flag_t sdio_flags; + int ret = 0; - sdioh_request_word(sd, 0, SDIOH_READ, func, regaddr, &data, - regsize); + sd_trace(("%s\n", __func__)); - sd_data(("%s: word write data=0x%08x\n", __func__, data)); + sdio_flags = sdio_get_host_pm_caps(gInstance->func[1]); + if (!(sdio_flags & MMC_PM_KEEP_POWER)) { + sd_err(("Host can't keep power while suspended\n")); + return -EINVAL; } - return SUCCESS; + ret = sdio_set_host_pm_flags(gInstance->func[1], MMC_PM_KEEP_POWER); + if (ret) { + sd_err(("Failed to set pm_flags\n")); + return ret; + } + + brcmf_sdio_wdtmr_enable(false); + + return ret; +} + +static int brcmf_sdio_resume(struct device *dev) +{ + brcmf_sdio_wdtmr_enable(true); + return 0; } -#endif /* NOTUSED */ +#endif /* CONFIG_PM */ -int sdioh_start(sdioh_info_t *si, int stage) +int brcmf_sdioh_osinit(struct sdioh_info *sd) { + struct sdos_info *sdos; + + sdos = kmalloc(sizeof(struct sdos_info), GFP_ATOMIC); + sd->sdos_info = (void *)sdos; + if (sdos == NULL) + return -ENOMEM; + + sdos->sd = sd; + spin_lock_init(&sdos->lock); return 0; } -int sdioh_stop(sdioh_info_t *si) +void brcmf_sdioh_osfree(struct sdioh_info *sd) +{ + struct sdos_info *sdos; + + sdos = (struct sdos_info *)sd->sdos_info; + kfree(sdos); +} + +/* Interrupt enable/disable */ +int brcmf_sdioh_interrupt_set(struct sdioh_info *sd, bool enable) { + unsigned long flags; + struct sdos_info *sdos; + + sd_trace(("%s: %s\n", __func__, enable ? "Enabling" : "Disabling")); + + sdos = (struct sdos_info *)sd->sdos_info; + + if (enable && !(sd->intr_handler && sd->intr_handler_arg)) { + sd_err(("%s: no handler registered, will not enable\n", + __func__)); + return -EINVAL; + } + + /* Ensure atomicity for enable/disable calls */ + spin_lock_irqsave(&sdos->lock, flags); + + sd->client_intr_enabled = enable; + if (enable) + brcmf_sdioh_dev_intr_on(sd); + else + brcmf_sdioh_dev_intr_off(sd); + + spin_unlock_irqrestore(&sdos->lock, flags); + return 0; } + +/* + * module init +*/ +int brcmf_sdio_function_init(void) +{ + int error = 0; + sd_trace(("brcmf_sdio_function_init: %s Enter\n", __func__)); + + gInstance = kzalloc(sizeof(struct brcmf_sdmmc_instance), GFP_KERNEL); + if (!gInstance) + return -ENOMEM; + + memset(&sdmmc_dev, 0, sizeof(sdmmc_dev)); + error = sdio_register_driver(&brcmf_sdmmc_driver); + + return error; +} + +/* + * module cleanup +*/ +void brcmf_sdio_function_cleanup(void) +{ + sd_trace(("%s Enter\n", __func__)); + + sdio_unregister_driver(&brcmf_sdmmc_driver); + + kfree(gInstance); +} diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h deleted file mode 100644 index 3ef42b31849..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc.h +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef __BCMSDH_SDMMC_H__ -#define __BCMSDH_SDMMC_H__ - -#ifdef BCMDBG -#define sd_err(x) \ - do { \ - if ((sd_msglevel & SDH_ERROR_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#define sd_trace(x) \ - do { \ - if ((sd_msglevel & SDH_TRACE_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#define sd_info(x) \ - do { \ - if ((sd_msglevel & SDH_INFO_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#define sd_debug(x) \ - do { \ - if ((sd_msglevel & SDH_DEBUG_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#define sd_data(x) \ - do { \ - if ((sd_msglevel & SDH_DATA_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#define sd_ctrl(x) \ - do { \ - if ((sd_msglevel & SDH_CTRL_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#else -#define sd_err(x) -#define sd_trace(x) -#define sd_info(x) -#define sd_debug(x) -#define sd_data(x) -#define sd_ctrl(x) -#endif - -/* Allocate/init/free per-OS private data */ -extern int sdioh_sdmmc_osinit(sdioh_info_t *sd); -extern void sdioh_sdmmc_osfree(sdioh_info_t *sd); - -#define BLOCK_SIZE_64 64 -#define BLOCK_SIZE_512 512 -#define BLOCK_SIZE_4318 64 -#define BLOCK_SIZE_4328 512 - -/* internal return code */ -#define SUCCESS 0 -#define ERROR 1 - -/* private bus modes */ -#define SDIOH_MODE_SD4 2 -#define CLIENT_INTR 0x100 /* Get rid of this! */ - -struct sdioh_info { - struct osl_info *osh; /* osh handler */ - bool client_intr_enabled; /* interrupt connnected flag */ - bool intr_handler_valid; /* client driver interrupt handler valid */ - sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ - void *intr_handler_arg; /* argument to call interrupt handler */ - u16 intmask; /* Current active interrupts */ - void *sdos_info; /* Pointer to per-OS private data */ - - uint irq; /* Client irq */ - int intrcount; /* Client interrupts */ - bool sd_use_dma; /* DMA on CMD53 */ - bool sd_blockmode; /* sd_blockmode == false => 64 Byte Cmd 53s. */ - /* Must be on for sd_multiblock to be effective */ - bool use_client_ints; /* If this is false, make sure to restore */ - int sd_mode; /* SD1/SD4/SPI */ - int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ - u8 num_funcs; /* Supported funcs on client */ - u32 com_cis_ptr; - u32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; - uint max_dma_len; - uint max_dma_descriptors; /* DMA Descriptors supported by this controller. */ - /* SDDMA_DESCRIPTOR SGList[32]; *//* Scatter/Gather DMA List */ -}; - -/************************************************************ - * Internal interfaces: per-port references into bcmsdh_sdmmc.c - */ - -/* Global message bits */ -extern uint sd_msglevel; - -/* OS-independent interrupt handler */ -extern bool check_client_intr(sdioh_info_t *sd); - -/* Core interrupt enable/disable of device interrupts */ -extern void sdioh_sdmmc_devintr_on(sdioh_info_t *sd); -extern void sdioh_sdmmc_devintr_off(sdioh_info_t *sd); - -/************************************************************** - * Internal interfaces: bcmsdh_sdmmc.c references to per-port code - */ - -/* Register mapping routines */ -extern u32 *sdioh_sdmmc_reg_map(s32 addr, int size); -extern void sdioh_sdmmc_reg_unmap(s32 addr, int size); - -/* Interrupt (de)registration routines */ -extern int sdioh_sdmmc_register_irq(sdioh_info_t *sd, uint irq); -extern void sdioh_sdmmc_free_irq(uint irq, sdioh_info_t *sd); - -typedef struct _BCMSDH_SDMMC_INSTANCE { - sdioh_info_t *sd; - struct sdio_func *func[SDIOD_MAX_IOFUNCS]; - u32 host_claimed; -} BCMSDH_SDMMC_INSTANCE, *PBCMSDH_SDMMC_INSTANCE; - -#endif /* __BCMSDH_SDMMC_H__ */ diff --git a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c b/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c deleted file mode 100644 index 2792a4dfe65..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/bcmsdh_sdmmc_linux.c +++ /dev/null @@ -1,235 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include <linux/types.h> -#include <linux/sched.h> /* request_irq() */ -#include <linux/netdevice.h> -#include <bcmdefs.h> -#include <bcmutils.h> -#include <sdio.h> /* SDIO Specs */ -#include <bcmsdbus.h> /* bcmsdh to/from specific controller APIs */ -#include <sdiovar.h> /* to get msglevel bit values */ - -#include <linux/mmc/core.h> -#include <linux/mmc/card.h> -#include <linux/mmc/sdio_func.h> -#include <linux/mmc/sdio_ids.h> - -#include "dngl_stats.h" -#include "dhd.h" - -#if !defined(SDIO_VENDOR_ID_BROADCOM) -#define SDIO_VENDOR_ID_BROADCOM 0x02d0 -#endif /* !defined(SDIO_VENDOR_ID_BROADCOM) */ - -#define SDIO_DEVICE_ID_BROADCOM_DEFAULT 0x0000 - -#if !defined(SDIO_DEVICE_ID_BROADCOM_4325_SDGWB) -#define SDIO_DEVICE_ID_BROADCOM_4325_SDGWB 0x0492 /* BCM94325SDGWB */ -#endif /* !defined(SDIO_DEVICE_ID_BROADCOM_4325_SDGWB) */ -#if !defined(SDIO_DEVICE_ID_BROADCOM_4325) -#define SDIO_DEVICE_ID_BROADCOM_4325 0x0493 -#endif /* !defined(SDIO_DEVICE_ID_BROADCOM_4325) */ -#if !defined(SDIO_DEVICE_ID_BROADCOM_4329) -#define SDIO_DEVICE_ID_BROADCOM_4329 0x4329 -#endif /* !defined(SDIO_DEVICE_ID_BROADCOM_4329) */ -#if !defined(SDIO_DEVICE_ID_BROADCOM_4319) -#define SDIO_DEVICE_ID_BROADCOM_4319 0x4319 -#endif /* !defined(SDIO_DEVICE_ID_BROADCOM_4329) */ - -#include <bcmsdh_sdmmc.h> - -#include <dhd_dbg.h> -#include <wl_cfg80211.h> - -extern void sdioh_sdmmc_devintr_off(sdioh_info_t *sd); -extern void sdioh_sdmmc_devintr_on(sdioh_info_t *sd); - -int sdio_function_init(void); -void sdio_function_cleanup(void); - -/* module param defaults */ -static int clockoverride; - -module_param(clockoverride, int, 0644); -MODULE_PARM_DESC(clockoverride, "SDIO card clock override"); - -PBCMSDH_SDMMC_INSTANCE gInstance; - -/* Maximum number of bcmsdh_sdmmc devices supported by driver */ -#define BCMSDH_SDMMC_MAX_DEVICES 1 - -extern int bcmsdh_probe(struct device *dev); -extern int bcmsdh_remove(struct device *dev); -struct device sdmmc_dev; - -static int bcmsdh_sdmmc_probe(struct sdio_func *func, - const struct sdio_device_id *id) -{ - int ret = 0; - static struct sdio_func sdio_func_0; - sd_trace(("bcmsdh_sdmmc: %s Enter\n", __func__)); - sd_trace(("sdio_bcmsdh: func->class=%x\n", func->class)); - sd_trace(("sdio_vendor: 0x%04x\n", func->vendor)); - sd_trace(("sdio_device: 0x%04x\n", func->device)); - sd_trace(("Function#: 0x%04x\n", func->num)); - - if (func->num == 1) { - sdio_func_0.num = 0; - sdio_func_0.card = func->card; - gInstance->func[0] = &sdio_func_0; - if (func->device == 0x4) { /* 4318 */ - gInstance->func[2] = NULL; - sd_trace(("NIC found, calling bcmsdh_probe...\n")); - ret = bcmsdh_probe(&sdmmc_dev); - } - } - - gInstance->func[func->num] = func; - - if (func->num == 2) { - wl_cfg80211_sdio_func(func); - sd_trace(("F2 found, calling bcmsdh_probe...\n")); - ret = bcmsdh_probe(&sdmmc_dev); - } - - return ret; -} - -static void bcmsdh_sdmmc_remove(struct sdio_func *func) -{ - sd_trace(("bcmsdh_sdmmc: %s Enter\n", __func__)); - sd_info(("sdio_bcmsdh: func->class=%x\n", func->class)); - sd_info(("sdio_vendor: 0x%04x\n", func->vendor)); - sd_info(("sdio_device: 0x%04x\n", func->device)); - sd_info(("Function#: 0x%04x\n", func->num)); - - if (func->num == 2) { - sd_trace(("F2 found, calling bcmsdh_remove...\n")); - bcmsdh_remove(&sdmmc_dev); - } -} - -/* devices we support, null terminated */ -static const struct sdio_device_id bcmsdh_sdmmc_ids[] = { - {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_DEFAULT)}, - {SDIO_DEVICE - (SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4325_SDGWB)}, - {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4325)}, - {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4329)}, - {SDIO_DEVICE(SDIO_VENDOR_ID_BROADCOM, SDIO_DEVICE_ID_BROADCOM_4319)}, - { /* end: all zeroes */ }, -}; - -MODULE_DEVICE_TABLE(sdio, bcmsdh_sdmmc_ids); - -static struct sdio_driver bcmsdh_sdmmc_driver = { - .probe = bcmsdh_sdmmc_probe, - .remove = bcmsdh_sdmmc_remove, - .name = "brcmfmac", - .id_table = bcmsdh_sdmmc_ids, -}; - -struct sdos_info { - sdioh_info_t *sd; - spinlock_t lock; -}; - -int sdioh_sdmmc_osinit(sdioh_info_t *sd) -{ - struct sdos_info *sdos; - - sdos = kmalloc(sizeof(struct sdos_info), GFP_ATOMIC); - sd->sdos_info = (void *)sdos; - if (sdos == NULL) - return -ENOMEM; - - sdos->sd = sd; - spin_lock_init(&sdos->lock); - return 0; -} - -void sdioh_sdmmc_osfree(sdioh_info_t *sd) -{ - struct sdos_info *sdos; - ASSERT(sd && sd->sdos_info); - - sdos = (struct sdos_info *)sd->sdos_info; - kfree(sdos); -} - -/* Interrupt enable/disable */ -SDIOH_API_RC sdioh_interrupt_set(sdioh_info_t *sd, bool enable) -{ - unsigned long flags; - struct sdos_info *sdos; - - sd_trace(("%s: %s\n", __func__, enable ? "Enabling" : "Disabling")); - - sdos = (struct sdos_info *)sd->sdos_info; - ASSERT(sdos); - -#if !defined(OOB_INTR_ONLY) - if (enable && !(sd->intr_handler && sd->intr_handler_arg)) { - sd_err(("%s: no handler registered, will not enable\n", - __func__)); - return SDIOH_API_RC_FAIL; - } -#endif /* !defined(OOB_INTR_ONLY) */ - - /* Ensure atomicity for enable/disable calls */ - spin_lock_irqsave(&sdos->lock, flags); - - sd->client_intr_enabled = enable; - if (enable) - sdioh_sdmmc_devintr_on(sd); - else - sdioh_sdmmc_devintr_off(sd); - - spin_unlock_irqrestore(&sdos->lock, flags); - - return SDIOH_API_RC_SUCCESS; -} - -/* - * module init -*/ -int sdio_function_init(void) -{ - int error = 0; - sd_trace(("bcmsdh_sdmmc: %s Enter\n", __func__)); - - gInstance = kzalloc(sizeof(BCMSDH_SDMMC_INSTANCE), GFP_KERNEL); - if (!gInstance) - return -ENOMEM; - - memset(&sdmmc_dev, 0, sizeof(sdmmc_dev)); - error = sdio_register_driver(&bcmsdh_sdmmc_driver); - - return error; -} - -/* - * module cleanup -*/ -extern int bcmsdh_remove(struct device *dev); -void sdio_function_cleanup(void) -{ - sd_trace(("%s Enter\n", __func__)); - - sdio_unregister_driver(&bcmsdh_sdmmc_driver); - - kfree(gInstance); -} diff --git a/drivers/staging/brcm80211/brcmfmac/dhd.h b/drivers/staging/brcm80211/brcmfmac/dhd.h index a726b493ea8..82bf04df16d 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd.h @@ -18,51 +18,539 @@ * Common types * */ -#ifndef _dhd_h_ -#define _dhd_h_ - -#include <linux/sched.h> -#include <linux/init.h> -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/skbuff.h> -#include <linux/netdevice.h> -#include <linux/etherdevice.h> -#include <linux/random.h> -#include <linux/spinlock.h> -#include <linux/ethtool.h> -#include <linux/suspend.h> -#include <asm/uaccess.h> -#include <asm/unaligned.h> -/* The kernel threading is sdio-specific */ - -#include <wlioctl.h> - -/* Forward decls */ -struct dhd_bus; -struct dhd_prot; -struct dhd_info; +#ifndef _BRCMF_H_ +#define _BRCMF_H_ + +#define BRCMF_VERSION_STR "4.218.248.5" + +#define BRCMF_C_IOCTL_SMLEN 256 /* "small" ioctl buffer required */ +#define BRCMF_C_IOCTL_MEDLEN 1536 /* "med" ioctl buffer required */ +#define BRCMF_C_IOCTL_MAXLEN 8192 + +#define BRCMF_C_UP 2 +#define BRCMF_C_SET_PROMISC 10 +#define BRCMF_C_GET_RATE 12 +#define BRCMF_C_GET_INFRA 19 +#define BRCMF_C_SET_INFRA 20 +#define BRCMF_C_GET_AUTH 21 +#define BRCMF_C_SET_AUTH 22 +#define BRCMF_C_GET_BSSID 23 +#define BRCMF_C_GET_SSID 25 +#define BRCMF_C_SET_SSID 26 +#define BRCMF_C_GET_CHANNEL 29 +#define BRCMF_C_GET_SRL 31 +#define BRCMF_C_GET_LRL 33 +#define BRCMF_C_GET_RADIO 37 +#define BRCMF_C_SET_RADIO 38 +#define BRCMF_C_GET_PHYTYPE 39 +#define BRCMF_C_SET_KEY 45 +#define BRCMF_C_SET_PASSIVE_SCAN 49 +#define BRCMF_C_SCAN 50 +#define BRCMF_C_SCAN_RESULTS 51 +#define BRCMF_C_DISASSOC 52 +#define BRCMF_C_REASSOC 53 +#define BRCMF_C_SET_ROAM_TRIGGER 55 +#define BRCMF_C_SET_ROAM_DELTA 57 +#define BRCMF_C_GET_DTIMPRD 77 +#define BRCMF_C_SET_COUNTRY 84 +#define BRCMF_C_GET_PM 85 +#define BRCMF_C_SET_PM 86 +#define BRCMF_C_GET_AP 117 +#define BRCMF_C_SET_AP 118 +#define BRCMF_C_GET_RSSI 127 +#define BRCMF_C_GET_WSEC 133 +#define BRCMF_C_SET_WSEC 134 +#define BRCMF_C_GET_PHY_NOISE 135 +#define BRCMF_C_GET_BSS_INFO 136 +#define BRCMF_C_SET_SCAN_CHANNEL_TIME 185 +#define BRCMF_C_SET_SCAN_UNASSOC_TIME 187 +#define BRCMF_C_SCB_DEAUTHENTICATE_FOR_REASON 201 +#define BRCMF_C_GET_VALID_CHANNELS 217 +#define BRCMF_C_GET_KEY_PRIMARY 235 +#define BRCMF_C_SET_KEY_PRIMARY 236 +#define BRCMF_C_SET_SCAN_PASSIVE_TIME 258 +#define BRCMF_C_GET_VAR 262 +#define BRCMF_C_SET_VAR 263 + +/* phy types (returned by WLC_GET_PHYTPE) */ +#define WLC_PHY_TYPE_A 0 +#define WLC_PHY_TYPE_B 1 +#define WLC_PHY_TYPE_G 2 +#define WLC_PHY_TYPE_N 4 +#define WLC_PHY_TYPE_LP 5 +#define WLC_PHY_TYPE_SSN 6 +#define WLC_PHY_TYPE_HT 7 +#define WLC_PHY_TYPE_LCN 8 +#define WLC_PHY_TYPE_NULL 0xf + +#define BRCMF_PKT_FILTER_FIXED_LEN offsetof(struct brcmf_pkt_filter, u) +#define BRCMF_PKT_FILTER_PATTERN_FIXED_LEN \ + offsetof(struct brcmf_pkt_filter_pattern, mask_and_pattern) + +#define BRCMF_EVENTING_MASK_LEN 16 + +#define TOE_TX_CSUM_OL 0x00000001 +#define TOE_RX_CSUM_OL 0x00000002 + +/* maximum channels returned by the get valid channels iovar */ +#define WL_NUMCHANNELS 64 + +#define BRCMF_BSS_INFO_VERSION 108 /* current ver of brcmf_bss_info struct */ + +/* size of brcmf_scan_params not including variable length array */ +#define BRCMF_SCAN_PARAMS_FIXED_SIZE 64 + +/* masks for channel and ssid count */ +#define BRCMF_SCAN_PARAMS_COUNT_MASK 0x0000ffff +#define BRCMF_SCAN_PARAMS_NSSID_SHIFT 16 + +#define BRCMF_SCAN_ACTION_START 1 +#define BRCMF_SCAN_ACTION_CONTINUE 2 +#define WL_SCAN_ACTION_ABORT 3 + +#define BRCMF_ISCAN_REQ_VERSION 1 + +/* brcmf_iscan_results status values */ +#define BRCMF_SCAN_RESULTS_SUCCESS 0 +#define BRCMF_SCAN_RESULTS_PARTIAL 1 +#define BRCMF_SCAN_RESULTS_PENDING 2 +#define BRCMF_SCAN_RESULTS_ABORTED 3 +#define BRCMF_SCAN_RESULTS_NO_MEM 4 + +#define WL_SOFT_KEY (1 << 0) /* Indicates this key is using soft encrypt */ +#define BRCMF_PRIMARY_KEY (1 << 1) /* primary (ie tx) key */ +#define WL_KF_RES_4 (1 << 4) /* Reserved for backward compat */ +#define WL_KF_RES_5 (1 << 5) /* Reserved for backward compat */ +#define WL_IBSS_PEER_GROUP_KEY (1 << 6) /* Indicates a group key for a IBSS PEER */ + +/* For supporting multiple interfaces */ +#define BRCMF_MAX_IFS 16 +#define BRCMF_DEL_IF -0xe +#define BRCMF_BAD_IF -0xf + +#define DOT11_BSSTYPE_ANY 2 +#define DOT11_MAX_DEFAULT_KEYS 4 + +#define BRCMF_EVENT_MSG_LINK 0x01 +#define BRCMF_EVENT_MSG_FLUSHTXQ 0x02 +#define BRCMF_EVENT_MSG_GROUP 0x04 + +struct brcmf_event_msg { + u16 version; + u16 flags; + u32 event_type; + u32 status; + u32 reason; + u32 auth_type; + u32 datalen; + u8 addr[ETH_ALEN]; + char ifname[IFNAMSIZ]; +} __packed; + +struct brcm_ethhdr { + u16 subtype; + u16 length; + u8 version; + u8 oui[3]; + u16 usr_subtype; +} __packed; + +struct brcmf_event { + struct ethhdr eth; + struct brcm_ethhdr hdr; + struct brcmf_event_msg msg; +} __packed; + +struct dngl_stats { + unsigned long rx_packets; /* total packets received */ + unsigned long tx_packets; /* total packets transmitted */ + unsigned long rx_bytes; /* total bytes received */ + unsigned long tx_bytes; /* total bytes transmitted */ + unsigned long rx_errors; /* bad packets received */ + unsigned long tx_errors; /* packet transmit problems */ + unsigned long rx_dropped; /* packets dropped by dongle */ + unsigned long tx_dropped; /* packets dropped by dongle */ + unsigned long multicast; /* multicast packets received */ +}; + +#define BRCMF_E_SET_SSID 0 +#define BRCMF_E_JOIN 1 +#define BRCMF_E_START 2 +#define BRCMF_E_AUTH 3 +#define BRCMF_E_AUTH_IND 4 +#define BRCMF_E_DEAUTH 5 +#define BRCMF_E_DEAUTH_IND 6 +#define BRCMF_E_ASSOC 7 +#define BRCMF_E_ASSOC_IND 8 +#define BRCMF_E_REASSOC 9 +#define BRCMF_E_REASSOC_IND 10 +#define BRCMF_E_DISASSOC 11 +#define BRCMF_E_DISASSOC_IND 12 +#define BRCMF_E_QUIET_START 13 +#define BRCMF_E_QUIET_END 14 +#define BRCMF_E_BEACON_RX 15 +#define BRCMF_E_LINK 16 +#define BRCMF_E_MIC_ERROR 17 +#define BRCMF_E_NDIS_LINK 18 +#define BRCMF_E_ROAM 19 +#define BRCMF_E_TXFAIL 20 +#define BRCMF_E_PMKID_CACHE 21 +#define BRCMF_E_RETROGRADE_TSF 22 +#define BRCMF_E_PRUNE 23 +#define BRCMF_E_AUTOAUTH 24 +#define BRCMF_E_EAPOL_MSG 25 +#define BRCMF_E_SCAN_COMPLETE 26 +#define BRCMF_E_ADDTS_IND 27 +#define BRCMF_E_DELTS_IND 28 +#define BRCMF_E_BCNSENT_IND 29 +#define BRCMF_E_BCNRX_MSG 30 +#define BRCMF_E_BCNLOST_MSG 31 +#define BRCMF_E_ROAM_PREP 32 +#define BRCMF_E_PFN_NET_FOUND 33 +#define BRCMF_E_PFN_NET_LOST 34 +#define BRCMF_E_RESET_COMPLETE 35 +#define BRCMF_E_JOIN_START 36 +#define BRCMF_E_ROAM_START 37 +#define BRCMF_E_ASSOC_START 38 +#define BRCMF_E_IBSS_ASSOC 39 +#define BRCMF_E_RADIO 40 +#define BRCMF_E_PSM_WATCHDOG 41 +#define BRCMF_E_PROBREQ_MSG 44 +#define BRCMF_E_SCAN_CONFIRM_IND 45 +#define BRCMF_E_PSK_SUP 46 +#define BRCMF_E_COUNTRY_CODE_CHANGED 47 +#define BRCMF_E_EXCEEDED_MEDIUM_TIME 48 +#define BRCMF_E_ICV_ERROR 49 +#define BRCMF_E_UNICAST_DECODE_ERROR 50 +#define BRCMF_E_MULTICAST_DECODE_ERROR 51 +#define BRCMF_E_TRACE 52 +#define BRCMF_E_IF 54 +#define BRCMF_E_RSSI 56 +#define BRCMF_E_PFN_SCAN_COMPLETE 57 +#define BRCMF_E_EXTLOG_MSG 58 +#define BRCMF_E_ACTION_FRAME 59 +#define BRCMF_E_ACTION_FRAME_COMPLETE 60 +#define BRCMF_E_PRE_ASSOC_IND 61 +#define BRCMF_E_PRE_REASSOC_IND 62 +#define BRCMF_E_CHANNEL_ADOPTED 63 +#define BRCMF_E_AP_STARTED 64 +#define BRCMF_E_DFS_AP_STOP 65 +#define BRCMF_E_DFS_AP_RESUME 66 +#define BRCMF_E_RESERVED1 67 +#define BRCMF_E_RESERVED2 68 +#define BRCMF_E_ESCAN_RESULT 69 +#define BRCMF_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70 +#define BRCMF_E_DCS_REQUEST 73 + +#define BRCMF_E_FIFO_CREDIT_MAP 74 + +#define BRCMF_E_LAST 75 + +#define BRCMF_E_STATUS_SUCCESS 0 +#define BRCMF_E_STATUS_FAIL 1 +#define BRCMF_E_STATUS_TIMEOUT 2 +#define BRCMF_E_STATUS_NO_NETWORKS 3 +#define BRCMF_E_STATUS_ABORT 4 +#define BRCMF_E_STATUS_NO_ACK 5 +#define BRCMF_E_STATUS_UNSOLICITED 6 +#define BRCMF_E_STATUS_ATTEMPT 7 +#define BRCMF_E_STATUS_PARTIAL 8 +#define BRCMF_E_STATUS_NEWSCAN 9 +#define BRCMF_E_STATUS_NEWASSOC 10 +#define BRCMF_E_STATUS_11HQUIET 11 +#define BRCMF_E_STATUS_SUPPRESS 12 +#define BRCMF_E_STATUS_NOCHANS 13 +#define BRCMF_E_STATUS_CS_ABORT 15 +#define BRCMF_E_STATUS_ERROR 16 + +#define BRCMF_E_REASON_INITIAL_ASSOC 0 +#define BRCMF_E_REASON_LOW_RSSI 1 +#define BRCMF_E_REASON_DEAUTH 2 +#define BRCMF_E_REASON_DISASSOC 3 +#define BRCMF_E_REASON_BCNS_LOST 4 +#define BRCMF_E_REASON_MINTXRATE 9 +#define BRCMF_E_REASON_TXFAIL 10 + +#define BRCMF_E_REASON_FAST_ROAM_FAILED 5 +#define BRCMF_E_REASON_DIRECTED_ROAM 6 +#define BRCMF_E_REASON_TSPEC_REJECTED 7 +#define BRCMF_E_REASON_BETTER_AP 8 + +#define BRCMF_E_PRUNE_ENCR_MISMATCH 1 +#define BRCMF_E_PRUNE_BCAST_BSSID 2 +#define BRCMF_E_PRUNE_MAC_DENY 3 +#define BRCMF_E_PRUNE_MAC_NA 4 +#define BRCMF_E_PRUNE_REG_PASSV 5 +#define BRCMF_E_PRUNE_SPCT_MGMT 6 +#define BRCMF_E_PRUNE_RADAR 7 +#define BRCMF_E_RSN_MISMATCH 8 +#define BRCMF_E_PRUNE_NO_COMMON_RATES 9 +#define BRCMF_E_PRUNE_BASIC_RATES 10 +#define BRCMF_E_PRUNE_CIPHER_NA 12 +#define BRCMF_E_PRUNE_KNOWN_STA 13 +#define BRCMF_E_PRUNE_WDS_PEER 15 +#define BRCMF_E_PRUNE_QBSS_LOAD 16 +#define BRCMF_E_PRUNE_HOME_AP 17 + +#define BRCMF_E_SUP_OTHER 0 +#define BRCMF_E_SUP_DECRYPT_KEY_DATA 1 +#define BRCMF_E_SUP_BAD_UCAST_WEP128 2 +#define BRCMF_E_SUP_BAD_UCAST_WEP40 3 +#define BRCMF_E_SUP_UNSUP_KEY_LEN 4 +#define BRCMF_E_SUP_PW_KEY_CIPHER 5 +#define BRCMF_E_SUP_MSG3_TOO_MANY_IE 6 +#define BRCMF_E_SUP_MSG3_IE_MISMATCH 7 +#define BRCMF_E_SUP_NO_INSTALL_FLAG 8 +#define BRCMF_E_SUP_MSG3_NO_GTK 9 +#define BRCMF_E_SUP_GRP_KEY_CIPHER 10 +#define BRCMF_E_SUP_GRP_MSG1_NO_GTK 11 +#define BRCMF_E_SUP_GTK_DECRYPT_FAIL 12 +#define BRCMF_E_SUP_SEND_FAIL 13 +#define BRCMF_E_SUP_DEAUTH 14 + +#define BRCMF_E_IF_ADD 1 +#define BRCMF_E_IF_DEL 2 +#define BRCMF_E_IF_CHANGE 3 + +#define BRCMF_E_IF_ROLE_STA 0 +#define BRCMF_E_IF_ROLE_AP 1 +#define BRCMF_E_IF_ROLE_WDS 2 + +#define BRCMF_E_LINK_BCN_LOSS 1 +#define BRCMF_E_LINK_DISASSOC 2 +#define BRCMF_E_LINK_ASSOC_REC 3 +#define BRCMF_E_LINK_BSSCFG_DIS 4 /* The level of bus communication with the dongle */ -enum dhd_bus_state { - DHD_BUS_DOWN, /* Not ready for frame transfers */ - DHD_BUS_LOAD, /* Download access only (CPU reset) */ - DHD_BUS_DATA /* Ready for frame transfers */ +enum brcmf_bus_state { + BRCMF_BUS_DOWN, /* Not ready for frame transfers */ + BRCMF_BUS_LOAD, /* Download access only (CPU reset) */ + BRCMF_BUS_DATA /* Ready for frame transfers */ +}; + +/* Pattern matching filter. Specifies an offset within received packets to + * start matching, the pattern to match, the size of the pattern, and a bitmask + * that indicates which bits within the pattern should be matched. + */ +struct brcmf_pkt_filter_pattern { + u32 offset; /* Offset within received packet to start pattern matching. + * Offset '0' is the first byte of the ethernet header. + */ + u32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ + u8 mask_and_pattern[1]; /* Variable length mask and pattern data. mask starts + * at offset 0. Pattern immediately follows mask. + */ +}; + +/* IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ +struct brcmf_pkt_filter { + u32 id; /* Unique filter id, specified by app. */ + u32 type; /* Filter type (WL_PKT_FILTER_TYPE_xxx). */ + u32 negate_match; /* Negate the result of filter matches */ + union { /* Filter definitions */ + struct brcmf_pkt_filter_pattern pattern; /* Filter pattern */ + } u; +}; + +/* IOVAR "pkt_filter_enable" parameter. */ +struct brcmf_pkt_filter_enable { + u32 id; /* Unique filter id */ + u32 enable; /* Enable/disable bool */ +}; + +/* BSS info structure + * Applications MUST CHECK ie_offset field and length field to access IEs and + * next bss_info structure in a vector (in struct brcmf_scan_results) + */ +struct brcmf_bss_info { + u32 version; /* version field */ + u32 length; /* byte length of data in this record, + * starting at version and including IEs + */ + u8 BSSID[ETH_ALEN]; + u16 beacon_period; /* units are Kusec */ + u16 capability; /* Capability information */ + u8 SSID_len; + u8 SSID[32]; + struct { + uint count; /* # rates in this set */ + u8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ + } rateset; /* supported rates */ + chanspec_t chanspec; /* chanspec for bss */ + u16 atim_window; /* units are Kusec */ + u8 dtim_period; /* DTIM period */ + s16 RSSI; /* receive signal strength (in dBm) */ + s8 phy_noise; /* noise (in dBm) */ + + u8 n_cap; /* BSS is 802.11N Capable */ + u32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */ + u8 ctl_ch; /* 802.11N BSS control channel number */ + u32 reserved32[1]; /* Reserved for expansion of BSS properties */ + u8 flags; /* flags */ + u8 reserved[3]; /* Reserved for expansion of BSS properties */ + u8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */ + + u16 ie_offset; /* offset at which IEs start, from beginning */ + u32 ie_length; /* byte length of Information Elements */ + s16 SNR; /* average SNR of during frame reception */ + /* Add new fields here */ + /* variable length Information Elements */ +}; + +struct brcmf_ssid { + u32 SSID_len; + unsigned char SSID[32]; +}; + +struct brcmf_scan_params { + struct brcmf_ssid ssid; /* default: {0, ""} */ + u8 bssid[ETH_ALEN]; /* default: bcast */ + s8 bss_type; /* default: any, + * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT + */ + u8 scan_type; /* flags, 0 use default */ + s32 nprobes; /* -1 use default, number of probes per channel */ + s32 active_time; /* -1 use default, dwell time per channel for + * active scanning + */ + s32 passive_time; /* -1 use default, dwell time per channel + * for passive scanning + */ + s32 home_time; /* -1 use default, dwell time for the home channel + * between channel scans + */ + s32 channel_num; /* count of channels and ssids that follow + * + * low half is count of channels in + * channel_list, 0 means default (use all + * available channels) + * + * high half is entries in struct brcmf_ssid + * array that follows channel_list, aligned for + * s32 (4 bytes) meaning an odd channel count + * implies a 2-byte pad between end of + * channel_list and first ssid + * + * if ssid count is zero, single ssid in the + * fixed parameter portion is assumed, otherwise + * ssid in the fixed portion is ignored + */ + u16 channel_list[1]; /* list of chanspecs */ +}; + +/* incremental scan struct */ +struct brcmf_iscan_params { + u32 version; + u16 action; + u16 scan_duration; + struct brcmf_scan_params params; +}; + +/* 3 fields + size of brcmf_scan_params, not including variable length array */ +#define BRCMF_ISCAN_PARAMS_FIXED_SIZE \ + (offsetof(struct brcmf_iscan_params, params) + \ + sizeof(struct brcmf_ssid)) + +struct brcmf_scan_results { + u32 buflen; + u32 version; + u32 count; + struct brcmf_bss_info bss_info[1]; +}; + +/* used for association with a specific BSSID and chanspec list */ +struct brcmf_assoc_params { + u8 bssid[ETH_ALEN]; /* 00:00:00:00:00:00: broadcast scan */ + s32 chanspec_num; /* 0: all available channels, + * otherwise count of chanspecs in chanspec_list + */ + chanspec_t chanspec_list[1]; /* list of chanspecs */ +}; +#define BRCMF_ASSOC_PARAMS_FIXED_SIZE \ + (sizeof(struct brcmf_assoc_params) - sizeof(chanspec_t)) + +/* used for join with or without a specific bssid and channel list */ +struct brcmf_join_params { + struct brcmf_ssid ssid; + struct brcmf_assoc_params params; +}; + +/* size of brcmf_scan_results not including variable length array */ +#define BRCMF_SCAN_RESULTS_FIXED_SIZE \ + (sizeof(struct brcmf_scan_results) - sizeof(struct brcmf_bss_info)) + +/* incremental scan results struct */ +struct brcmf_iscan_results { + u32 status; + struct brcmf_scan_results results; +}; + +/* size of brcmf_iscan_results not including variable length array */ +#define BRCMF_ISCAN_RESULTS_FIXED_SIZE \ + (BRCMF_SCAN_RESULTS_FIXED_SIZE + \ + offsetof(struct brcmf_iscan_results, results)) + +struct brcmf_wsec_key { + u32 index; /* key index */ + u32 len; /* key length */ + u8 data[WLAN_MAX_KEY_LEN]; /* key data */ + u32 pad_1[18]; + u32 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ + u32 flags; /* misc flags */ + u32 pad_2[2]; + int pad_3; + int iv_initialized; /* has IV been initialized already? */ + int pad_4; + /* Rx IV */ + struct { + u32 hi; /* upper 32 bits of IV */ + u16 lo; /* lower 16 bits of IV */ + } rxiv; + u32 pad_5[2]; + u8 ea[ETH_ALEN]; /* per station */ +}; + +/* Used to get specific STA parameters */ +struct brcmf_scb_val { + u32 val; + u8 ea[ETH_ALEN]; +}; + +/* channel encoding */ +struct brcmf_channel_info { + int hw_channel; + int target_channel; + int scan_channel; }; +/* Linux network driver ioctl encoding */ +struct brcmf_ioctl { + uint cmd; /* common ioctl definition */ + void *buf; /* pointer to user buffer */ + uint len; /* length of user buffer */ + u8 set; /* get or set request (optional) */ + uint used; /* bytes read or written (optional) */ + uint needed; /* bytes needed (optional) */ +}; + +/* Forward decls for struct brcmf_pub (see below) */ +struct brcmf_bus; /* device bus info */ +struct brcmf_proto; /* device communication protocol info */ +struct brcmf_info; /* device driver info */ + /* Common structure for module and instance linkage */ -typedef struct dhd_pub { +struct brcmf_pub { /* Linkage ponters */ - struct dhd_bus *bus; /* Bus module handle */ - struct dhd_prot *prot; /* Protocol module handle */ - struct dhd_info *info; /* Info module handle */ + struct brcmf_bus *bus; + struct brcmf_proto *prot; + struct brcmf_info *info; - /* Internal dhd items */ + /* Internal brcmf items */ bool up; /* Driver up/down (to OS) */ bool txoff; /* Transmit flow-controlled */ bool dongle_reset; /* true = DEVRESET put dongle into reset */ - enum dhd_bus_state busstate; - uint hdrlen; /* Total DHD header length (proto + bus) */ + enum brcmf_bus_state busstate; + uint hdrlen; /* Total BRCMF header length (proto + bus) */ uint maxctl; /* Max size rxctl request from proto to bus */ uint rxsz; /* Rx buffer size bus module should use */ u8 wme_dp; /* wme discard priority */ @@ -71,7 +559,7 @@ typedef struct dhd_pub { bool iswl; /* Dongle-resident driver is wl */ unsigned long drv_version; /* Version of dongle-resident driver */ u8 mac[ETH_ALEN]; /* MAC address obtained from dongle */ - dngl_stats_t dstats; /* Stats for dongle-based data */ + struct dngl_stats dstats; /* Stats for dongle-based data */ /* Additional stats for the bus level */ unsigned long tx_packets; /* Data packets sent to dongle */ @@ -88,7 +576,7 @@ typedef struct dhd_pub { unsigned long rx_dropped; /* Packets dropped locally (no memory) */ unsigned long rx_flushed; /* Packets flushed due to unscheduled sendup thread */ - unsigned long wd_dpc_sched; /* Number of times dhd dpc scheduled by + unsigned long wd_dpc_sched; /* Number of times dpc scheduled by watchdog timer */ unsigned long rx_readahead_cnt; /* Number of packets where header read-ahead @@ -108,40 +596,51 @@ typedef struct dhd_pub { int suspend_disable_flag; /* "1" to disable all extra powersaving during suspend */ int in_suspend; /* flag set to 1 when early suspend called */ -#ifdef PNO_SUPPORT - int pno_enable; /* pno status : "1" is pno enable */ -#endif /* PNO_SUPPORT */ int dtim_skip; /* dtim skip , default 0 means wake each dtim */ /* Pkt filter defination */ char *pktfilter[100]; int pktfilter_count; - u8 country_code[WLC_CNTRY_BUF_SZ]; - char eventmask[WL_EVENTING_MASK_LEN]; + u8 country_code[BRCM_CNTRY_BUF_SZ]; + char eventmask[BRCMF_EVENTING_MASK_LEN]; + +}; + +struct brcmf_if_event { + u8 ifidx; + u8 action; + u8 flags; + u8 bssidx; +}; + +struct brcmf_timeout { + u32 limit; /* Expiration time (usec) */ + u32 increment; /* Current expiration increment (usec) */ + u32 elapsed; /* Current elapsed time (usec) */ + u32 tick; /* O/S tick time (usec) */ +}; -} dhd_pub_t; +struct bcmevent_name { + uint event; + const char *name; +}; #if defined(CONFIG_PM_SLEEP) -extern atomic_t dhd_mmc_suspend; -#define DHD_PM_RESUME_WAIT_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a); -#define _DHD_PM_RESUME_WAIT(a, b) do { \ +extern atomic_t brcmf_mmc_suspend; +#define BRCMF_PM_RESUME_WAIT_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a); +#define _BRCMF_PM_RESUME_WAIT(a, b) do { \ int retry = 0; \ - while (atomic_read(&dhd_mmc_suspend) && retry++ != b) { \ + while (atomic_read(&brcmf_mmc_suspend) && retry++ != b) { \ wait_event_timeout(a, false, HZ/100); \ } \ } while (0) -#define DHD_PM_RESUME_WAIT(a) _DHD_PM_RESUME_WAIT(a, 30) -#define DHD_PM_RESUME_WAIT_FOREVER(a) _DHD_PM_RESUME_WAIT(a, ~0) -#define DHD_PM_RESUME_RETURN_ERROR(a) \ - do { if (atomic_read(&dhd_mmc_suspend)) return a; } while (0) -#define DHD_PM_RESUME_RETURN do { \ - if (atomic_read(&dhd_mmc_suspend)) \ - return; \ - } while (0) +#define BRCMF_PM_RESUME_WAIT(a) _BRCMF_PM_RESUME_WAIT(a, 30) +#define BRCMF_PM_RESUME_RETURN_ERROR(a) \ + do { if (atomic_read(&brcmf_mmc_suspend)) return a; } while (0) -#define DHD_SPINWAIT_SLEEP_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a); -#define SPINWAIT_SLEEP(a, exp, us) do { \ +#define BRCMF_SPINWAIT_SLEEP_INIT(a) DECLARE_WAIT_QUEUE_HEAD(a); +#define BRCMF_SPINWAIT_SLEEP(a, exp, us) do { \ uint countdown = (us) + 9999; \ while ((exp) && (countdown >= 10000)) { \ wait_event_timeout(a, false, HZ/100); \ @@ -151,14 +650,12 @@ extern atomic_t dhd_mmc_suspend; #else -#define DHD_PM_RESUME_WAIT_INIT(a) -#define DHD_PM_RESUME_WAIT(a) -#define DHD_PM_RESUME_WAIT_FOREVER(a) -#define DHD_PM_RESUME_RETURN_ERROR(a) -#define DHD_PM_RESUME_RETURN +#define BRCMF_PM_RESUME_WAIT_INIT(a) +#define BRCMF_PM_RESUME_WAIT(a) +#define BRCMF_PM_RESUME_RETURN_ERROR(a) -#define DHD_SPINWAIT_SLEEP_INIT(a) -#define SPINWAIT_SLEEP(a, exp, us) do { \ +#define BRCMF_SPINWAIT_SLEEP_INIT(a) +#define BRCMF_SPINWAIT_SLEEP(a, exp, us) do { \ uint countdown = (us) + 9; \ while ((exp) && (countdown >= 10)) { \ udelay(10); \ @@ -167,29 +664,82 @@ extern atomic_t dhd_mmc_suspend; } while (0) #endif /* defined(CONFIG_PM_SLEEP) */ -#define DHD_IF_VIF 0x01 /* Virtual IF (Hidden from user) */ -static inline void MUTEX_LOCK_INIT(dhd_pub_t *dhdp) +/* + * Insmod parameters for debug/test + */ + +/* Use interrupts */ +extern uint brcmf_intr; + +/* Use polling */ +extern uint brcmf_poll; + +/* ARP offload agent mode */ +extern uint brcmf_arp_mode; + +/* ARP offload enable */ +extern uint brcmf_arp_enable; + +/* Pkt filte enable control */ +extern uint brcmf_pkt_filter_enable; + +/* Pkt filter init setup */ +extern uint brcmf_pkt_filter_init; + +/* Pkt filter mode control */ +extern uint brcmf_master_mode; + +/* Roaming mode control */ +extern uint brcmf_roam; + +/* Roaming mode control */ +extern uint brcmf_radio_up; + +/* Initial idletime ticks (may be -1 for immediate idle, 0 for no idle) */ +extern int brcmf_idletime; +#define BRCMF_IDLETIME_TICKS 1 + +/* SDIO Drive Strength */ +extern uint brcmf_sdiod_drive_strength; + +/* Override to force tx queueing all the time */ +extern uint brcmf_force_tx_queueing; + +#ifdef SDTEST +/* Echo packet generator (SDIO), pkts/s */ +extern uint brcmf_pktgen; + +/* Echo packet len (0 => sawtooth, max 1800) */ +extern uint brcmf_pktgen_len; +#define BRCMF_MAX_PKTGEN_LEN 1800 +#endif + +extern const struct bcmevent_name bcmevent_names[]; +extern const int bcmevent_names_size; + + +static inline void MUTEX_LOCK_INIT(struct brcmf_pub *drvr) { } -static inline void MUTEX_LOCK(dhd_pub_t *dhdp) +static inline void MUTEX_LOCK(struct brcmf_pub *drvr) { } -static inline void MUTEX_UNLOCK(dhd_pub_t *dhdp) +static inline void MUTEX_UNLOCK(struct brcmf_pub *drvr) { } -static inline void MUTEX_LOCK_SOFTAP_SET_INIT(dhd_pub_t *dhdp) +static inline void MUTEX_LOCK_SOFTAP_SET_INIT(struct brcmf_pub *drvr) { } -static inline void MUTEX_LOCK_SOFTAP_SET(dhd_pub_t *dhdp) +static inline void MUTEX_LOCK_SOFTAP_SET(struct brcmf_pub *drvr) { } -static inline void MUTEX_UNLOCK_SOFTAP_SET(dhd_pub_t *dhdp) +static inline void MUTEX_UNLOCK_SOFTAP_SET(struct brcmf_pub *drvr) { } @@ -205,210 +755,150 @@ static inline void MUTEX_UNLOCK_WL_SCAN_SET(void) { } -typedef struct dhd_if_event { - u8 ifidx; - u8 action; - u8 flags; - u8 bssidx; -} dhd_if_event_t; - -/* - * Exported from dhd OS modules (dhd_linux/dhd_ndis) - */ - /* Indication from bus module regarding presence/insertion of dongle. - * Return dhd_pub_t pointer, used as handle to OS module in later calls. + * Return struct brcmf_pub pointer, used as handle to OS module in later calls. * Returned structure should have bus and prot pointers filled in. * bus_hdrlen specifies required headroom for bus module header. */ -extern dhd_pub_t *dhd_attach(struct dhd_bus *bus, - uint bus_hdrlen); -extern int dhd_net_attach(dhd_pub_t *dhdp, int idx); +extern struct brcmf_pub *brcmf_attach(struct brcmf_bus *bus, + uint bus_hdrlen); +extern int brcmf_net_attach(struct brcmf_pub *drvr, int idx); +extern int brcmf_netdev_wait_pend8021x(struct net_device *dev); /* Indication from bus module regarding removal/absence of dongle */ -extern void dhd_detach(dhd_pub_t *dhdp); +extern void brcmf_detach(struct brcmf_pub *drvr); /* Indication from bus module to change flow-control state */ -extern void dhd_txflowcontrol(dhd_pub_t *dhdp, int ifidx, bool on); +extern void brcmf_txflowcontrol(struct brcmf_pub *drvr, int ifidx, bool on); -extern bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, +extern bool brcmf_c_prec_enq(struct brcmf_pub *drvr, struct pktq *q, struct sk_buff *pkt, int prec); /* Receive frame for delivery to OS. Callee disposes of rxp. */ -extern void dhd_rx_frame(dhd_pub_t *dhdp, int ifidx, +extern void brcmf_rx_frame(struct brcmf_pub *drvr, int ifidx, struct sk_buff *rxp, int numpkt); /* Return pointer to interface name */ -extern char *dhd_ifname(dhd_pub_t *dhdp, int idx); - -/* Request scheduling of the bus dpc */ -extern void dhd_sched_dpc(dhd_pub_t *dhdp); +extern char *brcmf_ifname(struct brcmf_pub *drvr, int idx); /* Notify tx completion */ -extern void dhd_txcomplete(dhd_pub_t *dhdp, struct sk_buff *txp, bool success); +extern void brcmf_txcomplete(struct brcmf_pub *drvr, struct sk_buff *txp, + bool success); /* Query ioctl */ -extern int dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, - uint len); +extern int brcmf_proto_cdc_query_ioctl(struct brcmf_pub *drvr, int ifidx, + uint cmd, void *buf, uint len); /* OS independent layer functions */ -extern int dhd_os_proto_block(dhd_pub_t *pub); -extern int dhd_os_proto_unblock(dhd_pub_t *pub); -extern int dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition, +extern int brcmf_os_proto_block(struct brcmf_pub *drvr); +extern int brcmf_os_proto_unblock(struct brcmf_pub *drvr); +extern int brcmf_os_ioctl_resp_wait(struct brcmf_pub *drvr, uint *condition, bool *pending); -extern int dhd_os_ioctl_resp_wake(dhd_pub_t *pub); -extern unsigned int dhd_os_get_ioctl_resp_timeout(void); -extern void dhd_os_set_ioctl_resp_timeout(unsigned int timeout_msec); -extern void *dhd_os_open_image(char *filename); -extern int dhd_os_get_image_block(char *buf, int len, void *image); -extern void dhd_os_close_image(void *image); -extern void dhd_os_wd_timer(void *bus, uint wdtick); -extern void dhd_os_sdlock(dhd_pub_t *pub); -extern void dhd_os_sdunlock(dhd_pub_t *pub); -extern void dhd_os_sdlock_txq(dhd_pub_t *pub); -extern void dhd_os_sdunlock_txq(dhd_pub_t *pub); -extern void dhd_os_sdlock_rxq(dhd_pub_t *pub); -extern void dhd_os_sdunlock_rxq(dhd_pub_t *pub); -extern void dhd_os_sdlock_sndup_rxq(dhd_pub_t *pub); -extern void dhd_customer_gpio_wlan_ctrl(int onoff); -extern int dhd_custom_get_mac_address(unsigned char *buf); -extern void dhd_os_sdunlock_sndup_rxq(dhd_pub_t *pub); -extern void dhd_os_sdlock_eventq(dhd_pub_t *pub); -extern void dhd_os_sdunlock_eventq(dhd_pub_t *pub); -#ifdef DHD_DEBUG -extern int write_to_file(dhd_pub_t *dhd, u8 *buf, int size); -#endif /* DHD_DEBUG */ -#if defined(OOB_INTR_ONLY) -extern int dhd_customer_oob_irq_map(unsigned long *irq_flags_ptr); -#endif /* defined(OOB_INTR_ONLY) */ -extern void dhd_os_sdtxlock(dhd_pub_t *pub); -extern void dhd_os_sdtxunlock(dhd_pub_t *pub); - -int setScheduler(struct task_struct *p, int policy, struct sched_param *param); - -typedef struct { - u32 limit; /* Expiration time (usec) */ - u32 increment; /* Current expiration increment (usec) */ - u32 elapsed; /* Current elapsed time (usec) */ - u32 tick; /* O/S tick time (usec) */ -} dhd_timeout_t; +extern int brcmf_os_ioctl_resp_wake(struct brcmf_pub *drvr); +extern unsigned int brcmf_os_get_ioctl_resp_timeout(void); +extern void brcmf_os_set_ioctl_resp_timeout(unsigned int timeout_msec); +#ifdef BCMDBG +extern int brcmf_write_to_file(struct brcmf_pub *drvr, u8 *buf, int size); +#endif /* BCMDBG */ -extern void dhd_timeout_start(dhd_timeout_t *tmo, uint usec); -extern int dhd_timeout_expired(dhd_timeout_t *tmo); +extern void brcmf_timeout_start(struct brcmf_timeout *tmo, uint usec); +extern int brcmf_timeout_expired(struct brcmf_timeout *tmo); -extern int dhd_ifname2idx(struct dhd_info *dhd, char *name); -extern u8 *dhd_bssidx2bssid(dhd_pub_t *dhd, int idx); -extern int wl_host_event(struct dhd_info *dhd, int *idx, void *pktdata, - wl_event_msg_t *, void **data_ptr); +extern int brcmf_ifname2idx(struct brcmf_info *drvr_priv, char *name); +extern int brcmf_c_host_event(struct brcmf_info *drvr_priv, int *idx, + void *pktdata, struct brcmf_event_msg *, + void **data_ptr); -extern void dhd_common_init(void); +extern void brcmf_c_init(void); -extern int dhd_add_if(struct dhd_info *dhd, int ifidx, void *handle, +extern int brcmf_add_if(struct brcmf_info *drvr_priv, int ifidx, void *handle, char *name, u8 *mac_addr, u32 flags, u8 bssidx); -extern void dhd_del_if(struct dhd_info *dhd, int ifidx); - -extern void dhd_vif_add(struct dhd_info *dhd, int ifidx, char *name); -extern void dhd_vif_del(struct dhd_info *dhd, int ifidx); - -extern void dhd_event(struct dhd_info *dhd, char *evpkt, int evlen, int ifidx); -extern void dhd_vif_sendup(struct dhd_info *dhd, int ifidx, unsigned char * cp, - int len); +extern void brcmf_del_if(struct brcmf_info *drvr_priv, int ifidx); /* Send packet to dongle via data channel */ -extern int dhd_sendpkt(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pkt); - -/* Send event to host */ -extern void dhd_sendup_event(dhd_pub_t *dhdp, wl_event_msg_t *event, - void *data); -extern int dhd_bus_devreset(dhd_pub_t *dhdp, u8 flag); -extern uint dhd_bus_status(dhd_pub_t *dhdp); -extern int dhd_bus_start(dhd_pub_t *dhdp); - -enum cust_gpio_modes { - WLAN_RESET_ON, - WLAN_RESET_OFF, - WLAN_POWER_ON, - WLAN_POWER_OFF +extern int brcmf_sendpkt(struct brcmf_pub *drvr, int ifidx,\ + struct sk_buff *pkt); + +extern int brcmf_bus_devreset(struct brcmf_pub *drvr, u8 flag); +extern int brcmf_bus_start(struct brcmf_pub *drvr); + +extern void brcmf_c_pktfilter_offload_set(struct brcmf_pub *drvr, char *arg); +extern void brcmf_c_pktfilter_offload_enable(struct brcmf_pub *drvr, char *arg, + int enable, int master_mode); + +/* Linux network driver ioctl encoding */ +struct brcmf_c_ioctl { + uint cmd; /* common ioctl definition */ + void *buf; /* pointer to user buffer */ + uint len; /* length of user buffer */ + bool set; /* get or set request (optional) */ + uint used; /* bytes read or written (optional) */ + uint needed; /* bytes needed (optional) */ + uint driver; /* to identify target driver */ }; -/* - * Insmod parameters for debug/test - */ - -/* Watchdog timer interval */ -extern uint dhd_watchdog_ms; - -#if defined(DHD_DEBUG) -/* Console output poll interval */ -extern uint dhd_console_ms; -#endif /* defined(DHD_DEBUG) */ - -/* Use interrupts */ -extern uint dhd_intr; - -/* Use polling */ -extern uint dhd_poll; - -/* ARP offload agent mode */ -extern uint dhd_arp_mode; - -/* ARP offload enable */ -extern uint dhd_arp_enable; - -/* Pkt filte enable control */ -extern uint dhd_pkt_filter_enable; - -/* Pkt filter init setup */ -extern uint dhd_pkt_filter_init; - -/* Pkt filter mode control */ -extern uint dhd_master_mode; -/* Roaming mode control */ -extern uint dhd_roam; - -/* Roaming mode control */ -extern uint dhd_radio_up; - -/* Initial idletime ticks (may be -1 for immediate idle, 0 for no idle) */ -extern int dhd_idletime; -#define DHD_IDLETIME_TICKS 1 - -/* SDIO Drive Strength */ -extern uint dhd_sdiod_drive_strength; - -/* Override to force tx queueing all the time */ -extern uint dhd_force_tx_queueing; +/* per-driver magic numbers */ +#define BRCMF_IOCTL_MAGIC 0x00444944 + +/* bump this number if you change the ioctl interface */ +#define BRCMF_IOCTL_VERSION 1 +#define BRCMF_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */ + +/* common ioctl definitions */ +#define BRCMF_GET_MAGIC 0 +#define BRCMF_GET_VERSION 1 +#define BRCMF_GET_VAR 2 +#define BRCMF_SET_VAR 3 + +/* message levels */ +#define BRCMF_ERROR_VAL 0x0001 +#define BRCMF_TRACE_VAL 0x0002 +#define BRCMF_INFO_VAL 0x0004 +#define BRCMF_DATA_VAL 0x0008 +#define BRCMF_CTL_VAL 0x0010 +#define BRCMF_TIMER_VAL 0x0020 +#define BRCMF_HDRS_VAL 0x0040 +#define BRCMF_BYTES_VAL 0x0080 +#define BRCMF_INTR_VAL 0x0100 +#define BRCMF_GLOM_VAL 0x0400 +#define BRCMF_EVENT_VAL 0x0800 +#define BRCMF_BTA_VAL 0x1000 +#define BRCMF_ISCAN_VAL 0x2000 #ifdef SDTEST -/* Echo packet generator (SDIO), pkts/s */ -extern uint dhd_pktgen; - -/* Echo packet len (0 => sawtooth, max 1800) */ -extern uint dhd_pktgen_len; -#define MAX_PKTGEN_LEN 1800 -#endif - -/* optionally set by a module_param_string() */ -#define MOD_PARAM_PATHLEN 2048 -extern char fw_path[MOD_PARAM_PATHLEN]; -extern char nv_path[MOD_PARAM_PATHLEN]; +/* For pktgen iovar */ +struct brcmf_pktgen { + uint version; /* To allow structure change tracking */ + uint freq; /* Max ticks between tx/rx attempts */ + uint count; /* Test packets to send/rcv each attempt */ + uint print; /* Print counts every <print> attempts */ + uint total; /* Total packets (or bursts) */ + uint minlen; /* Minimum length of packets to send */ + uint maxlen; /* Maximum length of packets to send */ + uint numsent; /* Count of test packets sent */ + uint numrcvd; /* Count of test packets received */ + uint numfail; /* Count of test send failures */ + uint mode; /* Test mode (type of test packets) */ + uint stop; /* Stop after this many tx failures */ +}; -/* For supporting multiple interfaces */ -#define DHD_MAX_IFS 16 -#define DHD_DEL_IF -0xe -#define DHD_BAD_IF -0xf +/* Version in case structure changes */ +#define BRCMF_PKTGEN_VERSION 2 -extern void dhd_wait_for_event(dhd_pub_t *dhd, bool * lockvar); -extern void dhd_wait_event_wakeup(dhd_pub_t *dhd); +/* Type of test packets to use */ +#define BRCMF_PKTGEN_ECHO 1 /* Send echo requests */ +#define BRCMF_PKTGEN_SEND 2 /* Send discard packets */ +#define BRCMF_PKTGEN_RXBURST 3 /* Request dongle send N packets */ +#define BRCMF_PKTGEN_RECV 4 /* Continuous rx from continuous + tx dongle */ +#endif /* SDTEST */ -extern u32 g_assert_type; +/* Enter idle immediately (no timeout) */ +#define BRCMF_IDLE_IMMEDIATE (-1) -#ifdef BCMDBG -#define ASSERT(exp) \ - do { if (!(exp)) osl_assert(#exp, __FILE__, __LINE__); } while (0) -extern void osl_assert(char *exp, char *file, int line); -#else -#define ASSERT(exp) do {} while (0) -#endif /* defined(BCMDBG) */ +/* Values for idleclock iovar: other values are the sd_divisor to use + when idle */ +#define BRCMF_IDLE_ACTIVE 0 /* Do not request any SD clock change + when idle */ -#endif /* _dhd_h_ */ +#endif /* _BRCMF_H_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_bus.h b/drivers/staging/brcm80211/brcmfmac/dhd_bus.h index 065f1aeb6ca..653cf0daa0e 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_bus.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd_bus.h @@ -14,69 +14,65 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _dhd_bus_h_ -#define _dhd_bus_h_ +#ifndef _BRCMF_BUS_H_ +#define _BRCMF_BUS_H_ + +/* Packet alignment for most efficient SDIO (can change based on platform) */ +#ifndef BRCMF_SDALIGN +#define BRCMF_SDALIGN 32 +#endif +#if !ISPOWEROF2(BRCMF_SDALIGN) +#error BRCMF_SDALIGN is not a power of 2! +#endif /* - * Exported from dhd bus module (dhd_usb, dhd_sdio) + * Exported from brcmf bus module (brcmf_usb, brcmf_sdio) */ -/* Indicate (dis)interest in finding dongles. */ -extern int dhd_bus_register(void); -extern void dhd_bus_unregister(void); +/* dongle ram module parameter */ +extern int brcmf_dongle_memsize; + +/* Tx/Rx bounds module parameters */ +extern uint brcmf_txbound; +extern uint brcmf_rxbound; -/* Download firmware image and nvram image */ -extern bool dhd_bus_download_firmware(struct dhd_bus *bus, - char *fw_path, char *nv_path); +/* Watchdog timer interval */ +extern uint brcmf_watchdog_ms; + +/* Indicate (dis)interest in finding dongles. */ +extern int brcmf_bus_register(void); +extern void brcmf_bus_unregister(void); /* Stop bus module: clear pending frames, disable data flow */ -extern void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex); +extern void brcmf_sdbrcm_bus_stop(struct brcmf_bus *bus, bool enforce_mutex); /* Initialize bus module: prepare for communication w/dongle */ -extern int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex); +extern int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr, bool enforce_mutex); /* Send a data frame to the dongle. Callee disposes of txp. */ -extern int dhd_bus_txdata(struct dhd_bus *bus, struct sk_buff *txp); +extern int brcmf_sdbrcm_bus_txdata(struct brcmf_bus *bus, struct sk_buff *txp); /* Send/receive a control message to/from the dongle. * Expects caller to enforce a single outstanding transaction. */ -extern int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen); -extern int dhd_bus_rxctl(struct dhd_bus *bus, unsigned char *msg, uint msglen); +extern int +brcmf_sdbrcm_bus_txctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen); -/* Watchdog timer function */ -extern bool dhd_bus_watchdog(dhd_pub_t *dhd); - -#ifdef DHD_DEBUG -/* Device console input function */ -extern int dhd_bus_console_in(dhd_pub_t *dhd, unsigned char *msg, uint msglen); -#endif /* DHD_DEBUG */ - -/* Deferred processing for the bus, return true requests reschedule */ -extern bool dhd_bus_dpc(struct dhd_bus *bus); -extern void dhd_bus_isr(bool *InterruptRecognized, - bool *QueueMiniportHandleInterrupt, void *arg); +extern int +brcmf_sdbrcm_bus_rxctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen); /* Check for and handle local prot-specific iovar commands */ -extern int dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name, +extern int brcmf_sdbrcm_bus_iovar_op(struct brcmf_pub *drvr, const char *name, void *params, int plen, void *arg, int len, bool set); /* Add bus dump output to a buffer */ -extern void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf); +extern void brcmf_sdbrcm_bus_dump(struct brcmf_pub *drvr, + struct brcmu_strbuf *strbuf); /* Clear any bus counters */ -extern void dhd_bus_clearcounts(dhd_pub_t *dhdp); - -/* return the dongle chipid */ -extern uint dhd_bus_chip(struct dhd_bus *bus); - -/* Set user-specified nvram parameters. */ -extern void dhd_bus_set_nvram_params(struct dhd_bus *bus, - const char *nvram_params); +extern void brcmf_bus_clearcounts(struct brcmf_pub *drvr); -extern void *dhd_bus_pub(struct dhd_bus *bus); -extern void *dhd_bus_txq(struct dhd_bus *bus); -extern uint dhd_bus_hdrlen(struct dhd_bus *bus); +extern void brcmf_sdbrcm_wd_timer(struct brcmf_bus *bus, uint wdtick); -#endif /* _dhd_bus_h_ */ +#endif /* _BRCMF_BUS_H_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c index ba5a5cb7eed..345acabe935 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_cdc.c @@ -16,33 +16,71 @@ #include <linux/types.h> #include <linux/netdevice.h> -#include <bcmdefs.h> - -#include <bcmutils.h> -#include <bcmcdc.h> - -#include <dngl_stats.h> -#include <dhd.h> -#include <dhd_proto.h> -#include <dhd_bus.h> -#include <dhd_dbg.h> -#ifdef CUSTOMER_HW2 -int wifi_get_mac_addr(unsigned char *buf); -#endif - -extern int dhd_preinit_ioctls(dhd_pub_t *dhd); - -/* Packet alignment for most efficient SDIO (can change based on platform) */ -#ifndef DHD_SDALIGN -#define DHD_SDALIGN 32 -#endif -#if !ISPOWEROF2(DHD_SDALIGN) -#error DHD_SDALIGN is not a power of 2! -#endif +#include <linux/sched.h> +#include <defs.h> + +#include <brcmu_utils.h> +#include <brcmu_wifi.h> + +#include "dhd.h" +#include "dhd_proto.h" +#include "dhd_bus.h" +#include "dhd_dbg.h" + +struct brcmf_proto_cdc_ioctl { + u32 cmd; /* ioctl command value */ + u32 len; /* lower 16: output buflen; + * upper 16: input buflen (excludes header) */ + u32 flags; /* flag defns given below */ + u32 status; /* status code returned from the device */ +}; + +/* Max valid buffer size that can be sent to the dongle */ +#define CDC_MAX_MSG_SIZE (ETH_FRAME_LEN+ETH_FCS_LEN) + +/* CDC flag definitions */ +#define CDCF_IOC_ERROR 0x01 /* 1=ioctl cmd failed */ +#define CDCF_IOC_SET 0x02 /* 0=get, 1=set cmd */ +#define CDCF_IOC_IF_MASK 0xF000 /* I/F index */ +#define CDCF_IOC_IF_SHIFT 12 +#define CDCF_IOC_ID_MASK 0xFFFF0000 /* id an ioctl pairing */ +#define CDCF_IOC_ID_SHIFT 16 /* ID Mask shift bits */ +#define CDC_IOC_ID(flags) \ + (((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT) +#define CDC_SET_IF_IDX(hdr, idx) \ + ((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | \ + ((idx) << CDCF_IOC_IF_SHIFT))) + +/* + * BDC header - Broadcom specific extension of CDC. + * Used on data packets to convey priority across USB. + */ +#define BDC_HEADER_LEN 4 +#define BDC_PROTO_VER 1 /* Protocol version */ +#define BDC_FLAG_VER_MASK 0xf0 /* Protocol version mask */ +#define BDC_FLAG_VER_SHIFT 4 /* Protocol version shift */ +#define BDC_FLAG_SUM_GOOD 0x04 /* Good RX checksums */ +#define BDC_FLAG_SUM_NEEDED 0x08 /* Dongle needs to do TX checksums */ +#define BDC_PRIORITY_MASK 0x7 +#define BDC_FLAG2_IF_MASK 0x0f /* packet rx interface in APSTA */ +#define BDC_FLAG2_IF_SHIFT 0 + +#define BDC_GET_IF_IDX(hdr) \ + ((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT)) +#define BDC_SET_IF_IDX(hdr, idx) \ + ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | \ + ((idx) << BDC_FLAG2_IF_SHIFT))) + +struct brcmf_proto_bdc_header { + u8 flags; + u8 priority; /* 802.1d Priority, 4:7 flow control info for usb */ + u8 flags2; + u8 rssi; +}; + #define RETRIES 2 /* # of retries to retrieve matching ioctl response */ -#define BUS_HEADER_LEN (16+DHD_SDALIGN) /* Must be atleast SDPCM_RESERVE - * defined in dhd_sdio.c +#define BUS_HEADER_LEN (16+BRCMF_SDALIGN) /* Must be atleast SDPCM_RESERVE * (amount of header tha might be added) * plus any space that might be needed * for alignment padding. @@ -51,21 +89,22 @@ extern int dhd_preinit_ioctls(dhd_pub_t *dhd); * round off at the end of buffer */ -typedef struct dhd_prot { +struct brcmf_proto { u16 reqid; u8 pending; u32 lastcmd; u8 bus_header[BUS_HEADER_LEN]; - cdc_ioctl_t msg; - unsigned char buf[WLC_IOCTL_MAXLEN + ROUND_UP_MARGIN]; -} dhd_prot_t; + struct brcmf_proto_cdc_ioctl msg; + unsigned char buf[BRCMF_C_IOCTL_MAXLEN + ROUND_UP_MARGIN]; +}; -static int dhdcdc_msg(dhd_pub_t *dhd) +static int brcmf_proto_cdc_msg(struct brcmf_pub *drvr) { - dhd_prot_t *prot = dhd->prot; - int len = le32_to_cpu(prot->msg.len) + sizeof(cdc_ioctl_t); + struct brcmf_proto *prot = drvr->prot; + int len = le32_to_cpu(prot->msg.len) + + sizeof(struct brcmf_proto_cdc_ioctl); - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* NOTE : cdc->msg.len holds the desired length of the buffer to be * returned. Only up to CDC_MAX_MSG_SIZE of this buffer area @@ -75,20 +114,21 @@ static int dhdcdc_msg(dhd_pub_t *dhd) len = CDC_MAX_MSG_SIZE; /* Send request */ - return dhd_bus_txctl(dhd->bus, (unsigned char *)&prot->msg, len); + return brcmf_sdbrcm_bus_txctl(drvr->bus, (unsigned char *)&prot->msg, + len); } -static int dhdcdc_cmplt(dhd_pub_t *dhd, u32 id, u32 len) +static int brcmf_proto_cdc_cmplt(struct brcmf_pub *drvr, u32 id, u32 len) { int ret; - dhd_prot_t *prot = dhd->prot; + struct brcmf_proto *prot = drvr->prot; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); do { - ret = - dhd_bus_rxctl(dhd->bus, (unsigned char *)&prot->msg, - len + sizeof(cdc_ioctl_t)); + ret = brcmf_sdbrcm_bus_rxctl(drvr->bus, + (unsigned char *)&prot->msg, + len + sizeof(struct brcmf_proto_cdc_ioctl)); if (ret < 0) break; } while (CDC_IOC_ID(le32_to_cpu(prot->msg.flags)) != id); @@ -97,30 +137,31 @@ static int dhdcdc_cmplt(dhd_pub_t *dhd, u32 id, u32 len) } int -dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) +brcmf_proto_cdc_query_ioctl(struct brcmf_pub *drvr, int ifidx, uint cmd, + void *buf, uint len) { - dhd_prot_t *prot = dhd->prot; - cdc_ioctl_t *msg = &prot->msg; + struct brcmf_proto *prot = drvr->prot; + struct brcmf_proto_cdc_ioctl *msg = &prot->msg; void *info; int ret = 0, retries = 0; u32 id, flags = 0; - DHD_TRACE(("%s: Enter\n", __func__)); - DHD_CTL(("%s: cmd %d len %d\n", __func__, cmd, len)); + BRCMF_TRACE(("%s: Enter\n", __func__)); + BRCMF_CTL(("%s: cmd %d len %d\n", __func__, cmd, len)); /* Respond "bcmerror" and "bcmerrorstr" with local cache */ - if (cmd == WLC_GET_VAR && buf) { + if (cmd == BRCMF_C_GET_VAR && buf) { if (!strcmp((char *)buf, "bcmerrorstr")) { strncpy((char *)buf, "bcm_error", BCME_STRLEN); goto done; } else if (!strcmp((char *)buf, "bcmerror")) { - *(int *)buf = dhd->dongle_error; + *(int *)buf = drvr->dongle_error; goto done; } } - memset(msg, 0, sizeof(cdc_ioctl_t)); + memset(msg, 0, sizeof(struct brcmf_proto_cdc_ioctl)); msg->cmd = cpu_to_le32(cmd); msg->len = cpu_to_le32(len); @@ -131,16 +172,16 @@ dhdcdc_query_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) if (buf) memcpy(prot->buf, buf, len); - ret = dhdcdc_msg(dhd); + ret = brcmf_proto_cdc_msg(drvr); if (ret < 0) { - DHD_ERROR(("dhdcdc_query_ioctl: dhdcdc_msg failed w/status " - "%d\n", ret)); + BRCMF_ERROR(("brcmf_proto_cdc_query_ioctl: brcmf_proto_cdc_msg " + "failed w/status %d\n", ret)); goto done; } retry: /* wait for interrupt and get first fragment */ - ret = dhdcdc_cmplt(dhd, prot->reqid, len); + ret = brcmf_proto_cdc_cmplt(drvr, prot->reqid, len); if (ret < 0) goto done; @@ -150,8 +191,9 @@ retry: if ((id < prot->reqid) && (++retries < RETRIES)) goto retry; if (id != prot->reqid) { - DHD_ERROR(("%s: %s: unexpected request id %d (expected %d)\n", - dhd_ifname(dhd, ifidx), __func__, id, prot->reqid)); + BRCMF_ERROR(("%s: %s: unexpected request id %d (expected %d)\n", + brcmf_ifname(drvr, ifidx), __func__, id, + prot->reqid)); ret = -EINVAL; goto done; } @@ -170,24 +212,25 @@ retry: if (flags & CDCF_IOC_ERROR) { ret = le32_to_cpu(msg->status); /* Cache error from dongle */ - dhd->dongle_error = ret; + drvr->dongle_error = ret; } done: return ret; } -int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) +int brcmf_proto_cdc_set_ioctl(struct brcmf_pub *drvr, int ifidx, uint cmd, + void *buf, uint len) { - dhd_prot_t *prot = dhd->prot; - cdc_ioctl_t *msg = &prot->msg; + struct brcmf_proto *prot = drvr->prot; + struct brcmf_proto_cdc_ioctl *msg = &prot->msg; int ret = 0; u32 flags, id; - DHD_TRACE(("%s: Enter\n", __func__)); - DHD_CTL(("%s: cmd %d len %d\n", __func__, cmd, len)); + BRCMF_TRACE(("%s: Enter\n", __func__)); + BRCMF_CTL(("%s: cmd %d len %d\n", __func__, cmd, len)); - memset(msg, 0, sizeof(cdc_ioctl_t)); + memset(msg, 0, sizeof(struct brcmf_proto_cdc_ioctl)); msg->cmd = cpu_to_le32(cmd); msg->len = cpu_to_le32(len); @@ -198,11 +241,11 @@ int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) if (buf) memcpy(prot->buf, buf, len); - ret = dhdcdc_msg(dhd); + ret = brcmf_proto_cdc_msg(drvr); if (ret < 0) goto done; - ret = dhdcdc_cmplt(dhd, prot->reqid, len); + ret = brcmf_proto_cdc_cmplt(drvr, prot->reqid, len); if (ret < 0) goto done; @@ -210,8 +253,9 @@ int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) id = (flags & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT; if (id != prot->reqid) { - DHD_ERROR(("%s: %s: unexpected request id %d (expected %d)\n", - dhd_ifname(dhd, ifidx), __func__, id, prot->reqid)); + BRCMF_ERROR(("%s: %s: unexpected request id %d (expected %d)\n", + brcmf_ifname(drvr, ifidx), __func__, id, + prot->reqid)); ret = -EINVAL; goto done; } @@ -220,41 +264,40 @@ int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, uint len) if (flags & CDCF_IOC_ERROR) { ret = le32_to_cpu(msg->status); /* Cache error from dongle */ - dhd->dongle_error = ret; + drvr->dongle_error = ret; } done: return ret; } -extern int dhd_bus_interface(struct dhd_bus *bus, uint arg, void *arg2); int -dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len) +brcmf_proto_ioctl(struct brcmf_pub *drvr, int ifidx, struct brcmf_ioctl *ioc, + void *buf, int len) { - dhd_prot_t *prot = dhd->prot; + struct brcmf_proto *prot = drvr->prot; int ret = -1; - if (dhd->busstate == DHD_BUS_DOWN) { - DHD_ERROR(("%s : bus is down. we have nothing to do\n", - __func__)); + if (drvr->busstate == BRCMF_BUS_DOWN) { + BRCMF_ERROR(("%s : bus is down. we have nothing to do\n", + __func__)); return ret; } - dhd_os_proto_block(dhd); - - DHD_TRACE(("%s: Enter\n", __func__)); + brcmf_os_proto_block(drvr); - ASSERT(len <= WLC_IOCTL_MAXLEN); + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (len > WLC_IOCTL_MAXLEN) + if (len > BRCMF_C_IOCTL_MAXLEN) goto done; if (prot->pending == true) { - DHD_TRACE(("CDC packet is pending!!!! cmd=0x%x (%lu) " - "lastcmd=0x%x (%lu)\n", - ioc->cmd, (unsigned long)ioc->cmd, prot->lastcmd, - (unsigned long)prot->lastcmd)); - if ((ioc->cmd == WLC_SET_VAR) || (ioc->cmd == WLC_GET_VAR)) - DHD_TRACE(("iovar cmd=%s\n", (char *)buf)); + BRCMF_TRACE(("CDC packet is pending!!!! cmd=0x%x (%lu) " + "lastcmd=0x%x (%lu)\n", + ioc->cmd, (unsigned long)ioc->cmd, prot->lastcmd, + (unsigned long)prot->lastcmd)); + if ((ioc->cmd == BRCMF_C_SET_VAR) || + (ioc->cmd == BRCMF_C_GET_VAR)) + BRCMF_TRACE(("iovar cmd=%s\n", (char *)buf)); goto done; } @@ -262,36 +305,39 @@ dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, void *buf, int len) prot->pending = true; prot->lastcmd = ioc->cmd; if (ioc->set) - ret = dhdcdc_set_ioctl(dhd, ifidx, ioc->cmd, buf, len); + ret = brcmf_proto_cdc_set_ioctl(drvr, ifidx, ioc->cmd, + buf, len); else { - ret = dhdcdc_query_ioctl(dhd, ifidx, ioc->cmd, buf, len); + ret = brcmf_proto_cdc_query_ioctl(drvr, ifidx, ioc->cmd, + buf, len); if (ret > 0) - ioc->used = ret - sizeof(cdc_ioctl_t); + ioc->used = ret - sizeof(struct brcmf_proto_cdc_ioctl); } /* Too many programs assume ioctl() returns 0 on success */ if (ret >= 0) ret = 0; else { - cdc_ioctl_t *msg = &prot->msg; + struct brcmf_proto_cdc_ioctl *msg = &prot->msg; /* len == needed when set/query fails from dongle */ ioc->needed = le32_to_cpu(msg->len); } /* Intercept the wme_dp ioctl here */ - if ((!ret) && (ioc->cmd == WLC_SET_VAR) && (!strcmp(buf, "wme_dp"))) { + if (!ret && ioc->cmd == BRCMF_C_SET_VAR && + !strcmp(buf, "wme_dp")) { int slen, val = 0; slen = strlen("wme_dp") + 1; if (len >= (int)(slen + sizeof(int))) memcpy(&val, (char *)buf + slen, sizeof(int)); - dhd->wme_dp = (u8) le32_to_cpu(val); + drvr->wme_dp = (u8) le32_to_cpu(val); } prot->pending = false; done: - dhd_os_proto_unblock(dhd); + brcmf_os_proto_unblock(drvr); return ret; } @@ -302,35 +348,23 @@ done: (((struct sk_buff *)(skb))->ip_summed = \ ((x) ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE)) -/* PKTSETSUMNEEDED and PKTSUMGOOD are not possible because - skb->ip_summed is overloaded */ - -int -dhd_prot_iovar_op(dhd_pub_t *dhdp, const char *name, - void *params, int plen, void *arg, int len, bool set) -{ - return -ENOTSUPP; -} - -void dhd_prot_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf) +void brcmf_proto_dump(struct brcmf_pub *drvr, struct brcmu_strbuf *strbuf) { - bcm_bprintf(strbuf, "Protocol CDC: reqid %d\n", dhdp->prot->reqid); + brcmu_bprintf(strbuf, "Protocol CDC: reqid %d\n", drvr->prot->reqid); } -void dhd_prot_hdrpush(dhd_pub_t *dhd, int ifidx, struct sk_buff *pktbuf) +void brcmf_proto_hdrpush(struct brcmf_pub *drvr, int ifidx, + struct sk_buff *pktbuf) { -#ifdef BDC - struct bdc_header *h; -#endif /* BDC */ + struct brcmf_proto_bdc_header *h; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); -#ifdef BDC /* Push BDC header used to convey priority for buses that don't */ skb_push(pktbuf, BDC_HEADER_LEN); - h = (struct bdc_header *)(pktbuf->data); + h = (struct brcmf_proto_bdc_header *)(pktbuf->data); h->flags = (BDC_PROTO_VER << BDC_FLAG_VER_SHIFT); if (PKTSUMNEEDED(pktbuf)) @@ -339,79 +373,74 @@ void dhd_prot_hdrpush(dhd_pub_t *dhd, int ifidx, struct sk_buff *pktbuf) h->priority = (pktbuf->priority & BDC_PRIORITY_MASK); h->flags2 = 0; h->rssi = 0; -#endif /* BDC */ BDC_SET_IF_IDX(h, ifidx); } -int dhd_prot_hdrpull(dhd_pub_t *dhd, int *ifidx, struct sk_buff *pktbuf) +int brcmf_proto_hdrpull(struct brcmf_pub *drvr, int *ifidx, + struct sk_buff *pktbuf) { -#ifdef BDC - struct bdc_header *h; -#endif + struct brcmf_proto_bdc_header *h; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); -#ifdef BDC /* Pop BDC header used to convey priority for buses that don't */ if (pktbuf->len < BDC_HEADER_LEN) { - DHD_ERROR(("%s: rx data too short (%d < %d)\n", __func__, - pktbuf->len, BDC_HEADER_LEN)); + BRCMF_ERROR(("%s: rx data too short (%d < %d)\n", __func__, + pktbuf->len, BDC_HEADER_LEN)); return -EBADE; } - h = (struct bdc_header *)(pktbuf->data); + h = (struct brcmf_proto_bdc_header *)(pktbuf->data); *ifidx = BDC_GET_IF_IDX(h); - if (*ifidx >= DHD_MAX_IFS) { - DHD_ERROR(("%s: rx data ifnum out of range (%d)\n", - __func__, *ifidx)); + if (*ifidx >= BRCMF_MAX_IFS) { + BRCMF_ERROR(("%s: rx data ifnum out of range (%d)\n", + __func__, *ifidx)); return -EBADE; } if (((h->flags & BDC_FLAG_VER_MASK) >> BDC_FLAG_VER_SHIFT) != BDC_PROTO_VER) { - DHD_ERROR(("%s: non-BDC packet received, flags 0x%x\n", - dhd_ifname(dhd, *ifidx), h->flags)); + BRCMF_ERROR(("%s: non-BDC packet received, flags 0x%x\n", + brcmf_ifname(drvr, *ifidx), h->flags)); return -EBADE; } if (h->flags & BDC_FLAG_SUM_GOOD) { - DHD_INFO(("%s: BDC packet received with good rx-csum, " - "flags 0x%x\n", - dhd_ifname(dhd, *ifidx), h->flags)); + BRCMF_INFO(("%s: BDC packet received with good rx-csum, " + "flags 0x%x\n", + brcmf_ifname(drvr, *ifidx), h->flags)); PKTSETSUMGOOD(pktbuf, true); } pktbuf->priority = h->priority & BDC_PRIORITY_MASK; skb_pull(pktbuf, BDC_HEADER_LEN); -#endif /* BDC */ return 0; } -int dhd_prot_attach(dhd_pub_t *dhd) +int brcmf_proto_attach(struct brcmf_pub *drvr) { - dhd_prot_t *cdc; + struct brcmf_proto *cdc; - cdc = kzalloc(sizeof(dhd_prot_t), GFP_ATOMIC); + cdc = kzalloc(sizeof(struct brcmf_proto), GFP_ATOMIC); if (!cdc) { - DHD_ERROR(("%s: kmalloc failed\n", __func__)); + BRCMF_ERROR(("%s: kmalloc failed\n", __func__)); goto fail; } /* ensure that the msg buf directly follows the cdc msg struct */ if ((unsigned long)(&cdc->msg + 1) != (unsigned long)cdc->buf) { - DHD_ERROR(("dhd_prot_t is not correctly defined\n")); + BRCMF_ERROR(("struct brcmf_proto is not correctly defined\n")); goto fail; } - dhd->prot = cdc; -#ifdef BDC - dhd->hdrlen += BDC_HEADER_LEN; -#endif - dhd->maxctl = WLC_IOCTL_MAXLEN + sizeof(cdc_ioctl_t) + ROUND_UP_MARGIN; + drvr->prot = cdc; + drvr->hdrlen += BDC_HEADER_LEN; + drvr->maxctl = BRCMF_C_IOCTL_MAXLEN + + sizeof(struct brcmf_proto_cdc_ioctl) + ROUND_UP_MARGIN; return 0; fail: @@ -420,55 +449,54 @@ fail: } /* ~NOTE~ What if another thread is waiting on the semaphore? Holding it? */ -void dhd_prot_detach(dhd_pub_t *dhd) +void brcmf_proto_detach(struct brcmf_pub *drvr) { - kfree(dhd->prot); - dhd->prot = NULL; + kfree(drvr->prot); + drvr->prot = NULL; } -void dhd_prot_dstats(dhd_pub_t *dhd) +void brcmf_proto_dstats(struct brcmf_pub *drvr) { /* No stats from dongle added yet, copy bus stats */ - dhd->dstats.tx_packets = dhd->tx_packets; - dhd->dstats.tx_errors = dhd->tx_errors; - dhd->dstats.rx_packets = dhd->rx_packets; - dhd->dstats.rx_errors = dhd->rx_errors; - dhd->dstats.rx_dropped = dhd->rx_dropped; - dhd->dstats.multicast = dhd->rx_multicast; + drvr->dstats.tx_packets = drvr->tx_packets; + drvr->dstats.tx_errors = drvr->tx_errors; + drvr->dstats.rx_packets = drvr->rx_packets; + drvr->dstats.rx_errors = drvr->rx_errors; + drvr->dstats.rx_dropped = drvr->rx_dropped; + drvr->dstats.multicast = drvr->rx_multicast; return; } -int dhd_prot_init(dhd_pub_t *dhd) +int brcmf_proto_init(struct brcmf_pub *drvr) { int ret = 0; char buf[128]; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - dhd_os_proto_block(dhd); + brcmf_os_proto_block(drvr); /* Get the device MAC address */ strcpy(buf, "cur_etheraddr"); - ret = dhdcdc_query_ioctl(dhd, 0, WLC_GET_VAR, buf, sizeof(buf)); + ret = brcmf_proto_cdc_query_ioctl(drvr, 0, BRCMF_C_GET_VAR, + buf, sizeof(buf)); if (ret < 0) { - dhd_os_proto_unblock(dhd); + brcmf_os_proto_unblock(drvr); return ret; } - memcpy(dhd->mac, buf, ETH_ALEN); + memcpy(drvr->mac, buf, ETH_ALEN); - dhd_os_proto_unblock(dhd); + brcmf_os_proto_unblock(drvr); -#ifdef EMBEDDED_PLATFORM - ret = dhd_preinit_ioctls(dhd); -#endif /* EMBEDDED_PLATFORM */ + ret = brcmf_c_preinit_ioctls(drvr); /* Always assumes wl for now */ - dhd->iswl = true; + drvr->iswl = true; return ret; } -void dhd_prot_stop(dhd_pub_t *dhd) +void brcmf_proto_stop(struct brcmf_pub *drvr) { /* Nothing to do for CDC */ } diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_common.c b/drivers/staging/brcm80211/brcmfmac/dhd_common.c index 0bfb93c0075..fdec4683c42 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_common.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_common.c @@ -15,64 +15,41 @@ */ #include <linux/kernel.h> #include <linux/string.h> -#include <bcmdefs.h> +#include <linux/sched.h> #include <linux/netdevice.h> -#include <bcmutils.h> -#include <dngl_stats.h> -#include <dhd.h> -#include <dhd_bus.h> -#include <dhd_proto.h> -#include <dhd_dbg.h> -#include <msgtrace.h> -#include <wlioctl.h> - -int dhd_msg_level; -char fw_path[MOD_PARAM_PATHLEN]; -char nv_path[MOD_PARAM_PATHLEN]; - -/* Last connection success/failure status */ -u32 dhd_conn_event; -u32 dhd_conn_status; -u32 dhd_conn_reason; - -extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, - uint len); -extern void dhd_ind_scan_confirm(void *h, bool status); -extern int dhd_wl_ioctl(dhd_pub_t *dhd, uint cmd, char *buf, uint buflen); -void dhd_iscan_lock(void); -void dhd_iscan_unlock(void); - -/* Packet alignment for most efficient SDIO (can change based on platform) */ -#ifndef DHD_SDALIGN -#define DHD_SDALIGN 32 -#endif -#if !ISPOWEROF2(DHD_SDALIGN) -#error DHD_SDALIGN is not a power of 2! -#endif - -#define EPI_VERSION_STR "4.218.248.5" -#ifdef DHD_DEBUG -const char dhd_version[] = -"Dongle Host Driver, version " EPI_VERSION_STR "\nCompiled on " __DATE__ +#include <asm/unaligned.h> +#include <defs.h> +#include <brcmu_wifi.h> +#include <brcmu_utils.h> +#include "dhd.h" +#include "dhd_bus.h" +#include "dhd_proto.h" +#include "dhd_dbg.h" + +#define BRCM_OUI "\x00\x10\x18" +#define DOT11_OUI_LEN 3 +#define BCMILCP_BCM_SUBTYPE_EVENT 1 +#define PKTFILTER_BUF_SIZE 2048 + +int brcmf_msg_level; + +#define MSGTRACE_VERSION 1 + +#ifdef BCMDBG +const char brcmf_version[] = +"Dongle Host Driver, version " BRCMF_VERSION_STR "\nCompiled on " __DATE__ " at " __TIME__; #else -const char dhd_version[] = "Dongle Host Driver, version " EPI_VERSION_STR; +const char brcmf_version[] = "Dongle Host Driver, version " BRCMF_VERSION_STR; #endif -void dhd_set_timer(void *bus, uint wdtick); - /* IOVar table */ enum { IOV_VERSION = 1, IOV_MSGLEVEL, IOV_BCMERRORSTR, IOV_BCMERROR, - IOV_WDTICK, IOV_DUMP, -#ifdef DHD_DEBUG - IOV_CONS, - IOV_DCONSOLE_POLL, -#endif IOV_CLEARCOUNTS, IOV_LOGDUMP, IOV_LOGCAL, @@ -82,27 +59,19 @@ enum { IOV_LAST }; -const bcm_iovar_t dhd_iovars[] = { - {"version", IOV_VERSION, 0, IOVT_BUFFER, sizeof(dhd_version)} +const struct brcmu_iovar brcmf_iovars[] = { + {"version", IOV_VERSION, 0, IOVT_BUFFER, sizeof(brcmf_version)} , -#ifdef DHD_DEBUG +#ifdef BCMDBG {"msglevel", IOV_MSGLEVEL, 0, IOVT_UINT32, 0} , -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ {"bcmerrorstr", IOV_BCMERRORSTR, 0, IOVT_BUFFER, BCME_STRLEN} , {"bcmerror", IOV_BCMERROR, 0, IOVT_INT8, 0} , - {"wdtick", IOV_WDTICK, 0, IOVT_UINT32, 0} - , - {"dump", IOV_DUMP, 0, IOVT_BUFFER, DHD_IOCTL_MAXLEN} - , -#ifdef DHD_DEBUG - {"dconpoll", IOV_DCONSOLE_POLL, 0, IOVT_UINT32, 0} + {"dump", IOV_DUMP, 0, IOVT_BUFFER, BRCMF_IOCTL_MAXLEN} , - {"cons", IOV_CONS, 0, IOVT_BUFFER, 0} - , -#endif {"clearcounts", IOV_CLEARCOUNTS, 0, IOVT_VOID, 0} , {"gpioob", IOV_GPIOOB, 0, IOVT_UINT32, 0} @@ -112,7 +81,23 @@ const bcm_iovar_t dhd_iovars[] = { {NULL, 0, 0, 0, 0} }; -void dhd_common_init(void) +/* Message trace header */ +struct msgtrace_hdr { + u8 version; + u8 spare; + u16 len; /* Len of the trace */ + u32 seqnum; /* Sequence number of message. Useful + * if the messsage has been lost + * because of DMA error or a bus reset + * (ex: SDIO Func2) + */ + u32 discarded_bytes; /* Number of discarded bytes because of + trace overflow */ + u32 discarded_printf; /* Number of discarded printf + because of trace overflow */ +} __packed; + +void brcmf_c_init(void) { /* Init global variables at run-time, not as part of the declaration. * This is required to support init/de-init of the driver. @@ -122,87 +107,77 @@ void dhd_common_init(void) * first time that the driver is initialized vs subsequent * initializations. */ - dhd_msg_level = DHD_ERROR_VAL; -#ifdef CONFIG_BCM4329_FW_PATH - strncpy(fw_path, CONFIG_BCM4329_FW_PATH, MOD_PARAM_PATHLEN - 1); -#else - fw_path[0] = '\0'; -#endif -#ifdef CONFIG_BCM4329_NVRAM_PATH - strncpy(nv_path, CONFIG_BCM4329_NVRAM_PATH, MOD_PARAM_PATHLEN - 1); -#else - nv_path[0] = '\0'; -#endif + brcmf_msg_level = BRCMF_ERROR_VAL; } -static int dhd_dump(dhd_pub_t *dhdp, char *buf, int buflen) +static int brcmf_c_dump(struct brcmf_pub *drvr, char *buf, int buflen) { - struct bcmstrbuf b; - struct bcmstrbuf *strbuf = &b; - - bcm_binit(strbuf, buf, buflen); - - /* Base DHD info */ - bcm_bprintf(strbuf, "%s\n", dhd_version); - bcm_bprintf(strbuf, "\n"); - bcm_bprintf(strbuf, "pub.up %d pub.txoff %d pub.busstate %d\n", - dhdp->up, dhdp->txoff, dhdp->busstate); - bcm_bprintf(strbuf, "pub.hdrlen %d pub.maxctl %d pub.rxsz %d\n", - dhdp->hdrlen, dhdp->maxctl, dhdp->rxsz); - bcm_bprintf(strbuf, "pub.iswl %d pub.drv_version %ld pub.mac %pM\n", - dhdp->iswl, dhdp->drv_version, &dhdp->mac); - bcm_bprintf(strbuf, "pub.bcmerror %d tickcnt %d\n", dhdp->bcmerror, - dhdp->tickcnt); - - bcm_bprintf(strbuf, "dongle stats:\n"); - bcm_bprintf(strbuf, + struct brcmu_strbuf b; + struct brcmu_strbuf *strbuf = &b; + + brcmu_binit(strbuf, buf, buflen); + + /* Base info */ + brcmu_bprintf(strbuf, "%s\n", brcmf_version); + brcmu_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "pub.up %d pub.txoff %d pub.busstate %d\n", + drvr->up, drvr->txoff, drvr->busstate); + brcmu_bprintf(strbuf, "pub.hdrlen %d pub.maxctl %d pub.rxsz %d\n", + drvr->hdrlen, drvr->maxctl, drvr->rxsz); + brcmu_bprintf(strbuf, "pub.iswl %d pub.drv_version %ld pub.mac %pM\n", + drvr->iswl, drvr->drv_version, &drvr->mac); + brcmu_bprintf(strbuf, "pub.bcmerror %d tickcnt %d\n", drvr->bcmerror, + drvr->tickcnt); + + brcmu_bprintf(strbuf, "dongle stats:\n"); + brcmu_bprintf(strbuf, "tx_packets %ld tx_bytes %ld tx_errors %ld tx_dropped %ld\n", - dhdp->dstats.tx_packets, dhdp->dstats.tx_bytes, - dhdp->dstats.tx_errors, dhdp->dstats.tx_dropped); - bcm_bprintf(strbuf, + drvr->dstats.tx_packets, drvr->dstats.tx_bytes, + drvr->dstats.tx_errors, drvr->dstats.tx_dropped); + brcmu_bprintf(strbuf, "rx_packets %ld rx_bytes %ld rx_errors %ld rx_dropped %ld\n", - dhdp->dstats.rx_packets, dhdp->dstats.rx_bytes, - dhdp->dstats.rx_errors, dhdp->dstats.rx_dropped); - bcm_bprintf(strbuf, "multicast %ld\n", dhdp->dstats.multicast); - - bcm_bprintf(strbuf, "bus stats:\n"); - bcm_bprintf(strbuf, "tx_packets %ld tx_multicast %ld tx_errors %ld\n", - dhdp->tx_packets, dhdp->tx_multicast, dhdp->tx_errors); - bcm_bprintf(strbuf, "tx_ctlpkts %ld tx_ctlerrs %ld\n", - dhdp->tx_ctlpkts, dhdp->tx_ctlerrs); - bcm_bprintf(strbuf, "rx_packets %ld rx_multicast %ld rx_errors %ld\n", - dhdp->rx_packets, dhdp->rx_multicast, dhdp->rx_errors); - bcm_bprintf(strbuf, + drvr->dstats.rx_packets, drvr->dstats.rx_bytes, + drvr->dstats.rx_errors, drvr->dstats.rx_dropped); + brcmu_bprintf(strbuf, "multicast %ld\n", drvr->dstats.multicast); + + brcmu_bprintf(strbuf, "bus stats:\n"); + brcmu_bprintf(strbuf, "tx_packets %ld tx_multicast %ld tx_errors %ld\n", + drvr->tx_packets, drvr->tx_multicast, drvr->tx_errors); + brcmu_bprintf(strbuf, "tx_ctlpkts %ld tx_ctlerrs %ld\n", + drvr->tx_ctlpkts, drvr->tx_ctlerrs); + brcmu_bprintf(strbuf, "rx_packets %ld rx_multicast %ld rx_errors %ld\n", + drvr->rx_packets, drvr->rx_multicast, drvr->rx_errors); + brcmu_bprintf(strbuf, "rx_ctlpkts %ld rx_ctlerrs %ld rx_dropped %ld rx_flushed %ld\n", - dhdp->rx_ctlpkts, dhdp->rx_ctlerrs, dhdp->rx_dropped, - dhdp->rx_flushed); - bcm_bprintf(strbuf, + drvr->rx_ctlpkts, drvr->rx_ctlerrs, drvr->rx_dropped, + drvr->rx_flushed); + brcmu_bprintf(strbuf, "rx_readahead_cnt %ld tx_realloc %ld fc_packets %ld\n", - dhdp->rx_readahead_cnt, dhdp->tx_realloc, dhdp->fc_packets); - bcm_bprintf(strbuf, "wd_dpc_sched %ld\n", dhdp->wd_dpc_sched); - bcm_bprintf(strbuf, "\n"); + drvr->rx_readahead_cnt, drvr->tx_realloc, drvr->fc_packets); + brcmu_bprintf(strbuf, "wd_dpc_sched %ld\n", drvr->wd_dpc_sched); + brcmu_bprintf(strbuf, "\n"); /* Add any prot info */ - dhd_prot_dump(dhdp, strbuf); - bcm_bprintf(strbuf, "\n"); + brcmf_proto_dump(drvr, strbuf); + brcmu_bprintf(strbuf, "\n"); /* Add any bus info */ - dhd_bus_dump(dhdp, strbuf); + brcmf_sdbrcm_bus_dump(drvr, strbuf); return !strbuf->size ? -EOVERFLOW : 0; } static int -dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid, - const char *name, void *params, int plen, void *arg, int len, - int val_size) +brcmf_c_doiovar(struct brcmf_pub *drvr, const struct brcmu_iovar *vi, + u32 actionid, const char *name, void *params, int plen, + void *arg, int len, int val_size) { int bcmerror = 0; s32 int_val = 0; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - bcmerror = bcm_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid)); + bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid)); if (bcmerror != 0) goto exit; @@ -212,16 +187,16 @@ dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid, switch (actionid) { case IOV_GVAL(IOV_VERSION): /* Need to have checked buffer length */ - strncpy((char *)arg, dhd_version, len); + strncpy((char *)arg, brcmf_version, len); break; case IOV_GVAL(IOV_MSGLEVEL): - int_val = (s32) dhd_msg_level; + int_val = (s32) brcmf_msg_level; memcpy(arg, &int_val, val_size); break; case IOV_SVAL(IOV_MSGLEVEL): - dhd_msg_level = int_val; + brcmf_msg_level = int_val; break; case IOV_GVAL(IOV_BCMERRORSTR): @@ -231,58 +206,29 @@ dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid, break; case IOV_GVAL(IOV_BCMERROR): - int_val = (s32) dhd_pub->bcmerror; + int_val = (s32) drvr->bcmerror; memcpy(arg, &int_val, val_size); break; - case IOV_GVAL(IOV_WDTICK): - int_val = (s32) dhd_watchdog_ms; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_WDTICK): - if (!dhd_pub->up) { - bcmerror = -ENOLINK; - break; - } - dhd_os_wd_timer(dhd_pub, (uint) int_val); - break; - case IOV_GVAL(IOV_DUMP): - bcmerror = dhd_dump(dhd_pub, arg, len); - break; - -#ifdef DHD_DEBUG - case IOV_GVAL(IOV_DCONSOLE_POLL): - int_val = (s32) dhd_console_ms; - memcpy(arg, &int_val, val_size); - break; - - case IOV_SVAL(IOV_DCONSOLE_POLL): - dhd_console_ms = (uint) int_val; - break; - - case IOV_SVAL(IOV_CONS): - if (len > 0) - bcmerror = dhd_bus_console_in(dhd_pub, arg, len - 1); + bcmerror = brcmf_c_dump(drvr, arg, len); break; -#endif case IOV_SVAL(IOV_CLEARCOUNTS): - dhd_pub->tx_packets = dhd_pub->rx_packets = 0; - dhd_pub->tx_errors = dhd_pub->rx_errors = 0; - dhd_pub->tx_ctlpkts = dhd_pub->rx_ctlpkts = 0; - dhd_pub->tx_ctlerrs = dhd_pub->rx_ctlerrs = 0; - dhd_pub->rx_dropped = 0; - dhd_pub->rx_readahead_cnt = 0; - dhd_pub->tx_realloc = 0; - dhd_pub->wd_dpc_sched = 0; - memset(&dhd_pub->dstats, 0, sizeof(dhd_pub->dstats)); - dhd_bus_clearcounts(dhd_pub); + drvr->tx_packets = drvr->rx_packets = 0; + drvr->tx_errors = drvr->rx_errors = 0; + drvr->tx_ctlpkts = drvr->rx_ctlpkts = 0; + drvr->tx_ctlerrs = drvr->rx_ctlerrs = 0; + drvr->rx_dropped = 0; + drvr->rx_readahead_cnt = 0; + drvr->tx_realloc = 0; + drvr->wd_dpc_sched = 0; + memset(&drvr->dstats, 0, sizeof(drvr->dstats)); + brcmf_bus_clearcounts(drvr); break; case IOV_GVAL(IOV_IOCTLTIMEOUT):{ - int_val = (s32) dhd_os_get_ioctl_resp_timeout(); + int_val = (s32) brcmf_os_get_ioctl_resp_timeout(); memcpy(arg, &int_val, sizeof(int_val)); break; } @@ -291,7 +237,7 @@ dhd_doiovar(dhd_pub_t *dhd_pub, const bcm_iovar_t *vi, u32 actionid, if (int_val <= 0) bcmerror = -EINVAL; else - dhd_os_set_ioctl_resp_timeout((unsigned int) + brcmf_os_set_ioctl_resp_timeout((unsigned int) int_val); break; } @@ -305,8 +251,8 @@ exit: return bcmerror; } -bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt, - int prec) +bool brcmf_c_prec_enq(struct brcmf_pub *drvr, struct pktq *q, + struct sk_buff *pkt, int prec) { struct sk_buff *p; int eprec = -1; /* precedence to evict from */ @@ -316,7 +262,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt, * exceeding total queue length */ if (!pktq_pfull(q, prec) && !pktq_full(q)) { - bcm_pktq_penq(q, prec, pkt); + brcmu_pktq_penq(q, prec, pkt); return true; } @@ -324,8 +270,7 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt, if (pktq_pfull(q, prec)) eprec = prec; else if (pktq_full(q)) { - p = bcm_pktq_peek_tail(q, &eprec); - ASSERT(p); + p = brcmu_pktq_peek_tail(q, &eprec); if (eprec > prec) return false; } @@ -333,60 +278,58 @@ bool dhd_prec_enq(dhd_pub_t *dhdp, struct pktq *q, struct sk_buff *pkt, /* Evict if needed */ if (eprec >= 0) { /* Detect queueing to unconfigured precedence */ - ASSERT(!pktq_pempty(q, eprec)); - discard_oldest = AC_BITMAP_TST(dhdp->wme_dp, eprec); + discard_oldest = AC_BITMAP_TST(drvr->wme_dp, eprec); if (eprec == prec && !discard_oldest) return false; /* refuse newer (incoming) packet */ /* Evict packet according to discard policy */ - p = discard_oldest ? bcm_pktq_pdeq(q, eprec) : - bcm_pktq_pdeq_tail(q, eprec); + p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) : + brcmu_pktq_pdeq_tail(q, eprec); if (p == NULL) { - DHD_ERROR(("%s: bcm_pktq_penq() failed, oldest %d.", - __func__, discard_oldest)); - ASSERT(p); + BRCMF_ERROR(("%s: brcmu_pktq_penq() failed, oldest %d.", + __func__, discard_oldest)); } - - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); } /* Enqueue */ - p = bcm_pktq_penq(q, prec, pkt); + p = brcmu_pktq_penq(q, prec, pkt); if (p == NULL) { - DHD_ERROR(("%s: bcm_pktq_penq() failed.", __func__)); - ASSERT(p); + BRCMF_ERROR(("%s: brcmu_pktq_penq() failed.", __func__)); } - return true; + return p != NULL; } static int -dhd_iovar_op(dhd_pub_t *dhd_pub, const char *name, +brcmf_c_iovar_op(struct brcmf_pub *drvr, const char *name, void *params, int plen, void *arg, int len, bool set) { int bcmerror = 0; int val_size; - const bcm_iovar_t *vi = NULL; + const struct brcmu_iovar *vi = NULL; u32 actionid; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - ASSERT(name); - ASSERT(len >= 0); + if (name == NULL || len <= 0) + return -EINVAL; - /* Get MUST have return space */ - ASSERT(set || (arg && len)); + /* Set does not take qualifiers */ + if (set && (params || plen)) + return -EINVAL; - /* Set does NOT take qualifiers */ - ASSERT(!set || (!params && !plen)); + /* Get must have return space;*/ + if (!set && !(arg && len)) + return -EINVAL; - vi = bcm_iovar_lookup(dhd_iovars, name); + vi = brcmu_iovar_lookup(brcmf_iovars, name); if (vi == NULL) { bcmerror = -ENOTSUPP; goto exit; } - DHD_CTL(("%s: %s %s, len %d plen %d\n", __func__, - name, (set ? "set" : "get"), len, plen)); + BRCMF_CTL(("%s: %s %s, len %d plen %d\n", __func__, + name, (set ? "set" : "get"), len, plen)); /* set up 'params' pointer in case this is a set command so that * the convenience int and bool code can be common to set and get @@ -406,39 +349,40 @@ dhd_iovar_op(dhd_pub_t *dhd_pub, const char *name, actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid); bcmerror = - dhd_doiovar(dhd_pub, vi, actionid, name, params, plen, arg, len, + brcmf_c_doiovar(drvr, vi, actionid, name, params, plen, arg, len, val_size); exit: return bcmerror; } -int dhd_ioctl(dhd_pub_t *dhd_pub, dhd_ioctl_t *ioc, void *buf, uint buflen) +int brcmf_c_ioctl(struct brcmf_pub *drvr, struct brcmf_c_ioctl *ioc, void *buf, + uint buflen) { int bcmerror = 0; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); if (!buf) return -EINVAL; switch (ioc->cmd) { - case DHD_GET_MAGIC: + case BRCMF_GET_MAGIC: if (buflen < sizeof(int)) bcmerror = -EOVERFLOW; else - *(int *)buf = DHD_IOCTL_MAGIC; + *(int *)buf = BRCMF_IOCTL_MAGIC; break; - case DHD_GET_VERSION: + case BRCMF_GET_VERSION: if (buflen < sizeof(int)) bcmerror = -EOVERFLOW; else - *(int *)buf = DHD_IOCTL_VERSION; + *(int *)buf = BRCMF_IOCTL_VERSION; break; - case DHD_GET_VAR: - case DHD_SET_VAR:{ + case BRCMF_GET_VAR: + case BRCMF_SET_VAR:{ char *arg; uint arglen; @@ -456,38 +400,25 @@ int dhd_ioctl(dhd_pub_t *dhd_pub, dhd_ioctl_t *ioc, void *buf, uint buflen) arg++, arglen--; /* call with the appropriate arguments */ - if (ioc->cmd == DHD_GET_VAR) - bcmerror = - dhd_iovar_op(dhd_pub, buf, arg, arglen, buf, - buflen, IOV_GET); + if (ioc->cmd == BRCMF_GET_VAR) + bcmerror = brcmf_c_iovar_op(drvr, buf, arg, + arglen, buf, buflen, IOV_GET); else bcmerror = - dhd_iovar_op(dhd_pub, buf, NULL, 0, arg, - arglen, IOV_SET); - if (bcmerror != -ENOTSUPP) - break; - - /* not in generic table, try protocol module */ - if (ioc->cmd == DHD_GET_VAR) - bcmerror = dhd_prot_iovar_op(dhd_pub, buf, arg, - arglen, buf, - buflen, IOV_GET); - else - bcmerror = dhd_prot_iovar_op(dhd_pub, buf, - NULL, 0, arg, - arglen, IOV_SET); + brcmf_c_iovar_op(drvr, buf, NULL, 0, arg, + arglen, IOV_SET); if (bcmerror != -ENOTSUPP) break; /* if still not found, try bus module */ - if (ioc->cmd == DHD_GET_VAR) - bcmerror = dhd_bus_iovar_op(dhd_pub, buf, - arg, arglen, buf, - buflen, IOV_GET); + if (ioc->cmd == BRCMF_GET_VAR) + bcmerror = brcmf_sdbrcm_bus_iovar_op(drvr, + buf, arg, arglen, buf, buflen, + IOV_GET); else - bcmerror = dhd_bus_iovar_op(dhd_pub, buf, - NULL, 0, arg, - arglen, IOV_SET); + bcmerror = brcmf_sdbrcm_bus_iovar_op(drvr, + buf, NULL, 0, arg, arglen, + IOV_SET); break; } @@ -500,7 +431,8 @@ int dhd_ioctl(dhd_pub_t *dhd_pub, dhd_ioctl_t *ioc, void *buf, uint buflen) } #ifdef SHOW_EVENTS -static void wl_show_host_event(wl_event_msg_t *event, void *event_data) +static void +brcmf_c_show_host_event(struct brcmf_event_msg *event, void *event_data) { uint i, status, reason; bool group = false, flush_txq = false, link = false; @@ -512,62 +444,62 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) char *event_name; } event_names[] = { { - WLC_E_SET_SSID, "SET_SSID"}, { - WLC_E_JOIN, "JOIN"}, { - WLC_E_START, "START"}, { - WLC_E_AUTH, "AUTH"}, { - WLC_E_AUTH_IND, "AUTH_IND"}, { - WLC_E_DEAUTH, "DEAUTH"}, { - WLC_E_DEAUTH_IND, "DEAUTH_IND"}, { - WLC_E_ASSOC, "ASSOC"}, { - WLC_E_ASSOC_IND, "ASSOC_IND"}, { - WLC_E_REASSOC, "REASSOC"}, { - WLC_E_REASSOC_IND, "REASSOC_IND"}, { - WLC_E_DISASSOC, "DISASSOC"}, { - WLC_E_DISASSOC_IND, "DISASSOC_IND"}, { - WLC_E_QUIET_START, "START_QUIET"}, { - WLC_E_QUIET_END, "END_QUIET"}, { - WLC_E_BEACON_RX, "BEACON_RX"}, { - WLC_E_LINK, "LINK"}, { - WLC_E_MIC_ERROR, "MIC_ERROR"}, { - WLC_E_NDIS_LINK, "NDIS_LINK"}, { - WLC_E_ROAM, "ROAM"}, { - WLC_E_TXFAIL, "TXFAIL"}, { - WLC_E_PMKID_CACHE, "PMKID_CACHE"}, { - WLC_E_RETROGRADE_TSF, "RETROGRADE_TSF"}, { - WLC_E_PRUNE, "PRUNE"}, { - WLC_E_AUTOAUTH, "AUTOAUTH"}, { - WLC_E_EAPOL_MSG, "EAPOL_MSG"}, { - WLC_E_SCAN_COMPLETE, "SCAN_COMPLETE"}, { - WLC_E_ADDTS_IND, "ADDTS_IND"}, { - WLC_E_DELTS_IND, "DELTS_IND"}, { - WLC_E_BCNSENT_IND, "BCNSENT_IND"}, { - WLC_E_BCNRX_MSG, "BCNRX_MSG"}, { - WLC_E_BCNLOST_MSG, "BCNLOST_MSG"}, { - WLC_E_ROAM_PREP, "ROAM_PREP"}, { - WLC_E_PFN_NET_FOUND, "PNO_NET_FOUND"}, { - WLC_E_PFN_NET_LOST, "PNO_NET_LOST"}, { - WLC_E_RESET_COMPLETE, "RESET_COMPLETE"}, { - WLC_E_JOIN_START, "JOIN_START"}, { - WLC_E_ROAM_START, "ROAM_START"}, { - WLC_E_ASSOC_START, "ASSOC_START"}, { - WLC_E_IBSS_ASSOC, "IBSS_ASSOC"}, { - WLC_E_RADIO, "RADIO"}, { - WLC_E_PSM_WATCHDOG, "PSM_WATCHDOG"}, { - WLC_E_PROBREQ_MSG, "PROBREQ_MSG"}, { - WLC_E_SCAN_CONFIRM_IND, "SCAN_CONFIRM_IND"}, { - WLC_E_PSK_SUP, "PSK_SUP"}, { - WLC_E_COUNTRY_CODE_CHANGED, "COUNTRY_CODE_CHANGED"}, { - WLC_E_EXCEEDED_MEDIUM_TIME, "EXCEEDED_MEDIUM_TIME"}, { - WLC_E_ICV_ERROR, "ICV_ERROR"}, { - WLC_E_UNICAST_DECODE_ERROR, "UNICAST_DECODE_ERROR"}, { - WLC_E_MULTICAST_DECODE_ERROR, "MULTICAST_DECODE_ERROR"}, { - WLC_E_TRACE, "TRACE"}, { - WLC_E_ACTION_FRAME, "ACTION FRAME"}, { - WLC_E_ACTION_FRAME_COMPLETE, "ACTION FRAME TX COMPLETE"}, { - WLC_E_IF, "IF"}, { - WLC_E_RSSI, "RSSI"}, { - WLC_E_PFN_SCAN_COMPLETE, "SCAN_COMPLETE"} + BRCMF_E_SET_SSID, "SET_SSID"}, { + BRCMF_E_JOIN, "JOIN"}, { + BRCMF_E_START, "START"}, { + BRCMF_E_AUTH, "AUTH"}, { + BRCMF_E_AUTH_IND, "AUTH_IND"}, { + BRCMF_E_DEAUTH, "DEAUTH"}, { + BRCMF_E_DEAUTH_IND, "DEAUTH_IND"}, { + BRCMF_E_ASSOC, "ASSOC"}, { + BRCMF_E_ASSOC_IND, "ASSOC_IND"}, { + BRCMF_E_REASSOC, "REASSOC"}, { + BRCMF_E_REASSOC_IND, "REASSOC_IND"}, { + BRCMF_E_DISASSOC, "DISASSOC"}, { + BRCMF_E_DISASSOC_IND, "DISASSOC_IND"}, { + BRCMF_E_QUIET_START, "START_QUIET"}, { + BRCMF_E_QUIET_END, "END_QUIET"}, { + BRCMF_E_BEACON_RX, "BEACON_RX"}, { + BRCMF_E_LINK, "LINK"}, { + BRCMF_E_MIC_ERROR, "MIC_ERROR"}, { + BRCMF_E_NDIS_LINK, "NDIS_LINK"}, { + BRCMF_E_ROAM, "ROAM"}, { + BRCMF_E_TXFAIL, "TXFAIL"}, { + BRCMF_E_PMKID_CACHE, "PMKID_CACHE"}, { + BRCMF_E_RETROGRADE_TSF, "RETROGRADE_TSF"}, { + BRCMF_E_PRUNE, "PRUNE"}, { + BRCMF_E_AUTOAUTH, "AUTOAUTH"}, { + BRCMF_E_EAPOL_MSG, "EAPOL_MSG"}, { + BRCMF_E_SCAN_COMPLETE, "SCAN_COMPLETE"}, { + BRCMF_E_ADDTS_IND, "ADDTS_IND"}, { + BRCMF_E_DELTS_IND, "DELTS_IND"}, { + BRCMF_E_BCNSENT_IND, "BCNSENT_IND"}, { + BRCMF_E_BCNRX_MSG, "BCNRX_MSG"}, { + BRCMF_E_BCNLOST_MSG, "BCNLOST_MSG"}, { + BRCMF_E_ROAM_PREP, "ROAM_PREP"}, { + BRCMF_E_PFN_NET_FOUND, "PNO_NET_FOUND"}, { + BRCMF_E_PFN_NET_LOST, "PNO_NET_LOST"}, { + BRCMF_E_RESET_COMPLETE, "RESET_COMPLETE"}, { + BRCMF_E_JOIN_START, "JOIN_START"}, { + BRCMF_E_ROAM_START, "ROAM_START"}, { + BRCMF_E_ASSOC_START, "ASSOC_START"}, { + BRCMF_E_IBSS_ASSOC, "IBSS_ASSOC"}, { + BRCMF_E_RADIO, "RADIO"}, { + BRCMF_E_PSM_WATCHDOG, "PSM_WATCHDOG"}, { + BRCMF_E_PROBREQ_MSG, "PROBREQ_MSG"}, { + BRCMF_E_SCAN_CONFIRM_IND, "SCAN_CONFIRM_IND"}, { + BRCMF_E_PSK_SUP, "PSK_SUP"}, { + BRCMF_E_COUNTRY_CODE_CHANGED, "COUNTRY_CODE_CHANGED"}, { + BRCMF_E_EXCEEDED_MEDIUM_TIME, "EXCEEDED_MEDIUM_TIME"}, { + BRCMF_E_ICV_ERROR, "ICV_ERROR"}, { + BRCMF_E_UNICAST_DECODE_ERROR, "UNICAST_DECODE_ERROR"}, { + BRCMF_E_MULTICAST_DECODE_ERROR, "MULTICAST_DECODE_ERROR"}, { + BRCMF_E_TRACE, "TRACE"}, { + BRCMF_E_ACTION_FRAME, "ACTION FRAME"}, { + BRCMF_E_ACTION_FRAME_COMPLETE, "ACTION FRAME TX COMPLETE"}, { + BRCMF_E_IF, "IF"}, { + BRCMF_E_RSSI, "RSSI"}, { + BRCMF_E_PFN_SCAN_COMPLETE, "SCAN_COMPLETE"} }; uint event_type, flags, auth_type, datalen; event_type = be32_to_cpu(event->event_type); @@ -585,54 +517,55 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) event_name = event_names[i].event_name; } - DHD_EVENT(("EVENT: %s, event ID = %d\n", event_name, event_type)); - DHD_EVENT(("flags 0x%04x, status %d, reason %d, auth_type %d MAC %s\n", - flags, status, reason, auth_type, eabuf)); + BRCMF_EVENT(("EVENT: %s, event ID = %d\n", event_name, event_type)); + BRCMF_EVENT(("flags 0x%04x, status %d, reason %d, auth_type %d" + " MAC %s\n", flags, status, reason, auth_type, eabuf)); - if (flags & WLC_EVENT_MSG_LINK) + if (flags & BRCMF_EVENT_MSG_LINK) link = true; - if (flags & WLC_EVENT_MSG_GROUP) + if (flags & BRCMF_EVENT_MSG_GROUP) group = true; - if (flags & WLC_EVENT_MSG_FLUSHTXQ) + if (flags & BRCMF_EVENT_MSG_FLUSHTXQ) flush_txq = true; switch (event_type) { - case WLC_E_START: - case WLC_E_DEAUTH: - case WLC_E_DISASSOC: - DHD_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf)); + case BRCMF_E_START: + case BRCMF_E_DEAUTH: + case BRCMF_E_DISASSOC: + BRCMF_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf)); break; - case WLC_E_ASSOC_IND: - case WLC_E_REASSOC_IND: - DHD_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf)); + case BRCMF_E_ASSOC_IND: + case BRCMF_E_REASSOC_IND: + BRCMF_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf)); break; - case WLC_E_ASSOC: - case WLC_E_REASSOC: - if (status == WLC_E_STATUS_SUCCESS) { - DHD_EVENT(("MACEVENT: %s, MAC %s, SUCCESS\n", - event_name, eabuf)); - } else if (status == WLC_E_STATUS_TIMEOUT) { - DHD_EVENT(("MACEVENT: %s, MAC %s, TIMEOUT\n", - event_name, eabuf)); - } else if (status == WLC_E_STATUS_FAIL) { - DHD_EVENT(("MACEVENT: %s, MAC %s, FAILURE, reason %d\n", - event_name, eabuf, (int)reason)); + case BRCMF_E_ASSOC: + case BRCMF_E_REASSOC: + if (status == BRCMF_E_STATUS_SUCCESS) { + BRCMF_EVENT(("MACEVENT: %s, MAC %s, SUCCESS\n", + event_name, eabuf)); + } else if (status == BRCMF_E_STATUS_TIMEOUT) { + BRCMF_EVENT(("MACEVENT: %s, MAC %s, TIMEOUT\n", + event_name, eabuf)); + } else if (status == BRCMF_E_STATUS_FAIL) { + BRCMF_EVENT(("MACEVENT: %s, MAC %s, FAILURE," + " reason %d\n", event_name, eabuf, + (int)reason)); } else { - DHD_EVENT(("MACEVENT: %s, MAC %s, unexpected status " - "%d\n", event_name, eabuf, (int)status)); + BRCMF_EVENT(("MACEVENT: %s, MAC %s, unexpected status " + "%d\n", event_name, eabuf, (int)status)); } break; - case WLC_E_DEAUTH_IND: - case WLC_E_DISASSOC_IND: - DHD_EVENT(("MACEVENT: %s, MAC %s, reason %d\n", event_name, - eabuf, (int)reason)); + case BRCMF_E_DEAUTH_IND: + case BRCMF_E_DISASSOC_IND: + BRCMF_EVENT(("MACEVENT: %s, MAC %s, reason %d\n", event_name, + eabuf, (int)reason)); break; - case WLC_E_AUTH: - case WLC_E_AUTH_IND: + case BRCMF_E_AUTH: + case BRCMF_E_AUTH_IND: if (auth_type == WLAN_AUTH_OPEN) auth_str = "Open System"; else if (auth_type == WLAN_AUTH_SHARED_KEY) @@ -641,102 +574,102 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) sprintf(err_msg, "AUTH unknown: %d", (int)auth_type); auth_str = err_msg; } - if (event_type == WLC_E_AUTH_IND) { - DHD_EVENT(("MACEVENT: %s, MAC %s, %s\n", event_name, - eabuf, auth_str)); - } else if (status == WLC_E_STATUS_SUCCESS) { - DHD_EVENT(("MACEVENT: %s, MAC %s, %s, SUCCESS\n", - event_name, eabuf, auth_str)); - } else if (status == WLC_E_STATUS_TIMEOUT) { - DHD_EVENT(("MACEVENT: %s, MAC %s, %s, TIMEOUT\n", - event_name, eabuf, auth_str)); - } else if (status == WLC_E_STATUS_FAIL) { - DHD_EVENT(("MACEVENT: %s, MAC %s, %s, FAILURE, " - "reason %d\n", - event_name, eabuf, auth_str, (int)reason)); + if (event_type == BRCMF_E_AUTH_IND) { + BRCMF_EVENT(("MACEVENT: %s, MAC %s, %s\n", event_name, + eabuf, auth_str)); + } else if (status == BRCMF_E_STATUS_SUCCESS) { + BRCMF_EVENT(("MACEVENT: %s, MAC %s, %s, SUCCESS\n", + event_name, eabuf, auth_str)); + } else if (status == BRCMF_E_STATUS_TIMEOUT) { + BRCMF_EVENT(("MACEVENT: %s, MAC %s, %s, TIMEOUT\n", + event_name, eabuf, auth_str)); + } else if (status == BRCMF_E_STATUS_FAIL) { + BRCMF_EVENT(("MACEVENT: %s, MAC %s, %s, FAILURE, " + "reason %d\n", + event_name, eabuf, auth_str, (int)reason)); } break; - case WLC_E_JOIN: - case WLC_E_ROAM: - case WLC_E_SET_SSID: - if (status == WLC_E_STATUS_SUCCESS) { - DHD_EVENT(("MACEVENT: %s, MAC %s\n", event_name, - eabuf)); - } else if (status == WLC_E_STATUS_FAIL) { - DHD_EVENT(("MACEVENT: %s, failed\n", event_name)); - } else if (status == WLC_E_STATUS_NO_NETWORKS) { - DHD_EVENT(("MACEVENT: %s, no networks found\n", - event_name)); + case BRCMF_E_JOIN: + case BRCMF_E_ROAM: + case BRCMF_E_SET_SSID: + if (status == BRCMF_E_STATUS_SUCCESS) { + BRCMF_EVENT(("MACEVENT: %s, MAC %s\n", event_name, + eabuf)); + } else if (status == BRCMF_E_STATUS_FAIL) { + BRCMF_EVENT(("MACEVENT: %s, failed\n", event_name)); + } else if (status == BRCMF_E_STATUS_NO_NETWORKS) { + BRCMF_EVENT(("MACEVENT: %s, no networks found\n", + event_name)); } else { - DHD_EVENT(("MACEVENT: %s, unexpected status %d\n", - event_name, (int)status)); + BRCMF_EVENT(("MACEVENT: %s, unexpected status %d\n", + event_name, (int)status)); } break; - case WLC_E_BEACON_RX: - if (status == WLC_E_STATUS_SUCCESS) { - DHD_EVENT(("MACEVENT: %s, SUCCESS\n", event_name)); - } else if (status == WLC_E_STATUS_FAIL) { - DHD_EVENT(("MACEVENT: %s, FAIL\n", event_name)); + case BRCMF_E_BEACON_RX: + if (status == BRCMF_E_STATUS_SUCCESS) { + BRCMF_EVENT(("MACEVENT: %s, SUCCESS\n", event_name)); + } else if (status == BRCMF_E_STATUS_FAIL) { + BRCMF_EVENT(("MACEVENT: %s, FAIL\n", event_name)); } else { - DHD_EVENT(("MACEVENT: %s, status %d\n", event_name, - status)); + BRCMF_EVENT(("MACEVENT: %s, status %d\n", event_name, + status)); } break; - case WLC_E_LINK: - DHD_EVENT(("MACEVENT: %s %s\n", event_name, - link ? "UP" : "DOWN")); + case BRCMF_E_LINK: + BRCMF_EVENT(("MACEVENT: %s %s\n", event_name, + link ? "UP" : "DOWN")); break; - case WLC_E_MIC_ERROR: - DHD_EVENT(("MACEVENT: %s, MAC %s, Group %d, Flush %d\n", - event_name, eabuf, group, flush_txq)); + case BRCMF_E_MIC_ERROR: + BRCMF_EVENT(("MACEVENT: %s, MAC %s, Group %d, Flush %d\n", + event_name, eabuf, group, flush_txq)); break; - case WLC_E_ICV_ERROR: - case WLC_E_UNICAST_DECODE_ERROR: - case WLC_E_MULTICAST_DECODE_ERROR: - DHD_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf)); + case BRCMF_E_ICV_ERROR: + case BRCMF_E_UNICAST_DECODE_ERROR: + case BRCMF_E_MULTICAST_DECODE_ERROR: + BRCMF_EVENT(("MACEVENT: %s, MAC %s\n", event_name, eabuf)); break; - case WLC_E_TXFAIL: - DHD_EVENT(("MACEVENT: %s, RA %s\n", event_name, eabuf)); + case BRCMF_E_TXFAIL: + BRCMF_EVENT(("MACEVENT: %s, RA %s\n", event_name, eabuf)); break; - case WLC_E_SCAN_COMPLETE: - case WLC_E_PMKID_CACHE: - DHD_EVENT(("MACEVENT: %s\n", event_name)); + case BRCMF_E_SCAN_COMPLETE: + case BRCMF_E_PMKID_CACHE: + BRCMF_EVENT(("MACEVENT: %s\n", event_name)); break; - case WLC_E_PFN_NET_FOUND: - case WLC_E_PFN_NET_LOST: - case WLC_E_PFN_SCAN_COMPLETE: - DHD_EVENT(("PNOEVENT: %s\n", event_name)); + case BRCMF_E_PFN_NET_FOUND: + case BRCMF_E_PFN_NET_LOST: + case BRCMF_E_PFN_SCAN_COMPLETE: + BRCMF_EVENT(("PNOEVENT: %s\n", event_name)); break; - case WLC_E_PSK_SUP: - case WLC_E_PRUNE: - DHD_EVENT(("MACEVENT: %s, status %d, reason %d\n", + case BRCMF_E_PSK_SUP: + case BRCMF_E_PRUNE: + BRCMF_EVENT(("MACEVENT: %s, status %d, reason %d\n", event_name, (int)status, (int)reason)); break; - case WLC_E_TRACE: + case BRCMF_E_TRACE: { static u32 seqnum_prev; - msgtrace_hdr_t hdr; + struct msgtrace_hdr hdr; u32 nblost; char *s, *p; buf = (unsigned char *) event_data; - memcpy(&hdr, buf, MSGTRACE_HDRLEN); + memcpy(&hdr, buf, sizeof(struct msgtrace_hdr)); if (hdr.version != MSGTRACE_VERSION) { - DHD_ERROR( + BRCMF_ERROR( ("\nMACEVENT: %s [unsupported version --> " - "dhd version:%d dongle version:%d]\n", + "brcmf version:%d dongle version:%d]\n", event_name, MSGTRACE_VERSION, hdr.version) ); /* Reset datalen to avoid display below */ @@ -745,11 +678,12 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) } /* There are 2 bytes available at the end of data */ - buf[MSGTRACE_HDRLEN + be16_to_cpu(hdr.len)] = '\0'; + *(buf + sizeof(struct msgtrace_hdr) + + be16_to_cpu(hdr.len)) = '\0'; if (be32_to_cpu(hdr.discarded_bytes) || be32_to_cpu(hdr.discarded_printf)) { - DHD_ERROR( + BRCMF_ERROR( ("\nWLC_E_TRACE: [Discarded traces in dongle -->" "discarded_bytes %d discarded_printf %d]\n", be32_to_cpu(hdr.discarded_bytes), @@ -758,7 +692,7 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) nblost = be32_to_cpu(hdr.seqnum) - seqnum_prev - 1; if (nblost > 0) { - DHD_ERROR( + BRCMF_ERROR( ("\nWLC_E_TRACE: [Event lost --> seqnum %d nblost %d\n", be32_to_cpu(hdr.seqnum), nblost)); } @@ -768,7 +702,7 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) * avoid display big * printf (issue with Linux printk ) */ - p = (char *)&buf[MSGTRACE_HDRLEN]; + p = (char *)&buf[sizeof(struct msgtrace_hdr)]; while ((s = strstr(p, "\n")) != NULL) { *s = '\0'; printk(KERN_DEBUG"%s\n", p); @@ -781,49 +715,49 @@ static void wl_show_host_event(wl_event_msg_t *event, void *event_data) } break; - case WLC_E_RSSI: - DHD_EVENT(("MACEVENT: %s %d\n", event_name, - be32_to_cpu(*((int *)event_data)))); + case BRCMF_E_RSSI: + BRCMF_EVENT(("MACEVENT: %s %d\n", event_name, + be32_to_cpu(*((int *)event_data)))); break; default: - DHD_EVENT(("MACEVENT: %s %d, MAC %s, status %d, reason %d, " - "auth %d\n", event_name, event_type, eabuf, - (int)status, (int)reason, (int)auth_type)); + BRCMF_EVENT(("MACEVENT: %s %d, MAC %s, status %d, reason %d, " + "auth %d\n", event_name, event_type, eabuf, + (int)status, (int)reason, (int)auth_type)); break; } /* show any appended data */ if (datalen) { buf = (unsigned char *) event_data; - DHD_EVENT((" data (%d) : ", datalen)); + BRCMF_EVENT((" data (%d) : ", datalen)); for (i = 0; i < datalen; i++) - DHD_EVENT((" 0x%02x ", *buf++)); - DHD_EVENT(("\n")); + BRCMF_EVENT((" 0x%02x ", *buf++)); + BRCMF_EVENT(("\n")); } } #endif /* SHOW_EVENTS */ int -wl_host_event(struct dhd_info *dhd, int *ifidx, void *pktdata, - wl_event_msg_t *event, void **data_ptr) +brcmf_c_host_event(struct brcmf_info *drvr_priv, int *ifidx, void *pktdata, + struct brcmf_event_msg *event, void **data_ptr) { /* check whether packet is a BRCM event pkt */ - bcm_event_t *pvt_data = (bcm_event_t *) pktdata; + struct brcmf_event *pvt_data = (struct brcmf_event *) pktdata; char *event_data; u32 type, status; u16 flags; int evlen; - if (memcmp(BRCM_OUI, &pvt_data->bcm_hdr.oui[0], DOT11_OUI_LEN)) { - DHD_ERROR(("%s: mismatched OUI, bailing\n", __func__)); + if (memcmp(BRCM_OUI, &pvt_data->hdr.oui[0], DOT11_OUI_LEN)) { + BRCMF_ERROR(("%s: mismatched OUI, bailing\n", __func__)); return -EBADE; } /* BRCM event pkt may be unaligned - use xxx_ua to load user_subtype. */ - if (get_unaligned_be16(&pvt_data->bcm_hdr.usr_subtype) != + if (get_unaligned_be16(&pvt_data->hdr.usr_subtype) != BCMILCP_BCM_SUBTYPE_EVENT) { - DHD_ERROR(("%s: mismatched subtype, bailing\n", __func__)); + BRCMF_ERROR(("%s: mismatched subtype, bailing\n", __func__)); return -EBADE; } @@ -831,93 +765,87 @@ wl_host_event(struct dhd_info *dhd, int *ifidx, void *pktdata, event_data = *data_ptr; /* memcpy since BRCM event pkt may be unaligned. */ - memcpy(event, &pvt_data->event, sizeof(wl_event_msg_t)); + memcpy(event, &pvt_data->msg, sizeof(struct brcmf_event_msg)); type = get_unaligned_be32(&event->event_type); flags = get_unaligned_be16(&event->flags); status = get_unaligned_be32(&event->status); - evlen = get_unaligned_be32(&event->datalen) + sizeof(bcm_event_t); + evlen = get_unaligned_be32(&event->datalen) + + sizeof(struct brcmf_event); switch (type) { - case WLC_E_IF: + case BRCMF_E_IF: { - dhd_if_event_t *ifevent = (dhd_if_event_t *) event_data; - DHD_TRACE(("%s: if event\n", __func__)); + struct brcmf_if_event *ifevent = + (struct brcmf_if_event *) event_data; + BRCMF_TRACE(("%s: if event\n", __func__)); if (ifevent->ifidx > 0 && - ifevent->ifidx < DHD_MAX_IFS) { - if (ifevent->action == WLC_E_IF_ADD) - dhd_add_if(dhd, ifevent->ifidx, + ifevent->ifidx < BRCMF_MAX_IFS) { + if (ifevent->action == BRCMF_E_IF_ADD) + brcmf_add_if(drvr_priv, ifevent->ifidx, NULL, event->ifname, pvt_data->eth.h_dest, ifevent->flags, ifevent->bssidx); else - dhd_del_if(dhd, ifevent->ifidx); + brcmf_del_if(drvr_priv, ifevent->ifidx); } else { - DHD_ERROR(("%s: Invalid ifidx %d for %s\n", - __func__, ifevent->ifidx, - event->ifname)); + BRCMF_ERROR(("%s: Invalid ifidx %d for %s\n", + __func__, ifevent->ifidx, + event->ifname)); } } /* send up the if event: btamp user needs it */ - *ifidx = dhd_ifname2idx(dhd, event->ifname); - /* push up to external supp/auth */ - dhd_event(dhd, (char *)pvt_data, evlen, *ifidx); + *ifidx = brcmf_ifname2idx(drvr_priv, event->ifname); break; -#ifdef P2P - case WLC_E_NDIS_LINK: - break; -#endif - /* fall through */ /* These are what external supplicant/authenticator wants */ - case WLC_E_LINK: - case WLC_E_ASSOC_IND: - case WLC_E_REASSOC_IND: - case WLC_E_DISASSOC_IND: - case WLC_E_MIC_ERROR: + case BRCMF_E_LINK: + case BRCMF_E_ASSOC_IND: + case BRCMF_E_REASSOC_IND: + case BRCMF_E_DISASSOC_IND: + case BRCMF_E_MIC_ERROR: default: /* Fall through: this should get _everything_ */ - *ifidx = dhd_ifname2idx(dhd, event->ifname); - /* push up to external supp/auth */ - dhd_event(dhd, (char *)pvt_data, evlen, *ifidx); - DHD_TRACE(("%s: MAC event %d, flags %x, status %x\n", - __func__, type, flags, status)); + *ifidx = brcmf_ifname2idx(drvr_priv, event->ifname); + BRCMF_TRACE(("%s: MAC event %d, flags %x, status %x\n", + __func__, type, flags, status)); - /* put it back to WLC_E_NDIS_LINK */ - if (type == WLC_E_NDIS_LINK) { + /* put it back to BRCMF_E_NDIS_LINK */ + if (type == BRCMF_E_NDIS_LINK) { u32 temp; temp = get_unaligned_be32(&event->event_type); - DHD_TRACE(("Converted to WLC_E_LINK type %d\n", temp)); + BRCMF_TRACE(("Converted to WLC_E_LINK type %d\n", + temp)); - temp = be32_to_cpu(WLC_E_NDIS_LINK); - memcpy((void *)(&pvt_data->event.event_type), &temp, - sizeof(pvt_data->event.event_type)); + temp = be32_to_cpu(BRCMF_E_NDIS_LINK); + memcpy((void *)(&pvt_data->msg.event_type), &temp, + sizeof(pvt_data->msg.event_type)); } break; } #ifdef SHOW_EVENTS - wl_show_host_event(event, event_data); + brcmf_c_show_host_event(event, event_data); #endif /* SHOW_EVENTS */ return 0; } /* Convert user's input in hex pattern to byte-size mask */ -static int wl_pattern_atoh(char *src, char *dst) +static int brcmf_c_pattern_atoh(char *src, char *dst) { int i; if (strncmp(src, "0x", 2) != 0 && strncmp(src, "0X", 2) != 0) { - DHD_ERROR(("Mask invalid format. Needs to start with 0x\n")); + BRCMF_ERROR(("Mask invalid format. Needs to start with 0x\n")); return -1; } src = src + 2; /* Skip past 0x */ if (strlen(src) % 2 != 0) { - DHD_ERROR(("Mask invalid format. Length must be even.\n")); + BRCMF_ERROR(("Mask invalid format. Length must be even.\n")); return -1; } for (i = 0; *src != '\0'; i++) { @@ -931,7 +859,7 @@ static int wl_pattern_atoh(char *src, char *dst) } void -dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable, +brcmf_c_pktfilter_offload_enable(struct brcmf_pub *drvr, char *arg, int enable, int master_mode) { char *argv[8]; @@ -942,12 +870,12 @@ dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable, char *arg_save = 0, *arg_org = 0; int rc; char buf[128]; - wl_pkt_filter_enable_t enable_parm; - wl_pkt_filter_enable_t *pkt_filterp; + struct brcmf_pkt_filter_enable enable_parm; + struct brcmf_pkt_filter_enable *pkt_filterp; arg_save = kmalloc(strlen(arg) + 1, GFP_ATOMIC); if (!arg_save) { - DHD_ERROR(("%s: kmalloc failed\n", __func__)); + BRCMF_ERROR(("%s: kmalloc failed\n", __func__)); goto fail; } arg_org = arg_save; @@ -957,7 +885,7 @@ dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable, i = 0; if (NULL == argv[i]) { - DHD_ERROR(("No args provided\n")); + BRCMF_ERROR(("No args provided\n")); goto fail; } @@ -967,7 +895,7 @@ dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable, buf[str_len] = '\0'; buf_len = str_len + 1; - pkt_filterp = (wl_pkt_filter_enable_t *) (buf + str_len + 1); + pkt_filterp = (struct brcmf_pkt_filter_enable *) (buf + str_len + 1); /* Parse packet filter id. */ enable_parm.id = simple_strtoul(argv[i], NULL, 0); @@ -979,33 +907,34 @@ dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable, memcpy((char *)pkt_filterp, &enable_parm, sizeof(enable_parm)); /* Enable/disable the specified filter. */ - rc = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, buf_len); + rc = brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, buf, buf_len); rc = rc >= 0 ? 0 : rc; if (rc) - DHD_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n", - __func__, arg, rc)); + BRCMF_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n", + __func__, arg, rc)); else - DHD_TRACE(("%s: successfully added pktfilter %s\n", - __func__, arg)); + BRCMF_TRACE(("%s: successfully added pktfilter %s\n", + __func__, arg)); /* Contorl the master mode */ - bcm_mkiovar("pkt_filter_mode", (char *)&master_mode, 4, buf, + brcmu_mkiovar("pkt_filter_mode", (char *)&master_mode, 4, buf, sizeof(buf)); - rc = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, sizeof(buf)); + rc = brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, buf, + sizeof(buf)); rc = rc >= 0 ? 0 : rc; if (rc) - DHD_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n", - __func__, arg, rc)); + BRCMF_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n", + __func__, arg, rc)); fail: kfree(arg_org); } -void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg) +void brcmf_c_pktfilter_offload_set(struct brcmf_pub *drvr, char *arg) { const char *str; - wl_pkt_filter_t pkt_filter; - wl_pkt_filter_t *pkt_filterp; + struct brcmf_pkt_filter pkt_filter; + struct brcmf_pkt_filter *pkt_filterp; int buf_len; int str_len; int rc; @@ -1014,29 +943,22 @@ void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg) char *argv[8], *buf = 0; int i = 0; char *arg_save = 0, *arg_org = 0; -#define BUF_SIZE 2048 arg_save = kmalloc(strlen(arg) + 1, GFP_ATOMIC); if (!arg_save) { - DHD_ERROR(("%s: kmalloc failed\n", __func__)); + BRCMF_ERROR(("%s: kmalloc failed\n", __func__)); goto fail; } arg_org = arg_save; - buf = kmalloc(BUF_SIZE, GFP_ATOMIC); + buf = kmalloc(PKTFILTER_BUF_SIZE, GFP_ATOMIC); if (!buf) { - DHD_ERROR(("%s: kmalloc failed\n", __func__)); + BRCMF_ERROR(("%s: kmalloc failed\n", __func__)); goto fail; } - memcpy(arg_save, arg, strlen(arg) + 1); - - if (strlen(arg) > BUF_SIZE) { - DHD_ERROR(("Not enough buffer %d < %d\n", (int)strlen(arg), - (int)sizeof(buf))); - goto fail; - } + strcpy(arg_save, arg); argv[i] = strsep(&arg_save, " "); while (argv[i++]) @@ -1044,23 +966,22 @@ void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg) i = 0; if (NULL == argv[i]) { - DHD_ERROR(("No args provided\n")); + BRCMF_ERROR(("No args provided\n")); goto fail; } str = "pkt_filter_add"; + strcpy(buf, str); str_len = strlen(str); - strncpy(buf, str, str_len); - buf[str_len] = '\0'; buf_len = str_len + 1; - pkt_filterp = (wl_pkt_filter_t *) (buf + str_len + 1); + pkt_filterp = (struct brcmf_pkt_filter *) (buf + str_len + 1); /* Parse packet filter id. */ pkt_filter.id = simple_strtoul(argv[i], NULL, 0); if (NULL == argv[++i]) { - DHD_ERROR(("Polarity not provided\n")); + BRCMF_ERROR(("Polarity not provided\n")); goto fail; } @@ -1068,7 +989,7 @@ void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg) pkt_filter.negate_match = simple_strtoul(argv[i], NULL, 0); if (NULL == argv[++i]) { - DHD_ERROR(("Filter type not provided\n")); + BRCMF_ERROR(("Filter type not provided\n")); goto fail; } @@ -1076,7 +997,7 @@ void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg) pkt_filter.type = simple_strtoul(argv[i], NULL, 0); if (NULL == argv[++i]) { - DHD_ERROR(("Offset not provided\n")); + BRCMF_ERROR(("Offset not provided\n")); goto fail; } @@ -1084,34 +1005,34 @@ void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg) pkt_filter.u.pattern.offset = simple_strtoul(argv[i], NULL, 0); if (NULL == argv[++i]) { - DHD_ERROR(("Bitmask not provided\n")); + BRCMF_ERROR(("Bitmask not provided\n")); goto fail; } /* Parse pattern filter mask. */ mask_size = - wl_pattern_atoh + brcmf_c_pattern_atoh (argv[i], (char *)pkt_filterp->u.pattern.mask_and_pattern); if (NULL == argv[++i]) { - DHD_ERROR(("Pattern not provided\n")); + BRCMF_ERROR(("Pattern not provided\n")); goto fail; } /* Parse pattern filter pattern. */ pattern_size = - wl_pattern_atoh(argv[i], + brcmf_c_pattern_atoh(argv[i], (char *)&pkt_filterp->u.pattern. mask_and_pattern[mask_size]); if (mask_size != pattern_size) { - DHD_ERROR(("Mask and pattern not the same size\n")); + BRCMF_ERROR(("Mask and pattern not the same size\n")); goto fail; } pkt_filter.u.pattern.size_bytes = mask_size; - buf_len += WL_PKT_FILTER_FIXED_LEN; - buf_len += (WL_PKT_FILTER_PATTERN_FIXED_LEN + 2 * mask_size); + buf_len += BRCMF_PKT_FILTER_FIXED_LEN; + buf_len += (BRCMF_PKT_FILTER_PATTERN_FIXED_LEN + 2 * mask_size); /* Keep-alive attributes are set in local * variable (keep_alive_pkt), and @@ -1120,17 +1041,17 @@ void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg) */ memcpy((char *)pkt_filterp, &pkt_filter, - WL_PKT_FILTER_FIXED_LEN + WL_PKT_FILTER_PATTERN_FIXED_LEN); + BRCMF_PKT_FILTER_FIXED_LEN + BRCMF_PKT_FILTER_PATTERN_FIXED_LEN); - rc = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, buf_len); + rc = brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, buf, buf_len); rc = rc >= 0 ? 0 : rc; if (rc) - DHD_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n", - __func__, arg, rc)); + BRCMF_TRACE(("%s: failed to add pktfilter %s, retcode = %d\n", + __func__, arg, rc)); else - DHD_TRACE(("%s: successfully added pktfilter %s\n", - __func__, arg)); + BRCMF_TRACE(("%s: successfully added pktfilter %s\n", + __func__, arg)); fail: kfree(arg_org); @@ -1138,711 +1059,138 @@ fail: kfree(buf); } -void dhd_arp_offload_set(dhd_pub_t *dhd, int arp_mode) +void brcmf_c_arp_offload_set(struct brcmf_pub *drvr, int arp_mode) { char iovbuf[32]; int retcode; - bcm_mkiovar("arp_ol", (char *)&arp_mode, 4, iovbuf, sizeof(iovbuf)); - retcode = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("arp_ol", (char *)&arp_mode, 4, iovbuf, sizeof(iovbuf)); + retcode = brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, + iovbuf, sizeof(iovbuf)); retcode = retcode >= 0 ? 0 : retcode; if (retcode) - DHD_TRACE(("%s: failed to set ARP offload mode to 0x%x, " - "retcode = %d\n", __func__, arp_mode, retcode)); + BRCMF_TRACE(("%s: failed to set ARP offload mode to 0x%x, " + "retcode = %d\n", __func__, arp_mode, retcode)); else - DHD_TRACE(("%s: successfully set ARP offload mode to 0x%x\n", - __func__, arp_mode)); + BRCMF_TRACE(("%s: successfully set ARP offload mode to 0x%x\n", + __func__, arp_mode)); } -void dhd_arp_offload_enable(dhd_pub_t *dhd, int arp_enable) +void brcmf_c_arp_offload_enable(struct brcmf_pub *drvr, int arp_enable) { char iovbuf[32]; int retcode; - bcm_mkiovar("arpoe", (char *)&arp_enable, 4, iovbuf, sizeof(iovbuf)); - retcode = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("arpoe", (char *)&arp_enable, 4, iovbuf, sizeof(iovbuf)); + retcode = brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, + iovbuf, sizeof(iovbuf)); retcode = retcode >= 0 ? 0 : retcode; if (retcode) - DHD_TRACE(("%s: failed to enabe ARP offload to %d, " - "retcode = %d\n", __func__, arp_enable, retcode)); + BRCMF_TRACE(("%s: failed to enabe ARP offload to %d, " + "retcode = %d\n", __func__, arp_enable, retcode)); else - DHD_TRACE(("%s: successfully enabed ARP offload to %d\n", - __func__, arp_enable)); + BRCMF_TRACE(("%s: successfully enabed ARP offload to %d\n", + __func__, arp_enable)); } -int dhd_preinit_ioctls(dhd_pub_t *dhd) +int brcmf_c_preinit_ioctls(struct brcmf_pub *drvr) { - char iovbuf[WL_EVENTING_MASK_LEN + 12]; /* Room for + char iovbuf[BRCMF_EVENTING_MASK_LEN + 12]; /* Room for "event_msgs" + '\0' + bitvec */ uint up = 0; char buf[128], *ptr; uint power_mode = PM_FAST; - u32 dongle_align = DHD_SDALIGN; + u32 dongle_align = BRCMF_SDALIGN; u32 glom = 0; uint bcn_timeout = 3; int scan_assoc_time = 40; int scan_unassoc_time = 40; -#ifdef GET_CUSTOM_MAC_ENABLE - int ret = 0; - u8 ea_addr[ETH_ALEN]; -#endif /* GET_CUSTOM_MAC_ENABLE */ - - dhd_os_proto_block(dhd); - -#ifdef GET_CUSTOM_MAC_ENABLE - /* Read MAC address from external customer place - ** NOTE that default mac address has to be present in - ** otp or nvram file to bring up - ** firmware but unique per board mac address maybe provided by - ** customer code - */ - ret = dhd_custom_get_mac_address(ea_addr); - if (!ret) { - bcm_mkiovar("cur_etheraddr", (void *)ea_addr, ETH_ALEN, - buf, sizeof(buf)); - ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, buf, sizeof(buf)); - if (ret < 0) { - DHD_ERROR(("%s: can't set MAC address , error=%d\n", - __func__, ret)); - } else - memcpy(dhd->mac.octet, (void *)&ea_addr, - ETH_ALEN); - } -#endif /* GET_CUSTOM_MAC_ENABLE */ + int i; + + brcmf_os_proto_block(drvr); /* Set Country code */ - if (dhd->country_code[0] != 0) { - if (dhdcdc_set_ioctl(dhd, 0, WLC_SET_COUNTRY, - dhd->country_code, - sizeof(dhd->country_code)) < 0) { - DHD_ERROR(("%s: country code setting failed\n", - __func__)); + if (drvr->country_code[0] != 0) { + if (brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_COUNTRY, + drvr->country_code, + sizeof(drvr->country_code)) < 0) { + BRCMF_ERROR(("%s: country code setting failed\n", + __func__)); } } /* query for 'ver' to get version info from firmware */ memset(buf, 0, sizeof(buf)); ptr = buf; - bcm_mkiovar("ver", 0, 0, buf, sizeof(buf)); - dhdcdc_query_ioctl(dhd, 0, WLC_GET_VAR, buf, sizeof(buf)); + brcmu_mkiovar("ver", 0, 0, buf, sizeof(buf)); + brcmf_proto_cdc_query_ioctl(drvr, 0, BRCMF_C_GET_VAR, buf, sizeof(buf)); strsep(&ptr, "\n"); /* Print fw version info */ - DHD_ERROR(("Firmware version = %s\n", buf)); + BRCMF_ERROR(("Firmware version = %s\n", buf)); /* Set PowerSave mode */ - dhdcdc_set_ioctl(dhd, 0, WLC_SET_PM, (char *)&power_mode, + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_PM, (char *)&power_mode, sizeof(power_mode)); /* Match Host and Dongle rx alignment */ - bcm_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf, + brcmu_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf, sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, iovbuf, + sizeof(iovbuf)); /* disable glom option per default */ - bcm_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf)); + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, iovbuf, + sizeof(iovbuf)); /* Setup timeout if Beacons are lost and roam is off to report link down */ - bcm_mkiovar("bcn_timeout", (char *)&bcn_timeout, 4, iovbuf, + brcmu_mkiovar("bcn_timeout", (char *)&bcn_timeout, 4, iovbuf, sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, iovbuf, + sizeof(iovbuf)); /* Enable/Disable build-in roaming to allowed ext supplicant to take of romaing */ - bcm_mkiovar("roam_off", (char *)&dhd_roam, 4, iovbuf, sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("roam_off", (char *)&brcmf_roam, 4, + iovbuf, sizeof(iovbuf)); + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, iovbuf, + sizeof(iovbuf)); /* Force STA UP */ - if (dhd_radio_up) - dhdcdc_set_ioctl(dhd, 0, WLC_UP, (char *)&up, sizeof(up)); + if (brcmf_radio_up) + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_UP, (char *)&up, + sizeof(up)); /* Setup event_msgs */ - bcm_mkiovar("event_msgs", dhd->eventmask, WL_EVENTING_MASK_LEN, iovbuf, - sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + brcmu_mkiovar("event_msgs", drvr->eventmask, BRCMF_EVENTING_MASK_LEN, + iovbuf, sizeof(iovbuf)); + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_VAR, iovbuf, + sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_SCAN_CHANNEL_TIME, + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_SCAN_CHANNEL_TIME, (char *)&scan_assoc_time, sizeof(scan_assoc_time)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_SCAN_UNASSOC_TIME, + brcmf_proto_cdc_set_ioctl(drvr, 0, BRCMF_C_SET_SCAN_UNASSOC_TIME, (char *)&scan_unassoc_time, sizeof(scan_unassoc_time)); -#ifdef ARP_OFFLOAD_SUPPORT /* Set and enable ARP offload feature */ - if (dhd_arp_enable) - dhd_arp_offload_set(dhd, dhd_arp_mode); - dhd_arp_offload_enable(dhd, dhd_arp_enable); -#endif /* ARP_OFFLOAD_SUPPORT */ - -#ifdef PKT_FILTER_SUPPORT - { - int i; - /* Set up pkt filter */ - if (dhd_pkt_filter_enable) { - for (i = 0; i < dhd->pktfilter_count; i++) { - dhd_pktfilter_offload_set(dhd, - dhd->pktfilter[i]); - dhd_pktfilter_offload_enable(dhd, - dhd->pktfilter[i], - dhd_pkt_filter_init, - dhd_master_mode); - } - } - } -#endif /* PKT_FILTER_SUPPORT */ - - dhd_os_proto_unblock(dhd); - - return 0; -} - -#ifdef SIMPLE_ISCAN -uint iscan_thread_id; -iscan_buf_t *iscan_chain; - -iscan_buf_t *dhd_iscan_allocate_buf(dhd_pub_t *dhd, iscan_buf_t **iscanbuf) -{ - iscan_buf_t *iscanbuf_alloc = 0; - iscan_buf_t *iscanbuf_head; - - dhd_iscan_lock(); - - iscanbuf_alloc = kmalloc(sizeof(iscan_buf_t), GFP_ATOMIC); - if (iscanbuf_alloc == NULL) - goto fail; - - iscanbuf_alloc->next = NULL; - iscanbuf_head = *iscanbuf; - - DHD_ISCAN(("%s: addr of allocated node = 0x%X" - "addr of iscanbuf_head = 0x%X dhd = 0x%X\n", - __func__, iscanbuf_alloc, iscanbuf_head, dhd)); - - if (iscanbuf_head == NULL) { - *iscanbuf = iscanbuf_alloc; - DHD_ISCAN(("%s: Head is allocated\n", __func__)); - goto fail; - } - - while (iscanbuf_head->next) - iscanbuf_head = iscanbuf_head->next; - - iscanbuf_head->next = iscanbuf_alloc; - -fail: - dhd_iscan_unlock(); - return iscanbuf_alloc; -} - -void dhd_iscan_free_buf(void *dhdp, iscan_buf_t *iscan_delete) -{ - iscan_buf_t *iscanbuf_free = 0; - iscan_buf_t *iscanbuf_prv = 0; - iscan_buf_t *iscanbuf_cur = iscan_chain; - dhd_pub_t *dhd = dhd_bus_pub(dhdp); - - dhd_iscan_lock(); - /* If iscan_delete is null then delete the entire - * chain or else delete specific one provided - */ - if (!iscan_delete) { - while (iscanbuf_cur) { - iscanbuf_free = iscanbuf_cur; - iscanbuf_cur = iscanbuf_cur->next; - iscanbuf_free->next = 0; - kfree(iscanbuf_free); - } - iscan_chain = 0; - } else { - while (iscanbuf_cur) { - if (iscanbuf_cur == iscan_delete) - break; - iscanbuf_prv = iscanbuf_cur; - iscanbuf_cur = iscanbuf_cur->next; - } - if (iscanbuf_prv) - iscanbuf_prv->next = iscan_delete->next; - - iscan_delete->next = 0; - kfree(iscan_delete); - - if (!iscanbuf_prv) - iscan_chain = 0; - } - dhd_iscan_unlock(); -} - -iscan_buf_t *dhd_iscan_result_buf(void) -{ - return iscan_chain; -} - -/* -* print scan cache -* print partial iscan_skip list differently -*/ -int dhd_iscan_print_cache(iscan_buf_t *iscan_skip) -{ - int i = 0, l = 0; - iscan_buf_t *iscan_cur; - wl_iscan_results_t *list; - wl_scan_results_t *results; - wl_bss_info_t UNALIGNED *bi; - - dhd_iscan_lock(); - - iscan_cur = dhd_iscan_result_buf(); - - while (iscan_cur) { - list = (wl_iscan_results_t *)iscan_cur->iscan_buf; - if (!list) - break; - - results = (wl_scan_results_t *)&list->results; - if (!results) - break; - - if (results->version != WL_BSS_INFO_VERSION) { - DHD_ISCAN(("%s: results->version %d != " - "WL_BSS_INFO_VERSION\n", - __func__, results->version)); - goto done; - } - - bi = results->bss_info; - for (i = 0; i < results->count; i++) { - if (!bi) - break; - - DHD_ISCAN(("%s[%2.2d:%2.2d] %X:%X:%X:%X:%X:%X\n", - iscan_cur != iscan_skip ? "BSS" : "bss", l, - i, bi->BSSID.octet[0], bi->BSSID.octet[1], - bi->BSSID.octet[2], bi->BSSID.octet[3], - bi->BSSID.octet[4], bi->BSSID.octet[5])); - - bi = (wl_bss_info_t *)((unsigned long)bi + bi->length); - } - iscan_cur = iscan_cur->next; - l++; - } - -done: - dhd_iscan_unlock(); - return 0; -} - -/* -* delete disappeared AP from specific scan cache but skip partial -* list in iscan_skip -*/ -int dhd_iscan_delete_bss(void *dhdp, void *addr, iscan_buf_t *iscan_skip) -{ - int i = 0, j = 0, l = 0; - iscan_buf_t *iscan_cur; - wl_iscan_results_t *list; - wl_scan_results_t *results; - wl_bss_info_t UNALIGNED *bi, *bi_new, *bi_next; - - unsigned char *s_addr = addr; - - dhd_iscan_lock(); - DHD_ISCAN(("%s: BSS to remove %X:%X:%X:%X:%X:%X\n", - __func__, s_addr[0], s_addr[1], s_addr[2], - s_addr[3], s_addr[4], s_addr[5])); - - iscan_cur = dhd_iscan_result_buf(); - - while (iscan_cur) { - if (iscan_cur != iscan_skip) { - list = (wl_iscan_results_t *)iscan_cur->iscan_buf; - if (!list) - break; - - results = (wl_scan_results_t *)&list->results; - if (!results) - break; - - if (results->version != WL_BSS_INFO_VERSION) { - DHD_ERROR(("%s: results->version %d != " - "WL_BSS_INFO_VERSION\n", - __func__, results->version)); - goto done; - } - - bi = results->bss_info; - for (i = 0; i < results->count; i++) { - if (!bi) - break; - - if (!memcmp - (bi->BSSID.octet, addr, ETH_ALEN)) { - DHD_ISCAN(("%s: Del BSS[%2.2d:%2.2d] " - "%X:%X:%X:%X:%X:%X\n", - __func__, l, i, bi->BSSID.octet[0], - bi->BSSID.octet[1], bi->BSSID.octet[2], - bi->BSSID.octet[3], bi->BSSID.octet[4], - bi->BSSID.octet[5])); - - bi_new = bi; - bi = (wl_bss_info_t *)((unsigned long) - bi + bi->length); -/* - if(bi && bi_new) { - memcpy(bi_new, bi, results->buflen - - bi_new->length); - results->buflen -= bi_new->length; - } -*/ - results->buflen -= bi_new->length; - results->count--; - - for (j = i; j < results->count; j++) { - if (bi && bi_new) { - DHD_ISCAN(("%s: Moved up BSS[%2.2d:%2.2d]" "%X:%X:%X:%X:%X:%X\n", - __func__, l, j, - bi->BSSID.octet[0], - bi->BSSID.octet[1], - bi->BSSID.octet[2], - bi->BSSID.octet[3], - bi->BSSID.octet[4], - bi->BSSID.octet[5])); - - bi_next = - (wl_bss_info_t *)((unsigned long)bi + - bi->length); - memcpy(bi_new, bi, - bi->length); - bi_new = - (wl_bss_info_t *)((unsigned long)bi_new + - bi_new-> - length); - bi = bi_next; - } - } - - if (results->count == 0) { - /* Prune now empty partial - scan list */ - dhd_iscan_free_buf(dhdp, - iscan_cur); - goto done; - } - break; - } - bi = (wl_bss_info_t *)((unsigned long)bi + - bi->length); - } + if (brcmf_arp_enable) + brcmf_c_arp_offload_set(drvr, brcmf_arp_mode); + brcmf_c_arp_offload_enable(drvr, brcmf_arp_enable); + + /* Set up pkt filter */ + if (brcmf_pkt_filter_enable) { + for (i = 0; i < drvr->pktfilter_count; i++) { + brcmf_c_pktfilter_offload_set(drvr, + drvr->pktfilter[i]); + brcmf_c_pktfilter_offload_enable(drvr, + drvr->pktfilter[i], + brcmf_pkt_filter_init, + brcmf_master_mode); } - iscan_cur = iscan_cur->next; - l++; - } - -done: - dhd_iscan_unlock(); - return 0; -} - -int dhd_iscan_remove_duplicates(void *dhdp, iscan_buf_t *iscan_cur) -{ - int i = 0; - wl_iscan_results_t *list; - wl_scan_results_t *results; - wl_bss_info_t UNALIGNED *bi, *bi_new, *bi_next; - - dhd_iscan_lock(); - - DHD_ISCAN(("%s: Scan cache before delete\n", __func__)); - dhd_iscan_print_cache(iscan_cur); - - if (!iscan_cur) - goto done; - - list = (wl_iscan_results_t *)iscan_cur->iscan_buf; - if (!list) - goto done; - - results = (wl_scan_results_t *)&list->results; - if (!results) - goto done; - - if (results->version != WL_BSS_INFO_VERSION) { - DHD_ERROR(("%s: results->version %d != WL_BSS_INFO_VERSION\n", - __func__, results->version)); - goto done; } - bi = results->bss_info; - for (i = 0; i < results->count; i++) { - if (!bi) - break; - - DHD_ISCAN(("%s: Find dups for BSS[%2.2d] %X:%X:%X:%X:%X:%X\n", - __func__, i, bi->BSSID.octet[0], - bi->BSSID.octet[1], bi->BSSID.octet[2], - bi->BSSID.octet[3], bi->BSSID.octet[4], - bi->BSSID.octet[5])); - - dhd_iscan_delete_bss(dhdp, bi->BSSID.octet, iscan_cur); + brcmf_os_proto_unblock(drvr); - bi = (wl_bss_info_t *)((unsigned long)bi + bi->length); - } - -done: - DHD_ISCAN(("%s: Scan cache after delete\n", __func__)); - dhd_iscan_print_cache(iscan_cur); - dhd_iscan_unlock(); return 0; } - -void dhd_iscan_ind_scan_confirm(void *dhdp, bool status) -{ - - dhd_ind_scan_confirm(dhdp, status); -} - -int dhd_iscan_request(void *dhdp, u16 action) -{ - int rc; - wl_iscan_params_t params; - dhd_pub_t *dhd = dhd_bus_pub(dhdp); - char buf[WLC_IOCTL_SMLEN]; - - memset(¶ms, 0, sizeof(wl_iscan_params_t)); - memcpy(¶ms.params.bssid, ðer_bcast, ETH_ALEN); - - params.params.bss_type = DOT11_BSSTYPE_ANY; - params.params.scan_type = DOT11_SCANTYPE_ACTIVE; - - params.params.nprobes = -1; - params.params.active_time = -1; - params.params.passive_time = -1; - params.params.home_time = -1; - params.params.channel_num = 0; - - params.version = ISCAN_REQ_VERSION; - params.action = action; - params.scan_duration = 0; - - bcm_mkiovar("iscan", (char *)¶ms, sizeof(wl_iscan_params_t), buf, - WLC_IOCTL_SMLEN); - rc = dhd_wl_ioctl(dhdp, WLC_SET_VAR, buf, WLC_IOCTL_SMLEN); - - return rc; -} - -static int dhd_iscan_get_partial_result(void *dhdp, uint *scan_count) -{ - wl_iscan_results_t *list_buf; - wl_iscan_results_t list; - wl_scan_results_t *results; - iscan_buf_t *iscan_cur; - int status = -1; - dhd_pub_t *dhd = dhd_bus_pub(dhdp); - int rc; - - iscan_cur = dhd_iscan_allocate_buf(dhd, &iscan_chain); - if (!iscan_cur) { - DHD_ERROR(("%s: Failed to allocate node\n", __func__)); - dhd_iscan_free_buf(dhdp, 0); - dhd_iscan_request(dhdp, WL_SCAN_ACTION_ABORT); - goto fail; - } - - dhd_iscan_lock(); - - memset(iscan_cur->iscan_buf, 0, WLC_IW_ISCAN_MAXLEN); - list_buf = (wl_iscan_results_t *) iscan_cur->iscan_buf; - results = &list_buf->results; - results->buflen = WL_ISCAN_RESULTS_FIXED_SIZE; - results->version = 0; - results->count = 0; - - memset(&list, 0, sizeof(list)); - list.results.buflen = WLC_IW_ISCAN_MAXLEN; - bcm_mkiovar("iscanresults", (char *)&list, WL_ISCAN_RESULTS_FIXED_SIZE, - iscan_cur->iscan_buf, WLC_IW_ISCAN_MAXLEN); - rc = dhd_wl_ioctl(dhdp, WLC_GET_VAR, iscan_cur->iscan_buf, - WLC_IW_ISCAN_MAXLEN); - - results->buflen = results->buflen; - results->version = results->version; - *scan_count = results->count = results->count; - status = list_buf->status; - - dhd_iscan_unlock(); - - if (!(*scan_count)) - dhd_iscan_free_buf(dhdp, iscan_cur); - else - dhd_iscan_remove_duplicates(dhdp, iscan_cur); - -fail: - return status; -} -#endif /* SIMPLE_ISCAN */ - -#ifdef PNO_SUPPORT -int dhd_pno_clean(dhd_pub_t *dhd) -{ - char iovbuf[128]; - int pfn_enabled = 0; - int iov_len = 0; - int ret; - - /* Disable pfn */ - iov_len = - bcm_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf, sizeof(iovbuf)); - ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); - if (ret >= 0) { - /* clear pfn */ - iov_len = bcm_mkiovar("pfnclear", 0, 0, iovbuf, sizeof(iovbuf)); - if (iov_len) { - ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, - iov_len); - if (ret < 0) { - DHD_ERROR(("%s failed code %d\n", __func__, - ret)); - } - } else { - ret = -1; - DHD_ERROR(("%s failed code %d\n", __func__, iov_len)); - } - } else - DHD_ERROR(("%s failed code %d\n", __func__, ret)); - - return ret; -} - -int dhd_pno_enable(dhd_pub_t *dhd, int pfn_enabled) -{ - char iovbuf[128]; - int ret = -1; - - if ((!dhd) && ((pfn_enabled != 0) || (pfn_enabled != 1))) { - DHD_ERROR(("%s error exit\n", __func__)); - return ret; - } - - /* Enable/disable PNO */ - ret = bcm_mkiovar("pfn", (char *)&pfn_enabled, 4, iovbuf, - sizeof(iovbuf)); - if (ret > 0) { - ret = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, - sizeof(iovbuf)); - if (ret < 0) { - DHD_ERROR(("%s failed for error=%d\n", __func__, ret)); - return ret; - } else { - dhd->pno_enable = pfn_enabled; - DHD_TRACE(("%s set pno as %d\n", __func__, - dhd->pno_enable)); - } - } else - DHD_ERROR(("%s failed err=%d\n", __func__, ret)); - - return ret; -} - -/* Function to execute combined scan */ -int -dhd_pno_set(dhd_pub_t *dhd, wlc_ssid_t *ssids_local, int nssid, unsigned char scan_fr) -{ - int err = -1; - char iovbuf[128]; - int k, i; - wl_pfn_param_t pfn_param; - wl_pfn_t pfn_element; - - DHD_TRACE(("%s nssid=%d nchan=%d\n", __func__, nssid, scan_fr)); - - if ((!dhd) && (!ssids_local)) { - DHD_ERROR(("%s error exit\n", __func__)); - err = -1; - } - - /* Check for broadcast ssid */ - for (k = 0; k < nssid; k++) { - if (!ssids_local[k].SSID_len) { - DHD_ERROR(("%d: Broadcast SSID is ilegal for PNO " - "setting\n", k)); - return err; - } - } -/* #define PNO_DUMP 1 */ -#ifdef PNO_DUMP - { - int j; - for (j = 0; j < nssid; j++) { - DHD_ERROR(("%d: scan for %s size =%d\n", j, - ssids_local[j].SSID, - ssids_local[j].SSID_len)); - } - } -#endif /* PNO_DUMP */ - - /* clean up everything */ - err = dhd_pno_clean(dhd); - if (err < 0) { - DHD_ERROR(("%s failed error=%d\n", __func__, err)); - return err; - } - memset(&pfn_param, 0, sizeof(pfn_param)); - memset(&pfn_element, 0, sizeof(pfn_element)); - - /* set pfn parameters */ - pfn_param.version = PFN_VERSION; - pfn_param.flags = (PFN_LIST_ORDER << SORT_CRITERIA_BIT); - - /* set up pno scan fr */ - if (scan_fr != 0) - pfn_param.scan_freq = scan_fr; - - bcm_mkiovar("pfn_set", (char *)&pfn_param, sizeof(pfn_param), iovbuf, - sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); - - /* set all pfn ssid */ - for (i = 0; i < nssid; i++) { - - pfn_element.bss_type = DOT11_BSSTYPE_INFRASTRUCTURE; - pfn_element.auth = WLAN_AUTH_OPEN; - pfn_element.wpa_auth = WPA_AUTH_PFN_ANY; - pfn_element.wsec = 0; - pfn_element.infra = 1; - - memcpy((char *)pfn_element.ssid.SSID, ssids_local[i].SSID, - ssids_local[i].SSID_len); - pfn_element.ssid.SSID_len = ssids_local[i].SSID_len; - - err = bcm_mkiovar("pfn_add", (char *)&pfn_element, - sizeof(pfn_element), iovbuf, sizeof(iovbuf)); - if (err > 0) { - err = dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, - sizeof(iovbuf)); - if (err < 0) { - DHD_ERROR(("%s failed for i=%d error=%d\n", - __func__, i, err)); - return err; - } - } else - DHD_ERROR(("%s failed err=%d\n", __func__, err)); - } - - /* Enable PNO */ - /* dhd_pno_enable(dhd, 1); */ - return err; -} - -int dhd_pno_get_status(dhd_pub_t *dhd) -{ - int ret = -1; - - if (!dhd) - return ret; - else - return dhd->pno_enable; -} - -#endif /* PNO_SUPPORT */ - -/* Androd ComboSCAN support */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c b/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c deleted file mode 100644 index 1cf6c5dc2bb..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/dhd_custom_gpio.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include <linux/netdevice.h> -#include <bcmutils.h> - -#include <dngl_stats.h> -#include <dhd.h> - -#include <wlioctl.h> -#include <wl_iw.h> - -#define WL_ERROR(fmt, args...) printk(fmt, ##args) -#define WL_TRACE(fmt, args...) no_printk(fmt, ##args) - -#ifdef CUSTOMER_HW -extern void bcm_wlan_power_off(int); -extern void bcm_wlan_power_on(int); -#endif /* CUSTOMER_HW */ -#ifdef CUSTOMER_HW2 -int wifi_set_carddetect(int on); -int wifi_set_power(int on, unsigned long msec); -int wifi_get_irq_number(unsigned long *irq_flags_ptr); -#endif - -#if defined(OOB_INTR_ONLY) - -#if defined(BCMLXSDMMC) -extern int sdioh_mmc_irq(int irq); -#endif /* (BCMLXSDMMC) */ - -#ifdef CUSTOMER_HW3 -#include <mach/gpio.h> -#endif - -/* Customer specific Host GPIO definition */ -static int dhd_oob_gpio_num = -1; /* GG 19 */ - -module_param(dhd_oob_gpio_num, int, 0644); -MODULE_PARM_DESC(dhd_oob_gpio_num, "DHD oob gpio number"); - -int dhd_customer_oob_irq_map(unsigned long *irq_flags_ptr) -{ - int host_oob_irq = 0; - -#ifdef CUSTOMER_HW2 - host_oob_irq = wifi_get_irq_number(irq_flags_ptr); - -#else /* for NOT CUSTOMER_HW2 */ -#if defined(CUSTOM_OOB_GPIO_NUM) - if (dhd_oob_gpio_num < 0) - dhd_oob_gpio_num = CUSTOM_OOB_GPIO_NUM; -#endif - - if (dhd_oob_gpio_num < 0) { - WL_ERROR("%s: ERROR customer specific Host GPIO is NOT defined\n", - __func__); - return dhd_oob_gpio_num; - } - - WL_ERROR("%s: customer specific Host GPIO number is (%d)\n", - __func__, dhd_oob_gpio_num); - -#if defined CUSTOMER_HW - host_oob_irq = MSM_GPIO_TO_INT(dhd_oob_gpio_num); -#elif defined CUSTOMER_HW3 - gpio_request(dhd_oob_gpio_num, "oob irq"); - host_oob_irq = gpio_to_irq(dhd_oob_gpio_num); - gpio_direction_input(dhd_oob_gpio_num); -#endif /* CUSTOMER_HW */ -#endif /* CUSTOMER_HW2 */ - - return host_oob_irq; -} -#endif /* defined(OOB_INTR_ONLY) */ - -/* Customer function to control hw specific wlan gpios */ -void dhd_customer_gpio_wlan_ctrl(int onoff) -{ - switch (onoff) { - case WLAN_RESET_OFF: - WL_TRACE("%s: call customer specific GPIO to insert WLAN RESET\n", - __func__); -#ifdef CUSTOMER_HW - bcm_wlan_power_off(2); -#endif /* CUSTOMER_HW */ -#ifdef CUSTOMER_HW2 - wifi_set_power(0, 0); -#endif - WL_ERROR("=========== WLAN placed in RESET ========\n"); - break; - - case WLAN_RESET_ON: - WL_TRACE("%s: callc customer specific GPIO to remove WLAN RESET\n", - __func__); -#ifdef CUSTOMER_HW - bcm_wlan_power_on(2); -#endif /* CUSTOMER_HW */ -#ifdef CUSTOMER_HW2 - wifi_set_power(1, 0); -#endif - WL_ERROR("=========== WLAN going back to live ========\n"); - break; - - case WLAN_POWER_OFF: - WL_TRACE("%s: call customer specific GPIO to turn off WL_REG_ON\n", - __func__); -#ifdef CUSTOMER_HW - bcm_wlan_power_off(1); -#endif /* CUSTOMER_HW */ - break; - - case WLAN_POWER_ON: - WL_TRACE("%s: call customer specific GPIO to turn on WL_REG_ON\n", - __func__); -#ifdef CUSTOMER_HW - bcm_wlan_power_on(1); -#endif /* CUSTOMER_HW */ - /* Lets customer power to get stable */ - udelay(200); - break; - } -} - -#ifdef GET_CUSTOM_MAC_ENABLE -/* Function to get custom MAC address */ -int dhd_custom_get_mac_address(unsigned char *buf) -{ - WL_TRACE("%s Enter\n", __func__); - if (!buf) - return -EINVAL; - - /* Customer access to MAC address stored outside of DHD driver */ - -#ifdef EXAMPLE_GET_MAC - /* EXAMPLE code */ - { - u8 ea_example[ETH_ALEN] = {0x00, 0x11, 0x22, 0x33, 0x44, 0xFF}; - memcpy(buf, ea_example, ETH_ALEN); - } -#endif /* EXAMPLE_GET_MAC */ - - return 0; -} -#endif /* GET_CUSTOM_MAC_ENABLE */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h b/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h index 0817f1348e0..5be4d7a609c 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd_dbg.h @@ -14,90 +14,57 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _dhd_dbg_ -#define _dhd_dbg_ +#ifndef _BRCMF_DBG_H_ +#define _BRCMF_DBG_H_ -#if defined(DHD_DEBUG) +#if defined(BCMDBG) -#define DHD_ERROR(args) \ - do {if ((dhd_msg_level & DHD_ERROR_VAL) && (net_ratelimit())) \ +#define BRCMF_ERROR(args) \ + do {if ((brcmf_msg_level & BRCMF_ERROR_VAL) && (net_ratelimit())) \ printk args; } while (0) -#define DHD_TRACE(args) do {if (dhd_msg_level & DHD_TRACE_VAL) \ +#define BRCMF_TRACE(args) do {if (brcmf_msg_level & BRCMF_TRACE_VAL) \ printk args; } while (0) -#define DHD_INFO(args) do {if (dhd_msg_level & DHD_INFO_VAL) \ +#define BRCMF_INFO(args) do {if (brcmf_msg_level & BRCMF_INFO_VAL) \ printk args; } while (0) -#define DHD_DATA(args) do {if (dhd_msg_level & DHD_DATA_VAL) \ +#define BRCMF_DATA(args) do {if (brcmf_msg_level & BRCMF_DATA_VAL) \ printk args; } while (0) -#define DHD_CTL(args) do {if (dhd_msg_level & DHD_CTL_VAL) \ +#define BRCMF_CTL(args) do {if (brcmf_msg_level & BRCMF_CTL_VAL) \ printk args; } while (0) -#define DHD_TIMER(args) do {if (dhd_msg_level & DHD_TIMER_VAL) \ +#define BRCMF_TIMER(args) do {if (brcmf_msg_level & BRCMF_TIMER_VAL) \ printk args; } while (0) -#define DHD_HDRS(args) do {if (dhd_msg_level & DHD_HDRS_VAL) \ +#define BRCMF_INTR(args) do {if (brcmf_msg_level & BRCMF_INTR_VAL) \ printk args; } while (0) -#define DHD_BYTES(args) do {if (dhd_msg_level & DHD_BYTES_VAL) \ +#define BRCMF_GLOM(args) do {if (brcmf_msg_level & BRCMF_GLOM_VAL) \ printk args; } while (0) -#define DHD_INTR(args) do {if (dhd_msg_level & DHD_INTR_VAL) \ +#define BRCMF_EVENT(args) do {if (brcmf_msg_level & BRCMF_EVENT_VAL) \ printk args; } while (0) -#define DHD_GLOM(args) do {if (dhd_msg_level & DHD_GLOM_VAL) \ - printk args; } while (0) -#define DHD_EVENT(args) do {if (dhd_msg_level & DHD_EVENT_VAL) \ - printk args; } while (0) -#define DHD_BTA(args) do {if (dhd_msg_level & DHD_BTA_VAL) \ - printk args; } while (0) -#define DHD_ISCAN(args) do {if (dhd_msg_level & DHD_ISCAN_VAL) \ - printk args; } while (0) - -#define DHD_ERROR_ON() (dhd_msg_level & DHD_ERROR_VAL) -#define DHD_TRACE_ON() (dhd_msg_level & DHD_TRACE_VAL) -#define DHD_INFO_ON() (dhd_msg_level & DHD_INFO_VAL) -#define DHD_DATA_ON() (dhd_msg_level & DHD_DATA_VAL) -#define DHD_CTL_ON() (dhd_msg_level & DHD_CTL_VAL) -#define DHD_TIMER_ON() (dhd_msg_level & DHD_TIMER_VAL) -#define DHD_HDRS_ON() (dhd_msg_level & DHD_HDRS_VAL) -#define DHD_BYTES_ON() (dhd_msg_level & DHD_BYTES_VAL) -#define DHD_INTR_ON() (dhd_msg_level & DHD_INTR_VAL) -#define DHD_GLOM_ON() (dhd_msg_level & DHD_GLOM_VAL) -#define DHD_EVENT_ON() (dhd_msg_level & DHD_EVENT_VAL) -#define DHD_BTA_ON() (dhd_msg_level & DHD_BTA_VAL) -#define DHD_ISCAN_ON() (dhd_msg_level & DHD_ISCAN_VAL) -#else /* (defined BCMDBG) || (defined DHD_DEBUG) */ +#define BRCMF_DATA_ON() (brcmf_msg_level & BRCMF_DATA_VAL) +#define BRCMF_CTL_ON() (brcmf_msg_level & BRCMF_CTL_VAL) +#define BRCMF_HDRS_ON() (brcmf_msg_level & BRCMF_HDRS_VAL) +#define BRCMF_BYTES_ON() (brcmf_msg_level & BRCMF_BYTES_VAL) +#define BRCMF_GLOM_ON() (brcmf_msg_level & BRCMF_GLOM_VAL) -#define DHD_ERROR(args) do {if (net_ratelimit()) printk args; } while (0) -#define DHD_TRACE(args) -#define DHD_INFO(args) -#define DHD_DATA(args) -#define DHD_CTL(args) -#define DHD_TIMER(args) -#define DHD_HDRS(args) -#define DHD_BYTES(args) -#define DHD_INTR(args) -#define DHD_GLOM(args) -#define DHD_EVENT(args) -#define DHD_BTA(args) -#define DHD_ISCAN(args) +#else /* (defined BCMDBG) || (defined BCMDBG) */ -#define DHD_ERROR_ON() 0 -#define DHD_TRACE_ON() 0 -#define DHD_INFO_ON() 0 -#define DHD_DATA_ON() 0 -#define DHD_CTL_ON() 0 -#define DHD_TIMER_ON() 0 -#define DHD_HDRS_ON() 0 -#define DHD_BYTES_ON() 0 -#define DHD_INTR_ON() 0 -#define DHD_GLOM_ON() 0 -#define DHD_EVENT_ON() 0 -#define DHD_BTA_ON() 0 -#define DHD_ISCAN_ON() 0 -#endif /* defined(DHD_DEBUG) */ +#define BRCMF_ERROR(args) do {if (net_ratelimit()) printk args; } while (0) +#define BRCMF_TRACE(args) +#define BRCMF_INFO(args) +#define BRCMF_DATA(args) +#define BRCMF_CTL(args) +#define BRCMF_TIMER(args) +#define BRCMF_INTR(args) +#define BRCMF_GLOM(args) +#define BRCMF_EVENT(args) -#define DHD_LOG(args) +#define BRCMF_DATA_ON() 0 +#define BRCMF_CTL_ON() 0 +#define BRCMF_HDRS_ON() 0 +#define BRCMF_BYTES_ON() 0 +#define BRCMF_GLOM_ON() 0 -#define DHD_NONE(args) -extern int dhd_msg_level; +#endif /* defined(BCMDBG) */ -/* Defines msg bits */ -#include <dhdioctl.h> +extern int brcmf_msg_level; -#endif /* _dhd_dbg_ */ +#endif /* _BRCMF_DBG_H_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c index 09957bd6b79..05dada98eb6 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_linux.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_linux.c @@ -14,9 +14,6 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifdef CONFIG_WIFI_CONTROL_FUNC -#include <linux/platform_device.h> -#endif #include <linux/init.h> #include <linux/kernel.h> #include <linux/kthread.h> @@ -33,177 +30,32 @@ #include <linux/uaccess.h> #include <linux/interrupt.h> #include <linux/hardirq.h> -#include <bcmdefs.h> -#include <bcmutils.h> - -#include <dngl_stats.h> -#include <dhd.h> -#include <dhd_bus.h> -#include <dhd_proto.h> -#include <dhd_dbg.h> - -#include <wl_cfg80211.h> - -#define EPI_VERSION_STR "4.218.248.5" -#define ETH_P_BRCM 0x886c - -#if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC) -#include <linux/wifi_tiwlan.h> - -struct semaphore wifi_control_sem; - -struct dhd_bus *g_bus; - -static struct wifi_platform_data *wifi_control_data; -static struct resource *wifi_irqres; - -int wifi_get_irq_number(unsigned long *irq_flags_ptr) -{ - if (wifi_irqres) { - *irq_flags_ptr = wifi_irqres->flags & IRQF_TRIGGER_MASK; - return (int)wifi_irqres->start; - } -#ifdef CUSTOM_OOB_GPIO_NUM - return CUSTOM_OOB_GPIO_NUM; -#else - return -1; -#endif -} - -int wifi_set_carddetect(int on) -{ - printk(KERN_ERR "%s = %d\n", __func__, on); - if (wifi_control_data && wifi_control_data->set_carddetect) - wifi_control_data->set_carddetect(on); - return 0; -} - -int wifi_set_power(int on, unsigned long msec) -{ - printk(KERN_ERR "%s = %d\n", __func__, on); - if (wifi_control_data && wifi_control_data->set_power) - wifi_control_data->set_power(on); - if (msec) - mdelay(msec); - return 0; -} - -int wifi_set_reset(int on, unsigned long msec) -{ - printk(KERN_ERR "%s = %d\n", __func__, on); - if (wifi_control_data && wifi_control_data->set_reset) - wifi_control_data->set_reset(on); - if (msec) - mdelay(msec); - return 0; -} - -static int wifi_probe(struct platform_device *pdev) -{ - struct wifi_platform_data *wifi_ctrl = - (struct wifi_platform_data *)(pdev->dev.platform_data); - - printk(KERN_ERR "## %s\n", __func__); - wifi_irqres = - platform_get_resource_byname(pdev, IORESOURCE_IRQ, - "bcm4329_wlan_irq"); - wifi_control_data = wifi_ctrl; - - wifi_set_power(1, 0); /* Power On */ - wifi_set_carddetect(1); /* CardDetect (0->1) */ - - up(&wifi_control_sem); - return 0; -} - -static int wifi_remove(struct platform_device *pdev) -{ - struct wifi_platform_data *wifi_ctrl = - (struct wifi_platform_data *)(pdev->dev.platform_data); - - printk(KERN_ERR "## %s\n", __func__); - wifi_control_data = wifi_ctrl; - - wifi_set_carddetect(0); /* CardDetect (1->0) */ - wifi_set_power(0, 0); /* Power Off */ - - up(&wifi_control_sem); - return 0; -} - -static int wifi_suspend(struct platform_device *pdev, pm_message_t state) -{ - DHD_TRACE(("##> %s\n", __func__)); - return 0; -} - -static int wifi_resume(struct platform_device *pdev) -{ - DHD_TRACE(("##> %s\n", __func__)); - return 0; -} - -static struct platform_driver wifi_device = { - .probe = wifi_probe, - .remove = wifi_remove, - .suspend = wifi_suspend, - .resume = wifi_resume, - .driver = { - .name = KBUILD_MODNAME, - } -}; - -int wifi_add_dev(void) -{ - DHD_TRACE(("## Calling platform_driver_register\n")); - return platform_driver_register(&wifi_device); -} - -void wifi_del_dev(void) -{ - DHD_TRACE(("## Unregister platform_driver_register\n")); - platform_driver_unregister(&wifi_device); -} -#endif /* defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC) */ +#include <net/cfg80211.h> +#include <defs.h> +#include <brcmu_utils.h> +#include <brcmu_wifi.h> + +#include "dhd.h" +#include "dhd_bus.h" +#include "dhd_proto.h" +#include "dhd_dbg.h" +#include "wl_cfg80211.h" +#include "bcmchip.h" #if defined(CONFIG_PM_SLEEP) #include <linux/suspend.h> -atomic_t dhd_mmc_suspend; -DECLARE_WAIT_QUEUE_HEAD(dhd_dpc_wait); +atomic_t brcmf_mmc_suspend; #endif /* defined(CONFIG_PM_SLEEP) */ -#if defined(OOB_INTR_ONLY) -extern void dhd_enable_oob_intr(struct dhd_bus *bus, bool enable); -#endif /* defined(OOB_INTR_ONLY) */ - MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN fullmac driver."); MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN fullmac cards"); MODULE_LICENSE("Dual BSD/GPL"); -#define DRV_MODULE_NAME "brcmfmac" - -/* Linux wireless extension support */ -#if defined(CONFIG_WIRELESS_EXT) -#include <wl_iw.h> -extern wl_iw_extra_params_t g_wl_iw_params; -#endif /* defined(CONFIG_WIRELESS_EXT) */ - -#if defined(CONFIG_HAS_EARLYSUSPEND) -#include <linux/earlysuspend.h> -extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, - uint len); -#endif /* defined(CONFIG_HAS_EARLYSUSPEND) */ - -#ifdef PKT_FILTER_SUPPORT -extern void dhd_pktfilter_offload_set(dhd_pub_t *dhd, char *arg); -extern void dhd_pktfilter_offload_enable(dhd_pub_t *dhd, char *arg, int enable, - int master_mode); -#endif /* Interface control information */ -typedef struct dhd_if { - struct dhd_info *info; /* back pointer to dhd_info */ +struct brcmf_if { + struct brcmf_info *info; /* back pointer to brcmf_info */ /* OS/stack specifics */ struct net_device *net; struct net_device_stats stats; @@ -214,33 +66,17 @@ typedef struct dhd_if { bool attached; /* Delayed attachment when unset */ bool txflowcontrol; /* Per interface flow control indicator */ char name[IFNAMSIZ]; /* linux interface name */ -} dhd_if_t; +}; /* Local private structure (extension of pub) */ -typedef struct dhd_info { -#if defined(CONFIG_WIRELESS_EXT) - wl_iw_t iw; /* wireless extensions state (must be first) */ -#endif /* defined(CONFIG_WIRELESS_EXT) */ - - dhd_pub_t pub; +struct brcmf_info { + struct brcmf_pub pub; /* OS/stack specifics */ - dhd_if_t *iflist[DHD_MAX_IFS]; + struct brcmf_if *iflist[BRCMF_MAX_IFS]; struct semaphore proto_sem; wait_queue_head_t ioctl_resp_wait; - struct timer_list timer; - bool wd_timer_valid; - struct tasklet_struct tasklet; - spinlock_t sdlock; - spinlock_t txqlock; - /* Thread based operation */ - bool threads_only; - struct semaphore sdsem; - struct task_struct *watchdog_tsk; - struct semaphore watchdog_sem; - struct task_struct *dpc_tsk; - struct semaphore dpc_sem; /* Thread to issue ioctl for multicast */ struct task_struct *sysioc_tsk; @@ -248,83 +84,44 @@ typedef struct dhd_info { bool set_multicast; bool set_macaddress; u8 macvalue[ETH_ALEN]; - wait_queue_head_t ctrl_wait; atomic_t pend_8021x_cnt; - -#ifdef CONFIG_HAS_EARLYSUSPEND - struct early_suspend early_suspend; -#endif /* CONFIG_HAS_EARLYSUSPEND */ -} dhd_info_t; - -/* Definitions to provide path to the firmware and nvram - * example nvram_path[MOD_PARAM_PATHLEN]="/projects/wlan/nvram.txt" - */ -char firmware_path[MOD_PARAM_PATHLEN]; -char nvram_path[MOD_PARAM_PATHLEN]; - -/* load firmware and/or nvram values from the filesystem */ -module_param_string(firmware_path, firmware_path, MOD_PARAM_PATHLEN, 0); -module_param_string(nvram_path, nvram_path, MOD_PARAM_PATHLEN, 0); +}; /* Error bits */ -module_param(dhd_msg_level, int, 0); +module_param(brcmf_msg_level, int, 0); /* Spawn a thread for system ioctls (set mac, set mcast) */ -uint dhd_sysioc = true; -module_param(dhd_sysioc, uint, 0); - -/* Watchdog interval */ -uint dhd_watchdog_ms = 10; -module_param(dhd_watchdog_ms, uint, 0); - -#ifdef DHD_DEBUG -/* Console poll interval */ -uint dhd_console_ms; -module_param(dhd_console_ms, uint, 0); -#endif /* DHD_DEBUG */ +uint brcmf_sysioc = true; +module_param(brcmf_sysioc, uint, 0); /* ARP offload agent mode : Enable ARP Host Auto-Reply and ARP Peer Auto-Reply */ -uint dhd_arp_mode = 0xb; -module_param(dhd_arp_mode, uint, 0); +uint brcmf_arp_mode = 0xb; +module_param(brcmf_arp_mode, uint, 0); /* ARP offload enable */ -uint dhd_arp_enable = true; -module_param(dhd_arp_enable, uint, 0); +uint brcmf_arp_enable = true; +module_param(brcmf_arp_enable, uint, 0); /* Global Pkt filter enable control */ -uint dhd_pkt_filter_enable = true; -module_param(dhd_pkt_filter_enable, uint, 0); +uint brcmf_pkt_filter_enable = true; +module_param(brcmf_pkt_filter_enable, uint, 0); /* Pkt filter init setup */ -uint dhd_pkt_filter_init; -module_param(dhd_pkt_filter_init, uint, 0); +uint brcmf_pkt_filter_init; +module_param(brcmf_pkt_filter_init, uint, 0); /* Pkt filter mode control */ -uint dhd_master_mode = true; -module_param(dhd_master_mode, uint, 1); - -/* Watchdog thread priority, -1 to use kernel timer */ -int dhd_watchdog_prio = 97; -module_param(dhd_watchdog_prio, int, 0); - -/* DPC thread priority, -1 to use tasklet */ -int dhd_dpc_prio = 98; -module_param(dhd_dpc_prio, int, 0); +uint brcmf_master_mode = true; +module_param(brcmf_master_mode, uint, 0); -/* DPC thread priority, -1 to use tasklet */ -extern int dhd_dongle_memsize; -module_param(dhd_dongle_memsize, int, 0); +module_param(brcmf_dongle_memsize, int, 0); /* Contorl fw roaming */ -#ifdef CUSTOMER_HW2 -uint dhd_roam; -#else -uint dhd_roam = 1; -#endif +uint brcmf_roam = 1; /* Control radio state */ -uint dhd_radio_up = 1; +uint brcmf_radio_up = 1; /* Network inteface name */ char iface_name[IFNAMSIZ] = "wlan"; @@ -333,252 +130,58 @@ module_param_string(iface_name, iface_name, IFNAMSIZ, 0); /* The following are specific to the SDIO dongle */ /* IOCTL response timeout */ -int dhd_ioctl_timeout_msec = IOCTL_RESP_TIMEOUT; +int brcmf_ioctl_timeout_msec = IOCTL_RESP_TIMEOUT; /* Idle timeout for backplane clock */ -int dhd_idletime = DHD_IDLETIME_TICKS; -module_param(dhd_idletime, int, 0); +int brcmf_idletime = BRCMF_IDLETIME_TICKS; +module_param(brcmf_idletime, int, 0); /* Use polling */ -uint dhd_poll = false; -module_param(dhd_poll, uint, 0); - -/* Use cfg80211 */ -uint dhd_cfg80211 = true; -module_param(dhd_cfg80211, uint, 0); +uint brcmf_poll; +module_param(brcmf_poll, uint, 0); /* Use interrupts */ -uint dhd_intr = true; -module_param(dhd_intr, uint, 0); +uint brcmf_intr = true; +module_param(brcmf_intr, uint, 0); /* SDIO Drive Strength (in milliamps) */ -uint dhd_sdiod_drive_strength = 6; -module_param(dhd_sdiod_drive_strength, uint, 0); +uint brcmf_sdiod_drive_strength = 6; +module_param(brcmf_sdiod_drive_strength, uint, 0); /* Tx/Rx bounds */ -extern uint dhd_txbound; -extern uint dhd_rxbound; -module_param(dhd_txbound, uint, 0); -module_param(dhd_rxbound, uint, 0); - -/* Deferred transmits */ -extern uint dhd_deferred_tx; -module_param(dhd_deferred_tx, uint, 0); +module_param(brcmf_txbound, uint, 0); +module_param(brcmf_rxbound, uint, 0); #ifdef SDTEST /* Echo packet generator (pkts/s) */ -uint dhd_pktgen; -module_param(dhd_pktgen, uint, 0); +uint brcmf_pktgen; +module_param(brcmf_pktgen, uint, 0); /* Echo packet len (0 => sawtooth, max 2040) */ -uint dhd_pktgen_len; -module_param(dhd_pktgen_len, uint, 0); -#endif - -#define FAVORITE_WIFI_CP (!!dhd_cfg80211) -#define IS_CFG80211_FAVORITE() FAVORITE_WIFI_CP -#define DBG_CFG80211_GET() ((dhd_cfg80211 & WL_DBG_MASK) >> 1) -#define NO_FW_REQ() (dhd_cfg80211 & 0x80) - -/* Version string to report */ -#ifdef DHD_DEBUG -#define DHD_COMPILED "\nCompiled in " SRCBASE -#else -#define DHD_COMPILED +uint brcmf_pktgen_len; +module_param(brcmf_pktgen_len, uint, 0); #endif -static void dhd_dpc(unsigned long data); -/* forward decl */ -extern int dhd_wait_pend8021x(struct net_device *dev); - -#ifdef TOE -#ifndef BDC -#error TOE requires BDC -#endif /* !BDC */ -static int dhd_toe_get(dhd_info_t *dhd, int idx, u32 *toe_ol); -static int dhd_toe_set(dhd_info_t *dhd, int idx, u32 toe_ol); -#endif /* TOE */ - -static int dhd_wl_host_event(dhd_info_t *dhd, int *ifidx, void *pktdata, - wl_event_msg_t *event_ptr, void **data_ptr); - -#if defined(CONFIG_PM_SLEEP) -static int dhd_sleep_pm_callback(struct notifier_block *nfb, - unsigned long action, void *ignored) -{ - switch (action) { - case PM_HIBERNATION_PREPARE: - case PM_SUSPEND_PREPARE: - atomic_set(&dhd_mmc_suspend, true); - return NOTIFY_OK; - case PM_POST_HIBERNATION: - case PM_POST_SUSPEND: - atomic_set(&dhd_mmc_suspend, false); - return NOTIFY_OK; - } - return 0; -} - -static struct notifier_block dhd_sleep_pm_notifier = { - .notifier_call = dhd_sleep_pm_callback, - .priority = 0 -}; - -extern int register_pm_notifier(struct notifier_block *nb); -extern int unregister_pm_notifier(struct notifier_block *nb); -#endif /* defined(CONFIG_PM_SLEEP) */ - /* && defined(DHD_GPL) */ -static void dhd_set_packet_filter(int value, dhd_pub_t *dhd) -{ -#ifdef PKT_FILTER_SUPPORT - DHD_TRACE(("%s: %d\n", __func__, value)); - /* 1 - Enable packet filter, only allow unicast packet to send up */ - /* 0 - Disable packet filter */ - if (dhd_pkt_filter_enable) { - int i; - - for (i = 0; i < dhd->pktfilter_count; i++) { - dhd_pktfilter_offload_set(dhd, dhd->pktfilter[i]); - dhd_pktfilter_offload_enable(dhd, dhd->pktfilter[i], - value, dhd_master_mode); - } - } -#endif -} - -#if defined(CONFIG_HAS_EARLYSUSPEND) -static int dhd_set_suspend(int value, dhd_pub_t *dhd) -{ - int power_mode = PM_MAX; - /* wl_pkt_filter_enable_t enable_parm; */ - char iovbuf[32]; - int bcn_li_dtim = 3; -#ifdef CUSTOMER_HW2 - uint roamvar = 1; -#endif /* CUSTOMER_HW2 */ - - DHD_TRACE(("%s: enter, value = %d in_suspend=%d\n", - __func__, value, dhd->in_suspend)); - - if (dhd && dhd->up) { - if (value && dhd->in_suspend) { - - /* Kernel suspended */ - DHD_TRACE(("%s: force extra Suspend setting\n", - __func__)); - - dhdcdc_set_ioctl(dhd, 0, WLC_SET_PM, - (char *)&power_mode, - sizeof(power_mode)); - - /* Enable packet filter, only allow unicast - packet to send up */ - dhd_set_packet_filter(1, dhd); - - /* if dtim skip setup as default force it - * to wake each third dtim - * for better power saving. - * Note that side effect is chance to miss BC/MC - * packet - */ - if ((dhd->dtim_skip == 0) || (dhd->dtim_skip == 1)) - bcn_li_dtim = 3; - else - bcn_li_dtim = dhd->dtim_skip; - bcm_mkiovar("bcn_li_dtim", (char *)&bcn_li_dtim, - 4, iovbuf, sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, - sizeof(iovbuf)); -#ifdef CUSTOMER_HW2 - /* Disable build-in roaming to allowed \ - * supplicant to take of romaing - */ - bcm_mkiovar("roam_off", (char *)&roamvar, 4, - iovbuf, sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, - sizeof(iovbuf)); -#endif /* CUSTOMER_HW2 */ - } else { - - /* Kernel resumed */ - DHD_TRACE(("%s: Remove extra suspend setting\n", - __func__)); - - power_mode = PM_FAST; - dhdcdc_set_ioctl(dhd, 0, WLC_SET_PM, - (char *)&power_mode, - sizeof(power_mode)); - - /* disable pkt filter */ - dhd_set_packet_filter(0, dhd); - - /* restore pre-suspend setting for dtim_skip */ - bcm_mkiovar("bcn_li_dtim", (char *)&dhd->dtim_skip, - 4, iovbuf, sizeof(iovbuf)); - - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, - sizeof(iovbuf)); -#ifdef CUSTOMER_HW2 - roamvar = 0; - bcm_mkiovar("roam_off", (char *)&roamvar, 4, iovbuf, - sizeof(iovbuf)); - dhdcdc_set_ioctl(dhd, 0, WLC_SET_VAR, iovbuf, - sizeof(iovbuf)); -#endif /* CUSTOMER_HW2 */ - } - } - - return 0; -} - -static void dhd_suspend_resume_helper(struct dhd_info *dhd, int val) -{ - dhd_pub_t *dhdp = &dhd->pub; - - dhd_os_proto_block(dhdp); - /* Set flag when early suspend was called */ - dhdp->in_suspend = val; - if (!dhdp->suspend_disable_flag) - dhd_set_suspend(val, dhdp); - dhd_os_proto_unblock(dhdp); -} - -static void dhd_early_suspend(struct early_suspend *h) -{ - struct dhd_info *dhd = container_of(h, struct dhd_info, early_suspend); - - DHD_TRACE(("%s: enter\n", __func__)); - - if (dhd) - dhd_suspend_resume_helper(dhd, 1); - -} - -static void dhd_late_resume(struct early_suspend *h) -{ - struct dhd_info *dhd = container_of(h, struct dhd_info, early_suspend); - - DHD_TRACE(("%s: enter\n", __func__)); - - if (dhd) - dhd_suspend_resume_helper(dhd, 0); -} -#endif /* defined(CONFIG_HAS_EARLYSUSPEND) */ +static int brcmf_toe_get(struct brcmf_info *drvr_priv, int idx, u32 *toe_ol); +static int brcmf_toe_set(struct brcmf_info *drvr_priv, int idx, u32 toe_ol); +static int brcmf_host_event(struct brcmf_info *drvr_priv, int *ifidx, void *pktdata, + struct brcmf_event_msg *event_ptr, + void **data_ptr); /* * Generalized timeout mechanism. Uses spin sleep with exponential * back-off until * the sleep time reaches one jiffy, then switches over to task delay. Usage: * - * dhd_timeout_start(&tmo, usec); - * while (!dhd_timeout_expired(&tmo)) + * brcmf_timeout_start(&tmo, usec); + * while (!brcmf_timeout_expired(&tmo)) * if (poll_something()) * break; - * if (dhd_timeout_expired(&tmo)) + * if (brcmf_timeout_expired(&tmo)) * fatal(); */ -void dhd_timeout_start(dhd_timeout_t *tmo, uint usec) +void brcmf_timeout_start(struct brcmf_timeout *tmo, uint usec) { tmo->limit = usec; tmo->increment = 0; @@ -586,7 +189,7 @@ void dhd_timeout_start(dhd_timeout_t *tmo, uint usec) tmo->tick = 1000000 / HZ; } -int dhd_timeout_expired(dhd_timeout_t *tmo) +int brcmf_timeout_expired(struct brcmf_timeout *tmo) { /* Does nothing the first call */ if (tmo->increment == 0) { @@ -623,74 +226,68 @@ int dhd_timeout_expired(dhd_timeout_t *tmo) return 0; } -static int dhd_net2idx(dhd_info_t *dhd, struct net_device *net) +static int brcmf_net2idx(struct brcmf_info *drvr_priv, struct net_device *net) { int i = 0; - ASSERT(dhd); - while (i < DHD_MAX_IFS) { - if (dhd->iflist[i] && (dhd->iflist[i]->net == net)) + while (i < BRCMF_MAX_IFS) { + if (drvr_priv->iflist[i] && (drvr_priv->iflist[i]->net == net)) return i; i++; } - return DHD_BAD_IF; + return BRCMF_BAD_IF; } -int dhd_ifname2idx(dhd_info_t *dhd, char *name) +int brcmf_ifname2idx(struct brcmf_info *drvr_priv, char *name) { - int i = DHD_MAX_IFS; - - ASSERT(dhd); + int i = BRCMF_MAX_IFS; if (name == NULL || *name == '\0') return 0; while (--i > 0) - if (dhd->iflist[i] - && !strncmp(dhd->iflist[i]->name, name, IFNAMSIZ)) + if (drvr_priv->iflist[i] + && !strncmp(drvr_priv->iflist[i]->name, name, IFNAMSIZ)) break; - DHD_TRACE(("%s: return idx %d for \"%s\"\n", __func__, i, name)); + BRCMF_TRACE(("%s: return idx %d for \"%s\"\n", __func__, i, name)); return i; /* default - the primary interface */ } -char *dhd_ifname(dhd_pub_t *dhdp, int ifidx) +char *brcmf_ifname(struct brcmf_pub *drvr, int ifidx) { - dhd_info_t *dhd = (dhd_info_t *) dhdp->info; - - ASSERT(dhd); + struct brcmf_info *drvr_priv = drvr->info; - if (ifidx < 0 || ifidx >= DHD_MAX_IFS) { - DHD_ERROR(("%s: ifidx %d out of range\n", __func__, ifidx)); + if (ifidx < 0 || ifidx >= BRCMF_MAX_IFS) { + BRCMF_ERROR(("%s: ifidx %d out of range\n", __func__, ifidx)); return "<if_bad>"; } - if (dhd->iflist[ifidx] == NULL) { - DHD_ERROR(("%s: null i/f %d\n", __func__, ifidx)); + if (drvr_priv->iflist[ifidx] == NULL) { + BRCMF_ERROR(("%s: null i/f %d\n", __func__, ifidx)); return "<if_null>"; } - if (dhd->iflist[ifidx]->net) - return dhd->iflist[ifidx]->net->name; + if (drvr_priv->iflist[ifidx]->net) + return drvr_priv->iflist[ifidx]->net->name; return "<if_none>"; } -static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) +static void _brcmf_set_multicast_list(struct brcmf_info *drvr_priv, int ifidx) { struct net_device *dev; struct netdev_hw_addr *ha; u32 allmulti, cnt; - wl_ioctl_t ioc; + struct brcmf_ioctl ioc; char *buf, *bufp; uint buflen; int ret; - ASSERT(dhd && dhd->iflist[ifidx]); - dev = dhd->iflist[ifidx]->net; + dev = drvr_priv->iflist[ifidx]->net; cnt = netdev_mc_count(dev); /* Determine initial value of allmulti flag */ @@ -701,8 +298,8 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) buflen = sizeof("mcast_list") + sizeof(cnt) + (cnt * ETH_ALEN); bufp = buf = kmalloc(buflen, GFP_ATOMIC); if (!bufp) { - DHD_ERROR(("%s: out of memory for mcast_list, cnt %d\n", - dhd_ifname(&dhd->pub, ifidx), cnt)); + BRCMF_ERROR(("%s: out of memory for mcast_list, cnt %d\n", + brcmf_ifname(&drvr_priv->pub, ifidx), cnt)); return; } @@ -722,15 +319,15 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) } memset(&ioc, 0, sizeof(ioc)); - ioc.cmd = WLC_SET_VAR; + ioc.cmd = BRCMF_C_SET_VAR; ioc.buf = buf; ioc.len = buflen; ioc.set = true; - ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); + ret = brcmf_proto_ioctl(&drvr_priv->pub, ifidx, &ioc, ioc.buf, ioc.len); if (ret < 0) { - DHD_ERROR(("%s: set mcast_list failed, cnt %d\n", - dhd_ifname(&dhd->pub, ifidx), cnt)); + BRCMF_ERROR(("%s: set mcast_list failed, cnt %d\n", + brcmf_ifname(&drvr_priv->pub, ifidx), cnt)); allmulti = cnt ? true : allmulti; } @@ -744,32 +341,33 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) buflen = sizeof("allmulti") + sizeof(allmulti); buf = kmalloc(buflen, GFP_ATOMIC); if (!buf) { - DHD_ERROR(("%s: out of memory for allmulti\n", - dhd_ifname(&dhd->pub, ifidx))); + BRCMF_ERROR(("%s: out of memory for allmulti\n", + brcmf_ifname(&drvr_priv->pub, ifidx))); return; } allmulti = cpu_to_le32(allmulti); - if (!bcm_mkiovar + if (!brcmu_mkiovar ("allmulti", (void *)&allmulti, sizeof(allmulti), buf, buflen)) { - DHD_ERROR(("%s: mkiovar failed for allmulti, datalen %d " - "buflen %u\n", dhd_ifname(&dhd->pub, ifidx), - (int)sizeof(allmulti), buflen)); + BRCMF_ERROR(("%s: mkiovar failed for allmulti, datalen %d " + "buflen %u\n", + brcmf_ifname(&drvr_priv->pub, ifidx), + (int)sizeof(allmulti), buflen)); kfree(buf); return; } memset(&ioc, 0, sizeof(ioc)); - ioc.cmd = WLC_SET_VAR; + ioc.cmd = BRCMF_C_SET_VAR; ioc.buf = buf; ioc.len = buflen; ioc.set = true; - ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); + ret = brcmf_proto_ioctl(&drvr_priv->pub, ifidx, &ioc, ioc.buf, ioc.len); if (ret < 0) { - DHD_ERROR(("%s: set allmulti %d failed\n", - dhd_ifname(&dhd->pub, ifidx), - le32_to_cpu(allmulti))); + BRCMF_ERROR(("%s: set allmulti %d failed\n", + brcmf_ifname(&drvr_priv->pub, ifidx), + le32_to_cpu(allmulti))); } kfree(buf); @@ -781,45 +379,44 @@ static void _dhd_set_multicast_list(dhd_info_t *dhd, int ifidx) allmulti = cpu_to_le32(allmulti); memset(&ioc, 0, sizeof(ioc)); - ioc.cmd = WLC_SET_PROMISC; + ioc.cmd = BRCMF_C_SET_PROMISC; ioc.buf = &allmulti; ioc.len = sizeof(allmulti); ioc.set = true; - ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); + ret = brcmf_proto_ioctl(&drvr_priv->pub, ifidx, &ioc, ioc.buf, ioc.len); if (ret < 0) { - DHD_ERROR(("%s: set promisc %d failed\n", - dhd_ifname(&dhd->pub, ifidx), - le32_to_cpu(allmulti))); + BRCMF_ERROR(("%s: set promisc %d failed\n", + brcmf_ifname(&drvr_priv->pub, ifidx), + le32_to_cpu(allmulti))); } } -static int -_dhd_set_mac_address(dhd_info_t *dhd, int ifidx, u8 *addr) +static int _brcmf_set_mac_address(struct brcmf_info *drvr_priv, int ifidx, u8 *addr) { char buf[32]; - wl_ioctl_t ioc; + struct brcmf_ioctl ioc; int ret; - DHD_TRACE(("%s enter\n", __func__)); - if (!bcm_mkiovar + BRCMF_TRACE(("%s enter\n", __func__)); + if (!brcmu_mkiovar ("cur_etheraddr", (char *)addr, ETH_ALEN, buf, 32)) { - DHD_ERROR(("%s: mkiovar failed for cur_etheraddr\n", - dhd_ifname(&dhd->pub, ifidx))); + BRCMF_ERROR(("%s: mkiovar failed for cur_etheraddr\n", + brcmf_ifname(&drvr_priv->pub, ifidx))); return -1; } memset(&ioc, 0, sizeof(ioc)); - ioc.cmd = WLC_SET_VAR; + ioc.cmd = BRCMF_C_SET_VAR; ioc.buf = buf; ioc.len = 32; ioc.set = true; - ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); + ret = brcmf_proto_ioctl(&drvr_priv->pub, ifidx, &ioc, ioc.buf, ioc.len); if (ret < 0) { - DHD_ERROR(("%s: set cur_etheraddr failed\n", - dhd_ifname(&dhd->pub, ifidx))); + BRCMF_ERROR(("%s: set cur_etheraddr failed\n", + brcmf_ifname(&drvr_priv->pub, ifidx))); } else { - memcpy(dhd->iflist[ifidx]->net->dev_addr, addr, ETH_ALEN); + memcpy(drvr_priv->iflist[ifidx]->net->dev_addr, addr, ETH_ALEN); } return ret; @@ -829,45 +426,44 @@ _dhd_set_mac_address(dhd_info_t *dhd, int ifidx, u8 *addr) extern struct net_device *ap_net_dev; #endif -static void dhd_op_if(dhd_if_t *ifp) +/* Virtual interfaces only ((ifp && ifp->info && ifp->idx == true) */ +static void brcmf_op_if(struct brcmf_if *ifp) { - dhd_info_t *dhd; + struct brcmf_info *drvr_priv; int ret = 0, err = 0; - ASSERT(ifp && ifp->info && ifp->idx); /* Virtual interfaces only */ - - dhd = ifp->info; + drvr_priv = ifp->info; - DHD_TRACE(("%s: idx %d, state %d\n", __func__, ifp->idx, ifp->state)); + BRCMF_TRACE(("%s: idx %d, state %d\n", __func__, ifp->idx, ifp->state)); switch (ifp->state) { - case WLC_E_IF_ADD: + case BRCMF_E_IF_ADD: /* * Delete the existing interface before overwriting it - * in case we missed the WLC_E_IF_DEL event. + * in case we missed the BRCMF_E_IF_DEL event. */ if (ifp->net != NULL) { - DHD_ERROR(("%s: ERROR: netdev:%s already exists, " - "try free & unregister\n", - __func__, ifp->net->name)); + BRCMF_ERROR(("%s: ERROR: netdev:%s already exists, " + "try free & unregister\n", + __func__, ifp->net->name)); netif_stop_queue(ifp->net); unregister_netdev(ifp->net); free_netdev(ifp->net); } /* Allocate etherdev, including space for private structure */ - ifp->net = alloc_etherdev(sizeof(dhd)); + ifp->net = alloc_etherdev(sizeof(drvr_priv)); if (!ifp->net) { - DHD_ERROR(("%s: OOM - alloc_etherdev\n", __func__)); + BRCMF_ERROR(("%s: OOM - alloc_etherdev\n", __func__)); ret = -ENOMEM; } if (ret == 0) { strcpy(ifp->net->name, ifp->name); - memcpy(netdev_priv(ifp->net), &dhd, sizeof(dhd)); - err = dhd_net_attach(&dhd->pub, ifp->idx); + memcpy(netdev_priv(ifp->net), &drvr_priv, sizeof(drvr_priv)); + err = brcmf_net_attach(&drvr_priv->pub, ifp->idx); if (err != 0) { - DHD_ERROR(("%s: dhd_net_attach failed, " - "err %d\n", - __func__, err)); + BRCMF_ERROR(("%s: brcmf_net_attach failed, " + "err %d\n", + __func__, err)); ret = -EOPNOTSUPP; } else { #ifdef SOFTAP @@ -882,26 +478,25 @@ static void dhd_op_if(dhd_if_t *ifp) wl0.1 is ready */ up(&ap_eth_sema); #endif - DHD_TRACE(("\n ==== pid:%x, net_device for " - "if:%s created ===\n\n", - current->pid, ifp->net->name)); + BRCMF_TRACE(("\n ==== pid:%x, net_device for " + "if:%s created ===\n\n", + current->pid, ifp->net->name)); ifp->state = 0; } } break; - case WLC_E_IF_DEL: + case BRCMF_E_IF_DEL: if (ifp->net != NULL) { - DHD_TRACE(("\n%s: got 'WLC_E_IF_DEL' state\n", - __func__)); + BRCMF_TRACE(("\n%s: got 'WLC_E_IF_DEL' state\n", + __func__)); netif_stop_queue(ifp->net); unregister_netdev(ifp->net); - ret = DHD_DEL_IF; /* Make sure the free_netdev() + ret = BRCMF_DEL_IF; /* Make sure the free_netdev() is called */ } break; default: - DHD_ERROR(("%s: bad op %d\n", __func__, ifp->state)); - ASSERT(!ifp->state); + BRCMF_ERROR(("%s: bad op %d\n", __func__, ifp->state)); break; } @@ -909,7 +504,7 @@ static void dhd_op_if(dhd_if_t *ifp) if (ifp->net) free_netdev(ifp->net); - dhd->iflist[ifp->idx] = NULL; + drvr_priv->iflist[ifp->idx] = NULL; kfree(ifp); #ifdef SOFTAP if (ifp->net == ap_net_dev) @@ -919,9 +514,9 @@ static void dhd_op_if(dhd_if_t *ifp) } } -static int _dhd_sysioc_thread(void *data) +static int _brcmf_sysioc_thread(void *data) { - dhd_info_t *dhd = (dhd_info_t *) data; + struct brcmf_info *drvr_priv = (struct brcmf_info *) data; int i; #ifdef SOFTAP bool in_ap = false; @@ -929,46 +524,51 @@ static int _dhd_sysioc_thread(void *data) allow_signal(SIGTERM); - while (down_interruptible(&dhd->sysioc_sem) == 0) { + while (down_interruptible(&drvr_priv->sysioc_sem) == 0) { if (kthread_should_stop()) break; - for (i = 0; i < DHD_MAX_IFS; i++) { - if (dhd->iflist[i]) { + for (i = 0; i < BRCMF_MAX_IFS; i++) { + struct brcmf_if *ifentry = drvr_priv->iflist[i]; + if (ifentry) { #ifdef SOFTAP in_ap = (ap_net_dev != NULL); #endif /* SOFTAP */ - if (dhd->iflist[i]->state) - dhd_op_if(dhd->iflist[i]); + if (ifentry->state) + brcmf_op_if(ifentry); #ifdef SOFTAP - if (dhd->iflist[i] == NULL) { - DHD_TRACE(("\n\n %s: interface %d " - "removed!\n", __func__, i)); + if (drvr_priv->iflist[i] == NULL) { + BRCMF_TRACE(("\n\n %s: interface %d " + "removed!\n", __func__, + i)); continue; } - if (in_ap && dhd->set_macaddress) { - DHD_TRACE(("attempt to set MAC for %s " - "in AP Mode," "blocked. \n", - dhd->iflist[i]->net->name)); - dhd->set_macaddress = false; + if (in_ap && drvr_priv->set_macaddress) { + BRCMF_TRACE(("attempt to set MAC for" + " %s in AP Mode," + " blocked.\n", + ifentry->net->name)); + drvr_priv->set_macaddress = false; continue; } - if (in_ap && dhd->set_multicast) { - DHD_TRACE(("attempt to set MULTICAST list for %s" "in AP Mode, blocked. \n", - dhd->iflist[i]->net->name)); - dhd->set_multicast = false; + if (in_ap && drvr_priv->set_multicast) { + BRCMF_TRACE(("attempt to set MULTICAST " + "list for %s in AP Mode, " + "blocked.\n", + ifentry->net->name)); + drvr_priv->set_multicast = false; continue; } #endif /* SOFTAP */ - if (dhd->set_multicast) { - dhd->set_multicast = false; - _dhd_set_multicast_list(dhd, i); + if (drvr_priv->set_multicast) { + drvr_priv->set_multicast = false; + _brcmf_set_multicast_list(drvr_priv, i); } - if (dhd->set_macaddress) { - dhd->set_macaddress = false; - _dhd_set_mac_address(dhd, i, - dhd->macvalue); + if (drvr_priv->set_macaddress) { + drvr_priv->set_macaddress = false; + _brcmf_set_mac_address(drvr_priv, i, + drvr_priv->macvalue); } } } @@ -976,47 +576,44 @@ static int _dhd_sysioc_thread(void *data) return 0; } -static int dhd_set_mac_address(struct net_device *dev, void *addr) +static int brcmf_netdev_set_mac_address(struct net_device *dev, void *addr) { int ret = 0; - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(dev); + struct brcmf_info *drvr_priv = *(struct brcmf_info **) netdev_priv(dev); struct sockaddr *sa = (struct sockaddr *)addr; int ifidx; - ifidx = dhd_net2idx(dhd, dev); - if (ifidx == DHD_BAD_IF) + ifidx = brcmf_net2idx(drvr_priv, dev); + if (ifidx == BRCMF_BAD_IF) return -1; - ASSERT(dhd->sysioc_tsk); - memcpy(&dhd->macvalue, sa->sa_data, ETH_ALEN); - dhd->set_macaddress = true; - up(&dhd->sysioc_sem); + memcpy(&drvr_priv->macvalue, sa->sa_data, ETH_ALEN); + drvr_priv->set_macaddress = true; + up(&drvr_priv->sysioc_sem); return ret; } -static void dhd_set_multicast_list(struct net_device *dev) +static void brcmf_netdev_set_multicast_list(struct net_device *dev) { - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(dev); + struct brcmf_info *drvr_priv = *(struct brcmf_info **) netdev_priv(dev); int ifidx; - ifidx = dhd_net2idx(dhd, dev); - if (ifidx == DHD_BAD_IF) + ifidx = brcmf_net2idx(drvr_priv, dev); + if (ifidx == BRCMF_BAD_IF) return; - ASSERT(dhd->sysioc_tsk); - dhd->set_multicast = true; - up(&dhd->sysioc_sem); + drvr_priv->set_multicast = true; + up(&drvr_priv->sysioc_sem); } -int dhd_sendpkt(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pktbuf) +int brcmf_sendpkt(struct brcmf_pub *drvr, int ifidx, struct sk_buff *pktbuf) { - int ret; - dhd_info_t *dhd = (dhd_info_t *) (dhdp->info); + struct brcmf_info *drvr_priv = drvr->info; /* Reject if down */ - if (!dhdp->up || (dhdp->busstate == DHD_BUS_DOWN)) + if (!drvr->up || (drvr->busstate == BRCMF_BUS_DOWN)) return -ENODEV; /* Update multicast statistic */ @@ -1025,143 +622,107 @@ int dhd_sendpkt(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pktbuf) struct ethhdr *eh = (struct ethhdr *)pktdata; if (is_multicast_ether_addr(eh->h_dest)) - dhdp->tx_multicast++; + drvr->tx_multicast++; if (ntohs(eh->h_proto) == ETH_P_PAE) - atomic_inc(&dhd->pend_8021x_cnt); + atomic_inc(&drvr_priv->pend_8021x_cnt); } /* If the protocol uses a data header, apply it */ - dhd_prot_hdrpush(dhdp, ifidx, pktbuf); + brcmf_proto_hdrpush(drvr, ifidx, pktbuf); /* Use bus module to send data frame */ -#ifdef BCMDBUS - ret = dbus_send_pkt(dhdp->dbus, pktbuf, NULL /* pktinfo */); -#else - ret = dhd_bus_txdata(dhdp->bus, pktbuf); -#endif /* BCMDBUS */ - - return ret; -} - -static inline void * -osl_pkt_frmnative(struct sk_buff *skb) -{ - return (void *)skb; -} -#define PKTFRMNATIVE(osh, skb) \ - osl_pkt_frmnative((struct sk_buff *)(skb)) - -static inline struct sk_buff * -osl_pkt_tonative(void *pkt) -{ - return (struct sk_buff *)pkt; + return brcmf_sdbrcm_bus_txdata(drvr->bus, pktbuf); } -#define PKTTONATIVE(osh, pkt) \ - osl_pkt_tonative((pkt)) -static int dhd_start_xmit(struct sk_buff *skb, struct net_device *net) +static int brcmf_netdev_start_xmit(struct sk_buff *skb, struct net_device *net) { int ret; - void *pktbuf; - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net); + struct brcmf_info *drvr_priv = *(struct brcmf_info **) netdev_priv(net); int ifidx; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* Reject if down */ - if (!dhd->pub.up || (dhd->pub.busstate == DHD_BUS_DOWN)) { - DHD_ERROR(("%s: xmit rejected pub.up=%d busstate=%d\n", - __func__, dhd->pub.up, dhd->pub.busstate)); + if (!drvr_priv->pub.up || (drvr_priv->pub.busstate == BRCMF_BUS_DOWN)) { + BRCMF_ERROR(("%s: xmit rejected pub.up=%d busstate=%d\n", + __func__, drvr_priv->pub.up, + drvr_priv->pub.busstate)); netif_stop_queue(net); return -ENODEV; } - ifidx = dhd_net2idx(dhd, net); - if (ifidx == DHD_BAD_IF) { - DHD_ERROR(("%s: bad ifidx %d\n", __func__, ifidx)); + ifidx = brcmf_net2idx(drvr_priv, net); + if (ifidx == BRCMF_BAD_IF) { + BRCMF_ERROR(("%s: bad ifidx %d\n", __func__, ifidx)); netif_stop_queue(net); return -ENODEV; } /* Make sure there's enough room for any header */ - if (skb_headroom(skb) < dhd->pub.hdrlen) { + if (skb_headroom(skb) < drvr_priv->pub.hdrlen) { struct sk_buff *skb2; - DHD_INFO(("%s: insufficient headroom\n", - dhd_ifname(&dhd->pub, ifidx))); - dhd->pub.tx_realloc++; - skb2 = skb_realloc_headroom(skb, dhd->pub.hdrlen); + BRCMF_INFO(("%s: insufficient headroom\n", + brcmf_ifname(&drvr_priv->pub, ifidx))); + drvr_priv->pub.tx_realloc++; + skb2 = skb_realloc_headroom(skb, drvr_priv->pub.hdrlen); dev_kfree_skb(skb); skb = skb2; if (skb == NULL) { - DHD_ERROR(("%s: skb_realloc_headroom failed\n", - dhd_ifname(&dhd->pub, ifidx))); + BRCMF_ERROR(("%s: skb_realloc_headroom failed\n", + brcmf_ifname(&drvr_priv->pub, ifidx))); ret = -ENOMEM; goto done; } } - /* Convert to packet */ - pktbuf = PKTFRMNATIVE(dhd->pub.osh, skb); - if (!pktbuf) { - DHD_ERROR(("%s: PKTFRMNATIVE failed\n", - dhd_ifname(&dhd->pub, ifidx))); - dev_kfree_skb_any(skb); - ret = -ENOMEM; - goto done; - } - - ret = dhd_sendpkt(&dhd->pub, ifidx, pktbuf); + ret = brcmf_sendpkt(&drvr_priv->pub, ifidx, skb); done: if (ret) - dhd->pub.dstats.tx_dropped++; + drvr_priv->pub.dstats.tx_dropped++; else - dhd->pub.tx_packets++; + drvr_priv->pub.tx_packets++; /* Return ok: we always eat the packet */ return 0; } -void dhd_txflowcontrol(dhd_pub_t *dhdp, int ifidx, bool state) +void brcmf_txflowcontrol(struct brcmf_pub *drvr, int ifidx, bool state) { struct net_device *net; - dhd_info_t *dhd = dhdp->info; + struct brcmf_info *drvr_priv = drvr->info; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - dhdp->txoff = state; - ASSERT(dhd && dhd->iflist[ifidx]); - net = dhd->iflist[ifidx]->net; + drvr->txoff = state; + net = drvr_priv->iflist[ifidx]->net; if (state == ON) netif_stop_queue(net); else netif_wake_queue(net); } -void dhd_rx_frame(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pktbuf, +void brcmf_rx_frame(struct brcmf_pub *drvr, int ifidx, struct sk_buff *skb, int numpkt) { - dhd_info_t *dhd = (dhd_info_t *) dhdp->info; - struct sk_buff *skb; + struct brcmf_info *drvr_priv = drvr->info; unsigned char *eth; uint len; void *data; struct sk_buff *pnext, *save_pktbuf; int i; - dhd_if_t *ifp; - wl_event_msg_t event; - - DHD_TRACE(("%s: Enter\n", __func__)); + struct brcmf_if *ifp; + struct brcmf_event_msg event; - save_pktbuf = pktbuf; + BRCMF_TRACE(("%s: Enter\n", __func__)); - for (i = 0; pktbuf && i < numpkt; i++, pktbuf = pnext) { + save_pktbuf = skb; - pnext = pktbuf->next; - pktbuf->next = NULL; + for (i = 0; skb && i < numpkt; i++, skb = pnext) { - skb = PKTTONATIVE(dhdp->osh, pktbuf); + pnext = skb->next; + skb->next = NULL; /* Get the protocol, maintain skb around eth_type_trans() * The main reason for this hack is for the limitation of @@ -1178,16 +739,15 @@ void dhd_rx_frame(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pktbuf, eth = skb->data; len = skb->len; - ifp = dhd->iflist[ifidx]; + ifp = drvr_priv->iflist[ifidx]; if (ifp == NULL) - ifp = dhd->iflist[0]; + ifp = drvr_priv->iflist[0]; - ASSERT(ifp); skb->dev = ifp->net; skb->protocol = eth_type_trans(skb, skb->dev); if (skb->pkt_type == PACKET_MULTICAST) - dhd->pub.rx_multicast++; + drvr_priv->pub.rx_multicast++; skb->data = eth; skb->len = len; @@ -1196,20 +756,20 @@ void dhd_rx_frame(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pktbuf, skb_pull(skb, ETH_HLEN); /* Process special event packets and then discard them */ - if (ntohs(skb->protocol) == ETH_P_BRCM) - dhd_wl_host_event(dhd, &ifidx, + if (ntohs(skb->protocol) == ETH_P_LINK_CTL) + brcmf_host_event(drvr_priv, &ifidx, skb_mac_header(skb), &event, &data); - ASSERT(ifidx < DHD_MAX_IFS && dhd->iflist[ifidx]); - if (dhd->iflist[ifidx] && !dhd->iflist[ifidx]->state) - ifp = dhd->iflist[ifidx]; + if (drvr_priv->iflist[ifidx] && + !drvr_priv->iflist[ifidx]->state) + ifp = drvr_priv->iflist[ifidx]; if (ifp->net) ifp->net->last_rx = jiffies; - dhdp->dstats.rx_bytes += skb->len; - dhdp->rx_packets++; /* Local count */ + drvr->dstats.rx_bytes += skb->len; + drvr->rx_packets++; /* Local count */ if (in_interrupt()) { netif_rx(skb); @@ -1225,216 +785,83 @@ void dhd_rx_frame(dhd_pub_t *dhdp, int ifidx, struct sk_buff *pktbuf, } } -void dhd_event(struct dhd_info *dhd, char *evpkt, int evlen, int ifidx) -{ - /* Linux version has nothing to do */ - return; -} - -void dhd_txcomplete(dhd_pub_t *dhdp, struct sk_buff *txp, bool success) +void brcmf_txcomplete(struct brcmf_pub *drvr, struct sk_buff *txp, bool success) { uint ifidx; - dhd_info_t *dhd = (dhd_info_t *) (dhdp->info); + struct brcmf_info *drvr_priv = drvr->info; struct ethhdr *eh; u16 type; - dhd_prot_hdrpull(dhdp, &ifidx, txp); + brcmf_proto_hdrpull(drvr, &ifidx, txp); eh = (struct ethhdr *)(txp->data); type = ntohs(eh->h_proto); if (type == ETH_P_PAE) - atomic_dec(&dhd->pend_8021x_cnt); + atomic_dec(&drvr_priv->pend_8021x_cnt); } -static struct net_device_stats *dhd_get_stats(struct net_device *net) +static struct net_device_stats *brcmf_netdev_get_stats(struct net_device *net) { - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net); - dhd_if_t *ifp; + struct brcmf_info *drvr_priv = *(struct brcmf_info **) netdev_priv(net); + struct brcmf_if *ifp; int ifidx; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - ifidx = dhd_net2idx(dhd, net); - if (ifidx == DHD_BAD_IF) + ifidx = brcmf_net2idx(drvr_priv, net); + if (ifidx == BRCMF_BAD_IF) return NULL; - ifp = dhd->iflist[ifidx]; - ASSERT(dhd && ifp); + ifp = drvr_priv->iflist[ifidx]; - if (dhd->pub.up) { + if (drvr_priv->pub.up) { /* Use the protocol to get dongle stats */ - dhd_prot_dstats(&dhd->pub); + brcmf_proto_dstats(&drvr_priv->pub); } /* Copy dongle stats to net device stats */ - ifp->stats.rx_packets = dhd->pub.dstats.rx_packets; - ifp->stats.tx_packets = dhd->pub.dstats.tx_packets; - ifp->stats.rx_bytes = dhd->pub.dstats.rx_bytes; - ifp->stats.tx_bytes = dhd->pub.dstats.tx_bytes; - ifp->stats.rx_errors = dhd->pub.dstats.rx_errors; - ifp->stats.tx_errors = dhd->pub.dstats.tx_errors; - ifp->stats.rx_dropped = dhd->pub.dstats.rx_dropped; - ifp->stats.tx_dropped = dhd->pub.dstats.tx_dropped; - ifp->stats.multicast = dhd->pub.dstats.multicast; + ifp->stats.rx_packets = drvr_priv->pub.dstats.rx_packets; + ifp->stats.tx_packets = drvr_priv->pub.dstats.tx_packets; + ifp->stats.rx_bytes = drvr_priv->pub.dstats.rx_bytes; + ifp->stats.tx_bytes = drvr_priv->pub.dstats.tx_bytes; + ifp->stats.rx_errors = drvr_priv->pub.dstats.rx_errors; + ifp->stats.tx_errors = drvr_priv->pub.dstats.tx_errors; + ifp->stats.rx_dropped = drvr_priv->pub.dstats.rx_dropped; + ifp->stats.tx_dropped = drvr_priv->pub.dstats.tx_dropped; + ifp->stats.multicast = drvr_priv->pub.dstats.multicast; return &ifp->stats; } -static int dhd_watchdog_thread(void *data) -{ - dhd_info_t *dhd = (dhd_info_t *) data; - - /* This thread doesn't need any user-level access, - * so get rid of all our resources - */ -#ifdef DHD_SCHED - if (dhd_watchdog_prio > 0) { - struct sched_param param; - param.sched_priority = (dhd_watchdog_prio < MAX_RT_PRIO) ? - dhd_watchdog_prio : (MAX_RT_PRIO - 1); - setScheduler(current, SCHED_FIFO, ¶m); - } -#endif /* DHD_SCHED */ - - allow_signal(SIGTERM); - /* Run until signal received */ - while (1) { - if (kthread_should_stop()) - break; - if (down_interruptible(&dhd->watchdog_sem) == 0) { - if (dhd->pub.dongle_reset == false) { - /* Call the bus module watchdog */ - dhd_bus_watchdog(&dhd->pub); - } - /* Count the tick for reference */ - dhd->pub.tickcnt++; - } else - break; - } - return 0; -} - -static void dhd_watchdog(unsigned long data) -{ - dhd_info_t *dhd = (dhd_info_t *) data; - - if (dhd->watchdog_tsk) { - up(&dhd->watchdog_sem); - - /* Reschedule the watchdog */ - if (dhd->wd_timer_valid) { - mod_timer(&dhd->timer, - jiffies + dhd_watchdog_ms * HZ / 1000); - } - return; - } - - /* Call the bus module watchdog */ - dhd_bus_watchdog(&dhd->pub); - - /* Count the tick for reference */ - dhd->pub.tickcnt++; - - /* Reschedule the watchdog */ - if (dhd->wd_timer_valid) - mod_timer(&dhd->timer, jiffies + dhd_watchdog_ms * HZ / 1000); -} - -static int dhd_dpc_thread(void *data) -{ - dhd_info_t *dhd = (dhd_info_t *) data; - - /* This thread doesn't need any user-level access, - * so get rid of all our resources - */ -#ifdef DHD_SCHED - if (dhd_dpc_prio > 0) { - struct sched_param param; - param.sched_priority = - (dhd_dpc_prio < - MAX_RT_PRIO) ? dhd_dpc_prio : (MAX_RT_PRIO - 1); - setScheduler(current, SCHED_FIFO, ¶m); - } -#endif /* DHD_SCHED */ - - allow_signal(SIGTERM); - /* Run until signal received */ - while (1) { - if (kthread_should_stop()) - break; - if (down_interruptible(&dhd->dpc_sem) == 0) { - /* Call bus dpc unless it indicated down - (then clean stop) */ - if (dhd->pub.busstate != DHD_BUS_DOWN) { - if (dhd_bus_dpc(dhd->pub.bus)) { - up(&dhd->dpc_sem); - } - } else { - dhd_bus_stop(dhd->pub.bus, true); - } - } else - break; - } - return 0; -} - -static void dhd_dpc(unsigned long data) -{ - dhd_info_t *dhd; - - dhd = (dhd_info_t *) data; - - /* Call bus dpc unless it indicated down (then clean stop) */ - if (dhd->pub.busstate != DHD_BUS_DOWN) { - if (dhd_bus_dpc(dhd->pub.bus)) - tasklet_schedule(&dhd->tasklet); - } else { - dhd_bus_stop(dhd->pub.bus, true); - } -} - -void dhd_sched_dpc(dhd_pub_t *dhdp) -{ - dhd_info_t *dhd = (dhd_info_t *) dhdp->info; - - if (dhd->dpc_tsk) { - up(&dhd->dpc_sem); - return; - } - - tasklet_schedule(&dhd->tasklet); -} - -#ifdef TOE /* Retrieve current toe component enables, which are kept as a bitmap in toe_ol iovar */ -static int dhd_toe_get(dhd_info_t *dhd, int ifidx, u32 *toe_ol) +static int brcmf_toe_get(struct brcmf_info *drvr_priv, int ifidx, u32 *toe_ol) { - wl_ioctl_t ioc; + struct brcmf_ioctl ioc; char buf[32]; int ret; memset(&ioc, 0, sizeof(ioc)); - ioc.cmd = WLC_GET_VAR; + ioc.cmd = BRCMF_C_GET_VAR; ioc.buf = buf; ioc.len = (uint) sizeof(buf); ioc.set = false; strcpy(buf, "toe_ol"); - ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); + ret = brcmf_proto_ioctl(&drvr_priv->pub, ifidx, &ioc, ioc.buf, ioc.len); if (ret < 0) { /* Check for older dongle image that doesn't support toe_ol */ if (ret == -EIO) { - DHD_ERROR(("%s: toe not supported by device\n", - dhd_ifname(&dhd->pub, ifidx))); + BRCMF_ERROR(("%s: toe not supported by device\n", + brcmf_ifname(&drvr_priv->pub, ifidx))); return -EOPNOTSUPP; } - DHD_INFO(("%s: could not get toe_ol: ret=%d\n", - dhd_ifname(&dhd->pub, ifidx), ret)); + BRCMF_INFO(("%s: could not get toe_ol: ret=%d\n", + brcmf_ifname(&drvr_priv->pub, ifidx), ret)); return ret; } @@ -1444,15 +871,15 @@ static int dhd_toe_get(dhd_info_t *dhd, int ifidx, u32 *toe_ol) /* Set current toe component enables in toe_ol iovar, and set toe global enable iovar */ -static int dhd_toe_set(dhd_info_t *dhd, int ifidx, u32 toe_ol) +static int brcmf_toe_set(struct brcmf_info *drvr_priv, int ifidx, u32 toe_ol) { - wl_ioctl_t ioc; + struct brcmf_ioctl ioc; char buf[32]; int toe, ret; memset(&ioc, 0, sizeof(ioc)); - ioc.cmd = WLC_SET_VAR; + ioc.cmd = BRCMF_C_SET_VAR; ioc.buf = buf; ioc.len = (uint) sizeof(buf); ioc.set = true; @@ -1462,10 +889,10 @@ static int dhd_toe_set(dhd_info_t *dhd, int ifidx, u32 toe_ol) strcpy(buf, "toe_ol"); memcpy(&buf[sizeof("toe_ol")], &toe_ol, sizeof(u32)); - ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); + ret = brcmf_proto_ioctl(&drvr_priv->pub, ifidx, &ioc, ioc.buf, ioc.len); if (ret < 0) { - DHD_ERROR(("%s: could not set toe_ol: ret=%d\n", - dhd_ifname(&dhd->pub, ifidx), ret)); + BRCMF_ERROR(("%s: could not set toe_ol: ret=%d\n", + brcmf_ifname(&drvr_priv->pub, ifidx), ret)); return ret; } @@ -1476,44 +903,42 @@ static int dhd_toe_set(dhd_info_t *dhd, int ifidx, u32 toe_ol) strcpy(buf, "toe"); memcpy(&buf[sizeof("toe")], &toe, sizeof(u32)); - ret = dhd_prot_ioctl(&dhd->pub, ifidx, &ioc, ioc.buf, ioc.len); + ret = brcmf_proto_ioctl(&drvr_priv->pub, ifidx, &ioc, ioc.buf, ioc.len); if (ret < 0) { - DHD_ERROR(("%s: could not set toe: ret=%d\n", - dhd_ifname(&dhd->pub, ifidx), ret)); + BRCMF_ERROR(("%s: could not set toe: ret=%d\n", + brcmf_ifname(&drvr_priv->pub, ifidx), ret)); return ret; } return 0; } -#endif /* TOE */ -static void dhd_ethtool_get_drvinfo(struct net_device *net, +static void brcmf_ethtool_get_drvinfo(struct net_device *net, struct ethtool_drvinfo *info) { - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net); + struct brcmf_info *drvr_priv = *(struct brcmf_info **) netdev_priv(net); - sprintf(info->driver, DRV_MODULE_NAME); - sprintf(info->version, "%lu", dhd->pub.drv_version); - sprintf(info->fw_version, "%s", wl_cfg80211_get_fwname()); - sprintf(info->bus_info, "%s", dev_name(&wl_cfg80211_get_sdio_func()->dev)); + sprintf(info->driver, KBUILD_MODNAME); + sprintf(info->version, "%lu", drvr_priv->pub.drv_version); + sprintf(info->fw_version, "%s", BCM4329_FW_NAME); + sprintf(info->bus_info, "%s", + dev_name(&brcmf_cfg80211_get_sdio_func()->dev)); } -struct ethtool_ops dhd_ethtool_ops = { - .get_drvinfo = dhd_ethtool_get_drvinfo +struct ethtool_ops brcmf_ethtool_ops = { + .get_drvinfo = brcmf_ethtool_get_drvinfo }; -static int dhd_ethtool(dhd_info_t *dhd, void *uaddr) +static int brcmf_ethtool(struct brcmf_info *drvr_priv, void *uaddr) { struct ethtool_drvinfo info; char drvname[sizeof(info.driver)]; u32 cmd; -#ifdef TOE struct ethtool_value edata; u32 toe_cmpnt, csum_dir; int ret; -#endif - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* all ethtool calls start with a cmd word */ if (copy_from_user(&cmd, uaddr, sizeof(u32))) @@ -1531,36 +956,35 @@ static int dhd_ethtool(dhd_info_t *dhd, void *uaddr) memset(&info, 0, sizeof(info)); info.cmd = cmd; - /* if dhd requested, identify ourselves */ + /* if requested, identify ourselves */ if (strcmp(drvname, "?dhd") == 0) { sprintf(info.driver, "dhd"); - strcpy(info.version, EPI_VERSION_STR); + strcpy(info.version, BRCMF_VERSION_STR); } /* otherwise, require dongle to be up */ - else if (!dhd->pub.up) { - DHD_ERROR(("%s: dongle is not up\n", __func__)); + else if (!drvr_priv->pub.up) { + BRCMF_ERROR(("%s: dongle is not up\n", __func__)); return -ENODEV; } /* finally, report dongle driver type */ - else if (dhd->pub.iswl) + else if (drvr_priv->pub.iswl) sprintf(info.driver, "wl"); else sprintf(info.driver, "xx"); - sprintf(info.version, "%lu", dhd->pub.drv_version); + sprintf(info.version, "%lu", drvr_priv->pub.drv_version); if (copy_to_user(uaddr, &info, sizeof(info))) return -EFAULT; - DHD_CTL(("%s: given %*s, returning %s\n", __func__, - (int)sizeof(drvname), drvname, info.driver)); + BRCMF_CTL(("%s: given %*s, returning %s\n", __func__, + (int)sizeof(drvname), drvname, info.driver)); break; -#ifdef TOE /* Get toe offload components from dongle */ case ETHTOOL_GRXCSUM: case ETHTOOL_GTXCSUM: - ret = dhd_toe_get(dhd, 0, &toe_cmpnt); + ret = brcmf_toe_get(drvr_priv, 0, &toe_cmpnt); if (ret < 0) return ret; @@ -1581,7 +1005,7 @@ static int dhd_ethtool(dhd_info_t *dhd, void *uaddr) return -EFAULT; /* Read the current settings, update and write back */ - ret = dhd_toe_get(dhd, 0, &toe_cmpnt); + ret = brcmf_toe_get(drvr_priv, 0, &toe_cmpnt); if (ret < 0) return ret; @@ -1593,22 +1017,21 @@ static int dhd_ethtool(dhd_info_t *dhd, void *uaddr) else toe_cmpnt &= ~csum_dir; - ret = dhd_toe_set(dhd, 0, toe_cmpnt); + ret = brcmf_toe_set(drvr_priv, 0, toe_cmpnt); if (ret < 0) return ret; /* If setting TX checksum mode, tell Linux the new mode */ if (cmd == ETHTOOL_STXCSUM) { if (edata.data) - dhd->iflist[0]->net->features |= + drvr_priv->iflist[0]->net->features |= NETIF_F_IP_CSUM; else - dhd->iflist[0]->net->features &= + drvr_priv->iflist[0]->net->features &= ~NETIF_F_IP_CSUM; } break; -#endif /* TOE */ default: return -EOPNOTSUPP; @@ -1617,10 +1040,11 @@ static int dhd_ethtool(dhd_info_t *dhd, void *uaddr) return 0; } -static int dhd_ioctl_entry(struct net_device *net, struct ifreq *ifr, int cmd) +static int brcmf_netdev_ioctl_entry(struct net_device *net, struct ifreq *ifr, + int cmd) { - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net); - dhd_ioctl_t ioc; + struct brcmf_info *drvr_priv = *(struct brcmf_info **) netdev_priv(net); + struct brcmf_c_ioctl ioc; int bcmerror = 0; int buflen = 0; void *buf = NULL; @@ -1628,22 +1052,14 @@ static int dhd_ioctl_entry(struct net_device *net, struct ifreq *ifr, int cmd) int ifidx; bool is_set_key_cmd; - ifidx = dhd_net2idx(dhd, net); - DHD_TRACE(("%s: ifidx %d, cmd 0x%04x\n", __func__, ifidx, cmd)); + ifidx = brcmf_net2idx(drvr_priv, net); + BRCMF_TRACE(("%s: ifidx %d, cmd 0x%04x\n", __func__, ifidx, cmd)); - if (ifidx == DHD_BAD_IF) + if (ifidx == BRCMF_BAD_IF) return -1; -#if defined(CONFIG_WIRELESS_EXT) - /* linux wireless extensions */ - if ((cmd >= SIOCIWFIRST) && (cmd <= SIOCIWLAST)) { - /* may recurse, do NOT lock */ - return wl_iw_ioctl(net, ifr, cmd); - } -#endif /* defined(CONFIG_WIRELESS_EXT) */ - if (cmd == SIOCETHTOOL) - return dhd_ethtool(dhd, (void *)ifr->ifr_data); + return brcmf_ethtool(drvr_priv, (void *)ifr->ifr_data); if (cmd != SIOCDEVPRIVATE) return -EOPNOTSUPP; @@ -1651,14 +1067,14 @@ static int dhd_ioctl_entry(struct net_device *net, struct ifreq *ifr, int cmd) memset(&ioc, 0, sizeof(ioc)); /* Copy the ioc control structure part of ioctl request */ - if (copy_from_user(&ioc, ifr->ifr_data, sizeof(wl_ioctl_t))) { + if (copy_from_user(&ioc, ifr->ifr_data, sizeof(struct brcmf_ioctl))) { bcmerror = -EINVAL; goto done; } /* Copy out any buffer passed */ if (ioc.buf) { - buflen = min_t(int, ioc.len, DHD_IOCTL_MAXLEN); + buflen = min_t(int, ioc.len, BRCMF_IOCTL_MAXLEN); /* optimization for direct ioctl calls from kernel */ /* if (segment_eq(get_fs(), KERNEL_DS)) { @@ -1678,9 +1094,9 @@ static int dhd_ioctl_entry(struct net_device *net, struct ifreq *ifr, int cmd) } } - /* To differentiate between wl and dhd read 4 more byes */ - if ((copy_from_user(&driver, (char *)ifr->ifr_data + sizeof(wl_ioctl_t), - sizeof(uint)) != 0)) { + /* To differentiate read 4 more byes */ + if ((copy_from_user(&driver, (char *)ifr->ifr_data + + sizeof(struct brcmf_ioctl), sizeof(uint)) != 0)) { bcmerror = -EINVAL; goto done; } @@ -1690,39 +1106,41 @@ static int dhd_ioctl_entry(struct net_device *net, struct ifreq *ifr, int cmd) goto done; } - /* check for local dhd ioctl and handle it */ - if (driver == DHD_IOCTL_MAGIC) { - bcmerror = dhd_ioctl((void *)&dhd->pub, &ioc, buf, buflen); + /* check for local brcmf ioctl and handle it */ + if (driver == BRCMF_IOCTL_MAGIC) { + bcmerror = brcmf_c_ioctl((void *)&drvr_priv->pub, &ioc, buf, buflen); if (bcmerror) - dhd->pub.bcmerror = bcmerror; + drvr_priv->pub.bcmerror = bcmerror; goto done; } /* send to dongle (must be up, and wl) */ - if ((dhd->pub.busstate != DHD_BUS_DATA)) { - DHD_ERROR(("%s DONGLE_DOWN,__func__\n", __func__)); + if ((drvr_priv->pub.busstate != BRCMF_BUS_DATA)) { + BRCMF_ERROR(("%s DONGLE_DOWN,__func__\n", __func__)); bcmerror = -EIO; goto done; } - if (!dhd->pub.iswl) { + if (!drvr_priv->pub.iswl) { bcmerror = -EIO; goto done; } - /* Intercept WLC_SET_KEY IOCTL - serialize M4 send and set key IOCTL to - * prevent M4 encryption. + /* + * Intercept BRCMF_C_SET_KEY IOCTL - serialize M4 send and + * set key IOCTL to prevent M4 encryption. */ - is_set_key_cmd = ((ioc.cmd == WLC_SET_KEY) || - ((ioc.cmd == WLC_SET_VAR) && + is_set_key_cmd = ((ioc.cmd == BRCMF_C_SET_KEY) || + ((ioc.cmd == BRCMF_C_SET_VAR) && !(strncmp("wsec_key", ioc.buf, 9))) || - ((ioc.cmd == WLC_SET_VAR) && + ((ioc.cmd == BRCMF_C_SET_VAR) && !(strncmp("bsscfg:wsec_key", ioc.buf, 15)))); if (is_set_key_cmd) - dhd_wait_pend8021x(net); + brcmf_netdev_wait_pend8021x(net); bcmerror = - dhd_prot_ioctl(&dhd->pub, ifidx, (wl_ioctl_t *)&ioc, buf, buflen); + brcmf_proto_ioctl(&drvr_priv->pub, ifidx, (struct brcmf_ioctl *)&ioc, + buf, buflen); done: if (!bcmerror && buf && ioc.buf) { @@ -1738,159 +1156,146 @@ done: return bcmerror; } -static int dhd_stop(struct net_device *net) +static int brcmf_netdev_stop(struct net_device *net) { #if !defined(IGNORE_ETH0_DOWN) - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net); + struct brcmf_info *drvr_priv = *(struct brcmf_info **) netdev_priv(net); - DHD_TRACE(("%s: Enter\n", __func__)); - if (IS_CFG80211_FAVORITE()) { - wl_cfg80211_down(); - } - if (dhd->pub.up == 0) + BRCMF_TRACE(("%s: Enter\n", __func__)); + brcmf_cfg80211_down(); + if (drvr_priv->pub.up == 0) return 0; /* Set state and stop OS transmissions */ - dhd->pub.up = 0; + drvr_priv->pub.up = 0; netif_stop_queue(net); #else - DHD_ERROR(("BYPASS %s:due to BRCM compilation : under investigation\n", - __func__)); + BRCMF_ERROR(("BYPASS %s:due to BRCM compilation: under investigation\n", + __func__)); #endif /* !defined(IGNORE_ETH0_DOWN) */ return 0; } -static int dhd_open(struct net_device *net) +static int brcmf_netdev_open(struct net_device *net) { - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(net); -#ifdef TOE + struct brcmf_info *drvr_priv = *(struct brcmf_info **) netdev_priv(net); u32 toe_ol; -#endif - int ifidx = dhd_net2idx(dhd, net); + int ifidx = brcmf_net2idx(drvr_priv, net); s32 ret = 0; - DHD_TRACE(("%s: ifidx %d\n", __func__, ifidx)); + BRCMF_TRACE(("%s: ifidx %d\n", __func__, ifidx)); if (ifidx == 0) { /* do it only for primary eth0 */ /* try to bring up bus */ - ret = dhd_bus_start(&dhd->pub); + ret = brcmf_bus_start(&drvr_priv->pub); if (ret != 0) { - DHD_ERROR(("%s: failed with code %d\n", __func__, ret)); + BRCMF_ERROR(("%s: failed with code %d\n", + __func__, ret)); return -1; } - atomic_set(&dhd->pend_8021x_cnt, 0); + atomic_set(&drvr_priv->pend_8021x_cnt, 0); - memcpy(net->dev_addr, dhd->pub.mac, ETH_ALEN); + memcpy(net->dev_addr, drvr_priv->pub.mac, ETH_ALEN); -#ifdef TOE /* Get current TOE mode from dongle */ - if (dhd_toe_get(dhd, ifidx, &toe_ol) >= 0 + if (brcmf_toe_get(drvr_priv, ifidx, &toe_ol) >= 0 && (toe_ol & TOE_TX_CSUM_OL) != 0) - dhd->iflist[ifidx]->net->features |= NETIF_F_IP_CSUM; + drvr_priv->iflist[ifidx]->net->features |= + NETIF_F_IP_CSUM; else - dhd->iflist[ifidx]->net->features &= ~NETIF_F_IP_CSUM; -#endif + drvr_priv->iflist[ifidx]->net->features &= + ~NETIF_F_IP_CSUM; } /* Allow transmit calls */ netif_start_queue(net); - dhd->pub.up = 1; - if (IS_CFG80211_FAVORITE()) { - if (unlikely(wl_cfg80211_up())) { - DHD_ERROR(("%s: failed to bring up cfg80211\n", - __func__)); - return -1; - } + drvr_priv->pub.up = 1; + if (unlikely(brcmf_cfg80211_up())) { + BRCMF_ERROR(("%s: failed to bring up cfg80211\n", + __func__)); + return -1; } return ret; } int -dhd_add_if(dhd_info_t *dhd, int ifidx, void *handle, char *name, +brcmf_add_if(struct brcmf_info *drvr_priv, int ifidx, void *handle, char *name, u8 *mac_addr, u32 flags, u8 bssidx) { - dhd_if_t *ifp; - - DHD_TRACE(("%s: idx %d, handle->%p\n", __func__, ifidx, handle)); + struct brcmf_if *ifp; - ASSERT(dhd && (ifidx < DHD_MAX_IFS)); + BRCMF_TRACE(("%s: idx %d, handle->%p\n", __func__, ifidx, handle)); - ifp = dhd->iflist[ifidx]; - if (!ifp && !(ifp = kmalloc(sizeof(dhd_if_t), GFP_ATOMIC))) { - DHD_ERROR(("%s: OOM - dhd_if_t\n", __func__)); - return -ENOMEM; + ifp = drvr_priv->iflist[ifidx]; + if (!ifp) { + ifp = kmalloc(sizeof(struct brcmf_if), GFP_ATOMIC); + if (!ifp) { + BRCMF_ERROR(("%s: OOM - struct brcmf_if\n", __func__)); + return -ENOMEM; + } } - memset(ifp, 0, sizeof(dhd_if_t)); - ifp->info = dhd; - dhd->iflist[ifidx] = ifp; + memset(ifp, 0, sizeof(struct brcmf_if)); + ifp->info = drvr_priv; + drvr_priv->iflist[ifidx] = ifp; strlcpy(ifp->name, name, IFNAMSIZ); if (mac_addr != NULL) memcpy(&ifp->mac_addr, mac_addr, ETH_ALEN); if (handle == NULL) { - ifp->state = WLC_E_IF_ADD; + ifp->state = BRCMF_E_IF_ADD; ifp->idx = ifidx; - ASSERT(dhd->sysioc_tsk); - up(&dhd->sysioc_sem); + up(&drvr_priv->sysioc_sem); } else ifp->net = (struct net_device *)handle; return 0; } -void dhd_del_if(dhd_info_t *dhd, int ifidx) +void brcmf_del_if(struct brcmf_info *drvr_priv, int ifidx) { - dhd_if_t *ifp; + struct brcmf_if *ifp; - DHD_TRACE(("%s: idx %d\n", __func__, ifidx)); + BRCMF_TRACE(("%s: idx %d\n", __func__, ifidx)); - ASSERT(dhd && ifidx && (ifidx < DHD_MAX_IFS)); - ifp = dhd->iflist[ifidx]; + ifp = drvr_priv->iflist[ifidx]; if (!ifp) { - DHD_ERROR(("%s: Null interface\n", __func__)); + BRCMF_ERROR(("%s: Null interface\n", __func__)); return; } - ifp->state = WLC_E_IF_DEL; + ifp->state = BRCMF_E_IF_DEL; ifp->idx = ifidx; - ASSERT(dhd->sysioc_tsk); - up(&dhd->sysioc_sem); + up(&drvr_priv->sysioc_sem); } -dhd_pub_t *dhd_attach(struct dhd_bus *bus, uint bus_hdrlen) +struct brcmf_pub *brcmf_attach(struct brcmf_bus *bus, uint bus_hdrlen) { - dhd_info_t *dhd = NULL; + struct brcmf_info *drvr_priv = NULL; struct net_device *net; - DHD_TRACE(("%s: Enter\n", __func__)); - /* updates firmware nvram path if it was provided as module - paramters */ - if ((firmware_path != NULL) && (firmware_path[0] != '\0')) - strcpy(fw_path, firmware_path); - if ((nvram_path != NULL) && (nvram_path[0] != '\0')) - strcpy(nv_path, nvram_path); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* Allocate etherdev, including space for private structure */ - net = alloc_etherdev(sizeof(dhd)); + net = alloc_etherdev(sizeof(drvr_priv)); if (!net) { - DHD_ERROR(("%s: OOM - alloc_etherdev\n", __func__)); + BRCMF_ERROR(("%s: OOM - alloc_etherdev\n", __func__)); goto fail; } - /* Allocate primary dhd_info */ - dhd = kzalloc(sizeof(dhd_info_t), GFP_ATOMIC); - if (!dhd) { - DHD_ERROR(("%s: OOM - alloc dhd_info\n", __func__)); + /* Allocate primary brcmf_info */ + drvr_priv = kzalloc(sizeof(struct brcmf_info), GFP_ATOMIC); + if (!drvr_priv) { + BRCMF_ERROR(("%s: OOM - alloc brcmf_info\n", __func__)); goto fail; } /* - * Save the dhd_info into the priv + * Save the brcmf_info into the priv */ - memcpy(netdev_priv(net), &dhd, sizeof(dhd)); + memcpy(netdev_priv(net), &drvr_priv, sizeof(drvr_priv)); /* Set network interface name if it was provided as module parameter */ if (iface_name[0]) { @@ -1904,317 +1309,180 @@ dhd_pub_t *dhd_attach(struct dhd_bus *bus, uint bus_hdrlen) strcat(net->name, "%d"); } - if (dhd_add_if(dhd, 0, (void *)net, net->name, NULL, 0, 0) == - DHD_BAD_IF) + if (brcmf_add_if(drvr_priv, 0, (void *)net, net->name, NULL, 0, 0) == + BRCMF_BAD_IF) goto fail; net->netdev_ops = NULL; - sema_init(&dhd->proto_sem, 1); + sema_init(&drvr_priv->proto_sem, 1); /* Initialize other structure content */ - init_waitqueue_head(&dhd->ioctl_resp_wait); - init_waitqueue_head(&dhd->ctrl_wait); - - /* Initialize the spinlocks */ - spin_lock_init(&dhd->sdlock); - spin_lock_init(&dhd->txqlock); + init_waitqueue_head(&drvr_priv->ioctl_resp_wait); /* Link to info module */ - dhd->pub.info = dhd; + drvr_priv->pub.info = drvr_priv; /* Link to bus module */ - dhd->pub.bus = bus; - dhd->pub.hdrlen = bus_hdrlen; + drvr_priv->pub.bus = bus; + drvr_priv->pub.hdrlen = bus_hdrlen; /* Attach and link in the protocol */ - if (dhd_prot_attach(&dhd->pub) != 0) { - DHD_ERROR(("dhd_prot_attach failed\n")); + if (brcmf_proto_attach(&drvr_priv->pub) != 0) { + BRCMF_ERROR(("brcmf_prot_attach failed\n")); goto fail; } -#if defined(CONFIG_WIRELESS_EXT) - /* Attach and link in the iw */ - if (wl_iw_attach(net, (void *)&dhd->pub) != 0) { - DHD_ERROR(("wl_iw_attach failed\n")); - goto fail; - } -#endif /* defined(CONFIG_WIRELESS_EXT) */ /* Attach and link in the cfg80211 */ - if (IS_CFG80211_FAVORITE()) { - if (unlikely(wl_cfg80211_attach(net, &dhd->pub))) { - DHD_ERROR(("wl_cfg80211_attach failed\n")); - goto fail; - } - if (!NO_FW_REQ()) { - strcpy(fw_path, wl_cfg80211_get_fwname()); - strcpy(nv_path, wl_cfg80211_get_nvramname()); - } - } - - /* Set up the watchdog timer */ - init_timer(&dhd->timer); - dhd->timer.data = (unsigned long) dhd; - dhd->timer.function = dhd_watchdog; - - /* Initialize thread based operation and lock */ - sema_init(&dhd->sdsem, 1); - if ((dhd_watchdog_prio >= 0) && (dhd_dpc_prio >= 0)) - dhd->threads_only = true; - else - dhd->threads_only = false; - - if (dhd_dpc_prio >= 0) { - /* Initialize watchdog thread */ - sema_init(&dhd->watchdog_sem, 0); - dhd->watchdog_tsk = kthread_run(dhd_watchdog_thread, dhd, - "dhd_watchdog"); - if (IS_ERR(dhd->watchdog_tsk)) { - printk(KERN_WARNING - "dhd_watchdog thread failed to start\n"); - dhd->watchdog_tsk = NULL; - } - } else { - dhd->watchdog_tsk = NULL; - } - - /* Set up the bottom half handler */ - if (dhd_dpc_prio >= 0) { - /* Initialize DPC thread */ - sema_init(&dhd->dpc_sem, 0); - dhd->dpc_tsk = kthread_run(dhd_dpc_thread, dhd, "dhd_dpc"); - if (IS_ERR(dhd->dpc_tsk)) { - printk(KERN_WARNING - "dhd_dpc thread failed to start\n"); - dhd->dpc_tsk = NULL; - } - } else { - tasklet_init(&dhd->tasklet, dhd_dpc, (unsigned long) dhd); - dhd->dpc_tsk = NULL; + if (unlikely(brcmf_cfg80211_attach(net, &drvr_priv->pub))) { + BRCMF_ERROR(("wl_cfg80211_attach failed\n")); + goto fail; } - if (dhd_sysioc) { - sema_init(&dhd->sysioc_sem, 0); - dhd->sysioc_tsk = kthread_run(_dhd_sysioc_thread, dhd, - "_dhd_sysioc"); - if (IS_ERR(dhd->sysioc_tsk)) { + if (brcmf_sysioc) { + sema_init(&drvr_priv->sysioc_sem, 0); + drvr_priv->sysioc_tsk = kthread_run(_brcmf_sysioc_thread, drvr_priv, + "_brcmf_sysioc"); + if (IS_ERR(drvr_priv->sysioc_tsk)) { printk(KERN_WARNING - "_dhd_sysioc thread failed to start\n"); - dhd->sysioc_tsk = NULL; + "_brcmf_sysioc thread failed to start\n"); + drvr_priv->sysioc_tsk = NULL; } } else - dhd->sysioc_tsk = NULL; + drvr_priv->sysioc_tsk = NULL; /* - * Save the dhd_info into the priv + * Save the brcmf_info into the priv */ - memcpy(netdev_priv(net), &dhd, sizeof(dhd)); + memcpy(netdev_priv(net), &drvr_priv, sizeof(drvr_priv)); -#if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC) - g_bus = bus; -#endif #if defined(CONFIG_PM_SLEEP) - atomic_set(&dhd_mmc_suspend, false); - if (!IS_CFG80211_FAVORITE()) - register_pm_notifier(&dhd_sleep_pm_notifier); + atomic_set(&brcmf_mmc_suspend, false); #endif /* defined(CONFIG_PM_SLEEP) */ - /* && defined(DHD_GPL) */ - /* Init lock suspend to prevent kernel going to suspend */ -#ifdef CONFIG_HAS_EARLYSUSPEND - dhd->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN + 20; - dhd->early_suspend.suspend = dhd_early_suspend; - dhd->early_suspend.resume = dhd_late_resume; - register_early_suspend(&dhd->early_suspend); -#endif - - return &dhd->pub; + return &drvr_priv->pub; fail: if (net) free_netdev(net); - if (dhd) - dhd_detach(&dhd->pub); + if (drvr_priv) + brcmf_detach(&drvr_priv->pub); return NULL; } -int dhd_bus_start(dhd_pub_t *dhdp) +int brcmf_bus_start(struct brcmf_pub *drvr) { int ret = -1; - dhd_info_t *dhd = (dhd_info_t *) dhdp->info; -#ifdef EMBEDDED_PLATFORM - char iovbuf[WL_EVENTING_MASK_LEN + 12]; /* Room for "event_msgs" + - '\0' + bitvec */ -#endif /* EMBEDDED_PLATFORM */ - - ASSERT(dhd); - - DHD_TRACE(("%s:\n", __func__)); - - /* try to download image and nvram to the dongle */ - if (dhd->pub.busstate == DHD_BUS_DOWN) { - if (!(dhd_bus_download_firmware(dhd->pub.bus, - fw_path, nv_path))) { - DHD_ERROR(("%s: dhdsdio_probe_download failed. " - "firmware = %s nvram = %s\n", - __func__, fw_path, nv_path)); - return -1; - } - } + struct brcmf_info *drvr_priv = drvr->info; + /* Room for "event_msgs" + '\0' + bitvec */ + char iovbuf[BRCMF_EVENTING_MASK_LEN + 12]; - /* Start the watchdog timer */ - dhd->pub.tickcnt = 0; - dhd_os_wd_timer(&dhd->pub, dhd_watchdog_ms); + BRCMF_TRACE(("%s:\n", __func__)); /* Bring up the bus */ - ret = dhd_bus_init(&dhd->pub, true); + ret = brcmf_sdbrcm_bus_init(&drvr_priv->pub, true); if (ret != 0) { - DHD_ERROR(("%s, dhd_bus_init failed %d\n", __func__, ret)); + BRCMF_ERROR(("%s, brcmf_sdbrcm_bus_init failed %d\n", __func__, + ret)); return ret; } -#if defined(OOB_INTR_ONLY) - /* Host registration for OOB interrupt */ - if (bcmsdh_register_oob_intr(dhdp)) { - del_timer_sync(&dhd->timer); - dhd->wd_timer_valid = false; - DHD_ERROR(("%s Host failed to resgister for OOB\n", __func__)); - return -ENODEV; - } - - /* Enable oob at firmware */ - dhd_enable_oob_intr(dhd->pub.bus, true); -#endif /* defined(OOB_INTR_ONLY) */ /* If bus is not ready, can't come up */ - if (dhd->pub.busstate != DHD_BUS_DATA) { - del_timer_sync(&dhd->timer); - dhd->wd_timer_valid = false; - DHD_ERROR(("%s failed bus is not ready\n", __func__)); + if (drvr_priv->pub.busstate != BRCMF_BUS_DATA) { + BRCMF_ERROR(("%s failed bus is not ready\n", __func__)); return -ENODEV; } -#ifdef EMBEDDED_PLATFORM - bcm_mkiovar("event_msgs", dhdp->eventmask, WL_EVENTING_MASK_LEN, iovbuf, - sizeof(iovbuf)); - dhdcdc_query_ioctl(dhdp, 0, WLC_GET_VAR, iovbuf, sizeof(iovbuf)); - memcpy(dhdp->eventmask, iovbuf, WL_EVENTING_MASK_LEN); - - setbit(dhdp->eventmask, WLC_E_SET_SSID); - setbit(dhdp->eventmask, WLC_E_PRUNE); - setbit(dhdp->eventmask, WLC_E_AUTH); - setbit(dhdp->eventmask, WLC_E_REASSOC); - setbit(dhdp->eventmask, WLC_E_REASSOC_IND); - setbit(dhdp->eventmask, WLC_E_DEAUTH_IND); - setbit(dhdp->eventmask, WLC_E_DISASSOC_IND); - setbit(dhdp->eventmask, WLC_E_DISASSOC); - setbit(dhdp->eventmask, WLC_E_JOIN); - setbit(dhdp->eventmask, WLC_E_ASSOC_IND); - setbit(dhdp->eventmask, WLC_E_PSK_SUP); - setbit(dhdp->eventmask, WLC_E_LINK); - setbit(dhdp->eventmask, WLC_E_NDIS_LINK); - setbit(dhdp->eventmask, WLC_E_MIC_ERROR); - setbit(dhdp->eventmask, WLC_E_PMKID_CACHE); - setbit(dhdp->eventmask, WLC_E_TXFAIL); - setbit(dhdp->eventmask, WLC_E_JOIN_START); - setbit(dhdp->eventmask, WLC_E_SCAN_COMPLETE); -#ifdef PNO_SUPPORT - setbit(dhdp->eventmask, WLC_E_PFN_NET_FOUND); -#endif /* PNO_SUPPORT */ + + brcmu_mkiovar("event_msgs", drvr->eventmask, BRCMF_EVENTING_MASK_LEN, + iovbuf, sizeof(iovbuf)); + brcmf_proto_cdc_query_ioctl(drvr, 0, BRCMF_C_GET_VAR, iovbuf, + sizeof(iovbuf)); + memcpy(drvr->eventmask, iovbuf, BRCMF_EVENTING_MASK_LEN); + + setbit(drvr->eventmask, BRCMF_E_SET_SSID); + setbit(drvr->eventmask, BRCMF_E_PRUNE); + setbit(drvr->eventmask, BRCMF_E_AUTH); + setbit(drvr->eventmask, BRCMF_E_REASSOC); + setbit(drvr->eventmask, BRCMF_E_REASSOC_IND); + setbit(drvr->eventmask, BRCMF_E_DEAUTH_IND); + setbit(drvr->eventmask, BRCMF_E_DISASSOC_IND); + setbit(drvr->eventmask, BRCMF_E_DISASSOC); + setbit(drvr->eventmask, BRCMF_E_JOIN); + setbit(drvr->eventmask, BRCMF_E_ASSOC_IND); + setbit(drvr->eventmask, BRCMF_E_PSK_SUP); + setbit(drvr->eventmask, BRCMF_E_LINK); + setbit(drvr->eventmask, BRCMF_E_NDIS_LINK); + setbit(drvr->eventmask, BRCMF_E_MIC_ERROR); + setbit(drvr->eventmask, BRCMF_E_PMKID_CACHE); + setbit(drvr->eventmask, BRCMF_E_TXFAIL); + setbit(drvr->eventmask, BRCMF_E_JOIN_START); + setbit(drvr->eventmask, BRCMF_E_SCAN_COMPLETE); /* enable dongle roaming event */ - dhdp->pktfilter_count = 1; + drvr->pktfilter_count = 1; /* Setup filter to allow only unicast */ - dhdp->pktfilter[0] = "100 0 0 0 0x01 0x00"; -#endif /* EMBEDDED_PLATFORM */ + drvr->pktfilter[0] = "100 0 0 0 0x01 0x00"; /* Bus is ready, do any protocol initialization */ - ret = dhd_prot_init(&dhd->pub); + ret = brcmf_proto_init(&drvr_priv->pub); if (ret < 0) return ret; return 0; } -int -dhd_iovar(dhd_pub_t *pub, int ifidx, char *name, char *cmd_buf, uint cmd_len, - int set) -{ - char buf[strlen(name) + 1 + cmd_len]; - int len = sizeof(buf); - wl_ioctl_t ioc; - int ret; - - len = bcm_mkiovar(name, cmd_buf, cmd_len, buf, len); - - memset(&ioc, 0, sizeof(ioc)); - - ioc.cmd = set ? WLC_SET_VAR : WLC_GET_VAR; - ioc.buf = buf; - ioc.len = len; - ioc.set = set; - - ret = dhd_prot_ioctl(pub, ifidx, &ioc, ioc.buf, ioc.len); - if (!set && ret >= 0) - memcpy(cmd_buf, buf, cmd_len); - - return ret; -} - -static struct net_device_ops dhd_ops_pri = { - .ndo_open = dhd_open, - .ndo_stop = dhd_stop, - .ndo_get_stats = dhd_get_stats, - .ndo_do_ioctl = dhd_ioctl_entry, - .ndo_start_xmit = dhd_start_xmit, - .ndo_set_mac_address = dhd_set_mac_address, - .ndo_set_multicast_list = dhd_set_multicast_list +static struct net_device_ops brcmf_netdev_ops_pri = { + .ndo_open = brcmf_netdev_open, + .ndo_stop = brcmf_netdev_stop, + .ndo_get_stats = brcmf_netdev_get_stats, + .ndo_do_ioctl = brcmf_netdev_ioctl_entry, + .ndo_start_xmit = brcmf_netdev_start_xmit, + .ndo_set_mac_address = brcmf_netdev_set_mac_address, + .ndo_set_multicast_list = brcmf_netdev_set_multicast_list }; -int dhd_net_attach(dhd_pub_t *dhdp, int ifidx) +int brcmf_net_attach(struct brcmf_pub *drvr, int ifidx) { - dhd_info_t *dhd = (dhd_info_t *) dhdp->info; + struct brcmf_info *drvr_priv = drvr->info; struct net_device *net; u8 temp_addr[ETH_ALEN] = { 0x00, 0x90, 0x4c, 0x11, 0x22, 0x33}; - DHD_TRACE(("%s: ifidx %d\n", __func__, ifidx)); - - ASSERT(dhd && dhd->iflist[ifidx]); + BRCMF_TRACE(("%s: ifidx %d\n", __func__, ifidx)); - net = dhd->iflist[ifidx]->net; - ASSERT(net); - - ASSERT(!net->netdev_ops); - net->netdev_ops = &dhd_ops_pri; + net = drvr_priv->iflist[ifidx]->net; + net->netdev_ops = &brcmf_netdev_ops_pri; /* * We have to use the primary MAC for virtual interfaces */ if (ifidx != 0) { /* for virtual interfaces use the primary MAC */ - memcpy(temp_addr, dhd->pub.mac, ETH_ALEN); + memcpy(temp_addr, drvr_priv->pub.mac, ETH_ALEN); } if (ifidx == 1) { - DHD_TRACE(("%s ACCESS POINT MAC: \n", __func__)); + BRCMF_TRACE(("%s ACCESS POINT MAC:\n", __func__)); /* ACCESSPOINT INTERFACE CASE */ temp_addr[0] |= 0X02; /* set bit 2 , - Locally Administered address */ } - net->hard_header_len = ETH_HLEN + dhd->pub.hdrlen; - net->ethtool_ops = &dhd_ethtool_ops; + net->hard_header_len = ETH_HLEN + drvr_priv->pub.hdrlen; + net->ethtool_ops = &brcmf_ethtool_ops; - dhd->pub.rxsz = net->mtu + net->hard_header_len + dhd->pub.hdrlen; + drvr_priv->pub.rxsz = net->mtu + net->hard_header_len + + drvr_priv->pub.hdrlen; memcpy(net->dev_addr, temp_addr, ETH_ALEN); if (register_netdev(net) != 0) { - DHD_ERROR(("%s: couldn't register the net device\n", - __func__)); + BRCMF_ERROR(("%s: couldn't register the net device\n", + __func__)); goto fail; } - DHD_INFO(("%s: Broadcom Dongle Host Driver\n", net->name)); + BRCMF_INFO(("%s: Broadcom Dongle Host Driver\n", net->name)); return 0; @@ -2223,221 +1491,139 @@ fail: return -EBADE; } -void dhd_bus_detach(dhd_pub_t *dhdp) +static void brcmf_bus_detach(struct brcmf_pub *drvr) { - dhd_info_t *dhd; + struct brcmf_info *drvr_priv; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (dhdp) { - dhd = (dhd_info_t *) dhdp->info; - if (dhd) { + if (drvr) { + drvr_priv = drvr->info; + if (drvr_priv) { /* Stop the protocol module */ - dhd_prot_stop(&dhd->pub); + brcmf_proto_stop(&drvr_priv->pub); /* Stop the bus module */ - dhd_bus_stop(dhd->pub.bus, true); -#if defined(OOB_INTR_ONLY) - bcmsdh_unregister_oob_intr(); -#endif /* defined(OOB_INTR_ONLY) */ - - /* Clear the watchdog timer */ - del_timer_sync(&dhd->timer); - dhd->wd_timer_valid = false; + brcmf_sdbrcm_bus_stop(drvr_priv->pub.bus, true); } } } -void dhd_detach(dhd_pub_t *dhdp) +void brcmf_detach(struct brcmf_pub *drvr) { - dhd_info_t *dhd; + struct brcmf_info *drvr_priv; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (dhdp) { - dhd = (dhd_info_t *) dhdp->info; - if (dhd) { - dhd_if_t *ifp; + if (drvr) { + drvr_priv = drvr->info; + if (drvr_priv) { + struct brcmf_if *ifp; int i; -#if defined(CONFIG_HAS_EARLYSUSPEND) - if (dhd->early_suspend.suspend) - unregister_early_suspend(&dhd->early_suspend); -#endif /* defined(CONFIG_HAS_EARLYSUSPEND) */ - - for (i = 1; i < DHD_MAX_IFS; i++) - if (dhd->iflist[i]) - dhd_del_if(dhd, i); + for (i = 1; i < BRCMF_MAX_IFS; i++) + if (drvr_priv->iflist[i]) + brcmf_del_if(drvr_priv, i); - ifp = dhd->iflist[0]; - ASSERT(ifp); - if (ifp->net->netdev_ops == &dhd_ops_pri) { - dhd_stop(ifp->net); + ifp = drvr_priv->iflist[0]; + if (ifp->net->netdev_ops == &brcmf_netdev_ops_pri) { + brcmf_netdev_stop(ifp->net); unregister_netdev(ifp->net); } - if (dhd->watchdog_tsk) { - send_sig(SIGTERM, dhd->watchdog_tsk, 1); - kthread_stop(dhd->watchdog_tsk); - dhd->watchdog_tsk = NULL; + if (drvr_priv->sysioc_tsk) { + send_sig(SIGTERM, drvr_priv->sysioc_tsk, 1); + kthread_stop(drvr_priv->sysioc_tsk); + drvr_priv->sysioc_tsk = NULL; } - if (dhd->dpc_tsk) { - send_sig(SIGTERM, dhd->dpc_tsk, 1); - kthread_stop(dhd->dpc_tsk); - dhd->dpc_tsk = NULL; - } else - tasklet_kill(&dhd->tasklet); - - if (dhd->sysioc_tsk) { - send_sig(SIGTERM, dhd->sysioc_tsk, 1); - kthread_stop(dhd->sysioc_tsk); - dhd->sysioc_tsk = NULL; - } + brcmf_bus_detach(drvr); - dhd_bus_detach(dhdp); + if (drvr->prot) + brcmf_proto_detach(drvr); - if (dhdp->prot) - dhd_prot_detach(dhdp); + brcmf_cfg80211_detach(); -#if defined(CONFIG_WIRELESS_EXT) - wl_iw_detach(); -#endif /* (CONFIG_WIRELESS_EXT) */ - - if (IS_CFG80211_FAVORITE()) - wl_cfg80211_detach(); - -#if defined(CONFIG_PM_SLEEP) - if (!IS_CFG80211_FAVORITE()) - unregister_pm_notifier(&dhd_sleep_pm_notifier); -#endif /* defined(CONFIG_PM_SLEEP) */ - /* && defined(DHD_GPL) */ free_netdev(ifp->net); kfree(ifp); - kfree(dhd); + kfree(drvr_priv); } } } -static void __exit dhd_module_cleanup(void) +static void __exit brcmf_module_cleanup(void) { - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - dhd_bus_unregister(); -#if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC) - wifi_del_dev(); -#endif - /* Call customer gpio to turn off power with WL_REG_ON signal */ - dhd_customer_gpio_wlan_ctrl(WLAN_POWER_OFF); + brcmf_bus_unregister(); } -static int __init dhd_module_init(void) +static int __init brcmf_module_init(void) { int error; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - /* Sanity check on the module parameters */ - do { - /* Both watchdog and DPC as tasklets are ok */ - if ((dhd_watchdog_prio < 0) && (dhd_dpc_prio < 0)) - break; - - /* If both watchdog and DPC are threads, TX must be deferred */ - if ((dhd_watchdog_prio >= 0) && (dhd_dpc_prio >= 0) - && dhd_deferred_tx) - break; - - DHD_ERROR(("Invalid module parameters.\n")); - return -EINVAL; - } while (0); - /* Call customer gpio to turn on power with WL_REG_ON signal */ - dhd_customer_gpio_wlan_ctrl(WLAN_POWER_ON); - -#if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC) - sema_init(&wifi_control_sem, 0); - - error = wifi_add_dev(); - if (error) { - DHD_ERROR(("%s: platform_driver_register failed\n", __func__)); - goto failed; - } - - /* Waiting callback after platform_driver_register is done or - exit with error */ - if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) { - printk(KERN_ERR "%s: platform_driver_register timeout\n", - __func__); - /* remove device */ - wifi_del_dev(); - goto failed; - } -#endif /* #if defined(CUSTOMER_HW2) && defined(CONFIG_WIFI_CONTROL_FUNC) */ - - error = dhd_bus_register(); + error = brcmf_bus_register(); if (error) { - DHD_ERROR(("%s: sdio_register_driver failed\n", __func__)); + BRCMF_ERROR(("%s: brcmf_bus_register failed\n", __func__)); goto failed; } - return error; + return 0; failed: - /* turn off power and exit */ - dhd_customer_gpio_wlan_ctrl(WLAN_POWER_OFF); return -EINVAL; } -module_init(dhd_module_init); -module_exit(dhd_module_cleanup); +module_init(brcmf_module_init); +module_exit(brcmf_module_cleanup); -/* - * OS specific functions required to implement DHD driver in OS independent way - */ -int dhd_os_proto_block(dhd_pub_t *pub) +int brcmf_os_proto_block(struct brcmf_pub *drvr) { - dhd_info_t *dhd = (dhd_info_t *) (pub->info); + struct brcmf_info *drvr_priv = drvr->info; - if (dhd) { - down(&dhd->proto_sem); + if (drvr_priv) { + down(&drvr_priv->proto_sem); return 1; } return 0; } -int dhd_os_proto_unblock(dhd_pub_t *pub) +int brcmf_os_proto_unblock(struct brcmf_pub *drvr) { - dhd_info_t *dhd = (dhd_info_t *) (pub->info); + struct brcmf_info *drvr_priv = drvr->info; - if (dhd) { - up(&dhd->proto_sem); + if (drvr_priv) { + up(&drvr_priv->proto_sem); return 1; } return 0; } -unsigned int dhd_os_get_ioctl_resp_timeout(void) +unsigned int brcmf_os_get_ioctl_resp_timeout(void) { - return (unsigned int)dhd_ioctl_timeout_msec; + return (unsigned int)brcmf_ioctl_timeout_msec; } -void dhd_os_set_ioctl_resp_timeout(unsigned int timeout_msec) +void brcmf_os_set_ioctl_resp_timeout(unsigned int timeout_msec) { - dhd_ioctl_timeout_msec = (int)timeout_msec; + brcmf_ioctl_timeout_msec = (int)timeout_msec; } -int dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition, bool *pending) +int brcmf_os_ioctl_resp_wait(struct brcmf_pub *drvr, uint *condition, + bool *pending) { - dhd_info_t *dhd = (dhd_info_t *) (pub->info); + struct brcmf_info *drvr_priv = drvr->info; DECLARE_WAITQUEUE(wait, current); - int timeout = dhd_ioctl_timeout_msec; + int timeout = brcmf_ioctl_timeout_msec; /* Convert timeout in millsecond to jiffies */ timeout = timeout * HZ / 1000; /* Wait until control frame is available */ - add_wait_queue(&dhd->ioctl_resp_wait, &wait); + add_wait_queue(&drvr_priv->ioctl_resp_wait, &wait); set_current_state(TASK_INTERRUPTIBLE); while (!(*condition) && (!signal_pending(current) && timeout)) @@ -2447,366 +1633,59 @@ int dhd_os_ioctl_resp_wait(dhd_pub_t *pub, uint *condition, bool *pending) *pending = true; set_current_state(TASK_RUNNING); - remove_wait_queue(&dhd->ioctl_resp_wait, &wait); + remove_wait_queue(&drvr_priv->ioctl_resp_wait, &wait); return timeout; } -int dhd_os_ioctl_resp_wake(dhd_pub_t *pub) +int brcmf_os_ioctl_resp_wake(struct brcmf_pub *drvr) { - dhd_info_t *dhd = (dhd_info_t *) (pub->info); + struct brcmf_info *drvr_priv = drvr->info; - if (waitqueue_active(&dhd->ioctl_resp_wait)) - wake_up_interruptible(&dhd->ioctl_resp_wait); + if (waitqueue_active(&drvr_priv->ioctl_resp_wait)) + wake_up_interruptible(&drvr_priv->ioctl_resp_wait); return 0; } -void dhd_os_wd_timer(void *bus, uint wdtick) -{ - dhd_pub_t *pub = bus; - static uint save_dhd_watchdog_ms; - dhd_info_t *dhd = (dhd_info_t *) pub->info; - - /* don't start the wd until fw is loaded */ - if (pub->busstate == DHD_BUS_DOWN) - return; - - /* Totally stop the timer */ - if (!wdtick && dhd->wd_timer_valid == true) { - del_timer_sync(&dhd->timer); - dhd->wd_timer_valid = false; - save_dhd_watchdog_ms = wdtick; - return; - } - - if (wdtick) { - dhd_watchdog_ms = (uint) wdtick; - - if (save_dhd_watchdog_ms != dhd_watchdog_ms) { - - if (dhd->wd_timer_valid == true) - /* Stop timer and restart at new value */ - del_timer_sync(&dhd->timer); - - /* Create timer again when watchdog period is - dynamically changed or in the first instance - */ - dhd->timer.expires = - jiffies + dhd_watchdog_ms * HZ / 1000; - add_timer(&dhd->timer); - - } else { - /* Re arm the timer, at last watchdog period */ - mod_timer(&dhd->timer, - jiffies + dhd_watchdog_ms * HZ / 1000); - } - - dhd->wd_timer_valid = true; - save_dhd_watchdog_ms = wdtick; - } -} - -void *dhd_os_open_image(char *filename) -{ - struct file *fp; - - if (IS_CFG80211_FAVORITE() && !NO_FW_REQ()) - return wl_cfg80211_request_fw(filename); - - fp = filp_open(filename, O_RDONLY, 0); - /* - * 2.6.11 (FC4) supports filp_open() but later revs don't? - * Alternative: - * fp = open_namei(AT_FDCWD, filename, O_RD, 0); - * ??? - */ - if (IS_ERR(fp)) - fp = NULL; - - return fp; -} - -int dhd_os_get_image_block(char *buf, int len, void *image) -{ - struct file *fp = (struct file *)image; - int rdlen; - - if (IS_CFG80211_FAVORITE() && !NO_FW_REQ()) - return wl_cfg80211_read_fw(buf, len); - - if (!image) - return 0; - - rdlen = kernel_read(fp, fp->f_pos, buf, len); - if (rdlen > 0) - fp->f_pos += rdlen; - - return rdlen; -} - -void dhd_os_close_image(void *image) -{ - if (IS_CFG80211_FAVORITE() && !NO_FW_REQ()) - return wl_cfg80211_release_fw(); - if (image) - filp_close((struct file *)image, NULL); -} - -void dhd_os_sdlock(dhd_pub_t *pub) -{ - dhd_info_t *dhd; - - dhd = (dhd_info_t *) (pub->info); - - if (dhd->threads_only) - down(&dhd->sdsem); - else - spin_lock_bh(&dhd->sdlock); -} - -void dhd_os_sdunlock(dhd_pub_t *pub) -{ - dhd_info_t *dhd; - - dhd = (dhd_info_t *) (pub->info); - - if (dhd->threads_only) - up(&dhd->sdsem); - else - spin_unlock_bh(&dhd->sdlock); -} - -void dhd_os_sdlock_txq(dhd_pub_t *pub) -{ - dhd_info_t *dhd; - - dhd = (dhd_info_t *) (pub->info); - spin_lock_bh(&dhd->txqlock); -} - -void dhd_os_sdunlock_txq(dhd_pub_t *pub) -{ - dhd_info_t *dhd; - - dhd = (dhd_info_t *) (pub->info); - spin_unlock_bh(&dhd->txqlock); -} - -void dhd_os_sdlock_rxq(dhd_pub_t *pub) -{ -} - -void dhd_os_sdunlock_rxq(dhd_pub_t *pub) -{ -} - -void dhd_os_sdtxlock(dhd_pub_t *pub) -{ - dhd_os_sdlock(pub); -} - -void dhd_os_sdtxunlock(dhd_pub_t *pub) -{ - dhd_os_sdunlock(pub); -} - -static int -dhd_wl_host_event(dhd_info_t *dhd, int *ifidx, void *pktdata, - wl_event_msg_t *event, void **data) +static int brcmf_host_event(struct brcmf_info *drvr_priv, int *ifidx, void *pktdata, + struct brcmf_event_msg *event, void **data) { int bcmerror = 0; - ASSERT(dhd != NULL); - - bcmerror = wl_host_event(dhd, ifidx, pktdata, event, data); + bcmerror = brcmf_c_host_event(drvr_priv, ifidx, pktdata, event, data); if (bcmerror != 0) return bcmerror; -#if defined(CONFIG_WIRELESS_EXT) - if (!IS_CFG80211_FAVORITE()) { - if ((dhd->iflist[*ifidx] == NULL) - || (dhd->iflist[*ifidx]->net == NULL)) { - DHD_ERROR(("%s Exit null pointer\n", __func__)); - return bcmerror; - } - - if (dhd->iflist[*ifidx]->net) - wl_iw_event(dhd->iflist[*ifidx]->net, event, *data); - } -#endif /* defined(CONFIG_WIRELESS_EXT) */ - - if (IS_CFG80211_FAVORITE()) { - ASSERT(dhd->iflist[*ifidx] != NULL); - ASSERT(dhd->iflist[*ifidx]->net != NULL); - if (dhd->iflist[*ifidx]->net) - wl_cfg80211_event(dhd->iflist[*ifidx]->net, event, - *data); - } + if (drvr_priv->iflist[*ifidx]->net) + brcmf_cfg80211_event(drvr_priv->iflist[*ifidx]->net, + event, *data); return bcmerror; } -/* send up locally generated event */ -void dhd_sendup_event(dhd_pub_t *dhdp, wl_event_msg_t *event, void *data) -{ - switch (be32_to_cpu(event->event_type)) { - default: - break; - } -} - -void dhd_wait_for_event(dhd_pub_t *dhd, bool *lockvar) +int brcmf_netdev_reset(struct net_device *dev, u8 flag) { - struct dhd_info *dhdinfo = dhd->info; - dhd_os_sdunlock(dhd); - wait_event_interruptible_timeout(dhdinfo->ctrl_wait, - (*lockvar == false), HZ * 2); - dhd_os_sdlock(dhd); - return; -} + struct brcmf_info *drvr_priv = *(struct brcmf_info **)netdev_priv(dev); -void dhd_wait_event_wakeup(dhd_pub_t *dhd) -{ - struct dhd_info *dhdinfo = dhd->info; - if (waitqueue_active(&dhdinfo->ctrl_wait)) - wake_up_interruptible(&dhdinfo->ctrl_wait); - return; -} - -int dhd_dev_reset(struct net_device *dev, u8 flag) -{ - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); - - /* Turning off watchdog */ - if (flag) - dhd_os_wd_timer(&dhd->pub, 0); - - dhd_bus_devreset(&dhd->pub, flag); - - /* Turning on watchdog back */ - if (!flag) - dhd_os_wd_timer(&dhd->pub, dhd_watchdog_ms); - DHD_ERROR(("%s: WLAN OFF DONE\n", __func__)); + brcmf_bus_devreset(&drvr_priv->pub, flag); return 1; } -int net_os_set_suspend_disable(struct net_device *dev, int val) -{ - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); - int ret = 0; - - if (dhd) { - ret = dhd->pub.suspend_disable_flag; - dhd->pub.suspend_disable_flag = val; - } - return ret; -} - -int net_os_set_suspend(struct net_device *dev, int val) +static int brcmf_get_pend_8021x_cnt(struct brcmf_info *drvr_priv) { - int ret = 0; -#if defined(CONFIG_HAS_EARLYSUSPEND) - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); - - if (dhd) { - dhd_os_proto_block(&dhd->pub); - ret = dhd_set_suspend(val, &dhd->pub); - dhd_os_proto_unblock(&dhd->pub); - } -#endif /* defined(CONFIG_HAS_EARLYSUSPEND) */ - return ret; -} - -int net_os_set_dtim_skip(struct net_device *dev, int val) -{ - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(dev); - - if (dhd) - dhd->pub.dtim_skip = val; - - return 0; -} - -int net_os_set_packet_filter(struct net_device *dev, int val) -{ - dhd_info_t *dhd = *(dhd_info_t **) netdev_priv(dev); - int ret = 0; - - /* Packet filtering is set only if we still in early-suspend and - * we need either to turn it ON or turn it OFF - * We can always turn it OFF in case of early-suspend, but we turn it - * back ON only if suspend_disable_flag was not set - */ - if (dhd && dhd->pub.up) { - dhd_os_proto_block(&dhd->pub); - if (dhd->pub.in_suspend) { - if (!val || (val && !dhd->pub.suspend_disable_flag)) - dhd_set_packet_filter(val, &dhd->pub); - } - dhd_os_proto_unblock(&dhd->pub); - } - return ret; -} - -void dhd_dev_init_ioctl(struct net_device *dev) -{ - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); - - dhd_preinit_ioctls(&dhd->pub); -} - -#ifdef PNO_SUPPORT -/* Linux wrapper to call common dhd_pno_clean */ -int dhd_dev_pno_reset(struct net_device *dev) -{ - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); - - return dhd_pno_clean(&dhd->pub); -} - -/* Linux wrapper to call common dhd_pno_enable */ -int dhd_dev_pno_enable(struct net_device *dev, int pfn_enabled) -{ - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); - - return dhd_pno_enable(&dhd->pub, pfn_enabled); -} - -/* Linux wrapper to call common dhd_pno_set */ -int -dhd_dev_pno_set(struct net_device *dev, wlc_ssid_t *ssids_local, int nssid, - unsigned char scan_fr) -{ - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); - - return dhd_pno_set(&dhd->pub, ssids_local, nssid, scan_fr); -} - -/* Linux wrapper to get pno status */ -int dhd_dev_get_pno_status(struct net_device *dev) -{ - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); - - return dhd_pno_get_status(&dhd->pub); -} - -#endif /* PNO_SUPPORT */ - -static int dhd_get_pend_8021x_cnt(dhd_info_t *dhd) -{ - return atomic_read(&dhd->pend_8021x_cnt); + return atomic_read(&drvr_priv->pend_8021x_cnt); } #define MAX_WAIT_FOR_8021X_TX 10 -int dhd_wait_pend8021x(struct net_device *dev) +int brcmf_netdev_wait_pend8021x(struct net_device *dev) { - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(dev); + struct brcmf_info *drvr_priv = *(struct brcmf_info **)netdev_priv(dev); int timeout = 10 * HZ / 1000; int ntimes = MAX_WAIT_FOR_8021X_TX; - int pend = dhd_get_pend_8021x_cnt(dhd); + int pend = brcmf_get_pend_8021x_cnt(drvr_priv); while (ntimes && pend) { if (pend) { @@ -2815,20 +1694,13 @@ int dhd_wait_pend8021x(struct net_device *dev) set_current_state(TASK_RUNNING); ntimes--; } - pend = dhd_get_pend_8021x_cnt(dhd); + pend = brcmf_get_pend_8021x_cnt(drvr_priv); } return pend; } -void wl_os_wd_timer(struct net_device *ndev, uint wdtick) -{ - dhd_info_t *dhd = *(dhd_info_t **)netdev_priv(ndev); - - dhd_os_wd_timer(&dhd->pub, wdtick); -} - -#ifdef DHD_DEBUG -int write_to_file(dhd_pub_t *dhd, u8 *buf, int size) +#ifdef BCMDBG +int brcmf_write_to_file(struct brcmf_pub *drvr, u8 *buf, int size) { int ret = 0; struct file *fp; @@ -2842,7 +1714,7 @@ int write_to_file(dhd_pub_t *dhd, u8 *buf, int size) /* open file to write */ fp = filp_open("/tmp/mem_dump", O_WRONLY | O_CREAT, 0640); if (!fp) { - DHD_ERROR(("%s: open file error\n", __func__)); + BRCMF_ERROR(("%s: open file error\n", __func__)); ret = -1; goto exit; } @@ -2861,4 +1733,4 @@ exit: return ret; } -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_linux_sched.c b/drivers/staging/brcm80211/brcmfmac/dhd_linux_sched.c deleted file mode 100644 index c66f1c2941e..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/dhd_linux_sched.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/sched.h> - -int setScheduler(struct task_struct *p, int policy, struct sched_param *param) -{ - int rc = 0; - rc = sched_setscheduler(p, policy, param); - return rc; -} diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h index 030d5ffb0e8..ff788b37afd 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_proto.h +++ b/drivers/staging/brcm80211/brcmfmac/dhd_proto.h @@ -14,11 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _dhd_proto_h_ -#define _dhd_proto_h_ - -#include <dhdioctl.h> -#include <wlioctl.h> +#ifndef _BRCMF_PROTO_H_ +#define _BRCMF_PROTO_H_ #ifndef IOCTL_RESP_TIMEOUT #define IOCTL_RESP_TIMEOUT 2000 /* In milli second */ @@ -29,62 +26,50 @@ #endif /* - * Exported from the dhd protocol module (dhd_cdc, dhd_rndis) + * Exported from the brcmf protocol module (brcmf_cdc) */ /* Linkage, sets prot link and updates hdrlen in pub */ -extern int dhd_prot_attach(dhd_pub_t *dhdp); +extern int brcmf_proto_attach(struct brcmf_pub *drvr); -/* Unlink, frees allocated protocol memory (including dhd_prot) */ -extern void dhd_prot_detach(dhd_pub_t *dhdp); +/* Unlink, frees allocated protocol memory (including brcmf_proto) */ +extern void brcmf_proto_detach(struct brcmf_pub *drvr); /* Initialize protocol: sync w/dongle state. * Sets dongle media info (iswl, drv_version, mac address). */ -extern int dhd_prot_init(dhd_pub_t *dhdp); +extern int brcmf_proto_init(struct brcmf_pub *drvr); /* Stop protocol: sync w/dongle state. */ -extern void dhd_prot_stop(dhd_pub_t *dhdp); +extern void brcmf_proto_stop(struct brcmf_pub *drvr); /* Add any protocol-specific data header. * Caller must reserve prot_hdrlen prepend space. */ -extern void dhd_prot_hdrpush(dhd_pub_t *, int ifidx, struct sk_buff *txp); +extern void brcmf_proto_hdrpush(struct brcmf_pub *, int ifidx, + struct sk_buff *txp); /* Remove any protocol-specific data header. */ -extern int dhd_prot_hdrpull(dhd_pub_t *, int *ifidx, struct sk_buff *rxp); +extern int brcmf_proto_hdrpull(struct brcmf_pub *, int *ifidx, + struct sk_buff *rxp); /* Use protocol to issue ioctl to dongle */ -extern int dhd_prot_ioctl(dhd_pub_t *dhd, int ifidx, wl_ioctl_t *ioc, - void *buf, int len); - -/* Check for and handle local prot-specific iovar commands */ -extern int dhd_prot_iovar_op(dhd_pub_t *dhdp, const char *name, - void *params, int plen, void *arg, int len, - bool set); +extern int brcmf_proto_ioctl(struct brcmf_pub *drvr, int ifidx, + struct brcmf_ioctl *ioc, void *buf, int len); /* Add prot dump output to a buffer */ -extern void dhd_prot_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf); +extern void brcmf_proto_dump(struct brcmf_pub *drvr, + struct brcmu_strbuf *strbuf); /* Update local copy of dongle statistics */ -extern void dhd_prot_dstats(dhd_pub_t *dhdp); +extern void brcmf_proto_dstats(struct brcmf_pub *drvr); -extern int dhd_ioctl(dhd_pub_t *dhd_pub, dhd_ioctl_t *ioc, void *buf, - uint buflen); +extern int brcmf_c_ioctl(struct brcmf_pub *drvr, struct brcmf_c_ioctl *ioc, + void *buf, uint buflen); -extern int dhd_preinit_ioctls(dhd_pub_t *dhd); +extern int brcmf_c_preinit_ioctls(struct brcmf_pub *drvr); -/******************************** - * For version-string expansion * - */ -#if defined(BDC) -#define DHD_PROTOCOL "bdc" -#elif defined(CDC) -#define DHD_PROTOCOL "cdc" -#elif defined(RNDIS) -#define DHD_PROTOCOL "rndis" -#else -#define DHD_PROTOCOL "unknown" -#endif /* proto */ - -#endif /* _dhd_proto_h_ */ +extern int brcmf_proto_cdc_set_ioctl(struct brcmf_pub *drvr, int ifidx, + uint cmd, void *buf, uint len); + +#endif /* _BRCMF_PROTO_H_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c index a71c6f8ee8a..7fa95b6213c 100644 --- a/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c +++ b/drivers/staging/brcm80211/brcmfmac/dhd_sdio.c @@ -16,47 +16,145 @@ #include <linux/types.h> #include <linux/kernel.h> +#include <linux/kthread.h> #include <linux/printk.h> #include <linux/pci_ids.h> #include <linux/netdevice.h> -#include <bcmdefs.h> -#include <bcmsdh.h> - -#ifdef BCMEMBEDIMAGE -#include BCMEMBEDIMAGE -#endif /* BCMEMBEDIMAGE */ - -#include <bcmdefs.h> -#include <bcmutils.h> -#include <bcmdevs.h> - -#include <hndsoc.h> -#ifdef DHD_DEBUG -#include <hndrte_armtrap.h> -#include <hndrte_cons.h> -#endif /* DHD_DEBUG */ -#include <sbchipc.h> -#include <sbhnddma.h> - -#include <sdio.h> -#include <sbsdio.h> -#include <sbsdpcmdev.h> -#include <bcmsdpcm.h> - -#include <proto/802.11.h> - -#include <dngl_stats.h> -#include <dhd.h> -#include <dhd_bus.h> -#include <dhd_proto.h> -#include <dhd_dbg.h> -#include <dhdioctl.h> -#include <sdiovar.h> -#include <bcmchip.h> +#include <linux/interrupt.h> +#include <linux/sched.h> +#include <linux/mmc/sdio.h> +#include <linux/mmc/sdio_func.h> +#include <linux/semaphore.h> +#include <linux/firmware.h> +#include <asm/unaligned.h> +#include <defs.h> +#include <brcmu_wifi.h> +#include <brcmu_utils.h> +#include <brcm_hw_ids.h> +#include <soc.h> +#include "sdio_host.h" + +/* register access macros */ +#ifndef __BIG_ENDIAN +#ifndef __mips__ +#define R_REG(r, typ) \ + brcmf_sdcard_reg_read(NULL, (r), sizeof(typ)) +#else /* __mips__ */ +#define R_REG(r, typ) \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + __osl_v = brcmf_sdcard_reg_read(NULL, (r),\ + sizeof(typ)); \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + }) +#endif /* __mips__ */ + +#else /* __BIG_ENDIAN */ +#define R_REG(r, typ) \ + brcmf_sdcard_reg_read(NULL, (r), sizeof(typ)) +#endif /* __BIG_ENDIAN */ + +#define OR_REG(r, v, typ) \ + brcmf_sdcard_reg_write(NULL, (r), sizeof(typ), R_REG(r, typ) | (v)) + +#ifdef BCMDBG + +/* ARM trap handling */ + +/* Trap types defined by ARM (see arminc.h) */ + +#if defined(__ARM_ARCH_4T__) +#define MAX_TRAP_TYPE (TR_FIQ + 1) +#elif defined(__ARM_ARCH_7M__) +#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) +#endif /* __ARM_ARCH_7M__ */ + +/* The trap structure is defined here as offsets for assembly */ +#define TR_TYPE 0x00 +#define TR_EPC 0x04 +#define TR_CPSR 0x08 +#define TR_SPSR 0x0c +#define TR_REGS 0x10 +#define TR_REG(n) (TR_REGS + (n) * 4) +#define TR_SP TR_REG(13) +#define TR_LR TR_REG(14) +#define TR_PC TR_REG(15) + +#define TRAP_T_SIZE 80 + +struct brcmf_trap { + u32 type; + u32 epc; + u32 cpsr; + u32 spsr; + u32 r0; + u32 r1; + u32 r2; + u32 r3; + u32 r4; + u32 r5; + u32 r6; + u32 r7; + u32 r8; + u32 r9; + u32 r10; + u32 r11; + u32 r12; + u32 r13; + u32 r14; + u32 pc; +}; -#ifndef DHDSDIO_MEM_DUMP_FNAME -#define DHDSDIO_MEM_DUMP_FNAME "mem_dump" -#endif +#define CBUF_LEN (128) + +struct rte_log { + u32 buf; /* Can't be pointer on (64-bit) hosts */ + uint buf_size; + uint idx; + char *_buf_compat; /* Redundant pointer for backward compat. */ +}; + +struct rte_console { + /* Virtual UART + * When there is no UART (e.g. Quickturn), + * the host should write a complete + * input line directly into cbuf and then write + * the length into vcons_in. + * This may also be used when there is a real UART + * (at risk of conflicting with + * the real UART). vcons_out is currently unused. + */ + volatile uint vcons_in; + volatile uint vcons_out; + + /* Output (logging) buffer + * Console output is written to a ring buffer log_buf at index log_idx. + * The host may read the output when it sees log_idx advance. + * Output will be lost if the output wraps around faster than the host + * polls. + */ + struct rte_log log; + + /* Console input line buffer + * Characters are read one at a time into cbuf + * until <CR> is received, then + * the buffer is processed as a command line. + * Also used for virtual UART. + */ + uint cbuf_idx; + char cbuf[CBUF_LEN]; +}; + +#endif /* BCMDBG */ +#include <chipcommon.h> + +#include "dhd.h" +#include "dhd_bus.h" +#include "dhd_proto.h" +#include "dhd_dbg.h" +#include <bcmchip.h> #define TXQLEN 2048 /* bulk tx queue length */ #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */ @@ -65,47 +163,239 @@ #define TXRETRIES 2 /* # of retries for tx frames */ -#if defined(CONFIG_MACH_SANDGATE2G) -#define DHD_RXBOUND 250 /* Default for max rx frames in +#define BRCMF_RXBOUND 50 /* Default for max rx frames in one scheduling */ -#else -#define DHD_RXBOUND 50 /* Default for max rx frames in - one scheduling */ -#endif /* defined(CONFIG_MACH_SANDGATE2G) */ -#define DHD_TXBOUND 20 /* Default for max tx frames in +#define BRCMF_TXBOUND 20 /* Default for max tx frames in one scheduling */ -#define DHD_TXMINMAX 1 /* Max tx frames if rx still pending */ +#define BRCMF_TXMINMAX 1 /* Max tx frames if rx still pending */ #define MEMBLOCK 2048 /* Block size used for downloading of dongle image */ #define MAX_DATA_BUF (32 * 1024) /* Must be large enough to hold biggest possible glom */ -/* Packet alignment for most efficient SDIO (can change based on platform) */ -#ifndef DHD_SDALIGN -#define DHD_SDALIGN 32 -#endif -#if !ISPOWEROF2(DHD_SDALIGN) -#error DHD_SDALIGN is not a power of 2! +#ifndef BRCMF_FIRSTREAD +#define BRCMF_FIRSTREAD 32 #endif -#ifndef DHD_FIRSTREAD -#define DHD_FIRSTREAD 32 -#endif -#if !ISPOWEROF2(DHD_FIRSTREAD) -#error DHD_FIRSTREAD is not a power of 2! +#if !ISPOWEROF2(BRCMF_FIRSTREAD) +#error BRCMF_FIRSTREAD is not a power of 2! #endif +/* SBSDIO_DEVICE_CTL */ +#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when + * receiving CMD53 + */ +#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is + * synchronous to the sdio clock + */ +#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host + * except the chipActive (rev 8) + */ +#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put + * external pads in tri-state; requires + * sdio bus power cycle to clear (rev 9) + */ +#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */ +#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */ +#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */ +#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */ + +/* SBSDIO_FUNC1_CHIPCLKCSR */ +#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */ +#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */ +#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */ +#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */ +#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */ +#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */ +#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */ +#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */ + +#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL) +#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS) +#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS) +#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval)) +#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \ + (alponly ? 1 : SBSDIO_HTAV(regval))) +/* direct(mapped) cis space */ +#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */ +#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */ +#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */ + +#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple, + * link bytes + */ + +/* intstatus */ +#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ +#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ +#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ +#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ +#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ +#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ +#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ +#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ +#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ +#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ +#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ +#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ +#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ +#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ +#define I_PC (1 << 10) /* descriptor error */ +#define I_PD (1 << 11) /* data error */ +#define I_DE (1 << 12) /* Descriptor protocol Error */ +#define I_RU (1 << 13) /* Receive descriptor Underflow */ +#define I_RO (1 << 14) /* Receive fifo Overflow */ +#define I_XU (1 << 15) /* Transmit fifo Underflow */ +#define I_RI (1 << 16) /* Receive Interrupt */ +#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ +#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ +#define I_XI (1 << 24) /* Transmit Interrupt */ +#define I_RF_TERM (1 << 25) /* Read Frame Terminate */ +#define I_WF_TERM (1 << 26) /* Write Frame Terminate */ +#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ +#define I_SBINT (1 << 28) /* sbintstatus Interrupt */ +#define I_CHIPACTIVE (1 << 29) /* chip from doze to active state */ +#define I_SRESET (1 << 30) /* CCCR RES interrupt */ +#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ +#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) +#define I_DMA (I_RI | I_XI | I_ERRORS) + +/* corecontrol */ +#define CC_CISRDY (1 << 0) /* CIS Ready */ +#define CC_BPRESEN (1 << 1) /* CCCR RES signal */ +#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ +#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation */ +#define CC_XMTDATAAVAIL_MODE (1 << 4) +#define CC_XMTDATAAVAIL_CTRL (1 << 5) + +/* SDA_FRAMECTRL */ +#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ +#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ +#define SFC_CRC4WOOS (1 << 2) /* CRC error for write out of sync */ +#define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */ + +/* HW frame tag */ +#define SDPCM_FRAMETAG_LEN 4 /* 2 bytes len, 2 bytes check val */ + /* Total length of frame header for dongle protocol */ #define SDPCM_HDRLEN (SDPCM_FRAMETAG_LEN + SDPCM_SWHEADER_LEN) #ifdef SDTEST -#define SDPCM_RESERVE (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + DHD_SDALIGN) +#define SDPCM_RESERVE (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN) #else -#define SDPCM_RESERVE (SDPCM_HDRLEN + DHD_SDALIGN) +#define SDPCM_RESERVE (SDPCM_HDRLEN + BRCMF_SDALIGN) #endif +/* + * Software allocation of To SB Mailbox resources + */ + +/* tosbmailbox bits corresponding to intstatus bits */ +#define SMB_NAK (1 << 0) /* Frame NAK */ +#define SMB_INT_ACK (1 << 1) /* Host Interrupt ACK */ +#define SMB_USE_OOB (1 << 2) /* Use OOB Wakeup */ +#define SMB_DEV_INT (1 << 3) /* Miscellaneous Interrupt */ + +/* tosbmailboxdata */ +#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version */ + +/* + * Software allocation of To Host Mailbox resources + */ + +/* intstatus bits */ +#define I_HMB_FC_STATE I_HMB_SW0 /* Flow Control State */ +#define I_HMB_FC_CHANGE I_HMB_SW1 /* Flow Control State Changed */ +#define I_HMB_FRAME_IND I_HMB_SW2 /* Frame Indication */ +#define I_HMB_HOST_INT I_HMB_SW3 /* Miscellaneous Interrupt */ + +/* tohostmailboxdata */ +#define HMB_DATA_NAKHANDLED 1 /* retransmit NAK'd frame */ +#define HMB_DATA_DEVREADY 2 /* talk to host after enable */ +#define HMB_DATA_FC 4 /* per prio flowcontrol update flag */ +#define HMB_DATA_FWREADY 8 /* fw ready for protocol activity */ + +#define HMB_DATA_FCDATA_MASK 0xff000000 +#define HMB_DATA_FCDATA_SHIFT 24 + +#define HMB_DATA_VERSION_MASK 0x00ff0000 +#define HMB_DATA_VERSION_SHIFT 16 + +/* + * Software-defined protocol header + */ + +/* Current protocol version */ +#define SDPCM_PROT_VERSION 4 + +/* SW frame header */ +#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) + +#define SDPCM_CHANNEL_MASK 0x00000f00 +#define SDPCM_CHANNEL_SHIFT 8 +#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) + +#define SDPCM_NEXTLEN_OFFSET 2 + +/* Data Offset from SOF (HW Tag, SW Tag, Pad) */ +#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ +#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) +#define SDPCM_DOFFSET_MASK 0xff000000 +#define SDPCM_DOFFSET_SHIFT 24 +#define SDPCM_FCMASK_OFFSET 4 /* Flow control */ +#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) +#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ +#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) + +#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ + +/* logical channel numbers */ +#define SDPCM_CONTROL_CHANNEL 0 /* Control channel Id */ +#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ +#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ +#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets */ +#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ + +#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for 8bit frame seq */ + +#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) + +/* For TEST_CHANNEL packets, define another 4-byte header */ +#define SDPCM_TEST_HDRLEN 4 /* + * Generally: Cmd(1), Ext(1), Len(2); + * Semantics of Ext byte depend on + * command. Len is current or requested + * frame length, not including test + * header; sent little-endian. + */ +#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext:pattern id. */ +#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext:pattern id. */ +#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext:pattern id. */ +#define SDPCM_TEST_BURST 0x04 /* + * Receiver to send a burst. + * Ext is a frame count + */ +#define SDPCM_TEST_SEND 0x05 /* + * Receiver sets send mode. + * Ext is boolean on/off + */ + +/* Handy macro for filling in datagen packets with a pattern */ +#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno)) + +/* + * Shared structure between dongle and the host. + * The structure contains pointers to trap or assert information. + */ +#define SDPCM_SHARED_VERSION 0x0002 +#define SDPCM_SHARED_VERSION_MASK 0x00FF +#define SDPCM_SHARED_ASSERT_BUILT 0x0100 +#define SDPCM_SHARED_ASSERT 0x0200 +#define SDPCM_SHARED_TRAP 0x0400 + + /* Space for header read, limit for data packets */ #ifndef MAX_HDR_READ #define MAX_HDR_READ 32 @@ -117,7 +407,7 @@ #define MAX_RX_DATASZ 2048 /* Maximum milliseconds to wait for F2 to come up */ -#define DHD_WAIT_F2RDY 3000 +#define BRCMF_WAIT_F2RDY 3000 /* Bump up limit on waiting for HT to account for first startup; * if the image is doing a CRC calculation before programming the PMU @@ -130,13 +420,48 @@ #endif /* Value for ChipClockCSR during initial setup */ -#define DHD_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \ +#define BRCMF_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \ SBSDIO_ALP_AVAIL_REQ) -#define DHD_INIT_CLKCTL2 (SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP) /* Flags for SDH calls */ #define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED) +/* sbimstate */ +#define SBIM_IBE 0x20000 /* inbanderror */ +#define SBIM_TO 0x40000 /* timeout */ +#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */ +#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */ + +/* sbtmstatelow */ +#define SBTML_RESET 0x0001 /* reset */ +#define SBTML_REJ_MASK 0x0006 /* reject field */ +#define SBTML_REJ 0x0002 /* reject */ +#define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */ + +#define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */ + +/* sbtmstatehigh */ +#define SBTMH_SERR 0x0001 /* serror */ +#define SBTMH_INT 0x0002 /* interrupt */ +#define SBTMH_BUSY 0x0004 /* busy */ +#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */ + +#define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */ + +/* sbidlow */ +#define SBIDL_INIT 0x80 /* initiator */ + +/* sbidhigh */ +#define SBIDH_RC_MASK 0x000f /* revision code */ +#define SBIDH_RCE_MASK 0x7000 /* revision code extension field */ +#define SBIDH_RCE_SHIFT 8 +#define SBCOREREV(sbidh) \ + ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK)) +#define SBIDH_CC_MASK 0x8ff0 /* core code */ +#define SBIDH_CC_SHIFT 4 +#define SBIDH_VC_MASK 0xffff0000 /* vendor code */ +#define SBIDH_VC_SHIFT 16 + /* * Conversion of 802.1D priority to precedence level */ @@ -144,21 +469,130 @@ (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? \ ((prio^2)) : (prio)) -DHD_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep); -extern int dhdcdc_set_ioctl(dhd_pub_t *dhd, int ifidx, uint cmd, void *buf, - uint len); +BRCMF_SPINWAIT_SLEEP_INIT(sdioh_spinwait_sleep); + +/* + * Core reg address translation. + * Both macro's returns a 32 bits byte address on the backplane bus. + */ +#define CORE_CC_REG(base, field) (base + offsetof(chipcregs_t, field)) +#define CORE_BUS_REG(base, field) \ + (base + offsetof(struct sdpcmd_regs, field)) +#define CORE_SB(base, field) \ + (base + SBCONFIGOFF + offsetof(struct sbconfig, field)) + +/* core registers */ +struct sdpcmd_regs { + u32 corecontrol; /* 0x00, rev8 */ + u32 corestatus; /* rev8 */ + u32 PAD[1]; + u32 biststatus; /* rev8 */ + + /* PCMCIA access */ + u16 pcmciamesportaladdr; /* 0x010, rev8 */ + u16 PAD[1]; + u16 pcmciamesportalmask; /* rev8 */ + u16 PAD[1]; + u16 pcmciawrframebc; /* rev8 */ + u16 PAD[1]; + u16 pcmciaunderflowtimer; /* rev8 */ + u16 PAD[1]; + + /* interrupt */ + u32 intstatus; /* 0x020, rev8 */ + u32 hostintmask; /* rev8 */ + u32 intmask; /* rev8 */ + u32 sbintstatus; /* rev8 */ + u32 sbintmask; /* rev8 */ + u32 funcintmask; /* rev4 */ + u32 PAD[2]; + u32 tosbmailbox; /* 0x040, rev8 */ + u32 tohostmailbox; /* rev8 */ + u32 tosbmailboxdata; /* rev8 */ + u32 tohostmailboxdata; /* rev8 */ + + /* synchronized access to registers in SDIO clock domain */ + u32 sdioaccess; /* 0x050, rev8 */ + u32 PAD[3]; + + /* PCMCIA frame control */ + u8 pcmciaframectrl; /* 0x060, rev8 */ + u8 PAD[3]; + u8 pcmciawatermark; /* rev8 */ + u8 PAD[155]; + + /* interrupt batching control */ + u32 intrcvlazy; /* 0x100, rev8 */ + u32 PAD[3]; + + /* counters */ + u32 cmd52rd; /* 0x110, rev8 */ + u32 cmd52wr; /* rev8 */ + u32 cmd53rd; /* rev8 */ + u32 cmd53wr; /* rev8 */ + u32 abort; /* rev8 */ + u32 datacrcerror; /* rev8 */ + u32 rdoutofsync; /* rev8 */ + u32 wroutofsync; /* rev8 */ + u32 writebusy; /* rev8 */ + u32 readwait; /* rev8 */ + u32 readterm; /* rev8 */ + u32 writeterm; /* rev8 */ + u32 PAD[40]; + u32 clockctlstatus; /* rev8 */ + u32 PAD[7]; + + u32 PAD[128]; /* DMA engines */ + + /* SDIO/PCMCIA CIS region */ + char cis[512]; /* 0x400-0x5ff, rev6 */ + + /* PCMCIA function control registers */ + char pcmciafcr[256]; /* 0x600-6ff, rev6 */ + u16 PAD[55]; + + /* PCMCIA backplane access */ + u16 backplanecsr; /* 0x76E, rev6 */ + u16 backplaneaddr0; /* rev6 */ + u16 backplaneaddr1; /* rev6 */ + u16 backplaneaddr2; /* rev6 */ + u16 backplaneaddr3; /* rev6 */ + u16 backplanedata0; /* rev6 */ + u16 backplanedata1; /* rev6 */ + u16 backplanedata2; /* rev6 */ + u16 backplanedata3; /* rev6 */ + u16 PAD[31]; + + /* sprom "size" & "blank" info */ + u16 spromstatus; /* 0x7BE, rev2 */ + u32 PAD[464]; + + u16 PAD[0x80]; +}; -#ifdef DHD_DEBUG +#ifdef BCMDBG /* Device console log buffer state */ -typedef struct dhd_console { +struct brcmf_console { uint count; /* Poll interval msec counter */ uint log_addr; /* Log struct address (fixed) */ - hndrte_log_t log; /* Log struct (host copy) */ + struct rte_log log; /* Log struct (host copy) */ uint bufsize; /* Size of log buffer */ u8 *buf; /* Log buffer (host copy) */ uint last; /* Last buffer read index */ -} dhd_console_t; -#endif /* DHD_DEBUG */ +}; +#endif /* BCMDBG */ + +struct sdpcm_shared { + u32 flags; + u32 trap_addr; + u32 assert_exp_addr; + u32 assert_file_addr; + u32 assert_line; + u32 console_addr; /* Address of struct rte_console */ + u32 msgtrace_addr; + u8 tag[32]; +}; + /* misc chip info needed by some of the routines */ struct chip_info { @@ -167,7 +601,7 @@ struct chip_info { u32 cccorebase; u32 ccrev; u32 cccaps; - u32 buscorebase; + u32 buscorebase; /* 32 bits backplane bus address */ u32 buscorerev; u32 buscoretype; u32 ramcorebase; @@ -177,19 +611,14 @@ struct chip_info { }; /* Private data for SDIO bus interaction */ -typedef struct dhd_bus { - dhd_pub_t *dhd; +struct brcmf_bus { + struct brcmf_pub *drvr; - bcmsdh_info_t *sdh; /* Handle for BCMSDH calls */ + struct brcmf_sdio_card *card; /* Handle for sdio card calls */ struct chip_info *ci; /* Chip info struct */ char *vars; /* Variables (from CIS and/or other) */ uint varsz; /* Size of variables buffer */ - u32 sbaddr; /* Current SB window pointer (-1, invalid) */ - sdpcmd_regs_t *regs; /* Registers for SDIO core */ - uint sdpcmrev; /* SDIO core revision */ - uint armrev; /* CPU core revision */ - uint ramrev; /* SOCRAM core revision */ u32 ramsize; /* Size of RAM in SOCRAM (bytes) */ u32 orig_ramsize; /* Size of RAM in SOCRAM (bytes) */ @@ -199,10 +628,7 @@ typedef struct dhd_bus { bool dpc_sched; /* Indicates DPC schedule (intrpt rcvd) */ bool fcstate; /* State of dongle flow-control */ - u16 cl_devid; /* cached devid for dhdsdio_probe_attach() */ - char *fw_path; /* module_param: path to firmware image */ - char *nv_path; /* module_param: path to nvram vars file */ - const char *nvram_params; /* user specified nvram params. */ + u16 cl_devid; /* cached devid for brcmf_sdio_probe_attach() */ uint blocksize; /* Block size of SDIO transfers */ uint roundup; /* Max roundup limit */ @@ -212,7 +638,7 @@ typedef struct dhd_bus { u8 tx_seq; /* Transmit sequence number (next) */ u8 tx_max; /* Maximum transmit sequence allowed */ - u8 hdrbuf[MAX_HDR_READ + DHD_SDALIGN]; + u8 hdrbuf[MAX_HDR_READ + BRCMF_SDALIGN]; u8 *rxhdr; /* Header of current rx frame (in hdrbuf) */ u16 nextlen; /* Next Read Len from last header */ u8 rx_seq; /* Receive sequence number (expected) */ @@ -242,27 +668,23 @@ typedef struct dhd_bus { uint polltick; /* Tick counter */ uint pollcnt; /* Count of active polls */ -#ifdef DHD_DEBUG - dhd_console_t console; /* Console output polling support */ +#ifdef BCMDBG + struct brcmf_console console; /* Console output polling support */ uint console_addr; /* Console address from shared struct */ -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ - uint regfails; /* Count of R_REG/W_REG failures */ + uint regfails; /* Count of R_REG failures */ uint clkstate; /* State of sd and backplane clock(s) */ bool activity; /* Activity flag for clock down */ s32 idletime; /* Control for activity timeout */ s32 idlecount; /* Activity timeout counter */ s32 idleclock; /* How to set bus driver when idle */ - s32 sd_divisor; /* Speed control to bus driver */ - s32 sd_mode; /* Mode control to bus driver */ - s32 sd_rxchain; /* If bcmsdh api accepts PKT chains */ - bool use_rxchain; /* If dhd should use PKT chains */ + s32 sd_rxchain; + bool use_rxchain; /* If brcmf should use PKT chains */ bool sleeping; /* Is SDIO bus sleeping? */ bool rxflow_mode; /* Rx flow control mode */ bool rxflow; /* Is rx flow control on */ - uint prev_rxlim_hit; /* Is prev rx limit exceeded - (per dpc schedule) */ bool alp_only; /* Don't use HT clock (ALP only) */ /* Field to decide if rx of control frames happen in rxbuf or lb-pool */ bool usebufpool; @@ -314,7 +736,68 @@ typedef struct dhd_bus { u8 *ctrl_frame_buf; u32 ctrl_frame_len; bool ctrl_frame_stat; -} dhd_bus_t; + + spinlock_t txqlock; + wait_queue_head_t ctrl_wait; + + struct timer_list timer; + struct completion watchdog_wait; + struct task_struct *watchdog_tsk; + bool wd_timer_valid; + + struct tasklet_struct tasklet; + struct task_struct *dpc_tsk; + struct completion dpc_wait; + + bool threads_only; + struct semaphore sdsem; + spinlock_t sdlock; + + const char *fw_name; + const struct firmware *firmware; + const char *nv_name; + u32 fw_ptr; +}; + +struct sbconfig { + u32 PAD[2]; + u32 sbipsflag; /* initiator port ocp slave flag */ + u32 PAD[3]; + u32 sbtpsflag; /* target port ocp slave flag */ + u32 PAD[11]; + u32 sbtmerrloga; /* (sonics >= 2.3) */ + u32 PAD; + u32 sbtmerrlog; /* (sonics >= 2.3) */ + u32 PAD[3]; + u32 sbadmatch3; /* address match3 */ + u32 PAD; + u32 sbadmatch2; /* address match2 */ + u32 PAD; + u32 sbadmatch1; /* address match1 */ + u32 PAD[7]; + u32 sbimstate; /* initiator agent state */ + u32 sbintvec; /* interrupt mask */ + u32 sbtmstatelow; /* target state */ + u32 sbtmstatehigh; /* target state */ + u32 sbbwa0; /* bandwidth allocation table0 */ + u32 PAD; + u32 sbimconfiglow; /* initiator configuration */ + u32 sbimconfighigh; /* initiator configuration */ + u32 sbadmatch0; /* address match0 */ + u32 PAD; + u32 sbtmconfiglow; /* target configuration */ + u32 sbtmconfighigh; /* target configuration */ + u32 sbbconfig; /* broadcast configuration */ + u32 PAD; + u32 sbbstate; /* broadcast state */ + u32 PAD[3]; + u32 sbactcnfg; /* activate configuration */ + u32 PAD[3]; + u32 sbflagst; /* current sbflags */ + u32 PAD[3]; + u32 sbidlow; /* identification */ + u32 sbidhigh; /* identification */ +}; /* clkstate */ #define CLK_NONE 0 @@ -322,29 +805,45 @@ typedef struct dhd_bus { #define CLK_PENDING 2 /* Not used yet */ #define CLK_AVAIL 3 -#define DHD_NOPMU(dhd) (false) +#define BRCMF_NOPMU(brcmf) (false) -#ifdef DHD_DEBUG +#ifdef BCMDBG static int qcount[NUMPRIO]; static int tx_packets[NUMPRIO]; -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ /* Deferred transmit */ -const uint dhd_deferred_tx = 1; +uint brcmf_deferred_tx = 1; +module_param(brcmf_deferred_tx, uint, 0); + +/* Watchdog thread priority, -1 to use kernel timer */ +int brcmf_watchdog_prio = 97; +module_param(brcmf_watchdog_prio, int, 0); -extern uint dhd_watchdog_ms; -extern void dhd_os_wd_timer(void *bus, uint wdtick); +/* Watchdog interval */ +uint brcmf_watchdog_ms = 10; +module_param(brcmf_watchdog_ms, uint, 0); + +/* DPC thread priority, -1 to use tasklet */ +int brcmf_dpc_prio = 98; +module_param(brcmf_dpc_prio, int, 0); + +#ifdef BCMDBG +/* Console poll interval */ +uint brcmf_console_ms; +module_param(brcmf_console_ms, uint, 0); +#endif /* BCMDBG */ /* Tx/Rx bounds */ -uint dhd_txbound; -uint dhd_rxbound; -uint dhd_txminmax; +uint brcmf_txbound; +uint brcmf_rxbound; +uint brcmf_txminmax; /* override the RAM size if possible */ #define DONGLE_MIN_MEMSIZE (128 * 1024) -int dhd_dongle_memsize; +int brcmf_dongle_memsize; -static bool dhd_alignctl; +static bool brcmf_alignctl; static bool sd1idle; @@ -352,9 +851,7 @@ static bool retrydata; #define RETRYCHAN(chan) (((chan) == SDPCM_EVENT_CHANNEL) || retrydata) static const uint watermark = 8; -static const uint firstread = DHD_FIRSTREAD; - -#define HDATLEN (firstread - (SDPCM_HDRLEN)) +static const uint firstread = BRCMF_FIRSTREAD; /* Retry count for register access failures */ static const uint retry_limit = 2; @@ -364,20 +861,11 @@ static bool forcealign; #define ALIGNMENT 4 -#if defined(OOB_INTR_ONLY) && defined(HW_OOB) -extern void bcmsdh_enable_hw_oob_intr(void *sdh, bool enable); -#endif - -#if defined(OOB_INTR_ONLY) && defined(SDIO_ISR_THREAD) -#error OOB_INTR_ONLY is NOT working with SDIO_ISR_THREAD -#endif /* defined(OOB_INTR_ONLY) && defined(SDIO_ISR_THREAD) */ #define PKTALIGN(_p, _len, _align) \ do { \ uint datalign; \ datalign = (unsigned long)((_p)->data); \ datalign = roundup(datalign, (_align)) - datalign; \ - ASSERT(datalign < (_align)); \ - ASSERT((_p)->len >= ((_len) + datalign)); \ if (datalign) \ skb_pull((_p), datalign); \ __skb_trim((_p), (_len)); \ @@ -387,146 +875,166 @@ extern void bcmsdh_enable_hw_oob_intr(void *sdh, bool enable); static const uint max_roundup = 512; /* Try doing readahead */ -static bool dhd_readahead; +static bool brcmf_readahead; /* To check if there's window offered */ #define DATAOK(bus) \ (((u8)(bus->tx_max - bus->tx_seq) != 0) && \ (((u8)(bus->tx_max - bus->tx_seq) & 0x80) == 0)) -/* Macros to get register read/write status */ -/* NOTE: these assume a local dhdsdio_bus_t *bus! */ -#define R_SDREG(regvar, regaddr, retryvar) \ -do { \ - retryvar = 0; \ - do { \ - regvar = R_REG(regaddr); \ - } while (bcmsdh_regfail(bus->sdh) && (++retryvar <= retry_limit)); \ - if (retryvar) { \ - bus->regfails += (retryvar-1); \ - if (retryvar > retry_limit) { \ - DHD_ERROR(("%s: FAILED" #regvar "READ, LINE %d\n", \ - __func__, __LINE__)); \ - regvar = 0; \ - } \ - } \ -} while (0) - -#define W_SDREG(regval, regaddr, retryvar) \ -do { \ - retryvar = 0; \ - do { \ - W_REG(regaddr, regval); \ - } while (bcmsdh_regfail(bus->sdh) && (++retryvar <= retry_limit)); \ - if (retryvar) { \ - bus->regfails += (retryvar-1); \ - if (retryvar > retry_limit) \ - DHD_ERROR(("%s: FAILED REGISTER WRITE, LINE %d\n", \ - __func__, __LINE__)); \ - } \ -} while (0) - -#define DHD_BUS SDIO_BUS +/* + * Reads a register in the SDIO hardware block. This block occupies a series of + * adresses on the 32 bit backplane bus. + */ +static void +r_sdreg32(struct brcmf_bus *bus, u32 *regvar, u32 reg_offset, u32 *retryvar) +{ + *retryvar = 0; + do { + *regvar = R_REG(bus->ci->buscorebase + reg_offset, u32); + } while (brcmf_sdcard_regfail(bus->card) && + (++(*retryvar) <= retry_limit)); + if (*retryvar) { + bus->regfails += (*retryvar-1); + if (*retryvar > retry_limit) { + BRCMF_ERROR(("FAILED READ %Xh\n", reg_offset)); + *regvar = 0; + } + } +} + +static void +w_sdreg32(struct brcmf_bus *bus, u32 regval, u32 reg_offset, u32 *retryvar) +{ + *retryvar = 0; + do { + brcmf_sdcard_reg_write(NULL, bus->ci->buscorebase + reg_offset, + sizeof(u32), regval); + } while (brcmf_sdcard_regfail(bus->card) && + (++(*retryvar) <= retry_limit)); + if (*retryvar) { + bus->regfails += (*retryvar-1); + if (*retryvar > retry_limit) + BRCMF_ERROR(("FAILED REGISTER WRITE" + " %Xh\n", reg_offset)); + } +} + +#define BRCMF_BUS SDIO_BUS #define PKT_AVAILABLE() (intstatus & I_HMB_FRAME_IND) #define HOSTINTMASK (I_HMB_SW_MASK | I_CHIPACTIVE) #ifdef SDTEST -static void dhdsdio_testrcv(dhd_bus_t *bus, void *pkt, uint seq); -static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start); +static void brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, void *pkt, uint seq); +static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start); #endif -#ifdef DHD_DEBUG -static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size); -static int dhdsdio_mem_dump(dhd_bus_t *bus); -#endif /* DHD_DEBUG */ -static int dhdsdio_download_state(dhd_bus_t *bus, bool enter); - -static void dhdsdio_release(dhd_bus_t *bus); -static void dhdsdio_release_malloc(dhd_bus_t *bus); -static void dhdsdio_disconnect(void *ptr); -static bool dhdsdio_chipmatch(u16 chipid); -static bool dhdsdio_probe_attach(dhd_bus_t *bus, void *sdh, - void *regsva, u16 devid); -static bool dhdsdio_probe_malloc(dhd_bus_t *bus, void *sdh); -static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh); -static void dhdsdio_release_dongle(dhd_bus_t *bus); - -static uint process_nvram_vars(char *varbuf, uint len); - -static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size); -static int dhd_bcmsdh_send_buf(dhd_bus_t *bus, u32 addr, uint fn, +#ifdef BCMDBG +static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr, + unsigned char *msg, uint msglen); +static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size); +static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus); +#endif /* BCMDBG */ +static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter); + +static void brcmf_sdbrcm_release(struct brcmf_bus *bus); +static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus); +static void brcmf_sdbrcm_disconnect(void *ptr); +static bool brcmf_sdbrcm_chipmatch(u16 chipid); +static bool brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, void *card, + u32 regsva, u16 devid); +static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus, void *card); +static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus, void *card); +static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus); + +static uint brcmf_process_nvram_vars(char *varbuf, uint len); + +static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size); +static int brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn, uint flags, u8 *buf, uint nbytes, - struct sk_buff *pkt, bcmsdh_cmplt_fn_t complete, + struct sk_buff *pkt, + void (*complete)(void *handle, int status, + bool sync_waiting), void *handle); -static bool dhdsdio_download_firmware(struct dhd_bus *bus, void *sdh); -static int _dhdsdio_download_firmware(struct dhd_bus *bus); +static bool brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card); +static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus); -static int dhdsdio_download_code_file(struct dhd_bus *bus, char *image_path); -static int dhdsdio_download_nvram(struct dhd_bus *bus); -#ifdef BCMEMBEDIMAGE -static int dhdsdio_download_code_array(struct dhd_bus *bus); -#endif -static void dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase); -static int dhdsdio_chip_attach(struct dhd_bus *bus, void *regs); -static void dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase); -static void dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, +static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus); +static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus); + +static void +brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_card *card, u32 corebase); + +static int brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs); + +static void +brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_card *card, u32 corebase); + +static void brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus, u32 drivestrength); -static void dhdsdio_chip_detach(struct dhd_bus *bus); +static void brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus); +static void brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar); +static void brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus); +static void brcmf_sdbrcm_watchdog(unsigned long data); +static int brcmf_sdbrcm_watchdog_thread(void *data); +static int brcmf_sdbrcm_dpc_thread(void *data); +static void brcmf_sdbrcm_dpc_tasklet(unsigned long data); +static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus); +static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus); +static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus); +static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus); /* Packet free applicable unconditionally for sdio and sdspi. * Conditional if bufpool was present for gspi bus. */ -static void dhdsdio_pktfree2(dhd_bus_t *bus, struct sk_buff *pkt) +static void brcmf_sdbrcm_pktfree2(struct brcmf_bus *bus, struct sk_buff *pkt) { - dhd_os_sdlock_rxq(bus->dhd); if ((bus->bus != SPI_BUS) || bus->usebufpool) - bcm_pkt_buf_free_skb(pkt); - dhd_os_sdunlock_rxq(bus->dhd); + brcmu_pkt_buf_free_skb(pkt); } -static void dhd_dongle_setmemsize(struct dhd_bus *bus, int mem_size) +static void brcmf_sdbrcm_setmemsize(struct brcmf_bus *bus, int mem_size) { s32 min_size = DONGLE_MIN_MEMSIZE; /* Restrict the memsize to user specified limit */ - DHD_ERROR(("user: Restrict the dongle ram size to %d, min %d\n", - dhd_dongle_memsize, min_size)); - if ((dhd_dongle_memsize > min_size) && - (dhd_dongle_memsize < (s32) bus->orig_ramsize)) - bus->ramsize = dhd_dongle_memsize; + BRCMF_ERROR(("user: Restrict the dongle ram size to %d, min %d\n", + brcmf_dongle_memsize, min_size)); + if ((brcmf_dongle_memsize > min_size) && + (brcmf_dongle_memsize < (s32) bus->orig_ramsize)) + bus->ramsize = brcmf_dongle_memsize; } -static int dhdsdio_set_siaddr_window(dhd_bus_t *bus, u32 address) +static int brcmf_sdbrcm_set_siaddr_window(struct brcmf_bus *bus, u32 address) { int err = 0; - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW, + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRLOW, (address >> 8) & SBSDIO_SBADDRLOW_MASK, &err); if (!err) - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRMID, + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, + SBSDIO_FUNC1_SBADDRMID, (address >> 16) & SBSDIO_SBADDRMID_MASK, &err); if (!err) - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SBADDRHIGH, - (address >> 24) & SBSDIO_SBADDRHIGH_MASK, - &err); + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, + SBSDIO_FUNC1_SBADDRHIGH, + (address >> 24) & SBSDIO_SBADDRHIGH_MASK, + &err); return err; } /* Turn backplane clock on or off */ -static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok) +static int brcmf_sdbrcm_htclk(struct brcmf_bus *bus, bool on, bool pendok) { int err; u8 clkctl, clkreq, devctl; - bcmsdh_info_t *sdh; + struct brcmf_sdio_card *card; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); -#if defined(OOB_INTR_ONLY) - pendok = false; -#endif clkctl = 0; - sdh = bus->sdh; + card = bus->card; if (on) { /* Request HT Avail */ @@ -537,99 +1045,93 @@ static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok) && (bus->ci->chiprev == 0)) clkreq |= SBSDIO_FORCE_ALP; - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - clkreq, &err); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err); if (err) { - DHD_ERROR(("%s: HT Avail request error: %d\n", - __func__, err)); + BRCMF_ERROR(("%s: HT Avail request error: %d\n", + __func__, err)); return -EBADE; } if (pendok && ((bus->ci->buscoretype == PCMCIA_CORE_ID) && (bus->ci->buscorerev == 9))) { u32 dummy, retries; - R_SDREG(dummy, &bus->regs->clockctlstatus, retries); + r_sdreg32(bus, &dummy, + offsetof(struct sdpcmd_regs, clockctlstatus), + &retries); } /* Check current status */ - clkctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - &err); + clkctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, &err); if (err) { - DHD_ERROR(("%s: HT Avail read error: %d\n", - __func__, err)); + BRCMF_ERROR(("%s: HT Avail read error: %d\n", + __func__, err)); return -EBADE; } /* Go to pending and await interrupt if appropriate */ if (!SBSDIO_CLKAV(clkctl, bus->alp_only) && pendok) { /* Allow only clock-available interrupt */ - devctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - &err); + devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, &err); if (err) { - DHD_ERROR(("%s: Devctl error setting CA: %d\n", - __func__, err)); + BRCMF_ERROR(("%s: Devctl error setting CA:" + " %d\n", __func__, err)); return -EBADE; } devctl |= SBSDIO_DEVCTL_CA_INT_ONLY; - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - devctl, &err); - DHD_INFO(("CLKCTL: set PENDING\n")); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, devctl, &err); + BRCMF_INFO(("CLKCTL: set PENDING\n")); bus->clkstate = CLK_PENDING; return 0; } else if (bus->clkstate == CLK_PENDING) { /* Cancel CA-only interrupt filter */ devctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - &err); + brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, &err); devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - devctl, &err); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, devctl, &err); } /* Otherwise, wait here (polling) for HT Avail */ if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { - SPINWAIT_SLEEP(sdioh_spinwait_sleep, - ((clkctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, - SBSDIO_FUNC1_CHIPCLKCSR, - &err)), - !SBSDIO_CLKAV(clkctl, bus->alp_only)), - PMU_MAX_TRANSITION_DLY); + BRCMF_SPINWAIT_SLEEP(sdioh_spinwait_sleep, + ((clkctl = + brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, + &err)), + !SBSDIO_CLKAV(clkctl, bus->alp_only)), + PMU_MAX_TRANSITION_DLY); } if (err) { - DHD_ERROR(("%s: HT Avail request error: %d\n", - __func__, err)); + BRCMF_ERROR(("%s: HT Avail request error: %d\n", + __func__, err)); return -EBADE; } if (!SBSDIO_CLKAV(clkctl, bus->alp_only)) { - DHD_ERROR(("%s: HT Avail timeout (%d): clkctl 0x%02x\n", - __func__, PMU_MAX_TRANSITION_DLY, clkctl)); + BRCMF_ERROR(("%s: HT Avail timeout (%d): " + "clkctl 0x%02x\n", __func__, + PMU_MAX_TRANSITION_DLY, clkctl)); return -EBADE; } /* Mark clock available */ bus->clkstate = CLK_AVAIL; - DHD_INFO(("CLKCTL: turned ON\n")); - -#if defined(DHD_DEBUG) - if (bus->alp_only == true) { -#if !defined(BCMLXSDMMC) - if (!SBSDIO_ALPONLY(clkctl)) { - DHD_ERROR(("%s: HT Clock, when ALP Only\n", - __func__)); - } -#endif /* !defined(BCMLXSDMMC) */ - } else { + BRCMF_INFO(("CLKCTL: turned ON\n")); + +#if defined(BCMDBG) + if (bus->alp_only != true) { if (SBSDIO_ALPONLY(clkctl)) { - DHD_ERROR(("%s: HT Clock should be on.\n", - __func__)); + BRCMF_ERROR(("%s: HT Clock should be on.\n", + __func__)); } } -#endif /* defined (DHD_DEBUG) */ +#endif /* defined (BCMDBG) */ bus->activity = true; } else { @@ -637,21 +1139,20 @@ static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok) if (bus->clkstate == CLK_PENDING) { /* Cancel CA-only interrupt filter */ - devctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - &err); + devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, &err); devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - devctl, &err); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, devctl, &err); } bus->clkstate = CLK_SDONLY; - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - clkreq, &err); - DHD_INFO(("CLKCTL: turned OFF\n")); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, clkreq, &err); + BRCMF_INFO(("CLKCTL: turned OFF\n")); if (err) { - DHD_ERROR(("%s: Failed access turning clock off: %d\n", - __func__, err)); + BRCMF_ERROR(("%s: Failed access turning clock off:" + " %d\n", __func__, err)); return -EBADE; } } @@ -659,105 +1160,31 @@ static int dhdsdio_htclk(dhd_bus_t *bus, bool on, bool pendok) } /* Change idle/active SD state */ -static int dhdsdio_sdclk(dhd_bus_t *bus, bool on) +static int brcmf_sdbrcm_sdclk(struct brcmf_bus *bus, bool on) { - int err; - s32 iovalue; + BRCMF_TRACE(("%s: Enter\n", __func__)); - DHD_TRACE(("%s: Enter\n", __func__)); - - if (on) { - if (bus->idleclock == DHD_IDLE_STOP) { - /* Turn on clock and restore mode */ - iovalue = 1; - err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error enabling sd_clock: %d\n", - __func__, err)); - return -EBADE; - } - - iovalue = bus->sd_mode; - err = bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error changing sd_mode: %d\n", - __func__, err)); - return -EBADE; - } - } else if (bus->idleclock != DHD_IDLE_ACTIVE) { - /* Restore clock speed */ - iovalue = bus->sd_divisor; - err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error restoring sd_divisor: %d\n", - __func__, err)); - return -EBADE; - } - } + if (on) bus->clkstate = CLK_SDONLY; - } else { - /* Stop or slow the SD clock itself */ - if ((bus->sd_divisor == -1) || (bus->sd_mode == -1)) { - DHD_TRACE(("%s: can't idle clock, divisor %d mode %d\n", - __func__, bus->sd_divisor, bus->sd_mode)); - return -EBADE; - } - if (bus->idleclock == DHD_IDLE_STOP) { - if (sd1idle) { - /* Change to SD1 mode and turn off clock */ - iovalue = 1; - err = - bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, - 0, &iovalue, - sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error changing sd_clock: %d\n", - __func__, err)); - return -EBADE; - } - } - - iovalue = 0; - err = bcmsdh_iovar_op(bus->sdh, "sd_clock", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error disabling sd_clock: %d\n", - __func__, err)); - return -EBADE; - } - } else if (bus->idleclock != DHD_IDLE_ACTIVE) { - /* Set divisor to idle value */ - iovalue = bus->idleclock; - err = bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, - &iovalue, sizeof(iovalue), true); - if (err) { - DHD_ERROR(("%s: error changing sd_divisor: %d\n", - __func__, err)); - return -EBADE; - } - } + else bus->clkstate = CLK_NONE; - } return 0; } /* Transition SD and backplane clock readiness */ -static int dhdsdio_clkctl(dhd_bus_t *bus, uint target, bool pendok) +static int brcmf_sdbrcm_clkctl(struct brcmf_bus *bus, uint target, bool pendok) { -#ifdef DHD_DEBUG +#ifdef BCMDBG uint oldstate = bus->clkstate; -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* Early exit if we're already there */ if (bus->clkstate == target) { if (target == CLK_AVAIL) { - dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms); + brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms); bus->activity = true; } return 0; @@ -767,50 +1194,50 @@ static int dhdsdio_clkctl(dhd_bus_t *bus, uint target, bool pendok) case CLK_AVAIL: /* Make sure SD clock is available */ if (bus->clkstate == CLK_NONE) - dhdsdio_sdclk(bus, true); + brcmf_sdbrcm_sdclk(bus, true); /* Now request HT Avail on the backplane */ - dhdsdio_htclk(bus, true, pendok); - dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms); + brcmf_sdbrcm_htclk(bus, true, pendok); + brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms); bus->activity = true; break; case CLK_SDONLY: /* Remove HT request, or bring up SD clock */ if (bus->clkstate == CLK_NONE) - dhdsdio_sdclk(bus, true); + brcmf_sdbrcm_sdclk(bus, true); else if (bus->clkstate == CLK_AVAIL) - dhdsdio_htclk(bus, false, false); + brcmf_sdbrcm_htclk(bus, false, false); else - DHD_ERROR(("dhdsdio_clkctl: request for %d -> %d\n", - bus->clkstate, target)); - dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms); + BRCMF_ERROR(("brcmf_sdbrcm_clkctl: request for %d -> %d" + "\n", bus->clkstate, target)); + brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms); break; case CLK_NONE: /* Make sure to remove HT request */ if (bus->clkstate == CLK_AVAIL) - dhdsdio_htclk(bus, false, false); + brcmf_sdbrcm_htclk(bus, false, false); /* Now remove the SD clock */ - dhdsdio_sdclk(bus, false); - dhd_os_wd_timer(bus->dhd, 0); + brcmf_sdbrcm_sdclk(bus, false); + brcmf_sdbrcm_wd_timer(bus, 0); break; } -#ifdef DHD_DEBUG - DHD_INFO(("dhdsdio_clkctl: %d -> %d\n", oldstate, bus->clkstate)); -#endif /* DHD_DEBUG */ +#ifdef BCMDBG + BRCMF_INFO(("brcmf_sdbrcm_clkctl: %d -> %d\n", + oldstate, bus->clkstate)); +#endif /* BCMDBG */ return 0; } -int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep) +int brcmf_sdbrcm_bussleep(struct brcmf_bus *bus, bool sleep) { - bcmsdh_info_t *sdh = bus->sdh; - sdpcmd_regs_t *regs = bus->regs; + struct brcmf_sdio_card *card = bus->card; uint retries = 0; - DHD_INFO(("dhdsdio_bussleep: request %s (currently %s)\n", - (sleep ? "SLEEP" : "WAKE"), - (bus->sleeping ? "SLEEP" : "WAKE"))); + BRCMF_INFO(("brcmf_sdbrcm_bussleep: request %s (currently %s)\n", + (sleep ? "SLEEP" : "WAKE"), + (bus->sleeping ? "SLEEP" : "WAKE"))); /* Done if we're already in the requested state */ if (sleep == bus->sleeping) @@ -823,27 +1250,31 @@ int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep) return -EBUSY; /* Disable SDIO interrupts (no longer interested) */ - bcmsdh_intr_disable(bus->sdh); + brcmf_sdcard_intr_disable(bus->card); /* Make sure the controller has the bus up */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); /* Tell device to start using OOB wakeup */ - W_SDREG(SMB_USE_OOB, ®s->tosbmailbox, retries); + w_sdreg32(bus, SMB_USE_OOB, + offsetof(struct sdpcmd_regs, tosbmailbox), &retries); if (retries > retry_limit) - DHD_ERROR(("CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n")); + BRCMF_ERROR(("CANNOT SIGNAL CHIP, " + "WILL NOT WAKE UP!!\n")); /* Turn off our contribution to the HT clock request */ - dhdsdio_clkctl(bus, CLK_SDONLY, false); + brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - SBSDIO_FORCE_HW_CLKREQ_OFF, NULL); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, + SBSDIO_FORCE_HW_CLKREQ_OFF, NULL); /* Isolate the bus */ if (bus->ci->chip != BCM4329_CHIP_ID && bus->ci->chip != BCM4319_CHIP_ID) { - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - SBSDIO_DEVCTL_PADS_ISO, NULL); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, + SBSDIO_DEVCTL_PADS_ISO, NULL); } /* Change state */ @@ -852,82 +1283,55 @@ int dhdsdio_bussleep(dhd_bus_t *bus, bool sleep) } else { /* Waking up: bus power up is ok, set local state */ - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - 0, NULL); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL); /* Force pad isolation off if possible (in case power never toggled) */ if ((bus->ci->buscoretype == PCMCIA_CORE_ID) && (bus->ci->buscorerev >= 10)) - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, 0, - NULL); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, 0, NULL); /* Make sure the controller has the bus up */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); /* Send misc interrupt to indicate OOB not needed */ - W_SDREG(0, ®s->tosbmailboxdata, retries); + w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, tosbmailboxdata), + &retries); if (retries <= retry_limit) - W_SDREG(SMB_DEV_INT, ®s->tosbmailbox, retries); + w_sdreg32(bus, SMB_DEV_INT, + offsetof(struct sdpcmd_regs, tosbmailbox), + &retries); if (retries > retry_limit) - DHD_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n")); + BRCMF_ERROR(("CANNOT SIGNAL CHIP TO CLEAR OOB!!\n")); /* Make sure we have SD bus access */ - dhdsdio_clkctl(bus, CLK_SDONLY, false); + brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); /* Change state */ bus->sleeping = false; /* Enable interrupts again */ - if (bus->intr && (bus->dhd->busstate == DHD_BUS_DATA)) { + if (bus->intr && (bus->drvr->busstate == BRCMF_BUS_DATA)) { bus->intdis = false; - bcmsdh_intr_enable(bus->sdh); + brcmf_sdcard_intr_enable(bus->card); } } return 0; } -#if defined(OOB_INTR_ONLY) -void dhd_enable_oob_intr(struct dhd_bus *bus, bool enable) -{ -#if defined(HW_OOB) - bcmsdh_enable_hw_oob_intr(bus->sdh, enable); -#else - sdpcmd_regs_t *regs = bus->regs; - uint retries = 0; - - dhdsdio_clkctl(bus, CLK_AVAIL, false); - if (enable == true) { - - /* Tell device to start using OOB wakeup */ - W_SDREG(SMB_USE_OOB, ®s->tosbmailbox, retries); - if (retries > retry_limit) - DHD_ERROR(("CANNOT SIGNAL CHIP, WILL NOT WAKE UP!!\n")); - - } else { - /* Send misc interrupt to indicate OOB not needed */ - W_SDREG(0, ®s->tosbmailboxdata, retries); - if (retries <= retry_limit) - W_SDREG(SMB_DEV_INT, ®s->tosbmailbox, retries); - } - - /* Turn off our contribution to the HT clock request */ - dhdsdio_clkctl(bus, CLK_SDONLY, false); -#endif /* !defined(HW_OOB) */ -} -#endif /* defined(OOB_INTR_ONLY) */ - #define BUS_WAKE(bus) \ do { \ if ((bus)->sleeping) \ - dhdsdio_bussleep((bus), false); \ + brcmf_sdbrcm_bussleep((bus), false); \ } while (0); /* Writes a HW/SW header into the packet and sends it. */ /* Assumes: (a) header space already there, (b) caller holds lock */ -static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan, +static int brcmf_sdbrcm_txpkt(struct brcmf_bus *bus, struct sk_buff *pkt, uint chan, bool free_pkt) { int ret; @@ -935,15 +1339,15 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan, u16 len, pad = 0; u32 swheader; uint retries = 0; - bcmsdh_info_t *sdh; + struct brcmf_sdio_card *card; struct sk_buff *new; int i; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - sdh = bus->sdh; + card = bus->card; - if (bus->dhd->dongle_reset) { + if (bus->drvr->dongle_reset) { ret = -EPERM; goto done; } @@ -951,40 +1355,39 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan, frame = (u8 *) (pkt->data); /* Add alignment padding, allocate new packet if needed */ - pad = ((unsigned long)frame % DHD_SDALIGN); + pad = ((unsigned long)frame % BRCMF_SDALIGN); if (pad) { if (skb_headroom(pkt) < pad) { - DHD_INFO(("%s: insufficient headroom %d for %d pad\n", - __func__, skb_headroom(pkt), pad)); - bus->dhd->tx_realloc++; - new = bcm_pkt_buf_get_skb(pkt->len + DHD_SDALIGN); + BRCMF_INFO(("%s: insufficient headroom %d for %d pad\n", + __func__, skb_headroom(pkt), pad)); + bus->drvr->tx_realloc++; + new = brcmu_pkt_buf_get_skb(pkt->len + BRCMF_SDALIGN); if (!new) { - DHD_ERROR(("%s: couldn't allocate new %d-byte " - "packet\n", - __func__, pkt->len + DHD_SDALIGN)); + BRCMF_ERROR(("%s: couldn't allocate new " + "%d-byte packet\n", __func__, + pkt->len + BRCMF_SDALIGN)); ret = -ENOMEM; goto done; } - PKTALIGN(new, pkt->len, DHD_SDALIGN); + PKTALIGN(new, pkt->len, BRCMF_SDALIGN); memcpy(new->data, pkt->data, pkt->len); if (free_pkt) - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); /* free the pkt if canned one is not used */ free_pkt = true; pkt = new; frame = (u8 *) (pkt->data); - ASSERT(((unsigned long)frame % DHD_SDALIGN) == 0); + /* precondition: (frame % BRCMF_SDALIGN) == 0) */ pad = 0; } else { skb_push(pkt, pad); frame = (u8 *) (pkt->data); - - ASSERT((pad + SDPCM_HDRLEN) <= (int)(pkt->len)); + /* precondition: pad + SDPCM_HDRLEN <= pkt->len */ memset(frame, 0, pad + SDPCM_HDRLEN); } } - ASSERT(pad < DHD_SDALIGN); + /* precondition: pad < BRCMF_SDALIGN */ /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */ len = (u16) (pkt->len); @@ -1000,14 +1403,14 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan, put_unaligned_le32(swheader, frame + SDPCM_FRAMETAG_LEN); put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader)); -#ifdef DHD_DEBUG +#ifdef BCMDBG tx_packets[pkt->priority]++; - if (DHD_BYTES_ON() && - (((DHD_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) || - (DHD_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) { + if (BRCMF_BYTES_ON() && + (((BRCMF_CTL_ON() && (chan == SDPCM_CONTROL_CHANNEL)) || + (BRCMF_DATA_ON() && (chan != SDPCM_CONTROL_CHANNEL))))) { printk(KERN_DEBUG "Tx Frame:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len); - } else if (DHD_HDRS_ON()) { + } else if (BRCMF_HDRS_ON()) { printk(KERN_DEBUG "TxHdr:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, min_t(u16, len, 16)); @@ -1018,53 +1421,40 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan, if (bus->roundup && bus->blocksize && (len > bus->blocksize)) { u16 pad = bus->blocksize - (len % bus->blocksize); if ((pad <= bus->roundup) && (pad < bus->blocksize)) -#ifdef NOTUSED - if (pad <= skb_tailroom(pkt)) -#endif /* NOTUSED */ len += pad; - } else if (len % DHD_SDALIGN) { - len += DHD_SDALIGN - (len % DHD_SDALIGN); + } else if (len % BRCMF_SDALIGN) { + len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN); } /* Some controllers have trouble with odd bytes -- round to even */ if (forcealign && (len & (ALIGNMENT - 1))) { -#ifdef NOTUSED - if (skb_tailroom(pkt)) -#endif len = roundup(len, ALIGNMENT); -#ifdef NOTUSED - else - DHD_ERROR(("%s: sending unrounded %d-byte packet\n", - __func__, len)); -#endif } do { - ret = - dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2, - F2SYNC, frame, len, pkt, NULL, NULL); + ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(card), + SDIO_FUNC_2, F2SYNC, frame, len, pkt, NULL, NULL); bus->f2txdata++; - ASSERT(ret != -BCME_PENDING); if (ret < 0) { /* On failure, abort the command and terminate the frame */ - DHD_INFO(("%s: sdio error %d, abort command and " - "terminate frame.\n", __func__, ret)); + BRCMF_INFO(("%s: sdio error %d, abort command and " + "terminate frame.\n", __func__, ret)); bus->tx_sderrs++; - bcmsdh_abort(sdh, SDIO_FUNC_2); - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, + brcmf_sdcard_abort(card, SDIO_FUNC_2); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL); bus->f1regdata++; for (i = 0; i < 3; i++) { u8 hi, lo; - hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, + hi = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, SBSDIO_FUNC1_WFRAMEBCHI, NULL); - lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, + lo = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, SBSDIO_FUNC1_WFRAMEBCLO, NULL); bus->f1regdata += 2; @@ -1081,22 +1471,22 @@ static int dhdsdio_txpkt(dhd_bus_t *bus, struct sk_buff *pkt, uint chan, done: /* restore pkt buffer pointer before calling tx complete routine */ skb_pull(pkt, SDPCM_HDRLEN + pad); - dhd_os_sdunlock(bus->dhd); - dhd_txcomplete(bus->dhd, pkt, ret != 0); - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); + brcmf_txcomplete(bus->drvr, pkt, ret != 0); + brcmf_sdbrcm_sdlock(bus); if (free_pkt) - bcm_pkt_buf_free_skb(pkt); + brcmu_pkt_buf_free_skb(pkt); return ret; } -int dhd_bus_txdata(struct dhd_bus *bus, struct sk_buff *pkt) +int brcmf_sdbrcm_bus_txdata(struct brcmf_bus *bus, struct sk_buff *pkt) { int ret = -EBADE; uint datalen, prec; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); datalen = pkt->len; @@ -1116,79 +1506,80 @@ int dhd_bus_txdata(struct dhd_bus *bus, struct sk_buff *pkt) /* Add space for the header */ skb_push(pkt, SDPCM_HDRLEN); - ASSERT(IS_ALIGNED((unsigned long)(pkt->data), 2)); + /* precondition: IS_ALIGNED((unsigned long)(pkt->data), 2) */ prec = PRIO2PREC((pkt->priority & PRIOMASK)); /* Check for existing queue, current flow-control, pending event, or pending clock */ - if (dhd_deferred_tx || bus->fcstate || pktq_len(&bus->txq) + if (brcmf_deferred_tx || bus->fcstate || pktq_len(&bus->txq) || bus->dpc_sched || (!DATAOK(bus)) || (bus->flowcontrol & NBITVAL(prec)) || (bus->clkstate != CLK_AVAIL)) { - DHD_TRACE(("%s: deferring pktq len %d\n", __func__, - pktq_len(&bus->txq))); + BRCMF_TRACE(("%s: deferring pktq len %d\n", __func__, + pktq_len(&bus->txq))); bus->fcqueued++; /* Priority based enq */ - dhd_os_sdlock_txq(bus->dhd); - if (dhd_prec_enq(bus->dhd, &bus->txq, pkt, prec) == false) { + spin_lock_bh(&bus->txqlock); + if (brcmf_c_prec_enq(bus->drvr, &bus->txq, pkt, prec) == false) { skb_pull(pkt, SDPCM_HDRLEN); - dhd_txcomplete(bus->dhd, pkt, false); - bcm_pkt_buf_free_skb(pkt); - DHD_ERROR(("%s: out of bus->txq !!!\n", __func__)); + brcmf_txcomplete(bus->drvr, pkt, false); + brcmu_pkt_buf_free_skb(pkt); + BRCMF_ERROR(("%s: out of bus->txq !!!\n", __func__)); ret = -ENOSR; } else { ret = 0; } - dhd_os_sdunlock_txq(bus->dhd); + spin_unlock_bh(&bus->txqlock); if (pktq_len(&bus->txq) >= TXHI) - dhd_txflowcontrol(bus->dhd, 0, ON); + brcmf_txflowcontrol(bus->drvr, 0, ON); -#ifdef DHD_DEBUG +#ifdef BCMDBG if (pktq_plen(&bus->txq, prec) > qcount[prec]) qcount[prec] = pktq_plen(&bus->txq, prec); #endif /* Schedule DPC if needed to send queued packet(s) */ - if (dhd_deferred_tx && !bus->dpc_sched) { + if (brcmf_deferred_tx && !bus->dpc_sched) { bus->dpc_sched = true; - dhd_sched_dpc(bus->dhd); + brcmf_sdbrcm_sched_dpc(bus); } } else { /* Lock: we're about to use shared data/code (and SDIO) */ - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); /* Otherwise, send it now */ BUS_WAKE(bus); /* Make sure back plane ht clk is on, no pending allowed */ - dhdsdio_clkctl(bus, CLK_AVAIL, true); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true); #ifndef SDTEST - DHD_TRACE(("%s: calling txpkt\n", __func__)); - ret = dhdsdio_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true); + BRCMF_TRACE(("%s: calling txpkt\n", __func__)); + ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true); #else - ret = dhdsdio_txpkt(bus, pkt, + ret = brcmf_sdbrcm_txpkt(bus, pkt, (bus->ext_loop ? SDPCM_TEST_CHANNEL : SDPCM_DATA_CHANNEL), true); #endif if (ret) - bus->dhd->tx_errors++; + bus->drvr->tx_errors++; else - bus->dhd->dstats.tx_bytes += datalen; + bus->drvr->dstats.tx_bytes += datalen; - if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) { + if (bus->idletime == BRCMF_IDLE_IMMEDIATE && + !bus->dpc_sched) { bus->activity = false; - dhdsdio_clkctl(bus, CLK_NONE, true); + brcmf_sdbrcm_clkctl(bus, CLK_NONE, true); } - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); } return ret; } -static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes) +static uint brcmf_sdbrcm_sendfromq(struct brcmf_bus *bus, uint maxframes) { struct sk_buff *pkt; u32 intstatus = 0; @@ -1198,42 +1589,43 @@ static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes) uint datalen; u8 tx_prec_map; - dhd_pub_t *dhd = bus->dhd; - sdpcmd_regs_t *regs = bus->regs; + struct brcmf_pub *drvr = bus->drvr; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); tx_prec_map = ~bus->flowcontrol; /* Send frames until the limit or some other event */ for (cnt = 0; (cnt < maxframes) && DATAOK(bus); cnt++) { - dhd_os_sdlock_txq(bus->dhd); - pkt = bcm_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out); + spin_lock_bh(&bus->txqlock); + pkt = brcmu_pktq_mdeq(&bus->txq, tx_prec_map, &prec_out); if (pkt == NULL) { - dhd_os_sdunlock_txq(bus->dhd); + spin_unlock_bh(&bus->txqlock); break; } - dhd_os_sdunlock_txq(bus->dhd); + spin_unlock_bh(&bus->txqlock); datalen = pkt->len - SDPCM_HDRLEN; #ifndef SDTEST - ret = dhdsdio_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true); + ret = brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_DATA_CHANNEL, true); #else - ret = dhdsdio_txpkt(bus, pkt, + ret = brcmf_sdbrcm_txpkt(bus, pkt, (bus->ext_loop ? SDPCM_TEST_CHANNEL : SDPCM_DATA_CHANNEL), true); #endif if (ret) - bus->dhd->tx_errors++; + bus->drvr->tx_errors++; else - bus->dhd->dstats.tx_bytes += datalen; + bus->drvr->dstats.tx_bytes += datalen; /* In poll mode, need to check for other events */ if (!bus->intr && cnt) { /* Check device status, signal pending interrupt */ - R_SDREG(intstatus, ®s->intstatus, retries); + r_sdreg32(bus, &intstatus, + offsetof(struct sdpcmd_regs, intstatus), + &retries); bus->f2txdata++; - if (bcmsdh_regfail(bus->sdh)) + if (brcmf_sdcard_regfail(bus->card)) break; if (intstatus & bus->hostintmask) bus->ipend = true; @@ -1241,27 +1633,28 @@ static uint dhdsdio_sendfromq(dhd_bus_t *bus, uint maxframes) } /* Deflow-control stack if needed */ - if (dhd->up && (dhd->busstate == DHD_BUS_DATA) && - dhd->txoff && (pktq_len(&bus->txq) < TXLOW)) - dhd_txflowcontrol(dhd, 0, OFF); + if (drvr->up && (drvr->busstate == BRCMF_BUS_DATA) && + drvr->txoff && (pktq_len(&bus->txq) < TXLOW)) + brcmf_txflowcontrol(drvr, 0, OFF); return cnt; } -int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen) +int +brcmf_sdbrcm_bus_txctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen) { u8 *frame; u16 len; u32 swheader; uint retries = 0; - bcmsdh_info_t *sdh = bus->sdh; + struct brcmf_sdio_card *card = bus->card; u8 doff = 0; int ret = -1; int i; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (bus->dhd->dongle_reset) + if (bus->drvr->dongle_reset) return -EIO; /* Back the pointer to make a room for bus header */ @@ -1269,15 +1662,15 @@ int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen) len = (msglen += SDPCM_HDRLEN); /* Add alignment padding (optional for ctl frames) */ - if (dhd_alignctl) { - doff = ((unsigned long)frame % DHD_SDALIGN); + if (brcmf_alignctl) { + doff = ((unsigned long)frame % BRCMF_SDALIGN); if (doff) { frame -= doff; len += doff; msglen += doff; memset(frame, 0, doff + SDPCM_HDRLEN); } - ASSERT(doff < DHD_SDALIGN); + /* precondition: doff < BRCMF_SDALIGN */ } doff += SDPCM_HDRLEN; @@ -1286,23 +1679,23 @@ int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen) u16 pad = bus->blocksize - (len % bus->blocksize); if ((pad <= bus->roundup) && (pad < bus->blocksize)) len += pad; - } else if (len % DHD_SDALIGN) { - len += DHD_SDALIGN - (len % DHD_SDALIGN); + } else if (len % BRCMF_SDALIGN) { + len += BRCMF_SDALIGN - (len % BRCMF_SDALIGN); } /* Satisfy length-alignment requirements */ if (forcealign && (len & (ALIGNMENT - 1))) len = roundup(len, ALIGNMENT); - ASSERT(IS_ALIGNED((unsigned long)frame, 2)); + /* precondition: IS_ALIGNED((unsigned long)frame, 2) */ /* Need to lock here to protect txseq and SDIO tx calls */ - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); BUS_WAKE(bus); /* Make sure backplane clock is on */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); /* Hardware tag: 2 byte len followed by 2 byte ~len check (all LE) */ *(u16 *) frame = cpu_to_le16((u16) msglen); @@ -1318,31 +1711,33 @@ int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen) put_unaligned_le32(0, frame + SDPCM_FRAMETAG_LEN + sizeof(swheader)); if (!DATAOK(bus)) { - DHD_INFO(("%s: No bus credit bus->tx_max %d, bus->tx_seq %d\n", - __func__, bus->tx_max, bus->tx_seq)); + BRCMF_INFO(("%s: No bus credit bus->tx_max %d," + " bus->tx_seq %d\n", __func__, + bus->tx_max, bus->tx_seq)); bus->ctrl_frame_stat = true; /* Send from dpc */ bus->ctrl_frame_buf = frame; bus->ctrl_frame_len = len; - dhd_wait_for_event(bus->dhd, &bus->ctrl_frame_stat); + brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat); if (bus->ctrl_frame_stat == false) { - DHD_INFO(("%s: ctrl_frame_stat == false\n", __func__)); + BRCMF_INFO(("%s: ctrl_frame_stat == false\n", + __func__)); ret = 0; } else { - DHD_INFO(("%s: ctrl_frame_stat == true\n", __func__)); + BRCMF_INFO(("%s: ctrl_frame_stat == true\n", __func__)); ret = -1; } } if (ret == -1) { -#ifdef DHD_DEBUG - if (DHD_BYTES_ON() && DHD_CTL_ON()) { +#ifdef BCMDBG + if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) { printk(KERN_DEBUG "Tx Frame:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, len); - } else if (DHD_HDRS_ON()) { + } else if (BRCMF_HDRS_ON()) { printk(KERN_DEBUG "TxHdr:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, frame, min_t(u16, len, 16)); @@ -1351,35 +1746,35 @@ int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen) do { bus->ctrl_frame_stat = false; - ret = - dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh), - SDIO_FUNC_2, F2SYNC, frame, len, - NULL, NULL, NULL); - - ASSERT(ret != -BCME_PENDING); + ret = brcmf_sdbrcm_send_buf(bus, + brcmf_sdcard_cur_sbwad(card), SDIO_FUNC_2, + F2SYNC, frame, len, NULL, NULL, NULL); if (ret < 0) { /* On failure, abort the command and terminate the frame */ - DHD_INFO(("%s: sdio error %d, abort command and terminate frame.\n", - __func__, ret)); + BRCMF_INFO(("%s: sdio error %d, abort command " + "and terminate frame.\n", + __func__, ret)); bus->tx_sderrs++; - bcmsdh_abort(sdh, SDIO_FUNC_2); + brcmf_sdcard_abort(card, SDIO_FUNC_2); - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL); bus->f1regdata++; for (i = 0; i < 3; i++) { u8 hi, lo; - hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, + hi = brcmf_sdcard_cfg_read(card, + SDIO_FUNC_1, SBSDIO_FUNC1_WFRAMEBCHI, NULL); - lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, + lo = brcmf_sdcard_cfg_read(card, + SDIO_FUNC_1, SBSDIO_FUNC1_WFRAMEBCLO, - NULL); + NULL); bus->f1regdata += 2; if ((hi == 0) && (lo == 0)) break; @@ -1393,67 +1788,67 @@ int dhd_bus_txctl(struct dhd_bus *bus, unsigned char *msg, uint msglen) } while ((ret < 0) && retries++ < TXRETRIES); } - if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) { + if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) { bus->activity = false; - dhdsdio_clkctl(bus, CLK_NONE, true); + brcmf_sdbrcm_clkctl(bus, CLK_NONE, true); } - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); if (ret) - bus->dhd->tx_ctlerrs++; + bus->drvr->tx_ctlerrs++; else - bus->dhd->tx_ctlpkts++; + bus->drvr->tx_ctlpkts++; return ret ? -EIO : 0; } -int dhd_bus_rxctl(struct dhd_bus *bus, unsigned char *msg, uint msglen) +int brcmf_sdbrcm_bus_rxctl(struct brcmf_bus *bus, unsigned char *msg, uint msglen) { int timeleft; uint rxlen = 0; bool pending; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (bus->dhd->dongle_reset) + if (bus->drvr->dongle_reset) return -EIO; /* Wait until control frame is available */ - timeleft = dhd_os_ioctl_resp_wait(bus->dhd, &bus->rxlen, &pending); + timeleft = brcmf_os_ioctl_resp_wait(bus->drvr, &bus->rxlen, &pending); - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); rxlen = bus->rxlen; memcpy(msg, bus->rxctl, min(msglen, rxlen)); bus->rxlen = 0; - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); if (rxlen) { - DHD_CTL(("%s: resumed on rxctl frame, got %d expected %d\n", - __func__, rxlen, msglen)); + BRCMF_CTL(("%s: resumed on rxctl frame, got %d expected %d\n", + __func__, rxlen, msglen)); } else if (timeleft == 0) { - DHD_ERROR(("%s: resumed on timeout\n", __func__)); -#ifdef DHD_DEBUG - dhd_os_sdlock(bus->dhd); - dhdsdio_checkdied(bus, NULL, 0); - dhd_os_sdunlock(bus->dhd); -#endif /* DHD_DEBUG */ + BRCMF_ERROR(("%s: resumed on timeout\n", __func__)); +#ifdef BCMDBG + brcmf_sdbrcm_sdlock(bus); + brcmf_sdbrcm_checkdied(bus, NULL, 0); + brcmf_sdbrcm_sdunlock(bus); +#endif /* BCMDBG */ } else if (pending == true) { - DHD_CTL(("%s: cancelled\n", __func__)); + BRCMF_CTL(("%s: cancelled\n", __func__)); return -ERESTARTSYS; } else { - DHD_CTL(("%s: resumed for unknown reason?\n", __func__)); -#ifdef DHD_DEBUG - dhd_os_sdlock(bus->dhd); - dhdsdio_checkdied(bus, NULL, 0); - dhd_os_sdunlock(bus->dhd); -#endif /* DHD_DEBUG */ + BRCMF_CTL(("%s: resumed for unknown reason?\n", __func__)); +#ifdef BCMDBG + brcmf_sdbrcm_sdlock(bus); + brcmf_sdbrcm_checkdied(bus, NULL, 0); + brcmf_sdbrcm_sdunlock(bus); +#endif /* BCMDBG */ } if (rxlen) - bus->dhd->rx_ctlpkts++; + bus->drvr->rx_ctlpkts++; else - bus->dhd->rx_ctlerrs++; + bus->drvr->rx_ctlerrs++; return rxlen ? (int)rxlen : -ETIMEDOUT; } @@ -1467,8 +1862,10 @@ enum { IOV_SDCIS, IOV_MEMBYTES, IOV_MEMSIZE, -#ifdef DHD_DEBUG +#ifdef BCMDBG IOV_CHECKDIED, + IOV_CONS, + IOV_DCONSOLE_POLL, #endif IOV_DOWNLOAD, IOV_FORCEEVEN, @@ -1491,10 +1888,11 @@ enum { IOV_IDLECLOCK, IOV_SD1IDLE, IOV_SLEEP, + IOV_WDTICK, IOV_VARS }; -const bcm_iovar_t dhdsdio_iovars[] = { +const struct brcmu_iovar brcmf_sdio_iovars[] = { {"intr", IOV_INTR, 0, IOVT_BOOL, 0}, {"sleep", IOV_SLEEP, 0, IOVT_BOOL, 0}, {"pollrate", IOV_POLLRATE, 0, IOVT_UINT32, 0}, @@ -1511,12 +1909,17 @@ const bcm_iovar_t dhdsdio_iovars[] = { {"alignctl", IOV_ALIGNCTL, 0, IOVT_BOOL, 0}, {"sdalign", IOV_SDALIGN, 0, IOVT_BOOL, 0}, {"devreset", IOV_DEVRESET, 0, IOVT_BOOL, 0}, -#ifdef DHD_DEBUG - {"sdreg", IOV_SDREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} + {"wdtick", IOV_WDTICK, 0, IOVT_UINT32, 0}, +#ifdef BCMDBG + {"cons", IOV_CONS, 0, IOVT_BUFFER, 0} + , + {"dconpoll", IOV_DCONSOLE_POLL, 0, IOVT_UINT32, 0} + , + {"sdreg", IOV_SDREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)} , - {"sbreg", IOV_SBREG, 0, IOVT_BUFFER, sizeof(sdreg_t)} + {"sbreg", IOV_SBREG, 0, IOVT_BUFFER, sizeof(struct brcmf_sdreg)} , - {"sd_cis", IOV_SDCIS, 0, IOVT_BUFFER, DHD_IOCTL_MAXLEN} + {"sd_cis", IOV_SDCIS, 0, IOVT_BUFFER, BRCMF_IOCTL_MAXLEN} , {"forcealign", IOV_FORCEEVEN, 0, IOVT_BOOL, 0} , @@ -1528,15 +1931,13 @@ const bcm_iovar_t dhdsdio_iovars[] = { , {"cpu", IOV_CPU, 0, IOVT_BOOL, 0} , -#ifdef DHD_DEBUG {"checkdied", IOV_CHECKDIED, 0, IOVT_BUFFER, 0} , -#endif /* DHD_DEBUG */ -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ #ifdef SDTEST {"extloop", IOV_EXTLOOP, 0, IOVT_BOOL, 0} , - {"pktgen", IOV_PKTGEN, 0, IOVT_BUFFER, sizeof(dhd_pktgen_t)} + {"pktgen", IOV_PKTGEN, 0, IOVT_BUFFER, sizeof(struct brcmf_pktgen)} , #endif /* SDTEST */ @@ -1544,122 +1945,122 @@ const bcm_iovar_t dhdsdio_iovars[] = { }; static void -dhd_dump_pct(struct bcmstrbuf *strbuf, char *desc, uint num, uint div) +brcmf_dump_pct(struct brcmu_strbuf *strbuf, char *desc, uint num, uint div) { uint q1, q2; if (!div) { - bcm_bprintf(strbuf, "%s N/A", desc); + brcmu_bprintf(strbuf, "%s N/A", desc); } else { q1 = num / div; q2 = (100 * (num - (q1 * div))) / div; - bcm_bprintf(strbuf, "%s %d.%02d", desc, q1, q2); + brcmu_bprintf(strbuf, "%s %d.%02d", desc, q1, q2); } } -void dhd_bus_dump(dhd_pub_t *dhdp, struct bcmstrbuf *strbuf) +void brcmf_sdbrcm_bus_dump(struct brcmf_pub *drvr, struct brcmu_strbuf *strbuf) { - dhd_bus_t *bus = dhdp->bus; + struct brcmf_bus *bus = drvr->bus; - bcm_bprintf(strbuf, "Bus SDIO structure:\n"); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "Bus SDIO structure:\n"); + brcmu_bprintf(strbuf, "hostintmask 0x%08x intstatus 0x%08x sdpcm_ver %d\n", bus->hostintmask, bus->intstatus, bus->sdpcm_ver); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "fcstate %d qlen %d tx_seq %d, max %d, rxskip %d rxlen %d rx_seq %d\n", bus->fcstate, pktq_len(&bus->txq), bus->tx_seq, bus->tx_max, bus->rxskip, bus->rxlen, bus->rx_seq); - bcm_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n", + brcmu_bprintf(strbuf, "intr %d intrcount %d lastintrs %d spurious %d\n", bus->intr, bus->intrcount, bus->lastintrs, bus->spurious); - bcm_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n", + brcmu_bprintf(strbuf, "pollrate %d pollcnt %d regfails %d\n", bus->pollrate, bus->pollcnt, bus->regfails); - bcm_bprintf(strbuf, "\nAdditional counters:\n"); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "\nAdditional counters:\n"); + brcmu_bprintf(strbuf, "tx_sderrs %d fcqueued %d rxrtx %d rx_toolong %d rxc_errors %d\n", bus->tx_sderrs, bus->fcqueued, bus->rxrtx, bus->rx_toolong, bus->rxc_errors); - bcm_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n", + brcmu_bprintf(strbuf, "rx_hdrfail %d badhdr %d badseq %d\n", bus->rx_hdrfail, bus->rx_badhdr, bus->rx_badseq); - bcm_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n", bus->fc_rcvd, - bus->fc_xoff, bus->fc_xon); - bcm_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n", + brcmu_bprintf(strbuf, "fc_rcvd %d, fc_xoff %d, fc_xon %d\n", + bus->fc_rcvd, bus->fc_xoff, bus->fc_xon); + brcmu_bprintf(strbuf, "rxglomfail %d, rxglomframes %d, rxglompkts %d\n", bus->rxglomfail, bus->rxglomframes, bus->rxglompkts); - bcm_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs %d\n", - (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs, - bus->f2rxdata, bus->f2txdata, bus->f1regdata); + brcmu_bprintf(strbuf, "f2rx (hdrs/data) %d (%d/%d), f2tx %d f1regs" + " %d\n", + (bus->f2rxhdrs + bus->f2rxdata), bus->f2rxhdrs, + bus->f2rxdata, bus->f2txdata, bus->f1regdata); { - dhd_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->dhd->rx_packets, + brcmf_dump_pct(strbuf, "\nRx: pkts/f2rd", bus->drvr->rx_packets, (bus->f2rxhdrs + bus->f2rxdata)); - dhd_dump_pct(strbuf, ", pkts/f1sd", bus->dhd->rx_packets, + brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->rx_packets, bus->f1regdata); - dhd_dump_pct(strbuf, ", pkts/sd", bus->dhd->rx_packets, + brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->rx_packets, (bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata)); - dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->rx_packets, + brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->rx_packets, bus->intrcount); - bcm_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "\n"); - dhd_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts), - bus->dhd->rx_packets); - dhd_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts, + brcmf_dump_pct(strbuf, "Rx: glom pct", (100 * bus->rxglompkts), + bus->drvr->rx_packets); + brcmf_dump_pct(strbuf, ", pkts/glom", bus->rxglompkts, bus->rxglomframes); - bcm_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "\n"); - dhd_dump_pct(strbuf, "Tx: pkts/f2wr", bus->dhd->tx_packets, + brcmf_dump_pct(strbuf, "Tx: pkts/f2wr", bus->drvr->tx_packets, bus->f2txdata); - dhd_dump_pct(strbuf, ", pkts/f1sd", bus->dhd->tx_packets, + brcmf_dump_pct(strbuf, ", pkts/f1sd", bus->drvr->tx_packets, bus->f1regdata); - dhd_dump_pct(strbuf, ", pkts/sd", bus->dhd->tx_packets, + brcmf_dump_pct(strbuf, ", pkts/sd", bus->drvr->tx_packets, (bus->f2txdata + bus->f1regdata)); - dhd_dump_pct(strbuf, ", pkts/int", bus->dhd->tx_packets, + brcmf_dump_pct(strbuf, ", pkts/int", bus->drvr->tx_packets, bus->intrcount); - bcm_bprintf(strbuf, "\n"); + brcmu_bprintf(strbuf, "\n"); - dhd_dump_pct(strbuf, "Total: pkts/f2rw", - (bus->dhd->tx_packets + bus->dhd->rx_packets), + brcmf_dump_pct(strbuf, "Total: pkts/f2rw", + (bus->drvr->tx_packets + bus->drvr->rx_packets), (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata)); - dhd_dump_pct(strbuf, ", pkts/f1sd", - (bus->dhd->tx_packets + bus->dhd->rx_packets), + brcmf_dump_pct(strbuf, ", pkts/f1sd", + (bus->drvr->tx_packets + bus->drvr->rx_packets), bus->f1regdata); - dhd_dump_pct(strbuf, ", pkts/sd", - (bus->dhd->tx_packets + bus->dhd->rx_packets), + brcmf_dump_pct(strbuf, ", pkts/sd", + (bus->drvr->tx_packets + bus->drvr->rx_packets), (bus->f2txdata + bus->f2rxhdrs + bus->f2rxdata + bus->f1regdata)); - dhd_dump_pct(strbuf, ", pkts/int", - (bus->dhd->tx_packets + bus->dhd->rx_packets), + brcmf_dump_pct(strbuf, ", pkts/int", + (bus->drvr->tx_packets + bus->drvr->rx_packets), bus->intrcount); - bcm_bprintf(strbuf, "\n\n"); + brcmu_bprintf(strbuf, "\n\n"); } #ifdef SDTEST if (bus->pktgen_count) { - bcm_bprintf(strbuf, "pktgen config and count:\n"); - bcm_bprintf(strbuf, + brcmu_bprintf(strbuf, "pktgen config and count:\n"); + brcmu_bprintf(strbuf, "freq %d count %d print %d total %d min %d len %d\n", bus->pktgen_freq, bus->pktgen_count, bus->pktgen_print, bus->pktgen_total, bus->pktgen_minlen, bus->pktgen_maxlen); - bcm_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n", + brcmu_bprintf(strbuf, "send attempts %d rcvd %d fail %d\n", bus->pktgen_sent, bus->pktgen_rcvd, bus->pktgen_fail); } #endif /* SDTEST */ -#ifdef DHD_DEBUG - bcm_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n", - bus->dpc_sched, - (bcmsdh_intr_pending(bus->sdh) ? " " : " not ")); - bcm_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize, +#ifdef BCMDBG + brcmu_bprintf(strbuf, "dpc_sched %d host interrupt%spending\n", + bus->dpc_sched, " not "); + brcmu_bprintf(strbuf, "blocksize %d roundup %d\n", bus->blocksize, bus->roundup); -#endif /* DHD_DEBUG */ - bcm_bprintf(strbuf, +#endif /* BCMDBG */ + brcmu_bprintf(strbuf, "clkstate %d activity %d idletime %d idlecount %d sleeping %d\n", bus->clkstate, bus->activity, bus->idletime, bus->idlecount, bus->sleeping); } -void dhd_bus_clearcounts(dhd_pub_t *dhdp) +void brcmf_bus_clearcounts(struct brcmf_pub *drvr) { - dhd_bus_t *bus = (dhd_bus_t *) dhdp->bus; + struct brcmf_bus *bus = (struct brcmf_bus *) drvr->bus; bus->intrcount = bus->lastintrs = bus->spurious = bus->regfails = 0; bus->rxrtx = bus->rx_toolong = bus->rxc_errors = 0; @@ -1670,11 +2071,11 @@ void dhd_bus_clearcounts(dhd_pub_t *dhdp) } #ifdef SDTEST -static int dhdsdio_pktgen_get(dhd_bus_t *bus, u8 *arg) +static int brcmf_sdbrcm_pktgen_get(struct brcmf_bus *bus, u8 *arg) { - dhd_pktgen_t pktgen; + struct brcmf_pktgen pktgen; - pktgen.version = DHD_PKTGEN_VERSION; + pktgen.version = BRCMF_PKTGEN_VERSION; pktgen.freq = bus->pktgen_freq; pktgen.count = bus->pktgen_count; pktgen.print = bus->pktgen_print; @@ -1692,13 +2093,13 @@ static int dhdsdio_pktgen_get(dhd_bus_t *bus, u8 *arg) return 0; } -static int dhdsdio_pktgen_set(dhd_bus_t *bus, u8 *arg) +static int brcmf_sdbrcm_pktgen_set(struct brcmf_bus *bus, u8 *arg) { - dhd_pktgen_t pktgen; + struct brcmf_pktgen pktgen; uint oldcnt, oldmode; memcpy(&pktgen, arg, sizeof(pktgen)); - if (pktgen.version != DHD_PKTGEN_VERSION) + if (pktgen.version != BRCMF_PKTGEN_VERSION) return -EINVAL; oldcnt = bus->pktgen_count; @@ -1726,7 +2127,7 @@ static int dhdsdio_pktgen_set(dhd_bus_t *bus, u8 *arg) #endif /* SDTEST */ static int -dhdsdio_membytes(dhd_bus_t *bus, bool write, u32 address, u8 *data, +brcmf_sdbrcm_membytes(struct brcmf_bus *bus, bool write, u32 address, u8 *data, uint size) { int bcmerror = 0; @@ -1741,21 +2142,22 @@ dhdsdio_membytes(dhd_bus_t *bus, bool write, u32 address, u8 *data, dsize = size; /* Set the backplane window to include the start address */ - bcmerror = dhdsdio_set_siaddr_window(bus, address); + bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address); if (bcmerror) { - DHD_ERROR(("%s: window change failed\n", __func__)); + BRCMF_ERROR(("%s: window change failed\n", __func__)); goto xfer_done; } /* Do the transfer(s) */ while (size) { - DHD_INFO(("%s: %s %d bytes at offset 0x%08x in window 0x%08x\n", - __func__, (write ? "write" : "read"), dsize, - sdaddr, (address & SBSDIO_SBWINDOW_MASK))); + BRCMF_INFO(("%s: %s %d bytes at offset 0x%08x in window" + " 0x%08x\n", __func__, (write ? "write" : "read"), + dsize, sdaddr, (address & SBSDIO_SBWINDOW_MASK))); bcmerror = - bcmsdh_rwdata(bus->sdh, write, sdaddr, data, dsize); + brcmf_sdcard_rwdata(bus->card, write, sdaddr, data, dsize); if (bcmerror) { - DHD_ERROR(("%s: membytes transfer failed\n", __func__)); + BRCMF_ERROR(("%s: membytes transfer failed\n", + __func__)); break; } @@ -1764,10 +2166,10 @@ dhdsdio_membytes(dhd_bus_t *bus, bool write, u32 address, u8 *data, if (size) { data += dsize; address += dsize; - bcmerror = dhdsdio_set_siaddr_window(bus, address); + bcmerror = brcmf_sdbrcm_set_siaddr_window(bus, address); if (bcmerror) { - DHD_ERROR(("%s: window change failed\n", - __func__)); + BRCMF_ERROR(("%s: window change failed\n", + __func__)); break; } sdaddr = 0; @@ -1777,43 +2179,45 @@ dhdsdio_membytes(dhd_bus_t *bus, bool write, u32 address, u8 *data, xfer_done: /* Return the window to backplane enumeration space for core access */ - if (dhdsdio_set_siaddr_window(bus, bcmsdh_cur_sbwad(bus->sdh))) { - DHD_ERROR(("%s: FAILED to set window back to 0x%x\n", - __func__, bcmsdh_cur_sbwad(bus->sdh))); + if (brcmf_sdbrcm_set_siaddr_window(bus, + brcmf_sdcard_cur_sbwad(bus->card))) { + BRCMF_ERROR(("%s: FAILED to set window back to 0x%x\n", + __func__, brcmf_sdcard_cur_sbwad(bus->card))); } return bcmerror; } -#ifdef DHD_DEBUG -static int dhdsdio_readshared(dhd_bus_t *bus, sdpcm_shared_t *sh) +#ifdef BCMDBG +static int brcmf_sdbrcm_readshared(struct brcmf_bus *bus, struct sdpcm_shared *sh) { u32 addr; int rv; /* Read last word in memory to determine address of sdpcm_shared structure */ - rv = dhdsdio_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr, 4); + rv = brcmf_sdbrcm_membytes(bus, false, bus->ramsize - 4, (u8 *)&addr, + 4); if (rv < 0) return rv; addr = le32_to_cpu(addr); - DHD_INFO(("sdpcm_shared address 0x%08X\n", addr)); + BRCMF_INFO(("sdpcm_shared address 0x%08X\n", addr)); /* * Check if addr is valid. * NVRAM length at the end of memory should have been overwritten. */ if (addr == 0 || ((~addr >> 16) & 0xffff) == (addr & 0xffff)) { - DHD_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n", - __func__, addr)); + BRCMF_ERROR(("%s: address (0x%08x) of sdpcm_shared invalid\n", + __func__, addr)); return -EBADE; } - /* Read hndrte_shared structure */ - rv = dhdsdio_membytes(bus, false, addr, (u8 *) sh, - sizeof(sdpcm_shared_t)); + /* Read rte_shared structure */ + rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *) sh, + sizeof(struct sdpcm_shared)); if (rv < 0) return rv; @@ -1827,28 +2231,28 @@ static int dhdsdio_readshared(dhd_bus_t *bus, sdpcm_shared_t *sh) sh->msgtrace_addr = le32_to_cpu(sh->msgtrace_addr); if ((sh->flags & SDPCM_SHARED_VERSION_MASK) != SDPCM_SHARED_VERSION) { - DHD_ERROR(("%s: sdpcm_shared version %d in dhd " - "is different than sdpcm_shared version %d in dongle\n", - __func__, SDPCM_SHARED_VERSION, - sh->flags & SDPCM_SHARED_VERSION_MASK)); + BRCMF_ERROR(("%s: sdpcm_shared version %d in brcmf " + "is different than sdpcm_shared version %d in dongle\n", + __func__, SDPCM_SHARED_VERSION, + sh->flags & SDPCM_SHARED_VERSION_MASK)); return -EBADE; } return 0; } -static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) +static int brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, u8 *data, uint size) { int bcmerror = 0; uint msize = 512; char *mbuffer = NULL; uint maxstrlen = 256; char *str = NULL; - trap_t tr; - sdpcm_shared_t sdpcm_shared; - struct bcmstrbuf strbuf; + struct brcmf_trap tr; + struct sdpcm_shared sdpcm_shared; + struct brcmu_strbuf strbuf; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); if (data == NULL) { /* @@ -1858,8 +2262,8 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) size = msize; mbuffer = data = kmalloc(msize, GFP_ATOMIC); if (mbuffer == NULL) { - DHD_ERROR(("%s: kmalloc(%d) failed\n", __func__, - msize)); + BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__, + msize)); bcmerror = -ENOMEM; goto done; } @@ -1867,18 +2271,18 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) str = kmalloc(maxstrlen, GFP_ATOMIC); if (str == NULL) { - DHD_ERROR(("%s: kmalloc(%d) failed\n", __func__, maxstrlen)); + BRCMF_ERROR(("%s: kmalloc(%d) failed\n", __func__, maxstrlen)); bcmerror = -ENOMEM; goto done; } - bcmerror = dhdsdio_readshared(bus, &sdpcm_shared); + bcmerror = brcmf_sdbrcm_readshared(bus, &sdpcm_shared); if (bcmerror < 0) goto done; - bcm_binit(&strbuf, data, size); + brcmu_binit(&strbuf, data, size); - bcm_bprintf(&strbuf, + brcmu_bprintf(&strbuf, "msgtrace address : 0x%08X\nconsole address : 0x%08X\n", sdpcm_shared.msgtrace_addr, sdpcm_shared.console_addr); @@ -1887,7 +2291,7 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) * (Avoids conflict with real asserts for programmatic * parsing of output.) */ - bcm_bprintf(&strbuf, "Assrt not built in dongle\n"); + brcmu_bprintf(&strbuf, "Assrt not built in dongle\n"); } if ((sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) == @@ -1896,49 +2300,49 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) * (Avoids conflict with real asserts for programmatic * parsing of output.) */ - bcm_bprintf(&strbuf, "No trap%s in dongle", + brcmu_bprintf(&strbuf, "No trap%s in dongle", (sdpcm_shared.flags & SDPCM_SHARED_ASSERT_BUILT) ? "/assrt" : ""); } else { if (sdpcm_shared.flags & SDPCM_SHARED_ASSERT) { /* Download assert */ - bcm_bprintf(&strbuf, "Dongle assert"); + brcmu_bprintf(&strbuf, "Dongle assert"); if (sdpcm_shared.assert_exp_addr != 0) { str[0] = '\0'; - bcmerror = dhdsdio_membytes(bus, false, + bcmerror = brcmf_sdbrcm_membytes(bus, false, sdpcm_shared.assert_exp_addr, (u8 *) str, maxstrlen); if (bcmerror < 0) goto done; str[maxstrlen - 1] = '\0'; - bcm_bprintf(&strbuf, " expr \"%s\"", str); + brcmu_bprintf(&strbuf, " expr \"%s\"", str); } if (sdpcm_shared.assert_file_addr != 0) { str[0] = '\0'; - bcmerror = dhdsdio_membytes(bus, false, + bcmerror = brcmf_sdbrcm_membytes(bus, false, sdpcm_shared.assert_file_addr, (u8 *) str, maxstrlen); if (bcmerror < 0) goto done; str[maxstrlen - 1] = '\0'; - bcm_bprintf(&strbuf, " file \"%s\"", str); + brcmu_bprintf(&strbuf, " file \"%s\"", str); } - bcm_bprintf(&strbuf, " line %d ", + brcmu_bprintf(&strbuf, " line %d ", sdpcm_shared.assert_line); } if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) { - bcmerror = dhdsdio_membytes(bus, false, + bcmerror = brcmf_sdbrcm_membytes(bus, false, sdpcm_shared.trap_addr, (u8 *)&tr, - sizeof(trap_t)); + sizeof(struct brcmf_trap)); if (bcmerror < 0) goto done; - bcm_bprintf(&strbuf, + brcmu_bprintf(&strbuf, "Dongle trap type 0x%x @ epc 0x%x, cpsr 0x%x, spsr 0x%x, sp 0x%x," "lp 0x%x, rpc 0x%x Trap offset 0x%x, " "r0 0x%x, r1 0x%x, r2 0x%x, r3 0x%x, r4 0x%x, r5 0x%x, r6 0x%x, r7 0x%x\n", @@ -1950,14 +2354,14 @@ static int dhdsdio_checkdied(dhd_bus_t *bus, u8 *data, uint size) } if (sdpcm_shared.flags & (SDPCM_SHARED_ASSERT | SDPCM_SHARED_TRAP)) - DHD_ERROR(("%s: %s\n", __func__, strbuf.origbuf)); + BRCMF_ERROR(("%s: %s\n", __func__, strbuf.origbuf)); -#ifdef DHD_DEBUG +#ifdef BCMDBG if (sdpcm_shared.flags & SDPCM_SHARED_TRAP) { /* Mem dump to a file on device */ - dhdsdio_mem_dump(bus); + brcmf_sdbrcm_mem_dump(bus); } -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ done: kfree(mbuffer); @@ -1966,7 +2370,7 @@ done: return bcmerror; } -static int dhdsdio_mem_dump(dhd_bus_t *bus) +static int brcmf_sdbrcm_mem_dump(struct brcmf_bus *bus) { int ret = 0; int size; /* Full mem size */ @@ -1978,7 +2382,7 @@ static int dhdsdio_mem_dump(dhd_bus_t *bus) size = bus->ramsize; buf = kmalloc(size, GFP_ATOMIC); if (!buf) { - DHD_ERROR(("%s: Out of memory (%d bytes)\n", __func__, size)); + BRCMF_ERROR(("%s: Out of memory (%d bytes)\n", __func__, size)); return -1; } @@ -1987,9 +2391,10 @@ static int dhdsdio_mem_dump(dhd_bus_t *bus) databuf = buf; while (size) { read_size = min(MEMBLOCK, size); - ret = dhdsdio_membytes(bus, false, start, databuf, read_size); + ret = brcmf_sdbrcm_membytes(bus, false, start, databuf, + read_size); if (ret) { - DHD_ERROR(("%s: Error membytes %d\n", __func__, ret)); + BRCMF_ERROR(("%s: Error membytes %d\n", __func__, ret)); kfree(buf); return -1; } @@ -2003,20 +2408,20 @@ static int dhdsdio_mem_dump(dhd_bus_t *bus) printk(KERN_DEBUG "Done\n"); /* free buf before return !!! */ - if (write_to_file(bus->dhd, buf, bus->ramsize)) { - DHD_ERROR(("%s: Error writing to files\n", __func__)); + if (brcmf_write_to_file(bus->drvr, buf, bus->ramsize)) { + BRCMF_ERROR(("%s: Error writing to files\n", __func__)); return -1; } - /* buf free handled in write_to_file, not here */ + /* buf free handled in brcmf_write_to_file, not here */ return 0; } #define CONSOLE_LINE_MAX 192 -static int dhdsdio_readconsole(dhd_bus_t *bus) +static int brcmf_sdbrcm_readconsole(struct brcmf_bus *bus) { - dhd_console_t *c = &bus->console; + struct brcmf_console *c = &bus->console; u8 line[CONSOLE_LINE_MAX], ch; u32 n, idx, addr; int rv; @@ -2026,8 +2431,8 @@ static int dhdsdio_readconsole(dhd_bus_t *bus) return 0; /* Read console log struct */ - addr = bus->console_addr + offsetof(hndrte_cons_t, log); - rv = dhdsdio_membytes(bus, false, addr, (u8 *)&c->log, + addr = bus->console_addr + offsetof(struct rte_console, log); + rv = brcmf_sdbrcm_membytes(bus, false, addr, (u8 *)&c->log, sizeof(c->log)); if (rv < 0) return rv; @@ -2053,7 +2458,7 @@ static int dhdsdio_readconsole(dhd_bus_t *bus) /* Read the console buffer */ addr = le32_to_cpu(c->log.buf); - rv = dhdsdio_membytes(bus, false, addr, c->buf, c->bufsize); + rv = brcmf_sdbrcm_membytes(bus, false, addr, c->buf, c->bufsize); if (rv < 0) return rv; @@ -2089,16 +2494,16 @@ break2: return 0; } -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ -int dhdsdio_downloadvars(dhd_bus_t *bus, void *arg, int len) +int brcmf_sdbrcm_downloadvars(struct brcmf_bus *bus, void *arg, int len) { int bcmerror = 0; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* Basic sanity checks */ - if (bus->dhd->up) { + if (bus->drvr->up) { bcmerror = -EISCONN; goto err; } @@ -2125,7 +2530,7 @@ err: } static int -dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, +brcmf_sdbrcm_doiovar(struct brcmf_bus *bus, const struct brcmu_iovar *vi, u32 actionid, const char *name, void *params, int plen, void *arg, int len, int val_size) { @@ -2133,11 +2538,11 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, s32 int_val = 0; bool bool_val = 0; - DHD_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p " - "len %d val_size %d\n", - __func__, actionid, name, params, plen, arg, len, val_size)); + BRCMF_TRACE(("%s: Enter, action %d name %s params %p plen %d arg %p " + "len %d val_size %d\n", __func__, actionid, name, params, + plen, arg, len, val_size)); - bcmerror = bcm_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid)); + bcmerror = brcmu_iovar_lencheck(vi, arg, len, IOV_ISSET(actionid)); if (bcmerror != 0) goto exit; @@ -2147,10 +2552,10 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, bool_val = (int_val != 0) ? true : false; /* Some ioctls use the bus */ - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); /* Check if dongle is in reset. If so, only allow DEVRESET iovars */ - if (bus->dhd->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) || + if (bus->drvr->dongle_reset && !(actionid == IOV_SVAL(IOV_DEVRESET) || actionid == IOV_GVAL(IOV_DEVRESET))) { bcmerror = -EPERM; goto exit; @@ -2159,7 +2564,7 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, /* Handle sleep stuff before any clock mucking */ if (vi->varid == IOV_SLEEP) { if (IOV_ISSET(actionid)) { - bcmerror = dhdsdio_bussleep(bus, bool_val); + bcmerror = brcmf_sdbrcm_bussleep(bus, bool_val); } else { int_val = (s32) bus->sleeping; memcpy(arg, &int_val, val_size); @@ -2168,9 +2573,9 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, } /* Request clock to allow SDIO accesses */ - if (!bus->dhd->dongle_reset) { + if (!bus->drvr->dongle_reset) { BUS_WAKE(bus); - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); } switch (actionid) { @@ -2182,15 +2587,13 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, case IOV_SVAL(IOV_INTR): bus->intr = bool_val; bus->intdis = false; - if (bus->dhd->up) { + if (bus->drvr->up) { + BRCMF_INTR(("%s: %s SDIO interrupts\n", __func__, + bus->intr ? "enable" : "disable")); if (bus->intr) { - DHD_INTR(("%s: enable SDIO device interrupts\n", - __func__)); - bcmsdh_intr_enable(bus->sdh); + brcmf_sdcard_intr_enable(bus->card); } else { - DHD_INTR(("%s: disable SDIO interrupts\n", - __func__)); - bcmsdh_intr_disable(bus->sdh); + brcmf_sdcard_intr_disable(bus->card); } } break; @@ -2211,7 +2614,7 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, break; case IOV_SVAL(IOV_IDLETIME): - if ((int_val < 0) && (int_val != DHD_IDLE_IMMEDIATE)) + if ((int_val < 0) && (int_val != BRCMF_IDLE_IMMEDIATE)) bcmerror = -EINVAL; else bus->idletime = int_val; @@ -2244,8 +2647,6 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, bool set = (actionid == IOV_SVAL(IOV_MEMBYTES)); - ASSERT(plen >= 2 * sizeof(int)); - address = (u32) int_val; memcpy(&int_val, (char *)params + sizeof(int_val), sizeof(int_val)); @@ -2254,25 +2655,25 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, /* Do some validation */ dsize = set ? plen - (2 * sizeof(int)) : len; if (dsize < size) { - DHD_ERROR(("%s: error on %s membytes, addr " - "0x%08x size %d dsize %d\n", - __func__, (set ? "set" : "get"), - address, size, dsize)); + BRCMF_ERROR(("%s: error on %s membytes, addr " + "0x%08x size %d dsize %d\n", + __func__, (set ? "set" : "get"), + address, size, dsize)); bcmerror = -EINVAL; break; } - DHD_INFO(("%s: Request to %s %d bytes at address " - "0x%08x\n", - __func__, (set ? "write" : "read"), size, address)); + BRCMF_INFO(("%s: Request to %s %d bytes at address " + "0x%08x\n", __func__, + (set ? "write" : "read"), size, address)); /* If we know about SOCRAM, check for a fit */ if ((bus->orig_ramsize) && ((address > bus->orig_ramsize) || (address + size > bus->orig_ramsize))) { - DHD_ERROR(("%s: ramsize 0x%08x doesn't have %d " - "bytes at 0x%08x\n", - __func__, bus->orig_ramsize, size, address)); + BRCMF_ERROR(("%s: ramsize 0x%08x doesn't have" + " %d bytes at 0x%08x\n", __func__, + bus->orig_ramsize, size, address)); bcmerror = -EINVAL; break; } @@ -2283,8 +2684,8 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, 2 * sizeof(int) : (u8 *) arg; /* Call to do the transfer */ - bcmerror = - dhdsdio_membytes(bus, set, address, data, size); + bcmerror = brcmf_sdbrcm_membytes(bus, set, address, + data, size); break; } @@ -2295,33 +2696,33 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, break; case IOV_GVAL(IOV_SDIOD_DRIVE): - int_val = (s32) dhd_sdiod_drive_strength; + int_val = (s32) brcmf_sdiod_drive_strength; memcpy(arg, &int_val, val_size); break; case IOV_SVAL(IOV_SDIOD_DRIVE): - dhd_sdiod_drive_strength = int_val; - dhdsdio_sdiod_drive_strength_init(bus, - dhd_sdiod_drive_strength); + brcmf_sdiod_drive_strength = int_val; + brcmf_sdbrcm_sdiod_drive_strength_init(bus, + brcmf_sdiod_drive_strength); break; case IOV_SVAL(IOV_DOWNLOAD): - bcmerror = dhdsdio_download_state(bus, bool_val); + bcmerror = brcmf_sdbrcm_download_state(bus, bool_val); break; case IOV_SVAL(IOV_VARS): - bcmerror = dhdsdio_downloadvars(bus, arg, len); + bcmerror = brcmf_sdbrcm_downloadvars(bus, arg, len); break; case IOV_GVAL(IOV_READAHEAD): - int_val = (s32) dhd_readahead; + int_val = (s32) brcmf_readahead; memcpy(arg, &int_val, val_size); break; case IOV_SVAL(IOV_READAHEAD): - if (bool_val && !dhd_readahead) + if (bool_val && !brcmf_readahead) bus->nextlen = 0; - dhd_readahead = bool_val; + brcmf_readahead = bool_val; break; case IOV_GVAL(IOV_SDRXCHAIN): @@ -2336,40 +2737,56 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, bus->use_rxchain = bool_val; break; case IOV_GVAL(IOV_ALIGNCTL): - int_val = (s32) dhd_alignctl; + int_val = (s32) brcmf_alignctl; memcpy(arg, &int_val, val_size); break; case IOV_SVAL(IOV_ALIGNCTL): - dhd_alignctl = bool_val; + brcmf_alignctl = bool_val; break; case IOV_GVAL(IOV_SDALIGN): - int_val = DHD_SDALIGN; + int_val = BRCMF_SDALIGN; memcpy(arg, &int_val, val_size); break; -#ifdef DHD_DEBUG +#ifdef BCMDBG case IOV_GVAL(IOV_VARS): if (bus->varsz < (uint) len) memcpy(arg, bus->vars, bus->varsz); else bcmerror = -EOVERFLOW; break; -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ + +#ifdef BCMDBG + case IOV_GVAL(IOV_DCONSOLE_POLL): + int_val = (s32) brcmf_console_ms; + memcpy(arg, &int_val, val_size); + break; + + case IOV_SVAL(IOV_DCONSOLE_POLL): + brcmf_console_ms = (uint) int_val; + break; + + case IOV_SVAL(IOV_CONS): + if (len > 0) + bcmerror = brcmf_sdbrcm_bus_console_in(bus->drvr, + arg, len - 1); + break; -#ifdef DHD_DEBUG case IOV_GVAL(IOV_SDREG): { - sdreg_t *sd_ptr; + struct brcmf_sdreg *sd_ptr; u32 addr, size; - sd_ptr = (sdreg_t *) params; + sd_ptr = (struct brcmf_sdreg *) params; - addr = (unsigned long)bus->regs + sd_ptr->offset; + addr = bus->ci->buscorebase + sd_ptr->offset; size = sd_ptr->func; - int_val = (s32) bcmsdh_reg_read(bus->sdh, addr, size); - if (bcmsdh_regfail(bus->sdh)) + int_val = (s32) brcmf_sdcard_reg_read(bus->card, addr, + size); + if (brcmf_sdcard_regfail(bus->card)) bcmerror = -EIO; memcpy(arg, &int_val, sizeof(s32)); break; @@ -2377,15 +2794,16 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, case IOV_SVAL(IOV_SDREG): { - sdreg_t *sd_ptr; + struct brcmf_sdreg *sd_ptr; u32 addr, size; - sd_ptr = (sdreg_t *) params; + sd_ptr = (struct brcmf_sdreg *) params; - addr = (unsigned long)bus->regs + sd_ptr->offset; + addr = bus->ci->buscorebase + sd_ptr->offset; size = sd_ptr->func; - bcmsdh_reg_write(bus->sdh, addr, size, sd_ptr->value); - if (bcmsdh_regfail(bus->sdh)) + brcmf_sdcard_reg_write(bus->card, addr, size, + sd_ptr->value); + if (brcmf_sdcard_regfail(bus->card)) bcmerror = -EIO; break; } @@ -2394,15 +2812,16 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, (not SDIO core) */ case IOV_GVAL(IOV_SBREG): { - sdreg_t sdreg; + struct brcmf_sdreg sdreg; u32 addr, size; memcpy(&sdreg, params, sizeof(sdreg)); addr = SI_ENUM_BASE + sdreg.offset; size = sdreg.func; - int_val = (s32) bcmsdh_reg_read(bus->sdh, addr, size); - if (bcmsdh_regfail(bus->sdh)) + int_val = (s32) brcmf_sdcard_reg_read(bus->card, addr, + size); + if (brcmf_sdcard_regfail(bus->card)) bcmerror = -EIO; memcpy(arg, &int_val, sizeof(s32)); break; @@ -2410,15 +2829,16 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, case IOV_SVAL(IOV_SBREG): { - sdreg_t sdreg; + struct brcmf_sdreg sdreg; u32 addr, size; memcpy(&sdreg, params, sizeof(sdreg)); addr = SI_ENUM_BASE + sdreg.offset; size = sdreg.func; - bcmsdh_reg_write(bus->sdh, addr, size, sdreg.value); - if (bcmsdh_regfail(bus->sdh)) + brcmf_sdcard_reg_write(bus->card, addr, size, + sdreg.value); + if (brcmf_sdcard_regfail(bus->card)) bcmerror = -EIO; break; } @@ -2428,15 +2848,15 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, *(char *)arg = 0; strcat(arg, "\nFunc 0\n"); - bcmsdh_cis_read(bus->sdh, 0x10, + brcmf_sdcard_cis_read(bus->card, 0x10, (u8 *) arg + strlen(arg), SBSDIO_CIS_SIZE_LIMIT); strcat(arg, "\nFunc 1\n"); - bcmsdh_cis_read(bus->sdh, 0x11, + brcmf_sdcard_cis_read(bus->card, 0x11, (u8 *) arg + strlen(arg), SBSDIO_CIS_SIZE_LIMIT); strcat(arg, "\nFunc 2\n"); - bcmsdh_cis_read(bus->sdh, 0x12, + brcmf_sdcard_cis_read(bus->card, 0x12, (u8 *) arg + strlen(arg), SBSDIO_CIS_SIZE_LIMIT); break; @@ -2452,32 +2872,32 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, break; case IOV_GVAL(IOV_TXBOUND): - int_val = (s32) dhd_txbound; + int_val = (s32) brcmf_txbound; memcpy(arg, &int_val, val_size); break; case IOV_SVAL(IOV_TXBOUND): - dhd_txbound = (uint) int_val; + brcmf_txbound = (uint) int_val; break; case IOV_GVAL(IOV_RXBOUND): - int_val = (s32) dhd_rxbound; + int_val = (s32) brcmf_rxbound; memcpy(arg, &int_val, val_size); break; case IOV_SVAL(IOV_RXBOUND): - dhd_rxbound = (uint) int_val; + brcmf_rxbound = (uint) int_val; break; case IOV_GVAL(IOV_TXMINMAX): - int_val = (s32) dhd_txminmax; + int_val = (s32) brcmf_txminmax; memcpy(arg, &int_val, val_size); break; case IOV_SVAL(IOV_TXMINMAX): - dhd_txminmax = (uint) int_val; + brcmf_txminmax = (uint) int_val; break; -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ #ifdef SDTEST case IOV_GVAL(IOV_EXTLOOP): @@ -2490,31 +2910,44 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, break; case IOV_GVAL(IOV_PKTGEN): - bcmerror = dhdsdio_pktgen_get(bus, arg); + bcmerror = brcmf_sdbrcm_pktgen_get(bus, arg); break; case IOV_SVAL(IOV_PKTGEN): - bcmerror = dhdsdio_pktgen_set(bus, arg); + bcmerror = brcmf_sdbrcm_pktgen_set(bus, arg); break; #endif /* SDTEST */ case IOV_SVAL(IOV_DEVRESET): - DHD_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d " - "busstate=%d\n", - __func__, bool_val, bus->dhd->dongle_reset, - bus->dhd->busstate)); + BRCMF_TRACE(("%s: Called set IOV_DEVRESET=%d dongle_reset=%d " + "busstate=%d\n", + __func__, bool_val, bus->drvr->dongle_reset, + bus->drvr->busstate)); - dhd_bus_devreset(bus->dhd, (u8) bool_val); + brcmf_bus_devreset(bus->drvr, (u8) bool_val); break; case IOV_GVAL(IOV_DEVRESET): - DHD_TRACE(("%s: Called get IOV_DEVRESET\n", __func__)); + BRCMF_TRACE(("%s: Called get IOV_DEVRESET\n", __func__)); /* Get its status */ - int_val = (bool) bus->dhd->dongle_reset; + int_val = (bool) bus->drvr->dongle_reset; + memcpy(arg, &int_val, val_size); + + break; + + case IOV_GVAL(IOV_WDTICK): + int_val = (s32) brcmf_watchdog_ms; memcpy(arg, &int_val, val_size); + break; + case IOV_SVAL(IOV_WDTICK): + if (!bus->drvr->up) { + bcmerror = -ENOLINK; + break; + } + brcmf_sdbrcm_wd_timer(bus, (uint) int_val); break; default: @@ -2523,29 +2956,29 @@ dhdsdio_doiovar(dhd_bus_t *bus, const bcm_iovar_t *vi, u32 actionid, } exit: - if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) { + if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) { bus->activity = false; - dhdsdio_clkctl(bus, CLK_NONE, true); + brcmf_sdbrcm_clkctl(bus, CLK_NONE, true); } - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); if (actionid == IOV_SVAL(IOV_DEVRESET) && bool_val == false) - dhd_preinit_ioctls((dhd_pub_t *) bus->dhd); + brcmf_c_preinit_ioctls(bus->drvr); return bcmerror; } -static int dhdsdio_write_vars(dhd_bus_t *bus) +static int brcmf_sdbrcm_write_vars(struct brcmf_bus *bus) { int bcmerror = 0; u32 varsize; u32 varaddr; u8 *vbuffer; u32 varsizew; -#ifdef DHD_DEBUG +#ifdef BCMDBG char *nvram_ularray; -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ /* Even if there are no vars are to be written, we still need to set the ramsize. */ @@ -2561,10 +2994,10 @@ static int dhdsdio_write_vars(dhd_bus_t *bus) /* Write the vars list */ bcmerror = - dhdsdio_membytes(bus, true, varaddr, vbuffer, varsize); -#ifdef DHD_DEBUG + brcmf_sdbrcm_membytes(bus, true, varaddr, vbuffer, varsize); +#ifdef BCMDBG /* Verify NVRAM bytes */ - DHD_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize)); + BRCMF_INFO(("Compare NVRAM dl & ul; varsize=%d\n", varsize)); nvram_ularray = kmalloc(varsize, GFP_ATOMIC); if (!nvram_ularray) return -ENOMEM; @@ -2574,30 +3007,31 @@ static int dhdsdio_write_vars(dhd_bus_t *bus) /* Read the vars list to temp buffer for comparison */ bcmerror = - dhdsdio_membytes(bus, false, varaddr, nvram_ularray, + brcmf_sdbrcm_membytes(bus, false, varaddr, nvram_ularray, varsize); if (bcmerror) { - DHD_ERROR(("%s: error %d on reading %d nvram bytes at " - "0x%08x\n", __func__, bcmerror, varsize, varaddr)); + BRCMF_ERROR(("%s: error %d on reading %d nvram bytes" + " at 0x%08x\n", __func__, bcmerror, + varsize, varaddr)); } /* Compare the org NVRAM with the one read from RAM */ if (memcmp(vbuffer, nvram_ularray, varsize)) { - DHD_ERROR(("%s: Downloaded NVRAM image is corrupted.\n", - __func__)); + BRCMF_ERROR(("%s: Downloaded NVRAM image is " + "corrupted.\n", __func__)); } else - DHD_ERROR(("%s: Download/Upload/Compare of NVRAM ok.\n", - __func__)); + BRCMF_ERROR(("%s: Download/Upload/Compare of" + " NVRAM ok.\n", __func__)); kfree(nvram_ularray); -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ kfree(vbuffer); } /* adjust to the user specified RAM */ - DHD_INFO(("Physical memory size: %d, usable memory size: %d\n", - bus->orig_ramsize, bus->ramsize)); - DHD_INFO(("Vars are at %d, orig varsize is %d\n", varaddr, varsize)); + BRCMF_INFO(("Physical memory size: %d, usable memory size: %d\n", + bus->orig_ramsize, bus->ramsize)); + BRCMF_INFO(("Vars are at %d, orig varsize is %d\n", varaddr, varsize)); varsize = ((bus->orig_ramsize - 4) - varaddr); /* @@ -2613,17 +3047,17 @@ static int dhdsdio_write_vars(dhd_bus_t *bus) varsizew = cpu_to_le32(varsizew); } - DHD_INFO(("New varsize is %d, length token=0x%08x\n", varsize, - varsizew)); + BRCMF_INFO(("New varsize is %d, length token=0x%08x\n", varsize, + varsizew)); /* Write the length token to the last word */ - bcmerror = dhdsdio_membytes(bus, true, (bus->orig_ramsize - 4), + bcmerror = brcmf_sdbrcm_membytes(bus, true, (bus->orig_ramsize - 4), (u8 *)&varsizew, 4); return bcmerror; } -static int dhdsdio_download_state(dhd_bus_t *bus, bool enter) +static int brcmf_sdbrcm_download_state(struct brcmf_bus *bus, bool enter) { uint retries; u32 regdata; @@ -2635,139 +3069,114 @@ static int dhdsdio_download_state(dhd_bus_t *bus, bool enter) if (enter) { bus->alp_only = true; - dhdsdio_chip_disablecore(bus->sdh, bus->ci->armcorebase); + brcmf_sdbrcm_chip_disablecore(bus->card, bus->ci->armcorebase); - dhdsdio_chip_resetcore(bus->sdh, bus->ci->ramcorebase); + brcmf_sdbrcm_chip_resetcore(bus->card, bus->ci->ramcorebase); /* Clear the top bit of memory */ if (bus->ramsize) { u32 zeros = 0; - dhdsdio_membytes(bus, true, bus->ramsize - 4, + brcmf_sdbrcm_membytes(bus, true, bus->ramsize - 4, (u8 *)&zeros, 4); } } else { - regdata = bcmsdh_reg_read(bus->sdh, + regdata = brcmf_sdcard_reg_read(bus->card, CORE_SB(bus->ci->ramcorebase, sbtmstatelow), 4); regdata &= (SBTML_RESET | SBTML_REJ_MASK | (SICF_CLOCK_EN << SBTML_SICF_SHIFT)); if ((SICF_CLOCK_EN << SBTML_SICF_SHIFT) != regdata) { - DHD_ERROR(("%s: SOCRAM core is down after reset?\n", - __func__)); + BRCMF_ERROR(("%s: SOCRAM core is down after reset?\n", + __func__)); bcmerror = -EBADE; goto fail; } - bcmerror = dhdsdio_write_vars(bus); + bcmerror = brcmf_sdbrcm_write_vars(bus); if (bcmerror) { - DHD_ERROR(("%s: no vars written to RAM\n", __func__)); + BRCMF_ERROR(("%s: no vars written to RAM\n", __func__)); bcmerror = 0; } - W_SDREG(0xFFFFFFFF, &bus->regs->intstatus, retries); + w_sdreg32(bus, 0xFFFFFFFF, + offsetof(struct sdpcmd_regs, intstatus), &retries); - dhdsdio_chip_resetcore(bus->sdh, bus->ci->armcorebase); + brcmf_sdbrcm_chip_resetcore(bus->card, bus->ci->armcorebase); /* Allow HT Clock now that the ARM is running. */ bus->alp_only = false; - bus->dhd->busstate = DHD_BUS_LOAD; + bus->drvr->busstate = BRCMF_BUS_LOAD; } fail: return bcmerror; } int -dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name, - void *params, int plen, void *arg, int len, bool set) +brcmf_sdbrcm_bus_iovar_op(struct brcmf_pub *drvr, const char *name, + void *params, int plen, void *arg, int len, bool set) { - dhd_bus_t *bus = dhdp->bus; - const bcm_iovar_t *vi = NULL; + struct brcmf_bus *bus = drvr->bus; + const struct brcmu_iovar *vi = NULL; int bcmerror = 0; int val_size; u32 actionid; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - ASSERT(name); - ASSERT(len >= 0); + if (name == NULL || len <= 0) + return -EINVAL; - /* Get MUST have return space */ - ASSERT(set || (arg && len)); + /* Set does not take qualifiers */ + if (set && (params || plen)) + return -EINVAL; - /* Set does NOT take qualifiers */ - ASSERT(!set || (!params && !plen)); + /* Get must have return space;*/ + if (!set && !(arg && len)) + return -EINVAL; /* Look up var locally; if not found pass to host driver */ - vi = bcm_iovar_lookup(dhdsdio_iovars, name); + vi = brcmu_iovar_lookup(brcmf_sdio_iovars, name); if (vi == NULL) { - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); BUS_WAKE(bus); /* Turn on clock in case SD command needs backplane */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); + + bcmerror = brcmf_sdcard_iovar_op(bus->card, name, params, plen, + arg, len, set); - bcmerror = - bcmsdh_iovar_op(bus->sdh, name, params, plen, arg, len, - set); - - /* Check for bus configuration changes of interest */ - - /* If it was divisor change, read the new one */ - if (set && strcmp(name, "sd_divisor") == 0) { - if (bcmsdh_iovar_op(bus->sdh, "sd_divisor", NULL, 0, - &bus->sd_divisor, sizeof(s32), - false) != 0) { - bus->sd_divisor = -1; - DHD_ERROR(("%s: fail on %s get\n", __func__, - name)); - } else { - DHD_INFO(("%s: noted %s update, value now %d\n", - __func__, name, bus->sd_divisor)); - } - } - /* If it was a mode change, read the new one */ - if (set && strcmp(name, "sd_mode") == 0) { - if (bcmsdh_iovar_op(bus->sdh, "sd_mode", NULL, 0, - &bus->sd_mode, sizeof(s32), - false) != 0) { - bus->sd_mode = -1; - DHD_ERROR(("%s: fail on %s get\n", __func__, - name)); - } else { - DHD_INFO(("%s: noted %s update, value now %d\n", - __func__, name, bus->sd_mode)); - } - } /* Similar check for blocksize change */ if (set && strcmp(name, "sd_blocksize") == 0) { s32 fnum = 2; - if (bcmsdh_iovar_op - (bus->sdh, "sd_blocksize", &fnum, sizeof(s32), + if (brcmf_sdcard_iovar_op + (bus->card, "sd_blocksize", &fnum, sizeof(s32), &bus->blocksize, sizeof(s32), false) != 0) { bus->blocksize = 0; - DHD_ERROR(("%s: fail on %s get\n", __func__, - "sd_blocksize")); + BRCMF_ERROR(("%s: fail on %s get\n", __func__, + "sd_blocksize")); } else { - DHD_INFO(("%s: noted %s update, value now %d\n", - __func__, "sd_blocksize", - bus->blocksize)); + BRCMF_INFO(("%s: noted sd_blocksize update," + " value now %d\n", __func__, + bus->blocksize)); } } bus->roundup = min(max_roundup, bus->blocksize); - if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) { + if (bus->idletime == BRCMF_IDLE_IMMEDIATE && + !bus->dpc_sched) { bus->activity = false; - dhdsdio_clkctl(bus, CLK_NONE, true); + brcmf_sdbrcm_clkctl(bus, CLK_NONE, true); } - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); goto exit; } - DHD_CTL(("%s: %s %s, len %d plen %d\n", __func__, - name, (set ? "set" : "get"), len, plen)); + BRCMF_CTL(("%s: %s %s, len %d plen %d\n", __func__, + name, (set ? "set" : "get"), len, plen)); /* set up 'params' pointer in case this is a set command so that * the convenience int and bool code can be common to set and get @@ -2786,168 +3195,188 @@ dhd_bus_iovar_op(dhd_pub_t *dhdp, const char *name, val_size = sizeof(int); actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid); - bcmerror = - dhdsdio_doiovar(bus, vi, actionid, name, params, plen, arg, len, - val_size); + bcmerror = brcmf_sdbrcm_doiovar(bus, vi, actionid, name, params, plen, + arg, len, val_size); exit: return bcmerror; } -void dhd_bus_stop(struct dhd_bus *bus, bool enforce_mutex) +void brcmf_sdbrcm_bus_stop(struct brcmf_bus *bus, bool enforce_mutex) { u32 local_hostintmask; u8 saveclk; uint retries; int err; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); if (enforce_mutex) - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); BUS_WAKE(bus); /* Enable clock for device interrupts */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); + + if (bus->watchdog_tsk) { + send_sig(SIGTERM, bus->watchdog_tsk, 1); + kthread_stop(bus->watchdog_tsk); + bus->watchdog_tsk = NULL; + } + + if (bus->dpc_tsk) { + send_sig(SIGTERM, bus->dpc_tsk, 1); + kthread_stop(bus->dpc_tsk); + bus->dpc_tsk = NULL; + } else + tasklet_kill(&bus->tasklet); /* Disable and clear interrupts at the chip level also */ - W_SDREG(0, &bus->regs->hostintmask, retries); + w_sdreg32(bus, 0, offsetof(struct sdpcmd_regs, hostintmask), &retries); local_hostintmask = bus->hostintmask; bus->hostintmask = 0; /* Change our idea of bus state */ - bus->dhd->busstate = DHD_BUS_DOWN; + bus->drvr->busstate = BRCMF_BUS_DOWN; /* Force clocks on backplane to be sure F2 interrupt propagates */ - saveclk = - bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - &err); + saveclk = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, &err); if (!err) { - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - (saveclk | SBSDIO_FORCE_HT), &err); + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, + (saveclk | SBSDIO_FORCE_HT), &err); } if (err) { - DHD_ERROR(("%s: Failed to force clock for F2: err %d\n", - __func__, err)); + BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n", + __func__, err)); } /* Turn off the bus (F2), free any pending packets */ - DHD_INTR(("%s: disable SDIO interrupts\n", __func__)); - bcmsdh_intr_disable(bus->sdh); - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, + BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__)); + brcmf_sdcard_intr_disable(bus->card); + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1, NULL); /* Clear any pending interrupts now that F2 is disabled */ - W_SDREG(local_hostintmask, &bus->regs->intstatus, retries); + w_sdreg32(bus, local_hostintmask, + offsetof(struct sdpcmd_regs, intstatus), &retries); /* Turn off the backplane clock (only) */ - dhdsdio_clkctl(bus, CLK_SDONLY, false); + brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); /* Clear the data packet queues */ - bcm_pktq_flush(&bus->txq, true, NULL, NULL); + brcmu_pktq_flush(&bus->txq, true, NULL, NULL); /* Clear any held glomming stuff */ if (bus->glomd) - bcm_pkt_buf_free_skb(bus->glomd); + brcmu_pkt_buf_free_skb(bus->glomd); if (bus->glom) - bcm_pkt_buf_free_skb(bus->glom); + brcmu_pkt_buf_free_skb(bus->glom); bus->glom = bus->glomd = NULL; /* Clear rx control and wake any waiters */ bus->rxlen = 0; - dhd_os_ioctl_resp_wake(bus->dhd); + brcmf_os_ioctl_resp_wake(bus->drvr); /* Reset some F2 state stuff */ bus->rxskip = false; bus->tx_seq = bus->rx_seq = 0; if (enforce_mutex) - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); } -int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex) +int brcmf_sdbrcm_bus_init(struct brcmf_pub *drvr, bool enforce_mutex) { - dhd_bus_t *bus = dhdp->bus; - dhd_timeout_t tmo; + struct brcmf_bus *bus = drvr->bus; + struct brcmf_timeout tmo; uint retries = 0; u8 ready, enable; int err, ret = 0; u8 saveclk; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); + + /* try to download image and nvram to the dongle */ + if (drvr->busstate == BRCMF_BUS_DOWN) { + if (!(brcmf_sdbrcm_download_firmware(bus, bus->card))) + return -1; + } - ASSERT(bus->dhd); - if (!bus->dhd) + if (!bus->drvr) return 0; + /* Start the watchdog timer */ + bus->drvr->tickcnt = 0; + brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms); + if (enforce_mutex) - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); /* Make sure backplane clock is on, needed to generate F2 interrupt */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); if (bus->clkstate != CLK_AVAIL) goto exit; /* Force clocks on backplane to be sure F2 interrupt propagates */ saveclk = - bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - &err); + brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, &err); if (!err) { - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - (saveclk | SBSDIO_FORCE_HT), &err); + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, + (saveclk | SBSDIO_FORCE_HT), &err); } if (err) { - DHD_ERROR(("%s: Failed to force clock for F2: err %d\n", - __func__, err)); + BRCMF_ERROR(("%s: Failed to force clock for F2: err %d\n", + __func__, err)); goto exit; } /* Enable function 2 (frame transfers) */ - W_SDREG((SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT), - &bus->regs->tosbmailboxdata, retries); + w_sdreg32(bus, SDPCM_PROT_VERSION << SMB_DATA_VERSION_SHIFT, + offsetof(struct sdpcmd_regs, tosbmailboxdata), &retries); enable = (SDIO_FUNC_ENABLE_1 | SDIO_FUNC_ENABLE_2); - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable, NULL); + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx, enable, + NULL); /* Give the dongle some time to do its thing and set IOR2 */ - dhd_timeout_start(&tmo, DHD_WAIT_F2RDY * 1000); + brcmf_timeout_start(&tmo, BRCMF_WAIT_F2RDY * 1000); ready = 0; - while (ready != enable && !dhd_timeout_expired(&tmo)) - ready = - bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IORDY, - NULL); + while (ready != enable && !brcmf_timeout_expired(&tmo)) + ready = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_0, + SDIO_CCCR_IORx, NULL); - DHD_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n", - __func__, enable, ready, tmo.elapsed)); + BRCMF_INFO(("%s: enable 0x%02x, ready 0x%02x (waited %uus)\n", + __func__, enable, ready, tmo.elapsed)); /* If F2 successfully enabled, set core and enable interrupts */ if (ready == enable) { /* Set up the interrupt mask and enable interrupts */ bus->hostintmask = HOSTINTMASK; - W_SDREG(bus->hostintmask, - (unsigned int *)CORE_BUS_REG(bus->ci->buscorebase, - hostintmask), retries); + w_sdreg32(bus, bus->hostintmask, + offsetof(struct sdpcmd_regs, hostintmask), &retries); - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_WATERMARK, + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_WATERMARK, (u8) watermark, &err); /* Set bus state according to enable result */ - dhdp->busstate = DHD_BUS_DATA; - - /* bcmsdh_intr_unmask(bus->sdh); */ + drvr->busstate = BRCMF_BUS_DATA; bus->intdis = false; if (bus->intr) { - DHD_INTR(("%s: enable SDIO device interrupts\n", - __func__)); - bcmsdh_intr_enable(bus->sdh); + BRCMF_INTR(("%s: enable SDIO device interrupts\n", + __func__)); + brcmf_sdcard_intr_enable(bus->card); } else { - DHD_INTR(("%s: disable SDIO interrupts\n", __func__)); - bcmsdh_intr_disable(bus->sdh); + BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__)); + brcmf_sdcard_intr_disable(bus->card); } } @@ -2955,75 +3384,90 @@ int dhd_bus_init(dhd_pub_t *dhdp, bool enforce_mutex) else { /* Disable F2 again */ enable = SDIO_FUNC_ENABLE_1; - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, enable, - NULL); + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx, + enable, NULL); } /* Restore previous clock setting */ - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, saveclk, &err); +#if defined(OOB_INTR_ONLY) + /* Host registration for OOB interrupt */ + if (brcmf_sdio_register_oob_intr(bus->dhd)) { + brcmf_sdbrcm_wd_timer(bus, 0); + BRCMF_ERROR(("%s Host failed to resgister for OOB\n", + __func__)); + ret = -ENODEV; + goto exit; + } + + /* Enable oob at firmware */ + brcmf_sdbrcm_enable_oob_intr(bus, true); +#endif /* defined(OOB_INTR_ONLY) */ + /* If we didn't come up, turn off backplane clock */ - if (dhdp->busstate != DHD_BUS_DATA) - dhdsdio_clkctl(bus, CLK_NONE, false); + if (drvr->busstate != BRCMF_BUS_DATA) + brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); exit: if (enforce_mutex) - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); return ret; } -static void dhdsdio_rxfail(dhd_bus_t *bus, bool abort, bool rtx) +static void brcmf_sdbrcm_rxfail(struct brcmf_bus *bus, bool abort, bool rtx) { - bcmsdh_info_t *sdh = bus->sdh; - sdpcmd_regs_t *regs = bus->regs; + struct brcmf_sdio_card *card = bus->card; uint retries = 0; u16 lastrbc; u8 hi, lo; int err; - DHD_ERROR(("%s: %sterminate frame%s\n", __func__, - (abort ? "abort command, " : ""), - (rtx ? ", send NAK" : ""))); + BRCMF_ERROR(("%s: %sterminate frame%s\n", __func__, + (abort ? "abort command, " : ""), + (rtx ? ", send NAK" : ""))); if (abort) - bcmsdh_abort(sdh, SDIO_FUNC_2); + brcmf_sdcard_abort(card, SDIO_FUNC_2); - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL, SFC_RF_TERM, - &err); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL, + SFC_RF_TERM, &err); bus->f1regdata++; /* Wait until the packet has been flushed (device/FIFO stable) */ for (lastrbc = retries = 0xffff; retries > 0; retries--) { - hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_RFRAMEBCHI, - NULL); - lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_RFRAMEBCLO, - NULL); + hi = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_FUNC1_RFRAMEBCHI, NULL); + lo = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_FUNC1_RFRAMEBCLO, NULL); bus->f1regdata += 2; if ((hi == 0) && (lo == 0)) break; if ((hi > (lastrbc >> 8)) && (lo > (lastrbc & 0x00ff))) { - DHD_ERROR(("%s: count growing: last 0x%04x now " - "0x%04x\n", - __func__, lastrbc, ((hi << 8) + lo))); + BRCMF_ERROR(("%s: count growing: last 0x%04x now " + "0x%04x\n", + __func__, lastrbc, ((hi << 8) + lo))); } lastrbc = (hi << 8) + lo; } if (!retries) { - DHD_ERROR(("%s: count never zeroed: last 0x%04x\n", - __func__, lastrbc)); + BRCMF_ERROR(("%s: count never zeroed: last 0x%04x\n", + __func__, lastrbc)); } else { - DHD_INFO(("%s: flush took %d iterations\n", __func__, - (0xffff - retries))); + BRCMF_INFO(("%s: flush took %d iterations\n", __func__, + (0xffff - retries))); } if (rtx) { bus->rxrtx++; - W_SDREG(SMB_NAK, ®s->tosbmailbox, retries); + w_sdreg32(bus, SMB_NAK, + offsetof(struct sdpcmd_regs, tosbmailbox), &retries); + bus->f1regdata++; if (retries <= retry_limit) bus->rxskip = true; @@ -3033,35 +3477,33 @@ static void dhdsdio_rxfail(dhd_bus_t *bus, bool abort, bool rtx) bus->nextlen = 0; /* If we can't reach the device, signal failure */ - if (err || bcmsdh_regfail(sdh)) - bus->dhd->busstate = DHD_BUS_DOWN; + if (err || brcmf_sdcard_regfail(card)) + bus->drvr->busstate = BRCMF_BUS_DOWN; } static void -dhdsdio_read_control(dhd_bus_t *bus, u8 *hdr, uint len, uint doff) +brcmf_sdbrcm_read_control(struct brcmf_bus *bus, u8 *hdr, uint len, uint doff) { - bcmsdh_info_t *sdh = bus->sdh; + struct brcmf_sdio_card *card = bus->card; uint rdlen, pad; int sdret; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* Control data already received in aligned rxctl */ if ((bus->bus == SPI_BUS) && (!bus->usebufpool)) goto gotpkt; - ASSERT(bus->rxbuf); /* Set rxctl for frame (w/optional alignment) */ bus->rxctl = bus->rxbuf; - if (dhd_alignctl) { + if (brcmf_alignctl) { bus->rxctl += firstread; - pad = ((unsigned long)bus->rxctl % DHD_SDALIGN); + pad = ((unsigned long)bus->rxctl % BRCMF_SDALIGN); if (pad) - bus->rxctl += (DHD_SDALIGN - pad); + bus->rxctl += (BRCMF_SDALIGN - pad); bus->rxctl -= firstread; } - ASSERT(bus->rxctl >= bus->rxbuf); /* Copy the already-read portion over */ memcpy(bus->rxctl, hdr, firstread); @@ -3079,10 +3521,10 @@ dhdsdio_read_control(dhd_bus_t *bus, u8 *hdr, uint len, uint doff) if (bus->roundup && bus->blocksize && (rdlen > bus->blocksize)) { pad = bus->blocksize - (rdlen % bus->blocksize); if ((pad <= bus->roundup) && (pad < bus->blocksize) && - ((len + pad) < bus->dhd->maxctl)) + ((len + pad) < bus->drvr->maxctl)) rdlen += pad; - } else if (rdlen % DHD_SDALIGN) { - rdlen += DHD_SDALIGN - (rdlen % DHD_SDALIGN); + } else if (rdlen % BRCMF_SDALIGN) { + rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN); } /* Satisfy length-alignment requirements */ @@ -3090,44 +3532,44 @@ dhdsdio_read_control(dhd_bus_t *bus, u8 *hdr, uint len, uint doff) rdlen = roundup(rdlen, ALIGNMENT); /* Drop if the read is too big or it exceeds our maximum */ - if ((rdlen + firstread) > bus->dhd->maxctl) { - DHD_ERROR(("%s: %d-byte control read exceeds %d-byte buffer\n", - __func__, rdlen, bus->dhd->maxctl)); - bus->dhd->rx_errors++; - dhdsdio_rxfail(bus, false, false); + if ((rdlen + firstread) > bus->drvr->maxctl) { + BRCMF_ERROR(("%s: %d-byte control read exceeds %d-byte" + " buffer\n", __func__, rdlen, bus->drvr->maxctl)); + bus->drvr->rx_errors++; + brcmf_sdbrcm_rxfail(bus, false, false); goto done; } - if ((len - doff) > bus->dhd->maxctl) { - DHD_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds " - "%d-byte limit\n", - __func__, len, (len - doff), bus->dhd->maxctl)); - bus->dhd->rx_errors++; + if ((len - doff) > bus->drvr->maxctl) { + BRCMF_ERROR(("%s: %d-byte ctl frame (%d-byte ctl data) exceeds " + "%d-byte limit\n", + __func__, len, (len - doff), bus->drvr->maxctl)); + bus->drvr->rx_errors++; bus->rx_toolong++; - dhdsdio_rxfail(bus, false, false); + brcmf_sdbrcm_rxfail(bus, false, false); goto done; } /* Read remainder of frame body into the rxctl buffer */ - sdret = bcmsdh_recv_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2, + sdret = brcmf_sdcard_recv_buf(card, brcmf_sdcard_cur_sbwad(card), + SDIO_FUNC_2, F2SYNC, (bus->rxctl + firstread), rdlen, NULL, NULL, NULL); bus->f2rxdata++; - ASSERT(sdret != -BCME_PENDING); /* Control frame failures need retransmission */ if (sdret < 0) { - DHD_ERROR(("%s: read %d control bytes failed: %d\n", - __func__, rdlen, sdret)); - bus->rxc_errors++; /* dhd.rx_ctlerrs is higher level */ - dhdsdio_rxfail(bus, true, true); + BRCMF_ERROR(("%s: read %d control bytes failed: %d\n", + __func__, rdlen, sdret)); + bus->rxc_errors++; + brcmf_sdbrcm_rxfail(bus, true, true); goto done; } gotpkt: -#ifdef DHD_DEBUG - if (DHD_BYTES_ON() && DHD_CTL_ON()) { +#ifdef BCMDBG + if (BRCMF_BYTES_ON() && BRCMF_CTL_ON()) { printk(KERN_DEBUG "RxCtrl:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxctl, len); } @@ -3139,10 +3581,10 @@ gotpkt: done: /* Awake any waiters */ - dhd_os_ioctl_resp_wake(bus->dhd); + brcmf_os_ioctl_resp_wake(bus->drvr); } -static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) +static u8 brcmf_sdbrcm_rxglom(struct brcmf_bus *bus, u8 rxseq) { u16 dlen, totlen; u8 *dptr, num = 0; @@ -3160,19 +3602,18 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) /* If packets, issue read(s) and send up packet chain */ /* Return sequence numbers consumed? */ - DHD_TRACE(("dhdsdio_rxglom: start: glomd %p glom %p\n", bus->glomd, - bus->glom)); + BRCMF_TRACE(("brcmf_sdbrcm_rxglom: start: glomd %p glom %p\n", + bus->glomd, bus->glom)); /* If there's a descriptor, generate the packet chain */ if (bus->glomd) { - dhd_os_sdlock_rxq(bus->dhd); - pfirst = plast = pnext = NULL; dlen = (u16) (bus->glomd->len); dptr = bus->glomd->data; if (!dlen || (dlen & 1)) { - DHD_ERROR(("%s: bad glomd len(%d), ignore descriptor\n", - __func__, dlen)); + BRCMF_ERROR(("%s: bad glomd len(%d)," + " ignore descriptor\n", + __func__, dlen)); dlen = 0; } @@ -3183,14 +3624,15 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) dptr += sizeof(u16); if ((sublen < SDPCM_HDRLEN) || ((num == 0) && (sublen < (2 * SDPCM_HDRLEN)))) { - DHD_ERROR(("%s: descriptor len %d bad: %d\n", - __func__, num, sublen)); + BRCMF_ERROR(("%s: descriptor len %d bad: %d\n", + __func__, num, sublen)); pnext = NULL; break; } - if (sublen % DHD_SDALIGN) { - DHD_ERROR(("%s: sublen %d not multiple of %d\n", - __func__, sublen, DHD_SDALIGN)); + if (sublen % BRCMF_SDALIGN) { + BRCMF_ERROR(("%s: sublen %d not multiple of" + " %d\n", __func__, sublen, + BRCMF_SDALIGN)); usechain = false; } totlen += sublen; @@ -3204,123 +3646,120 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) } /* Allocate/chain packet for next subframe */ - pnext = bcm_pkt_buf_get_skb(sublen + DHD_SDALIGN); + pnext = brcmu_pkt_buf_get_skb(sublen + BRCMF_SDALIGN); if (pnext == NULL) { - DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed, " - "num %d len %d\n", __func__, - num, sublen)); + BRCMF_ERROR(("%s: bcm_pkt_buf_get_skb failed, " + "num %d len %d\n", __func__, + num, sublen)); break; } - ASSERT(!(pnext->prev)); if (!pfirst) { - ASSERT(!plast); pfirst = plast = pnext; } else { - ASSERT(plast); plast->next = pnext; plast = pnext; } /* Adhere to start alignment requirements */ - PKTALIGN(pnext, sublen, DHD_SDALIGN); + PKTALIGN(pnext, sublen, BRCMF_SDALIGN); } /* If all allocations succeeded, save packet chain in bus structure */ if (pnext) { - DHD_GLOM(("%s: allocated %d-byte packet chain for %d " - "subframes\n", __func__, totlen, num)); - if (DHD_GLOM_ON() && bus->nextlen) { + BRCMF_GLOM(("%s: allocated %d-byte packet chain for %d " + "subframes\n", __func__, totlen, num)); + if (BRCMF_GLOM_ON() && bus->nextlen) { if (totlen != bus->nextlen) { - DHD_GLOM(("%s: glomdesc mismatch: nextlen %d glomdesc %d " "rxseq %d\n", - __func__, bus->nextlen, - totlen, rxseq)); + BRCMF_GLOM(("%s: glomdesc mismatch: " + "nextlen %d glomdesc %d " + "rxseq %d\n", __func__, + bus->nextlen, + totlen, rxseq)); } } bus->glom = pfirst; pfirst = pnext = NULL; } else { if (pfirst) - bcm_pkt_buf_free_skb(pfirst); + brcmu_pkt_buf_free_skb(pfirst); bus->glom = NULL; num = 0; } /* Done with descriptor packet */ - bcm_pkt_buf_free_skb(bus->glomd); + brcmu_pkt_buf_free_skb(bus->glomd); bus->glomd = NULL; bus->nextlen = 0; - - dhd_os_sdunlock_rxq(bus->dhd); } /* Ok -- either we just generated a packet chain, or had one from before */ if (bus->glom) { - if (DHD_GLOM_ON()) { - DHD_GLOM(("%s: try superframe read, packet chain:\n", - __func__)); + if (BRCMF_GLOM_ON()) { + BRCMF_GLOM(("%s: try superframe read, packet chain:\n", + __func__)); for (pnext = bus->glom; pnext; pnext = pnext->next) { - DHD_GLOM((" %p: %p len 0x%04x (%d)\n", - pnext, (u8 *) (pnext->data), - pnext->len, pnext->len)); + BRCMF_GLOM((" %p: %p len 0x%04x (%d)\n", + pnext, (u8 *) (pnext->data), + pnext->len, pnext->len)); } } pfirst = bus->glom; - dlen = (u16) bcm_pkttotlen(pfirst); + dlen = (u16) brcmu_pkttotlen(pfirst); /* Do an SDIO read for the superframe. Configurable iovar to * read directly into the chained packet, or allocate a large * packet and and copy into the chain. */ if (usechain) { - errcode = bcmsdh_recv_buf(bus, - bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2, + errcode = brcmf_sdcard_recv_buf(bus->card, + brcmf_sdcard_cur_sbwad(bus->card), + SDIO_FUNC_2, F2SYNC, (u8 *) pfirst->data, dlen, pfirst, NULL, NULL); } else if (bus->dataptr) { - errcode = bcmsdh_recv_buf(bus, - bcmsdh_cur_sbwad(bus->sdh), SDIO_FUNC_2, + errcode = brcmf_sdcard_recv_buf(bus->card, + brcmf_sdcard_cur_sbwad(bus->card), + SDIO_FUNC_2, F2SYNC, bus->dataptr, dlen, NULL, NULL, NULL); - sublen = (u16) bcm_pktfrombuf(pfirst, 0, dlen, + sublen = (u16) brcmu_pktfrombuf(pfirst, 0, dlen, bus->dataptr); if (sublen != dlen) { - DHD_ERROR(("%s: FAILED TO COPY, dlen %d sublen %d\n", - __func__, dlen, sublen)); + BRCMF_ERROR(("%s: FAILED TO COPY, dlen %d " + "sublen %d\n", + __func__, dlen, sublen)); errcode = -1; } pnext = NULL; } else { - DHD_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, FORCE FAILURE\n", - dlen)); + BRCMF_ERROR(("COULDN'T ALLOC %d-BYTE GLOM, " + "FORCE FAILURE\n", dlen)); errcode = -1; } bus->f2rxdata++; - ASSERT(errcode != -BCME_PENDING); /* On failure, kill the superframe, allow a couple retries */ if (errcode < 0) { - DHD_ERROR(("%s: glom read of %d bytes failed: %d\n", - __func__, dlen, errcode)); - bus->dhd->rx_errors++; + BRCMF_ERROR(("%s: glom read of %d bytes failed: %d\n", + __func__, dlen, errcode)); + bus->drvr->rx_errors++; if (bus->glomerr++ < 3) { - dhdsdio_rxfail(bus, true, true); + brcmf_sdbrcm_rxfail(bus, true, true); } else { bus->glomerr = 0; - dhdsdio_rxfail(bus, true, false); - dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(bus->glom); - dhd_os_sdunlock_rxq(bus->dhd); + brcmf_sdbrcm_rxfail(bus, true, false); + brcmu_pkt_buf_free_skb(bus->glom); bus->rxglomfail++; bus->glom = NULL; } return 0; } -#ifdef DHD_DEBUG - if (DHD_GLOM_ON()) { +#ifdef BCMDBG + if (BRCMF_GLOM_ON()) { printk(KERN_DEBUG "SUPERFRAME:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, pfirst->data, min_t(int, pfirst->len, 48)); @@ -3336,8 +3775,8 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]); bus->nextlen = dptr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET]; if ((bus->nextlen << 4) > MAX_RX_DATASZ) { - DHD_INFO(("%s: nextlen too large (%d) seq %d\n", - __func__, bus->nextlen, seq)); + BRCMF_INFO(("%s: nextlen too large (%d) seq %d\n", + __func__, bus->nextlen, seq)); bus->nextlen = 0; } doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); @@ -3345,47 +3784,48 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) errcode = 0; if ((u16)~(sublen ^ check)) { - DHD_ERROR(("%s (superframe): HW hdr error: len/check " - "0x%04x/0x%04x\n", __func__, sublen, check)); + BRCMF_ERROR(("%s (superframe): HW hdr error: len/check " + "0x%04x/0x%04x\n", __func__, sublen, + check)); errcode = -1; } else if (roundup(sublen, bus->blocksize) != dlen) { - DHD_ERROR(("%s (superframe): len 0x%04x, rounded " - "0x%04x, expect 0x%04x\n", - __func__, sublen, - roundup(sublen, bus->blocksize), dlen)); + BRCMF_ERROR(("%s (superframe): len 0x%04x, rounded " + "0x%04x, expect 0x%04x\n", + __func__, sublen, + roundup(sublen, bus->blocksize), dlen)); errcode = -1; } else if (SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]) != SDPCM_GLOM_CHANNEL) { - DHD_ERROR(("%s (superframe): bad channel %d\n", + BRCMF_ERROR(("%s (superframe): bad channel %d\n", __func__, SDPCM_PACKET_CHANNEL(&dptr [SDPCM_FRAMETAG_LEN]))); errcode = -1; } else if (SDPCM_GLOMDESC(&dptr[SDPCM_FRAMETAG_LEN])) { - DHD_ERROR(("%s (superframe): got second descriptor?\n", - __func__)); + BRCMF_ERROR(("%s (superframe): got 2nd descriptor?\n", + __func__)); errcode = -1; } else if ((doff < SDPCM_HDRLEN) || (doff > (pfirst->len - SDPCM_HDRLEN))) { - DHD_ERROR(("%s (superframe): Bad data offset %d: HW %d " - "pkt %d min %d\n", - __func__, doff, sublen, - pfirst->len, SDPCM_HDRLEN)); + BRCMF_ERROR(("%s (superframe): Bad data offset %d: " + "HW %d pkt %d min %d\n", + __func__, doff, sublen, + pfirst->len, SDPCM_HDRLEN)); errcode = -1; } /* Check sequence number of superframe SW header */ if (rxseq != seq) { - DHD_INFO(("%s: (superframe) rx_seq %d, expected %d\n", - __func__, seq, rxseq)); + BRCMF_INFO(("%s: (superframe) rx_seq %d, expected %d\n", + __func__, seq, rxseq)); bus->rx_badseq++; rxseq = seq; } /* Check window for sanity */ if ((u8) (txmax - bus->tx_seq) > 0x40) { - DHD_ERROR(("%s: unlikely tx max %d with tx_seq %d\n", - __func__, txmax, bus->tx_seq)); + BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n", + __func__, txmax, bus->tx_seq)); txmax = bus->tx_seq + 2; } bus->tx_max = txmax; @@ -3403,8 +3843,8 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) check = get_unaligned_le16(dptr + sizeof(u16)); chan = SDPCM_PACKET_CHANNEL(&dptr[SDPCM_FRAMETAG_LEN]); doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); -#ifdef DHD_DEBUG - if (DHD_GLOM_ON()) { +#ifdef BCMDBG + if (BRCMF_GLOM_ON()) { printk(KERN_DEBUG "subframe:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, dptr, 32); @@ -3412,24 +3852,25 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) #endif if ((u16)~(sublen ^ check)) { - DHD_ERROR(("%s (subframe %d): HW hdr error: " - "len/check 0x%04x/0x%04x\n", - __func__, num, sublen, check)); + BRCMF_ERROR(("%s (subframe %d): HW hdr error: " + "len/check 0x%04x/0x%04x\n", + __func__, num, sublen, check)); errcode = -1; } else if ((sublen > dlen) || (sublen < SDPCM_HDRLEN)) { - DHD_ERROR(("%s (subframe %d): length mismatch: " - "len 0x%04x, expect 0x%04x\n", - __func__, num, sublen, dlen)); + BRCMF_ERROR(("%s (subframe %d): length mismatch" + ": len 0x%04x, expect 0x%04x\n", + __func__, num, sublen, dlen)); errcode = -1; } else if ((chan != SDPCM_DATA_CHANNEL) && (chan != SDPCM_EVENT_CHANNEL)) { - DHD_ERROR(("%s (subframe %d): bad channel %d\n", - __func__, num, chan)); + BRCMF_ERROR(("%s (subframe %d): bad channel" + " %d\n", __func__, num, chan)); errcode = -1; } else if ((doff < SDPCM_HDRLEN) || (doff > sublen)) { - DHD_ERROR(("%s (subframe %d): Bad data offset %d: HW %d min %d\n", - __func__, num, doff, sublen, - SDPCM_HDRLEN)); + BRCMF_ERROR(("%s (subframe %d): Bad data offset" + " %d: HW %d min %d\n", + __func__, num, doff, sublen, + SDPCM_HDRLEN)); errcode = -1; } } @@ -3440,13 +3881,11 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) if (bus->glomerr++ < 3) { /* Restore superframe header space */ skb_push(pfirst, sfdoff); - dhdsdio_rxfail(bus, true, true); + brcmf_sdbrcm_rxfail(bus, true, true); } else { bus->glomerr = 0; - dhdsdio_rxfail(bus, true, false); - dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(bus->glom); - dhd_os_sdunlock_rxq(bus->dhd); + brcmf_sdbrcm_rxfail(bus, true, false); + brcmu_pkt_buf_free_skb(bus->glom); bus->rxglomfail++; bus->glom = NULL; } @@ -3459,7 +3898,6 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) bus->glom = NULL; plast = NULL; - dhd_os_sdlock_rxq(bus->dhd); for (num = 0; pfirst; rxseq++, pfirst = pnext) { pnext = pfirst->next; pfirst->next = NULL; @@ -3470,22 +3908,22 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) seq = SDPCM_PACKET_SEQUENCE(&dptr[SDPCM_FRAMETAG_LEN]); doff = SDPCM_DOFFSET_VALUE(&dptr[SDPCM_FRAMETAG_LEN]); - DHD_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d " - "chan %d seq %d\n", - __func__, num, pfirst, pfirst->data, - pfirst->len, sublen, chan, seq)); + BRCMF_GLOM(("%s: Get subframe %d, %p(%p/%d), sublen %d " + "chan %d seq %d\n", + __func__, num, pfirst, pfirst->data, + pfirst->len, sublen, chan, seq)); - ASSERT((chan == SDPCM_DATA_CHANNEL) - || (chan == SDPCM_EVENT_CHANNEL)); + /* precondition: chan == SDPCM_DATA_CHANNEL || + chan == SDPCM_EVENT_CHANNEL */ if (rxseq != seq) { - DHD_GLOM(("%s: rx_seq %d, expected %d\n", - __func__, seq, rxseq)); + BRCMF_GLOM(("%s: rx_seq %d, expected %d\n", + __func__, seq, rxseq)); bus->rx_badseq++; rxseq = seq; } -#ifdef DHD_DEBUG - if (DHD_BYTES_ON() && DHD_DATA_ON()) { +#ifdef BCMDBG + if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) { printk(KERN_DEBUG "Rx Subframe Data:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, dptr, dlen); @@ -3496,24 +3934,22 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) skb_pull(pfirst, doff); if (pfirst->len == 0) { - bcm_pkt_buf_free_skb(pfirst); + brcmu_pkt_buf_free_skb(pfirst); if (plast) { plast->next = pnext; } else { - ASSERT(save_pfirst == pfirst); save_pfirst = pnext; } continue; - } else if (dhd_prot_hdrpull(bus->dhd, &ifidx, pfirst) != - 0) { - DHD_ERROR(("%s: rx protocol error\n", - __func__)); - bus->dhd->rx_errors++; - bcm_pkt_buf_free_skb(pfirst); + } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pfirst) + != 0) { + BRCMF_ERROR(("%s: rx protocol error\n", + __func__)); + bus->drvr->rx_errors++; + brcmu_pkt_buf_free_skb(pfirst); if (plast) { plast->next = pnext; } else { - ASSERT(save_pfirst == pfirst); save_pfirst = pnext; } continue; @@ -3525,24 +3961,23 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) plast = pfirst; num++; -#ifdef DHD_DEBUG - if (DHD_GLOM_ON()) { - DHD_GLOM(("%s subframe %d to stack, %p(%p/%d) " - "nxt/lnk %p/%p\n", - __func__, num, pfirst, pfirst->data, - pfirst->len, pfirst->next, - pfirst->prev)); +#ifdef BCMDBG + if (BRCMF_GLOM_ON()) { + BRCMF_GLOM(("%s subframe %d to stack, %p" + "(%p/%d) nxt/lnk %p/%p\n", + __func__, num, pfirst, pfirst->data, + pfirst->len, pfirst->next, + pfirst->prev)); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, pfirst->data, min_t(int, pfirst->len, 32)); } -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ } - dhd_os_sdunlock_rxq(bus->dhd); if (num) { - dhd_os_sdunlock(bus->dhd); - dhd_rx_frame(bus->dhd, ifidx, save_pfirst, num); - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); + brcmf_rx_frame(bus->drvr, ifidx, save_pfirst, num); + brcmf_sdbrcm_sdlock(bus); } bus->rxglomframes++; @@ -3552,9 +3987,10 @@ static u8 dhdsdio_rxglom(dhd_bus_t *bus, u8 rxseq) } /* Return true if there may be more frames to read */ -static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) +static uint +brcmf_sdbrcm_readframes(struct brcmf_bus *bus, uint maxframes, bool *finished) { - bcmsdh_info_t *sdh = bus->sdh; + struct brcmf_sdio_card *card = bus->card; u16 len, check; /* Extracted hardware header fields */ u8 chan, seq, doff; /* Extracted software header fields */ @@ -3565,7 +4001,7 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) u16 rdlen; /* Total number of bytes to read */ u8 rxseq; /* Next sequence number to expect */ uint rxleft = 0; /* Remaining number of frames allowed */ - int sdret; /* Return code from bcmsdh calls */ + int sdret; /* Return code from calls */ u8 txmax; /* Maximum tx sequence offered */ bool len_consistent; /* Result of comparing readahead len and len from hw-hdr */ @@ -3573,17 +4009,15 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) int ifidx = 0; uint rxcount = 0; /* Total frames read */ -#if defined(DHD_DEBUG) || defined(SDTEST) +#if defined(BCMDBG) || defined(SDTEST) bool sdtest = false; /* To limit message spew from test mode */ #endif - DHD_TRACE(("%s: Enter\n", __func__)); - - ASSERT(maxframes); + BRCMF_TRACE(("%s: Enter\n", __func__)); #ifdef SDTEST /* Allow pktgen to override maxframes */ - if (bus->pktgen_count && (bus->pktgen_mode == DHD_PKTGEN_RECV)) { + if (bus->pktgen_count && (bus->pktgen_mode == BRCMF_PKTGEN_RECV)) { maxframes = bus->pktgen_count; sdtest = true; } @@ -3593,23 +4027,23 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) *finished = false; for (rxseq = bus->rx_seq, rxleft = maxframes; - !bus->rxskip && rxleft && bus->dhd->busstate != DHD_BUS_DOWN; + !bus->rxskip && rxleft && bus->drvr->busstate != BRCMF_BUS_DOWN; rxseq++, rxleft--) { /* Handle glomming separately */ if (bus->glom || bus->glomd) { u8 cnt; - DHD_GLOM(("%s: calling rxglom: glomd %p, glom %p\n", - __func__, bus->glomd, bus->glom)); - cnt = dhdsdio_rxglom(bus, rxseq); - DHD_GLOM(("%s: rxglom returned %d\n", __func__, cnt)); + BRCMF_GLOM(("%s: calling rxglom: glomd %p, glom %p\n", + __func__, bus->glomd, bus->glom)); + cnt = brcmf_sdbrcm_rxglom(bus, rxseq); + BRCMF_GLOM(("%s: rxglom returned %d\n", __func__, cnt)); rxseq += cnt - 1; rxleft = (rxleft > cnt) ? (rxleft - cnt) : 1; continue; } /* Try doing single read if we can */ - if (dhd_readahead && bus->nextlen) { + if (brcmf_readahead && bus->nextlen) { u16 nextlen = bus->nextlen; bus->nextlen = 0; @@ -3629,9 +4063,9 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) && ((rdlen + pad + firstread) < MAX_RX_DATASZ)) rdlen += pad; - } else if (rdlen % DHD_SDALIGN) { + } else if (rdlen % BRCMF_SDALIGN) { rdlen += - DHD_SDALIGN - (rdlen % DHD_SDALIGN); + BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN); } } @@ -3646,42 +4080,40 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) * or non-data frame. */ /* Allocate a packet buffer */ - dhd_os_sdlock_rxq(bus->dhd); - pkt = bcm_pkt_buf_get_skb(rdlen + DHD_SDALIGN); + pkt = brcmu_pkt_buf_get_skb(rdlen + BRCMF_SDALIGN); if (!pkt) { if (bus->bus == SPI_BUS) { bus->usebufpool = false; bus->rxctl = bus->rxbuf; - if (dhd_alignctl) { + if (brcmf_alignctl) { bus->rxctl += firstread; pad = ((unsigned long)bus->rxctl % - DHD_SDALIGN); + BRCMF_SDALIGN); if (pad) bus->rxctl += - (DHD_SDALIGN - pad); + (BRCMF_SDALIGN - pad); bus->rxctl -= firstread; } - ASSERT(bus->rxctl >= bus->rxbuf); rxbuf = bus->rxctl; /* Read the entire frame */ - sdret = bcmsdh_recv_buf(bus, - bcmsdh_cur_sbwad(sdh), - SDIO_FUNC_2, F2SYNC, - rxbuf, rdlen, - NULL, NULL, NULL); + sdret = brcmf_sdcard_recv_buf(card, + brcmf_sdcard_cur_sbwad(card), + SDIO_FUNC_2, F2SYNC, + rxbuf, rdlen, + NULL, NULL, NULL); bus->f2rxdata++; - ASSERT(sdret != -BCME_PENDING); /* Control frame failures need retransmission */ if (sdret < 0) { - DHD_ERROR(("%s: read %d control bytes failed: %d\n", - __func__, - rdlen, sdret)); + BRCMF_ERROR(("%s: read %d " + "control bytes " + "failed: %d\n", + __func__, + rdlen, sdret)); /* dhd.rx_ctlerrs is higher */ bus->rxc_errors++; - dhd_os_sdunlock_rxq(bus->dhd); - dhdsdio_rxfail(bus, true, + brcmf_sdbrcm_rxfail(bus, true, (bus->bus == SPI_BUS) ? false : true); @@ -3690,50 +4122,45 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) } else { /* Give up on data, request rtx of events */ - DHD_ERROR(("%s (nextlen): " - "bcm_pkt_buf_get_skb failed:" - " len %d rdlen %d expected" - " rxseq %d\n", __func__, - len, rdlen, rxseq)); - /* Just go try again w/normal - header read */ - dhd_os_sdunlock_rxq(bus->dhd); + BRCMF_ERROR(("%s (nextlen): " + "brcmu_pkt_buf_get_skb " + "failed:" + " len %d rdlen %d expected" + " rxseq %d\n", __func__, + len, rdlen, rxseq)); continue; } } else { if (bus->bus == SPI_BUS) bus->usebufpool = true; - ASSERT(!(pkt->prev)); - PKTALIGN(pkt, rdlen, DHD_SDALIGN); + PKTALIGN(pkt, rdlen, BRCMF_SDALIGN); rxbuf = (u8 *) (pkt->data); /* Read the entire frame */ - sdret = bcmsdh_recv_buf(bus, - bcmsdh_cur_sbwad(sdh), + sdret = brcmf_sdcard_recv_buf(card, + brcmf_sdcard_cur_sbwad(card), SDIO_FUNC_2, F2SYNC, rxbuf, rdlen, pkt, NULL, NULL); bus->f2rxdata++; - ASSERT(sdret != -BCME_PENDING); if (sdret < 0) { - DHD_ERROR(("%s (nextlen): read %d bytes failed: %d\n", - __func__, rdlen, sdret)); - bcm_pkt_buf_free_skb(pkt); - bus->dhd->rx_errors++; - dhd_os_sdunlock_rxq(bus->dhd); + BRCMF_ERROR(("%s (nextlen): read %d" + " bytes failed: %d\n", + __func__, rdlen, sdret)); + brcmu_pkt_buf_free_skb(pkt); + bus->drvr->rx_errors++; /* Force retry w/normal header read. * Don't attempt NAK for * gSPI */ - dhdsdio_rxfail(bus, true, + brcmf_sdbrcm_rxfail(bus, true, (bus->bus == SPI_BUS) ? false : true); continue; } } - dhd_os_sdunlock_rxq(bus->dhd); /* Now check the header */ memcpy(bus->rxhdr, rxbuf, SDPCM_HDRLEN); @@ -3744,29 +4171,29 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) /* All zeros means readahead info was bad */ if (!(len | check)) { - DHD_INFO(("%s (nextlen): read zeros in HW " - "header???\n", __func__)); - dhdsdio_pktfree2(bus, pkt); + BRCMF_INFO(("%s (nextlen): read zeros in HW " + "header???\n", __func__)); + brcmf_sdbrcm_pktfree2(bus, pkt); continue; } /* Validate check bytes */ if ((u16)~(len ^ check)) { - DHD_ERROR(("%s (nextlen): HW hdr error:" - " nextlen/len/check" - " 0x%04x/0x%04x/0x%04x\n", - __func__, nextlen, len, check)); + BRCMF_ERROR(("%s (nextlen): HW hdr error:" + " nextlen/len/check" + " 0x%04x/0x%04x/0x%04x\n", + __func__, nextlen, len, check)); bus->rx_badhdr++; - dhdsdio_rxfail(bus, false, false); - dhdsdio_pktfree2(bus, pkt); + brcmf_sdbrcm_rxfail(bus, false, false); + brcmf_sdbrcm_pktfree2(bus, pkt); continue; } /* Validate frame length */ if (len < SDPCM_HDRLEN) { - DHD_ERROR(("%s (nextlen): HW hdr length " - "invalid: %d\n", __func__, len)); - dhdsdio_pktfree2(bus, pkt); + BRCMF_ERROR(("%s (nextlen): HW hdr length " + "invalid: %d\n", __func__, len)); + brcmf_sdbrcm_pktfree2(bus, pkt); continue; } @@ -3775,13 +4202,14 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) if (len_consistent) { /* Mismatch, force retry w/normal header (may be >4K) */ - DHD_ERROR(("%s (nextlen): mismatch, " - "nextlen %d len %d rnd %d; " - "expected rxseq %d\n", - __func__, nextlen, - len, roundup(len, 16), rxseq)); - dhdsdio_rxfail(bus, true, (bus->bus != SPI_BUS)); - dhdsdio_pktfree2(bus, pkt); + BRCMF_ERROR(("%s (nextlen): mismatch, " + "nextlen %d len %d rnd %d; " + "expected rxseq %d\n", + __func__, nextlen, + len, roundup(len, 16), rxseq)); + brcmf_sdbrcm_rxfail(bus, true, + bus->bus != SPI_BUS); + brcmf_sdbrcm_pktfree2(bus, pkt); continue; } @@ -3799,12 +4227,13 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET]; if ((bus->nextlen << 4) > MAX_RX_DATASZ) { - DHD_INFO(("%s (nextlen): got frame w/nextlen too large" " (%d), seq %d\n", - __func__, bus->nextlen, seq)); + BRCMF_INFO(("%s (nextlen): got frame w/nextlen" + " too large (%d), seq %d\n", + __func__, bus->nextlen, seq)); bus->nextlen = 0; } - bus->dhd->rx_readahead_cnt++; + bus->drvr->rx_readahead_cnt++; /* Handle Flow Control */ fcbits = SDPCM_FCMASK_VALUE( @@ -3823,27 +4252,27 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) /* Check and update sequence number */ if (rxseq != seq) { - DHD_INFO(("%s (nextlen): rx_seq %d, expected " - "%d\n", __func__, seq, rxseq)); + BRCMF_INFO(("%s (nextlen): rx_seq %d, expected " + "%d\n", __func__, seq, rxseq)); bus->rx_badseq++; rxseq = seq; } /* Check window for sanity */ if ((u8) (txmax - bus->tx_seq) > 0x40) { - DHD_ERROR(("%s: got unlikely tx max %d with " - "tx_seq %d\n", - __func__, txmax, bus->tx_seq)); + BRCMF_ERROR(("%s: got unlikely tx max %d with " + "tx_seq %d\n", + __func__, txmax, bus->tx_seq)); txmax = bus->tx_seq + 2; } bus->tx_max = txmax; -#ifdef DHD_DEBUG - if (DHD_BYTES_ON() && DHD_DATA_ON()) { +#ifdef BCMDBG + if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) { printk(KERN_DEBUG "Rx Data:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxbuf, len); - } else if (DHD_HDRS_ON()) { + } else if (BRCMF_HDRS_ON()) { printk(KERN_DEBUG "RxHdr:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxhdr, SDPCM_HDRLEN); @@ -3852,31 +4281,35 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) if (chan == SDPCM_CONTROL_CHANNEL) { if (bus->bus == SPI_BUS) { - dhdsdio_read_control(bus, rxbuf, len, - doff); + brcmf_sdbrcm_read_control(bus, rxbuf, + len, doff); } else { - DHD_ERROR(("%s (nextlen): readahead on control" " packet %d?\n", - __func__, seq)); + BRCMF_ERROR(("%s (nextlen): readahead" + " on control packet %d?\n", + __func__, seq)); /* Force retry w/normal header read */ bus->nextlen = 0; - dhdsdio_rxfail(bus, false, true); + brcmf_sdbrcm_rxfail(bus, false, true); } - dhdsdio_pktfree2(bus, pkt); + brcmf_sdbrcm_pktfree2(bus, pkt); continue; } if ((bus->bus == SPI_BUS) && !bus->usebufpool) { - DHD_ERROR(("Received %d bytes on %d channel. Running out of " "rx pktbuf's or not yet malloced.\n", - len, chan)); + BRCMF_ERROR(("Received %d bytes on %d channel." + " Running out of " "rx pktbuf's or" + " not yet malloced.\n", + len, chan)); continue; } /* Validate data offset */ if ((doff < SDPCM_HDRLEN) || (doff > len)) { - DHD_ERROR(("%s (nextlen): bad data offset %d: HW len %d min %d\n", - __func__, doff, len, SDPCM_HDRLEN)); - dhdsdio_rxfail(bus, false, false); - dhdsdio_pktfree2(bus, pkt); + BRCMF_ERROR(("%s (nextlen): bad data offset %d:" + " HW len %d min %d\n", __func__, + doff, len, SDPCM_HDRLEN)); + brcmf_sdbrcm_rxfail(bus, false, false); + brcmf_sdbrcm_pktfree2(bus, pkt); continue; } @@ -3888,21 +4321,21 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) break; /* Read frame header (hardware and software) */ - sdret = bcmsdh_recv_buf(bus, bcmsdh_cur_sbwad(sdh), + sdret = brcmf_sdcard_recv_buf(card, + brcmf_sdcard_cur_sbwad(card), SDIO_FUNC_2, F2SYNC, bus->rxhdr, firstread, NULL, NULL, NULL); bus->f2rxhdrs++; - ASSERT(sdret != -BCME_PENDING); if (sdret < 0) { - DHD_ERROR(("%s: RXHEADER FAILED: %d\n", __func__, - sdret)); + BRCMF_ERROR(("%s: RXHEADER FAILED: %d\n", __func__, + sdret)); bus->rx_hdrfail++; - dhdsdio_rxfail(bus, true, true); + brcmf_sdbrcm_rxfail(bus, true, true); continue; } -#ifdef DHD_DEBUG - if (DHD_BYTES_ON() || DHD_HDRS_ON()) { +#ifdef BCMDBG + if (BRCMF_BYTES_ON() || BRCMF_HDRS_ON()) { printk(KERN_DEBUG "RxHdr:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, bus->rxhdr, SDPCM_HDRLEN); @@ -3921,17 +4354,17 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) /* Validate check bytes */ if ((u16) ~(len ^ check)) { - DHD_ERROR(("%s: HW hdr err: len/check 0x%04x/0x%04x\n", - __func__, len, check)); + BRCMF_ERROR(("%s: HW hdr err: len/check " + "0x%04x/0x%04x\n", __func__, len, check)); bus->rx_badhdr++; - dhdsdio_rxfail(bus, false, false); + brcmf_sdbrcm_rxfail(bus, false, false); continue; } /* Validate frame length */ if (len < SDPCM_HDRLEN) { - DHD_ERROR(("%s: HW hdr length invalid: %d\n", - __func__, len)); + BRCMF_ERROR(("%s: HW hdr length invalid: %d\n", + __func__, len)); continue; } @@ -3943,12 +4376,11 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) /* Validate data offset */ if ((doff < SDPCM_HDRLEN) || (doff > len)) { - DHD_ERROR(("%s: Bad data offset %d: HW len %d, min %d " - "seq %d\n", - __func__, doff, len, SDPCM_HDRLEN, seq)); + BRCMF_ERROR(("%s: Bad data offset %d: HW len %d," + " min %d seq %d\n", __func__, doff, + len, SDPCM_HDRLEN, seq)); bus->rx_badhdr++; - ASSERT(0); - dhdsdio_rxfail(bus, false, false); + brcmf_sdbrcm_rxfail(bus, false, false); continue; } @@ -3956,9 +4388,9 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) bus->nextlen = bus->rxhdr[SDPCM_FRAMETAG_LEN + SDPCM_NEXTLEN_OFFSET]; if ((bus->nextlen << 4) > MAX_RX_DATASZ) { - DHD_INFO(("%s (nextlen): got frame w/nextlen too large " - "(%d), seq %d\n", - __func__, bus->nextlen, seq)); + BRCMF_INFO(("%s (nextlen): got frame w/nextlen too" + " large (%d), seq %d\n", + __func__, bus->nextlen, seq)); bus->nextlen = 0; } @@ -3978,30 +4410,29 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) /* Check and update sequence number */ if (rxseq != seq) { - DHD_INFO(("%s: rx_seq %d, expected %d\n", __func__, - seq, rxseq)); + BRCMF_INFO(("%s: rx_seq %d, expected %d\n", __func__, + seq, rxseq)); bus->rx_badseq++; rxseq = seq; } /* Check window for sanity */ if ((u8) (txmax - bus->tx_seq) > 0x40) { - DHD_ERROR(("%s: unlikely tx max %d with tx_seq %d\n", - __func__, txmax, bus->tx_seq)); + BRCMF_ERROR(("%s: unlikely tx max %d with tx_seq %d\n", + __func__, txmax, bus->tx_seq)); txmax = bus->tx_seq + 2; } bus->tx_max = txmax; /* Call a separate function for control frames */ if (chan == SDPCM_CONTROL_CHANNEL) { - dhdsdio_read_control(bus, bus->rxhdr, len, doff); + brcmf_sdbrcm_read_control(bus, bus->rxhdr, len, doff); continue; } - ASSERT((chan == SDPCM_DATA_CHANNEL) - || (chan == SDPCM_EVENT_CHANNEL) - || (chan == SDPCM_TEST_CHANNEL) - || (chan == SDPCM_GLOM_CHANNEL)); + /* precondition: chan is either SDPCM_DATA_CHANNEL, + SDPCM_EVENT_CHANNEL, SDPCM_TEST_CHANNEL or + SDPCM_GLOM_CHANNEL */ /* Length to read */ rdlen = (len > firstread) ? (len - firstread) : 0; @@ -4013,8 +4444,8 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) if ((pad <= bus->roundup) && (pad < bus->blocksize) && ((rdlen + pad + firstread) < MAX_RX_DATASZ)) rdlen += pad; - } else if (rdlen % DHD_SDALIGN) { - rdlen += DHD_SDALIGN - (rdlen % DHD_SDALIGN); + } else if (rdlen % BRCMF_SDALIGN) { + rdlen += BRCMF_SDALIGN - (rdlen % BRCMF_SDALIGN); } /* Satisfy length-alignment requirements */ @@ -4023,54 +4454,45 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) if ((rdlen + firstread) > MAX_RX_DATASZ) { /* Too long -- skip this frame */ - DHD_ERROR(("%s: too long: len %d rdlen %d\n", - __func__, len, rdlen)); - bus->dhd->rx_errors++; + BRCMF_ERROR(("%s: too long: len %d rdlen %d\n", + __func__, len, rdlen)); + bus->drvr->rx_errors++; bus->rx_toolong++; - dhdsdio_rxfail(bus, false, false); + brcmf_sdbrcm_rxfail(bus, false, false); continue; } - dhd_os_sdlock_rxq(bus->dhd); - pkt = bcm_pkt_buf_get_skb(rdlen + firstread + DHD_SDALIGN); + pkt = brcmu_pkt_buf_get_skb(rdlen + firstread + BRCMF_SDALIGN); if (!pkt) { /* Give up on data, request rtx of events */ - DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed: rdlen %d " - "chan %d\n", __func__, rdlen, chan)); - bus->dhd->rx_dropped++; - dhd_os_sdunlock_rxq(bus->dhd); - dhdsdio_rxfail(bus, false, RETRYCHAN(chan)); + BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed:" + " rdlen %d chan %d\n", __func__, rdlen, + chan)); + bus->drvr->rx_dropped++; + brcmf_sdbrcm_rxfail(bus, false, RETRYCHAN(chan)); continue; } - dhd_os_sdunlock_rxq(bus->dhd); - - ASSERT(!(pkt->prev)); /* Leave room for what we already read, and align remainder */ - ASSERT(firstread < pkt->len); skb_pull(pkt, firstread); - PKTALIGN(pkt, rdlen, DHD_SDALIGN); + PKTALIGN(pkt, rdlen, BRCMF_SDALIGN); /* Read the remaining frame data */ - sdret = bcmsdh_recv_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2, - F2SYNC, ((u8 *) (pkt->data)), rdlen, - pkt, NULL, NULL); + sdret = brcmf_sdcard_recv_buf(card, + brcmf_sdcard_cur_sbwad(card), + SDIO_FUNC_2, F2SYNC, ((u8 *) (pkt->data)), + rdlen, pkt, NULL, NULL); bus->f2rxdata++; - ASSERT(sdret != -BCME_PENDING); if (sdret < 0) { - DHD_ERROR(("%s: read %d %s bytes failed: %d\n", - __func__, rdlen, - ((chan == - SDPCM_EVENT_CHANNEL) ? "event" : ((chan == - SDPCM_DATA_CHANNEL) - ? "data" : "test")), - sdret)); - dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(pkt); - dhd_os_sdunlock_rxq(bus->dhd); - bus->dhd->rx_errors++; - dhdsdio_rxfail(bus, true, RETRYCHAN(chan)); + BRCMF_ERROR(("%s: read %d %s bytes failed: %d\n", + __func__, rdlen, + ((chan == SDPCM_EVENT_CHANNEL) ? "event" + : ((chan == SDPCM_DATA_CHANNEL) ? "data" + : "test")), sdret)); + brcmu_pkt_buf_free_skb(pkt); + bus->drvr->rx_errors++; + brcmf_sdbrcm_rxfail(bus, true, RETRYCHAN(chan)); continue; } @@ -4078,8 +4500,8 @@ static uint dhdsdio_readframes(dhd_bus_t *bus, uint maxframes, bool *finished) skb_push(pkt, firstread); memcpy(pkt->data, bus->rxhdr, firstread); -#ifdef DHD_DEBUG - if (DHD_BYTES_ON() && DHD_DATA_ON()) { +#ifdef BCMDBG + if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) { printk(KERN_DEBUG "Rx Data:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, pkt->data, len); @@ -4090,10 +4512,10 @@ deliver: /* Save superframe descriptor and allocate packet frame */ if (chan == SDPCM_GLOM_CHANNEL) { if (SDPCM_GLOMDESC(&bus->rxhdr[SDPCM_FRAMETAG_LEN])) { - DHD_GLOM(("%s: glom descriptor, %d bytes:\n", - __func__, len)); -#ifdef DHD_DEBUG - if (DHD_GLOM_ON()) { + BRCMF_GLOM(("%s: glom descriptor, %d bytes:\n", + __func__, len)); +#ifdef BCMDBG + if (BRCMF_GLOM_ON()) { printk(KERN_DEBUG "Glom Data:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, @@ -4101,13 +4523,12 @@ deliver: } #endif __skb_trim(pkt, len); - ASSERT(doff == SDPCM_HDRLEN); skb_pull(pkt, SDPCM_HDRLEN); bus->glomd = pkt; } else { - DHD_ERROR(("%s: glom superframe w/o " - "descriptor!\n", __func__)); - dhdsdio_rxfail(bus, false, false); + BRCMF_ERROR(("%s: glom superframe w/o " + "descriptor!\n", __func__)); + brcmf_sdbrcm_rxfail(bus, false, false); } continue; } @@ -4119,39 +4540,35 @@ deliver: #ifdef SDTEST /* Test channel packets are processed separately */ if (chan == SDPCM_TEST_CHANNEL) { - dhdsdio_testrcv(bus, pkt, seq); + brcmf_sdbrcm_checkdied(bus, pkt, seq); continue; } #endif /* SDTEST */ if (pkt->len == 0) { - dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(pkt); - dhd_os_sdunlock_rxq(bus->dhd); + brcmu_pkt_buf_free_skb(pkt); continue; - } else if (dhd_prot_hdrpull(bus->dhd, &ifidx, pkt) != 0) { - DHD_ERROR(("%s: rx protocol error\n", __func__)); - dhd_os_sdlock_rxq(bus->dhd); - bcm_pkt_buf_free_skb(pkt); - dhd_os_sdunlock_rxq(bus->dhd); - bus->dhd->rx_errors++; + } else if (brcmf_proto_hdrpull(bus->drvr, &ifidx, pkt) != 0) { + BRCMF_ERROR(("%s: rx protocol error\n", __func__)); + brcmu_pkt_buf_free_skb(pkt); + bus->drvr->rx_errors++; continue; } /* Unlock during rx call */ - dhd_os_sdunlock(bus->dhd); - dhd_rx_frame(bus->dhd, ifidx, pkt, 1); - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); + brcmf_rx_frame(bus->drvr, ifidx, pkt, 1); + brcmf_sdbrcm_sdlock(bus); } rxcount = maxframes - rxleft; -#ifdef DHD_DEBUG +#ifdef BCMDBG /* Message if we hit the limit */ if (!rxleft && !sdtest) - DHD_DATA(("%s: hit rx limit of %d frames\n", __func__, - maxframes)); + BRCMF_DATA(("%s: hit rx limit of %d frames\n", __func__, + maxframes)); else -#endif /* DHD_DEBUG */ - DHD_DATA(("%s: processed %d frames\n", __func__, rxcount)); +#endif /* BCMDBG */ + BRCMF_DATA(("%s: processed %d frames\n", __func__, rxcount)); /* Back off rxseq if awaiting rtx, update rx_seq */ if (bus->rxskip) rxseq--; @@ -4160,28 +4577,30 @@ deliver: return rxcount; } -static u32 dhdsdio_hostmail(dhd_bus_t *bus) +static u32 brcmf_sdbrcm_hostmail(struct brcmf_bus *bus) { - sdpcmd_regs_t *regs = bus->regs; u32 intstatus = 0; u32 hmb_data; u8 fcbits; uint retries = 0; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* Read mailbox data and ack that we did so */ - R_SDREG(hmb_data, ®s->tohostmailboxdata, retries); + r_sdreg32(bus, &hmb_data, + offsetof(struct sdpcmd_regs, tohostmailboxdata), &retries); + if (retries <= retry_limit) - W_SDREG(SMB_INT_ACK, ®s->tosbmailbox, retries); + w_sdreg32(bus, SMB_INT_ACK, + offsetof(struct sdpcmd_regs, tosbmailbox), &retries); bus->f1regdata += 2; /* Dongle recomposed rx frames, accept them again */ if (hmb_data & HMB_DATA_NAKHANDLED) { - DHD_INFO(("Dongle reports NAK handled, expect rtx of %d\n", - bus->rx_seq)); + BRCMF_INFO(("Dongle reports NAK handled, expect rtx of %d\n", + bus->rx_seq)); if (!bus->rxskip) - DHD_ERROR(("%s: unexpected NAKHANDLED!\n", __func__)); + BRCMF_ERROR(("%s: unexpected NAKHANDLED!\n", __func__)); bus->rxskip = false; intstatus |= I_HMB_FRAME_IND; @@ -4195,12 +4614,12 @@ static u32 dhdsdio_hostmail(dhd_bus_t *bus) (hmb_data & HMB_DATA_VERSION_MASK) >> HMB_DATA_VERSION_SHIFT; if (bus->sdpcm_ver != SDPCM_PROT_VERSION) - DHD_ERROR(("Version mismatch, dongle reports %d, " - "expecting %d\n", - bus->sdpcm_ver, SDPCM_PROT_VERSION)); + BRCMF_ERROR(("Version mismatch, dongle reports %d, " + "expecting %d\n", + bus->sdpcm_ver, SDPCM_PROT_VERSION)); else - DHD_INFO(("Dongle ready, protocol version %d\n", - bus->sdpcm_ver)); + BRCMF_INFO(("Dongle ready, protocol version %d\n", + bus->sdpcm_ver)); } /* @@ -4228,78 +4647,74 @@ static u32 dhdsdio_hostmail(dhd_bus_t *bus) HMB_DATA_FC | HMB_DATA_FWREADY | HMB_DATA_FCDATA_MASK | HMB_DATA_VERSION_MASK)) { - DHD_ERROR(("Unknown mailbox data content: 0x%02x\n", hmb_data)); + BRCMF_ERROR(("Unknown mailbox data content: 0x%02x\n", + hmb_data)); } return intstatus; } -bool dhdsdio_dpc(dhd_bus_t *bus) +static bool brcmf_sdbrcm_dpc(struct brcmf_bus *bus) { - bcmsdh_info_t *sdh = bus->sdh; - sdpcmd_regs_t *regs = bus->regs; + struct brcmf_sdio_card *card = bus->card; u32 intstatus, newstatus = 0; uint retries = 0; - uint rxlimit = dhd_rxbound; /* Rx frames to read before resched */ - uint txlimit = dhd_txbound; /* Tx frames to send before resched */ + uint rxlimit = brcmf_rxbound; /* Rx frames to read before resched */ + uint txlimit = brcmf_txbound; /* Tx frames to send before resched */ uint framecnt = 0; /* Temporary counter of tx/rx frames */ bool rxdone = true; /* Flag for no more read data */ bool resched = false; /* Flag indicating resched wanted */ - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* Start with leftover status bits */ intstatus = bus->intstatus; - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); /* If waiting for HTAVAIL, check status */ if (bus->clkstate == CLK_PENDING) { int err; u8 clkctl, devctl = 0; -#ifdef DHD_DEBUG +#ifdef BCMDBG /* Check for inconsistent device control */ - devctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, &err); + devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, &err); if (err) { - DHD_ERROR(("%s: error reading DEVCTL: %d\n", - __func__, err)); - bus->dhd->busstate = DHD_BUS_DOWN; - } else { - ASSERT(devctl & SBSDIO_DEVCTL_CA_INT_ONLY); + BRCMF_ERROR(("%s: error reading DEVCTL: %d\n", + __func__, err)); + bus->drvr->busstate = BRCMF_BUS_DOWN; } -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ /* Read CSR, if clock on switch to AVAIL, else ignore */ - clkctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - &err); + clkctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, &err); if (err) { - DHD_ERROR(("%s: error reading CSR: %d\n", __func__, - err)); - bus->dhd->busstate = DHD_BUS_DOWN; + BRCMF_ERROR(("%s: error reading CSR: %d\n", __func__, + err)); + bus->drvr->busstate = BRCMF_BUS_DOWN; } - DHD_INFO(("DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n", devctl, - clkctl)); + BRCMF_INFO(("DPC: PENDING, devctl 0x%02x clkctl 0x%02x\n", + devctl, clkctl)); if (SBSDIO_HTAV(clkctl)) { - devctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - &err); + devctl = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, &err); if (err) { - DHD_ERROR(("%s: error reading DEVCTL: %d\n", - __func__, err)); - bus->dhd->busstate = DHD_BUS_DOWN; + BRCMF_ERROR(("%s: error reading DEVCTL: %d\n", + __func__, err)); + bus->drvr->busstate = BRCMF_BUS_DOWN; } devctl &= ~SBSDIO_DEVCTL_CA_INT_ONLY; - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_DEVICE_CTL, - devctl, &err); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, + SBSDIO_DEVICE_CTL, devctl, &err); if (err) { - DHD_ERROR(("%s: error writing DEVCTL: %d\n", - __func__, err)); - bus->dhd->busstate = DHD_BUS_DOWN; + BRCMF_ERROR(("%s: error writing DEVCTL: %d\n", + __func__, err)); + bus->drvr->busstate = BRCMF_BUS_DOWN; } bus->clkstate = CLK_AVAIL; } else { @@ -4310,21 +4725,24 @@ bool dhdsdio_dpc(dhd_bus_t *bus) BUS_WAKE(bus); /* Make sure backplane clock is on */ - dhdsdio_clkctl(bus, CLK_AVAIL, true); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, true); if (bus->clkstate == CLK_PENDING) goto clkwait; /* Pending interrupt indicates new device status */ if (bus->ipend) { bus->ipend = false; - R_SDREG(newstatus, ®s->intstatus, retries); + r_sdreg32(bus, &newstatus, + offsetof(struct sdpcmd_regs, intstatus), &retries); bus->f1regdata++; - if (bcmsdh_regfail(bus->sdh)) + if (brcmf_sdcard_regfail(bus->card)) newstatus = 0; newstatus &= bus->hostintmask; bus->fcstate = !!(newstatus & I_HMB_FC_STATE); if (newstatus) { - W_SDREG(newstatus, ®s->intstatus, retries); + w_sdreg32(bus, newstatus, + offsetof(struct sdpcmd_regs, intstatus), + &retries); bus->f1regdata++; } } @@ -4339,8 +4757,11 @@ bool dhdsdio_dpc(dhd_bus_t *bus) */ if (intstatus & I_HMB_FC_CHANGE) { intstatus &= ~I_HMB_FC_CHANGE; - W_SDREG(I_HMB_FC_CHANGE, ®s->intstatus, retries); - R_SDREG(newstatus, ®s->intstatus, retries); + w_sdreg32(bus, I_HMB_FC_CHANGE, + offsetof(struct sdpcmd_regs, intstatus), &retries); + + r_sdreg32(bus, &newstatus, + offsetof(struct sdpcmd_regs, intstatus), &retries); bus->f1regdata += 2; bus->fcstate = !!(newstatus & (I_HMB_FC_STATE | I_HMB_FC_CHANGE)); @@ -4350,28 +4771,28 @@ bool dhdsdio_dpc(dhd_bus_t *bus) /* Handle host mailbox indication */ if (intstatus & I_HMB_HOST_INT) { intstatus &= ~I_HMB_HOST_INT; - intstatus |= dhdsdio_hostmail(bus); + intstatus |= brcmf_sdbrcm_hostmail(bus); } /* Generally don't ask for these, can get CRC errors... */ if (intstatus & I_WR_OOSYNC) { - DHD_ERROR(("Dongle reports WR_OOSYNC\n")); + BRCMF_ERROR(("Dongle reports WR_OOSYNC\n")); intstatus &= ~I_WR_OOSYNC; } if (intstatus & I_RD_OOSYNC) { - DHD_ERROR(("Dongle reports RD_OOSYNC\n")); + BRCMF_ERROR(("Dongle reports RD_OOSYNC\n")); intstatus &= ~I_RD_OOSYNC; } if (intstatus & I_SBINT) { - DHD_ERROR(("Dongle reports SBINT\n")); + BRCMF_ERROR(("Dongle reports SBINT\n")); intstatus &= ~I_SBINT; } /* Would be active due to wake-wlan in gSPI */ if (intstatus & I_CHIPACTIVE) { - DHD_INFO(("Dongle reports CHIPACTIVE\n")); + BRCMF_INFO(("Dongle reports CHIPACTIVE\n")); intstatus &= ~I_CHIPACTIVE; } @@ -4381,7 +4802,7 @@ bool dhdsdio_dpc(dhd_bus_t *bus) /* On frame indication, read available frames */ if (PKT_AVAILABLE()) { - framecnt = dhdsdio_readframes(bus, rxlimit, &rxdone); + framecnt = brcmf_sdbrcm_readframes(bus, rxlimit, &rxdone); if (rxdone || bus->rxskip) intstatus &= ~I_HMB_FRAME_IND; rxlimit -= min(framecnt, rxlimit); @@ -4391,51 +4812,45 @@ bool dhdsdio_dpc(dhd_bus_t *bus) bus->intstatus = intstatus; clkwait: -#if defined(OOB_INTR_ONLY) - bcmsdh_oob_intr_set(1); -#endif /* (OOB_INTR_ONLY) */ /* Re-enable interrupts to detect new device events (mailbox, rx frame) * or clock availability. (Allows tx loop to check ipend if desired.) * (Unless register access seems hosed, as we may not be able to ACK...) */ - if (bus->intr && bus->intdis && !bcmsdh_regfail(sdh)) { - DHD_INTR(("%s: enable SDIO interrupts, rxdone %d framecnt %d\n", - __func__, rxdone, framecnt)); + if (bus->intr && bus->intdis && !brcmf_sdcard_regfail(card)) { + BRCMF_INTR(("%s: enable SDIO interrupts, rxdone %d" + " framecnt %d\n", __func__, rxdone, framecnt)); bus->intdis = false; - bcmsdh_intr_enable(sdh); + brcmf_sdcard_intr_enable(card); } if (DATAOK(bus) && bus->ctrl_frame_stat && (bus->clkstate == CLK_AVAIL)) { int ret, i; - ret = - dhd_bcmsdh_send_buf(bus, bcmsdh_cur_sbwad(sdh), SDIO_FUNC_2, - F2SYNC, (u8 *) bus->ctrl_frame_buf, - (u32) bus->ctrl_frame_len, NULL, - NULL, NULL); - ASSERT(ret != -BCME_PENDING); + ret = brcmf_sdbrcm_send_buf(bus, brcmf_sdcard_cur_sbwad(card), + SDIO_FUNC_2, F2SYNC, (u8 *) bus->ctrl_frame_buf, + (u32) bus->ctrl_frame_len, NULL, NULL, NULL); if (ret < 0) { /* On failure, abort the command and terminate the frame */ - DHD_INFO(("%s: sdio error %d, abort command and " - "terminate frame.\n", __func__, ret)); + BRCMF_INFO(("%s: sdio error %d, abort command and " + "terminate frame.\n", __func__, ret)); bus->tx_sderrs++; - bcmsdh_abort(sdh, SDIO_FUNC_2); + brcmf_sdcard_abort(card, SDIO_FUNC_2); - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_FRAMECTRL, SFC_WF_TERM, NULL); bus->f1regdata++; for (i = 0; i < 3; i++) { u8 hi, lo; - hi = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, + hi = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, SBSDIO_FUNC1_WFRAMEBCHI, NULL); - lo = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, + lo = brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, SBSDIO_FUNC1_WFRAMEBCLO, NULL); bus->f1regdata += 2; @@ -4447,16 +4862,16 @@ clkwait: if (ret == 0) bus->tx_seq = (bus->tx_seq + 1) % SDPCM_SEQUENCE_WRAP; - DHD_INFO(("Return_dpc value is : %d\n", ret)); + BRCMF_INFO(("Return_dpc value is : %d\n", ret)); bus->ctrl_frame_stat = false; - dhd_wait_event_wakeup(bus->dhd); + brcmf_sdbrcm_wait_event_wakeup(bus); } /* Send queued frames (limit 1 if rx may still be pending) */ else if ((bus->clkstate == CLK_AVAIL) && !bus->fcstate && - bcm_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit + brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) && txlimit && DATAOK(bus)) { - framecnt = rxdone ? txlimit : min(txlimit, dhd_txminmax); - framecnt = dhdsdio_sendfromq(bus, framecnt); + framecnt = rxdone ? txlimit : min(txlimit, brcmf_txminmax); + framecnt = brcmf_sdbrcm_sendfromq(bus, framecnt); txlimit -= framecnt; } @@ -4464,18 +4879,20 @@ clkwait: else await next interrupt */ /* On failed register access, all bets are off: no resched or interrupts */ - if ((bus->dhd->busstate == DHD_BUS_DOWN) || bcmsdh_regfail(sdh)) { - DHD_ERROR(("%s: failed backplane access over SDIO, halting " - "operation %d\n", __func__, bcmsdh_regfail(sdh))); - bus->dhd->busstate = DHD_BUS_DOWN; + if ((bus->drvr->busstate == BRCMF_BUS_DOWN) || + brcmf_sdcard_regfail(card)) { + BRCMF_ERROR(("%s: failed backplane access over SDIO, halting " + "operation %d\n", __func__, + brcmf_sdcard_regfail(card))); + bus->drvr->busstate = BRCMF_BUS_DOWN; bus->intstatus = 0; } else if (bus->clkstate == CLK_PENDING) { - DHD_INFO(("%s: rescheduled due to CLK_PENDING awaiting " - "I_CHIPACTIVE interrupt\n", __func__)); + BRCMF_INFO(("%s: rescheduled due to CLK_PENDING awaiting " + "I_CHIPACTIVE interrupt\n", __func__)); resched = true; } else if (bus->intstatus || bus->ipend || - (!bus->fcstate && bcm_pktq_mlen(&bus->txq, ~bus->flowcontrol) && - DATAOK(bus)) || PKT_AVAILABLE()) { + (!bus->fcstate && brcmu_pktq_mlen(&bus->txq, ~bus->flowcontrol) + && DATAOK(bus)) || PKT_AVAILABLE()) { resched = true; } @@ -4483,42 +4900,31 @@ clkwait: /* If we're done for now, turn off clock request. */ if ((bus->clkstate != CLK_PENDING) - && bus->idletime == DHD_IDLE_IMMEDIATE) { + && bus->idletime == BRCMF_IDLE_IMMEDIATE) { bus->activity = false; - dhdsdio_clkctl(bus, CLK_NONE, false); + brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); } - dhd_os_sdunlock(bus->dhd); - - return resched; -} - -bool dhd_bus_dpc(struct dhd_bus *bus) -{ - bool resched; - - /* Call the DPC directly. */ - DHD_TRACE(("Calling dhdsdio_dpc() from %s\n", __func__)); - resched = dhdsdio_dpc(bus); + brcmf_sdbrcm_sdunlock(bus); return resched; } -void dhdsdio_isr(void *arg) +void brcmf_sdbrcm_isr(void *arg) { - dhd_bus_t *bus = (dhd_bus_t *) arg; - bcmsdh_info_t *sdh; + struct brcmf_bus *bus = (struct brcmf_bus *) arg; + struct brcmf_sdio_card *card; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); if (!bus) { - DHD_ERROR(("%s : bus is null pointer , exit\n", __func__)); + BRCMF_ERROR(("%s : bus is null pointer , exit\n", __func__)); return; } - sdh = bus->sdh; + card = bus->card; - if (bus->dhd->busstate == DHD_BUS_DOWN) { - DHD_ERROR(("%s : bus is down. we have nothing to do\n", + if (bus->drvr->busstate == BRCMF_BUS_DOWN) { + BRCMF_ERROR(("%s : bus is down. we have nothing to do\n", __func__)); return; } @@ -4528,54 +4934,55 @@ void dhdsdio_isr(void *arg) /* Shouldn't get this interrupt if we're sleeping? */ if (bus->sleeping) { - DHD_ERROR(("INTERRUPT WHILE SLEEPING??\n")); + BRCMF_ERROR(("INTERRUPT WHILE SLEEPING??\n")); return; } /* Disable additional interrupts (is this needed now)? */ if (bus->intr) - DHD_INTR(("%s: disable SDIO interrupts\n", __func__)); + BRCMF_INTR(("%s: disable SDIO interrupts\n", __func__)); else - DHD_ERROR(("dhdsdio_isr() w/o interrupt configured!\n")); + BRCMF_ERROR(("brcmf_sdbrcm_isr() w/o interrupt configured!\n")); - bcmsdh_intr_disable(sdh); + brcmf_sdcard_intr_disable(card); bus->intdis = true; #if defined(SDIO_ISR_THREAD) - DHD_TRACE(("Calling dhdsdio_dpc() from %s\n", __func__)); - while (dhdsdio_dpc(bus)) + BRCMF_TRACE(("Calling brcmf_sdbrcm_dpc() from %s\n", __func__)); + while (brcmf_sdbrcm_dpc(bus)) ; #else bus->dpc_sched = true; - dhd_sched_dpc(bus->dhd); + brcmf_sdbrcm_sched_dpc(bus); #endif } #ifdef SDTEST -static void dhdsdio_pktgen_init(dhd_bus_t *bus) +static void brcmf_sdbrcm_pktgen_init(struct brcmf_bus *bus) { /* Default to specified length, or full range */ - if (dhd_pktgen_len) { - bus->pktgen_maxlen = min(dhd_pktgen_len, MAX_PKTGEN_LEN); + if (brcmf_pktgen_len) { + bus->pktgen_maxlen = min(brcmf_pktgen_len, + BRCMF_MAX_PKTGEN_LEN); bus->pktgen_minlen = bus->pktgen_maxlen; } else { - bus->pktgen_maxlen = MAX_PKTGEN_LEN; + bus->pktgen_maxlen = BRCMF_MAX_PKTGEN_LEN; bus->pktgen_minlen = 0; } bus->pktgen_len = (u16) bus->pktgen_minlen; /* Default to per-watchdog burst with 10s print time */ bus->pktgen_freq = 1; - bus->pktgen_print = 10000 / dhd_watchdog_ms; - bus->pktgen_count = (dhd_pktgen * dhd_watchdog_ms + 999) / 1000; + bus->pktgen_print = 10000 / brcmf_watchdog_ms; + bus->pktgen_count = (brcmf_pktgen * brcmf_watchdog_ms + 999) / 1000; /* Default to echo mode */ - bus->pktgen_mode = DHD_PKTGEN_ECHO; + bus->pktgen_mode = BRCMF_PKTGEN_ECHO; bus->pktgen_stop = 1; } -static void dhdsdio_pktgen(dhd_bus_t *bus) +static void brcmf_sdbrcm_pktgen(struct brcmf_bus *bus) { struct sk_buff *pkt; u8 *data; @@ -4591,9 +4998,9 @@ static void dhdsdio_pktgen(dhd_bus_t *bus) } /* For recv mode, just make sure dongle has started sending */ - if (bus->pktgen_mode == DHD_PKTGEN_RECV) { + if (bus->pktgen_mode == BRCMF_PKTGEN_RECV) { if (!bus->pktgen_rcvd) - dhdsdio_sdtest_set(bus, true); + brcmf_sdbrcm_sdtest_set(bus, true); return; } @@ -4608,39 +5015,39 @@ static void dhdsdio_pktgen(dhd_bus_t *bus) /* Allocate an appropriate-sized packet */ len = bus->pktgen_len; - pkt = bcm_pkt_buf_get_skb( - (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + DHD_SDALIGN), + pkt = brcmu_pkt_buf_get_skb( + len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + BRCMF_SDALIGN, true); if (!pkt) { - DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed!\n", - __func__)); + BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", + __func__)); break; } PKTALIGN(pkt, (len + SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), - DHD_SDALIGN); + BRCMF_SDALIGN); data = (u8 *) (pkt->data) + SDPCM_HDRLEN; /* Write test header cmd and extra based on mode */ switch (bus->pktgen_mode) { - case DHD_PKTGEN_ECHO: + case BRCMF_PKTGEN_ECHO: *data++ = SDPCM_TEST_ECHOREQ; *data++ = (u8) bus->pktgen_sent; break; - case DHD_PKTGEN_SEND: + case BRCMF_PKTGEN_SEND: *data++ = SDPCM_TEST_DISCARD; *data++ = (u8) bus->pktgen_sent; break; - case DHD_PKTGEN_RXBURST: + case BRCMF_PKTGEN_RXBURST: *data++ = SDPCM_TEST_BURST; *data++ = (u8) bus->pktgen_count; break; default: - DHD_ERROR(("Unrecognized pktgen mode %d\n", - bus->pktgen_mode)); - bcm_pkt_buf_free_skb(pkt, true); + BRCMF_ERROR(("Unrecognized pktgen mode %d\n", + bus->pktgen_mode)); + brcmu_pkt_buf_free_skb(pkt, true); bus->pktgen_count = 0; return; } @@ -4655,17 +5062,17 @@ static void dhdsdio_pktgen(dhd_bus_t *bus) *data++ = SDPCM_TEST_FILL(fillbyte, (u8) bus->pktgen_sent); -#ifdef DHD_DEBUG - if (DHD_BYTES_ON() && DHD_DATA_ON()) { +#ifdef BCMDBG + if (BRCMF_BYTES_ON() && BRCMF_DATA_ON()) { data = (u8 *) (pkt->data) + SDPCM_HDRLEN; - printk(KERN_DEBUG "dhdsdio_pktgen: Tx Data:\n"); + printk(KERN_DEBUG "brcmf_sdbrcm_pktgen: Tx Data:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, data, pkt->len - SDPCM_HDRLEN); } #endif /* Send it */ - if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) { + if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) { bus->pktgen_fail++; if (bus->pktgen_stop && bus->pktgen_stop == bus->pktgen_fail) @@ -4678,24 +5085,24 @@ static void dhdsdio_pktgen(dhd_bus_t *bus) bus->pktgen_len = (u16) bus->pktgen_minlen; /* Special case for burst mode: just send one request! */ - if (bus->pktgen_mode == DHD_PKTGEN_RXBURST) + if (bus->pktgen_mode == BRCMF_PKTGEN_RXBURST) break; } } -static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start) +static void brcmf_sdbrcm_sdtest_set(struct brcmf_bus *bus, bool start) { struct sk_buff *pkt; u8 *data; /* Allocate the packet */ - pkt = bcm_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + - DHD_SDALIGN, true); + pkt = brcmu_pkt_buf_get_skb(SDPCM_HDRLEN + SDPCM_TEST_HDRLEN + + BRCMF_SDALIGN, true); if (!pkt) { - DHD_ERROR(("%s: bcm_pkt_buf_get_skb failed!\n", __func__)); + BRCMF_ERROR(("%s: brcmu_pkt_buf_get_skb failed!\n", __func__)); return; } - PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), DHD_SDALIGN); + PKTALIGN(pkt, (SDPCM_HDRLEN + SDPCM_TEST_HDRLEN), BRCMF_SDALIGN); data = (u8 *) (pkt->data) + SDPCM_HDRLEN; /* Fill in the test header */ @@ -4705,11 +5112,12 @@ static void dhdsdio_sdtest_set(dhd_bus_t *bus, bool start) *data++ = (bus->pktgen_maxlen >> 8); /* Send it */ - if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) + if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true)) bus->pktgen_fail++; } -static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) +static void +brcmf_sdbrcm_checkdied(struct brcmf_bus *bus, struct sk_buff *pkt, uint seq) { u8 *data; uint pktlen; @@ -4722,9 +5130,9 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) /* Check for min length */ pktlen = pkt->len; if (pktlen < SDPCM_TEST_HDRLEN) { - DHD_ERROR(("dhdsdio_restrcv: toss runt frame, pktlen %d\n", - pktlen)); - bcm_pkt_buf_free_skb(pkt, false); + BRCMF_ERROR(("brcmf_sdbrcm_checkdied: toss runt frame, pktlen " + "%d\n", pktlen)); + brcmu_pkt_buf_free_skb(pkt, false); return; } @@ -4739,10 +5147,11 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) if (cmd == SDPCM_TEST_DISCARD || cmd == SDPCM_TEST_ECHOREQ || cmd == SDPCM_TEST_ECHORSP) { if (pktlen != len + SDPCM_TEST_HDRLEN) { - DHD_ERROR(("dhdsdio_testrcv: frame length mismatch, " - "pktlen %d seq %d" " cmd %d extra %d len %d\n", - pktlen, seq, cmd, extra, len)); - bcm_pkt_buf_free_skb(pkt, false); + BRCMF_ERROR(("brcmf_sdbrcm_checkdied: frame length " + "mismatch, pktlen %d seq %d" + " cmd %d extra %d len %d\n", + pktlen, seq, cmd, extra, len)); + brcmu_pkt_buf_free_skb(pkt, false); return; } } @@ -4753,76 +5162,80 @@ static void dhdsdio_testrcv(dhd_bus_t *bus, struct sk_buff *pkt, uint seq) /* Rx->Tx turnaround ok (even on NDIS w/current implementation) */ *(u8 *) (pkt->data) = SDPCM_TEST_ECHORSP; - if (dhdsdio_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0) { + if (brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_TEST_CHANNEL, true) == 0) bus->pktgen_sent++; - } else { + else { bus->pktgen_fail++; - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); } bus->pktgen_rcvd++; break; case SDPCM_TEST_ECHORSP: if (bus->ext_loop) { - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); bus->pktgen_rcvd++; break; } for (offset = 0; offset < len; offset++, data++) { if (*data != SDPCM_TEST_FILL(offset, extra)) { - DHD_ERROR(("dhdsdio_testrcv: echo data mismatch: " "offset %d (len %d) expect 0x%02x rcvd 0x%02x\n", - offset, len, - SDPCM_TEST_FILL(offset, extra), *data)); + BRCMF_ERROR(("brcmf_sdbrcm_checkdied: echo" + " data mismatch: " + "offset %d (len %d) " + "expect 0x%02x rcvd 0x%02x\n", + offset, len, + SDPCM_TEST_FILL(offset, extra), + *data)); break; } } - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); bus->pktgen_rcvd++; break; case SDPCM_TEST_DISCARD: - bcm_pkt_buf_free_skb(pkt, false); + brcmu_pkt_buf_free_skb(pkt, false); bus->pktgen_rcvd++; break; case SDPCM_TEST_BURST: case SDPCM_TEST_SEND: default: - DHD_INFO(("dhdsdio_testrcv: unsupported or unknown command, " - "pktlen %d seq %d" " cmd %d extra %d len %d\n", - pktlen, seq, cmd, extra, len)); - bcm_pkt_buf_free_skb(pkt, false); + BRCMF_INFO(("brcmf_sdbrcm_checkdied: unsupported or unknown " + "command, pktlen %d seq %d" " cmd %d extra %d" + " len %d\n", pktlen, seq, cmd, extra, len)); + brcmu_pkt_buf_free_skb(pkt, false); break; } /* For recv mode, stop at limie (and tell dongle to stop sending) */ - if (bus->pktgen_mode == DHD_PKTGEN_RECV) { + if (bus->pktgen_mode == BRCMF_PKTGEN_RECV) { if (bus->pktgen_total && (bus->pktgen_rcvd >= bus->pktgen_total)) { bus->pktgen_count = 0; - dhdsdio_sdtest_set(bus, false); + brcmf_sdbrcm_sdtest_set(bus, false); } } } #endif /* SDTEST */ -extern bool dhd_bus_watchdog(dhd_pub_t *dhdp) +extern bool brcmf_sdbrcm_bus_watchdog(struct brcmf_pub *drvr) { - dhd_bus_t *bus; + struct brcmf_bus *bus; - DHD_TIMER(("%s: Enter\n", __func__)); + BRCMF_TIMER(("%s: Enter\n", __func__)); - bus = dhdp->bus; + bus = drvr->bus; - if (bus->dhd->dongle_reset) + if (bus->drvr->dongle_reset) return false; /* Ignore the timer if simulating bus down */ if (bus->sleeping) return false; - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); /* Poll period: check device if appropriate. */ if (bus->poll && (++bus->polltick >= bus->pollrate)) { @@ -4836,9 +5249,9 @@ extern bool dhd_bus_watchdog(dhd_pub_t *dhdp) if (!bus->dpc_sched) { u8 devpend; - devpend = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_0, - SDIOD_CCCR_INTPEND, - NULL); + devpend = brcmf_sdcard_cfg_read(bus->card, + SDIO_FUNC_0, SDIO_CCCR_INTx, + NULL); intstatus = devpend & (INTR_STATUS_FUNC1 | INTR_STATUS_FUNC2); @@ -4850,10 +5263,10 @@ extern bool dhd_bus_watchdog(dhd_pub_t *dhdp) bus->pollcnt++; bus->ipend = true; if (bus->intr) - bcmsdh_intr_disable(bus->sdh); + brcmf_sdcard_intr_disable(bus->card); bus->dpc_sched = true; - dhd_sched_dpc(bus->dhd); + brcmf_sdbrcm_sched_dpc(bus); } } @@ -4861,28 +5274,28 @@ extern bool dhd_bus_watchdog(dhd_pub_t *dhdp) /* Update interrupt tracking */ bus->lastintrs = bus->intrcount; } -#ifdef DHD_DEBUG +#ifdef BCMDBG /* Poll for console output periodically */ - if (dhdp->busstate == DHD_BUS_DATA && dhd_console_ms != 0) { - bus->console.count += dhd_watchdog_ms; - if (bus->console.count >= dhd_console_ms) { - bus->console.count -= dhd_console_ms; + if (drvr->busstate == BRCMF_BUS_DATA && brcmf_console_ms != 0) { + bus->console.count += brcmf_watchdog_ms; + if (bus->console.count >= brcmf_console_ms) { + bus->console.count -= brcmf_console_ms; /* Make sure backplane clock is on */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); - if (dhdsdio_readconsole(bus) < 0) - dhd_console_ms = 0; /* On error, + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); + if (brcmf_sdbrcm_readconsole(bus) < 0) + brcmf_console_ms = 0; /* On error, stop trying */ } } -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ #ifdef SDTEST /* Generate packets if configured */ if (bus->pktgen_count && (++bus->pktgen_tick >= bus->pktgen_freq)) { /* Make sure backplane clock is on */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); bus->pktgen_tick = 0; - dhdsdio_pktgen(bus); + brcmf_sdbrcm_pktgen(bus); } #endif @@ -4892,22 +5305,23 @@ extern bool dhd_bus_watchdog(dhd_pub_t *dhdp) bus->idlecount = 0; if (bus->activity) { bus->activity = false; - dhd_os_wd_timer(bus->dhd, dhd_watchdog_ms); + brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms); } else { - dhdsdio_clkctl(bus, CLK_NONE, false); + brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); } } } - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); return bus->ipend; } -#ifdef DHD_DEBUG -extern int dhd_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg, uint msglen) +#ifdef BCMDBG +static int brcmf_sdbrcm_bus_console_in(struct brcmf_pub *drvr, + unsigned char *msg, uint msglen) { - dhd_bus_t *bus = dhdp->bus; + struct brcmf_bus *bus = drvr->bus; u32 addr, val; int rv; struct sk_buff *pkt; @@ -4917,88 +5331,59 @@ extern int dhd_bus_console_in(dhd_pub_t *dhdp, unsigned char *msg, uint msglen) return -ENOTSUPP; /* Exclusive bus access */ - dhd_os_sdlock(bus->dhd); + brcmf_sdbrcm_sdlock(bus); /* Don't allow input if dongle is in reset */ - if (bus->dhd->dongle_reset) { - dhd_os_sdunlock(bus->dhd); + if (bus->drvr->dongle_reset) { + brcmf_sdbrcm_sdunlock(bus); return -EPERM; } /* Request clock to allow SDIO accesses */ BUS_WAKE(bus); /* No pend allowed since txpkt is called later, ht clk has to be on */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); /* Zero cbuf_index */ - addr = bus->console_addr + offsetof(hndrte_cons_t, cbuf_idx); + addr = bus->console_addr + offsetof(struct rte_console, cbuf_idx); val = cpu_to_le32(0); - rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val)); + rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val)); if (rv < 0) goto done; /* Write message into cbuf */ - addr = bus->console_addr + offsetof(hndrte_cons_t, cbuf); - rv = dhdsdio_membytes(bus, true, addr, (u8 *)msg, msglen); + addr = bus->console_addr + offsetof(struct rte_console, cbuf); + rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)msg, msglen); if (rv < 0) goto done; /* Write length into vcons_in */ - addr = bus->console_addr + offsetof(hndrte_cons_t, vcons_in); + addr = bus->console_addr + offsetof(struct rte_console, vcons_in); val = cpu_to_le32(msglen); - rv = dhdsdio_membytes(bus, true, addr, (u8 *)&val, sizeof(val)); + rv = brcmf_sdbrcm_membytes(bus, true, addr, (u8 *)&val, sizeof(val)); if (rv < 0) goto done; /* Bump dongle by sending an empty event pkt. * sdpcm_sendup (RX) checks for virtual console input. */ - pkt = bcm_pkt_buf_get_skb(4 + SDPCM_RESERVE); + pkt = brcmu_pkt_buf_get_skb(4 + SDPCM_RESERVE); if ((pkt != NULL) && bus->clkstate == CLK_AVAIL) - dhdsdio_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true); + brcmf_sdbrcm_txpkt(bus, pkt, SDPCM_EVENT_CHANNEL, true); done: - if ((bus->idletime == DHD_IDLE_IMMEDIATE) && !bus->dpc_sched) { + if ((bus->idletime == BRCMF_IDLE_IMMEDIATE) && !bus->dpc_sched) { bus->activity = false; - dhdsdio_clkctl(bus, CLK_NONE, true); + brcmf_sdbrcm_clkctl(bus, CLK_NONE, true); } - dhd_os_sdunlock(bus->dhd); + brcmf_sdbrcm_sdunlock(bus); return rv; } -#endif /* DHD_DEBUG */ - -#ifdef DHD_DEBUG -static void dhd_dump_cis(uint fn, u8 *cis) -{ - uint byte, tag, tdata; - DHD_INFO(("Function %d CIS:\n", fn)); - - for (tdata = byte = 0; byte < SBSDIO_CIS_SIZE_LIMIT; byte++) { - if ((byte % 16) == 0) - DHD_INFO((" ")); - DHD_INFO(("%02x ", cis[byte])); - if ((byte % 16) == 15) - DHD_INFO(("\n")); - if (!tdata--) { - tag = cis[byte]; - if (tag == 0xff) - break; - else if (!tag) - tdata = 0; - else if ((byte + 1) < SBSDIO_CIS_SIZE_LIMIT) - tdata = cis[byte + 1] + 1; - else - DHD_INFO(("]")); - } - } - if ((byte % 16) != 15) - DHD_INFO(("\n")); -} -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ -static bool dhdsdio_chipmatch(u16 chipid) +static bool brcmf_sdbrcm_chipmatch(u16 chipid) { if (chipid == BCM4325_CHIP_ID) return true; @@ -5009,12 +5394,12 @@ static bool dhdsdio_chipmatch(u16 chipid) return false; } -static void *dhdsdio_probe(u16 venid, u16 devid, u16 bus_no, - u16 slot, u16 func, uint bustype, void *regsva, - void *sdh) +static void *brcmf_sdbrcm_probe(u16 venid, u16 devid, u16 bus_no, + u16 slot, u16 func, uint bustype, u32 regsva, + void *card) { int ret; - dhd_bus_t *bus; + struct brcmf_bus *bus; /* Init global variables at run-time, not as part of the declaration. * This is required to support init/de-init of the driver. @@ -5024,26 +5409,26 @@ static void *dhdsdio_probe(u16 venid, u16 devid, u16 bus_no, * first time that the driver is initialized vs subsequent * initializations. */ - dhd_txbound = DHD_TXBOUND; - dhd_rxbound = DHD_RXBOUND; - dhd_alignctl = true; + brcmf_txbound = BRCMF_TXBOUND; + brcmf_rxbound = BRCMF_RXBOUND; + brcmf_alignctl = true; sd1idle = true; - dhd_readahead = true; + brcmf_readahead = true; retrydata = false; - dhd_dongle_memsize = 0; - dhd_txminmax = DHD_TXMINMAX; + brcmf_dongle_memsize = 0; + brcmf_txminmax = BRCMF_TXMINMAX; forcealign = true; - dhd_common_init(); + brcmf_c_init(); - DHD_TRACE(("%s: Enter\n", __func__)); - DHD_INFO(("%s: venid 0x%04x devid 0x%04x\n", __func__, venid, devid)); + BRCMF_TRACE(("%s: Enter\n", __func__)); + BRCMF_INFO(("%s: venid 0x%04x devid 0x%04x\n", __func__, venid, devid)); - /* We make assumptions about address window mappings */ - ASSERT((unsigned long)regsva == SI_ENUM_BASE); + /* We make an assumption about address window mappings: + * regsva == SI_ENUM_BASE*/ - /* BCMSDH passes venid and devid based on CIS parsing -- but + /* SDIO car passes venid and devid based on CIS parsing -- but * low-power start * means early parse could fail, so here we should get either an ID * we recognize OR (-1) indicating we must request power first. @@ -5054,7 +5439,7 @@ static void *dhdsdio_probe(u16 venid, u16 devid, u16 bus_no, case PCI_VENDOR_ID_BROADCOM: break; default: - DHD_ERROR(("%s: unknown vendor: 0x%04x\n", __func__, venid)); + BRCMF_ERROR(("%s: unknown vendor: 0x%04x\n", __func__, venid)); return NULL; } @@ -5063,104 +5448,156 @@ static void *dhdsdio_probe(u16 venid, u16 devid, u16 bus_no, case BCM4325_D11DUAL_ID: /* 4325 802.11a/g id */ case BCM4325_D11G_ID: /* 4325 802.11g 2.4Ghz band id */ case BCM4325_D11A_ID: /* 4325 802.11a 5Ghz band id */ - DHD_INFO(("%s: found 4325 Dongle\n", __func__)); + BRCMF_INFO(("%s: found 4325 Dongle\n", __func__)); break; case BCM4329_D11NDUAL_ID: /* 4329 802.11n dualband device */ case BCM4329_D11N2G_ID: /* 4329 802.11n 2.4G device */ case BCM4329_D11N5G_ID: /* 4329 802.11n 5G device */ case 0x4329: - DHD_INFO(("%s: found 4329 Dongle\n", __func__)); + BRCMF_INFO(("%s: found 4329 Dongle\n", __func__)); break; case BCM4319_D11N_ID: /* 4319 802.11n id */ case BCM4319_D11N2G_ID: /* 4319 802.11n2g id */ case BCM4319_D11N5G_ID: /* 4319 802.11n5g id */ - DHD_INFO(("%s: found 4319 Dongle\n", __func__)); + BRCMF_INFO(("%s: found 4319 Dongle\n", __func__)); break; case 0: - DHD_INFO(("%s: allow device id 0, will check chip internals\n", - __func__)); + BRCMF_INFO(("%s: allow device id 0, will check chip" + " internals\n", __func__)); break; default: - DHD_ERROR(("%s: skipping 0x%04x/0x%04x, not a dongle\n", - __func__, venid, devid)); + BRCMF_ERROR(("%s: skipping 0x%04x/0x%04x, not a dongle\n", + __func__, venid, devid)); return NULL; } /* Allocate private bus interface state */ - bus = kzalloc(sizeof(dhd_bus_t), GFP_ATOMIC); + bus = kzalloc(sizeof(struct brcmf_bus), GFP_ATOMIC); if (!bus) { - DHD_ERROR(("%s: kmalloc of dhd_bus_t failed\n", __func__)); + BRCMF_ERROR(("%s: kmalloc of struct dhd_bus failed\n", + __func__)); goto fail; } - bus->sdh = sdh; + bus->card = card; bus->cl_devid = (u16) devid; - bus->bus = DHD_BUS; + bus->bus = BRCMF_BUS; bus->tx_seq = SDPCM_SEQUENCE_WRAP - 1; bus->usebufpool = false; /* Use bufpool if allocated, else use locally malloced rxbuf */ /* attempt to attach to the dongle */ - if (!(dhdsdio_probe_attach(bus, sdh, regsva, devid))) { - DHD_ERROR(("%s: dhdsdio_probe_attach failed\n", __func__)); + if (!(brcmf_sdbrcm_probe_attach(bus, card, regsva, devid))) { + BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_attach failed\n", + __func__)); goto fail; } - /* Attach to the dhd/OS/network interface */ - bus->dhd = dhd_attach(bus, SDPCM_RESERVE); - if (!bus->dhd) { - DHD_ERROR(("%s: dhd_attach failed\n", __func__)); + spin_lock_init(&bus->txqlock); + init_waitqueue_head(&bus->ctrl_wait); + + /* Set up the watchdog timer */ + init_timer(&bus->timer); + bus->timer.data = (unsigned long)bus; + bus->timer.function = brcmf_sdbrcm_watchdog; + + /* Initialize thread based operation and lock */ + if ((brcmf_watchdog_prio >= 0) && (brcmf_dpc_prio >= 0)) { + bus->threads_only = true; + sema_init(&bus->sdsem, 1); + } else { + bus->threads_only = false; + spin_lock_init(&bus->sdlock); + } + + if (brcmf_dpc_prio >= 0) { + /* Initialize watchdog thread */ + init_completion(&bus->watchdog_wait); + bus->watchdog_tsk = kthread_run(brcmf_sdbrcm_watchdog_thread, + bus, "brcmf_watchdog"); + if (IS_ERR(bus->watchdog_tsk)) { + printk(KERN_WARNING + "brcmf_watchdog thread failed to start\n"); + bus->watchdog_tsk = NULL; + } + } else + bus->watchdog_tsk = NULL; + + /* Set up the bottom half handler */ + if (brcmf_dpc_prio >= 0) { + /* Initialize DPC thread */ + init_completion(&bus->dpc_wait); + bus->dpc_tsk = kthread_run(brcmf_sdbrcm_dpc_thread, + bus, "brcmf_dpc"); + if (IS_ERR(bus->dpc_tsk)) { + printk(KERN_WARNING + "brcmf_dpc thread failed to start\n"); + bus->dpc_tsk = NULL; + } + } else { + tasklet_init(&bus->tasklet, brcmf_sdbrcm_dpc_tasklet, + (unsigned long)bus); + bus->dpc_tsk = NULL; + } + + /* Attach to the brcmf/OS/network interface */ + bus->drvr = brcmf_attach(bus, SDPCM_RESERVE); + if (!bus->drvr) { + BRCMF_ERROR(("%s: brcmf_attach failed\n", __func__)); goto fail; } /* Allocate buffers */ - if (!(dhdsdio_probe_malloc(bus, sdh))) { - DHD_ERROR(("%s: dhdsdio_probe_malloc failed\n", __func__)); + if (!(brcmf_sdbrcm_probe_malloc(bus, card))) { + BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_malloc failed\n", + __func__)); goto fail; } - if (!(dhdsdio_probe_init(bus, sdh))) { - DHD_ERROR(("%s: dhdsdio_probe_init failed\n", __func__)); + if (!(brcmf_sdbrcm_probe_init(bus, card))) { + BRCMF_ERROR(("%s: brcmf_sdbrcm_probe_init failed\n", __func__)); goto fail; } /* Register interrupt callback, but mask it (not operational yet). */ - DHD_INTR(("%s: disable SDIO interrupts (not interested yet)\n", - __func__)); - bcmsdh_intr_disable(sdh); - ret = bcmsdh_intr_reg(sdh, dhdsdio_isr, bus); + BRCMF_INTR(("%s: disable SDIO interrupts (not interested yet)\n", + __func__)); + brcmf_sdcard_intr_disable(card); + ret = brcmf_sdcard_intr_reg(card, brcmf_sdbrcm_isr, bus); if (ret != 0) { - DHD_ERROR(("%s: FAILED: bcmsdh_intr_reg returned %d\n", - __func__, ret)); + BRCMF_ERROR(("%s: FAILED: sdcard_intr_reg returned %d\n", + __func__, ret)); goto fail; } - DHD_INTR(("%s: registered SDIO interrupt function ok\n", __func__)); + BRCMF_INTR(("%s: registered SDIO interrupt function ok\n", __func__)); - DHD_INFO(("%s: completed!!\n", __func__)); + BRCMF_INFO(("%s: completed!!\n", __func__)); /* if firmware path present try to download and bring up bus */ - ret = dhd_bus_start(bus->dhd); + ret = brcmf_bus_start(bus->drvr); if (ret != 0) { if (ret == -ENOLINK) { - DHD_ERROR(("%s: dongle is not responding\n", __func__)); + BRCMF_ERROR(("%s: dongle is not responding\n", + __func__)); goto fail; } } /* Ok, have the per-port tell the stack we're open for business */ - if (dhd_net_attach(bus->dhd, 0) != 0) { - DHD_ERROR(("%s: Net attach failed!!\n", __func__)); + if (brcmf_net_attach(bus->drvr, 0) != 0) { + BRCMF_ERROR(("%s: Net attach failed!!\n", __func__)); goto fail; } return bus; fail: - dhdsdio_release(bus); + brcmf_sdbrcm_release(bus); return NULL; } static bool -dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid) +brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, void *card, u32 regsva, + u16 devid) { u8 clkctl = 0; int err = 0; @@ -5168,130 +5605,81 @@ dhdsdio_probe_attach(struct dhd_bus *bus, void *sdh, void *regsva, u16 devid) bus->alp_only = true; /* Return the window to backplane enumeration space for core access */ - if (dhdsdio_set_siaddr_window(bus, SI_ENUM_BASE)) - DHD_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n", __func__)); + if (brcmf_sdbrcm_set_siaddr_window(bus, SI_ENUM_BASE)) + BRCMF_ERROR(("%s: FAILED to return to SI_ENUM_BASE\n", + __func__)); -#ifdef DHD_DEBUG +#ifdef BCMDBG printk(KERN_DEBUG "F1 signature read @0x18000000=0x%4x\n", - bcmsdh_reg_read(bus->sdh, SI_ENUM_BASE, 4)); + brcmf_sdcard_reg_read(bus->card, SI_ENUM_BASE, 4)); -#endif /* DHD_DEBUG */ +#endif /* BCMDBG */ /* - * Force PLL off until dhdsdio_chip_attach() + * Force PLL off until brcmf_sdbrcm_chip_attach() * programs PLL control regs */ - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - DHD_INIT_CLKCTL1, &err); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, + BRCMF_INIT_CLKCTL1, &err); if (!err) clkctl = - bcmsdh_cfg_read(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - &err); + brcmf_sdcard_cfg_read(card, SDIO_FUNC_1, + SBSDIO_FUNC1_CHIPCLKCSR, &err); - if (err || ((clkctl & ~SBSDIO_AVBITS) != DHD_INIT_CLKCTL1)) { - DHD_ERROR(("dhdsdio_probe: ChipClkCSR access: err %d wrote " - "0x%02x read 0x%02x\n", - err, DHD_INIT_CLKCTL1, clkctl)); + if (err || ((clkctl & ~SBSDIO_AVBITS) != BRCMF_INIT_CLKCTL1)) { + BRCMF_ERROR(("brcmf_sdbrcm_probe: ChipClkCSR access: err %d" + " wrote 0x%02x read 0x%02x\n", + err, BRCMF_INIT_CLKCTL1, clkctl)); goto fail; } -#ifdef DHD_DEBUG - if (DHD_INFO_ON()) { - uint fn, numfn; - u8 *cis[SDIOD_MAX_IOFUNCS]; - int err = 0; - - numfn = bcmsdh_query_iofnum(sdh); - ASSERT(numfn <= SDIOD_MAX_IOFUNCS); - /* Make sure ALP is available before trying to read CIS */ - SPINWAIT(((clkctl = bcmsdh_cfg_read(sdh, SDIO_FUNC_1, - SBSDIO_FUNC1_CHIPCLKCSR, - NULL)), - !SBSDIO_ALPAV(clkctl)), PMU_MAX_TRANSITION_DLY); - - /* Now request ALP be put on the bus */ - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, - DHD_INIT_CLKCTL2, &err); - udelay(65); - - for (fn = 0; fn <= numfn; fn++) { - cis[fn] = kzalloc(SBSDIO_CIS_SIZE_LIMIT, GFP_ATOMIC); - if (!cis[fn]) { - DHD_INFO(("dhdsdio_probe: fn %d cis malloc " - "failed\n", fn)); - break; - } - - err = bcmsdh_cis_read(sdh, fn, cis[fn], - SBSDIO_CIS_SIZE_LIMIT); - if (err) { - DHD_INFO(("dhdsdio_probe: fn %d cis read " - "err %d\n", fn, err)); - kfree(cis[fn]); - break; - } - dhd_dump_cis(fn, cis[fn]); - } - - while (fn-- > 0) { - ASSERT(cis[fn]); - kfree(cis[fn]); - } - - if (err) { - DHD_ERROR(("dhdsdio_probe: error read/parsing CIS\n")); - goto fail; - } - } -#endif /* DHD_DEBUG */ - - if (dhdsdio_chip_attach(bus, regsva)) { - DHD_ERROR(("%s: dhdsdio_chip_attach failed!\n", __func__)); + if (brcmf_sdbrcm_chip_attach(bus, regsva)) { + BRCMF_ERROR(("%s: brcmf_sdbrcm_chip_attach failed!\n", + __func__)); goto fail; } - bcmsdh_chipinfo(sdh, bus->ci->chip, bus->ci->chiprev); - - if (!dhdsdio_chipmatch((u16) bus->ci->chip)) { - DHD_ERROR(("%s: unsupported chip: 0x%04x\n", - __func__, bus->ci->chip)); + if (!brcmf_sdbrcm_chipmatch((u16) bus->ci->chip)) { + BRCMF_ERROR(("%s: unsupported chip: 0x%04x\n", + __func__, bus->ci->chip)); goto fail; } - dhdsdio_sdiod_drive_strength_init(bus, dhd_sdiod_drive_strength); + brcmf_sdbrcm_sdiod_drive_strength_init(bus, brcmf_sdiod_drive_strength); /* Get info on the ARM and SOCRAM cores... */ - if (!DHD_NOPMU(bus)) { - bus->armrev = SBCOREREV(bcmsdh_reg_read(bus->sdh, - CORE_SB(bus->ci->armcorebase, sbidhigh), 4)); + if (!BRCMF_NOPMU(bus)) { + brcmf_sdcard_reg_read(bus->card, + CORE_SB(bus->ci->armcorebase, sbidhigh), 4); bus->orig_ramsize = bus->ci->ramsize; if (!(bus->orig_ramsize)) { - DHD_ERROR(("%s: failed to find SOCRAM memory!\n", - __func__)); + BRCMF_ERROR(("%s: failed to find SOCRAM memory!\n", + __func__)); goto fail; } bus->ramsize = bus->orig_ramsize; - if (dhd_dongle_memsize) - dhd_dongle_setmemsize(bus, dhd_dongle_memsize); + if (brcmf_dongle_memsize) + brcmf_sdbrcm_setmemsize(bus, brcmf_dongle_memsize); - DHD_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n", - bus->ramsize, bus->orig_ramsize)); + BRCMF_ERROR(("DHD: dongle ram size is set to %d(orig %d)\n", + bus->ramsize, bus->orig_ramsize)); } - bus->regs = (void *)bus->ci->buscorebase; - /* Set core control so an SDIO reset does a backplane reset */ - OR_REG(&bus->regs->corecontrol, CC_BPRESEN); + OR_REG(bus->ci->buscorebase + offsetof(struct sdpcmd_regs, + corecontrol), + CC_BPRESEN, u32); - bcm_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN); + brcmu_pktq_init(&bus->txq, (PRIOMASK + 1), TXQLEN); /* Locate an appropriately-aligned portion of hdrbuf */ - bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0], DHD_SDALIGN); + bus->rxhdr = (u8 *) roundup((unsigned long)&bus->hdrbuf[0], + BRCMF_SDALIGN); /* Set the poll and/or interrupt flags */ - bus->intr = (bool) dhd_intr; - bus->poll = (bool) dhd_poll; + bus->intr = (bool) brcmf_intr; + bus->poll = (bool) brcmf_poll; if (bus->poll) bus->pollrate = 1; @@ -5301,18 +5689,18 @@ fail: return false; } -static bool dhdsdio_probe_malloc(dhd_bus_t *bus, void *sdh) +static bool brcmf_sdbrcm_probe_malloc(struct brcmf_bus *bus, void *card) { - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (bus->dhd->maxctl) { + if (bus->drvr->maxctl) { bus->rxblen = - roundup((bus->dhd->maxctl + SDPCM_HDRLEN), - ALIGNMENT) + DHD_SDALIGN; + roundup((bus->drvr->maxctl + SDPCM_HDRLEN), + ALIGNMENT) + BRCMF_SDALIGN; bus->rxbuf = kmalloc(bus->rxblen, GFP_ATOMIC); if (!(bus->rxbuf)) { - DHD_ERROR(("%s: kmalloc of %d-byte rxbuf failed\n", - __func__, bus->rxblen)); + BRCMF_ERROR(("%s: kmalloc of %d-byte rxbuf failed\n", + __func__, bus->rxblen)); goto fail; } } @@ -5320,8 +5708,8 @@ static bool dhdsdio_probe_malloc(dhd_bus_t *bus, void *sdh) /* Allocate buffer to receive glomed packet */ bus->databuf = kmalloc(MAX_DATA_BUF, GFP_ATOMIC); if (!(bus->databuf)) { - DHD_ERROR(("%s: kmalloc of %d-byte databuf failed\n", - __func__, MAX_DATA_BUF)); + BRCMF_ERROR(("%s: kmalloc of %d-byte databuf failed\n", + __func__, MAX_DATA_BUF)); /* release rxbuf which was already located as above */ if (!bus->rxblen) kfree(bus->rxbuf); @@ -5329,10 +5717,9 @@ static bool dhdsdio_probe_malloc(dhd_bus_t *bus, void *sdh) } /* Align the buffer */ - if ((unsigned long)bus->databuf % DHD_SDALIGN) - bus->dataptr = - bus->databuf + (DHD_SDALIGN - - ((unsigned long)bus->databuf % DHD_SDALIGN)); + if ((unsigned long)bus->databuf % BRCMF_SDALIGN) + bus->dataptr = bus->databuf + (BRCMF_SDALIGN - + ((unsigned long)bus->databuf % BRCMF_SDALIGN)); else bus->dataptr = bus->databuf; @@ -5342,181 +5729,145 @@ fail: return false; } -static bool dhdsdio_probe_init(dhd_bus_t *bus, void *sdh) +static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus, void *card) { s32 fnum; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); #ifdef SDTEST - dhdsdio_pktgen_init(bus); + brcmf_sdbrcm_pktgen_init(bus); #endif /* SDTEST */ /* Disable F2 to clear any intermediate frame state on the dongle */ - bcmsdh_cfg_write(sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, SDIO_FUNC_ENABLE_1, - NULL); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_0, SDIO_CCCR_IOEx, + SDIO_FUNC_ENABLE_1, NULL); - bus->dhd->busstate = DHD_BUS_DOWN; + bus->drvr->busstate = BRCMF_BUS_DOWN; bus->sleeping = false; bus->rxflow = false; - bus->prev_rxlim_hit = 0; /* Done with backplane-dependent accesses, can drop clock... */ - bcmsdh_cfg_write(sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0, NULL); + brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0, + NULL); /* ...and initialize clock/power states */ bus->clkstate = CLK_SDONLY; - bus->idletime = (s32) dhd_idletime; - bus->idleclock = DHD_IDLE_ACTIVE; - - /* Query the SD clock speed */ - if (bcmsdh_iovar_op(sdh, "sd_divisor", NULL, 0, - &bus->sd_divisor, sizeof(s32), - false) != 0) { - DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_divisor")); - bus->sd_divisor = -1; - } else { - DHD_INFO(("%s: Initial value for %s is %d\n", - __func__, "sd_divisor", bus->sd_divisor)); - } - - /* Query the SD bus mode */ - if (bcmsdh_iovar_op(sdh, "sd_mode", NULL, 0, - &bus->sd_mode, sizeof(s32), false) != 0) { - DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_mode")); - bus->sd_mode = -1; - } else { - DHD_INFO(("%s: Initial value for %s is %d\n", - __func__, "sd_mode", bus->sd_mode)); - } + bus->idletime = (s32) brcmf_idletime; + bus->idleclock = BRCMF_IDLE_ACTIVE; /* Query the F2 block size, set roundup accordingly */ fnum = 2; - if (bcmsdh_iovar_op(sdh, "sd_blocksize", &fnum, sizeof(s32), + if (brcmf_sdcard_iovar_op(card, "sd_blocksize", &fnum, sizeof(s32), &bus->blocksize, sizeof(s32), false) != 0) { bus->blocksize = 0; - DHD_ERROR(("%s: fail on %s get\n", __func__, "sd_blocksize")); + BRCMF_ERROR(("%s: fail on %s get\n", __func__, "sd_blocksize")); } else { - DHD_INFO(("%s: Initial value for %s is %d\n", - __func__, "sd_blocksize", bus->blocksize)); + BRCMF_INFO(("%s: Initial value for %s is %d\n", + __func__, "sd_blocksize", bus->blocksize)); } bus->roundup = min(max_roundup, bus->blocksize); /* Query if bus module supports packet chaining, default to use if supported */ - if (bcmsdh_iovar_op(sdh, "sd_rxchain", NULL, 0, + if (brcmf_sdcard_iovar_op(card, "sd_rxchain", NULL, 0, &bus->sd_rxchain, sizeof(s32), false) != 0) { bus->sd_rxchain = false; } else { - DHD_INFO(("%s: bus module (through bcmsdh API) %s chaining\n", - __func__, - (bus->sd_rxchain ? "supports" : "does not support"))); + BRCMF_INFO(("%s: bus module (through sdiocard API) %s" + " chaining\n", __func__, bus->sd_rxchain + ? "supports" : "does not support")); } bus->use_rxchain = (bool) bus->sd_rxchain; return true; } -bool -dhd_bus_download_firmware(struct dhd_bus *bus, char *fw_path, char *nv_path) -{ - bool ret; - bus->fw_path = fw_path; - bus->nv_path = nv_path; - - ret = dhdsdio_download_firmware(bus, bus->sdh); - - return ret; -} - static bool -dhdsdio_download_firmware(struct dhd_bus *bus, void *sdh) +brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus, void *card) { bool ret; /* Download the firmware */ - dhdsdio_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); - ret = _dhdsdio_download_firmware(bus) == 0; + ret = _brcmf_sdbrcm_download_firmware(bus) == 0; - dhdsdio_clkctl(bus, CLK_SDONLY, false); + brcmf_sdbrcm_clkctl(bus, CLK_SDONLY, false); return ret; } /* Detach and free everything */ -static void dhdsdio_release(dhd_bus_t *bus) +static void brcmf_sdbrcm_release(struct brcmf_bus *bus) { - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); if (bus) { /* De-register interrupt handler */ - bcmsdh_intr_disable(bus->sdh); - bcmsdh_intr_dereg(bus->sdh); + brcmf_sdcard_intr_disable(bus->card); + brcmf_sdcard_intr_dereg(bus->card); - if (bus->dhd) { - dhd_detach(bus->dhd); - dhdsdio_release_dongle(bus); - bus->dhd = NULL; + if (bus->drvr) { + brcmf_detach(bus->drvr); + brcmf_sdbrcm_release_dongle(bus); + bus->drvr = NULL; } - dhdsdio_release_malloc(bus); + brcmf_sdbrcm_release_malloc(bus); kfree(bus); } - DHD_TRACE(("%s: Disconnected\n", __func__)); + BRCMF_TRACE(("%s: Disconnected\n", __func__)); } -static void dhdsdio_release_malloc(dhd_bus_t *bus) +static void brcmf_sdbrcm_release_malloc(struct brcmf_bus *bus) { - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (bus->dhd && bus->dhd->dongle_reset) + if (bus->drvr && bus->drvr->dongle_reset) return; - if (bus->rxbuf) { - kfree(bus->rxbuf); - bus->rxctl = bus->rxbuf = NULL; - bus->rxlen = 0; - } + kfree(bus->rxbuf); + bus->rxctl = bus->rxbuf = NULL; + bus->rxlen = 0; kfree(bus->databuf); bus->databuf = NULL; } -static void dhdsdio_release_dongle(dhd_bus_t *bus) +static void brcmf_sdbrcm_release_dongle(struct brcmf_bus *bus) { - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (bus->dhd && bus->dhd->dongle_reset) + if (bus->drvr && bus->drvr->dongle_reset) return; if (bus->ci) { - dhdsdio_clkctl(bus, CLK_AVAIL, false); - dhdsdio_clkctl(bus, CLK_NONE, false); - dhdsdio_chip_detach(bus); + brcmf_sdbrcm_clkctl(bus, CLK_AVAIL, false); + brcmf_sdbrcm_clkctl(bus, CLK_NONE, false); + brcmf_sdbrcm_chip_detach(bus); if (bus->vars && bus->varsz) kfree(bus->vars); bus->vars = NULL; } - DHD_TRACE(("%s: Disconnected\n", __func__)); + BRCMF_TRACE(("%s: Disconnected\n", __func__)); } -static void dhdsdio_disconnect(void *ptr) +static void brcmf_sdbrcm_disconnect(void *ptr) { - dhd_bus_t *bus = (dhd_bus_t *)ptr; + struct brcmf_bus *bus = (struct brcmf_bus *)ptr; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); if (bus) { - ASSERT(bus->dhd); - dhdsdio_release(bus); + brcmf_sdbrcm_release(bus); } - DHD_TRACE(("%s: Disconnected\n", __func__)); + BRCMF_TRACE(("%s: Disconnected\n", __func__)); } /* Register/Unregister functions are called by the main DHD entry @@ -5524,147 +5875,78 @@ static void dhdsdio_disconnect(void *ptr) * order to look for or await the device. */ -static bcmsdh_driver_t dhd_sdio = { - dhdsdio_probe, - dhdsdio_disconnect +static struct brcmf_sdioh_driver brcmf_sdio = { + brcmf_sdbrcm_probe, + brcmf_sdbrcm_disconnect }; -int dhd_bus_register(void) +int brcmf_bus_register(void) { - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); - return bcmsdh_register(&dhd_sdio); -} + /* Sanity check on the module parameters */ + do { + /* Both watchdog and DPC as tasklets are ok */ + if ((brcmf_watchdog_prio < 0) && (brcmf_dpc_prio < 0)) + break; -void dhd_bus_unregister(void) -{ - DHD_TRACE(("%s: Enter\n", __func__)); + /* If both watchdog and DPC are threads, TX must be deferred */ + if ((brcmf_watchdog_prio >= 0) && (brcmf_dpc_prio >= 0) + && brcmf_deferred_tx) + break; + + BRCMF_ERROR(("Invalid module parameters.\n")); + return -EINVAL; + } while (0); - bcmsdh_unregister(); + return brcmf_sdio_register(&brcmf_sdio); } -#ifdef BCMEMBEDIMAGE -static int dhdsdio_download_code_array(struct dhd_bus *bus) +void brcmf_bus_unregister(void) { - int bcmerror = -1; - int offset = 0; - - DHD_INFO(("%s: download embedded firmware...\n", __func__)); - - /* Download image */ - while ((offset + MEMBLOCK) < sizeof(dlarray)) { - bcmerror = - dhdsdio_membytes(bus, true, offset, dlarray + offset, - MEMBLOCK); - if (bcmerror) { - DHD_ERROR(("%s: error %d on writing %d membytes at " - "0x%08x\n", - __func__, bcmerror, MEMBLOCK, offset)); - goto err; - } - - offset += MEMBLOCK; - } + BRCMF_TRACE(("%s: Enter\n", __func__)); - if (offset < sizeof(dlarray)) { - bcmerror = dhdsdio_membytes(bus, true, offset, - dlarray + offset, - sizeof(dlarray) - offset); - if (bcmerror) { - DHD_ERROR(("%s: error %d on writing %d membytes at " - "0x%08x\n", __func__, bcmerror, - sizeof(dlarray) - offset, offset)); - goto err; - } - } -#ifdef DHD_DEBUG - /* Upload and compare the downloaded code */ - { - unsigned char *ularray; - - ularray = kmalloc(bus->ramsize, GFP_ATOMIC); - if (!ularray) { - bcmerror = -ENOMEM; - goto err; - } - /* Upload image to verify downloaded contents. */ - offset = 0; - memset(ularray, 0xaa, bus->ramsize); - while ((offset + MEMBLOCK) < sizeof(dlarray)) { - bcmerror = - dhdsdio_membytes(bus, false, offset, - ularray + offset, MEMBLOCK); - if (bcmerror) { - DHD_ERROR(("%s: error %d on reading %d membytes" - " at 0x%08x\n", - __func__, bcmerror, MEMBLOCK, offset)); - goto free; - } - - offset += MEMBLOCK; - } - - if (offset < sizeof(dlarray)) { - bcmerror = dhdsdio_membytes(bus, false, offset, - ularray + offset, - sizeof(dlarray) - offset); - if (bcmerror) { - DHD_ERROR(("%s: error %d on reading %d membytes at 0x%08x\n", - __func__, bcmerror, - sizeof(dlarray) - offset, offset)); - goto free; - } - } - - if (memcmp(dlarray, ularray, sizeof(dlarray))) { - DHD_ERROR(("%s: Downloaded image is corrupted.\n", - __func__)); - ASSERT(0); - goto free; - } else - DHD_ERROR(("%s: Download/Upload/Compare succeeded.\n", - __func__)); -free: - kfree(ularray); - } -#endif /* DHD_DEBUG */ - -err: - return bcmerror; + brcmf_sdio_unregister(); } -#endif /* BCMEMBEDIMAGE */ -static int dhdsdio_download_code_file(struct dhd_bus *bus, char *fw_path) +static int brcmf_sdbrcm_download_code_file(struct brcmf_bus *bus) { - int bcmerror = -1; int offset = 0; uint len; - void *image = NULL; u8 *memblock = NULL, *memptr; + int ret; - DHD_INFO(("%s: download firmware %s\n", __func__, fw_path)); + BRCMF_INFO(("%s: Enter\n", __func__)); - image = dhd_os_open_image(fw_path); - if (image == NULL) - goto err; + bus->fw_name = BCM4329_FW_NAME; + ret = request_firmware(&bus->firmware, bus->fw_name, + &gInstance->func[2]->dev); + if (ret) { + BRCMF_ERROR(("%s: Fail to request firmware %d\n", + __func__, ret)); + return ret; + } + bus->fw_ptr = 0; - memptr = memblock = kmalloc(MEMBLOCK + DHD_SDALIGN, GFP_ATOMIC); + memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC); if (memblock == NULL) { - DHD_ERROR(("%s: Failed to allocate memory %d bytes\n", - __func__, MEMBLOCK)); + BRCMF_ERROR(("%s: Failed to allocate memory %d bytes\n", + __func__, MEMBLOCK)); + ret = -ENOMEM; goto err; } - if ((u32)(unsigned long)memblock % DHD_SDALIGN) - memptr += - (DHD_SDALIGN - ((u32)(unsigned long)memblock % DHD_SDALIGN)); + if ((u32)(unsigned long)memblock % BRCMF_SDALIGN) + memptr += (BRCMF_SDALIGN - + ((u32)(unsigned long)memblock % BRCMF_SDALIGN)); /* Download image */ while ((len = - dhd_os_get_image_block((char *)memptr, MEMBLOCK, image))) { - bcmerror = dhdsdio_membytes(bus, true, offset, memptr, len); - if (bcmerror) { - DHD_ERROR(("%s: error %d on writing %d membytes at " - "0x%08x\n", __func__, bcmerror, MEMBLOCK, offset)); + brcmf_sdbrcm_get_image((char *)memptr, MEMBLOCK, bus))) { + ret = brcmf_sdbrcm_membytes(bus, true, offset, memptr, len); + if (ret) { + BRCMF_ERROR(("%s: error %d on writing %d membytes at " + "0x%08x\n", __func__, ret, MEMBLOCK, + offset)); goto err; } @@ -5674,10 +5956,10 @@ static int dhdsdio_download_code_file(struct dhd_bus *bus, char *fw_path) err: kfree(memblock); - if (image) - dhd_os_close_image(image); + release_firmware(bus->firmware); + bus->fw_ptr = 0; - return bcmerror; + return ret; } /* @@ -5689,7 +5971,7 @@ err: * by two NULs. */ -static uint process_nvram_vars(char *varbuf, uint len) +static uint brcmf_process_nvram_vars(char *varbuf, uint len) { char *dp; bool findNewline; @@ -5731,162 +6013,86 @@ static uint process_nvram_vars(char *varbuf, uint len) return buf_len; } -/* - EXAMPLE: nvram_array - nvram_arry format: - name=value - Use carriage return at the end of each assignment, - and an empty string with - carriage return at the end of array. - - For example: - unsigned char nvram_array[] = {"name1=value1\n", - "name2=value2\n", "\n"}; - Hex values start with 0x, and mac addr format: xx:xx:xx:xx:xx:xx. - - Search "EXAMPLE: nvram_array" to see how the array is activated. -*/ - -void dhd_bus_set_nvram_params(struct dhd_bus *bus, const char *nvram_params) -{ - bus->nvram_params = nvram_params; -} - -static int dhdsdio_download_nvram(struct dhd_bus *bus) +static int brcmf_sdbrcm_download_nvram(struct brcmf_bus *bus) { - int bcmerror = -1; uint len; - void *image = NULL; char *memblock = NULL; char *bufp; - char *nv_path; - bool nvram_file_exists; - - nv_path = bus->nv_path; - - nvram_file_exists = ((nv_path != NULL) && (nv_path[0] != '\0')); - if (!nvram_file_exists && (bus->nvram_params == NULL)) - return 0; + int ret; - if (nvram_file_exists) { - image = dhd_os_open_image(nv_path); - if (image == NULL) - goto err; + bus->nv_name = BCM4329_NV_NAME; + ret = request_firmware(&bus->firmware, bus->nv_name, + &gInstance->func[2]->dev); + if (ret) { + BRCMF_ERROR(("%s: Fail to request nvram %d\n", __func__, ret)); + return ret; } + bus->fw_ptr = 0; memblock = kmalloc(MEMBLOCK, GFP_ATOMIC); if (memblock == NULL) { - DHD_ERROR(("%s: Failed to allocate memory %d bytes\n", - __func__, MEMBLOCK)); + BRCMF_ERROR(("%s: Failed to allocate memory %d bytes\n", + __func__, MEMBLOCK)); + ret = -ENOMEM; goto err; } - /* Download variables */ - if (nvram_file_exists) { - len = dhd_os_get_image_block(memblock, MEMBLOCK, image); - } else { - len = strlen(bus->nvram_params); - ASSERT(len <= MEMBLOCK); - if (len > MEMBLOCK) - len = MEMBLOCK; - memcpy(memblock, bus->nvram_params, len); - } + len = brcmf_sdbrcm_get_image(memblock, MEMBLOCK, bus); if (len > 0 && len < MEMBLOCK) { bufp = (char *)memblock; bufp[len] = 0; - len = process_nvram_vars(bufp, len); + len = brcmf_process_nvram_vars(bufp, len); bufp += len; *bufp++ = 0; if (len) - bcmerror = dhdsdio_downloadvars(bus, memblock, len + 1); - if (bcmerror) { - DHD_ERROR(("%s: error downloading vars: %d\n", - __func__, bcmerror)); - } + ret = brcmf_sdbrcm_downloadvars(bus, memblock, len + 1); + if (ret) + BRCMF_ERROR(("%s: error downloading vars: %d\n", + __func__, ret)); } else { - DHD_ERROR(("%s: error reading nvram file: %d\n", - __func__, len)); - bcmerror = -EIO; + BRCMF_ERROR(("%s: error reading nvram file: %d\n", + __func__, len)); + ret = -EIO; } err: kfree(memblock); - if (image) - dhd_os_close_image(image); + release_firmware(bus->firmware); + bus->fw_ptr = 0; - return bcmerror; + return ret; } -static int _dhdsdio_download_firmware(struct dhd_bus *bus) +static int _brcmf_sdbrcm_download_firmware(struct brcmf_bus *bus) { int bcmerror = -1; - bool embed = false; /* download embedded firmware */ - bool dlok = false; /* download firmware succeeded */ - - /* Out immediately if no image to download */ - if ((bus->fw_path == NULL) || (bus->fw_path[0] == '\0')) { -#ifdef BCMEMBEDIMAGE - embed = true; -#else - return bcmerror; -#endif - } - /* Keep arm in reset */ - if (dhdsdio_download_state(bus, true)) { - DHD_ERROR(("%s: error placing ARM core in reset\n", __func__)); + if (brcmf_sdbrcm_download_state(bus, true)) { + BRCMF_ERROR(("%s: error placing ARM core in reset\n", + __func__)); goto err; } /* External image takes precedence if specified */ - if ((bus->fw_path != NULL) && (bus->fw_path[0] != '\0')) { - if (dhdsdio_download_code_file(bus, bus->fw_path)) { - DHD_ERROR(("%s: dongle image file download failed\n", - __func__)); -#ifdef BCMEMBEDIMAGE - embed = true; -#else - goto err; -#endif - } else { - embed = false; - dlok = true; - } - } -#ifdef BCMEMBEDIMAGE - if (embed) { - if (dhdsdio_download_code_array(bus)) { - DHD_ERROR(("%s: dongle image array download failed\n", - __func__)); - goto err; - } else { - dlok = true; - } - } -#endif - if (!dlok) { - DHD_ERROR(("%s: dongle image download failed\n", __func__)); + if (brcmf_sdbrcm_download_code_file(bus)) { + BRCMF_ERROR(("%s: dongle image file download failed\n", + __func__)); goto err; } - /* EXAMPLE: nvram_array */ - /* If a valid nvram_arry is specified as above, it can be passed - down to dongle */ - /* dhd_bus_set_nvram_params(bus, (char *)&nvram_array); */ - /* External nvram takes precedence if specified */ - if (dhdsdio_download_nvram(bus)) { - DHD_ERROR(("%s: dongle nvram file download failed\n", - __func__)); + if (brcmf_sdbrcm_download_nvram(bus)) { + BRCMF_ERROR(("%s: dongle nvram file download failed\n", + __func__)); } /* Take arm out of reset */ - if (dhdsdio_download_state(bus, false)) { - DHD_ERROR(("%s: error getting out of ARM core reset\n", - __func__)); + if (brcmf_sdbrcm_download_state(bus, false)) { + BRCMF_ERROR(("%s: error getting out of ARM core reset\n", + __func__)); goto err; } @@ -5898,110 +6104,83 @@ err: static int -dhd_bcmsdh_send_buf(dhd_bus_t *bus, u32 addr, uint fn, uint flags, +brcmf_sdbrcm_send_buf(struct brcmf_bus *bus, u32 addr, uint fn, uint flags, u8 *buf, uint nbytes, struct sk_buff *pkt, - bcmsdh_cmplt_fn_t complete, void *handle) + void (*complete)(void *handle, int status, + bool sync_waiting), + void *handle) { - return bcmsdh_send_buf - (bus->sdh, addr, fn, flags, buf, nbytes, pkt, complete, + return brcmf_sdcard_send_buf + (bus->card, addr, fn, flags, buf, nbytes, pkt, complete, handle); } -uint dhd_bus_chip(struct dhd_bus *bus) -{ - ASSERT(bus->ci != NULL); - return bus->ci->chip; -} - -void *dhd_bus_pub(struct dhd_bus *bus) -{ - return bus->dhd; -} - -void *dhd_bus_txq(struct dhd_bus *bus) -{ - return &bus->txq; -} - -uint dhd_bus_hdrlen(struct dhd_bus *bus) -{ - return SDPCM_HDRLEN; -} - -int dhd_bus_devreset(dhd_pub_t *dhdp, u8 flag) +int brcmf_bus_devreset(struct brcmf_pub *drvr, u8 flag) { int bcmerror = 0; - dhd_bus_t *bus; + struct brcmf_bus *bus; - bus = dhdp->bus; + bus = drvr->bus; if (flag == true) { - if (!bus->dhd->dongle_reset) { + brcmf_sdbrcm_wd_timer(bus, 0); + if (!bus->drvr->dongle_reset) { /* Expect app to have torn down any connection before calling */ /* Stop the bus, disable F2 */ - dhd_bus_stop(bus, false); + brcmf_sdbrcm_bus_stop(bus, false); /* Clean tx/rx buffer pointers, detach from the dongle */ - dhdsdio_release_dongle(bus); + brcmf_sdbrcm_release_dongle(bus); - bus->dhd->dongle_reset = true; - bus->dhd->up = false; + bus->drvr->dongle_reset = true; + bus->drvr->up = false; - DHD_TRACE(("%s: WLAN OFF DONE\n", __func__)); + BRCMF_TRACE(("%s: WLAN OFF DONE\n", __func__)); /* App can now remove power from device */ } else bcmerror = -EIO; } else { /* App must have restored power to device before calling */ - DHD_TRACE(("\n\n%s: == WLAN ON ==\n", __func__)); + BRCMF_TRACE(("\n\n%s: == WLAN ON ==\n", __func__)); - if (bus->dhd->dongle_reset) { + if (bus->drvr->dongle_reset) { /* Turn on WLAN */ - /* Reset SD client */ - bcmsdh_reset(bus->sdh); /* Attempt to re-attach & download */ - if (dhdsdio_probe_attach(bus, bus->sdh, - (u32 *) SI_ENUM_BASE, - bus->cl_devid)) { + if (brcmf_sdbrcm_probe_attach(bus, bus->card, + SI_ENUM_BASE, + bus->cl_devid)) { /* Attempt to download binary to the dongle */ - if (dhdsdio_probe_init - (bus, bus->sdh) - && dhdsdio_download_firmware(bus, - bus->sdh)) { - + if (brcmf_sdbrcm_probe_init(bus, bus->card)) { /* Re-init bus, enable F2 transfer */ - dhd_bus_init((dhd_pub_t *) bus->dhd, - false); - -#if defined(OOB_INTR_ONLY) - dhd_enable_oob_intr(bus, true); -#endif /* defined(OOB_INTR_ONLY) */ + brcmf_sdbrcm_bus_init(bus->drvr, false); - bus->dhd->dongle_reset = false; - bus->dhd->up = true; + bus->drvr->dongle_reset = false; + bus->drvr->up = true; - DHD_TRACE(("%s: WLAN ON DONE\n", - __func__)); + BRCMF_TRACE(("%s: WLAN ON DONE\n", + __func__)); } else bcmerror = -EIO; } else bcmerror = -EIO; } else { bcmerror = -EISCONN; - DHD_ERROR(("%s: Set DEVRESET=false invoked when device " - "is on\n", __func__)); + BRCMF_ERROR(("%s: Set DEVRESET=false invoked when" + " device is on\n", __func__)); bcmerror = -EIO; } + brcmf_sdbrcm_wd_timer(bus, brcmf_watchdog_ms); } return bcmerror; } static int -dhdsdio_chip_recognition(bcmsdh_info_t *sdh, struct chip_info *ci, void *regs) +brcmf_sdbrcm_chip_recognition(struct brcmf_sdio_card *card, + struct chip_info *ci, u32 regs) { u32 regdata; @@ -6011,13 +6190,14 @@ dhdsdio_chip_recognition(bcmsdh_info_t *sdh, struct chip_info *ci, void *regs) * For different chiptypes or old sdio hosts w/o chipcommon, * other ways of recognition should be added here. */ - ci->cccorebase = (u32)regs; - regdata = bcmsdh_reg_read(sdh, CORE_CC_REG(ci->cccorebase, chipid), 4); + ci->cccorebase = regs; + regdata = brcmf_sdcard_reg_read(card, + CORE_CC_REG(ci->cccorebase, chipid), 4); ci->chip = regdata & CID_ID_MASK; ci->chiprev = (regdata & CID_REV_MASK) >> CID_REV_SHIFT; - DHD_INFO(("%s: chipid=0x%x chiprev=%d\n", - __func__, ci->chip, ci->chiprev)); + BRCMF_INFO(("%s: chipid=0x%x chiprev=%d\n", + __func__, ci->chip, ci->chiprev)); /* Address of cores for new chips should be added here */ switch (ci->chip) { @@ -6028,126 +6208,127 @@ dhdsdio_chip_recognition(bcmsdh_info_t *sdh, struct chip_info *ci, void *regs) ci->ramsize = BCM4329_RAMSIZE; break; default: - DHD_ERROR(("%s: chipid 0x%x is not supported\n", - __func__, ci->chip)); + BRCMF_ERROR(("%s: chipid 0x%x is not supported\n", + __func__, ci->chip)); return -ENODEV; } - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(ci->cccorebase, sbidhigh), 4); ci->ccrev = SBCOREREV(regdata); - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_CC_REG(ci->cccorebase, pmucapabilities), 4); ci->pmurev = regdata & PCAP_REV_MASK; - regdata = bcmsdh_reg_read(sdh, CORE_SB(ci->buscorebase, sbidhigh), 4); + regdata = brcmf_sdcard_reg_read(card, + CORE_SB(ci->buscorebase, sbidhigh), 4); ci->buscorerev = SBCOREREV(regdata); ci->buscoretype = (regdata & SBIDH_CC_MASK) >> SBIDH_CC_SHIFT; - DHD_INFO(("%s: ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n", - __func__, ci->ccrev, ci->pmurev, - ci->buscorerev, ci->buscoretype)); + BRCMF_INFO(("%s: ccrev=%d, pmurev=%d, buscore rev/type=%d/0x%x\n", + __func__, ci->ccrev, ci->pmurev, + ci->buscorerev, ci->buscoretype)); /* get chipcommon capabilites */ - ci->cccaps = bcmsdh_reg_read(sdh, + ci->cccaps = brcmf_sdcard_reg_read(card, CORE_CC_REG(ci->cccorebase, capabilities), 4); return 0; } static void -dhdsdio_chip_disablecore(bcmsdh_info_t *sdh, u32 corebase) +brcmf_sdbrcm_chip_disablecore(struct brcmf_sdio_card *card, u32 corebase) { u32 regdata; - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatelow), 4); if (regdata & SBTML_RESET) return; - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatelow), 4); if ((regdata & (SICF_CLOCK_EN << SBTML_SICF_SHIFT)) != 0) { /* * set target reject and spin until busy is clear * (preserve core-specific bits) */ - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatelow), 4); - bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4, regdata | SBTML_REJ); - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatelow), 4); udelay(1); - SPINWAIT((bcmsdh_reg_read(sdh, + SPINWAIT((brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatehigh), 4) & SBTMH_BUSY), 100000); - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatehigh), 4); if (regdata & SBTMH_BUSY) - DHD_ERROR(("%s: ARM core still busy\n", __func__)); + BRCMF_ERROR(("%s: ARM core still busy\n", __func__)); - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbidlow), 4); if (regdata & SBIDL_INIT) { - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbimstate), 4) | SBIM_RJ; - bcmsdh_reg_write(sdh, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbimstate), 4, regdata); - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbimstate), 4); udelay(1); - SPINWAIT((bcmsdh_reg_read(sdh, + SPINWAIT((brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbimstate), 4) & SBIM_BY), 100000); } /* set reset and reject while enabling the clocks */ - bcmsdh_reg_write(sdh, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4, (((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) | SBTML_REJ | SBTML_RESET)); - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatelow), 4); udelay(10); /* clear the initiator reject bit */ - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbidlow), 4); if (regdata & SBIDL_INIT) { - regdata = bcmsdh_reg_read(sdh, + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbimstate), 4) & ~SBIM_RJ; - bcmsdh_reg_write(sdh, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbimstate), 4, regdata); } } /* leave reset and reject asserted */ - bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4, (SBTML_REJ | SBTML_RESET)); udelay(1); } static int -dhdsdio_chip_attach(struct dhd_bus *bus, void *regs) +brcmf_sdbrcm_chip_attach(struct brcmf_bus *bus, u32 regs) { struct chip_info *ci; int err; u8 clkval, clkset; - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); /* alloc chip_info_t */ ci = kmalloc(sizeof(struct chip_info), GFP_ATOMIC); if (NULL == ci) { - DHD_ERROR(("%s: malloc failed!\n", __func__)); + BRCMF_ERROR(("%s: malloc failed!\n", __func__)); return -ENOMEM; } @@ -6156,48 +6337,48 @@ dhdsdio_chip_attach(struct dhd_bus *bus, void *regs) /* bus/core/clk setup for register access */ /* Try forcing SDIO core to do ALPAvail request only */ clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_ALP_AVAIL_REQ; - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err); if (err) { - DHD_ERROR(("%s: error writing for HT off\n", __func__)); + BRCMF_ERROR(("%s: error writing for HT off\n", __func__)); goto fail; } /* If register supported, wait for ALPAvail and then force ALP */ /* This may take up to 15 milliseconds */ - clkval = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, + clkval = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, NULL); if ((clkval & ~SBSDIO_AVBITS) == clkset) { SPINWAIT(((clkval = - bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, + brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, NULL)), !SBSDIO_ALPAV(clkval)), PMU_MAX_TRANSITION_DLY); if (!SBSDIO_ALPAV(clkval)) { - DHD_ERROR(("%s: timeout on ALPAV wait, clkval 0x%02x\n", - __func__, clkval)); + BRCMF_ERROR(("%s: timeout on ALPAV wait," + " clkval 0x%02x\n", __func__, clkval)); err = -EBUSY; goto fail; } clkset = SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP; - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, clkset, &err); udelay(65); } else { - DHD_ERROR(("%s: ChipClkCSR access: wrote 0x%02x read 0x%02x\n", - __func__, clkset, clkval)); + BRCMF_ERROR(("%s: ChipClkCSR access: wrote 0x%02x" + " read 0x%02x\n", __func__, clkset, clkval)); err = -EACCES; goto fail; } /* Also, disable the extra SDIO pull-ups */ - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_SDIOPULLUP, 0, - NULL); + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_SDIOPULLUP, + 0, NULL); - err = dhdsdio_chip_recognition(bus->sdh, ci, regs); + err = brcmf_sdbrcm_chip_recognition(bus->card, ci, regs); if (err) goto fail; @@ -6205,24 +6386,24 @@ dhdsdio_chip_attach(struct dhd_bus *bus, void *regs) * Make sure any on-chip ARM is off (in case strapping is wrong), * or downloaded code was already running. */ - dhdsdio_chip_disablecore(bus->sdh, ci->armcorebase); + brcmf_sdbrcm_chip_disablecore(bus->card, ci->armcorebase); - bcmsdh_reg_write(bus->sdh, + brcmf_sdcard_reg_write(bus->card, CORE_CC_REG(ci->cccorebase, gpiopullup), 4, 0); - bcmsdh_reg_write(bus->sdh, + brcmf_sdcard_reg_write(bus->card, CORE_CC_REG(ci->cccorebase, gpiopulldown), 4, 0); /* Disable F2 to clear any intermediate frame state on the dongle */ - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_0, SDIOD_CCCR_IOEN, + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_0, SDIO_CCCR_IOEx, SDIO_FUNC_ENABLE_1, NULL); /* WAR: cmd52 backplane read so core HW will drop ALPReq */ - clkval = bcmsdh_cfg_read(bus->sdh, SDIO_FUNC_1, + clkval = brcmf_sdcard_cfg_read(bus->card, SDIO_FUNC_1, 0, NULL); /* Done with backplane-dependent accesses, can drop clock... */ - bcmsdh_cfg_write(bus->sdh, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0, - NULL); + brcmf_sdcard_cfg_write(bus->card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, + 0, NULL); bus->ci = ci; return 0; @@ -6233,7 +6414,7 @@ fail: } static void -dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase) +brcmf_sdbrcm_chip_resetcore(struct brcmf_sdio_card *card, u32 corebase) { u32 regdata; @@ -6241,35 +6422,37 @@ dhdsdio_chip_resetcore(bcmsdh_info_t *sdh, u32 corebase) * Must do the disable sequence first to work for * arbitrary current core state. */ - dhdsdio_chip_disablecore(sdh, corebase); + brcmf_sdbrcm_chip_disablecore(card, corebase); /* * Now do the initialization sequence. * set reset while enabling the clock and * forcing them on throughout the core */ - bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4, ((SICF_FGC | SICF_CLOCK_EN) << SBTML_SICF_SHIFT) | SBTML_RESET); udelay(1); - regdata = bcmsdh_reg_read(sdh, CORE_SB(corebase, sbtmstatehigh), 4); + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbtmstatehigh), + 4); if (regdata & SBTMH_SERR) - bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatehigh), 4, 0); + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatehigh), + 4, 0); - regdata = bcmsdh_reg_read(sdh, CORE_SB(corebase, sbimstate), 4); + regdata = brcmf_sdcard_reg_read(card, CORE_SB(corebase, sbimstate), 4); if (regdata & (SBIM_IBE | SBIM_TO)) - bcmsdh_reg_write(sdh, CORE_SB(corebase, sbimstate), 4, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbimstate), 4, regdata & ~(SBIM_IBE | SBIM_TO)); /* clear reset and allow it to propagate throughout the core */ - bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4, (SICF_FGC << SBTML_SICF_SHIFT) | (SICF_CLOCK_EN << SBTML_SICF_SHIFT)); udelay(1); /* leave clock enabled */ - bcmsdh_reg_write(sdh, CORE_SB(corebase, sbtmstatelow), 4, + brcmf_sdcard_reg_write(card, CORE_SB(corebase, sbtmstatelow), 4, (SICF_CLOCK_EN << SBTML_SICF_SHIFT)); udelay(1); } @@ -6317,7 +6500,7 @@ static const struct sdiod_drive_str sdiod_drive_strength_tab3[] = { #define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu)) static void -dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) { +brcmf_sdbrcm_sdiod_drive_strength_init(struct brcmf_bus *bus, u32 drivestrength) { struct sdiod_drive_str *str_tab = NULL; u32 str_mask = 0; u32 str_shift = 0; @@ -6344,10 +6527,10 @@ dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) { str_shift = 11; break; default: - DHD_ERROR(("No SDIO Drive strength init" - "done for chip %s rev %d pmurev %d\n", - bcm_chipname(bus->ci->chip, chn, 8), - bus->ci->chiprev, bus->ci->pmurev)); + BRCMF_ERROR(("No SDIO Drive strength init" + "done for chip %s rev %d pmurev %d\n", + brcmu_chipname(bus->ci->chip, chn, 8), + bus->ci->chiprev, bus->ci->pmurev)); break; } @@ -6363,28 +6546,227 @@ dhdsdio_sdiod_drive_strength_init(struct dhd_bus *bus, u32 drivestrength) { } } - bcmsdh_reg_write(bus->sdh, + brcmf_sdcard_reg_write(bus->card, CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4, 1); - cc_data_temp = bcmsdh_reg_read(bus->sdh, + cc_data_temp = brcmf_sdcard_reg_read(bus->card, CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4); cc_data_temp &= ~str_mask; drivestrength_sel <<= str_shift; cc_data_temp |= drivestrength_sel; - bcmsdh_reg_write(bus->sdh, + brcmf_sdcard_reg_write(bus->card, CORE_CC_REG(bus->ci->cccorebase, chipcontrol_addr), 4, cc_data_temp); - DHD_INFO(("SDIO: %dmA drive strength selected, set to 0x%08x\n", - drivestrength, cc_data_temp)); + BRCMF_INFO(("SDIO: %dmA drive strength selected, " + "set to 0x%08x\n", drivestrength, cc_data_temp)); } } static void -dhdsdio_chip_detach(struct dhd_bus *bus) +brcmf_sdbrcm_chip_detach(struct brcmf_bus *bus) { - DHD_TRACE(("%s: Enter\n", __func__)); + BRCMF_TRACE(("%s: Enter\n", __func__)); kfree(bus->ci); bus->ci = NULL; } + +static void +brcmf_sdbrcm_wait_for_event(struct brcmf_bus *bus, bool *lockvar) +{ + brcmf_sdbrcm_sdunlock(bus); + wait_event_interruptible_timeout(bus->ctrl_wait, + (*lockvar == false), HZ * 2); + brcmf_sdbrcm_sdlock(bus); + return; +} + +static void +brcmf_sdbrcm_wait_event_wakeup(struct brcmf_bus *bus) +{ + if (waitqueue_active(&bus->ctrl_wait)) + wake_up_interruptible(&bus->ctrl_wait); + return; +} + +static int +brcmf_sdbrcm_watchdog_thread(void *data) +{ + struct brcmf_bus *bus = (struct brcmf_bus *)data; + + /* This thread doesn't need any user-level access, + * so get rid of all our resources + */ + if (brcmf_watchdog_prio > 0) { + struct sched_param param; + param.sched_priority = (brcmf_watchdog_prio < MAX_RT_PRIO) ? + brcmf_watchdog_prio : (MAX_RT_PRIO - 1); + sched_setscheduler(current, SCHED_FIFO, ¶m); + } + + allow_signal(SIGTERM); + /* Run until signal received */ + while (1) { + if (kthread_should_stop()) + break; + if (!wait_for_completion_interruptible(&bus->watchdog_wait)) { + if (bus->drvr->dongle_reset == false) + brcmf_sdbrcm_bus_watchdog(bus->drvr); + /* Count the tick for reference */ + bus->drvr->tickcnt++; + } else + break; + } + return 0; +} + +static void +brcmf_sdbrcm_watchdog(unsigned long data) +{ + struct brcmf_bus *bus = (struct brcmf_bus *)data; + + if (brcmf_watchdog_prio >= 0) { + if (bus->watchdog_tsk) + complete(&bus->watchdog_wait); + else + return; + } else { + brcmf_sdbrcm_bus_watchdog(bus->drvr); + + /* Count the tick for reference */ + bus->drvr->tickcnt++; + } + + /* Reschedule the watchdog */ + if (bus->wd_timer_valid) + mod_timer(&bus->timer, jiffies + brcmf_watchdog_ms * HZ / 1000); +} + +void +brcmf_sdbrcm_wd_timer(struct brcmf_bus *bus, uint wdtick) +{ + static uint save_ms; + + /* don't start the wd until fw is loaded */ + if (bus->drvr->busstate == BRCMF_BUS_DOWN) + return; + + /* Totally stop the timer */ + if (!wdtick && bus->wd_timer_valid == true) { + del_timer_sync(&bus->timer); + bus->wd_timer_valid = false; + save_ms = wdtick; + return; + } + + if (wdtick) { + brcmf_watchdog_ms = (uint) wdtick; + + if (save_ms != brcmf_watchdog_ms) { + if (bus->wd_timer_valid == true) + /* Stop timer and restart at new value */ + del_timer_sync(&bus->timer); + + /* Create timer again when watchdog period is + dynamically changed or in the first instance + */ + bus->timer.expires = + jiffies + brcmf_watchdog_ms * HZ / 1000; + add_timer(&bus->timer); + + } else { + /* Re arm the timer, at last watchdog period */ + mod_timer(&bus->timer, + jiffies + brcmf_watchdog_ms * HZ / 1000); + } + + bus->wd_timer_valid = true; + save_ms = wdtick; + } +} + +static int brcmf_sdbrcm_dpc_thread(void *data) +{ + struct brcmf_bus *bus = (struct brcmf_bus *) data; + + /* This thread doesn't need any user-level access, + * so get rid of all our resources + */ + if (brcmf_dpc_prio > 0) { + struct sched_param param; + param.sched_priority = (brcmf_dpc_prio < MAX_RT_PRIO) ? + brcmf_dpc_prio : (MAX_RT_PRIO - 1); + sched_setscheduler(current, SCHED_FIFO, ¶m); + } + + allow_signal(SIGTERM); + /* Run until signal received */ + while (1) { + if (kthread_should_stop()) + break; + if (!wait_for_completion_interruptible(&bus->dpc_wait)) { + /* Call bus dpc unless it indicated down + (then clean stop) */ + if (bus->drvr->busstate != BRCMF_BUS_DOWN) { + if (brcmf_sdbrcm_dpc(bus)) + complete(&bus->dpc_wait); + } else { + brcmf_sdbrcm_bus_stop(bus, true); + } + } else + break; + } + return 0; +} + +static void brcmf_sdbrcm_dpc_tasklet(unsigned long data) +{ + struct brcmf_bus *bus = (struct brcmf_bus *) data; + + /* Call bus dpc unless it indicated down (then clean stop) */ + if (bus->drvr->busstate != BRCMF_BUS_DOWN) { + if (brcmf_sdbrcm_dpc(bus)) + tasklet_schedule(&bus->tasklet); + } else + brcmf_sdbrcm_bus_stop(bus, true); +} + +static void brcmf_sdbrcm_sched_dpc(struct brcmf_bus *bus) +{ + if (bus->dpc_tsk) { + complete(&bus->dpc_wait); + return; + } + + tasklet_schedule(&bus->tasklet); +} + +static void brcmf_sdbrcm_sdlock(struct brcmf_bus *bus) +{ + if (bus->threads_only) + down(&bus->sdsem); + else + spin_lock_bh(&bus->sdlock); +} + +static void brcmf_sdbrcm_sdunlock(struct brcmf_bus *bus) +{ + if (bus->threads_only) + up(&bus->sdsem); + else + spin_unlock_bh(&bus->sdlock); +} + +static int brcmf_sdbrcm_get_image(char *buf, int len, struct brcmf_bus *bus) +{ + if (bus->firmware->size < bus->fw_ptr + len) + len = bus->firmware->size - bus->fw_ptr; + + memcpy(buf, &bus->firmware->data[bus->fw_ptr], len); + bus->fw_ptr += len; + return len; +} + +MODULE_FIRMWARE(BCM4329_FW_NAME); +MODULE_FIRMWARE(BCM4329_NV_NAME); diff --git a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h b/drivers/staging/brcm80211/brcmfmac/dhdioctl.h deleted file mode 100644 index f0ba53558cc..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/dhdioctl.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _dhdioctl_h_ -#define _dhdioctl_h_ - -/* Linux network driver ioctl encoding */ -typedef struct dhd_ioctl { - uint cmd; /* common ioctl definition */ - void *buf; /* pointer to user buffer */ - uint len; /* length of user buffer */ - bool set; /* get or set request (optional) */ - uint used; /* bytes read or written (optional) */ - uint needed; /* bytes needed (optional) */ - uint driver; /* to identify target driver */ -} dhd_ioctl_t; - -/* per-driver magic numbers */ -#define DHD_IOCTL_MAGIC 0x00444944 - -/* bump this number if you change the ioctl interface */ -#define DHD_IOCTL_VERSION 1 - -#define DHD_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */ -#define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ - -/* common ioctl definitions */ -#define DHD_GET_MAGIC 0 -#define DHD_GET_VERSION 1 -#define DHD_GET_VAR 2 -#define DHD_SET_VAR 3 - -/* message levels */ -#define DHD_ERROR_VAL 0x0001 -#define DHD_TRACE_VAL 0x0002 -#define DHD_INFO_VAL 0x0004 -#define DHD_DATA_VAL 0x0008 -#define DHD_CTL_VAL 0x0010 -#define DHD_TIMER_VAL 0x0020 -#define DHD_HDRS_VAL 0x0040 -#define DHD_BYTES_VAL 0x0080 -#define DHD_INTR_VAL 0x0100 -#define DHD_LOG_VAL 0x0200 -#define DHD_GLOM_VAL 0x0400 -#define DHD_EVENT_VAL 0x0800 -#define DHD_BTA_VAL 0x1000 -#define DHD_ISCAN_VAL 0x2000 - -#ifdef SDTEST -/* For pktgen iovar */ -typedef struct dhd_pktgen { - uint version; /* To allow structure change tracking */ - uint freq; /* Max ticks between tx/rx attempts */ - uint count; /* Test packets to send/rcv each attempt */ - uint print; /* Print counts every <print> attempts */ - uint total; /* Total packets (or bursts) */ - uint minlen; /* Minimum length of packets to send */ - uint maxlen; /* Maximum length of packets to send */ - uint numsent; /* Count of test packets sent */ - uint numrcvd; /* Count of test packets received */ - uint numfail; /* Count of test send failures */ - uint mode; /* Test mode (type of test packets) */ - uint stop; /* Stop after this many tx failures */ -} dhd_pktgen_t; - -/* Version in case structure changes */ -#define DHD_PKTGEN_VERSION 2 - -/* Type of test packets to use */ -#define DHD_PKTGEN_ECHO 1 /* Send echo requests */ -#define DHD_PKTGEN_SEND 2 /* Send discard packets */ -#define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */ -#define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous - tx dongle */ -#endif /* SDTEST */ - -/* Enter idle immediately (no timeout) */ -#define DHD_IDLE_IMMEDIATE (-1) - -/* Values for idleclock iovar: other values are the sd_divisor to use - when idle */ -#define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change - when idle */ -#define DHD_IDLE_STOP (-1) /* Request SD clock be stopped - (and use SD1 mode) */ - -#endif /* _dhdioctl_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/dngl_stats.h b/drivers/staging/brcm80211/brcmfmac/dngl_stats.h deleted file mode 100644 index 699cbffa9c4..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/dngl_stats.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _dngl_stats_h_ -#define _dngl_stats_h_ - -typedef struct { - unsigned long rx_packets; /* total packets received */ - unsigned long tx_packets; /* total packets transmitted */ - unsigned long rx_bytes; /* total bytes received */ - unsigned long tx_bytes; /* total bytes transmitted */ - unsigned long rx_errors; /* bad packets received */ - unsigned long tx_errors; /* packet transmit problems */ - unsigned long rx_dropped; /* packets dropped by dongle */ - unsigned long tx_dropped; /* packets dropped by dongle */ - unsigned long multicast; /* multicast packets received */ -} dngl_stats_t; - -#endif /* _dngl_stats_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h b/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h deleted file mode 100644 index 28f092c9e02..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/hndrte_armtrap.h +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _hndrte_armtrap_h -#define _hndrte_armtrap_h - -/* ARM trap handling */ - -/* Trap types defined by ARM (see arminc.h) */ - -/* Trap locations in lo memory */ -#define TRAP_STRIDE 4 -#define FIRST_TRAP TR_RST -#define LAST_TRAP (TR_FIQ * TRAP_STRIDE) - -#if defined(__ARM_ARCH_4T__) -#define MAX_TRAP_TYPE (TR_FIQ + 1) -#elif defined(__ARM_ARCH_7M__) -#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) -#endif /* __ARM_ARCH_7M__ */ - -/* The trap structure is defined here as offsets for assembly */ -#define TR_TYPE 0x00 -#define TR_EPC 0x04 -#define TR_CPSR 0x08 -#define TR_SPSR 0x0c -#define TR_REGS 0x10 -#define TR_REG(n) (TR_REGS + (n) * 4) -#define TR_SP TR_REG(13) -#define TR_LR TR_REG(14) -#define TR_PC TR_REG(15) - -#define TRAP_T_SIZE 80 - -#ifndef _LANGUAGE_ASSEMBLY - -typedef struct _trap_struct { - u32 type; - u32 epc; - u32 cpsr; - u32 spsr; - u32 r0; - u32 r1; - u32 r2; - u32 r3; - u32 r4; - u32 r5; - u32 r6; - u32 r7; - u32 r8; - u32 r9; - u32 r10; - u32 r11; - u32 r12; - u32 r13; - u32 r14; - u32 pc; -} trap_t; - -#endif /* !_LANGUAGE_ASSEMBLY */ - -#endif /* _hndrte_armtrap_h */ diff --git a/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h b/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h deleted file mode 100644 index 4df3eecaa83..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/hndrte_cons.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#ifndef _hndrte_cons_h -#define _hndrte_cons_h - -#define CBUF_LEN (128) - -#define LOG_BUF_LEN 1024 - -typedef struct { - u32 buf; /* Can't be pointer on (64-bit) hosts */ - uint buf_size; - uint idx; - char *_buf_compat; /* Redundant pointer for backward compat. */ -} hndrte_log_t; - -typedef struct { - /* Virtual UART - * When there is no UART (e.g. Quickturn), - * the host should write a complete - * input line directly into cbuf and then write - * the length into vcons_in. - * This may also be used when there is a real UART - * (at risk of conflicting with - * the real UART). vcons_out is currently unused. - */ - volatile uint vcons_in; - volatile uint vcons_out; - - /* Output (logging) buffer - * Console output is written to a ring buffer log_buf at index log_idx. - * The host may read the output when it sees log_idx advance. - * Output will be lost if the output wraps around faster than the host - * polls. - */ - hndrte_log_t log; - - /* Console input line buffer - * Characters are read one at a time into cbuf - * until <CR> is received, then - * the buffer is processed as a command line. - * Also used for virtual UART. - */ - uint cbuf_idx; - char cbuf[CBUF_LEN]; -} hndrte_cons_t; - -#endif /* _hndrte_cons_h */ - diff --git a/drivers/staging/brcm80211/brcmfmac/msgtrace.h b/drivers/staging/brcm80211/brcmfmac/msgtrace.h deleted file mode 100644 index d654671a5a3..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/msgtrace.h +++ /dev/null @@ -1,61 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _MSGTRACE_H -#define _MSGTRACE_H - -#define MSGTRACE_VERSION 1 - -/* Message trace header */ -typedef struct msgtrace_hdr { - u8 version; - u8 spare; - u16 len; /* Len of the trace */ - u32 seqnum; /* Sequence number of message. Useful - * if the messsage has been lost - * because of DMA error or a bus reset - * (ex: SDIO Func2) - */ - u32 discarded_bytes; /* Number of discarded bytes because of - trace overflow */ - u32 discarded_printf; /* Number of discarded printf - because of trace overflow */ -} __attribute__((packed)) msgtrace_hdr_t; - -#define MSGTRACE_HDRLEN sizeof(msgtrace_hdr_t) - -/* The hbus driver generates traces when sending a trace message. - * This causes endless traces. - * This flag must be set to true in any hbus traces. - * The flag is reset in the function msgtrace_put. - * This prevents endless traces but generates hasardous - * lost of traces only in bus device code. - * It is recommendat to set this flag in macro SD_TRACE - * but not in SD_ERROR for avoiding missing - * hbus error traces. hbus error trace should not generates endless traces. - */ -extern bool msgtrace_hbus_trace; - -typedef void (*msgtrace_func_send_t) (void *hdl1, void *hdl2, u8 *hdr, - u16 hdrlen, u8 *buf, - u16 buflen); - -extern void msgtrace_sent(void); -extern void msgtrace_put(char *buf, int count); -extern void msgtrace_init(void *hdl1, void *hdl2, - msgtrace_func_send_t func_send); - -#endif /* _MSGTRACE_H */ diff --git a/drivers/staging/brcm80211/brcmfmac/sdio_host.h b/drivers/staging/brcm80211/brcmfmac/sdio_host.h new file mode 100644 index 00000000000..d3454721506 --- /dev/null +++ b/drivers/staging/brcm80211/brcmfmac/sdio_host.h @@ -0,0 +1,347 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_SDH_H_ +#define _BRCM_SDH_H_ + +#include <linux/skbuff.h> +extern const uint brcmf_sdio_msglevel; + +#define SDIO_FUNC_0 0 +#define SDIO_FUNC_1 1 +#define SDIO_FUNC_2 2 + +#define SDIOD_FBR_SIZE 0x100 + +/* io_en */ +#define SDIO_FUNC_ENABLE_1 0x02 +#define SDIO_FUNC_ENABLE_2 0x04 + +/* io_rdys */ +#define SDIO_FUNC_READY_1 0x02 +#define SDIO_FUNC_READY_2 0x04 + +/* intr_status */ +#define INTR_STATUS_FUNC1 0x2 +#define INTR_STATUS_FUNC2 0x4 + +/* Maximum number of I/O funcs */ +#define SDIOD_MAX_IOFUNCS 7 + +#define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */ + +/* function 1 miscellaneous registers */ +#define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */ +#define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */ +#define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */ +#define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */ +#define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */ +#define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */ +#define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */ +#define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */ +#define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */ +#define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */ + +/* registers introduced in rev 8, some content (mask/bits) defs in sbsdpcmdev.h */ +#define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */ +#define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */ +#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */ +#define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */ +#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */ +#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */ +#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */ +#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */ +#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */ +#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */ + +#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */ +#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */ + +/* function 1 OCP space */ +#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */ +#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000 +#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */ + +/* some duplication with sbsdpcmdev.h here */ +/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */ +#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */ +#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */ +#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */ +#define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */ + +#define SDIOH_READ 0 /* Read request */ +#define SDIOH_WRITE 1 /* Write request */ + +#define SDIOH_DATA_FIX 0 /* Fixed addressing */ +#define SDIOH_DATA_INC 1 /* Incremental addressing */ + +/* internal return code */ +#define SUCCESS 0 +#define ERROR 1 + +/* forward declarations */ +struct brcmf_sdio_card; + +struct brcmf_sdreg { + int func; + int offset; + int value; +}; + +struct sdioh_info { + struct osl_info *osh; /* osh handler */ + bool client_intr_enabled; /* interrupt connnected flag */ + bool intr_handler_valid; /* client driver interrupt handler valid */ + void (*intr_handler)(void *); /* registered interrupt handler */ + void *intr_handler_arg; /* argument to call interrupt handler */ + u16 intmask; /* Current active interrupts */ + void *sdos_info; /* Pointer to per-OS private data */ + + uint irq; /* Client irq */ + int intrcount; /* Client interrupts */ + bool sd_blockmode; /* sd_blockmode == false => 64 Byte Cmd 53s. */ + /* Must be on for sd_multiblock to be effective */ + bool use_client_ints; /* If this is false, make sure to restore */ + int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ + u8 num_funcs; /* Supported funcs on client */ + u32 com_cis_ptr; + u32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; + uint max_dma_len; + uint max_dma_descriptors; /* DMA Descriptors supported by this controller. */ + /* SDDMA_DESCRIPTOR SGList[32]; *//* Scatter/Gather DMA List */ +}; + +struct brcmf_sdmmc_instance { + struct sdioh_info *sd; + struct sdio_func *func[SDIOD_MAX_IOFUNCS]; + u32 host_claimed; +}; + +/* Attach and build an interface to the underlying SD host driver. + * - Allocates resources (structs, arrays, mem, OS handles, etc) needed by + * brcmf_sdcard. + * - Returns the sdio card handle and virtual address base for register access. + * The returned handle should be used in all subsequent calls, but the bcmsh + * implementation may maintain a single "default" handle (e.g. the first or + * most recent one) to enable single-instance implementations to pass NULL. + */ +extern struct brcmf_sdio_card* +brcmf_sdcard_attach(void *cfghdl, u32 *regsva, uint irq); + +/* Detach - freeup resources allocated in attach */ +extern int brcmf_sdcard_detach(struct brcmf_sdio_card *card); + +/* Enable/disable SD interrupt */ +extern int brcmf_sdcard_intr_enable(struct brcmf_sdio_card *card); +extern int brcmf_sdcard_intr_disable(struct brcmf_sdio_card *card); + +/* Register/deregister device interrupt handler. */ +extern int +brcmf_sdcard_intr_reg(struct brcmf_sdio_card *card, + void (*fn)(void *), void *argh); + +extern int brcmf_sdcard_intr_dereg(struct brcmf_sdio_card *card); + +/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). + * fn: function number + * addr: unmodified SDIO-space address + * data: data byte to write + * err: pointer to error code (or NULL) + */ +extern u8 brcmf_sdcard_cfg_read(struct brcmf_sdio_card *card, uint func, + u32 addr, int *err); +extern void brcmf_sdcard_cfg_write(struct brcmf_sdio_card *card, uint func, + u32 addr, u8 data, int *err); + +/* Read/Write 4bytes from/to cfg space */ +extern u32 +brcmf_sdcard_cfg_read_word(struct brcmf_sdio_card *card, uint fnc_num, + u32 addr, int *err); + +extern void brcmf_sdcard_cfg_write_word(struct brcmf_sdio_card *card, + uint fnc_num, u32 addr, + u32 data, int *err); + +/* Read CIS content for specified function. + * fn: function whose CIS is being requested (0 is common CIS) + * cis: pointer to memory location to place results + * length: number of bytes to read + * Internally, this routine uses the values from the cis base regs (0x9-0xB) + * to form an SDIO-space address to read the data from. + */ +extern int brcmf_sdcard_cis_read(struct brcmf_sdio_card *card, uint func, + u8 *cis, uint length); + +/* Synchronous access to device (client) core registers via CMD53 to F1. + * addr: backplane address (i.e. >= regsva from attach) + * size: register width in bytes (2 or 4) + * data: data for register write + */ +extern u32 +brcmf_sdcard_reg_read(struct brcmf_sdio_card *card, u32 addr, uint size); + +extern u32 +brcmf_sdcard_reg_write(struct brcmf_sdio_card *card, u32 addr, uint size, + u32 data); + +/* Indicate if last reg read/write failed */ +extern bool brcmf_sdcard_regfail(struct brcmf_sdio_card *card); + +/* Buffer transfer to/from device (client) core via cmd53. + * fn: function number + * addr: backplane address (i.e. >= regsva from attach) + * flags: backplane width, address increment, sync/async + * buf: pointer to memory data buffer + * nbytes: number of bytes to transfer to/from buf + * pkt: pointer to packet associated with buf (if any) + * complete: callback function for command completion (async only) + * handle: handle for completion callback (first arg in callback) + * Returns 0 or error code. + * NOTE: Async operation is not currently supported. + */ +extern int +brcmf_sdcard_send_buf(struct brcmf_sdio_card *card, u32 addr, uint fn, + uint flags, u8 *buf, uint nbytes, void *pkt, + void (*complete)(void *handle, int status, + bool sync_waiting), + void *handle); +extern int +brcmf_sdcard_recv_buf(struct brcmf_sdio_card *card, u32 addr, uint fn, + uint flags, u8 *buf, uint nbytes, struct sk_buff *pkt, + void (*complete)(void *handle, int status, + bool sync_waiting), + void *handle); + +/* Flags bits */ +#define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ +#define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ +#define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ + +/* Pending (non-error) return code */ +#define BCME_PENDING 1 + +/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). + * rw: read or write (0/1) + * addr: direct SDIO address + * buf: pointer to memory data buffer + * nbytes: number of bytes to transfer to/from buf + * Returns 0 or error code. + */ +extern int brcmf_sdcard_rwdata(struct brcmf_sdio_card *card, uint rw, u32 addr, + u8 *buf, uint nbytes); + +/* Issue an abort to the specified function */ +extern int brcmf_sdcard_abort(struct brcmf_sdio_card *card, uint fn); + +/* Returns the "Device ID" of target device on the SDIO bus. */ +extern int brcmf_sdcard_query_device(struct brcmf_sdio_card *card); + +/* Miscellaneous knob tweaker. */ +extern int brcmf_sdcard_iovar_op(struct brcmf_sdio_card *card, const char *name, + void *params, int plen, void *arg, int len, + bool set); + +/* helper functions */ + +/* callback functions */ +struct brcmf_sdioh_driver { + /* attach to device */ + void *(*attach) (u16 vend_id, u16 dev_id, u16 bus, u16 slot, + u16 func, uint bustype, u32 regsva, void *param); + /* detach from device */ + void (*detach) (void *ch); +}; + +struct sdioh_info; + +/* platform specific/high level functions */ +extern int brcmf_sdio_function_init(void); +extern int brcmf_sdio_register(struct brcmf_sdioh_driver *driver); +extern void brcmf_sdio_unregister(void); +extern void brcmf_sdio_function_cleanup(void); +extern int brcmf_sdio_probe(struct device *dev); +extern int brcmf_sdio_remove(struct device *dev); + +/* Function to return current window addr */ +extern u32 brcmf_sdcard_cur_sbwad(struct brcmf_sdio_card *card); + +/* Allocate/init/free per-OS private data */ +extern int brcmf_sdioh_osinit(struct sdioh_info *sd); +extern void brcmf_sdioh_osfree(struct sdioh_info *sd); + +/* Core interrupt enable/disable of device interrupts */ +extern void brcmf_sdioh_dev_intr_on(struct sdioh_info *sd); +extern void brcmf_sdioh_dev_intr_off(struct sdioh_info *sd); + +/* attach, return handler on success, NULL if failed. + * The handler shall be provided by all subsequent calls. No local cache + * cfghdl points to the starting address of pci device mapped memory + */ +extern struct sdioh_info *brcmf_sdioh_attach(void *cfghdl, uint irq); +extern int brcmf_sdioh_detach(struct sdioh_info *si); + +extern int +brcmf_sdioh_interrupt_register(struct sdioh_info *si, + void (*sdioh_cb_fn)(void *), void *argh); + +extern int brcmf_sdioh_interrupt_deregister(struct sdioh_info *si); + +/* enable or disable SD interrupt */ +extern int +brcmf_sdioh_interrupt_set(struct sdioh_info *si, bool enable_disable); + +/* read or write one byte using cmd52 */ +extern int +brcmf_sdioh_request_byte(struct sdioh_info *si, uint rw, uint fnc, uint addr, + u8 *byte); + +/* read or write 2/4 bytes using cmd53 */ +extern int +brcmf_sdioh_request_word(struct sdioh_info *si, uint cmd_type, + uint rw, uint fnc, uint addr, + u32 *word, uint nbyte); + +/* read or write any buffer using cmd53 */ +extern int +brcmf_sdioh_request_buffer(struct sdioh_info *si, uint pio_dma, + uint fix_inc, uint rw, uint fnc_num, + u32 addr, uint regwidth, + u32 buflen, u8 *buffer, struct sk_buff *pkt); + +/* get cis data */ +extern int +brcmf_sdioh_cis_read(struct sdioh_info *si, uint fuc, u8 *cis, u32 length); + +extern int +brcmf_sdioh_cfg_read(struct sdioh_info *si, uint fuc, u32 addr, u8 *data); +extern int +brcmf_sdioh_cfg_write(struct sdioh_info *si, uint fuc, u32 addr, u8 *data); + +/* handle iovars */ +extern int brcmf_sdioh_iovar_op(struct sdioh_info *si, const char *name, + void *params, int plen, void *arg, int len, bool set); + +/* Issue abort to the specified function and clear controller as needed */ +extern int brcmf_sdioh_abort(struct sdioh_info *si, uint fnc); + +/* Watchdog timer interface for pm ops */ +extern void brcmf_sdio_wdtmr_enable(bool enable); + +extern uint sd_msglevel; /* Debug message level */ + +extern struct brcmf_sdmmc_instance *gInstance; + +#endif /* _BRCM_SDH_H_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/sdioh.h b/drivers/staging/brcm80211/brcmfmac/sdioh.h deleted file mode 100644 index f96aaf9cec7..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/sdioh.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SDIOH_H -#define _SDIOH_H - -#define SD_SysAddr 0x000 -#define SD_BlockSize 0x004 -#define SD_BlockCount 0x006 -#define SD_Arg0 0x008 -#define SD_Arg1 0x00A -#define SD_TransferMode 0x00C -#define SD_Command 0x00E -#define SD_Response0 0x010 -#define SD_Response1 0x012 -#define SD_Response2 0x014 -#define SD_Response3 0x016 -#define SD_Response4 0x018 -#define SD_Response5 0x01A -#define SD_Response6 0x01C -#define SD_Response7 0x01E -#define SD_BufferDataPort0 0x020 -#define SD_BufferDataPort1 0x022 -#define SD_PresentState 0x024 -#define SD_HostCntrl 0x028 -#define SD_PwrCntrl 0x029 -#define SD_BlockGapCntrl 0x02A -#define SD_WakeupCntrl 0x02B -#define SD_ClockCntrl 0x02C -#define SD_TimeoutCntrl 0x02E -#define SD_SoftwareReset 0x02F -#define SD_IntrStatus 0x030 -#define SD_ErrorIntrStatus 0x032 -#define SD_IntrStatusEnable 0x034 -#define SD_ErrorIntrStatusEnable 0x036 -#define SD_IntrSignalEnable 0x038 -#define SD_ErrorIntrSignalEnable 0x03A -#define SD_CMD12ErrorStatus 0x03C -#define SD_Capabilities 0x040 -#define SD_Capabilities_Reserved 0x044 -#define SD_MaxCurCap 0x048 -#define SD_MaxCurCap_Reserved 0x04C -#define SD_ADMA_SysAddr 0x58 -#define SD_SlotInterruptStatus 0x0FC -#define SD_HostControllerVersion 0x0FE - -/* SD specific registers in PCI config space */ -#define SD_SlotInfo 0x40 - -#endif /* _SDIOH_H */ diff --git a/drivers/staging/brcm80211/brcmfmac/sdiovar.h b/drivers/staging/brcm80211/brcmfmac/sdiovar.h deleted file mode 100644 index d1cfa5f0a98..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/sdiovar.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _sdiovar_h_ -#define _sdiovar_h_ - -typedef struct sdreg { - int func; - int offset; - int value; -} sdreg_t; - -/* Common msglevel constants */ -#define SDH_ERROR_VAL 0x0001 /* Error */ -#define SDH_TRACE_VAL 0x0002 /* Trace */ -#define SDH_INFO_VAL 0x0004 /* Info */ -#define SDH_DEBUG_VAL 0x0008 /* Debug */ -#define SDH_DATA_VAL 0x0010 /* Data */ -#define SDH_CTRL_VAL 0x0020 /* Control Regs */ -#define SDH_LOG_VAL 0x0040 /* Enable bcmlog */ -#define SDH_DMA_VAL 0x0080 /* DMA */ - -#define NUM_PREV_TRANSACTIONS 16 - -#endif /* _sdiovar_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c index 1827b0bf920..821206d3e53 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.c @@ -16,336 +16,325 @@ #include <linux/kernel.h> #include <linux/if_arp.h> - -#include <bcmutils.h> - -#include <asm/uaccess.h> - -#include <dngl_stats.h> -#include <dhd.h> -#include <dhdioctl.h> -#include <wlioctl.h> - +#include <linux/sched.h> #include <linux/kthread.h> #include <linux/netdevice.h> #include <linux/sched.h> #include <linux/etherdevice.h> #include <linux/wireless.h> #include <linux/ieee80211.h> +#include <linux/mmc/sdio_func.h> +#include <linux/uaccess.h> #include <net/cfg80211.h> - #include <net/rtnetlink.h> -#include <linux/mmc/sdio_func.h> -#include <linux/firmware.h> -#include <wl_cfg80211.h> -void sdioh_sdio_set_host_pm_flags(int flag); +#include <brcmu_utils.h> +#include <defs.h> +#include <brcmu_wifi.h> +#include "dhd.h" +#include "wl_cfg80211.h" static struct sdio_func *cfg80211_sdio_func; -static struct wl_dev *wl_cfg80211_dev; +static struct brcmf_cfg80211_dev *cfg80211_dev; static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; -u32 wl_dbg_level = WL_DBG_ERR; - -#define WL_4329_FW_FILE "brcm/bcm4329-fullmac-4.bin" -#define WL_4329_NVRAM_FILE "brcm/bcm4329-fullmac-4.txt" +u32 brcmf_dbg_level = WL_DBG_ERR; /* ** cfg80211_ops api/callback list */ -static s32 wl_cfg80211_change_iface(struct wiphy *wiphy, - struct net_device *ndev, - enum nl80211_iftype type, u32 *flags, - struct vif_params *params); -static s32 __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, - struct cfg80211_scan_request *request, - struct cfg80211_ssid *this_ssid); -static s32 wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, - struct cfg80211_scan_request *request); -static s32 wl_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed); -static s32 wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, - struct cfg80211_ibss_params *params); -static s32 wl_cfg80211_leave_ibss(struct wiphy *wiphy, - struct net_device *dev); -static s32 wl_cfg80211_get_station(struct wiphy *wiphy, - struct net_device *dev, u8 *mac, - struct station_info *sinfo); -static s32 wl_cfg80211_set_power_mgmt(struct wiphy *wiphy, - struct net_device *dev, bool enabled, - s32 timeout); -static s32 wl_cfg80211_set_bitrate_mask(struct wiphy *wiphy, - struct net_device *dev, - const u8 *addr, - const struct cfg80211_bitrate_mask - *mask); -static int wl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev, - struct cfg80211_connect_params *sme); -static s32 wl_cfg80211_disconnect(struct wiphy *wiphy, struct net_device *dev, - u16 reason_code); -static s32 wl_cfg80211_set_tx_power(struct wiphy *wiphy, +static s32 brcmf_cfg80211_change_iface(struct wiphy *wiphy, + struct net_device *ndev, + enum nl80211_iftype type, u32 *flags, + struct vif_params *params); +static s32 __brcmf_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, + struct cfg80211_scan_request *request, + struct cfg80211_ssid *this_ssid); +static s32 brcmf_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, + struct cfg80211_scan_request *request); +static s32 brcmf_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed); +static s32 brcmf_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, + struct cfg80211_ibss_params *params); +static s32 brcmf_cfg80211_leave_ibss(struct wiphy *wiphy, + struct net_device *dev); +static s32 brcmf_cfg80211_get_station(struct wiphy *wiphy, + struct net_device *dev, u8 *mac, + struct station_info *sinfo); +static s32 brcmf_cfg80211_set_power_mgmt(struct wiphy *wiphy, + struct net_device *dev, bool enabled, + s32 timeout); +static s32 brcmf_cfg80211_set_bitrate_mask(struct wiphy *wiphy, + struct net_device *dev, + const u8 *addr, + const struct cfg80211_bitrate_mask + *mask); +static int brcmf_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev, + struct cfg80211_connect_params *sme); +static s32 brcmf_cfg80211_disconnect(struct wiphy *wiphy, + struct net_device *dev, + u16 reason_code); +static s32 brcmf_cfg80211_set_tx_power(struct wiphy *wiphy, enum nl80211_tx_power_setting type, s32 dbm); -static s32 wl_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm); -static s32 wl_cfg80211_config_default_key(struct wiphy *wiphy, +static s32 brcmf_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm); +static s32 brcmf_cfg80211_config_default_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, bool unicast, bool multicast); -static s32 wl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev, +static s32 brcmf_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, bool pairwise, const u8 *mac_addr, struct key_params *params); -static s32 wl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev, +static s32 brcmf_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, bool pairwise, const u8 *mac_addr); -static s32 wl_cfg80211_get_key(struct wiphy *wiphy, struct net_device *dev, +static s32 brcmf_cfg80211_get_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, bool pairwise, const u8 *mac_addr, void *cookie, void (*callback) (void *cookie, struct key_params * params)); -static s32 wl_cfg80211_config_default_mgmt_key(struct wiphy *wiphy, +static s32 brcmf_cfg80211_config_default_mgmt_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx); -static s32 wl_cfg80211_resume(struct wiphy *wiphy); -static s32 wl_cfg80211_suspend(struct wiphy *wiphy); -static s32 wl_cfg80211_set_pmksa(struct wiphy *wiphy, struct net_device *dev, +static s32 brcmf_cfg80211_resume(struct wiphy *wiphy); +static s32 brcmf_cfg80211_suspend(struct wiphy *wiphy, + struct cfg80211_wowlan *wow); +static s32 brcmf_cfg80211_set_pmksa(struct wiphy *wiphy, struct net_device *dev, struct cfg80211_pmksa *pmksa); -static s32 wl_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *dev, +static s32 brcmf_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *dev, struct cfg80211_pmksa *pmksa); -static s32 wl_cfg80211_flush_pmksa(struct wiphy *wiphy, +static s32 brcmf_cfg80211_flush_pmksa(struct wiphy *wiphy, struct net_device *dev); /* ** event & event Q handlers for cfg80211 interfaces */ -static s32 wl_create_event_handler(struct wl_priv *wl); -static void wl_destroy_event_handler(struct wl_priv *wl); -static s32 wl_event_handler(void *data); -static void wl_init_eq(struct wl_priv *wl); -static void wl_flush_eq(struct wl_priv *wl); -static void wl_lock_eq(struct wl_priv *wl); -static void wl_unlock_eq(struct wl_priv *wl); -static void wl_init_eq_lock(struct wl_priv *wl); -static void wl_init_eloop_handler(struct wl_event_loop *el); -static struct wl_event_q *wl_deq_event(struct wl_priv *wl); -static s32 wl_enq_event(struct wl_priv *wl, u32 type, - const wl_event_msg_t *msg, void *data); -static void wl_put_event(struct wl_event_q *e); -static void wl_wakeup_event(struct wl_priv *wl); -static s32 wl_notify_connect_status(struct wl_priv *wl, - struct net_device *ndev, - const wl_event_msg_t *e, void *data); -static s32 wl_notify_roaming_status(struct wl_priv *wl, - struct net_device *ndev, - const wl_event_msg_t *e, void *data); -static s32 wl_notify_scan_status(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data); -static s32 wl_bss_connect_done(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data, - bool completed); -static s32 wl_bss_roaming_done(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data); -static s32 wl_notify_mic_status(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data); +static s32 brcmf_create_event_handler(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_destroy_event_handler(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_event_handler(void *data); +static void brcmf_init_eq(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_flush_eq(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_lock_eq(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_unlock_eq(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_init_eq_lock(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_init_eloop_handler(struct brcmf_cfg80211_event_loop *el); +static struct brcmf_cfg80211_event_q * +brcmf_deq_event(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_enq_event(struct brcmf_cfg80211_priv *cfg_priv, u32 type, + const struct brcmf_event_msg *msg, void *data); +static void brcmf_put_event(struct brcmf_cfg80211_event_q *e); +static void brcmf_wakeup_event(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_notify_connect_status(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, + void *data); +static s32 brcmf_notify_roaming_status(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, + void *data); +static s32 brcmf_notify_scan_status(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, + void *data); +static s32 brcmf_bss_connect_done(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, void *data, + bool completed); +static s32 brcmf_bss_roaming_done(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, void *data); +static s32 brcmf_notify_mic_status(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, void *data); /* ** register/deregister sdio function */ -struct sdio_func *wl_cfg80211_get_sdio_func(void); -static void wl_clear_sdio_func(void); +static void brcmf_clear_sdio_func(void); /* ** ioctl utilites */ -static s32 wl_dev_bufvar_get(struct net_device *dev, s8 *name, s8 *buf, +static s32 brcmf_dev_bufvar_get(struct net_device *dev, s8 *name, s8 *buf, s32 buf_len); -static __used s32 wl_dev_bufvar_set(struct net_device *dev, s8 *name, +static __used s32 brcmf_dev_bufvar_set(struct net_device *dev, s8 *name, s8 *buf, s32 len); -static s32 wl_dev_intvar_set(struct net_device *dev, s8 *name, s32 val); -static s32 wl_dev_intvar_get(struct net_device *dev, s8 *name, +static s32 brcmf_dev_intvar_set(struct net_device *dev, s8 *name, s32 val); +static s32 brcmf_dev_intvar_get(struct net_device *dev, s8 *name, s32 *retval); -static s32 wl_dev_ioctl(struct net_device *dev, u32 cmd, void *arg, +static s32 brcmf_dev_ioctl(struct net_device *dev, u32 cmd, void *arg, u32 len); /* ** cfg80211 set_wiphy_params utilities */ -static s32 wl_set_frag(struct net_device *dev, u32 frag_threshold); -static s32 wl_set_rts(struct net_device *dev, u32 frag_threshold); -static s32 wl_set_retry(struct net_device *dev, u32 retry, bool l); +static s32 brcmf_set_frag(struct net_device *dev, u32 frag_threshold); +static s32 brcmf_set_rts(struct net_device *dev, u32 frag_threshold); +static s32 brcmf_set_retry(struct net_device *dev, u32 retry, bool l); /* ** wl profile utilities */ -static s32 wl_update_prof(struct wl_priv *wl, const wl_event_msg_t *e, - void *data, s32 item); -static void *wl_read_prof(struct wl_priv *wl, s32 item); -static void wl_init_prof(struct wl_profile *prof); +static s32 brcmf_update_prof(struct brcmf_cfg80211_priv *cfg_priv, + const struct brcmf_event_msg *e, + void *data, s32 item); +static void *brcmf_read_prof(struct brcmf_cfg80211_priv *cfg_priv, s32 item); +static void brcmf_init_prof(struct brcmf_cfg80211_profile *prof); /* ** cfg80211 connect utilites */ -static s32 wl_set_wpa_version(struct net_device *dev, +static s32 brcmf_set_wpa_version(struct net_device *dev, struct cfg80211_connect_params *sme); -static s32 wl_set_auth_type(struct net_device *dev, +static s32 brcmf_set_auth_type(struct net_device *dev, struct cfg80211_connect_params *sme); -static s32 wl_set_set_cipher(struct net_device *dev, +static s32 brcmf_set_set_cipher(struct net_device *dev, struct cfg80211_connect_params *sme); -static s32 wl_set_key_mgmt(struct net_device *dev, +static s32 brcmf_set_key_mgmt(struct net_device *dev, struct cfg80211_connect_params *sme); -static s32 wl_set_set_sharedkey(struct net_device *dev, +static s32 brcmf_set_set_sharedkey(struct net_device *dev, struct cfg80211_connect_params *sme); -static s32 wl_get_assoc_ies(struct wl_priv *wl); -static void wl_clear_assoc_ies(struct wl_priv *wl); -static void wl_ch_to_chanspec(int ch, - struct wl_join_params *join_params, size_t *join_params_size); +static s32 brcmf_get_assoc_ies(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_clear_assoc_ies(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_ch_to_chanspec(int ch, + struct brcmf_join_params *join_params, size_t *join_params_size); /* ** information element utilities */ -static __used s32 wl_add_ie(struct wl_priv *wl, u8 t, u8 l, u8 *v); -static s32 wl_mode_to_nl80211_iftype(s32 mode); -static struct wireless_dev *wl_alloc_wdev(s32 sizeof_iface, +static __used s32 brcmf_add_ie(struct brcmf_cfg80211_priv *cfg_priv, + u8 t, u8 l, u8 *v); +static s32 brcmf_mode_to_nl80211_iftype(s32 mode); +static struct wireless_dev *brcmf_alloc_wdev(s32 sizeof_iface, struct device *dev); -static void wl_free_wdev(struct wl_priv *wl); -static s32 wl_inform_bss(struct wl_priv *wl); -static s32 wl_inform_single_bss(struct wl_priv *wl, struct wl_bss_info *bi); -static s32 wl_update_bss_info(struct wl_priv *wl); -static s32 wl_add_keyext(struct wiphy *wiphy, struct net_device *dev, +static void brcmf_free_wdev(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_inform_bss(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_inform_single_bss(struct brcmf_cfg80211_priv *cfg_priv, + struct brcmf_bss_info *bi); +static s32 brcmf_update_bss_info(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_add_keyext(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, const u8 *mac_addr, struct key_params *params); /* ** key indianess swap utilities */ -static void swap_key_from_BE(struct wl_wsec_key *key); -static void swap_key_to_BE(struct wl_wsec_key *key); +static void swap_key_from_BE(struct brcmf_wsec_key *key); +static void swap_key_to_BE(struct brcmf_wsec_key *key); /* -** wl_priv memory init/deinit utilities +** brcmf_cfg80211_priv memory init/deinit utilities */ -static s32 wl_init_priv_mem(struct wl_priv *wl); -static void wl_deinit_priv_mem(struct wl_priv *wl); +static s32 brcmf_init_priv_mem(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_deinit_priv_mem(struct brcmf_cfg80211_priv *cfg_priv); -static void wl_delay(u32 ms); +static void brcmf_delay(u32 ms); /* ** store/restore cfg80211 instance data */ -static void wl_set_drvdata(struct wl_dev *dev, void *data); -static void *wl_get_drvdata(struct wl_dev *dev); +static void brcmf_set_drvdata(struct brcmf_cfg80211_dev *dev, void *data); +static void *brcmf_get_drvdata(struct brcmf_cfg80211_dev *dev); /* ** ibss mode utilities */ -static bool wl_is_ibssmode(struct wl_priv *wl); +static bool brcmf_is_ibssmode(struct brcmf_cfg80211_priv *cfg_priv); /* ** dongle up/down , default configuration utilities */ -static bool wl_is_linkdown(struct wl_priv *wl, const wl_event_msg_t *e); -static bool wl_is_linkup(struct wl_priv *wl, const wl_event_msg_t *e); -static bool wl_is_nonetwork(struct wl_priv *wl, const wl_event_msg_t *e); -static void wl_link_down(struct wl_priv *wl); -static s32 wl_dongle_mode(struct net_device *ndev, s32 iftype); -static s32 __wl_cfg80211_up(struct wl_priv *wl); -static s32 __wl_cfg80211_down(struct wl_priv *wl); -static s32 wl_dongle_probecap(struct wl_priv *wl); -static void wl_init_conf(struct wl_conf *conf); +static bool brcmf_is_linkdown(struct brcmf_cfg80211_priv *cfg_priv, + const struct brcmf_event_msg *e); +static bool brcmf_is_linkup(struct brcmf_cfg80211_priv *cfg_priv, + const struct brcmf_event_msg *e); +static bool brcmf_is_nonetwork(struct brcmf_cfg80211_priv *cfg_priv, + const struct brcmf_event_msg *e); +static void brcmf_link_down(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_dongle_mode(struct net_device *ndev, s32 iftype); +static s32 __brcmf_cfg80211_up(struct brcmf_cfg80211_priv *cfg_priv); +static s32 __brcmf_cfg80211_down(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_dongle_probecap(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_init_conf(struct brcmf_cfg80211_conf *conf); /* ** dongle configuration utilities */ -#ifndef EMBEDDED_PLATFORM -static s32 wl_dongle_mode(struct net_device *ndev, s32 iftype); -static s32 wl_dongle_country(struct net_device *ndev, u8 ccode); -static s32 wl_dongle_up(struct net_device *ndev, u32 up); -static s32 wl_dongle_power(struct net_device *ndev, u32 power_mode); -static s32 wl_dongle_glom(struct net_device *ndev, u32 glom, - u32 dongle_align); -static s32 wl_dongle_offload(struct net_device *ndev, s32 arpoe, - s32 arp_ol); -static s32 wl_pattern_atoh(s8 *src, s8 *dst); -static s32 wl_dongle_filter(struct net_device *ndev, u32 filter_mode); -static s32 wl_update_wiphybands(struct wl_priv *wl); -#endif /* !EMBEDDED_PLATFORM */ - -static s32 wl_dongle_eventmsg(struct net_device *ndev); -static s32 wl_dongle_scantime(struct net_device *ndev, s32 scan_assoc_time, - s32 scan_unassoc_time, s32 scan_passive_time); -static s32 wl_config_dongle(struct wl_priv *wl, bool need_lock); -static s32 wl_dongle_roam(struct net_device *ndev, u32 roamvar, +static s32 brcmf_dongle_eventmsg(struct net_device *ndev); +static s32 brcmf_dongle_scantime(struct net_device *ndev, s32 scan_assoc_time, + s32 scan_unassoc_time, s32 scan_passive_time); +static s32 brcmf_config_dongle(struct brcmf_cfg80211_priv *cfg_priv, + bool need_lock); +static s32 brcmf_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout); /* ** iscan handler */ -static void wl_iscan_timer(unsigned long data); -static void wl_term_iscan(struct wl_priv *wl); -static s32 wl_init_iscan(struct wl_priv *wl); -static s32 wl_iscan_thread(void *data); -static s32 wl_dev_iovar_setbuf(struct net_device *dev, s8 *iovar, +static void brcmf_iscan_timer(unsigned long data); +static void brcmf_term_iscan(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_init_iscan(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_iscan_thread(void *data); +static s32 brcmf_dev_iovar_setbuf(struct net_device *dev, s8 *iovar, void *param, s32 paramlen, void *bufptr, s32 buflen); -static s32 wl_dev_iovar_getbuf(struct net_device *dev, s8 *iovar, +static s32 brcmf_dev_iovar_getbuf(struct net_device *dev, s8 *iovar, void *param, s32 paramlen, void *bufptr, s32 buflen); -static s32 wl_run_iscan(struct wl_iscan_ctrl *iscan, struct wlc_ssid *ssid, - u16 action); -static s32 wl_do_iscan(struct wl_priv *wl); -static s32 wl_wakeup_iscan(struct wl_iscan_ctrl *iscan); -static s32 wl_invoke_iscan(struct wl_priv *wl); -static s32 wl_get_iscan_results(struct wl_iscan_ctrl *iscan, u32 *status, - struct wl_scan_results **bss_list); -static void wl_notify_iscan_complete(struct wl_iscan_ctrl *iscan, bool aborted); -static void wl_init_iscan_eloop(struct wl_iscan_eloop *el); -static s32 wl_iscan_done(struct wl_priv *wl); -static s32 wl_iscan_pending(struct wl_priv *wl); -static s32 wl_iscan_inprogress(struct wl_priv *wl); -static s32 wl_iscan_aborted(struct wl_priv *wl); - -/* -** fw/nvram downloading handler -*/ -static void wl_init_fw(struct wl_fw_ctrl *fw); +static s32 brcmf_run_iscan(struct brcmf_cfg80211_iscan_ctrl *iscan, + struct brcmf_ssid *ssid, u16 action); +static s32 brcmf_do_iscan(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_wakeup_iscan(struct brcmf_cfg80211_iscan_ctrl *iscan); +static s32 brcmf_invoke_iscan(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_get_iscan_results(struct brcmf_cfg80211_iscan_ctrl *iscan, + u32 *status, + struct brcmf_scan_results **bss_list); +static void brcmf_notify_iscan_complete(struct brcmf_cfg80211_iscan_ctrl *iscan, + bool aborted); +static void brcmf_init_iscan_eloop(struct brcmf_cfg80211_iscan_eloop *el); +static s32 brcmf_iscan_done(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_iscan_pending(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_iscan_inprogress(struct brcmf_cfg80211_priv *cfg_priv); +static s32 brcmf_iscan_aborted(struct brcmf_cfg80211_priv *cfg_priv); /* * find most significant bit set */ -static __used u32 wl_find_msb(u16 bit16); +static __used u32 brcmf_find_msb(u16 bit16); /* * update pmklist to dongle */ -static __used s32 wl_update_pmklist(struct net_device *dev, - struct wl_pmk_list *pmk_list, s32 err); +static __used s32 brcmf_update_pmklist(struct net_device *dev, + struct brcmf_cfg80211_pmk_list *pmk_list, + s32 err); -static void wl_set_mpc(struct net_device *ndev, int mpc); +static void brcmf_set_mpc(struct net_device *ndev, int mpc); /* * debufs support */ -static int wl_debugfs_add_netdev_params(struct wl_priv *wl); -static void wl_debugfs_remove_netdev(struct wl_priv *wl); +static int +brcmf_debugfs_add_netdev_params(struct brcmf_cfg80211_priv *cfg_priv); +static void brcmf_debugfs_remove_netdev(struct brcmf_cfg80211_priv *cfg_priv); -#define WL_PRIV_GET() \ +#define WL_PRIV_GET() \ ({ \ - struct wl_iface *ci; \ - if (unlikely(!(wl_cfg80211_dev && \ - (ci = wl_get_drvdata(wl_cfg80211_dev))))) { \ + struct brcmf_cfg80211_iface *ci = brcmf_get_drvdata(cfg80211_dev); \ + if (unlikely(!ci)) { \ WL_ERR("wl_cfg80211_dev is unavailable\n"); \ BUG(); \ - } \ - ci_to_wl(ci); \ + } \ + ci->cfg_priv; \ }) #define CHECK_SYS_UP() \ do { \ - struct wl_priv *wl = wiphy_to_wl(wiphy); \ - if (unlikely(!test_bit(WL_STATUS_READY, &wl->status))) { \ + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); \ + if (unlikely(!test_bit(WL_STATUS_READY, &cfg_priv->status))) { \ WL_INFO("device is not ready : status (%d)\n", \ - (int)wl->status); \ + (int)cfg_priv->status); \ return -EIO; \ } \ } while (0) -extern int dhd_wait_pend8021x(struct net_device *dev); #define CHAN2G(_channel, _freq, _flags) { \ .band = IEEE80211_BAND_2GHZ, \ .center_freq = (_freq), \ @@ -373,18 +362,18 @@ extern int dhd_wait_pend8021x(struct net_device *dev); } static struct ieee80211_rate __wl_rates[] = { - RATETAB_ENT(WLC_RATE_1M, 0), - RATETAB_ENT(WLC_RATE_2M, IEEE80211_RATE_SHORT_PREAMBLE), - RATETAB_ENT(WLC_RATE_5M5, IEEE80211_RATE_SHORT_PREAMBLE), - RATETAB_ENT(WLC_RATE_11M, IEEE80211_RATE_SHORT_PREAMBLE), - RATETAB_ENT(WLC_RATE_6M, 0), - RATETAB_ENT(WLC_RATE_9M, 0), - RATETAB_ENT(WLC_RATE_12M, 0), - RATETAB_ENT(WLC_RATE_18M, 0), - RATETAB_ENT(WLC_RATE_24M, 0), - RATETAB_ENT(WLC_RATE_36M, 0), - RATETAB_ENT(WLC_RATE_48M, 0), - RATETAB_ENT(WLC_RATE_54M, 0), + RATETAB_ENT(BRCM_RATE_1M, 0), + RATETAB_ENT(BRCM_RATE_2M, IEEE80211_RATE_SHORT_PREAMBLE), + RATETAB_ENT(BRCM_RATE_5M5, IEEE80211_RATE_SHORT_PREAMBLE), + RATETAB_ENT(BRCM_RATE_11M, IEEE80211_RATE_SHORT_PREAMBLE), + RATETAB_ENT(BRCM_RATE_6M, 0), + RATETAB_ENT(BRCM_RATE_9M, 0), + RATETAB_ENT(BRCM_RATE_12M, 0), + RATETAB_ENT(BRCM_RATE_18M, 0), + RATETAB_ENT(BRCM_RATE_24M, 0), + RATETAB_ENT(BRCM_RATE_36M, 0), + RATETAB_ENT(BRCM_RATE_48M, 0), + RATETAB_ENT(BRCM_RATE_54M, 0), }; #define wl_a_rates (__wl_rates + 4) @@ -521,7 +510,7 @@ static const u32 __wl_cipher_suites[] = { WLAN_CIPHER_SUITE_AES_CMAC, }; -static void swap_key_from_BE(struct wl_wsec_key *key) +static void swap_key_from_BE(struct brcmf_wsec_key *key) { key->index = cpu_to_le32(key->index); key->len = cpu_to_le32(key->len); @@ -532,7 +521,7 @@ static void swap_key_from_BE(struct wl_wsec_key *key) key->iv_initialized = cpu_to_le32(key->iv_initialized); } -static void swap_key_to_BE(struct wl_wsec_key *key) +static void swap_key_to_BE(struct brcmf_wsec_key *key) { key->index = le32_to_cpu(key->index); key->len = le32_to_cpu(key->len); @@ -544,10 +533,10 @@ static void swap_key_to_BE(struct wl_wsec_key *key) } static s32 -wl_dev_ioctl(struct net_device *dev, u32 cmd, void *arg, u32 len) +brcmf_dev_ioctl(struct net_device *dev, u32 cmd, void *arg, u32 len) { struct ifreq ifr; - struct wl_ioctl ioc; + struct brcmf_ioctl ioc; mm_segment_t fs; s32 err = 0; @@ -567,11 +556,11 @@ wl_dev_ioctl(struct net_device *dev, u32 cmd, void *arg, u32 len) } static s32 -wl_cfg80211_change_iface(struct wiphy *wiphy, struct net_device *ndev, +brcmf_cfg80211_change_iface(struct wiphy *wiphy, struct net_device *ndev, enum nl80211_iftype type, u32 *flags, struct vif_params *params) { - struct wl_priv *wl = wiphy_to_wl(wiphy); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); struct wireless_dev *wdev; s32 infra = 0; s32 err = 0; @@ -586,11 +575,11 @@ wl_cfg80211_change_iface(struct wiphy *wiphy, struct net_device *ndev, type); return -EOPNOTSUPP; case NL80211_IFTYPE_ADHOC: - wl->conf->mode = WL_MODE_IBSS; + cfg_priv->conf->mode = WL_MODE_IBSS; infra = 0; break; case NL80211_IFTYPE_STATION: - wl->conf->mode = WL_MODE_BSS; + cfg_priv->conf->mode = WL_MODE_BSS; infra = 1; break; default: @@ -599,7 +588,7 @@ wl_cfg80211_change_iface(struct wiphy *wiphy, struct net_device *ndev, } infra = cpu_to_le32(infra); - err = wl_dev_ioctl(ndev, WLC_SET_INFRA, &infra, sizeof(infra)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_INFRA, &infra, sizeof(infra)); if (unlikely(err)) { WL_ERR("WLC_SET_INFRA error (%d)\n", err); err = -EAGAIN; @@ -609,7 +598,7 @@ wl_cfg80211_change_iface(struct wiphy *wiphy, struct net_device *ndev, } WL_INFO("IF Type = %s\n", - (wl->conf->mode == WL_MODE_IBSS) ? "Adhoc" : "Infra"); + (cfg_priv->conf->mode == WL_MODE_IBSS) ? "Adhoc" : "Infra"); done: WL_TRACE("Exit\n"); @@ -617,7 +606,8 @@ done: return err; } -static void wl_iscan_prep(struct wl_scan_params *params, struct wlc_ssid *ssid) +static void wl_iscan_prep(struct brcmf_scan_params *params, + struct brcmf_ssid *ssid) { memcpy(params->bssid, ether_bcast, ETH_ALEN); params->bss_type = DOT11_BSSTYPE_ANY; @@ -633,58 +623,59 @@ static void wl_iscan_prep(struct wl_scan_params *params, struct wlc_ssid *ssid) params->passive_time = cpu_to_le32(params->passive_time); params->home_time = cpu_to_le32(params->home_time); if (ssid && ssid->SSID_len) - memcpy(¶ms->ssid, ssid, sizeof(wlc_ssid_t)); + memcpy(¶ms->ssid, ssid, sizeof(struct brcmf_ssid)); } static s32 -wl_dev_iovar_setbuf(struct net_device *dev, s8 * iovar, void *param, +brcmf_dev_iovar_setbuf(struct net_device *dev, s8 * iovar, void *param, s32 paramlen, void *bufptr, s32 buflen) { s32 iolen; - iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen); + iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen); BUG_ON(!iolen); - return wl_dev_ioctl(dev, WLC_SET_VAR, bufptr, iolen); + return brcmf_dev_ioctl(dev, BRCMF_C_SET_VAR, bufptr, iolen); } static s32 -wl_dev_iovar_getbuf(struct net_device *dev, s8 * iovar, void *param, +brcmf_dev_iovar_getbuf(struct net_device *dev, s8 * iovar, void *param, s32 paramlen, void *bufptr, s32 buflen) { s32 iolen; - iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen); + iolen = brcmu_mkiovar(iovar, param, paramlen, bufptr, buflen); BUG_ON(!iolen); - return wl_dev_ioctl(dev, WLC_GET_VAR, bufptr, buflen); + return brcmf_dev_ioctl(dev, BRCMF_C_GET_VAR, bufptr, buflen); } static s32 -wl_run_iscan(struct wl_iscan_ctrl *iscan, struct wlc_ssid *ssid, u16 action) +brcmf_run_iscan(struct brcmf_cfg80211_iscan_ctrl *iscan, + struct brcmf_ssid *ssid, u16 action) { - s32 params_size = - (WL_SCAN_PARAMS_FIXED_SIZE + offsetof(wl_iscan_params_t, params)); - struct wl_iscan_params *params; + s32 params_size = (BRCMF_SCAN_PARAMS_FIXED_SIZE + + offsetof(struct brcmf_iscan_params, params)); + struct brcmf_iscan_params *params; s32 err = 0; if (ssid && ssid->SSID_len) - params_size += sizeof(struct wlc_ssid); + params_size += sizeof(struct brcmf_ssid); params = kzalloc(params_size, GFP_KERNEL); if (unlikely(!params)) return -ENOMEM; - BUG_ON(params_size >= WLC_IOCTL_SMLEN); + BUG_ON(params_size >= BRCMF_C_IOCTL_SMLEN); wl_iscan_prep(¶ms->params, ssid); - params->version = cpu_to_le32(ISCAN_REQ_VERSION); + params->version = cpu_to_le32(BRCMF_ISCAN_REQ_VERSION); params->action = cpu_to_le16(action); params->scan_duration = cpu_to_le16(0); - /* params_size += offsetof(wl_iscan_params_t, params); */ - err = wl_dev_iovar_setbuf(iscan->dev, "iscan", params, params_size, - iscan->ioctl_buf, WLC_IOCTL_SMLEN); + /* params_size += offsetof(struct brcmf_iscan_params, params); */ + err = brcmf_dev_iovar_setbuf(iscan->dev, "iscan", params, params_size, + iscan->ioctl_buf, BRCMF_C_IOCTL_SMLEN); if (unlikely(err)) { if (err == -EBUSY) { WL_INFO("system busy : iscan canceled\n"); @@ -696,11 +687,11 @@ wl_run_iscan(struct wl_iscan_ctrl *iscan, struct wlc_ssid *ssid, u16 action) return err; } -static s32 wl_do_iscan(struct wl_priv *wl) +static s32 brcmf_do_iscan(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_iscan_ctrl *iscan = wl_to_iscan(wl); - struct net_device *ndev = wl_to_ndev(wl); - struct wlc_ssid ssid; + struct brcmf_cfg80211_iscan_ctrl *iscan = cfg_to_iscan(cfg_priv); + struct net_device *ndev = cfg_to_ndev(cfg_priv); + struct brcmf_ssid ssid; s32 passive_scan; s32 err = 0; @@ -709,16 +700,16 @@ static s32 wl_do_iscan(struct wl_priv *wl) iscan->state = WL_ISCAN_STATE_SCANING; - passive_scan = wl->active_scan ? 0 : 1; - err = wl_dev_ioctl(wl_to_ndev(wl), WLC_SET_PASSIVE_SCAN, + passive_scan = cfg_priv->active_scan ? 0 : 1; + err = brcmf_dev_ioctl(cfg_to_ndev(cfg_priv), BRCMF_C_SET_PASSIVE_SCAN, &passive_scan, sizeof(passive_scan)); if (unlikely(err)) { WL_ERR("error (%d)\n", err); return err; } - wl_set_mpc(ndev, 0); - wl->iscan_kickstart = true; - wl_run_iscan(iscan, &ssid, WL_SCAN_ACTION_START); + brcmf_set_mpc(ndev, 0); + cfg_priv->iscan_kickstart = true; + brcmf_run_iscan(iscan, &ssid, BRCMF_SCAN_ACTION_START); mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000); iscan->timer_on = 1; @@ -726,30 +717,30 @@ static s32 wl_do_iscan(struct wl_priv *wl) } static s32 -__wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, +__brcmf_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_scan_request *request, struct cfg80211_ssid *this_ssid) { - struct wl_priv *wl = ndev_to_wl(ndev); + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(ndev); struct cfg80211_ssid *ssids; - struct wl_scan_req *sr = wl_to_sr(wl); + struct brcmf_cfg80211_scan_req *sr = cfg_priv->scan_req_int; s32 passive_scan; bool iscan_req; bool spec_scan; s32 err = 0; - if (unlikely(test_bit(WL_STATUS_SCANNING, &wl->status))) { - WL_ERR("Scanning already : status (%d)\n", (int)wl->status); + if (unlikely(test_bit(WL_STATUS_SCANNING, &cfg_priv->status))) { + WL_ERR("Scanning already : status (%lu)\n", cfg_priv->status); return -EAGAIN; } - if (unlikely(test_bit(WL_STATUS_SCAN_ABORTING, &wl->status))) { - WL_ERR("Scanning being aborted : status (%d)\n", - (int)wl->status); + if (unlikely(test_bit(WL_STATUS_SCAN_ABORTING, &cfg_priv->status))) { + WL_ERR("Scanning being aborted : status (%lu)\n", + cfg_priv->status); return -EAGAIN; } - if (test_bit(WL_STATUS_CONNECTING, &wl->status)) { - WL_ERR("Connecting : status (%d)\n", - (int)wl->status); + if (test_bit(WL_STATUS_CONNECTING, &cfg_priv->status)) { + WL_ERR("Connecting : status (%lu)\n", + cfg_priv->status); return -EAGAIN; } @@ -758,7 +749,7 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, if (request) { /* scan bss */ ssids = request->ssids; - if (wl->iscan_on && (!ssids || !ssids->ssid_len)) + if (cfg_priv->iscan_on && (!ssids || !ssids->ssid_len)) iscan_req = true; } else { /* scan in ibss */ @@ -766,10 +757,10 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, ssids = this_ssid; } - wl->scan_request = request; - set_bit(WL_STATUS_SCANNING, &wl->status); + cfg_priv->scan_request = request; + set_bit(WL_STATUS_SCANNING, &cfg_priv->status); if (iscan_req) { - err = wl_do_iscan(wl); + err = brcmf_do_iscan(cfg_priv); if (likely(!err)) return err; else @@ -788,15 +779,15 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, WL_SCAN("Broadcast scan\n"); } - passive_scan = wl->active_scan ? 0 : 1; - err = wl_dev_ioctl(ndev, WLC_SET_PASSIVE_SCAN, + passive_scan = cfg_priv->active_scan ? 0 : 1; + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_PASSIVE_SCAN, &passive_scan, sizeof(passive_scan)); if (unlikely(err)) { WL_ERR("WLC_SET_PASSIVE_SCAN error (%d)\n", err); goto scan_out; } - wl_set_mpc(ndev, 0); - err = wl_dev_ioctl(ndev, WLC_SCAN, &sr->ssid, + brcmf_set_mpc(ndev, 0); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SCAN, &sr->ssid, sizeof(sr->ssid)); if (err) { if (err == -EBUSY) { @@ -805,7 +796,7 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, } else { WL_ERR("WLC_SCAN error (%d)\n", err); } - wl_set_mpc(ndev, 1); + brcmf_set_mpc(ndev, 1); goto scan_out; } } @@ -813,13 +804,13 @@ __wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, return 0; scan_out: - clear_bit(WL_STATUS_SCANNING, &wl->status); - wl->scan_request = NULL; + clear_bit(WL_STATUS_SCANNING, &cfg_priv->status); + cfg_priv->scan_request = NULL; return err; } static s32 -wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, +brcmf_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, struct cfg80211_scan_request *request) { s32 err = 0; @@ -828,7 +819,7 @@ wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, CHECK_SYS_UP(); - err = __wl_cfg80211_scan(wiphy, ndev, request, NULL); + err = __brcmf_cfg80211_scan(wiphy, ndev, request, NULL); if (unlikely(err)) WL_ERR("scan error (%d)\n", err); @@ -836,17 +827,18 @@ wl_cfg80211_scan(struct wiphy *wiphy, struct net_device *ndev, return err; } -static s32 wl_dev_intvar_set(struct net_device *dev, s8 *name, s32 val) +static s32 brcmf_dev_intvar_set(struct net_device *dev, s8 *name, s32 val) { - s8 buf[WLC_IOCTL_SMLEN]; + s8 buf[BRCMF_C_IOCTL_SMLEN]; u32 len; s32 err = 0; val = cpu_to_le32(val); - len = bcm_mkiovar(name, (char *)(&val), sizeof(val), buf, sizeof(buf)); + len = brcmu_mkiovar(name, (char *)(&val), sizeof(val), buf, + sizeof(buf)); BUG_ON(!len); - err = wl_dev_ioctl(dev, WLC_SET_VAR, buf, len); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_VAR, buf, len); if (unlikely(err)) WL_ERR("error (%d)\n", err); @@ -854,10 +846,10 @@ static s32 wl_dev_intvar_set(struct net_device *dev, s8 *name, s32 val) } static s32 -wl_dev_intvar_get(struct net_device *dev, s8 *name, s32 *retval) +brcmf_dev_intvar_get(struct net_device *dev, s8 *name, s32 *retval) { union { - s8 buf[WLC_IOCTL_SMLEN]; + s8 buf[BRCMF_C_IOCTL_SMLEN]; s32 val; } var; u32 len; @@ -865,10 +857,10 @@ wl_dev_intvar_get(struct net_device *dev, s8 *name, s32 *retval) s32 err = 0; len = - bcm_mkiovar(name, (char *)(&data_null), 0, (char *)(&var), + brcmu_mkiovar(name, (char *)(&data_null), 0, (char *)(&var), sizeof(var.buf)); BUG_ON(!len); - err = wl_dev_ioctl(dev, WLC_GET_VAR, &var, len); + err = brcmf_dev_ioctl(dev, BRCMF_C_GET_VAR, &var, len); if (unlikely(err)) WL_ERR("error (%d)\n", err); @@ -877,35 +869,35 @@ wl_dev_intvar_get(struct net_device *dev, s8 *name, s32 *retval) return err; } -static s32 wl_set_rts(struct net_device *dev, u32 rts_threshold) +static s32 brcmf_set_rts(struct net_device *dev, u32 rts_threshold) { s32 err = 0; - err = wl_dev_intvar_set(dev, "rtsthresh", rts_threshold); + err = brcmf_dev_intvar_set(dev, "rtsthresh", rts_threshold); if (unlikely(err)) WL_ERR("Error (%d)\n", err); return err; } -static s32 wl_set_frag(struct net_device *dev, u32 frag_threshold) +static s32 brcmf_set_frag(struct net_device *dev, u32 frag_threshold) { s32 err = 0; - err = wl_dev_intvar_set(dev, "fragthresh", frag_threshold); + err = brcmf_dev_intvar_set(dev, "fragthresh", frag_threshold); if (unlikely(err)) WL_ERR("Error (%d)\n", err); return err; } -static s32 wl_set_retry(struct net_device *dev, u32 retry, bool l) +static s32 brcmf_set_retry(struct net_device *dev, u32 retry, bool l) { s32 err = 0; - u32 cmd = (l ? WLC_SET_LRL : WLC_SET_SRL); + u32 cmd = (l ? BRCM_SET_LRL : BRCM_SET_SRL); retry = cpu_to_le32(retry); - err = wl_dev_ioctl(dev, cmd, &retry, sizeof(retry)); + err = brcmf_dev_ioctl(dev, cmd, &retry, sizeof(retry)); if (unlikely(err)) { WL_ERR("cmd (%d) , error (%d)\n", cmd, err); return err; @@ -913,40 +905,40 @@ static s32 wl_set_retry(struct net_device *dev, u32 retry, bool l) return err; } -static s32 wl_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed) +static s32 brcmf_cfg80211_set_wiphy_params(struct wiphy *wiphy, u32 changed) { - struct wl_priv *wl = wiphy_to_wl(wiphy); - struct net_device *ndev = wl_to_ndev(wl); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct net_device *ndev = cfg_to_ndev(cfg_priv); s32 err = 0; WL_TRACE("Enter\n"); CHECK_SYS_UP(); if (changed & WIPHY_PARAM_RTS_THRESHOLD && - (wl->conf->rts_threshold != wiphy->rts_threshold)) { - wl->conf->rts_threshold = wiphy->rts_threshold; - err = wl_set_rts(ndev, wl->conf->rts_threshold); + (cfg_priv->conf->rts_threshold != wiphy->rts_threshold)) { + cfg_priv->conf->rts_threshold = wiphy->rts_threshold; + err = brcmf_set_rts(ndev, cfg_priv->conf->rts_threshold); if (!err) goto done; } if (changed & WIPHY_PARAM_FRAG_THRESHOLD && - (wl->conf->frag_threshold != wiphy->frag_threshold)) { - wl->conf->frag_threshold = wiphy->frag_threshold; - err = wl_set_frag(ndev, wl->conf->frag_threshold); + (cfg_priv->conf->frag_threshold != wiphy->frag_threshold)) { + cfg_priv->conf->frag_threshold = wiphy->frag_threshold; + err = brcmf_set_frag(ndev, cfg_priv->conf->frag_threshold); if (!err) goto done; } if (changed & WIPHY_PARAM_RETRY_LONG - && (wl->conf->retry_long != wiphy->retry_long)) { - wl->conf->retry_long = wiphy->retry_long; - err = wl_set_retry(ndev, wl->conf->retry_long, true); + && (cfg_priv->conf->retry_long != wiphy->retry_long)) { + cfg_priv->conf->retry_long = wiphy->retry_long; + err = brcmf_set_retry(ndev, cfg_priv->conf->retry_long, true); if (!err) goto done; } if (changed & WIPHY_PARAM_RETRY_SHORT - && (wl->conf->retry_short != wiphy->retry_short)) { - wl->conf->retry_short = wiphy->retry_short; - err = wl_set_retry(ndev, wl->conf->retry_short, false); + && (cfg_priv->conf->retry_short != wiphy->retry_short)) { + cfg_priv->conf->retry_short = wiphy->retry_short; + err = brcmf_set_retry(ndev, cfg_priv->conf->retry_short, false); if (!err) goto done; } @@ -957,11 +949,11 @@ done: } static s32 -wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, struct cfg80211_ibss_params *params) { - struct wl_priv *wl = wiphy_to_wl(wiphy); - struct wl_join_params join_params; + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct brcmf_join_params join_params; size_t join_params_size = 0; s32 err = 0; s32 wsec = 0; @@ -977,6 +969,8 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, return -EOPNOTSUPP; } + set_bit(WL_STATUS_CONNECTING, &cfg_priv->status); + if (params->bssid) WL_CONN("BSSID: %02X %02X %02X %02X %02X %02X\n", params->bssid[0], params->bssid[1], params->bssid[2], @@ -1018,7 +1012,7 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, if (params->privacy) wsec |= WEP_ENABLED; - err = wl_dev_intvar_set(dev, "wsec", wsec); + err = brcmf_dev_intvar_set(dev, "wsec", wsec); if (unlikely(err)) { WL_ERR("wsec failed (%d)\n", err); goto done; @@ -1030,14 +1024,14 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, else bcnprd = cpu_to_le32(100); - err = wl_dev_ioctl(dev, WLC_SET_BCNPRD, &bcnprd, sizeof(bcnprd)); + err = brcmf_dev_ioctl(dev, BRCM_SET_BCNPRD, &bcnprd, sizeof(bcnprd)); if (unlikely(err)) { WL_ERR("WLC_SET_BCNPRD failed (%d)\n", err); goto done; } /* Configure required join parameter */ - memset(&join_params, 0, sizeof(wl_join_params_t)); + memset(&join_params, 0, sizeof(struct brcmf_join_params)); /* SSID */ join_params.ssid.SSID_len = @@ -1045,67 +1039,69 @@ wl_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev, memcpy(join_params.ssid.SSID, params->ssid, join_params.ssid.SSID_len); join_params.ssid.SSID_len = cpu_to_le32(join_params.ssid.SSID_len); join_params_size = sizeof(join_params.ssid); - wl_update_prof(wl, NULL, &join_params.ssid, WL_PROF_SSID); + brcmf_update_prof(cfg_priv, NULL, &join_params.ssid, WL_PROF_SSID); /* BSSID */ if (params->bssid) { memcpy(join_params.params.bssid, params->bssid, ETH_ALEN); - join_params_size = - sizeof(join_params.ssid) + WL_ASSOC_PARAMS_FIXED_SIZE; + join_params_size = sizeof(join_params.ssid) + + BRCMF_ASSOC_PARAMS_FIXED_SIZE; } else { memcpy(join_params.params.bssid, ether_bcast, ETH_ALEN); } - wl_update_prof(wl, NULL, &join_params.params.bssid, WL_PROF_BSSID); + brcmf_update_prof(cfg_priv, NULL, + &join_params.params.bssid, WL_PROF_BSSID); /* Channel */ if (params->channel) { u32 target_channel; - wl->channel = + cfg_priv->channel = ieee80211_frequency_to_channel( params->channel->center_freq); if (params->channel_fixed) { /* adding chanspec */ - wl_ch_to_chanspec(wl->channel, + brcmf_ch_to_chanspec(cfg_priv->channel, &join_params, &join_params_size); } /* set channel for starter */ - target_channel = cpu_to_le32(wl->channel); - err = wl_dev_ioctl(dev, WLC_SET_CHANNEL, + target_channel = cpu_to_le32(cfg_priv->channel); + err = brcmf_dev_ioctl(dev, BRCM_SET_CHANNEL, &target_channel, sizeof(target_channel)); if (unlikely(err)) { WL_ERR("WLC_SET_CHANNEL failed (%d)\n", err); goto done; } } else - wl->channel = 0; + cfg_priv->channel = 0; - wl->ibss_starter = false; + cfg_priv->ibss_starter = false; - err = wl_dev_ioctl(dev, WLC_SET_SSID, &join_params, join_params_size); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_SSID, + &join_params, join_params_size); if (unlikely(err)) { WL_ERR("WLC_SET_SSID failed (%d)\n", err); goto done; } - set_bit(WL_STATUS_CONNECTING, &wl->status); - done: + if (err) + clear_bit(WL_STATUS_CONNECTING, &cfg_priv->status); WL_TRACE("Exit\n"); return err; } -static s32 wl_cfg80211_leave_ibss(struct wiphy *wiphy, struct net_device *dev) +static s32 brcmf_cfg80211_leave_ibss(struct wiphy *wiphy, struct net_device *dev) { - struct wl_priv *wl = wiphy_to_wl(wiphy); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); s32 err = 0; WL_TRACE("Enter\n"); CHECK_SYS_UP(); - wl_link_down(wl); + brcmf_link_down(cfg_priv); WL_TRACE("Exit\n"); @@ -1113,10 +1109,10 @@ static s32 wl_cfg80211_leave_ibss(struct wiphy *wiphy, struct net_device *dev) } static s32 -wl_set_wpa_version(struct net_device *dev, struct cfg80211_connect_params *sme) +brcmf_set_wpa_version(struct net_device *dev, struct cfg80211_connect_params *sme) { - struct wl_priv *wl = ndev_to_wl(dev); - struct wl_security *sec; + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(dev); + struct brcmf_cfg80211_security *sec; s32 val = 0; s32 err = 0; @@ -1127,21 +1123,21 @@ wl_set_wpa_version(struct net_device *dev, struct cfg80211_connect_params *sme) else val = WPA_AUTH_DISABLED; WL_CONN("setting wpa_auth to 0x%0x\n", val); - err = wl_dev_intvar_set(dev, "wpa_auth", val); + err = brcmf_dev_intvar_set(dev, "wpa_auth", val); if (unlikely(err)) { WL_ERR("set wpa_auth failed (%d)\n", err); return err; } - sec = wl_read_prof(wl, WL_PROF_SEC); + sec = brcmf_read_prof(cfg_priv, WL_PROF_SEC); sec->wpa_versions = sme->crypto.wpa_versions; return err; } static s32 -wl_set_auth_type(struct net_device *dev, struct cfg80211_connect_params *sme) +brcmf_set_auth_type(struct net_device *dev, struct cfg80211_connect_params *sme) { - struct wl_priv *wl = ndev_to_wl(dev); - struct wl_security *sec; + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(dev); + struct brcmf_cfg80211_security *sec; s32 val = 0; s32 err = 0; @@ -1166,21 +1162,21 @@ wl_set_auth_type(struct net_device *dev, struct cfg80211_connect_params *sme) break; } - err = wl_dev_intvar_set(dev, "auth", val); + err = brcmf_dev_intvar_set(dev, "auth", val); if (unlikely(err)) { WL_ERR("set auth failed (%d)\n", err); return err; } - sec = wl_read_prof(wl, WL_PROF_SEC); + sec = brcmf_read_prof(cfg_priv, WL_PROF_SEC); sec->auth_type = sme->auth_type; return err; } static s32 -wl_set_set_cipher(struct net_device *dev, struct cfg80211_connect_params *sme) +brcmf_set_set_cipher(struct net_device *dev, struct cfg80211_connect_params *sme) { - struct wl_priv *wl = ndev_to_wl(dev); - struct wl_security *sec; + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(dev); + struct brcmf_cfg80211_security *sec; s32 pval = 0; s32 gval = 0; s32 err = 0; @@ -1229,13 +1225,13 @@ wl_set_set_cipher(struct net_device *dev, struct cfg80211_connect_params *sme) } WL_CONN("pval (%d) gval (%d)\n", pval, gval); - err = wl_dev_intvar_set(dev, "wsec", pval | gval); + err = brcmf_dev_intvar_set(dev, "wsec", pval | gval); if (unlikely(err)) { WL_ERR("error (%d)\n", err); return err; } - sec = wl_read_prof(wl, WL_PROF_SEC); + sec = brcmf_read_prof(cfg_priv, WL_PROF_SEC); sec->cipher_pairwise = sme->crypto.ciphers_pairwise[0]; sec->cipher_group = sme->crypto.cipher_group; @@ -1243,15 +1239,15 @@ wl_set_set_cipher(struct net_device *dev, struct cfg80211_connect_params *sme) } static s32 -wl_set_key_mgmt(struct net_device *dev, struct cfg80211_connect_params *sme) +brcmf_set_key_mgmt(struct net_device *dev, struct cfg80211_connect_params *sme) { - struct wl_priv *wl = ndev_to_wl(dev); - struct wl_security *sec; + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(dev); + struct brcmf_cfg80211_security *sec; s32 val = 0; s32 err = 0; if (sme->crypto.n_akm_suites) { - err = wl_dev_intvar_get(dev, "wpa_auth", &val); + err = brcmf_dev_intvar_get(dev, "wpa_auth", &val); if (unlikely(err)) { WL_ERR("could not get wpa_auth (%d)\n", err); return err; @@ -1285,31 +1281,31 @@ wl_set_key_mgmt(struct net_device *dev, struct cfg80211_connect_params *sme) } WL_CONN("setting wpa_auth to %d\n", val); - err = wl_dev_intvar_set(dev, "wpa_auth", val); + err = brcmf_dev_intvar_set(dev, "wpa_auth", val); if (unlikely(err)) { WL_ERR("could not set wpa_auth (%d)\n", err); return err; } } - sec = wl_read_prof(wl, WL_PROF_SEC); + sec = brcmf_read_prof(cfg_priv, WL_PROF_SEC); sec->wpa_auth = sme->crypto.akm_suites[0]; return err; } static s32 -wl_set_set_sharedkey(struct net_device *dev, +brcmf_set_set_sharedkey(struct net_device *dev, struct cfg80211_connect_params *sme) { - struct wl_priv *wl = ndev_to_wl(dev); - struct wl_security *sec; - struct wl_wsec_key key; + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(dev); + struct brcmf_cfg80211_security *sec; + struct brcmf_wsec_key key; s32 val; s32 err = 0; WL_CONN("key len (%d)\n", sme->key_len); if (sme->key_len) { - sec = wl_read_prof(wl, WL_PROF_SEC); + sec = brcmf_read_prof(cfg_priv, WL_PROF_SEC); WL_CONN("wpa_versions 0x%x cipher_pairwise 0x%x\n", sec->wpa_versions, sec->cipher_pairwise); if (! @@ -1325,7 +1321,7 @@ wl_set_set_sharedkey(struct net_device *dev, return -EINVAL; } memcpy(key.data, sme->key, key.len); - key.flags = WL_PRIMARY_KEY; + key.flags = BRCMF_PRIMARY_KEY; switch (sec->cipher_pairwise) { case WLAN_CIPHER_SUITE_WEP40: key.algo = CRYPTO_ALGO_WEP1; @@ -1343,7 +1339,7 @@ wl_set_set_sharedkey(struct net_device *dev, key.len, key.index, key.algo); WL_CONN("key \"%s\"\n", key.data); swap_key_from_BE(&key); - err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_KEY, &key, sizeof(key)); if (unlikely(err)) { WL_ERR("WLC_SET_KEY error (%d)\n", err); @@ -1352,7 +1348,7 @@ wl_set_set_sharedkey(struct net_device *dev, if (sec->auth_type == NL80211_AUTHTYPE_OPEN_SYSTEM) { WL_CONN("set auth_type to shared key\n"); val = 1; /* shared key */ - err = wl_dev_intvar_set(dev, "auth", val); + err = brcmf_dev_intvar_set(dev, "auth", val); if (unlikely(err)) { WL_ERR("set auth failed (%d)\n", err); return err; @@ -1364,12 +1360,12 @@ wl_set_set_sharedkey(struct net_device *dev, } static s32 -wl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev, struct cfg80211_connect_params *sme) { - struct wl_priv *wl = wiphy_to_wl(wiphy); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); struct ieee80211_channel *chan = sme->channel; - struct wl_join_params join_params; + struct brcmf_join_params join_params; size_t join_params_size; s32 err = 0; @@ -1382,37 +1378,49 @@ wl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev, return -EOPNOTSUPP; } + set_bit(WL_STATUS_CONNECTING, &cfg_priv->status); + if (chan) { - wl->channel = + cfg_priv->channel = ieee80211_frequency_to_channel(chan->center_freq); WL_CONN("channel (%d), center_req (%d)\n", - wl->channel, chan->center_freq); + cfg_priv->channel, chan->center_freq); } else - wl->channel = 0; + cfg_priv->channel = 0; WL_INFO("ie (%p), ie_len (%zd)\n", sme->ie, sme->ie_len); - err = wl_set_wpa_version(dev, sme); - if (unlikely(err)) - return err; + err = brcmf_set_wpa_version(dev, sme); + if (err) { + WL_ERR("wl_set_wpa_version failed (%d)\n", err); + goto done; + } - err = wl_set_auth_type(dev, sme); - if (unlikely(err)) - return err; + err = brcmf_set_auth_type(dev, sme); + if (err) { + WL_ERR("wl_set_auth_type failed (%d)\n", err); + goto done; + } - err = wl_set_set_cipher(dev, sme); - if (unlikely(err)) - return err; + err = brcmf_set_set_cipher(dev, sme); + if (err) { + WL_ERR("wl_set_set_cipher failed (%d)\n", err); + goto done; + } - err = wl_set_key_mgmt(dev, sme); - if (unlikely(err)) - return err; + err = brcmf_set_key_mgmt(dev, sme); + if (err) { + WL_ERR("wl_set_key_mgmt failed (%d)\n", err); + goto done; + } - err = wl_set_set_sharedkey(dev, sme); - if (unlikely(err)) - return err; + err = brcmf_set_set_sharedkey(dev, sme); + if (err) { + WL_ERR("wl_set_set_sharedkey failed (%d)\n", err); + goto done; + } - wl_update_prof(wl, NULL, sme->bssid, WL_PROF_BSSID); + brcmf_update_prof(cfg_priv, NULL, sme->bssid, WL_PROF_BSSID); /* ** Join with specific BSSID and cached SSID ** If SSID is zero join based on BSSID only @@ -1423,7 +1431,7 @@ wl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev, join_params.ssid.SSID_len = min(sizeof(join_params.ssid.SSID), sme->ssid_len); memcpy(&join_params.ssid.SSID, sme->ssid, join_params.ssid.SSID_len); join_params.ssid.SSID_len = cpu_to_le32(join_params.ssid.SSID_len); - wl_update_prof(wl, NULL, &join_params.ssid, WL_PROF_SSID); + brcmf_update_prof(cfg_priv, NULL, &join_params.ssid, WL_PROF_SSID); if (sme->bssid) memcpy(join_params.params.bssid, sme->bssid, ETH_ALEN); @@ -1435,52 +1443,54 @@ wl_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev, join_params.ssid.SSID, join_params.ssid.SSID_len); } - wl_ch_to_chanspec(wl->channel, &join_params, &join_params_size); - err = wl_dev_ioctl(dev, WLC_SET_SSID, &join_params, join_params_size); - if (unlikely(err)) { - WL_ERR("error (%d)\n", err); - return err; - } - set_bit(WL_STATUS_CONNECTING, &wl->status); + brcmf_ch_to_chanspec(cfg_priv->channel, + &join_params, &join_params_size); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_SSID, + &join_params, join_params_size); + if (err) + WL_ERR("WLC_SET_SSID failed (%d)\n", err); +done: + if (err) + clear_bit(WL_STATUS_CONNECTING, &cfg_priv->status); WL_TRACE("Exit\n"); return err; } static s32 -wl_cfg80211_disconnect(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_disconnect(struct wiphy *wiphy, struct net_device *dev, u16 reason_code) { - struct wl_priv *wl = wiphy_to_wl(wiphy); - scb_val_t scbval; + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct brcmf_scb_val scbval; s32 err = 0; WL_TRACE("Enter. Reason code = %d\n", reason_code); CHECK_SYS_UP(); - clear_bit(WL_STATUS_CONNECTED, &wl->status); + clear_bit(WL_STATUS_CONNECTED, &cfg_priv->status); scbval.val = reason_code; - memcpy(&scbval.ea, wl_read_prof(wl, WL_PROF_BSSID), ETH_ALEN); + memcpy(&scbval.ea, brcmf_read_prof(cfg_priv, WL_PROF_BSSID), ETH_ALEN); scbval.val = cpu_to_le32(scbval.val); - err = wl_dev_ioctl(dev, WLC_DISASSOC, &scbval, - sizeof(scb_val_t)); + err = brcmf_dev_ioctl(dev, BRCMF_C_DISASSOC, &scbval, + sizeof(struct brcmf_scb_val)); if (unlikely(err)) WL_ERR("error (%d)\n", err); - wl->link_up = false; + cfg_priv->link_up = false; WL_TRACE("Exit\n"); return err; } static s32 -wl_cfg80211_set_tx_power(struct wiphy *wiphy, +brcmf_cfg80211_set_tx_power(struct wiphy *wiphy, enum nl80211_tx_power_setting type, s32 dbm) { - struct wl_priv *wl = wiphy_to_wl(wiphy); - struct net_device *ndev = wl_to_ndev(wl); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct net_device *ndev = cfg_to_ndev(cfg_priv); u16 txpwrmw; s32 err = 0; s32 disable = 0; @@ -1509,7 +1519,7 @@ wl_cfg80211_set_tx_power(struct wiphy *wiphy, /* Make sure radio is off or on as far as software is concerned */ disable = WL_RADIO_SW_DISABLE << 16; disable = cpu_to_le32(disable); - err = wl_dev_ioctl(ndev, WLC_SET_RADIO, &disable, sizeof(disable)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_RADIO, &disable, sizeof(disable)); if (unlikely(err)) WL_ERR("WLC_SET_RADIO error (%d)\n", err); @@ -1517,21 +1527,21 @@ wl_cfg80211_set_tx_power(struct wiphy *wiphy, txpwrmw = 0xffff; else txpwrmw = (u16) dbm; - err = wl_dev_intvar_set(ndev, "qtxpower", - (s32) (bcm_mw_to_qdbm(txpwrmw))); + err = brcmf_dev_intvar_set(ndev, "qtxpower", + (s32) (brcmu_mw_to_qdbm(txpwrmw))); if (unlikely(err)) WL_ERR("qtxpower error (%d)\n", err); - wl->conf->tx_power = dbm; + cfg_priv->conf->tx_power = dbm; done: WL_TRACE("Exit\n"); return err; } -static s32 wl_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm) +static s32 brcmf_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm) { - struct wl_priv *wl = wiphy_to_wl(wiphy); - struct net_device *ndev = wl_to_ndev(wl); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct net_device *ndev = cfg_to_ndev(cfg_priv); s32 txpwrdbm; u8 result; s32 err = 0; @@ -1539,14 +1549,14 @@ static s32 wl_cfg80211_get_tx_power(struct wiphy *wiphy, s32 *dbm) WL_TRACE("Enter\n"); CHECK_SYS_UP(); - err = wl_dev_intvar_get(ndev, "qtxpower", &txpwrdbm); + err = brcmf_dev_intvar_get(ndev, "qtxpower", &txpwrdbm); if (unlikely(err)) { WL_ERR("error (%d)\n", err); goto done; } result = (u8) (txpwrdbm & ~WL_TXPWR_OVERRIDE); - *dbm = (s32) bcm_qdbm_to_mw(result); + *dbm = (s32) brcmu_qdbm_to_mw(result); done: WL_TRACE("Exit\n"); @@ -1554,7 +1564,7 @@ done: } static s32 -wl_cfg80211_config_default_key(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_config_default_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, bool unicast, bool multicast) { u32 index; @@ -1565,7 +1575,7 @@ wl_cfg80211_config_default_key(struct wiphy *wiphy, struct net_device *dev, WL_CONN("key index (%d)\n", key_idx); CHECK_SYS_UP(); - err = wl_dev_ioctl(dev, WLC_GET_WSEC, &wsec, sizeof(wsec)); + err = brcmf_dev_ioctl(dev, BRCMF_C_GET_WSEC, &wsec, sizeof(wsec)); if (unlikely(err)) { WL_ERR("WLC_GET_WSEC error (%d)\n", err); goto done; @@ -1576,7 +1586,7 @@ wl_cfg80211_config_default_key(struct wiphy *wiphy, struct net_device *dev, /* Just select a new current key */ index = (u32) key_idx; index = cpu_to_le32(index); - err = wl_dev_ioctl(dev, WLC_SET_KEY_PRIMARY, &index, + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_KEY_PRIMARY, &index, sizeof(index)); if (unlikely(err)) WL_ERR("error (%d)\n", err); @@ -1587,10 +1597,10 @@ done: } static s32 -wl_add_keyext(struct wiphy *wiphy, struct net_device *dev, +brcmf_add_keyext(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, const u8 *mac_addr, struct key_params *params) { - struct wl_wsec_key key; + struct brcmf_wsec_key key; s32 err = 0; memset(&key, 0, sizeof(key)); @@ -1604,7 +1614,7 @@ wl_add_keyext(struct wiphy *wiphy, struct net_device *dev, if (key.len == 0) { /* key delete */ swap_key_from_BE(&key); - err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, sizeof(key)); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_KEY, &key, sizeof(key)); if (unlikely(err)) { WL_ERR("key delete error (%d)\n", err); return err; @@ -1663,8 +1673,8 @@ wl_add_keyext(struct wiphy *wiphy, struct net_device *dev, } swap_key_from_BE(&key); - dhd_wait_pend8021x(dev); - err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, sizeof(key)); + brcmf_netdev_wait_pend8021x(dev); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_KEY, &key, sizeof(key)); if (unlikely(err)) { WL_ERR("WLC_SET_KEY error (%d)\n", err); return err; @@ -1674,11 +1684,11 @@ wl_add_keyext(struct wiphy *wiphy, struct net_device *dev, } static s32 -wl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, bool pairwise, const u8 *mac_addr, struct key_params *params) { - struct wl_wsec_key key; + struct brcmf_wsec_key key; s32 val; s32 wsec; s32 err = 0; @@ -1690,7 +1700,7 @@ wl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev, if (mac_addr) { WL_TRACE("Exit"); - return wl_add_keyext(wiphy, dev, key_idx, mac_addr, params); + return brcmf_add_keyext(wiphy, dev, key_idx, mac_addr, params); } memset(&key, 0, sizeof(key)); @@ -1704,7 +1714,7 @@ wl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev, } memcpy(key.data, params->key, key.len); - key.flags = WL_PRIMARY_KEY; + key.flags = BRCMF_PRIMARY_KEY; switch (params->cipher) { case WLAN_CIPHER_SUITE_WEP40: key.algo = CRYPTO_ALGO_WEP1; @@ -1737,21 +1747,21 @@ wl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev, /* Set the new key/index */ swap_key_from_BE(&key); - err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, sizeof(key)); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_KEY, &key, sizeof(key)); if (unlikely(err)) { WL_ERR("WLC_SET_KEY error (%d)\n", err); goto done; } val = WEP_ENABLED; - err = wl_dev_intvar_get(dev, "wsec", &wsec); + err = brcmf_dev_intvar_get(dev, "wsec", &wsec); if (unlikely(err)) { WL_ERR("get wsec error (%d)\n", err); goto done; } wsec &= ~(WEP_ENABLED); wsec |= val; - err = wl_dev_intvar_set(dev, "wsec", wsec); + err = brcmf_dev_intvar_set(dev, "wsec", wsec); if (unlikely(err)) { WL_ERR("set wsec error (%d)\n", err); goto done; @@ -1759,7 +1769,7 @@ wl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *dev, val = 1; /* assume shared key. otherwise 0 */ val = cpu_to_le32(val); - err = wl_dev_ioctl(dev, WLC_SET_AUTH, &val, sizeof(val)); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_AUTH, &val, sizeof(val)); if (unlikely(err)) WL_ERR("WLC_SET_AUTH error (%d)\n", err); done: @@ -1768,10 +1778,10 @@ done: } static s32 -wl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, bool pairwise, const u8 *mac_addr) { - struct wl_wsec_key key; + struct brcmf_wsec_key key; s32 err = 0; s32 val; s32 wsec; @@ -1781,13 +1791,13 @@ wl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev, memset(&key, 0, sizeof(key)); key.index = (u32) key_idx; - key.flags = WL_PRIMARY_KEY; + key.flags = BRCMF_PRIMARY_KEY; key.algo = CRYPTO_ALGO_OFF; WL_CONN("key index (%d)\n", key_idx); /* Set the new key/index */ swap_key_from_BE(&key); - err = wl_dev_ioctl(dev, WLC_SET_KEY, &key, sizeof(key)); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_KEY, &key, sizeof(key)); if (unlikely(err)) { if (err == -EINVAL) { if (key.index >= DOT11_MAX_DEFAULT_KEYS) @@ -1802,7 +1812,7 @@ wl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev, } val = 0; - err = wl_dev_intvar_get(dev, "wsec", &wsec); + err = brcmf_dev_intvar_get(dev, "wsec", &wsec); if (unlikely(err)) { WL_ERR("get wsec error (%d)\n", err); /* Ignore this error, may happen during DISASSOC */ @@ -1811,7 +1821,7 @@ wl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev, } wsec &= ~(WEP_ENABLED); wsec |= val; - err = wl_dev_intvar_set(dev, "wsec", wsec); + err = brcmf_dev_intvar_set(dev, "wsec", wsec); if (unlikely(err)) { WL_ERR("set wsec error (%d)\n", err); /* Ignore this error, may happen during DISASSOC */ @@ -1821,7 +1831,7 @@ wl_cfg80211_del_key(struct wiphy *wiphy, struct net_device *dev, val = 0; /* assume open key. otherwise 1 */ val = cpu_to_le32(val); - err = wl_dev_ioctl(dev, WLC_SET_AUTH, &val, sizeof(val)); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_AUTH, &val, sizeof(val)); if (unlikely(err)) { WL_ERR("WLC_SET_AUTH error (%d)\n", err); /* Ignore this error, may happen during DISASSOC */ @@ -1833,14 +1843,14 @@ done: } static s32 -wl_cfg80211_get_key(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_get_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx, bool pairwise, const u8 *mac_addr, void *cookie, void (*callback) (void *cookie, struct key_params * params)) { struct key_params params; - struct wl_wsec_key key; - struct wl_priv *wl = wiphy_to_wl(wiphy); - struct wl_security *sec; + struct brcmf_wsec_key key; + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct brcmf_cfg80211_security *sec; s32 wsec; s32 err = 0; @@ -1855,7 +1865,7 @@ wl_cfg80211_get_key(struct wiphy *wiphy, struct net_device *dev, params.key_len = (u8) min_t(u8, WLAN_MAX_KEY_LEN, key.len); memcpy(params.key, key.data, params.key_len); - err = wl_dev_ioctl(dev, WLC_GET_WSEC, &wsec, sizeof(wsec)); + err = brcmf_dev_ioctl(dev, BRCMF_C_GET_WSEC, &wsec, sizeof(wsec)); if (unlikely(err)) { WL_ERR("WLC_GET_WSEC error (%d)\n", err); /* Ignore this error, may happen during DISASSOC */ @@ -1865,7 +1875,7 @@ wl_cfg80211_get_key(struct wiphy *wiphy, struct net_device *dev, wsec = le32_to_cpu(wsec); switch (wsec) { case WEP_ENABLED: - sec = wl_read_prof(wl, WL_PROF_SEC); + sec = brcmf_read_prof(cfg_priv, WL_PROF_SEC); if (sec->cipher_pairwise & WLAN_CIPHER_SUITE_WEP40) { params.cipher = WLAN_CIPHER_SUITE_WEP40; WL_CONN("WLAN_CIPHER_SUITE_WEP40\n"); @@ -1895,7 +1905,7 @@ done: } static s32 -wl_cfg80211_config_default_mgmt_key(struct wiphy *wiphy, +brcmf_cfg80211_config_default_mgmt_key(struct wiphy *wiphy, struct net_device *dev, u8 key_idx) { WL_INFO("Not supported\n"); @@ -1905,15 +1915,15 @@ wl_cfg80211_config_default_mgmt_key(struct wiphy *wiphy, } static s32 -wl_cfg80211_get_station(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_get_station(struct wiphy *wiphy, struct net_device *dev, u8 *mac, struct station_info *sinfo) { - struct wl_priv *wl = wiphy_to_wl(wiphy); - scb_val_t scb_val; + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct brcmf_scb_val scb_val; int rssi; s32 rate; s32 err = 0; - u8 *bssid = wl_read_prof(wl, WL_PROF_BSSID); + u8 *bssid = brcmf_read_prof(cfg_priv, WL_PROF_BSSID); WL_TRACE("Enter\n"); CHECK_SYS_UP(); @@ -1930,7 +1940,7 @@ wl_cfg80211_get_station(struct wiphy *wiphy, struct net_device *dev, } /* Report the current tx rate */ - err = wl_dev_ioctl(dev, WLC_GET_RATE, &rate, sizeof(rate)); + err = brcmf_dev_ioctl(dev, BRCMF_C_GET_RATE, &rate, sizeof(rate)); if (err) { WL_ERR("Could not get rate (%d)\n", err); } else { @@ -1940,10 +1950,10 @@ wl_cfg80211_get_station(struct wiphy *wiphy, struct net_device *dev, WL_CONN("Rate %d Mbps\n", rate / 2); } - if (test_bit(WL_STATUS_CONNECTED, &wl->status)) { + if (test_bit(WL_STATUS_CONNECTED, &cfg_priv->status)) { scb_val.val = 0; - err = wl_dev_ioctl(dev, WLC_GET_RSSI, &scb_val, - sizeof(scb_val_t)); + err = brcmf_dev_ioctl(dev, BRCMF_C_GET_RSSI, &scb_val, + sizeof(struct brcmf_scb_val)); if (unlikely(err)) { WL_ERR("Could not get rssi (%d)\n", err); } @@ -1959,7 +1969,7 @@ done: } static s32 -wl_cfg80211_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev, bool enabled, s32 timeout) { s32 pm; @@ -1972,7 +1982,7 @@ wl_cfg80211_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev, pm = cpu_to_le32(pm); WL_INFO("power save %s\n", (pm ? "enabled" : "disabled")); - err = wl_dev_ioctl(dev, WLC_SET_PM, &pm, sizeof(pm)); + err = brcmf_dev_ioctl(dev, BRCMF_C_SET_PM, &pm, sizeof(pm)); if (unlikely(err)) { if (err == -ENODEV) WL_ERR("net_device is not ready yet\n"); @@ -1983,7 +1993,7 @@ wl_cfg80211_set_power_mgmt(struct wiphy *wiphy, struct net_device *dev, return err; } -static __used u32 wl_find_msb(u16 bit16) +static __used u32 brcmf_find_msb(u16 bit16) { u32 ret = 0; @@ -2011,7 +2021,7 @@ static __used u32 wl_find_msb(u16 bit16) } static s32 -wl_cfg80211_set_bitrate_mask(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_set_bitrate_mask(struct wiphy *wiphy, struct net_device *dev, const u8 *addr, const struct cfg80211_bitrate_mask *mask) { @@ -2028,7 +2038,7 @@ wl_cfg80211_set_bitrate_mask(struct wiphy *wiphy, struct net_device *dev, /* addr param is always NULL. ignore it */ /* Get current rateset */ - err = wl_dev_ioctl(dev, WLC_GET_CURR_RATESET, &rateset, + err = brcmf_dev_ioctl(dev, BRCM_GET_CURR_RATESET, &rateset, sizeof(rateset)); if (unlikely(err)) { WL_ERR("could not get current rateset (%d)\n", err); @@ -2037,9 +2047,9 @@ wl_cfg80211_set_bitrate_mask(struct wiphy *wiphy, struct net_device *dev, rateset.count = le32_to_cpu(rateset.count); - legacy = wl_find_msb(mask->control[IEEE80211_BAND_2GHZ].legacy); + legacy = brcmf_find_msb(mask->control[IEEE80211_BAND_2GHZ].legacy); if (!legacy) - legacy = wl_find_msb(mask->control[IEEE80211_BAND_5GHZ].legacy); + legacy = brcmf_find_msb(mask->control[IEEE80211_BAND_5GHZ].legacy); val = wl_g_rates[legacy - 1].bitrate * 100000; @@ -2057,8 +2067,8 @@ wl_cfg80211_set_bitrate_mask(struct wiphy *wiphy, struct net_device *dev, * Set rate override, * Since the is a/b/g-blind, both a/bg_rate are enforced. */ - err_bg = wl_dev_intvar_set(dev, "bg_rate", rate); - err_a = wl_dev_intvar_set(dev, "a_rate", rate); + err_bg = brcmf_dev_intvar_set(dev, "bg_rate", rate); + err_a = brcmf_dev_intvar_set(dev, "a_rate", rate); if (unlikely(err_bg && err_a)) { WL_ERR("could not set fixed rate (%d) (%d)\n", err_bg, err_a); err = err_bg | err_a; @@ -2069,10 +2079,9 @@ done: return err; } -static s32 wl_cfg80211_resume(struct wiphy *wiphy) +static s32 brcmf_cfg80211_resume(struct wiphy *wiphy) { - struct wl_priv *wl = wiphy_to_wl(wiphy); - struct net_device *ndev = wl_to_ndev(wl); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); /* * Check for WL_STATUS_READY before any function call which @@ -2082,23 +2091,21 @@ static s32 wl_cfg80211_resume(struct wiphy *wiphy) WL_TRACE("Enter\n"); #if defined(CONFIG_PM_SLEEP) - atomic_set(&dhd_mmc_suspend, false); + atomic_set(&brcmf_mmc_suspend, false); #endif /* defined(CONFIG_PM_SLEEP) */ - if (test_bit(WL_STATUS_READY, &wl->status)) { - /* Turn on Watchdog timer */ - wl_os_wd_timer(ndev, dhd_watchdog_ms); - wl_invoke_iscan(wiphy_to_wl(wiphy)); - } + if (test_bit(WL_STATUS_READY, &cfg_priv->status)) + brcmf_invoke_iscan(wiphy_to_cfg(wiphy)); WL_TRACE("Exit\n"); return 0; } -static s32 wl_cfg80211_suspend(struct wiphy *wiphy) +static s32 brcmf_cfg80211_suspend(struct wiphy *wiphy, + struct cfg80211_wowlan *wow) { - struct wl_priv *wl = wiphy_to_wl(wiphy); - struct net_device *ndev = wl_to_ndev(wl); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct net_device *ndev = cfg_to_ndev(cfg_priv); WL_TRACE("Enter\n"); @@ -2112,11 +2119,12 @@ static s32 wl_cfg80211_suspend(struct wiphy *wiphy) * While going to suspend if associated with AP disassociate * from AP to save power while system is in suspended state */ - if (test_bit(WL_STATUS_CONNECTED, &wl->status) && - test_bit(WL_STATUS_READY, &wl->status)) { + if ((test_bit(WL_STATUS_CONNECTED, &cfg_priv->status) || + test_bit(WL_STATUS_CONNECTING, &cfg_priv->status)) && + test_bit(WL_STATUS_READY, &cfg_priv->status)) { WL_INFO("Disassociating from AP" " while entering suspend state\n"); - wl_link_down(wl); + brcmf_link_down(cfg_priv); /* * Make sure WPA_Supplicant receives all the event @@ -2124,37 +2132,31 @@ static s32 wl_cfg80211_suspend(struct wiphy *wiphy) * the state fw and WPA_Supplicant state consistent */ rtnl_unlock(); - wl_delay(500); + brcmf_delay(500); rtnl_lock(); } - set_bit(WL_STATUS_SCAN_ABORTING, &wl->status); - if (test_bit(WL_STATUS_READY, &wl->status)) - wl_term_iscan(wl); + set_bit(WL_STATUS_SCAN_ABORTING, &cfg_priv->status); + if (test_bit(WL_STATUS_READY, &cfg_priv->status)) + brcmf_term_iscan(cfg_priv); - if (wl->scan_request) { + if (cfg_priv->scan_request) { /* Indidate scan abort to cfg80211 layer */ WL_INFO("Terminating scan in progress\n"); - cfg80211_scan_done(wl->scan_request, true); - wl->scan_request = NULL; + cfg80211_scan_done(cfg_priv->scan_request, true); + cfg_priv->scan_request = NULL; } - clear_bit(WL_STATUS_SCANNING, &wl->status); - clear_bit(WL_STATUS_SCAN_ABORTING, &wl->status); - clear_bit(WL_STATUS_CONNECTING, &wl->status); - clear_bit(WL_STATUS_CONNECTED, &wl->status); - - /* Inform SDIO stack not to switch off power to the chip */ - sdioh_sdio_set_host_pm_flags(MMC_PM_KEEP_POWER); + clear_bit(WL_STATUS_SCANNING, &cfg_priv->status); + clear_bit(WL_STATUS_SCAN_ABORTING, &cfg_priv->status); /* Turn off watchdog timer */ - if (test_bit(WL_STATUS_READY, &wl->status)) { - WL_INFO("Terminate watchdog timer and enable MPC\n"); - wl_set_mpc(ndev, 1); - wl_os_wd_timer(ndev, 0); + if (test_bit(WL_STATUS_READY, &cfg_priv->status)) { + WL_INFO("Enable MPC\n"); + brcmf_set_mpc(ndev, 1); } #if defined(CONFIG_PM_SLEEP) - atomic_set(&dhd_mmc_suspend, true); + atomic_set(&brcmf_mmc_suspend, true); #endif /* defined(CONFIG_PM_SLEEP) */ WL_TRACE("Exit\n"); @@ -2163,8 +2165,8 @@ static s32 wl_cfg80211_suspend(struct wiphy *wiphy) } static __used s32 -wl_update_pmklist(struct net_device *dev, struct wl_pmk_list *pmk_list, - s32 err) +brcmf_update_pmklist(struct net_device *dev, + struct brcmf_cfg80211_pmk_list *pmk_list, s32 err) { int i, j; @@ -2177,55 +2179,51 @@ wl_update_pmklist(struct net_device *dev, struct wl_pmk_list *pmk_list, } if (likely(!err)) - wl_dev_bufvar_set(dev, "pmkid_info", (char *)pmk_list, + brcmf_dev_bufvar_set(dev, "pmkid_info", (char *)pmk_list, sizeof(*pmk_list)); return err; } static s32 -wl_cfg80211_set_pmksa(struct wiphy *wiphy, struct net_device *dev, - struct cfg80211_pmksa *pmksa) +brcmf_cfg80211_set_pmksa(struct wiphy *wiphy, struct net_device *dev, + struct cfg80211_pmksa *pmksa) { - struct wl_priv *wl = wiphy_to_wl(wiphy); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); + struct _pmkid_list *pmkids = &cfg_priv->pmk_list->pmkids; s32 err = 0; int i; WL_TRACE("Enter\n"); CHECK_SYS_UP(); - for (i = 0; i < wl->pmk_list->pmkids.npmkid; i++) - if (!memcmp(pmksa->bssid, &wl->pmk_list->pmkids.pmkid[i].BSSID, - ETH_ALEN)) + for (i = 0; i < pmkids->npmkid; i++) + if (!memcmp(pmksa->bssid, pmkids->pmkid[i].BSSID, ETH_ALEN)) break; if (i < WL_NUM_PMKIDS_MAX) { - memcpy(&wl->pmk_list->pmkids.pmkid[i].BSSID, pmksa->bssid, - ETH_ALEN); - memcpy(&wl->pmk_list->pmkids.pmkid[i].PMKID, pmksa->pmkid, - WLAN_PMKID_LEN); - if (i == wl->pmk_list->pmkids.npmkid) - wl->pmk_list->pmkids.npmkid++; + memcpy(pmkids->pmkid[i].BSSID, pmksa->bssid, ETH_ALEN); + memcpy(pmkids->pmkid[i].PMKID, pmksa->pmkid, WLAN_PMKID_LEN); + if (i == pmkids->npmkid) + pmkids->npmkid++; } else err = -EINVAL; WL_CONN("set_pmksa,IW_PMKSA_ADD - PMKID: %pM =\n", - &wl->pmk_list->pmkids.pmkid[wl->pmk_list->pmkids.npmkid].BSSID); + pmkids->pmkid[pmkids->npmkid].BSSID); for (i = 0; i < WLAN_PMKID_LEN; i++) - WL_CONN("%02x\n", - wl->pmk_list->pmkids.pmkid[wl->pmk_list->pmkids.npmkid]. - PMKID[i]); + WL_CONN("%02x\n", pmkids->pmkid[pmkids->npmkid].PMKID[i]); - err = wl_update_pmklist(dev, wl->pmk_list, err); + err = brcmf_update_pmklist(dev, cfg_priv->pmk_list, err); WL_TRACE("Exit\n"); return err; } static s32 -wl_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *dev, +brcmf_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *dev, struct cfg80211_pmksa *pmksa) { - struct wl_priv *wl = wiphy_to_wl(wiphy); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); struct _pmkid_list pmkid; s32 err = 0; int i; @@ -2240,28 +2238,29 @@ wl_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *dev, for (i = 0; i < WLAN_PMKID_LEN; i++) WL_CONN("%02x\n", pmkid.pmkid[0].PMKID[i]); - for (i = 0; i < wl->pmk_list->pmkids.npmkid; i++) + for (i = 0; i < cfg_priv->pmk_list->pmkids.npmkid; i++) if (!memcmp - (pmksa->bssid, &wl->pmk_list->pmkids.pmkid[i].BSSID, + (pmksa->bssid, &cfg_priv->pmk_list->pmkids.pmkid[i].BSSID, ETH_ALEN)) break; - if ((wl->pmk_list->pmkids.npmkid > 0) - && (i < wl->pmk_list->pmkids.npmkid)) { - memset(&wl->pmk_list->pmkids.pmkid[i], 0, sizeof(pmkid_t)); - for (; i < (wl->pmk_list->pmkids.npmkid - 1); i++) { - memcpy(&wl->pmk_list->pmkids.pmkid[i].BSSID, - &wl->pmk_list->pmkids.pmkid[i + 1].BSSID, + if ((cfg_priv->pmk_list->pmkids.npmkid > 0) + && (i < cfg_priv->pmk_list->pmkids.npmkid)) { + memset(&cfg_priv->pmk_list->pmkids.pmkid[i], 0, + sizeof(pmkid_t)); + for (; i < (cfg_priv->pmk_list->pmkids.npmkid - 1); i++) { + memcpy(&cfg_priv->pmk_list->pmkids.pmkid[i].BSSID, + &cfg_priv->pmk_list->pmkids.pmkid[i + 1].BSSID, ETH_ALEN); - memcpy(&wl->pmk_list->pmkids.pmkid[i].PMKID, - &wl->pmk_list->pmkids.pmkid[i + 1].PMKID, + memcpy(&cfg_priv->pmk_list->pmkids.pmkid[i].PMKID, + &cfg_priv->pmk_list->pmkids.pmkid[i + 1].PMKID, WLAN_PMKID_LEN); } - wl->pmk_list->pmkids.npmkid--; + cfg_priv->pmk_list->pmkids.npmkid--; } else err = -EINVAL; - err = wl_update_pmklist(dev, wl->pmk_list, err); + err = brcmf_update_pmklist(dev, cfg_priv->pmk_list, err); WL_TRACE("Exit\n"); return err; @@ -2269,16 +2268,16 @@ wl_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *dev, } static s32 -wl_cfg80211_flush_pmksa(struct wiphy *wiphy, struct net_device *dev) +brcmf_cfg80211_flush_pmksa(struct wiphy *wiphy, struct net_device *dev) { - struct wl_priv *wl = wiphy_to_wl(wiphy); + struct brcmf_cfg80211_priv *cfg_priv = wiphy_to_cfg(wiphy); s32 err = 0; WL_TRACE("Enter\n"); CHECK_SYS_UP(); - memset(wl->pmk_list, 0, sizeof(*wl->pmk_list)); - err = wl_update_pmklist(dev, wl->pmk_list, err); + memset(cfg_priv->pmk_list, 0, sizeof(*cfg_priv->pmk_list)); + err = brcmf_update_pmklist(dev, cfg_priv->pmk_list, err); WL_TRACE("Exit\n"); return err; @@ -2286,31 +2285,31 @@ wl_cfg80211_flush_pmksa(struct wiphy *wiphy, struct net_device *dev) } static struct cfg80211_ops wl_cfg80211_ops = { - .change_virtual_intf = wl_cfg80211_change_iface, - .scan = wl_cfg80211_scan, - .set_wiphy_params = wl_cfg80211_set_wiphy_params, - .join_ibss = wl_cfg80211_join_ibss, - .leave_ibss = wl_cfg80211_leave_ibss, - .get_station = wl_cfg80211_get_station, - .set_tx_power = wl_cfg80211_set_tx_power, - .get_tx_power = wl_cfg80211_get_tx_power, - .add_key = wl_cfg80211_add_key, - .del_key = wl_cfg80211_del_key, - .get_key = wl_cfg80211_get_key, - .set_default_key = wl_cfg80211_config_default_key, - .set_default_mgmt_key = wl_cfg80211_config_default_mgmt_key, - .set_power_mgmt = wl_cfg80211_set_power_mgmt, - .set_bitrate_mask = wl_cfg80211_set_bitrate_mask, - .connect = wl_cfg80211_connect, - .disconnect = wl_cfg80211_disconnect, - .suspend = wl_cfg80211_suspend, - .resume = wl_cfg80211_resume, - .set_pmksa = wl_cfg80211_set_pmksa, - .del_pmksa = wl_cfg80211_del_pmksa, - .flush_pmksa = wl_cfg80211_flush_pmksa + .change_virtual_intf = brcmf_cfg80211_change_iface, + .scan = brcmf_cfg80211_scan, + .set_wiphy_params = brcmf_cfg80211_set_wiphy_params, + .join_ibss = brcmf_cfg80211_join_ibss, + .leave_ibss = brcmf_cfg80211_leave_ibss, + .get_station = brcmf_cfg80211_get_station, + .set_tx_power = brcmf_cfg80211_set_tx_power, + .get_tx_power = brcmf_cfg80211_get_tx_power, + .add_key = brcmf_cfg80211_add_key, + .del_key = brcmf_cfg80211_del_key, + .get_key = brcmf_cfg80211_get_key, + .set_default_key = brcmf_cfg80211_config_default_key, + .set_default_mgmt_key = brcmf_cfg80211_config_default_mgmt_key, + .set_power_mgmt = brcmf_cfg80211_set_power_mgmt, + .set_bitrate_mask = brcmf_cfg80211_set_bitrate_mask, + .connect = brcmf_cfg80211_connect, + .disconnect = brcmf_cfg80211_disconnect, + .suspend = brcmf_cfg80211_suspend, + .resume = brcmf_cfg80211_resume, + .set_pmksa = brcmf_cfg80211_set_pmksa, + .del_pmksa = brcmf_cfg80211_del_pmksa, + .flush_pmksa = brcmf_cfg80211_flush_pmksa }; -static s32 wl_mode_to_nl80211_iftype(s32 mode) +static s32 brcmf_mode_to_nl80211_iftype(s32 mode) { s32 err = 0; @@ -2326,7 +2325,7 @@ static s32 wl_mode_to_nl80211_iftype(s32 mode) return err; } -static struct wireless_dev *wl_alloc_wdev(s32 sizeof_iface, +static struct wireless_dev *brcmf_alloc_wdev(s32 sizeof_iface, struct device *dev) { struct wireless_dev *wdev; @@ -2338,7 +2337,8 @@ static struct wireless_dev *wl_alloc_wdev(s32 sizeof_iface, return ERR_PTR(-ENOMEM); } wdev->wiphy = - wiphy_new(&wl_cfg80211_ops, sizeof(struct wl_priv) + sizeof_iface); + wiphy_new(&wl_cfg80211_ops, + sizeof(struct brcmf_cfg80211_priv) + sizeof_iface); if (unlikely(!wdev->wiphy)) { WL_ERR("Couldn not allocate wiphy device\n"); err = -ENOMEM; @@ -2384,9 +2384,9 @@ wiphy_new_out: return ERR_PTR(err); } -static void wl_free_wdev(struct wl_priv *wl) +static void brcmf_free_wdev(struct brcmf_cfg80211_priv *cfg_priv) { - struct wireless_dev *wdev = wl_to_wdev(wl); + struct wireless_dev *wdev = cfg_to_wdev(cfg_priv); if (unlikely(!wdev)) { WL_ERR("wdev is invalid\n"); @@ -2395,18 +2395,18 @@ static void wl_free_wdev(struct wl_priv *wl) wiphy_unregister(wdev->wiphy); wiphy_free(wdev->wiphy); kfree(wdev); - wl_to_wdev(wl) = NULL; + cfg_to_wdev(cfg_priv) = NULL; } -static s32 wl_inform_bss(struct wl_priv *wl) +static s32 brcmf_inform_bss(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_scan_results *bss_list; - struct wl_bss_info *bi = NULL; /* must be initialized */ + struct brcmf_scan_results *bss_list; + struct brcmf_bss_info *bi = NULL; /* must be initialized */ s32 err = 0; int i; - bss_list = wl->bss_list; - if (unlikely(bss_list->version != WL_BSS_INFO_VERSION)) { + bss_list = cfg_priv->bss_list; + if (unlikely(bss_list->version != BRCMF_BSS_INFO_VERSION)) { WL_ERR("Version %d != WL_BSS_INFO_VERSION\n", bss_list->version); return -EOPNOTSUPP; @@ -2414,7 +2414,7 @@ static s32 wl_inform_bss(struct wl_priv *wl) WL_SCAN("scanned AP count (%d)\n", bss_list->count); bi = next_bss(bss_list, bi); for_each_bss(bss_list, bi, i) { - err = wl_inform_single_bss(wl, bi); + err = brcmf_inform_single_bss(cfg_priv, bi); if (unlikely(err)) break; } @@ -2422,9 +2422,10 @@ static s32 wl_inform_bss(struct wl_priv *wl) } -static s32 wl_inform_single_bss(struct wl_priv *wl, struct wl_bss_info *bi) +static s32 brcmf_inform_single_bss(struct brcmf_cfg80211_priv *cfg_priv, + struct brcmf_bss_info *bi) { - struct wiphy *wiphy = wl_to_wiphy(wl); + struct wiphy *wiphy = cfg_to_wiphy(cfg_priv); struct ieee80211_channel *notify_channel; struct cfg80211_bss *bss; struct ieee80211_supported_band *band; @@ -2482,12 +2483,12 @@ static s32 wl_inform_single_bss(struct wl_priv *wl, struct wl_bss_info *bi) return err; } -static s32 -wl_inform_ibss(struct wl_priv *wl, struct net_device *dev, const u8 *bssid) +static s32 wl_inform_ibss(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *dev, const u8 *bssid) { - struct wiphy *wiphy = wl_to_wiphy(wl); + struct wiphy *wiphy = cfg_to_wiphy(cfg_priv); struct ieee80211_channel *notify_channel; - struct wl_bss_info *bi = NULL; + struct brcmf_bss_info *bi = NULL; struct ieee80211_supported_band *band; u8 *buf = NULL; s32 err = 0; @@ -2511,13 +2512,13 @@ wl_inform_ibss(struct wl_priv *wl, struct net_device *dev, const u8 *bssid) *(u32 *)buf = cpu_to_le32(WL_BSS_INFO_MAX); - err = wl_dev_ioctl(dev, WLC_GET_BSS_INFO, buf, WL_BSS_INFO_MAX); + err = brcmf_dev_ioctl(dev, BRCMF_C_GET_BSS_INFO, buf, WL_BSS_INFO_MAX); if (unlikely(err)) { WL_ERR("WLC_GET_BSS_INFO failed: %d\n", err); goto CleanUp; } - bi = (wl_bss_info_t *)(buf + 4); + bi = (struct brcmf_bss_info *)(buf + 4); channel = bi->ctl_ch ? bi->ctl_ch : CHSPEC_CHANNEL(le16_to_cpu(bi->chanspec)); @@ -2556,45 +2557,48 @@ CleanUp: return err; } -static bool wl_is_linkup(struct wl_priv *wl, const wl_event_msg_t *e) +static bool brcmf_is_linkup(struct brcmf_cfg80211_priv *cfg_priv, + const struct brcmf_event_msg *e) { u32 event = be32_to_cpu(e->event_type); u32 status = be32_to_cpu(e->status); - if (event == WLC_E_SET_SSID && status == WLC_E_STATUS_SUCCESS) { + if (event == BRCMF_E_SET_SSID && status == BRCMF_E_STATUS_SUCCESS) { WL_CONN("Processing set ssid\n"); - wl->link_up = true; + cfg_priv->link_up = true; return true; } return false; } -static bool wl_is_linkdown(struct wl_priv *wl, const wl_event_msg_t *e) +static bool brcmf_is_linkdown(struct brcmf_cfg80211_priv *cfg_priv, + const struct brcmf_event_msg *e) { u32 event = be32_to_cpu(e->event_type); u16 flags = be16_to_cpu(e->flags); - if (event == WLC_E_LINK && (!(flags & WLC_EVENT_MSG_LINK))) { + if (event == BRCMF_E_LINK && (!(flags & BRCMF_EVENT_MSG_LINK))) { WL_CONN("Processing link down\n"); return true; } return false; } -static bool wl_is_nonetwork(struct wl_priv *wl, const wl_event_msg_t *e) +static bool brcmf_is_nonetwork(struct brcmf_cfg80211_priv *cfg_priv, + const struct brcmf_event_msg *e) { u32 event = be32_to_cpu(e->event_type); u32 status = be32_to_cpu(e->status); - u16 flags = be16_to_cpu(e->flags); - if (event == WLC_E_LINK && status == WLC_E_STATUS_NO_NETWORKS) { + if (event == BRCMF_E_LINK && status == BRCMF_E_STATUS_NO_NETWORKS) { WL_CONN("Processing Link %s & no network found\n", - flags & WLC_EVENT_MSG_LINK ? "up" : "down"); + be16_to_cpu(e->flags) & BRCMF_EVENT_MSG_LINK ? + "up" : "down"); return true; } - if (event == WLC_E_SET_SSID && status != WLC_E_STATUS_SUCCESS) { + if (event == BRCMF_E_SET_SSID && status != BRCMF_E_STATUS_SUCCESS) { WL_CONN("Processing connecting & no network found\n"); return true; } @@ -2603,142 +2607,153 @@ static bool wl_is_nonetwork(struct wl_priv *wl, const wl_event_msg_t *e) } static s32 -wl_notify_connect_status(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data) +brcmf_notify_connect_status(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, void *data) { s32 err = 0; - if (wl_is_linkup(wl, e)) { + if (brcmf_is_linkup(cfg_priv, e)) { WL_CONN("Linkup\n"); - if (wl_is_ibssmode(wl)) { - wl_update_prof(wl, NULL, (void *)e->addr, + if (brcmf_is_ibssmode(cfg_priv)) { + brcmf_update_prof(cfg_priv, NULL, (void *)e->addr, WL_PROF_BSSID); - wl_inform_ibss(wl, ndev, e->addr); + wl_inform_ibss(cfg_priv, ndev, e->addr); cfg80211_ibss_joined(ndev, e->addr, GFP_KERNEL); - clear_bit(WL_STATUS_CONNECTING, &wl->status); - set_bit(WL_STATUS_CONNECTED, &wl->status); + clear_bit(WL_STATUS_CONNECTING, &cfg_priv->status); + set_bit(WL_STATUS_CONNECTED, &cfg_priv->status); } else - wl_bss_connect_done(wl, ndev, e, data, true); - } else if (wl_is_linkdown(wl, e)) { + brcmf_bss_connect_done(cfg_priv, ndev, e, data, true); + } else if (brcmf_is_linkdown(cfg_priv, e)) { WL_CONN("Linkdown\n"); - if (wl_is_ibssmode(wl)) { + if (brcmf_is_ibssmode(cfg_priv)) { + clear_bit(WL_STATUS_CONNECTING, &cfg_priv->status); if (test_and_clear_bit(WL_STATUS_CONNECTED, - &wl->status)) - wl_link_down(wl); + &cfg_priv->status)) + brcmf_link_down(cfg_priv); } else { + brcmf_bss_connect_done(cfg_priv, ndev, e, data, false); if (test_and_clear_bit(WL_STATUS_CONNECTED, - &wl->status)) { + &cfg_priv->status)) { cfg80211_disconnected(ndev, 0, NULL, 0, GFP_KERNEL); - wl_link_down(wl); + brcmf_link_down(cfg_priv); } } - wl_init_prof(wl->profile); - } else if (wl_is_nonetwork(wl, e)) { - if (wl_is_ibssmode(wl)) - clear_bit(WL_STATUS_CONNECTING, &wl->status); + brcmf_init_prof(cfg_priv->profile); + } else if (brcmf_is_nonetwork(cfg_priv, e)) { + if (brcmf_is_ibssmode(cfg_priv)) + clear_bit(WL_STATUS_CONNECTING, &cfg_priv->status); else - wl_bss_connect_done(wl, ndev, e, data, false); + brcmf_bss_connect_done(cfg_priv, ndev, e, data, false); } return err; } static s32 -wl_notify_roaming_status(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data) +brcmf_notify_roaming_status(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, void *data) { s32 err = 0; u32 event = be32_to_cpu(e->event_type); u32 status = be32_to_cpu(e->status); - if (event == WLC_E_ROAM && status == WLC_E_STATUS_SUCCESS) { - if (test_bit(WL_STATUS_CONNECTED, &wl->status)) - wl_bss_roaming_done(wl, ndev, e, data); + if (event == BRCMF_E_ROAM && status == BRCMF_E_STATUS_SUCCESS) { + if (test_bit(WL_STATUS_CONNECTED, &cfg_priv->status)) + brcmf_bss_roaming_done(cfg_priv, ndev, e, data); else - wl_bss_connect_done(wl, ndev, e, data, true); + brcmf_bss_connect_done(cfg_priv, ndev, e, data, true); } return err; } static __used s32 -wl_dev_bufvar_set(struct net_device *dev, s8 *name, s8 *buf, s32 len) +brcmf_dev_bufvar_set(struct net_device *dev, s8 *name, s8 *buf, s32 len) { - struct wl_priv *wl = ndev_to_wl(dev); + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(dev); u32 buflen; - buflen = bcm_mkiovar(name, buf, len, wl->ioctl_buf, WL_IOCTL_LEN_MAX); + buflen = brcmu_mkiovar(name, buf, len, cfg_priv->ioctl_buf, + WL_IOCTL_LEN_MAX); BUG_ON(!buflen); - return wl_dev_ioctl(dev, WLC_SET_VAR, wl->ioctl_buf, buflen); + return brcmf_dev_ioctl(dev, BRCMF_C_SET_VAR, cfg_priv->ioctl_buf, + buflen); } static s32 -wl_dev_bufvar_get(struct net_device *dev, s8 *name, s8 *buf, +brcmf_dev_bufvar_get(struct net_device *dev, s8 *name, s8 *buf, s32 buf_len) { - struct wl_priv *wl = ndev_to_wl(dev); + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(dev); u32 len; s32 err = 0; - len = bcm_mkiovar(name, NULL, 0, wl->ioctl_buf, WL_IOCTL_LEN_MAX); + len = brcmu_mkiovar(name, NULL, 0, cfg_priv->ioctl_buf, + WL_IOCTL_LEN_MAX); BUG_ON(!len); - err = wl_dev_ioctl(dev, WLC_GET_VAR, (void *)wl->ioctl_buf, + err = brcmf_dev_ioctl(dev, BRCMF_C_GET_VAR, (void *)cfg_priv->ioctl_buf, WL_IOCTL_LEN_MAX); if (unlikely(err)) { WL_ERR("error (%d)\n", err); return err; } - memcpy(buf, wl->ioctl_buf, buf_len); + memcpy(buf, cfg_priv->ioctl_buf, buf_len); return err; } -static s32 wl_get_assoc_ies(struct wl_priv *wl) +static s32 brcmf_get_assoc_ies(struct brcmf_cfg80211_priv *cfg_priv) { - struct net_device *ndev = wl_to_ndev(wl); - struct wl_assoc_ielen *assoc_info; - struct wl_connect_info *conn_info = wl_to_conn(wl); + struct net_device *ndev = cfg_to_ndev(cfg_priv); + struct brcmf_cfg80211_assoc_ielen *assoc_info; + struct brcmf_cfg80211_connect_info *conn_info = cfg_to_conn(cfg_priv); u32 req_len; u32 resp_len; s32 err = 0; - wl_clear_assoc_ies(wl); + brcmf_clear_assoc_ies(cfg_priv); - err = wl_dev_bufvar_get(ndev, "assoc_info", wl->extra_buf, + err = brcmf_dev_bufvar_get(ndev, "assoc_info", cfg_priv->extra_buf, WL_ASSOC_INFO_MAX); if (unlikely(err)) { WL_ERR("could not get assoc info (%d)\n", err); return err; } - assoc_info = (struct wl_assoc_ielen *)wl->extra_buf; + assoc_info = (struct brcmf_cfg80211_assoc_ielen *)cfg_priv->extra_buf; req_len = assoc_info->req_len; resp_len = assoc_info->resp_len; if (req_len) { - err = wl_dev_bufvar_get(ndev, "assoc_req_ies", wl->extra_buf, - WL_ASSOC_INFO_MAX); + err = brcmf_dev_bufvar_get(ndev, "assoc_req_ies", + cfg_priv->extra_buf, + WL_ASSOC_INFO_MAX); if (unlikely(err)) { WL_ERR("could not get assoc req (%d)\n", err); return err; } conn_info->req_ie_len = req_len; conn_info->req_ie = - kmemdup(wl->extra_buf, conn_info->req_ie_len, GFP_KERNEL); + kmemdup(cfg_priv->extra_buf, conn_info->req_ie_len, + GFP_KERNEL); } else { conn_info->req_ie_len = 0; conn_info->req_ie = NULL; } if (resp_len) { - err = wl_dev_bufvar_get(ndev, "assoc_resp_ies", wl->extra_buf, - WL_ASSOC_INFO_MAX); + err = brcmf_dev_bufvar_get(ndev, "assoc_resp_ies", + cfg_priv->extra_buf, + WL_ASSOC_INFO_MAX); if (unlikely(err)) { WL_ERR("could not get assoc resp (%d)\n", err); return err; } conn_info->resp_ie_len = resp_len; conn_info->resp_ie = - kmemdup(wl->extra_buf, conn_info->resp_ie_len, GFP_KERNEL); + kmemdup(cfg_priv->extra_buf, conn_info->resp_ie_len, + GFP_KERNEL); } else { conn_info->resp_ie_len = 0; conn_info->resp_ie = NULL; @@ -2749,9 +2764,9 @@ static s32 wl_get_assoc_ies(struct wl_priv *wl) return err; } -static void wl_clear_assoc_ies(struct wl_priv *wl) +static void brcmf_clear_assoc_ies(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_connect_info *conn_info = wl_to_conn(wl); + struct brcmf_cfg80211_connect_info *conn_info = cfg_to_conn(cfg_priv); kfree(conn_info->req_ie); conn_info->req_ie = NULL; @@ -2762,7 +2777,7 @@ static void wl_clear_assoc_ies(struct wl_priv *wl) } -static void wl_ch_to_chanspec(int ch, struct wl_join_params *join_params, +static void brcmf_ch_to_chanspec(int ch, struct brcmf_join_params *join_params, size_t *join_params_size) { chanspec_t chanspec = 0; @@ -2779,7 +2794,7 @@ static void wl_ch_to_chanspec(int ch, struct wl_join_params *join_params, chanspec |= WL_CHANSPEC_BW_20; chanspec |= WL_CHANSPEC_CTL_SB_NONE; - *join_params_size += WL_ASSOC_PARAMS_FIXED_SIZE + + *join_params_size += BRCMF_ASSOC_PARAMS_FIXED_SIZE + join_params->params.chanspec_num * sizeof(chanspec_t); join_params->params.chanspec_list[0] &= WL_CHANSPEC_CHAN_MASK; @@ -2796,11 +2811,11 @@ static void wl_ch_to_chanspec(int ch, struct wl_join_params *join_params, } } -static s32 wl_update_bss_info(struct wl_priv *wl) +static s32 brcmf_update_bss_info(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_bss_info *bi; - struct wlc_ssid *ssid; - struct bcm_tlv *tim; + struct brcmf_bss_info *bi; + struct brcmf_ssid *ssid; + struct brcmu_tlv *tim; u16 beacon_interval; u8 dtim_period; size_t ie_len; @@ -2808,21 +2823,21 @@ static s32 wl_update_bss_info(struct wl_priv *wl) s32 err = 0; WL_TRACE("Enter\n"); - if (wl_is_ibssmode(wl)) + if (brcmf_is_ibssmode(cfg_priv)) return err; - ssid = (struct wlc_ssid *)wl_read_prof(wl, WL_PROF_SSID); + ssid = (struct brcmf_ssid *)brcmf_read_prof(cfg_priv, WL_PROF_SSID); - *(u32 *)wl->extra_buf = cpu_to_le32(WL_EXTRA_BUF_MAX); - err = wl_dev_ioctl(wl_to_ndev(wl), WLC_GET_BSS_INFO, - wl->extra_buf, WL_EXTRA_BUF_MAX); + *(u32 *)cfg_priv->extra_buf = cpu_to_le32(WL_EXTRA_BUF_MAX); + err = brcmf_dev_ioctl(cfg_to_ndev(cfg_priv), BRCMF_C_GET_BSS_INFO, + cfg_priv->extra_buf, WL_EXTRA_BUF_MAX); if (unlikely(err)) { WL_ERR("Could not get bss info %d\n", err); goto update_bss_info_out; } - bi = (struct wl_bss_info *)(wl->extra_buf + 4); - err = wl_inform_single_bss(wl, bi); + bi = (struct brcmf_bss_info *)(cfg_priv->extra_buf + 4); + err = brcmf_inform_single_bss(cfg_priv, bi); if (unlikely(err)) goto update_bss_info_out; @@ -2830,7 +2845,7 @@ static s32 wl_update_bss_info(struct wl_priv *wl) ie_len = bi->ie_length; beacon_interval = cpu_to_le16(bi->beacon_period); - tim = bcm_parse_tlvs(ie, ie_len, WLAN_EID_TIM); + tim = brcmu_parse_tlvs(ie, ie_len, WLAN_EID_TIM); if (tim) dtim_period = tim->data[1]; else { @@ -2840,7 +2855,8 @@ static s32 wl_update_bss_info(struct wl_priv *wl) * so we speficially query dtim information to dongle. */ u32 var; - err = wl_dev_intvar_get(wl_to_ndev(wl), "dtim_assoc", &var); + err = brcmf_dev_intvar_get(cfg_to_ndev(cfg_priv), + "dtim_assoc", &var); if (unlikely(err)) { WL_ERR("wl dtim_assoc failed (%d)\n", err); goto update_bss_info_out; @@ -2848,8 +2864,8 @@ static s32 wl_update_bss_info(struct wl_priv *wl) dtim_period = (u8)var; } - wl_update_prof(wl, NULL, &beacon_interval, WL_PROF_BEACONINT); - wl_update_prof(wl, NULL, &dtim_period, WL_PROF_DTIMPERIOD); + brcmf_update_prof(cfg_priv, NULL, &beacon_interval, WL_PROF_BEACONINT); + brcmf_update_prof(cfg_priv, NULL, &dtim_period, WL_PROF_DTIMPERIOD); update_bss_info_out: WL_TRACE("Exit"); @@ -2857,54 +2873,59 @@ update_bss_info_out: } static s32 -wl_bss_roaming_done(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data) +brcmf_bss_roaming_done(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, void *data) { - struct wl_connect_info *conn_info = wl_to_conn(wl); + struct brcmf_cfg80211_connect_info *conn_info = cfg_to_conn(cfg_priv); s32 err = 0; WL_TRACE("Enter\n"); - wl_get_assoc_ies(wl); - wl_update_prof(wl, NULL, &e->addr, WL_PROF_BSSID); - wl_update_bss_info(wl); + brcmf_get_assoc_ies(cfg_priv); + brcmf_update_prof(cfg_priv, NULL, &e->addr, WL_PROF_BSSID); + brcmf_update_bss_info(cfg_priv); cfg80211_roamed(ndev, NULL, - (u8 *)wl_read_prof(wl, WL_PROF_BSSID), + (u8 *)brcmf_read_prof(cfg_priv, WL_PROF_BSSID), conn_info->req_ie, conn_info->req_ie_len, conn_info->resp_ie, conn_info->resp_ie_len, GFP_KERNEL); WL_CONN("Report roaming result\n"); - set_bit(WL_STATUS_CONNECTED, &wl->status); + set_bit(WL_STATUS_CONNECTED, &cfg_priv->status); WL_TRACE("Exit\n"); return err; } static s32 -wl_bss_connect_done(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data, bool completed) +brcmf_bss_connect_done(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, const struct brcmf_event_msg *e, + void *data, bool completed) { - struct wl_connect_info *conn_info = wl_to_conn(wl); + struct brcmf_cfg80211_connect_info *conn_info = cfg_to_conn(cfg_priv); s32 err = 0; WL_TRACE("Enter\n"); - if (test_and_clear_bit(WL_STATUS_CONNECTING, &wl->status)) { + if (test_and_clear_bit(WL_STATUS_CONNECTING, &cfg_priv->status)) { if (completed) { - wl_get_assoc_ies(wl); - wl_update_prof(wl, NULL, &e->addr, WL_PROF_BSSID); - wl_update_bss_info(wl); + brcmf_get_assoc_ies(cfg_priv); + brcmf_update_prof(cfg_priv, NULL, &e->addr, + WL_PROF_BSSID); + brcmf_update_bss_info(cfg_priv); } cfg80211_connect_result(ndev, - (u8 *)wl_read_prof(wl, WL_PROF_BSSID), + (u8 *)brcmf_read_prof(cfg_priv, + WL_PROF_BSSID), conn_info->req_ie, conn_info->req_ie_len, conn_info->resp_ie, conn_info->resp_ie_len, - completed ? WLAN_STATUS_SUCCESS : WLAN_STATUS_AUTH_TIMEOUT, + completed ? WLAN_STATUS_SUCCESS : + WLAN_STATUS_AUTH_TIMEOUT, GFP_KERNEL); if (completed) - set_bit(WL_STATUS_CONNECTED, &wl->status); + set_bit(WL_STATUS_CONNECTED, &cfg_priv->status); WL_CONN("Report connect result - connection %s\n", completed ? "succeeded" : "failed"); } @@ -2913,14 +2934,15 @@ wl_bss_connect_done(struct wl_priv *wl, struct net_device *ndev, } static s32 -wl_notify_mic_status(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data) +brcmf_notify_mic_status(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, void *data) { u16 flags = be16_to_cpu(e->flags); enum nl80211_key_type key_type; rtnl_lock(); - if (flags & WLC_EVENT_MSG_GROUP) + if (flags & BRCMF_EVENT_MSG_GROUP) key_type = NL80211_KEYTYPE_GROUP; else key_type = NL80211_KEYTYPE_PAIRWISE; @@ -2933,30 +2955,32 @@ wl_notify_mic_status(struct wl_priv *wl, struct net_device *ndev, } static s32 -wl_notify_scan_status(struct wl_priv *wl, struct net_device *ndev, - const wl_event_msg_t *e, void *data) +brcmf_notify_scan_status(struct brcmf_cfg80211_priv *cfg_priv, + struct net_device *ndev, + const struct brcmf_event_msg *e, void *data) { - struct channel_info channel_inform; - struct wl_scan_results *bss_list; + struct brcmf_channel_info channel_inform; + struct brcmf_scan_results *bss_list; u32 len = WL_SCAN_BUF_MAX; s32 err = 0; bool scan_abort = false; WL_TRACE("Enter\n"); - if (wl->iscan_on && wl->iscan_kickstart) { + if (cfg_priv->iscan_on && cfg_priv->iscan_kickstart) { WL_TRACE("Exit\n"); - return wl_wakeup_iscan(wl_to_iscan(wl)); + return brcmf_wakeup_iscan(cfg_to_iscan(cfg_priv)); } - if (unlikely(!test_and_clear_bit(WL_STATUS_SCANNING, &wl->status))) { + if (unlikely(!test_and_clear_bit(WL_STATUS_SCANNING, + &cfg_priv->status))) { WL_ERR("Scan complete while device not scanning\n"); scan_abort = true; err = -EINVAL; goto scan_done_out; } - err = wl_dev_ioctl(ndev, WLC_GET_CHANNEL, &channel_inform, + err = brcmf_dev_ioctl(ndev, BRCMF_C_GET_CHANNEL, &channel_inform, sizeof(channel_inform)); if (unlikely(err)) { WL_ERR("scan busy (%d)\n", err); @@ -2969,12 +2993,12 @@ wl_notify_scan_status(struct wl_priv *wl, struct net_device *ndev, WL_CONN("channel_inform.scan_channel (%d)\n", channel_inform.scan_channel); } - wl->bss_list = wl->scan_results; - bss_list = wl->bss_list; + cfg_priv->bss_list = cfg_priv->scan_results; + bss_list = cfg_priv->bss_list; memset(bss_list, 0, len); bss_list->buflen = cpu_to_le32(len); - err = wl_dev_ioctl(ndev, WLC_SCAN_RESULTS, bss_list, len); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SCAN_RESULTS, bss_list, len); if (unlikely(err)) { WL_ERR("%s Scan_results error (%d)\n", ndev->name, err); err = -EINVAL; @@ -2985,18 +3009,18 @@ wl_notify_scan_status(struct wl_priv *wl, struct net_device *ndev, bss_list->version = le32_to_cpu(bss_list->version); bss_list->count = le32_to_cpu(bss_list->count); - err = wl_inform_bss(wl); + err = brcmf_inform_bss(cfg_priv); if (err) { scan_abort = true; goto scan_done_out; } scan_done_out: - if (wl->scan_request) { + if (cfg_priv->scan_request) { WL_SCAN("calling cfg80211_scan_done\n"); - cfg80211_scan_done(wl->scan_request, scan_abort); - wl_set_mpc(ndev, 1); - wl->scan_request = NULL; + cfg80211_scan_done(cfg_priv->scan_request, scan_abort); + brcmf_set_mpc(ndev, 1); + cfg_priv->scan_request = NULL; } WL_TRACE("Exit\n"); @@ -3004,7 +3028,7 @@ scan_done_out: return err; } -static void wl_init_conf(struct wl_conf *conf) +static void brcmf_init_conf(struct brcmf_cfg80211_conf *conf) { conf->mode = (u32)-1; conf->frag_threshold = (u32)-1; @@ -3014,70 +3038,66 @@ static void wl_init_conf(struct wl_conf *conf) conf->tx_power = -1; } -static void wl_init_prof(struct wl_profile *prof) +static void brcmf_init_prof(struct brcmf_cfg80211_profile *prof) { memset(prof, 0, sizeof(*prof)); } -static void wl_init_eloop_handler(struct wl_event_loop *el) +static void brcmf_init_eloop_handler(struct brcmf_cfg80211_event_loop *el) { memset(el, 0, sizeof(*el)); - el->handler[WLC_E_SCAN_COMPLETE] = wl_notify_scan_status; - el->handler[WLC_E_LINK] = wl_notify_connect_status; - el->handler[WLC_E_ROAM] = wl_notify_roaming_status; - el->handler[WLC_E_MIC_ERROR] = wl_notify_mic_status; - el->handler[WLC_E_SET_SSID] = wl_notify_connect_status; + el->handler[BRCMF_E_SCAN_COMPLETE] = brcmf_notify_scan_status; + el->handler[BRCMF_E_LINK] = brcmf_notify_connect_status; + el->handler[BRCMF_E_ROAM] = brcmf_notify_roaming_status; + el->handler[BRCMF_E_MIC_ERROR] = brcmf_notify_mic_status; + el->handler[BRCMF_E_SET_SSID] = brcmf_notify_connect_status; } -static s32 wl_init_priv_mem(struct wl_priv *wl) +static s32 brcmf_init_priv_mem(struct brcmf_cfg80211_priv *cfg_priv) { - wl->scan_results = kzalloc(WL_SCAN_BUF_MAX, GFP_KERNEL); - if (unlikely(!wl->scan_results)) { + cfg_priv->scan_results = kzalloc(WL_SCAN_BUF_MAX, GFP_KERNEL); + if (unlikely(!cfg_priv->scan_results)) { WL_ERR("Scan results alloc failed\n"); goto init_priv_mem_out; } - wl->conf = kzalloc(sizeof(*wl->conf), GFP_KERNEL); - if (unlikely(!wl->conf)) { + cfg_priv->conf = kzalloc(sizeof(*cfg_priv->conf), GFP_KERNEL); + if (unlikely(!cfg_priv->conf)) { WL_ERR("wl_conf alloc failed\n"); goto init_priv_mem_out; } - wl->profile = kzalloc(sizeof(*wl->profile), GFP_KERNEL); - if (unlikely(!wl->profile)) { + cfg_priv->profile = kzalloc(sizeof(*cfg_priv->profile), GFP_KERNEL); + if (unlikely(!cfg_priv->profile)) { WL_ERR("wl_profile alloc failed\n"); goto init_priv_mem_out; } - wl->bss_info = kzalloc(WL_BSS_INFO_MAX, GFP_KERNEL); - if (unlikely(!wl->bss_info)) { + cfg_priv->bss_info = kzalloc(WL_BSS_INFO_MAX, GFP_KERNEL); + if (unlikely(!cfg_priv->bss_info)) { WL_ERR("Bss information alloc failed\n"); goto init_priv_mem_out; } - wl->scan_req_int = kzalloc(sizeof(*wl->scan_req_int), GFP_KERNEL); - if (unlikely(!wl->scan_req_int)) { + cfg_priv->scan_req_int = kzalloc(sizeof(*cfg_priv->scan_req_int), + GFP_KERNEL); + if (unlikely(!cfg_priv->scan_req_int)) { WL_ERR("Scan req alloc failed\n"); goto init_priv_mem_out; } - wl->ioctl_buf = kzalloc(WL_IOCTL_LEN_MAX, GFP_KERNEL); - if (unlikely(!wl->ioctl_buf)) { + cfg_priv->ioctl_buf = kzalloc(WL_IOCTL_LEN_MAX, GFP_KERNEL); + if (unlikely(!cfg_priv->ioctl_buf)) { WL_ERR("Ioctl buf alloc failed\n"); goto init_priv_mem_out; } - wl->extra_buf = kzalloc(WL_EXTRA_BUF_MAX, GFP_KERNEL); - if (unlikely(!wl->extra_buf)) { + cfg_priv->extra_buf = kzalloc(WL_EXTRA_BUF_MAX, GFP_KERNEL); + if (unlikely(!cfg_priv->extra_buf)) { WL_ERR("Extra buf alloc failed\n"); goto init_priv_mem_out; } - wl->iscan = kzalloc(sizeof(*wl->iscan), GFP_KERNEL); - if (unlikely(!wl->iscan)) { + cfg_priv->iscan = kzalloc(sizeof(*cfg_priv->iscan), GFP_KERNEL); + if (unlikely(!cfg_priv->iscan)) { WL_ERR("Iscan buf alloc failed\n"); goto init_priv_mem_out; } - wl->fw = kzalloc(sizeof(*wl->fw), GFP_KERNEL); - if (unlikely(!wl->fw)) { - WL_ERR("fw object alloc failed\n"); - goto init_priv_mem_out; - } - wl->pmk_list = kzalloc(sizeof(*wl->pmk_list), GFP_KERNEL); - if (unlikely(!wl->pmk_list)) { + cfg_priv->pmk_list = kzalloc(sizeof(*cfg_priv->pmk_list), GFP_KERNEL); + if (unlikely(!cfg_priv->pmk_list)) { WL_ERR("pmk list alloc failed\n"); goto init_priv_mem_out; } @@ -3085,61 +3105,60 @@ static s32 wl_init_priv_mem(struct wl_priv *wl) return 0; init_priv_mem_out: - wl_deinit_priv_mem(wl); + brcmf_deinit_priv_mem(cfg_priv); return -ENOMEM; } -static void wl_deinit_priv_mem(struct wl_priv *wl) -{ - kfree(wl->scan_results); - wl->scan_results = NULL; - kfree(wl->bss_info); - wl->bss_info = NULL; - kfree(wl->conf); - wl->conf = NULL; - kfree(wl->profile); - wl->profile = NULL; - kfree(wl->scan_req_int); - wl->scan_req_int = NULL; - kfree(wl->ioctl_buf); - wl->ioctl_buf = NULL; - kfree(wl->extra_buf); - wl->extra_buf = NULL; - kfree(wl->iscan); - wl->iscan = NULL; - kfree(wl->fw); - wl->fw = NULL; - kfree(wl->pmk_list); - wl->pmk_list = NULL; -} - -static s32 wl_create_event_handler(struct wl_priv *wl) -{ - sema_init(&wl->event_sync, 0); - wl->event_tsk = kthread_run(wl_event_handler, wl, "wl_event_handler"); - if (IS_ERR(wl->event_tsk)) { - wl->event_tsk = NULL; +static void brcmf_deinit_priv_mem(struct brcmf_cfg80211_priv *cfg_priv) +{ + kfree(cfg_priv->scan_results); + cfg_priv->scan_results = NULL; + kfree(cfg_priv->bss_info); + cfg_priv->bss_info = NULL; + kfree(cfg_priv->conf); + cfg_priv->conf = NULL; + kfree(cfg_priv->profile); + cfg_priv->profile = NULL; + kfree(cfg_priv->scan_req_int); + cfg_priv->scan_req_int = NULL; + kfree(cfg_priv->ioctl_buf); + cfg_priv->ioctl_buf = NULL; + kfree(cfg_priv->extra_buf); + cfg_priv->extra_buf = NULL; + kfree(cfg_priv->iscan); + cfg_priv->iscan = NULL; + kfree(cfg_priv->pmk_list); + cfg_priv->pmk_list = NULL; +} + +static s32 brcmf_create_event_handler(struct brcmf_cfg80211_priv *cfg_priv) +{ + sema_init(&cfg_priv->event_sync, 0); + cfg_priv->event_tsk = kthread_run(brcmf_event_handler, cfg_priv, + "wl_event_handler"); + if (IS_ERR(cfg_priv->event_tsk)) { + cfg_priv->event_tsk = NULL; WL_ERR("failed to create event thread\n"); return -ENOMEM; } return 0; } -static void wl_destroy_event_handler(struct wl_priv *wl) +static void brcmf_destroy_event_handler(struct brcmf_cfg80211_priv *cfg_priv) { - if (wl->event_tsk) { - send_sig(SIGTERM, wl->event_tsk, 1); - kthread_stop(wl->event_tsk); - wl->event_tsk = NULL; + if (cfg_priv->event_tsk) { + send_sig(SIGTERM, cfg_priv->event_tsk, 1); + kthread_stop(cfg_priv->event_tsk); + cfg_priv->event_tsk = NULL; } } -static void wl_term_iscan(struct wl_priv *wl) +static void brcmf_term_iscan(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_iscan_ctrl *iscan = wl_to_iscan(wl); + struct brcmf_cfg80211_iscan_ctrl *iscan = cfg_to_iscan(cfg_priv); - if (wl->iscan_on && iscan->tsk) { + if (cfg_priv->iscan_on && iscan->tsk) { iscan->state = WL_ISCAN_STATE_IDLE; send_sig(SIGTERM, iscan->tsk, 1); kthread_stop(iscan->tsk); @@ -3147,26 +3166,28 @@ static void wl_term_iscan(struct wl_priv *wl) } } -static void wl_notify_iscan_complete(struct wl_iscan_ctrl *iscan, bool aborted) +static void brcmf_notify_iscan_complete(struct brcmf_cfg80211_iscan_ctrl *iscan, + bool aborted) { - struct wl_priv *wl = iscan_to_wl(iscan); - struct net_device *ndev = wl_to_ndev(wl); + struct brcmf_cfg80211_priv *cfg_priv = iscan_to_cfg(iscan); + struct net_device *ndev = cfg_to_ndev(cfg_priv); - if (unlikely(!test_and_clear_bit(WL_STATUS_SCANNING, &wl->status))) { + if (unlikely(!test_and_clear_bit(WL_STATUS_SCANNING, + &cfg_priv->status))) { WL_ERR("Scan complete while device not scanning\n"); return; } - if (likely(wl->scan_request)) { + if (likely(cfg_priv->scan_request)) { WL_SCAN("ISCAN Completed scan: %s\n", aborted ? "Aborted" : "Done"); - cfg80211_scan_done(wl->scan_request, aborted); - wl_set_mpc(ndev, 1); - wl->scan_request = NULL; + cfg80211_scan_done(cfg_priv->scan_request, aborted); + brcmf_set_mpc(ndev, 1); + cfg_priv->scan_request = NULL; } - wl->iscan_kickstart = false; + cfg_priv->iscan_kickstart = false; } -static s32 wl_wakeup_iscan(struct wl_iscan_ctrl *iscan) +static s32 brcmf_wakeup_iscan(struct brcmf_cfg80211_iscan_ctrl *iscan) { if (likely(iscan->state != WL_ISCAN_STATE_IDLE)) { WL_SCAN("wake up iscan\n"); @@ -3178,25 +3199,25 @@ static s32 wl_wakeup_iscan(struct wl_iscan_ctrl *iscan) } static s32 -wl_get_iscan_results(struct wl_iscan_ctrl *iscan, u32 *status, - struct wl_scan_results **bss_list) +brcmf_get_iscan_results(struct brcmf_cfg80211_iscan_ctrl *iscan, u32 *status, + struct brcmf_scan_results **bss_list) { - struct wl_iscan_results list; - struct wl_scan_results *results; - struct wl_iscan_results *list_buf; + struct brcmf_iscan_results list; + struct brcmf_scan_results *results; + struct brcmf_iscan_results *list_buf; s32 err = 0; memset(iscan->scan_buf, 0, WL_ISCAN_BUF_MAX); - list_buf = (struct wl_iscan_results *)iscan->scan_buf; + list_buf = (struct brcmf_iscan_results *)iscan->scan_buf; results = &list_buf->results; - results->buflen = WL_ISCAN_RESULTS_FIXED_SIZE; + results->buflen = BRCMF_ISCAN_RESULTS_FIXED_SIZE; results->version = 0; results->count = 0; memset(&list, 0, sizeof(list)); list.results.buflen = cpu_to_le32(WL_ISCAN_BUF_MAX); - err = wl_dev_iovar_getbuf(iscan->dev, "iscanresults", &list, - WL_ISCAN_RESULTS_FIXED_SIZE, iscan->scan_buf, + err = brcmf_dev_iovar_getbuf(iscan->dev, "iscanresults", &list, + BRCMF_ISCAN_RESULTS_FIXED_SIZE, iscan->scan_buf, WL_ISCAN_BUF_MAX); if (unlikely(err)) { WL_ERR("error (%d)\n", err); @@ -3213,23 +3234,23 @@ wl_get_iscan_results(struct wl_iscan_ctrl *iscan, u32 *status, return err; } -static s32 wl_iscan_done(struct wl_priv *wl) +static s32 brcmf_iscan_done(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_iscan_ctrl *iscan = wl->iscan; + struct brcmf_cfg80211_iscan_ctrl *iscan = cfg_priv->iscan; s32 err = 0; iscan->state = WL_ISCAN_STATE_IDLE; rtnl_lock(); - wl_inform_bss(wl); - wl_notify_iscan_complete(iscan, false); + brcmf_inform_bss(cfg_priv); + brcmf_notify_iscan_complete(iscan, false); rtnl_unlock(); return err; } -static s32 wl_iscan_pending(struct wl_priv *wl) +static s32 brcmf_iscan_pending(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_iscan_ctrl *iscan = wl->iscan; + struct brcmf_cfg80211_iscan_ctrl *iscan = cfg_priv->iscan; s32 err = 0; /* Reschedule the timer */ @@ -3239,14 +3260,14 @@ static s32 wl_iscan_pending(struct wl_priv *wl) return err; } -static s32 wl_iscan_inprogress(struct wl_priv *wl) +static s32 brcmf_iscan_inprogress(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_iscan_ctrl *iscan = wl->iscan; + struct brcmf_cfg80211_iscan_ctrl *iscan = cfg_priv->iscan; s32 err = 0; rtnl_lock(); - wl_inform_bss(wl); - wl_run_iscan(iscan, NULL, WL_SCAN_ACTION_CONTINUE); + brcmf_inform_bss(cfg_priv); + brcmf_run_iscan(iscan, NULL, BRCMF_SCAN_ACTION_CONTINUE); rtnl_unlock(); /* Reschedule the timer */ mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000); @@ -3255,31 +3276,32 @@ static s32 wl_iscan_inprogress(struct wl_priv *wl) return err; } -static s32 wl_iscan_aborted(struct wl_priv *wl) +static s32 brcmf_iscan_aborted(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_iscan_ctrl *iscan = wl->iscan; + struct brcmf_cfg80211_iscan_ctrl *iscan = cfg_priv->iscan; s32 err = 0; iscan->state = WL_ISCAN_STATE_IDLE; rtnl_lock(); - wl_notify_iscan_complete(iscan, true); + brcmf_notify_iscan_complete(iscan, true); rtnl_unlock(); return err; } -static s32 wl_iscan_thread(void *data) +static s32 brcmf_iscan_thread(void *data) { struct sched_param param = {.sched_priority = MAX_RT_PRIO - 1 }; - struct wl_iscan_ctrl *iscan = (struct wl_iscan_ctrl *)data; - struct wl_priv *wl = iscan_to_wl(iscan); - struct wl_iscan_eloop *el = &iscan->el; + struct brcmf_cfg80211_iscan_ctrl *iscan = + (struct brcmf_cfg80211_iscan_ctrl *)data; + struct brcmf_cfg80211_priv *cfg_priv = iscan_to_cfg(iscan); + struct brcmf_cfg80211_iscan_eloop *el = &iscan->el; u32 status; int err = 0; sched_setscheduler(current, SCHED_FIFO, ¶m); allow_signal(SIGTERM); - status = WL_SCAN_RESULTS_PARTIAL; + status = BRCMF_SCAN_RESULTS_PARTIAL; while (likely(!down_interruptible(&iscan->sync))) { if (kthread_should_stop()) break; @@ -3288,13 +3310,14 @@ static s32 wl_iscan_thread(void *data) iscan->timer_on = 0; } rtnl_lock(); - err = wl_get_iscan_results(iscan, &status, &wl->bss_list); + err = brcmf_get_iscan_results(iscan, &status, + &cfg_priv->bss_list); if (unlikely(err)) { - status = WL_SCAN_RESULTS_ABORTED; + status = BRCMF_SCAN_RESULTS_ABORTED; WL_ERR("Abort iscan\n"); } rtnl_unlock(); - el->handler[status] (wl); + el->handler[status](cfg_priv); } if (iscan->timer_on) { del_timer_sync(&iscan->timer); @@ -3305,26 +3328,27 @@ static s32 wl_iscan_thread(void *data) return 0; } -static void wl_iscan_timer(unsigned long data) +static void brcmf_iscan_timer(unsigned long data) { - struct wl_iscan_ctrl *iscan = (struct wl_iscan_ctrl *)data; + struct brcmf_cfg80211_iscan_ctrl *iscan = + (struct brcmf_cfg80211_iscan_ctrl *)data; if (iscan) { iscan->timer_on = 0; WL_SCAN("timer expired\n"); - wl_wakeup_iscan(iscan); + brcmf_wakeup_iscan(iscan); } } -static s32 wl_invoke_iscan(struct wl_priv *wl) +static s32 brcmf_invoke_iscan(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_iscan_ctrl *iscan = wl_to_iscan(wl); + struct brcmf_cfg80211_iscan_ctrl *iscan = cfg_to_iscan(cfg_priv); int err = 0; - if (wl->iscan_on && !iscan->tsk) { + if (cfg_priv->iscan_on && !iscan->tsk) { iscan->state = WL_ISCAN_STATE_IDLE; sema_init(&iscan->sync, 0); - iscan->tsk = kthread_run(wl_iscan_thread, iscan, "wl_iscan"); + iscan->tsk = kthread_run(brcmf_iscan_thread, iscan, "wl_iscan"); if (IS_ERR(iscan->tsk)) { WL_ERR("Could not create iscan thread\n"); iscan->tsk = NULL; @@ -3335,228 +3359,228 @@ static s32 wl_invoke_iscan(struct wl_priv *wl) return err; } -static void wl_init_iscan_eloop(struct wl_iscan_eloop *el) +static void brcmf_init_iscan_eloop(struct brcmf_cfg80211_iscan_eloop *el) { memset(el, 0, sizeof(*el)); - el->handler[WL_SCAN_RESULTS_SUCCESS] = wl_iscan_done; - el->handler[WL_SCAN_RESULTS_PARTIAL] = wl_iscan_inprogress; - el->handler[WL_SCAN_RESULTS_PENDING] = wl_iscan_pending; - el->handler[WL_SCAN_RESULTS_ABORTED] = wl_iscan_aborted; - el->handler[WL_SCAN_RESULTS_NO_MEM] = wl_iscan_aborted; + el->handler[BRCMF_SCAN_RESULTS_SUCCESS] = brcmf_iscan_done; + el->handler[BRCMF_SCAN_RESULTS_PARTIAL] = brcmf_iscan_inprogress; + el->handler[BRCMF_SCAN_RESULTS_PENDING] = brcmf_iscan_pending; + el->handler[BRCMF_SCAN_RESULTS_ABORTED] = brcmf_iscan_aborted; + el->handler[BRCMF_SCAN_RESULTS_NO_MEM] = brcmf_iscan_aborted; } -static s32 wl_init_iscan(struct wl_priv *wl) +static s32 brcmf_init_iscan(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_iscan_ctrl *iscan = wl_to_iscan(wl); + struct brcmf_cfg80211_iscan_ctrl *iscan = cfg_to_iscan(cfg_priv); int err = 0; - if (wl->iscan_on) { - iscan->dev = wl_to_ndev(wl); + if (cfg_priv->iscan_on) { + iscan->dev = cfg_to_ndev(cfg_priv); iscan->state = WL_ISCAN_STATE_IDLE; - wl_init_iscan_eloop(&iscan->el); + brcmf_init_iscan_eloop(&iscan->el); iscan->timer_ms = WL_ISCAN_TIMER_INTERVAL_MS; init_timer(&iscan->timer); iscan->timer.data = (unsigned long) iscan; - iscan->timer.function = wl_iscan_timer; + iscan->timer.function = brcmf_iscan_timer; sema_init(&iscan->sync, 0); - iscan->tsk = kthread_run(wl_iscan_thread, iscan, "wl_iscan"); + iscan->tsk = kthread_run(brcmf_iscan_thread, iscan, "wl_iscan"); if (IS_ERR(iscan->tsk)) { WL_ERR("Could not create iscan thread\n"); iscan->tsk = NULL; return -ENOMEM; } - iscan->data = wl; + iscan->data = cfg_priv; } return err; } -static void wl_init_fw(struct wl_fw_ctrl *fw) -{ - fw->status = 0; /* init fw loading status. - 0 means nothing was loaded yet */ -} - -static s32 wl_init_priv(struct wl_priv *wl) +static s32 wl_init_priv(struct brcmf_cfg80211_priv *cfg_priv) { - struct wiphy *wiphy = wl_to_wiphy(wl); + struct wiphy *wiphy = cfg_to_wiphy(cfg_priv); s32 err = 0; - wl->scan_request = NULL; - wl->pwr_save = !!(wiphy->flags & WIPHY_FLAG_PS_ON_BY_DEFAULT); - wl->iscan_on = true; /* iscan on & off switch. + cfg_priv->scan_request = NULL; + cfg_priv->pwr_save = !!(wiphy->flags & WIPHY_FLAG_PS_ON_BY_DEFAULT); + cfg_priv->iscan_on = true; /* iscan on & off switch. we enable iscan per default */ - wl->roam_on = false; /* roam on & off switch. + cfg_priv->roam_on = false; /* roam on & off switch. we enable roam per default */ - wl->iscan_kickstart = false; - wl->active_scan = true; /* we do active scan for + cfg_priv->iscan_kickstart = false; + cfg_priv->active_scan = true; /* we do active scan for specific scan per default */ - wl->dongle_up = false; /* dongle is not up yet */ - wl_init_eq(wl); - err = wl_init_priv_mem(wl); + cfg_priv->dongle_up = false; /* dongle is not up yet */ + brcmf_init_eq(cfg_priv); + err = brcmf_init_priv_mem(cfg_priv); if (unlikely(err)) return err; - if (unlikely(wl_create_event_handler(wl))) + if (unlikely(brcmf_create_event_handler(cfg_priv))) return -ENOMEM; - wl_init_eloop_handler(&wl->el); - mutex_init(&wl->usr_sync); - err = wl_init_iscan(wl); + brcmf_init_eloop_handler(&cfg_priv->el); + mutex_init(&cfg_priv->usr_sync); + err = brcmf_init_iscan(cfg_priv); if (unlikely(err)) return err; - wl_init_fw(wl->fw); - wl_init_conf(wl->conf); - wl_init_prof(wl->profile); - wl_link_down(wl); + brcmf_init_conf(cfg_priv->conf); + brcmf_init_prof(cfg_priv->profile); + brcmf_link_down(cfg_priv); return err; } -static void wl_deinit_priv(struct wl_priv *wl) +static void wl_deinit_priv(struct brcmf_cfg80211_priv *cfg_priv) { - wl_destroy_event_handler(wl); - wl->dongle_up = false; /* dongle down */ - wl_flush_eq(wl); - wl_link_down(wl); - wl_term_iscan(wl); - wl_deinit_priv_mem(wl); + brcmf_destroy_event_handler(cfg_priv); + cfg_priv->dongle_up = false; /* dongle down */ + brcmf_flush_eq(cfg_priv); + brcmf_link_down(cfg_priv); + brcmf_term_iscan(cfg_priv); + brcmf_deinit_priv_mem(cfg_priv); } -s32 wl_cfg80211_attach(struct net_device *ndev, void *data) +s32 brcmf_cfg80211_attach(struct net_device *ndev, void *data) { struct wireless_dev *wdev; - struct wl_priv *wl; - struct wl_iface *ci; + struct brcmf_cfg80211_priv *cfg_priv; + struct brcmf_cfg80211_iface *ci; s32 err = 0; if (unlikely(!ndev)) { WL_ERR("ndev is invalid\n"); return -ENODEV; } - wl_cfg80211_dev = kzalloc(sizeof(struct wl_dev), GFP_KERNEL); - if (unlikely(!wl_cfg80211_dev)) { + cfg80211_dev = kzalloc(sizeof(struct brcmf_cfg80211_dev), GFP_KERNEL); + if (unlikely(!cfg80211_dev)) { WL_ERR("wl_cfg80211_dev is invalid\n"); return -ENOMEM; } - WL_INFO("func %p\n", wl_cfg80211_get_sdio_func()); - wdev = wl_alloc_wdev(sizeof(struct wl_iface), &wl_cfg80211_get_sdio_func()->dev); + WL_INFO("func %p\n", brcmf_cfg80211_get_sdio_func()); + wdev = brcmf_alloc_wdev(sizeof(struct brcmf_cfg80211_iface), + &brcmf_cfg80211_get_sdio_func()->dev); if (IS_ERR(wdev)) return -ENOMEM; - wdev->iftype = wl_mode_to_nl80211_iftype(WL_MODE_BSS); - wl = wdev_to_wl(wdev); - wl->wdev = wdev; - wl->pub = data; - ci = (struct wl_iface *)wl_to_ci(wl); - ci->wl = wl; + wdev->iftype = brcmf_mode_to_nl80211_iftype(WL_MODE_BSS); + cfg_priv = wdev_to_cfg(wdev); + cfg_priv->wdev = wdev; + cfg_priv->pub = data; + ci = (struct brcmf_cfg80211_iface *)&cfg_priv->ci; + ci->cfg_priv = cfg_priv; ndev->ieee80211_ptr = wdev; SET_NETDEV_DEV(ndev, wiphy_dev(wdev->wiphy)); wdev->netdev = ndev; - err = wl_init_priv(wl); + err = wl_init_priv(cfg_priv); if (unlikely(err)) { WL_ERR("Failed to init iwm_priv (%d)\n", err); goto cfg80211_attach_out; } - wl_set_drvdata(wl_cfg80211_dev, ci); + brcmf_set_drvdata(cfg80211_dev, ci); return err; cfg80211_attach_out: - wl_free_wdev(wl); + brcmf_free_wdev(cfg_priv); return err; } -void wl_cfg80211_detach(void) +void brcmf_cfg80211_detach(void) { - struct wl_priv *wl; + struct brcmf_cfg80211_priv *cfg_priv; - wl = WL_PRIV_GET(); + cfg_priv = WL_PRIV_GET(); - wl_deinit_priv(wl); - wl_free_wdev(wl); - wl_set_drvdata(wl_cfg80211_dev, NULL); - kfree(wl_cfg80211_dev); - wl_cfg80211_dev = NULL; - wl_clear_sdio_func(); + wl_deinit_priv(cfg_priv); + brcmf_free_wdev(cfg_priv); + brcmf_set_drvdata(cfg80211_dev, NULL); + kfree(cfg80211_dev); + cfg80211_dev = NULL; + brcmf_clear_sdio_func(); } -static void wl_wakeup_event(struct wl_priv *wl) +static void brcmf_wakeup_event(struct brcmf_cfg80211_priv *cfg_priv) { - up(&wl->event_sync); + up(&cfg_priv->event_sync); } -static s32 wl_event_handler(void *data) +static s32 brcmf_event_handler(void *data) { - struct wl_priv *wl = (struct wl_priv *)data; + struct brcmf_cfg80211_priv *cfg_priv = + (struct brcmf_cfg80211_priv *)data; struct sched_param param = {.sched_priority = MAX_RT_PRIO - 1 }; - struct wl_event_q *e; + struct brcmf_cfg80211_event_q *e; sched_setscheduler(current, SCHED_FIFO, ¶m); allow_signal(SIGTERM); - while (likely(!down_interruptible(&wl->event_sync))) { + while (likely(!down_interruptible(&cfg_priv->event_sync))) { if (kthread_should_stop()) break; - e = wl_deq_event(wl); + e = brcmf_deq_event(cfg_priv); if (unlikely(!e)) { WL_ERR("event queue empty...\n"); BUG(); } WL_INFO("event type (%d)\n", e->etype); - if (wl->el.handler[e->etype]) { - wl->el.handler[e->etype] (wl, wl_to_ndev(wl), &e->emsg, - e->edata); + if (cfg_priv->el.handler[e->etype]) { + cfg_priv->el.handler[e->etype](cfg_priv, + cfg_to_ndev(cfg_priv), + &e->emsg, e->edata); } else { WL_INFO("Unknown Event (%d): ignoring\n", e->etype); } - wl_put_event(e); + brcmf_put_event(e); } WL_INFO("was terminated\n"); return 0; } void -wl_cfg80211_event(struct net_device *ndev, const wl_event_msg_t * e, void *data) +brcmf_cfg80211_event(struct net_device *ndev, + const struct brcmf_event_msg *e, void *data) { u32 event_type = be32_to_cpu(e->event_type); - struct wl_priv *wl = ndev_to_wl(ndev); + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(ndev); - if (likely(!wl_enq_event(wl, event_type, e, data))) - wl_wakeup_event(wl); + if (likely(!brcmf_enq_event(cfg_priv, event_type, e, data))) + brcmf_wakeup_event(cfg_priv); } -static void wl_init_eq(struct wl_priv *wl) +static void brcmf_init_eq(struct brcmf_cfg80211_priv *cfg_priv) { - wl_init_eq_lock(wl); - INIT_LIST_HEAD(&wl->eq_list); + brcmf_init_eq_lock(cfg_priv); + INIT_LIST_HEAD(&cfg_priv->eq_list); } -static void wl_flush_eq(struct wl_priv *wl) +static void brcmf_flush_eq(struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_event_q *e; + struct brcmf_cfg80211_event_q *e; - wl_lock_eq(wl); - while (!list_empty(&wl->eq_list)) { - e = list_first_entry(&wl->eq_list, struct wl_event_q, eq_list); + brcmf_lock_eq(cfg_priv); + while (!list_empty(&cfg_priv->eq_list)) { + e = list_first_entry(&cfg_priv->eq_list, + struct brcmf_cfg80211_event_q, eq_list); list_del(&e->eq_list); kfree(e); } - wl_unlock_eq(wl); + brcmf_unlock_eq(cfg_priv); } /* * retrieve first queued event from head */ -static struct wl_event_q *wl_deq_event(struct wl_priv *wl) +static struct brcmf_cfg80211_event_q *brcmf_deq_event( + struct brcmf_cfg80211_priv *cfg_priv) { - struct wl_event_q *e = NULL; + struct brcmf_cfg80211_event_q *e = NULL; - wl_lock_eq(wl); - if (likely(!list_empty(&wl->eq_list))) { - e = list_first_entry(&wl->eq_list, struct wl_event_q, eq_list); + brcmf_lock_eq(cfg_priv); + if (likely(!list_empty(&cfg_priv->eq_list))) { + e = list_first_entry(&cfg_priv->eq_list, + struct brcmf_cfg80211_event_q, eq_list); list_del(&e->eq_list); } - wl_unlock_eq(wl); + brcmf_unlock_eq(cfg_priv); return e; } @@ -3566,50 +3590,49 @@ static struct wl_event_q *wl_deq_event(struct wl_priv *wl) */ static s32 -wl_enq_event(struct wl_priv *wl, u32 event, const wl_event_msg_t *msg, - void *data) +brcmf_enq_event(struct brcmf_cfg80211_priv *cfg_priv, u32 event, + const struct brcmf_event_msg *msg, void *data) { - struct wl_event_q *e; + struct brcmf_cfg80211_event_q *e; s32 err = 0; - e = kzalloc(sizeof(struct wl_event_q), GFP_KERNEL); + e = kzalloc(sizeof(struct brcmf_cfg80211_event_q), GFP_KERNEL); if (unlikely(!e)) { WL_ERR("event alloc failed\n"); return -ENOMEM; } e->etype = event; - memcpy(&e->emsg, msg, sizeof(wl_event_msg_t)); - if (data) { - } - wl_lock_eq(wl); - list_add_tail(&e->eq_list, &wl->eq_list); - wl_unlock_eq(wl); + memcpy(&e->emsg, msg, sizeof(struct brcmf_event_msg)); + + brcmf_lock_eq(cfg_priv); + list_add_tail(&e->eq_list, &cfg_priv->eq_list); + brcmf_unlock_eq(cfg_priv); return err; } -static void wl_put_event(struct wl_event_q *e) +static void brcmf_put_event(struct brcmf_cfg80211_event_q *e) { kfree(e); } -void wl_cfg80211_sdio_func(void *func) +void brcmf_cfg80211_sdio_func(void *func) { cfg80211_sdio_func = (struct sdio_func *)func; } -static void wl_clear_sdio_func(void) +static void brcmf_clear_sdio_func(void) { cfg80211_sdio_func = NULL; } -struct sdio_func *wl_cfg80211_get_sdio_func(void) +struct sdio_func *brcmf_cfg80211_get_sdio_func(void) { return cfg80211_sdio_func; } -static s32 wl_dongle_mode(struct net_device *ndev, s32 iftype) +static s32 brcmf_dongle_mode(struct net_device *ndev, s32 iftype) { s32 infra = 0; s32 err = 0; @@ -3633,7 +3656,7 @@ static s32 wl_dongle_mode(struct net_device *ndev, s32 iftype) return err; } infra = cpu_to_le32(infra); - err = wl_dev_ioctl(ndev, WLC_SET_INFRA, &infra, sizeof(infra)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_INFRA, &infra, sizeof(infra)); if (unlikely(err)) { WL_ERR("WLC_SET_INFRA error (%d)\n", err); return err; @@ -3642,253 +3665,48 @@ static s32 wl_dongle_mode(struct net_device *ndev, s32 iftype) return 0; } -#ifndef EMBEDDED_PLATFORM -static s32 wl_dongle_country(struct net_device *ndev, u8 ccode) +static s32 brcmf_dongle_eventmsg(struct net_device *ndev) { - - s32 err = 0; - - return err; -} - -static s32 wl_dongle_up(struct net_device *ndev, u32 up) -{ - s32 err = 0; - - err = wl_dev_ioctl(ndev, WLC_UP, &up, sizeof(up)); - if (unlikely(err)) { - WL_ERR("WLC_UP error (%d)\n", err); - } - return err; -} - -static s32 wl_dongle_power(struct net_device *ndev, u32 power_mode) -{ - s32 err = 0; - - err = wl_dev_ioctl(ndev, WLC_SET_PM, &power_mode, sizeof(power_mode)); - if (unlikely(err)) { - WL_ERR("WLC_SET_PM error (%d)\n", err); - } - return err; -} - -static s32 -wl_dongle_glom(struct net_device *ndev, u32 glom, u32 dongle_align) -{ - s8 iovbuf[WL_EVENTING_MASK_LEN + 12]; /* Room for "event_msgs" + - '\0' + bitvec */ - s32 err = 0; - - /* Match Host and Dongle rx alignment */ - bcm_mkiovar("bus:txglomalign", (char *)&dongle_align, 4, iovbuf, - sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); - if (unlikely(err)) { - WL_ERR("txglomalign error (%d)\n", err); - goto dongle_glom_out; - } - /* disable glom option per default */ - bcm_mkiovar("bus:txglom", (char *)&glom, 4, iovbuf, sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); - if (unlikely(err)) { - WL_ERR("txglom error (%d)\n", err); - goto dongle_glom_out; - } -dongle_glom_out: - return err; -} - -static s32 -wl_dongle_offload(struct net_device *ndev, s32 arpoe, s32 arp_ol) -{ - s8 iovbuf[WL_EVENTING_MASK_LEN + 12]; /* Room for "event_msgs" + - '\0' + bitvec */ - s32 err = 0; - - /* Set ARP offload */ - bcm_mkiovar("arpoe", (char *)&arpoe, 4, iovbuf, sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); - if (err) { - if (err == -EOPNOTSUPP) - WL_INFO("arpoe is not supported\n"); - else - WL_ERR("arpoe error (%d)\n", err); - - goto dongle_offload_out; - } - bcm_mkiovar("arp_ol", (char *)&arp_ol, 4, iovbuf, sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); - if (err) { - if (err == -EOPNOTSUPP) - WL_INFO("arp_ol is not supported\n"); - else - WL_ERR("arp_ol error (%d)\n", err); - - goto dongle_offload_out; - } - -dongle_offload_out: - return err; -} - -static s32 wl_pattern_atoh(s8 *src, s8 *dst) -{ - int i; - if (strncmp(src, "0x", 2) != 0 && strncmp(src, "0X", 2) != 0) { - WL_ERR("Mask invalid format. Needs to start with 0x\n"); - return -1; - } - src = src + 2; /* Skip past 0x */ - if (strlen(src) % 2 != 0) { - WL_ERR("Mask invalid format. Needs to be of even length\n"); - return -1; - } - for (i = 0; *src != '\0'; i++) { - char num[3]; - strncpy(num, src, 2); - num[2] = '\0'; - dst[i] = (u8) simple_strtoul(num, NULL, 16); - src += 2; - } - return i; -} - -static s32 wl_dongle_filter(struct net_device *ndev, u32 filter_mode) -{ - s8 iovbuf[WL_EVENTING_MASK_LEN + 12]; /* Room for "event_msgs" + - '\0' + bitvec */ - const s8 *str; - struct wl_pkt_filter pkt_filter; - struct wl_pkt_filter *pkt_filterp; - s32 buf_len; - s32 str_len; - u32 mask_size; - u32 pattern_size; - s8 buf[256]; - s32 err = 0; - -/* add a default packet filter pattern */ - str = "pkt_filter_add"; - str_len = strlen(str); - strncpy(buf, str, str_len); - buf[str_len] = '\0'; - buf_len = str_len + 1; - - pkt_filterp = (struct wl_pkt_filter *)(buf + str_len + 1); - - /* Parse packet filter id. */ - pkt_filter.id = cpu_to_le32(100); - - /* Parse filter polarity. */ - pkt_filter.negate_match = cpu_to_le32(0); - - /* Parse filter type. */ - pkt_filter.type = cpu_to_le32(0); - - /* Parse pattern filter offset. */ - pkt_filter.u.pattern.offset = cpu_to_le32(0); - - /* Parse pattern filter mask. */ - mask_size = cpu_to_le32(wl_pattern_atoh("0xff", - (char *)pkt_filterp->u.pattern. - mask_and_pattern)); - - /* Parse pattern filter pattern. */ - pattern_size = cpu_to_le32(wl_pattern_atoh("0x00", - (char *)&pkt_filterp->u. - pattern. - mask_and_pattern - [mask_size])); - - if (mask_size != pattern_size) { - WL_ERR("Mask and pattern not the same size\n"); - err = -EINVAL; - goto dongle_filter_out; - } - - pkt_filter.u.pattern.size_bytes = mask_size; - buf_len += WL_PKT_FILTER_FIXED_LEN; - buf_len += (WL_PKT_FILTER_PATTERN_FIXED_LEN + 2 * mask_size); - - /* Keep-alive attributes are set in local - * variable (keep_alive_pkt), and - * then memcpy'ed into buffer (keep_alive_pktp) since there is no - * guarantee that the buffer is properly aligned. - */ - memcpy((char *)pkt_filterp, &pkt_filter, - WL_PKT_FILTER_FIXED_LEN + WL_PKT_FILTER_PATTERN_FIXED_LEN); - - err = wl_dev_ioctl(ndev, WLC_SET_VAR, buf, buf_len); - if (err) { - if (err == -EOPNOTSUPP) { - WL_INFO("filter not supported\n"); - } else { - WL_ERR("filter (%d)\n", err); - } - goto dongle_filter_out; - } - - /* set mode to allow pattern */ - bcm_mkiovar("pkt_filter_mode", (char *)&filter_mode, 4, iovbuf, - sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); - if (err) { - if (err == -EOPNOTSUPP) { - WL_INFO("filter_mode not supported\n"); - } else { - WL_ERR("filter_mode (%d)\n", err); - } - goto dongle_filter_out; - } - -dongle_filter_out: - return err; -} -#endif /* !EMBEDDED_PLATFORM */ - -static s32 wl_dongle_eventmsg(struct net_device *ndev) -{ - s8 iovbuf[WL_EVENTING_MASK_LEN + 12]; /* Room for "event_msgs" + - '\0' + bitvec */ - s8 eventmask[WL_EVENTING_MASK_LEN]; + /* Room for "event_msgs" + '\0' + bitvec */ + s8 iovbuf[BRCMF_EVENTING_MASK_LEN + 12]; + s8 eventmask[BRCMF_EVENTING_MASK_LEN]; s32 err = 0; WL_TRACE("Enter\n"); /* Setup event_msgs */ - bcm_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf, + brcmu_mkiovar("event_msgs", eventmask, BRCMF_EVENTING_MASK_LEN, iovbuf, sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_GET_VAR, iovbuf, sizeof(iovbuf)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_GET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { WL_ERR("Get event_msgs error (%d)\n", err); goto dongle_eventmsg_out; } - memcpy(eventmask, iovbuf, WL_EVENTING_MASK_LEN); - - setbit(eventmask, WLC_E_SET_SSID); - setbit(eventmask, WLC_E_ROAM); - setbit(eventmask, WLC_E_PRUNE); - setbit(eventmask, WLC_E_AUTH); - setbit(eventmask, WLC_E_REASSOC); - setbit(eventmask, WLC_E_REASSOC_IND); - setbit(eventmask, WLC_E_DEAUTH_IND); - setbit(eventmask, WLC_E_DISASSOC_IND); - setbit(eventmask, WLC_E_DISASSOC); - setbit(eventmask, WLC_E_JOIN); - setbit(eventmask, WLC_E_ASSOC_IND); - setbit(eventmask, WLC_E_PSK_SUP); - setbit(eventmask, WLC_E_LINK); - setbit(eventmask, WLC_E_NDIS_LINK); - setbit(eventmask, WLC_E_MIC_ERROR); - setbit(eventmask, WLC_E_PMKID_CACHE); - setbit(eventmask, WLC_E_TXFAIL); - setbit(eventmask, WLC_E_JOIN_START); - setbit(eventmask, WLC_E_SCAN_COMPLETE); - - bcm_mkiovar("event_msgs", eventmask, WL_EVENTING_MASK_LEN, iovbuf, + memcpy(eventmask, iovbuf, BRCMF_EVENTING_MASK_LEN); + + setbit(eventmask, BRCMF_E_SET_SSID); + setbit(eventmask, BRCMF_E_ROAM); + setbit(eventmask, BRCMF_E_PRUNE); + setbit(eventmask, BRCMF_E_AUTH); + setbit(eventmask, BRCMF_E_REASSOC); + setbit(eventmask, BRCMF_E_REASSOC_IND); + setbit(eventmask, BRCMF_E_DEAUTH_IND); + setbit(eventmask, BRCMF_E_DISASSOC_IND); + setbit(eventmask, BRCMF_E_DISASSOC); + setbit(eventmask, BRCMF_E_JOIN); + setbit(eventmask, BRCMF_E_ASSOC_IND); + setbit(eventmask, BRCMF_E_PSK_SUP); + setbit(eventmask, BRCMF_E_LINK); + setbit(eventmask, BRCMF_E_NDIS_LINK); + setbit(eventmask, BRCMF_E_MIC_ERROR); + setbit(eventmask, BRCMF_E_PMKID_CACHE); + setbit(eventmask, BRCMF_E_TXFAIL); + setbit(eventmask, BRCMF_E_JOIN_START); + setbit(eventmask, BRCMF_E_SCAN_COMPLETE); + + brcmu_mkiovar("event_msgs", eventmask, BRCMF_EVENTING_MASK_LEN, iovbuf, sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { WL_ERR("Set event_msgs error (%d)\n", err); goto dongle_eventmsg_out; @@ -3900,7 +3718,7 @@ dongle_eventmsg_out: } static s32 -wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout) +brcmf_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout) { s8 iovbuf[32]; s32 roamtrigger[2]; @@ -3912,9 +3730,10 @@ wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout) * off to report link down */ if (roamvar) { - bcm_mkiovar("bcn_timeout", (char *)&bcn_timeout, + brcmu_mkiovar("bcn_timeout", (char *)&bcn_timeout, sizeof(bcn_timeout), iovbuf, sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_VAR, + iovbuf, sizeof(iovbuf)); if (unlikely(err)) { WL_ERR("bcn_timeout error (%d)\n", err); goto dongle_rom_out; @@ -3926,17 +3745,17 @@ wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout) * to take care of roaming */ WL_INFO("Internal Roaming = %s\n", roamvar ? "Off" : "On"); - bcm_mkiovar("roam_off", (char *)&roamvar, + brcmu_mkiovar("roam_off", (char *)&roamvar, sizeof(roamvar), iovbuf, sizeof(iovbuf)); - err = wl_dev_ioctl(ndev, WLC_SET_VAR, iovbuf, sizeof(iovbuf)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_VAR, iovbuf, sizeof(iovbuf)); if (unlikely(err)) { WL_ERR("roam_off error (%d)\n", err); goto dongle_rom_out; } roamtrigger[0] = WL_ROAM_TRIGGER_LEVEL; - roamtrigger[1] = WLC_BAND_ALL; - err = wl_dev_ioctl(ndev, WLC_SET_ROAM_TRIGGER, + roamtrigger[1] = BRCM_BAND_ALL; + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_ROAM_TRIGGER, (void *)roamtrigger, sizeof(roamtrigger)); if (unlikely(err)) { WL_ERR("WLC_SET_ROAM_TRIGGER error (%d)\n", err); @@ -3944,8 +3763,8 @@ wl_dongle_roam(struct net_device *ndev, u32 roamvar, u32 bcn_timeout) } roam_delta[0] = WL_ROAM_DELTA; - roam_delta[1] = WLC_BAND_ALL; - err = wl_dev_ioctl(ndev, WLC_SET_ROAM_DELTA, + roam_delta[1] = BRCM_BAND_ALL; + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_ROAM_DELTA, (void *)roam_delta, sizeof(roam_delta)); if (unlikely(err)) { WL_ERR("WLC_SET_ROAM_DELTA error (%d)\n", err); @@ -3957,13 +3776,13 @@ dongle_rom_out: } static s32 -wl_dongle_scantime(struct net_device *ndev, s32 scan_assoc_time, +brcmf_dongle_scantime(struct net_device *ndev, s32 scan_assoc_time, s32 scan_unassoc_time, s32 scan_passive_time) { s32 err = 0; - err = wl_dev_ioctl(ndev, WLC_SET_SCAN_CHANNEL_TIME, &scan_assoc_time, - sizeof(scan_assoc_time)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_SCAN_CHANNEL_TIME, + &scan_assoc_time, sizeof(scan_assoc_time)); if (err) { if (err == -EOPNOTSUPP) WL_INFO("Scan assoc time is not supported\n"); @@ -3971,8 +3790,8 @@ wl_dongle_scantime(struct net_device *ndev, s32 scan_assoc_time, WL_ERR("Scan assoc time error (%d)\n", err); goto dongle_scantime_out; } - err = wl_dev_ioctl(ndev, WLC_SET_SCAN_UNASSOC_TIME, &scan_unassoc_time, - sizeof(scan_unassoc_time)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_SCAN_UNASSOC_TIME, + &scan_unassoc_time, sizeof(scan_unassoc_time)); if (err) { if (err == -EOPNOTSUPP) WL_INFO("Scan unassoc time is not supported\n"); @@ -3981,8 +3800,8 @@ wl_dongle_scantime(struct net_device *ndev, s32 scan_assoc_time, goto dongle_scantime_out; } - err = wl_dev_ioctl(ndev, WLC_SET_SCAN_PASSIVE_TIME, &scan_passive_time, - sizeof(scan_passive_time)); + err = brcmf_dev_ioctl(ndev, BRCMF_C_SET_SCAN_PASSIVE_TIME, + &scan_passive_time, sizeof(scan_passive_time)); if (err) { if (err == -EOPNOTSUPP) WL_INFO("Scan passive time is not supported\n"); @@ -3995,54 +3814,34 @@ dongle_scantime_out: return err; } -s32 wl_config_dongle(struct wl_priv *wl, bool need_lock) +s32 brcmf_config_dongle(struct brcmf_cfg80211_priv *cfg_priv, bool need_lock) { -#ifndef DHD_SDALIGN -#define DHD_SDALIGN 32 -#endif struct net_device *ndev; struct wireless_dev *wdev; s32 err = 0; - if (wl->dongle_up) + if (cfg_priv->dongle_up) return err; - ndev = wl_to_ndev(wl); + ndev = cfg_to_ndev(cfg_priv); wdev = ndev->ieee80211_ptr; if (need_lock) rtnl_lock(); -#ifndef EMBEDDED_PLATFORM - err = wl_dongle_up(ndev, 0); - if (unlikely(err)) - goto default_conf_out; - err = wl_dongle_country(ndev, 0); - if (unlikely(err)) - goto default_conf_out; - err = wl_dongle_power(ndev, PM_FAST); - if (unlikely(err)) - goto default_conf_out; - err = wl_dongle_glom(ndev, 0, DHD_SDALIGN); - if (unlikely(err)) - goto default_conf_out; - - wl_dongle_offload(ndev, 1, 0xf); - wl_dongle_filter(ndev, 1); -#endif /* !EMBEDDED_PLATFORM */ - - wl_dongle_scantime(ndev, WL_SCAN_CHANNEL_TIME, + brcmf_dongle_scantime(ndev, WL_SCAN_CHANNEL_TIME, WL_SCAN_UNASSOC_TIME, WL_SCAN_PASSIVE_TIME); - err = wl_dongle_eventmsg(ndev); + err = brcmf_dongle_eventmsg(ndev); if (unlikely(err)) goto default_conf_out; - err = wl_dongle_roam(ndev, (wl->roam_on ? 0 : 1), WL_BEACON_TIMEOUT); + err = brcmf_dongle_roam(ndev, (cfg_priv->roam_on ? 0 : 1), + WL_BEACON_TIMEOUT); if (unlikely(err)) goto default_conf_out; - err = wl_dongle_mode(ndev, wdev->iftype); + err = brcmf_dongle_mode(ndev, wdev->iftype); if (unlikely(err && err != -EINPROGRESS)) goto default_conf_out; - err = wl_dongle_probecap(wl); + err = brcmf_dongle_probecap(cfg_priv); if (unlikely(err)) goto default_conf_out; @@ -4052,21 +3851,21 @@ default_conf_out: if (need_lock) rtnl_unlock(); - wl->dongle_up = true; + cfg_priv->dongle_up = true; return err; } -static s32 wl_update_wiphybands(struct wl_priv *wl) +static s32 wl_update_wiphybands(struct brcmf_cfg80211_priv *cfg_priv) { struct wiphy *wiphy; s32 phy_list; s8 phy; s32 err = 0; - err = wl_dev_ioctl(wl_to_ndev(wl), WLC_GET_PHYLIST, &phy_list, - sizeof(phy_list)); + err = brcmf_dev_ioctl(cfg_to_ndev(cfg_priv), BRCM_GET_PHYLIST, + &phy_list, sizeof(phy_list)); if (unlikely(err)) { WL_ERR("error (%d)\n", err); return err; @@ -4075,131 +3874,144 @@ static s32 wl_update_wiphybands(struct wl_priv *wl) phy = ((char *)&phy_list)[1]; WL_INFO("%c phy\n", phy); if (phy == 'n' || phy == 'a') { - wiphy = wl_to_wiphy(wl); + wiphy = cfg_to_wiphy(cfg_priv); wiphy->bands[IEEE80211_BAND_5GHZ] = &__wl_band_5ghz_n; } return err; } -static s32 __wl_cfg80211_up(struct wl_priv *wl) +static s32 __brcmf_cfg80211_up(struct brcmf_cfg80211_priv *cfg_priv) { s32 err = 0; - set_bit(WL_STATUS_READY, &wl->status); + set_bit(WL_STATUS_READY, &cfg_priv->status); - wl_debugfs_add_netdev_params(wl); + brcmf_debugfs_add_netdev_params(cfg_priv); - err = wl_config_dongle(wl, false); + err = brcmf_config_dongle(cfg_priv, false); if (unlikely(err)) return err; - wl_invoke_iscan(wl); + brcmf_invoke_iscan(cfg_priv); return err; } -static s32 __wl_cfg80211_down(struct wl_priv *wl) +static s32 __brcmf_cfg80211_down(struct brcmf_cfg80211_priv *cfg_priv) { - set_bit(WL_STATUS_SCAN_ABORTING, &wl->status); - wl_term_iscan(wl); - if (wl->scan_request) { - cfg80211_scan_done(wl->scan_request, true); + /* + * While going down, if associated with AP disassociate + * from AP to save power + */ + if ((test_bit(WL_STATUS_CONNECTED, &cfg_priv->status) || + test_bit(WL_STATUS_CONNECTING, &cfg_priv->status)) && + test_bit(WL_STATUS_READY, &cfg_priv->status)) { + WL_INFO("Disassociating from AP"); + brcmf_link_down(cfg_priv); + + /* Make sure WPA_Supplicant receives all the event + generated due to DISASSOC call to the fw to keep + the state fw and WPA_Supplicant state consistent + */ + rtnl_unlock(); + brcmf_delay(500); + rtnl_lock(); + } + + set_bit(WL_STATUS_SCAN_ABORTING, &cfg_priv->status); + brcmf_term_iscan(cfg_priv); + if (cfg_priv->scan_request) { + cfg80211_scan_done(cfg_priv->scan_request, true); /* May need to perform this to cover rmmod */ - /* wl_set_mpc(wl_to_ndev(wl), 1); */ - wl->scan_request = NULL; + /* wl_set_mpc(cfg_to_ndev(wl), 1); */ + cfg_priv->scan_request = NULL; } - clear_bit(WL_STATUS_READY, &wl->status); - clear_bit(WL_STATUS_SCANNING, &wl->status); - clear_bit(WL_STATUS_SCAN_ABORTING, &wl->status); - clear_bit(WL_STATUS_CONNECTING, &wl->status); - clear_bit(WL_STATUS_CONNECTED, &wl->status); + clear_bit(WL_STATUS_READY, &cfg_priv->status); + clear_bit(WL_STATUS_SCANNING, &cfg_priv->status); + clear_bit(WL_STATUS_SCAN_ABORTING, &cfg_priv->status); - wl_debugfs_remove_netdev(wl); + brcmf_debugfs_remove_netdev(cfg_priv); return 0; } -s32 wl_cfg80211_up(void) +s32 brcmf_cfg80211_up(void) { - struct wl_priv *wl; + struct brcmf_cfg80211_priv *cfg_priv; s32 err = 0; - wl = WL_PRIV_GET(); - mutex_lock(&wl->usr_sync); - err = __wl_cfg80211_up(wl); - mutex_unlock(&wl->usr_sync); + cfg_priv = WL_PRIV_GET(); + mutex_lock(&cfg_priv->usr_sync); + err = __brcmf_cfg80211_up(cfg_priv); + mutex_unlock(&cfg_priv->usr_sync); return err; } -s32 wl_cfg80211_down(void) +s32 brcmf_cfg80211_down(void) { - struct wl_priv *wl; + struct brcmf_cfg80211_priv *cfg_priv; s32 err = 0; - wl = WL_PRIV_GET(); - mutex_lock(&wl->usr_sync); - err = __wl_cfg80211_down(wl); - mutex_unlock(&wl->usr_sync); + cfg_priv = WL_PRIV_GET(); + mutex_lock(&cfg_priv->usr_sync); + err = __brcmf_cfg80211_down(cfg_priv); + mutex_unlock(&cfg_priv->usr_sync); return err; } -static s32 wl_dongle_probecap(struct wl_priv *wl) +static s32 brcmf_dongle_probecap(struct brcmf_cfg80211_priv *cfg_priv) { - s32 err = 0; - - err = wl_update_wiphybands(wl); - if (unlikely(err)) - return err; - - return err; + return wl_update_wiphybands(cfg_priv); } -static void *wl_read_prof(struct wl_priv *wl, s32 item) +static void *brcmf_read_prof(struct brcmf_cfg80211_priv *cfg_priv, s32 item) { switch (item) { case WL_PROF_SEC: - return &wl->profile->sec; + return &cfg_priv->profile->sec; case WL_PROF_BSSID: - return &wl->profile->bssid; + return &cfg_priv->profile->bssid; case WL_PROF_SSID: - return &wl->profile->ssid; + return &cfg_priv->profile->ssid; } WL_ERR("invalid item (%d)\n", item); return NULL; } static s32 -wl_update_prof(struct wl_priv *wl, const wl_event_msg_t *e, void *data, - s32 item) +brcmf_update_prof(struct brcmf_cfg80211_priv *cfg_priv, + const struct brcmf_event_msg *e, void *data, s32 item) { s32 err = 0; - struct wlc_ssid *ssid; + struct brcmf_ssid *ssid; switch (item) { case WL_PROF_SSID: - ssid = (wlc_ssid_t *) data; - memset(wl->profile->ssid.SSID, 0, - sizeof(wl->profile->ssid.SSID)); - memcpy(wl->profile->ssid.SSID, ssid->SSID, ssid->SSID_len); - wl->profile->ssid.SSID_len = ssid->SSID_len; + ssid = (struct brcmf_ssid *) data; + memset(cfg_priv->profile->ssid.SSID, 0, + sizeof(cfg_priv->profile->ssid.SSID)); + memcpy(cfg_priv->profile->ssid.SSID, + ssid->SSID, ssid->SSID_len); + cfg_priv->profile->ssid.SSID_len = ssid->SSID_len; break; case WL_PROF_BSSID: if (data) - memcpy(wl->profile->bssid, data, ETH_ALEN); + memcpy(cfg_priv->profile->bssid, data, ETH_ALEN); else - memset(wl->profile->bssid, 0, ETH_ALEN); + memset(cfg_priv->profile->bssid, 0, ETH_ALEN); break; case WL_PROF_SEC: - memcpy(&wl->profile->sec, data, sizeof(wl->profile->sec)); + memcpy(&cfg_priv->profile->sec, data, + sizeof(cfg_priv->profile->sec)); break; case WL_PROF_BEACONINT: - wl->profile->beacon_interval = *(u16 *)data; + cfg_priv->profile->beacon_interval = *(u16 *)data; break; case WL_PROF_DTIMPERIOD: - wl->profile->dtim_period = *(u8 *)data; + cfg_priv->profile->dtim_period = *(u8 *)data; break; default: WL_ERR("unsupported item (%d)\n", item); @@ -4210,14 +4022,15 @@ wl_update_prof(struct wl_priv *wl, const wl_event_msg_t *e, void *data, return err; } -static bool wl_is_ibssmode(struct wl_priv *wl) +static bool brcmf_is_ibssmode(struct brcmf_cfg80211_priv *cfg_priv) { - return wl->conf->mode == WL_MODE_IBSS; + return cfg_priv->conf->mode == WL_MODE_IBSS; } -static __used s32 wl_add_ie(struct wl_priv *wl, u8 t, u8 l, u8 *v) +static __used s32 brcmf_add_ie(struct brcmf_cfg80211_priv *cfg_priv, + u8 t, u8 l, u8 *v) { - struct wl_ie *ie = wl_to_ie(wl); + struct brcmf_cfg80211_ie *ie = &cfg_priv->ie; s32 err = 0; if (unlikely(ie->offset + l + 2 > WL_TLV_INFO_MAX)) { @@ -4232,42 +4045,40 @@ static __used s32 wl_add_ie(struct wl_priv *wl, u8 t, u8 l, u8 *v) return err; } - -static void wl_link_down(struct wl_priv *wl) +static void brcmf_link_down(struct brcmf_cfg80211_priv *cfg_priv) { struct net_device *dev = NULL; s32 err = 0; WL_TRACE("Enter\n"); - clear_bit(WL_STATUS_CONNECTED, &wl->status); - if (wl->link_up) { - dev = wl_to_ndev(wl); + if (cfg_priv->link_up) { + dev = cfg_to_ndev(cfg_priv); WL_INFO("Call WLC_DISASSOC to stop excess roaming\n "); - err = wl_dev_ioctl(dev, WLC_DISASSOC, NULL, 0); + err = brcmf_dev_ioctl(dev, BRCMF_C_DISASSOC, NULL, 0); if (unlikely(err)) WL_ERR("WLC_DISASSOC failed (%d)\n", err); - wl->link_up = false; + cfg_priv->link_up = false; } WL_TRACE("Exit\n"); } -static void wl_lock_eq(struct wl_priv *wl) +static void brcmf_lock_eq(struct brcmf_cfg80211_priv *cfg_priv) { - spin_lock_irq(&wl->eq_lock); + spin_lock_irq(&cfg_priv->eq_lock); } -static void wl_unlock_eq(struct wl_priv *wl) +static void brcmf_unlock_eq(struct brcmf_cfg80211_priv *cfg_priv) { - spin_unlock_irq(&wl->eq_lock); + spin_unlock_irq(&cfg_priv->eq_lock); } -static void wl_init_eq_lock(struct wl_priv *wl) +static void brcmf_init_eq_lock(struct brcmf_cfg80211_priv *cfg_priv) { - spin_lock_init(&wl->eq_lock); + spin_lock_init(&cfg_priv->eq_lock); } -static void wl_delay(u32 ms) +static void brcmf_delay(u32 ms) { if (ms < 1000 / HZ) { cond_resched(); @@ -4277,115 +4088,27 @@ static void wl_delay(u32 ms) } } -static void wl_set_drvdata(struct wl_dev *dev, void *data) +static void brcmf_set_drvdata(struct brcmf_cfg80211_dev *dev, void *data) { dev->driver_data = data; } -static void *wl_get_drvdata(struct wl_dev *dev) -{ - return dev->driver_data; -} - -s32 wl_cfg80211_read_fw(s8 *buf, u32 size) -{ - const struct firmware *fw_entry; - struct wl_priv *wl; - - wl = WL_PRIV_GET(); - - fw_entry = wl->fw->fw_entry; - - if (fw_entry->size < wl->fw->ptr + size) - size = fw_entry->size - wl->fw->ptr; - - memcpy(buf, &fw_entry->data[wl->fw->ptr], size); - wl->fw->ptr += size; - return size; -} - -void wl_cfg80211_release_fw(void) -{ - struct wl_priv *wl; - - wl = WL_PRIV_GET(); - release_firmware(wl->fw->fw_entry); - wl->fw->ptr = 0; -} - -void *wl_cfg80211_request_fw(s8 *file_name) -{ - struct wl_priv *wl; - const struct firmware *fw_entry = NULL; - s32 err = 0; - - WL_INFO("file name : \"%s\"\n", file_name); - wl = WL_PRIV_GET(); - - if (!test_bit(WL_FW_LOADING_DONE, &wl->fw->status)) { - err = request_firmware(&wl->fw->fw_entry, file_name, - &wl_cfg80211_get_sdio_func()->dev); - if (unlikely(err)) { - WL_ERR("Could not download fw (%d)\n", err); - goto req_fw_out; - } - set_bit(WL_FW_LOADING_DONE, &wl->fw->status); - fw_entry = wl->fw->fw_entry; - if (fw_entry) { - WL_INFO("fw size (%zd), data (%p)\n", - fw_entry->size, fw_entry->data); - } - } else if (!test_bit(WL_NVRAM_LOADING_DONE, &wl->fw->status)) { - err = request_firmware(&wl->fw->fw_entry, file_name, - &wl_cfg80211_get_sdio_func()->dev); - if (unlikely(err)) { - WL_ERR("Could not download nvram (%d)\n", err); - goto req_fw_out; - } - set_bit(WL_NVRAM_LOADING_DONE, &wl->fw->status); - fw_entry = wl->fw->fw_entry; - if (fw_entry) { - WL_INFO("nvram size (%zd), data (%p)\n", - fw_entry->size, fw_entry->data); - } - } else { - WL_INFO("Downloading already done. Nothing to do more\n"); - err = -EPERM; - } - -req_fw_out: - if (unlikely(err)) { - return NULL; - } - wl->fw->ptr = 0; - return (void *)fw_entry->data; -} - -s8 *wl_cfg80211_get_fwname(void) -{ - struct wl_priv *wl; - - wl = WL_PRIV_GET(); - strcpy(wl->fw->fw_name, WL_4329_FW_FILE); - return wl->fw->fw_name; -} - -s8 *wl_cfg80211_get_nvramname(void) +static void *brcmf_get_drvdata(struct brcmf_cfg80211_dev *dev) { - struct wl_priv *wl; + void *data = NULL; - wl = WL_PRIV_GET(); - strcpy(wl->fw->nvram_name, WL_4329_NVRAM_FILE); - return wl->fw->nvram_name; + if (dev) + data = dev->driver_data; + return data; } -static void wl_set_mpc(struct net_device *ndev, int mpc) +static void brcmf_set_mpc(struct net_device *ndev, int mpc) { s32 err = 0; - struct wl_priv *wl = ndev_to_wl(ndev); + struct brcmf_cfg80211_priv *cfg_priv = ndev_to_cfg(ndev); - if (test_bit(WL_STATUS_READY, &wl->status)) { - err = wl_dev_intvar_set(ndev, "mpc", mpc); + if (test_bit(WL_STATUS_READY, &cfg_priv->status)) { + err = brcmf_dev_intvar_set(ndev, "mpc", mpc); if (unlikely(err)) { WL_ERR("fail to set mpc\n"); return; @@ -4394,24 +4117,25 @@ static void wl_set_mpc(struct net_device *ndev, int mpc) } } -static int wl_debugfs_add_netdev_params(struct wl_priv *wl) +static int brcmf_debugfs_add_netdev_params(struct brcmf_cfg80211_priv *cfg_priv) { char buf[10+IFNAMSIZ]; struct dentry *fd; s32 err = 0; - sprintf(buf, "netdev:%s", wl_to_ndev(wl)->name); - wl->debugfsdir = debugfs_create_dir(buf, wl_to_wiphy(wl)->debugfsdir); + sprintf(buf, "netdev:%s", cfg_to_ndev(cfg_priv)->name); + cfg_priv->debugfsdir = debugfs_create_dir(buf, + cfg_to_wiphy(cfg_priv)->debugfsdir); - fd = debugfs_create_u16("beacon_int", S_IRUGO, wl->debugfsdir, - (u16 *)&wl->profile->beacon_interval); + fd = debugfs_create_u16("beacon_int", S_IRUGO, cfg_priv->debugfsdir, + (u16 *)&cfg_priv->profile->beacon_interval); if (!fd) { err = -ENOMEM; goto err_out; } - fd = debugfs_create_u8("dtim_period", S_IRUGO, wl->debugfsdir, - (u8 *)&wl->profile->dtim_period); + fd = debugfs_create_u8("dtim_period", S_IRUGO, cfg_priv->debugfsdir, + (u8 *)&cfg_priv->profile->dtim_period); if (!fd) { err = -ENOMEM; goto err_out; @@ -4421,8 +4145,8 @@ err_out: return err; } -static void wl_debugfs_remove_netdev(struct wl_priv *wl) +static void brcmf_debugfs_remove_netdev(struct brcmf_cfg80211_priv *cfg_priv) { - debugfs_remove_recursive(wl->debugfsdir); - wl->debugfsdir = NULL; + debugfs_remove_recursive(cfg_priv->debugfsdir); + cfg_priv->debugfsdir = NULL; } diff --git a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h index 996033cf9b0..f26d08793ca 100644 --- a/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h +++ b/drivers/staging/brcm80211/brcmfmac/wl_cfg80211.h @@ -17,16 +17,11 @@ #ifndef _wl_cfg80211_h_ #define _wl_cfg80211_h_ -#include <linux/wireless.h> -#include <linux/wireless.h> -#include <net/cfg80211.h> -#include <wlioctl.h> - -struct wl_conf; -struct wl_iface; -struct wl_priv; -struct wl_security; -struct wl_ibss; +struct brcmf_cfg80211_conf; +struct brcmf_cfg80211_iface; +struct brcmf_cfg80211_priv; +struct brcmf_cfg80211_security; +struct brcmf_cfg80211_ibss; #define WL_DBG_NONE 0 #define WL_DBG_CONN (1 << 5) @@ -39,7 +34,7 @@ struct wl_ibss; #define WL_ERR(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_ERR) { \ + if (brcmf_dbg_level & WL_DBG_ERR) { \ if (net_ratelimit()) { \ printk(KERN_ERR "ERROR @%s : " fmt, \ __func__, ##args); \ @@ -50,7 +45,7 @@ do { \ #if (defined BCMDBG) #define WL_INFO(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_INFO) { \ + if (brcmf_dbg_level & WL_DBG_INFO) { \ if (net_ratelimit()) { \ printk(KERN_ERR "INFO @%s : " fmt, \ __func__, ##args); \ @@ -60,7 +55,7 @@ do { \ #define WL_TRACE(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_TRACE) { \ + if (brcmf_dbg_level & WL_DBG_TRACE) { \ if (net_ratelimit()) { \ printk(KERN_ERR "TRACE @%s : " fmt, \ __func__, ##args); \ @@ -70,7 +65,7 @@ do { \ #define WL_SCAN(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_SCAN) { \ + if (brcmf_dbg_level & WL_DBG_SCAN) { \ if (net_ratelimit()) { \ printk(KERN_ERR "SCAN @%s : " fmt, \ __func__, ##args); \ @@ -80,7 +75,7 @@ do { \ #define WL_CONN(fmt, args...) \ do { \ - if (wl_dbg_level & WL_DBG_CONN) { \ + if (brcmf_dbg_level & WL_DBG_CONN) { \ if (net_ratelimit()) { \ printk(KERN_ERR "CONN @%s : " fmt, \ __func__, ##args); \ @@ -95,15 +90,13 @@ do { \ #define WL_CONN(fmt, args...) #endif /* (defined BCMDBG) */ - -#define WL_SCAN_RETRY_MAX 3 /* used for ibss scan */ #define WL_NUM_SCAN_MAX 1 #define WL_NUM_PMKIDS_MAX MAXPMKID /* will be used * for 2.6.33 kernel * or later */ -#define WL_SCAN_BUF_MAX (1024 * 8) -#define WL_TLV_INFO_MAX 1024 +#define WL_SCAN_BUF_MAX (1024 * 8) +#define WL_TLV_INFO_MAX 1024 #define WL_BSS_INFO_MAX 2048 #define WL_ASSOC_INFO_MAX 512 /* * needs to grab assoc info from dongle to @@ -113,15 +106,14 @@ do { \ #define WL_IOCTL_LEN_MAX 1024 #define WL_EXTRA_BUF_MAX 2048 #define WL_ISCAN_BUF_MAX 2048 /* - * the buf lengh can be WLC_IOCTL_MAXLEN (8K) + * the buf length can be BRCMF_C_IOCTL_MAXLEN * to reduce iteration */ #define WL_ISCAN_TIMER_INTERVAL_MS 3000 -#define WL_SCAN_ERSULTS_LAST (WL_SCAN_RESULTS_NO_MEM+1) +#define WL_SCAN_ERSULTS_LAST (BRCMF_SCAN_RESULTS_NO_MEM+1) #define WL_AP_MAX 256 /* virtually unlimitted as long * as kernel memory allows */ -#define WL_FILE_NAME_MAX 256 #define WL_ROAM_TRIGGER_LEVEL -75 #define WL_ROAM_DELTA 20 @@ -166,22 +158,8 @@ enum wl_iscan_state { WL_ISCAN_STATE_SCANING }; -/* fw downloading status */ -enum wl_fw_status { - WL_FW_LOADING_DONE, - WL_NVRAM_LOADING_DONE -}; - -/* beacon / probe_response */ -struct beacon_proberesp { - __le64 timestamp; - __le16 beacon_int; - __le16 capab_info; - u8 variable[0]; -} __attribute__ ((packed)); - /* dongle configuration */ -struct wl_conf { +struct brcmf_cfg80211_conf { u32 mode; /* adhoc , infrastructure or ap */ u32 frag_threshold; u32 rts_threshold; @@ -192,51 +170,43 @@ struct wl_conf { }; /* cfg80211 main event loop */ -struct wl_event_loop { - s32(*handler[WLC_E_LAST]) (struct wl_priv *wl, +struct brcmf_cfg80211_event_loop { + s32(*handler[BRCMF_E_LAST]) (struct brcmf_cfg80211_priv *cfg_priv, struct net_device *ndev, - const wl_event_msg_t *e, void *data); + const struct brcmf_event_msg *e, + void *data); }; /* representing interface of cfg80211 plane */ -struct wl_iface { - struct wl_priv *wl; +struct brcmf_cfg80211_iface { + struct brcmf_cfg80211_priv *cfg_priv; }; -struct wl_dev { +struct brcmf_cfg80211_dev { void *driver_data; /* to store cfg80211 object information */ }; -/* bss inform structure for cfg80211 interface */ -struct wl_cfg80211_bss_info { - u16 band; - u16 channel; - s16 rssi; - u16 frame_len; - u8 frame_buf[1]; -}; - /* basic structure of scan request */ -struct wl_scan_req { - struct wlc_ssid ssid; +struct brcmf_cfg80211_scan_req { + struct brcmf_ssid ssid; }; /* basic structure of information element */ -struct wl_ie { +struct brcmf_cfg80211_ie { u16 offset; u8 buf[WL_TLV_INFO_MAX]; }; /* event queue for cfg80211 main event */ -struct wl_event_q { +struct brcmf_cfg80211_event_q { struct list_head eq_list; u32 etype; - wl_event_msg_t emsg; + struct brcmf_event_msg emsg; s8 edata[1]; }; /* security information with currently associated ap */ -struct wl_security { +struct brcmf_cfg80211_security { u32 wpa_versions; u32 auth_type; u32 cipher_pairwise; @@ -245,7 +215,7 @@ struct wl_security { }; /* ibss information for currently joined ibss network */ -struct wl_ibss { +struct brcmf_cfg80211_ibss { u8 beacon_interval; /* in millisecond */ u8 atim; /* in millisecond */ s8 join_only; @@ -254,24 +224,25 @@ struct wl_ibss { }; /* dongle profile */ -struct wl_profile { +struct brcmf_cfg80211_profile { u32 mode; - struct wlc_ssid ssid; + struct brcmf_ssid ssid; u8 bssid[ETH_ALEN]; u16 beacon_interval; u8 dtim_period; - struct wl_security sec; - struct wl_ibss ibss; + struct brcmf_cfg80211_security sec; + struct brcmf_cfg80211_ibss ibss; s32 band; }; /* dongle iscan event loop */ -struct wl_iscan_eloop { - s32(*handler[WL_SCAN_ERSULTS_LAST]) (struct wl_priv *wl); +struct brcmf_cfg80211_iscan_eloop { + s32 (*handler[WL_SCAN_ERSULTS_LAST]) + (struct brcmf_cfg80211_priv *cfg_priv); }; /* dongle iscan controller */ -struct wl_iscan_ctrl { +struct brcmf_cfg80211_iscan_ctrl { struct net_device *dev; struct timer_list timer; u32 timer_ms; @@ -279,69 +250,57 @@ struct wl_iscan_ctrl { s32 state; struct task_struct *tsk; struct semaphore sync; - struct wl_iscan_eloop el; + struct brcmf_cfg80211_iscan_eloop el; void *data; - s8 ioctl_buf[WLC_IOCTL_SMLEN]; + s8 ioctl_buf[BRCMF_C_IOCTL_SMLEN]; s8 scan_buf[WL_ISCAN_BUF_MAX]; }; /* association inform */ -struct wl_connect_info { +struct brcmf_cfg80211_connect_info { u8 *req_ie; s32 req_ie_len; u8 *resp_ie; s32 resp_ie_len; }; -/* firmware /nvram downloading controller */ -struct wl_fw_ctrl { - const struct firmware *fw_entry; - unsigned long status; - u32 ptr; - s8 fw_name[WL_FILE_NAME_MAX]; - s8 nvram_name[WL_FILE_NAME_MAX]; -}; - /* assoc ie length */ -struct wl_assoc_ielen { +struct brcmf_cfg80211_assoc_ielen { u32 req_len; u32 resp_len; }; /* wpa2 pmk list */ -struct wl_pmk_list { +struct brcmf_cfg80211_pmk_list { pmkid_list_t pmkids; pmkid_t foo[MAXPMKID - 1]; }; /* dongle private data of cfg80211 interface */ -struct wl_priv { +struct brcmf_cfg80211_priv { struct wireless_dev *wdev; /* representing wl cfg80211 device */ - struct wl_conf *conf; /* dongle configuration */ + struct brcmf_cfg80211_conf *conf; /* dongle configuration */ struct cfg80211_scan_request *scan_request; /* scan request object */ - struct wl_event_loop el; /* main event loop */ + struct brcmf_cfg80211_event_loop el; /* main event loop */ struct list_head eq_list; /* used for event queue */ spinlock_t eq_lock; /* for event queue synchronization */ struct mutex usr_sync; /* maily for dongle up/down synchronization */ - struct wl_scan_results *bss_list; /* bss_list holding scanned + struct brcmf_scan_results *bss_list; /* bss_list holding scanned ap information */ - struct wl_scan_results *scan_results; - struct wl_scan_req *scan_req_int; /* scan request object for - internal purpose */ + struct brcmf_scan_results *scan_results; + struct brcmf_cfg80211_scan_req *scan_req_int; /* scan request object + for internal purpose */ struct wl_cfg80211_bss_info *bss_info; /* bss information for cfg80211 layer */ - struct wl_ie ie; /* information element object for + struct brcmf_cfg80211_ie ie; /* information element object for internal purpose */ struct semaphore event_sync; /* for synchronization of main event thread */ - struct wl_profile *profile; /* holding dongle profile */ - struct wl_iscan_ctrl *iscan; /* iscan controller */ - struct wl_connect_info conn_info; /* association information - container */ - struct wl_fw_ctrl *fw; /* control firwmare / nvram paramter - downloading */ - struct wl_pmk_list *pmk_list; /* wpa2 pmk list */ + struct brcmf_cfg80211_profile *profile; /* holding dongle profile */ + struct brcmf_cfg80211_iscan_ctrl *iscan; /* iscan controller */ + struct brcmf_cfg80211_connect_info conn_info; /* association info */ + struct brcmf_cfg80211_pmk_list *pmk_list; /* wpa2 pmk list */ struct task_struct *event_tsk; /* task of main event handler thread */ unsigned long status; /* current dongle status */ void *pub; @@ -362,26 +321,21 @@ struct wl_priv { u8 ci[0] __attribute__ ((__aligned__(NETDEV_ALIGN))); }; -#define wl_to_dev(w) (wiphy_dev(wl->wdev->wiphy)) -#define wl_to_wiphy(w) (w->wdev->wiphy) -#define wiphy_to_wl(w) ((struct wl_priv *)(wiphy_priv(w))) -#define wl_to_wdev(w) (w->wdev) -#define wdev_to_wl(w) ((struct wl_priv *)(wdev_priv(w))) -#define wl_to_ndev(w) (w->wdev->netdev) -#define ndev_to_wl(n) (wdev_to_wl(n->ieee80211_ptr)) -#define ci_to_wl(c) (ci->wl) -#define wl_to_ci(w) (&w->ci) -#define wl_to_sr(w) (w->scan_req_int) -#define wl_to_ie(w) (&w->ie) -#define iscan_to_wl(i) ((struct wl_priv *)(i->data)) -#define wl_to_iscan(w) (w->iscan) -#define wl_to_conn(w) (&w->conn_info) - -static inline struct wl_bss_info *next_bss(struct wl_scan_results *list, - struct wl_bss_info *bss) +#define cfg_to_wiphy(w) (w->wdev->wiphy) +#define wiphy_to_cfg(w) ((struct brcmf_cfg80211_priv *)(wiphy_priv(w))) +#define cfg_to_wdev(w) (w->wdev) +#define wdev_to_cfg(w) ((struct brcmf_cfg80211_priv *)(wdev_priv(w))) +#define cfg_to_ndev(w) (w->wdev->netdev) +#define ndev_to_cfg(n) (wdev_to_cfg(n->ieee80211_ptr)) +#define iscan_to_cfg(i) ((struct brcmf_cfg80211_priv *)(i->data)) +#define cfg_to_iscan(w) (w->iscan) +#define cfg_to_conn(w) (&w->conn_info) + +static inline struct brcmf_bss_info *next_bss(struct brcmf_scan_results *list, + struct brcmf_bss_info *bss) { return bss = bss ? - (struct wl_bss_info *)((unsigned long)bss + + (struct brcmf_bss_info *)((unsigned long)bss + le32_to_cpu(bss->length)) : list->bss_info; } @@ -389,26 +343,14 @@ static inline struct wl_bss_info *next_bss(struct wl_scan_results *list, #define for_each_bss(list, bss, __i) \ for (__i = 0; __i < list->count && __i < WL_AP_MAX; __i++, bss = next_bss(list, bss)) -extern s32 wl_cfg80211_attach(struct net_device *ndev, void *data); -extern void wl_cfg80211_detach(void); +extern s32 brcmf_cfg80211_attach(struct net_device *ndev, void *data); +extern void brcmf_cfg80211_detach(void); /* event handler from dongle */ -extern void wl_cfg80211_event(struct net_device *ndev, const wl_event_msg_t *e, - void *data); -extern void wl_cfg80211_sdio_func(void *func); /* set sdio function info */ -extern struct sdio_func *wl_cfg80211_get_sdio_func(void); /* set sdio function info */ -extern s32 wl_cfg80211_up(void); /* dongle up */ -extern s32 wl_cfg80211_down(void); /* dongle down */ -extern void wl_cfg80211_dbg_level(u32 level); /* set dongle - debugging level */ -extern void *wl_cfg80211_request_fw(s8 *file_name); /* request fw /nvram - downloading */ -extern s32 wl_cfg80211_read_fw(s8 *buf, u32 size); /* read fw - image */ -extern void wl_cfg80211_release_fw(void); /* release fw */ -extern s8 *wl_cfg80211_get_fwname(void); /* get firmware name for - the dongle */ -extern s8 *wl_cfg80211_get_nvramname(void); /* get nvram name for - the dongle */ -extern void wl_os_wd_timer(struct net_device *ndev, uint wdtick); +extern void brcmf_cfg80211_event(struct net_device *ndev, + const struct brcmf_event_msg *e, void *data); +extern void brcmf_cfg80211_sdio_func(void *func); /* set sdio function info */ +extern struct sdio_func *brcmf_cfg80211_get_sdio_func(void); +extern s32 brcmf_cfg80211_up(void); /* dongle up */ +extern s32 brcmf_cfg80211_down(void); /* dongle down */ #endif /* _wl_cfg80211_h_ */ diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.c b/drivers/staging/brcm80211/brcmfmac/wl_iw.c deleted file mode 100644 index 35eec917f23..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.c +++ /dev/null @@ -1,3694 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include <linux/kthread.h> -#include <linux/semaphore.h> -#include <bcmdefs.h> -#include <linux/netdevice.h> -#include <linux/hardirq.h> -#include <wlioctl.h> - -#include <bcmutils.h> - -#include <linux/if_arp.h> -#include <asm/uaccess.h> - -#include <dngl_stats.h> -#include <dhd.h> -#include <dhdioctl.h> -#include <linux/ieee80211.h> -typedef const struct si_pub si_t; -#include <wlioctl.h> - -#include <dngl_stats.h> -#include <dhd.h> - -#define WL_ERROR(fmt, args...) printk(fmt, ##args) -#define WL_TRACE(fmt, args...) no_printk(fmt, ##args) -#define WL_INFORM(fmt, args...) no_printk(fmt, ##args) -#define WL_WSEC(fmt, args...) no_printk(fmt, ##args) -#define WL_SCAN(fmt, args...) no_printk(fmt, ##args) - -#include <wl_iw.h> - -#define IW_WSEC_ENABLED(wsec) ((wsec) & (WEP_ENABLED | \ - TKIP_ENABLED | AES_ENABLED)) - -#include <linux/rtnetlink.h> - -#define WL_IW_USE_ISCAN 1 -#define ENABLE_ACTIVE_PASSIVE_SCAN_SUPPRESS 1 - -bool g_set_essid_before_scan = true; - -#define WL_IW_IOCTL_CALL(func_call) \ - do { \ - func_call; \ - } while (0) - -static int g_onoff = G_WLAN_SET_ON; -wl_iw_extra_params_t g_wl_iw_params; - -extern bool wl_iw_conn_status_str(u32 event_type, u32 status, - u32 reason, char *stringBuf, uint buflen); - -#define MAX_WLIW_IOCTL_LEN 1024 - -#ifdef CONFIG_WIRELESS_EXT -extern int dhd_wait_pend8021x(struct net_device *dev); -#endif - -#if WIRELESS_EXT < 19 -#define IW_IOCTL_IDX(cmd) ((cmd) - SIOCIWFIRST) -#define IW_EVENT_IDX(cmd) ((cmd) - IWEVFIRST) -#endif - -static void *g_scan; -static volatile uint g_scan_specified_ssid; -static wlc_ssid_t g_specific_ssid; - -static wlc_ssid_t g_ssid; - -#if defined(WL_IW_USE_ISCAN) -#define ISCAN_STATE_IDLE 0 -#define ISCAN_STATE_SCANING 1 - -#define WLC_IW_ISCAN_MAXLEN 2048 -typedef struct iscan_buf { - struct iscan_buf *next; - char iscan_buf[WLC_IW_ISCAN_MAXLEN]; -} iscan_buf_t; - -typedef struct iscan_info { - struct net_device *dev; - struct timer_list timer; - u32 timer_ms; - u32 timer_on; - int iscan_state; - iscan_buf_t *list_hdr; - iscan_buf_t *list_cur; - - struct task_struct *sysioc_tsk; - struct semaphore sysioc_sem; - -#if defined CSCAN - char ioctlbuf[WLC_IOCTL_MEDLEN]; -#else - char ioctlbuf[WLC_IOCTL_SMLEN]; -#endif - wl_iscan_params_t *iscan_ex_params_p; - int iscan_ex_param_size; -} iscan_info_t; -iscan_info_t *g_iscan; - -static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; - -/* Global ASSERT type flag */ -u32 g_assert_type; - -static void wl_iw_timerfunc(unsigned long data); -static void wl_iw_set_event_mask(struct net_device *dev); -static int wl_iw_iscan(iscan_info_t *iscan, wlc_ssid_t *ssid, u16 action); -#endif /* defined(WL_IW_USE_ISCAN) */ - -static int -wl_iw_set_scan(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra); - -static int -wl_iw_get_scan(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra); - -static uint -wl_iw_get_scan_prep(wl_scan_results_t *list, - struct iw_request_info *info, char *extra, short max_size); - -static void swap_key_from_BE(wl_wsec_key_t *key) -{ - key->index = cpu_to_le32(key->index); - key->len = cpu_to_le32(key->len); - key->algo = cpu_to_le32(key->algo); - key->flags = cpu_to_le32(key->flags); - key->rxiv.hi = cpu_to_le32(key->rxiv.hi); - key->rxiv.lo = cpu_to_le16(key->rxiv.lo); - key->iv_initialized = cpu_to_le32(key->iv_initialized); -} - -static void swap_key_to_BE(wl_wsec_key_t *key) -{ - key->index = le32_to_cpu(key->index); - key->len = le32_to_cpu(key->len); - key->algo = le32_to_cpu(key->algo); - key->flags = le32_to_cpu(key->flags); - key->rxiv.hi = le32_to_cpu(key->rxiv.hi); - key->rxiv.lo = le16_to_cpu(key->rxiv.lo); - key->iv_initialized = le32_to_cpu(key->iv_initialized); -} - -static int dev_wlc_ioctl(struct net_device *dev, int cmd, void *arg, int len) -{ - struct ifreq ifr; - wl_ioctl_t ioc; - mm_segment_t fs; - int ret = -EINVAL; - - if (!dev) { - WL_ERROR("%s: dev is null\n", __func__); - return ret; - } - - WL_INFORM("\n%s, PID:%x: send Local IOCTL -> dhd: cmd:0x%x, buf:%p, len:%d\n", - __func__, current->pid, cmd, arg, len); - - if (g_onoff == G_WLAN_SET_ON) { - memset(&ioc, 0, sizeof(ioc)); - ioc.cmd = cmd; - ioc.buf = arg; - ioc.len = len; - - strcpy(ifr.ifr_name, dev->name); - ifr.ifr_data = (caddr_t)&ioc; - - ret = dev_open(dev); - if (ret) { - WL_ERROR("%s: Error dev_open: %d\n", __func__, ret); - return ret; - } - - fs = get_fs(); - set_fs(get_ds()); - ret = dev->netdev_ops->ndo_do_ioctl(dev, &ifr, SIOCDEVPRIVATE); - set_fs(fs); - } else { - WL_TRACE("%s: call after driver stop : ignored\n", __func__); - } - return ret; -} - -static int dev_wlc_intvar_set(struct net_device *dev, char *name, int val) -{ - char buf[WLC_IOCTL_SMLEN]; - uint len; - - val = cpu_to_le32(val); - len = bcm_mkiovar(name, (char *)(&val), sizeof(val), buf, sizeof(buf)); - ASSERT(len); - - return dev_wlc_ioctl(dev, WLC_SET_VAR, buf, len); -} - -#if defined(WL_IW_USE_ISCAN) -static int -dev_iw_iovar_setbuf(struct net_device *dev, - char *iovar, - void *param, int paramlen, void *bufptr, int buflen) -{ - int iolen; - - iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen); - ASSERT(iolen); - - if (iolen == 0) - return 0; - - return dev_wlc_ioctl(dev, WLC_SET_VAR, bufptr, iolen); -} - -static int -dev_iw_iovar_getbuf(struct net_device *dev, - char *iovar, - void *param, int paramlen, void *bufptr, int buflen) -{ - int iolen; - - iolen = bcm_mkiovar(iovar, param, paramlen, bufptr, buflen); - ASSERT(iolen); - - return dev_wlc_ioctl(dev, WLC_GET_VAR, bufptr, buflen); -} -#endif /* defined(WL_IW_USE_ISCAN) */ - -#if WIRELESS_EXT > 17 -static int -dev_wlc_bufvar_set(struct net_device *dev, char *name, char *buf, int len) -{ - static char ioctlbuf[MAX_WLIW_IOCTL_LEN]; - uint buflen; - - buflen = bcm_mkiovar(name, buf, len, ioctlbuf, sizeof(ioctlbuf)); - ASSERT(buflen); - - return dev_wlc_ioctl(dev, WLC_SET_VAR, ioctlbuf, buflen); -} -#endif /* WIRELESS_EXT > 17 */ - -static int -dev_wlc_bufvar_get(struct net_device *dev, char *name, char *buf, int buflen) -{ - static char ioctlbuf[MAX_WLIW_IOCTL_LEN]; - int error; - uint len; - - len = bcm_mkiovar(name, NULL, 0, ioctlbuf, sizeof(ioctlbuf)); - ASSERT(len); - error = - dev_wlc_ioctl(dev, WLC_GET_VAR, (void *)ioctlbuf, - MAX_WLIW_IOCTL_LEN); - if (!error) - memcpy(buf, ioctlbuf, buflen); - - return error; -} - -static int dev_wlc_intvar_get(struct net_device *dev, char *name, int *retval) -{ - union { - char buf[WLC_IOCTL_SMLEN]; - int val; - } var; - int error; - - uint len; - uint data_null; - - len = - bcm_mkiovar(name, (char *)(&data_null), 0, (char *)(&var), - sizeof(var.buf)); - ASSERT(len); - error = dev_wlc_ioctl(dev, WLC_GET_VAR, (void *)&var, len); - - *retval = le32_to_cpu(var.val); - - return error; -} - -#if WIRELESS_EXT < 13 -struct iw_request_info { - __u16 cmd; - __u16 flags; -}; - -typedef int (*iw_handler) (struct net_device *dev, - struct iw_request_info *info, - void *wrqu, char *extra); -#endif - -static int -wl_iw_config_commit(struct net_device *dev, - struct iw_request_info *info, void *zwrq, char *extra) -{ - wlc_ssid_t ssid; - int error; - struct sockaddr bssid; - - WL_TRACE("%s: SIOCSIWCOMMIT\n", dev->name); - - error = dev_wlc_ioctl(dev, WLC_GET_SSID, &ssid, sizeof(ssid)); - if (error) - return error; - - ssid.SSID_len = le32_to_cpu(ssid.SSID_len); - - if (!ssid.SSID_len) - return 0; - - memset(&bssid, 0, sizeof(struct sockaddr)); - error = dev_wlc_ioctl(dev, WLC_REASSOC, &bssid, ETH_ALEN); - if (error) { - WL_ERROR("%s: WLC_REASSOC to %s failed\n", - __func__, ssid.SSID); - return error; - } - - return 0; -} - -static int -wl_iw_get_name(struct net_device *dev, - struct iw_request_info *info, char *cwrq, char *extra) -{ - WL_TRACE("%s: SIOCGIWNAME\n", dev->name); - - strcpy(cwrq, "IEEE 802.11-DS"); - - return 0; -} - -static int -wl_iw_set_freq(struct net_device *dev, - struct iw_request_info *info, struct iw_freq *fwrq, char *extra) -{ - int error, chan; - uint sf = 0; - - WL_TRACE("\n %s %s: SIOCSIWFREQ\n", __func__, dev->name); - - if (fwrq->e == 0 && fwrq->m < MAXCHANNEL) { - chan = fwrq->m; - } else { - if (fwrq->e >= 6) { - fwrq->e -= 6; - while (fwrq->e--) - fwrq->m *= 10; - } else if (fwrq->e < 6) { - while (fwrq->e++ < 6) - fwrq->m /= 10; - } - if (fwrq->m > 4000 && fwrq->m < 5000) - sf = WF_CHAN_FACTOR_4_G; - - chan = bcm_mhz2channel(fwrq->m, sf); - } - chan = cpu_to_le32(chan); - - error = dev_wlc_ioctl(dev, WLC_SET_CHANNEL, &chan, sizeof(chan)); - if (error) - return error; - - g_wl_iw_params.target_channel = chan; - return -EINPROGRESS; -} - -static int -wl_iw_get_freq(struct net_device *dev, - struct iw_request_info *info, struct iw_freq *fwrq, char *extra) -{ - channel_info_t ci; - int error; - - WL_TRACE("%s: SIOCGIWFREQ\n", dev->name); - - error = dev_wlc_ioctl(dev, WLC_GET_CHANNEL, &ci, sizeof(ci)); - if (error) - return error; - - fwrq->m = le32_to_cpu(ci.hw_channel); - fwrq->e = le32_to_cpu(0); - return 0; -} - -static int -wl_iw_set_mode(struct net_device *dev, - struct iw_request_info *info, __u32 *uwrq, char *extra) -{ - int infra = 0, ap = 0, error = 0; - - WL_TRACE("%s: SIOCSIWMODE\n", dev->name); - - switch (*uwrq) { - case IW_MODE_MASTER: - infra = ap = 1; - break; - case IW_MODE_ADHOC: - case IW_MODE_AUTO: - break; - case IW_MODE_INFRA: - infra = 1; - break; - default: - return -EINVAL; - } - infra = cpu_to_le32(infra); - ap = cpu_to_le32(ap); - - error = dev_wlc_ioctl(dev, WLC_SET_INFRA, &infra, sizeof(infra)); - if (error) - return error; - - error = dev_wlc_ioctl(dev, WLC_SET_AP, &ap, sizeof(ap)); - if (error) - return error; - - return -EINPROGRESS; -} - -static int -wl_iw_get_mode(struct net_device *dev, - struct iw_request_info *info, __u32 *uwrq, char *extra) -{ - int error, infra = 0, ap = 0; - - WL_TRACE("%s: SIOCGIWMODE\n", dev->name); - - error = dev_wlc_ioctl(dev, WLC_GET_INFRA, &infra, sizeof(infra)); - if (error) - return error; - - error = dev_wlc_ioctl(dev, WLC_GET_AP, &ap, sizeof(ap)); - if (error) - return error; - - infra = le32_to_cpu(infra); - ap = le32_to_cpu(ap); - *uwrq = infra ? ap ? IW_MODE_MASTER : IW_MODE_INFRA : IW_MODE_ADHOC; - - return 0; -} - -static int -wl_iw_get_range(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - struct iw_range *range = (struct iw_range *)extra; - wl_u32_list_t *list; - wl_rateset_t rateset; - s8 *channels; - int error, i, k; - uint ch; - - int phytype; - int bw_cap = 0, sgi_tx = 0, nmode = 0; - channel_info_t ci; - u8 nrate_list2copy = 0; - u16 nrate_list[4][8] = { {13, 26, 39, 52, 78, 104, 117, 130}, - {14, 29, 43, 58, 87, 116, 130, 144}, - {27, 54, 81, 108, 162, 216, 243, 270}, - {30, 60, 90, 120, 180, 240, 270, 300} - }; - - WL_TRACE("%s: SIOCGIWRANGE\n", dev->name); - - if (!extra) - return -EINVAL; - - channels = kmalloc((MAXCHANNEL + 1) * 4, GFP_KERNEL); - if (!channels) { - WL_ERROR("Could not alloc channels\n"); - return -ENOMEM; - } - list = (wl_u32_list_t *) channels; - - dwrq->length = sizeof(struct iw_range); - memset(range, 0, sizeof(*range)); - - list->count = cpu_to_le32(MAXCHANNEL); - error = dev_wlc_ioctl(dev, WLC_GET_VALID_CHANNELS, channels, - (MAXCHANNEL + 1) * 4); - if (error) { - kfree(channels); - return error; - } - for (i = 0; i < le32_to_cpu(list->count) && i < IW_MAX_FREQUENCIES; - i++) { - range->freq[i].i = le32_to_cpu(list->element[i]); - - ch = le32_to_cpu(list->element[i]); - if (ch <= CH_MAX_2G_CHANNEL) { - range->freq[i].m = ieee80211_dsss_chan_to_freq(ch); - } else { - range->freq[i].m = ieee80211_ofdm_chan_to_freq( - WF_CHAN_FACTOR_5_G/2, ch); - } - range->freq[i].e = 6; - } - range->num_frequency = range->num_channels = i; - - range->max_qual.qual = 5; - range->max_qual.level = 0x100 - 200; - range->max_qual.noise = 0x100 - 200; - range->sensitivity = 65535; - -#if WIRELESS_EXT > 11 - range->avg_qual.qual = 3; - range->avg_qual.level = 0x100 + WL_IW_RSSI_GOOD; - range->avg_qual.noise = 0x100 - 75; -#endif - - error = dev_wlc_ioctl(dev, WLC_GET_CURR_RATESET, &rateset, - sizeof(rateset)); - if (error) { - kfree(channels); - return error; - } - rateset.count = le32_to_cpu(rateset.count); - range->num_bitrates = rateset.count; - for (i = 0; i < rateset.count && i < IW_MAX_BITRATES; i++) - range->bitrate[i] = (rateset.rates[i] & 0x7f) * 500000; - dev_wlc_intvar_get(dev, "nmode", &nmode); - dev_wlc_ioctl(dev, WLC_GET_PHYTYPE, &phytype, sizeof(phytype)); - - if (nmode == 1 && phytype == WLC_PHY_TYPE_SSN) { - dev_wlc_intvar_get(dev, "mimo_bw_cap", &bw_cap); - dev_wlc_intvar_get(dev, "sgi_tx", &sgi_tx); - dev_wlc_ioctl(dev, WLC_GET_CHANNEL, &ci, - sizeof(channel_info_t)); - ci.hw_channel = le32_to_cpu(ci.hw_channel); - - if (bw_cap == 0 || (bw_cap == 2 && ci.hw_channel <= 14)) { - if (sgi_tx == 0) - nrate_list2copy = 0; - else - nrate_list2copy = 1; - } - if (bw_cap == 1 || (bw_cap == 2 && ci.hw_channel >= 36)) { - if (sgi_tx == 0) - nrate_list2copy = 2; - else - nrate_list2copy = 3; - } - range->num_bitrates += 8; - for (k = 0; i < range->num_bitrates; k++, i++) { - range->bitrate[i] = - (nrate_list[nrate_list2copy][k]) * 500000; - } - } - - error = dev_wlc_ioctl(dev, WLC_GET_PHYTYPE, &i, sizeof(i)); - if (error) { - kfree(channels); - return error; - } - i = le32_to_cpu(i); - if (i == WLC_PHY_TYPE_A) - range->throughput = 24000000; - else - range->throughput = 1500000; - - range->min_rts = 0; - range->max_rts = 2347; - range->min_frag = 256; - range->max_frag = 2346; - - range->max_encoding_tokens = DOT11_MAX_DEFAULT_KEYS; - range->num_encoding_sizes = 4; - range->encoding_size[0] = WLAN_KEY_LEN_WEP40; - range->encoding_size[1] = WLAN_KEY_LEN_WEP104; -#if WIRELESS_EXT > 17 - range->encoding_size[2] = WLAN_KEY_LEN_TKIP; -#else - range->encoding_size[2] = 0; -#endif - range->encoding_size[3] = WLAN_KEY_LEN_AES_CMAC; - - range->min_pmp = 0; - range->max_pmp = 0; - range->min_pmt = 0; - range->max_pmt = 0; - range->pmp_flags = 0; - range->pm_capa = 0; - - range->num_txpower = 2; - range->txpower[0] = 1; - range->txpower[1] = 255; - range->txpower_capa = IW_TXPOW_MWATT; - -#if WIRELESS_EXT > 10 - range->we_version_compiled = WIRELESS_EXT; - range->we_version_source = 19; - - range->retry_capa = IW_RETRY_LIMIT; - range->retry_flags = IW_RETRY_LIMIT; - range->r_time_flags = 0; - range->min_retry = 1; - range->max_retry = 255; - range->min_r_time = 0; - range->max_r_time = 0; -#endif - -#if WIRELESS_EXT > 17 - range->enc_capa = IW_ENC_CAPA_WPA; - range->enc_capa |= IW_ENC_CAPA_CIPHER_TKIP; - range->enc_capa |= IW_ENC_CAPA_CIPHER_CCMP; - range->enc_capa |= IW_ENC_CAPA_WPA2; - - IW_EVENT_CAPA_SET_KERNEL(range->event_capa); - IW_EVENT_CAPA_SET(range->event_capa, SIOCGIWAP); - IW_EVENT_CAPA_SET(range->event_capa, SIOCGIWSCAN); - IW_EVENT_CAPA_SET(range->event_capa, IWEVTXDROP); - IW_EVENT_CAPA_SET(range->event_capa, IWEVMICHAELMICFAILURE); - IW_EVENT_CAPA_SET(range->event_capa, IWEVPMKIDCAND); -#endif /* WIRELESS_EXT > 17 */ - - kfree(channels); - - return 0; -} - -static int rssi_to_qual(int rssi) -{ - if (rssi <= WL_IW_RSSI_NO_SIGNAL) - return 0; - else if (rssi <= WL_IW_RSSI_VERY_LOW) - return 1; - else if (rssi <= WL_IW_RSSI_LOW) - return 2; - else if (rssi <= WL_IW_RSSI_GOOD) - return 3; - else if (rssi <= WL_IW_RSSI_VERY_GOOD) - return 4; - else - return 5; -} - -static int -wl_iw_set_spy(struct net_device *dev, - struct iw_request_info *info, struct iw_point *dwrq, char *extra) -{ - wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev); - struct sockaddr *addr = (struct sockaddr *)extra; - int i; - - WL_TRACE("%s: SIOCSIWSPY\n", dev->name); - - if (!extra) - return -EINVAL; - - iw->spy_num = min_t(int, ARRAY_SIZE(iw->spy_addr), dwrq->length); - for (i = 0; i < iw->spy_num; i++) - memcpy(iw->spy_addr[i], addr[i].sa_data, ETH_ALEN); - memset(iw->spy_qual, 0, sizeof(iw->spy_qual)); - - return 0; -} - -static int -wl_iw_get_spy(struct net_device *dev, - struct iw_request_info *info, struct iw_point *dwrq, char *extra) -{ - wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev); - struct sockaddr *addr = (struct sockaddr *)extra; - struct iw_quality *qual = (struct iw_quality *)&addr[iw->spy_num]; - int i; - - WL_TRACE("%s: SIOCGIWSPY\n", dev->name); - - if (!extra) - return -EINVAL; - - dwrq->length = iw->spy_num; - for (i = 0; i < iw->spy_num; i++) { - memcpy(addr[i].sa_data, iw->spy_addr[i], ETH_ALEN); - addr[i].sa_family = AF_UNIX; - memcpy(&qual[i], &iw->spy_qual[i], sizeof(struct iw_quality)); - iw->spy_qual[i].updated = 0; - } - - return 0; -} - -static int -wl_iw_ch_to_chanspec(int ch, wl_join_params_t *join_params, - int *join_params_size) -{ - chanspec_t chanspec = 0; - - if (ch != 0) { - join_params->params.chanspec_num = 1; - join_params->params.chanspec_list[0] = ch; - - if (join_params->params.chanspec_list[0]) - chanspec |= WL_CHANSPEC_BAND_2G; - else - chanspec |= WL_CHANSPEC_BAND_5G; - - chanspec |= WL_CHANSPEC_BW_20; - chanspec |= WL_CHANSPEC_CTL_SB_NONE; - - *join_params_size += WL_ASSOC_PARAMS_FIXED_SIZE + - join_params->params.chanspec_num * sizeof(chanspec_t); - - join_params->params.chanspec_list[0] &= WL_CHANSPEC_CHAN_MASK; - join_params->params.chanspec_list[0] |= chanspec; - join_params->params.chanspec_list[0] = - cpu_to_le16(join_params->params.chanspec_list[0]); - - join_params->params.chanspec_num = - cpu_to_le32(join_params->params.chanspec_num); - - WL_TRACE("%s join_params->params.chanspec_list[0]= %X\n", - __func__, join_params->params.chanspec_list[0]); - } - return 1; -} - -static int -wl_iw_set_wap(struct net_device *dev, - struct iw_request_info *info, struct sockaddr *awrq, char *extra) -{ - int error = -EINVAL; - wl_join_params_t join_params; - int join_params_size; - - WL_TRACE("%s: SIOCSIWAP\n", dev->name); - - if (awrq->sa_family != ARPHRD_ETHER) { - WL_ERROR("Invalid Header...sa_family\n"); - return -EINVAL; - } - - if (is_broadcast_ether_addr(awrq->sa_data) || - is_zero_ether_addr(awrq->sa_data)) { - scb_val_t scbval; - memset(&scbval, 0, sizeof(scb_val_t)); - (void)dev_wlc_ioctl(dev, WLC_DISASSOC, &scbval, - sizeof(scb_val_t)); - return 0; - } - - memset(&join_params, 0, sizeof(join_params)); - join_params_size = sizeof(join_params.ssid); - - memcpy(join_params.ssid.SSID, g_ssid.SSID, g_ssid.SSID_len); - join_params.ssid.SSID_len = cpu_to_le32(g_ssid.SSID_len); - memcpy(&join_params.params.bssid, awrq->sa_data, ETH_ALEN); - - WL_TRACE("%s target_channel=%d\n", - __func__, g_wl_iw_params.target_channel); - wl_iw_ch_to_chanspec(g_wl_iw_params.target_channel, &join_params, - &join_params_size); - - error = dev_wlc_ioctl(dev, WLC_SET_SSID, &join_params, - join_params_size); - if (error) { - WL_ERROR("%s Invalid ioctl data=%d\n", __func__, error); - } - - if (g_ssid.SSID_len) { - WL_TRACE("%s: join SSID=%s BSSID=%pM ch=%d\n", - __func__, g_ssid.SSID, awrq->sa_data, - g_wl_iw_params.target_channel); - } - - memset(&g_ssid, 0, sizeof(g_ssid)); - return 0; -} - -static int -wl_iw_get_wap(struct net_device *dev, - struct iw_request_info *info, struct sockaddr *awrq, char *extra) -{ - WL_TRACE("%s: SIOCGIWAP\n", dev->name); - - awrq->sa_family = ARPHRD_ETHER; - memset(awrq->sa_data, 0, ETH_ALEN); - - (void)dev_wlc_ioctl(dev, WLC_GET_BSSID, awrq->sa_data, ETH_ALEN); - - return 0; -} - -#if WIRELESS_EXT > 17 -static int -wl_iw_mlme(struct net_device *dev, - struct iw_request_info *info, struct sockaddr *awrq, char *extra) -{ - struct iw_mlme *mlme; - scb_val_t scbval; - int error = -EINVAL; - - WL_TRACE("%s: SIOCSIWMLME DISASSOC/DEAUTH\n", dev->name); - - mlme = (struct iw_mlme *)extra; - if (mlme == NULL) { - WL_ERROR("Invalid ioctl data\n"); - return error; - } - - scbval.val = mlme->reason_code; - memcpy(&scbval.ea, &mlme->addr.sa_data, ETH_ALEN); - - if (mlme->cmd == IW_MLME_DISASSOC) { - scbval.val = cpu_to_le32(scbval.val); - error = - dev_wlc_ioctl(dev, WLC_DISASSOC, &scbval, - sizeof(scb_val_t)); - } else if (mlme->cmd == IW_MLME_DEAUTH) { - scbval.val = cpu_to_le32(scbval.val); - error = - dev_wlc_ioctl(dev, WLC_SCB_DEAUTHENTICATE_FOR_REASON, - &scbval, sizeof(scb_val_t)); - } else { - WL_ERROR("Invalid ioctl data\n"); - return error; - } - - return error; -} -#endif /* WIRELESS_EXT > 17 */ - -#ifndef WL_IW_USE_ISCAN -static int -wl_iw_get_aplist(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - wl_scan_results_t *list; - struct sockaddr *addr = (struct sockaddr *)extra; - struct iw_quality qual[IW_MAX_AP]; - wl_bss_info_t *bi = NULL; - int error, i; - uint buflen = dwrq->length; - - WL_TRACE("%s: SIOCGIWAPLIST\n", dev->name); - - if (!extra) - return -EINVAL; - - list = kzalloc(buflen, GFP_KERNEL); - if (!list) - return -ENOMEM; - list->buflen = cpu_to_le32(buflen); - error = dev_wlc_ioctl(dev, WLC_SCAN_RESULTS, list, buflen); - if (error) { - WL_ERROR("%d: Scan results error %d\n", __LINE__, error); - kfree(list); - return error; - } - list->buflen = le32_to_cpu(list->buflen); - list->version = le32_to_cpu(list->version); - list->count = le32_to_cpu(list->count); - if (list->version != WL_BSS_INFO_VERSION) { - WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n", - __func__, list->version); - kfree(list); - return -EINVAL; - } - - for (i = 0, dwrq->length = 0; - i < list->count && dwrq->length < IW_MAX_AP; i++) { - bi = bi ? (wl_bss_info_t *) ((unsigned long)bi + - le32_to_cpu(bi->length)) : list-> - bss_info; - ASSERT(((unsigned long)bi + le32_to_cpu(bi->length)) <= - ((unsigned long)list + buflen)); - - if (!(le16_to_cpu(bi->capability) & WLAN_CAPABILITY_ESS)) - continue; - - memcpy(addr[dwrq->length].sa_data, &bi->BSSID, ETH_ALEN); - addr[dwrq->length].sa_family = ARPHRD_ETHER; - qual[dwrq->length].qual = rssi_to_qual(le16_to_cpu(bi->RSSI)); - qual[dwrq->length].level = 0x100 + le16_to_cpu(bi->RSSI); - qual[dwrq->length].noise = 0x100 + bi->phy_noise; - -#if WIRELESS_EXT > 18 - qual[dwrq->length].updated = IW_QUAL_ALL_UPDATED | IW_QUAL_DBM; -#else - qual[dwrq->length].updated = 7; -#endif - dwrq->length++; - } - - kfree(list); - - if (dwrq->length) { - memcpy(&addr[dwrq->length], qual, - sizeof(struct iw_quality) * dwrq->length); - dwrq->flags = 1; - } - - return 0; -} -#endif /* WL_IW_USE_ISCAN */ - -#ifdef WL_IW_USE_ISCAN -static int -wl_iw_iscan_get_aplist(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - wl_scan_results_t *list; - iscan_buf_t *buf; - iscan_info_t *iscan = g_iscan; - - struct sockaddr *addr = (struct sockaddr *)extra; - struct iw_quality qual[IW_MAX_AP]; - wl_bss_info_t *bi = NULL; - int i; - - WL_TRACE("%s: SIOCGIWAPLIST\n", dev->name); - - if (!extra) - return -EINVAL; - - if ((!iscan) || (!iscan->sysioc_tsk)) { - WL_ERROR("%s error\n", __func__); - return 0; - } - - buf = iscan->list_hdr; - while (buf) { - list = &((wl_iscan_results_t *) buf->iscan_buf)->results; - if (list->version != WL_BSS_INFO_VERSION) { - WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n", - __func__, list->version); - return -EINVAL; - } - - bi = NULL; - for (i = 0, dwrq->length = 0; - i < list->count && dwrq->length < IW_MAX_AP; i++) { - bi = bi ? (wl_bss_info_t *) ((unsigned long)bi + - le32_to_cpu(bi->length)) : - list->bss_info; - ASSERT(((unsigned long)bi + le32_to_cpu(bi->length)) <= - ((unsigned long)list + WLC_IW_ISCAN_MAXLEN)); - - if (!(le16_to_cpu(bi->capability) & - WLAN_CAPABILITY_ESS)) - continue; - - memcpy(addr[dwrq->length].sa_data, &bi->BSSID, - ETH_ALEN); - addr[dwrq->length].sa_family = ARPHRD_ETHER; - qual[dwrq->length].qual = - rssi_to_qual(le16_to_cpu(bi->RSSI)); - qual[dwrq->length].level = 0x100 + - le16_to_cpu(bi->RSSI); - qual[dwrq->length].noise = 0x100 + bi->phy_noise; - -#if WIRELESS_EXT > 18 - qual[dwrq->length].updated = - IW_QUAL_ALL_UPDATED | IW_QUAL_DBM; -#else - qual[dwrq->length].updated = 7; -#endif - - dwrq->length++; - } - buf = buf->next; - } - if (dwrq->length) { - memcpy(&addr[dwrq->length], qual, - sizeof(struct iw_quality) * dwrq->length); - dwrq->flags = 1; - } - - return 0; -} - -static int wl_iw_iscan_prep(wl_scan_params_t *params, wlc_ssid_t *ssid) -{ - int err = 0; - - memcpy(params->bssid, ether_bcast, ETH_ALEN); - params->bss_type = DOT11_BSSTYPE_ANY; - params->scan_type = 0; - params->nprobes = -1; - params->active_time = -1; - params->passive_time = -1; - params->home_time = -1; - params->channel_num = 0; - - params->nprobes = cpu_to_le32(params->nprobes); - params->active_time = cpu_to_le32(params->active_time); - params->passive_time = cpu_to_le32(params->passive_time); - params->home_time = cpu_to_le32(params->home_time); - if (ssid && ssid->SSID_len) - memcpy(¶ms->ssid, ssid, sizeof(wlc_ssid_t)); - - return err; -} - -static int wl_iw_iscan(iscan_info_t *iscan, wlc_ssid_t *ssid, u16 action) -{ - int err = 0; - - iscan->iscan_ex_params_p->version = cpu_to_le32(ISCAN_REQ_VERSION); - iscan->iscan_ex_params_p->action = cpu_to_le16(action); - iscan->iscan_ex_params_p->scan_duration = cpu_to_le16(0); - - WL_SCAN("%s : nprobes=%d\n", - __func__, iscan->iscan_ex_params_p->params.nprobes); - WL_SCAN("active_time=%d\n", - iscan->iscan_ex_params_p->params.active_time); - WL_SCAN("passive_time=%d\n", - iscan->iscan_ex_params_p->params.passive_time); - WL_SCAN("home_time=%d\n", iscan->iscan_ex_params_p->params.home_time); - WL_SCAN("scan_type=%d\n", iscan->iscan_ex_params_p->params.scan_type); - WL_SCAN("bss_type=%d\n", iscan->iscan_ex_params_p->params.bss_type); - - (void)dev_iw_iovar_setbuf(iscan->dev, "iscan", iscan->iscan_ex_params_p, - iscan->iscan_ex_param_size, iscan->ioctlbuf, - sizeof(iscan->ioctlbuf)); - - return err; -} - -static void wl_iw_timerfunc(unsigned long data) -{ - iscan_info_t *iscan = (iscan_info_t *) data; - if (iscan) { - iscan->timer_on = 0; - if (iscan->iscan_state != ISCAN_STATE_IDLE) { - WL_TRACE("timer trigger\n"); - up(&iscan->sysioc_sem); - } - } -} - -static void wl_iw_set_event_mask(struct net_device *dev) -{ - char eventmask[WL_EVENTING_MASK_LEN]; - char iovbuf[WL_EVENTING_MASK_LEN + 12]; - - dev_iw_iovar_getbuf(dev, "event_msgs", "", 0, iovbuf, sizeof(iovbuf)); - memcpy(eventmask, iovbuf, WL_EVENTING_MASK_LEN); - setbit(eventmask, WLC_E_SCAN_COMPLETE); - dev_iw_iovar_setbuf(dev, "event_msgs", eventmask, WL_EVENTING_MASK_LEN, - iovbuf, sizeof(iovbuf)); -} - -static u32 wl_iw_iscan_get(iscan_info_t *iscan) -{ - iscan_buf_t *buf; - iscan_buf_t *ptr; - wl_iscan_results_t *list_buf; - wl_iscan_results_t list; - wl_scan_results_t *results; - u32 status; - int res = 0; - - MUTEX_LOCK_WL_SCAN_SET(); - if (iscan->list_cur) { - buf = iscan->list_cur; - iscan->list_cur = buf->next; - } else { - buf = kmalloc(sizeof(iscan_buf_t), GFP_KERNEL); - if (!buf) { - WL_ERROR("%s can't alloc iscan_buf_t : going to abort current iscan\n", - __func__); - MUTEX_UNLOCK_WL_SCAN_SET(); - return WL_SCAN_RESULTS_NO_MEM; - } - buf->next = NULL; - if (!iscan->list_hdr) - iscan->list_hdr = buf; - else { - ptr = iscan->list_hdr; - while (ptr->next) { - ptr = ptr->next; - } - ptr->next = buf; - } - } - memset(buf->iscan_buf, 0, WLC_IW_ISCAN_MAXLEN); - list_buf = (wl_iscan_results_t *) buf->iscan_buf; - results = &list_buf->results; - results->buflen = WL_ISCAN_RESULTS_FIXED_SIZE; - results->version = 0; - results->count = 0; - - memset(&list, 0, sizeof(list)); - list.results.buflen = cpu_to_le32(WLC_IW_ISCAN_MAXLEN); - res = dev_iw_iovar_getbuf(iscan->dev, - "iscanresults", - &list, - WL_ISCAN_RESULTS_FIXED_SIZE, - buf->iscan_buf, WLC_IW_ISCAN_MAXLEN); - if (res == 0) { - results->buflen = le32_to_cpu(results->buflen); - results->version = le32_to_cpu(results->version); - results->count = le32_to_cpu(results->count); - WL_TRACE("results->count = %d\n", results->count); - WL_TRACE("results->buflen = %d\n", results->buflen); - status = le32_to_cpu(list_buf->status); - } else { - WL_ERROR("%s returns error %d\n", __func__, res); - status = WL_SCAN_RESULTS_NO_MEM; - } - MUTEX_UNLOCK_WL_SCAN_SET(); - return status; -} - -static void wl_iw_force_specific_scan(iscan_info_t *iscan) -{ - WL_TRACE("%s force Specific SCAN for %s\n", - __func__, g_specific_ssid.SSID); - rtnl_lock(); - - (void)dev_wlc_ioctl(iscan->dev, WLC_SCAN, &g_specific_ssid, - sizeof(g_specific_ssid)); - - rtnl_unlock(); -} - -static void wl_iw_send_scan_complete(iscan_info_t *iscan) -{ -#ifndef SANDGATE2G - union iwreq_data wrqu; - - memset(&wrqu, 0, sizeof(wrqu)); - - wireless_send_event(iscan->dev, SIOCGIWSCAN, &wrqu, NULL); - WL_TRACE("Send Event ISCAN complete\n"); -#endif -} - -static int _iscan_sysioc_thread(void *data) -{ - u32 status; - iscan_info_t *iscan = (iscan_info_t *) data; - static bool iscan_pass_abort = false; - - allow_signal(SIGTERM); - status = WL_SCAN_RESULTS_PARTIAL; - while (down_interruptible(&iscan->sysioc_sem) == 0) { - if (kthread_should_stop()) - break; - - if (iscan->timer_on) { - del_timer_sync(&iscan->timer); - iscan->timer_on = 0; - } - rtnl_lock(); - status = wl_iw_iscan_get(iscan); - rtnl_unlock(); - if (g_scan_specified_ssid && (iscan_pass_abort == true)) { - WL_TRACE("%s Get results from specific scan status = %d\n", - __func__, status); - wl_iw_send_scan_complete(iscan); - iscan_pass_abort = false; - status = -1; - } - - switch (status) { - case WL_SCAN_RESULTS_PARTIAL: - WL_TRACE("iscanresults incomplete\n"); - rtnl_lock(); - wl_iw_iscan(iscan, NULL, WL_SCAN_ACTION_CONTINUE); - rtnl_unlock(); - mod_timer(&iscan->timer, - jiffies + iscan->timer_ms * HZ / 1000); - iscan->timer_on = 1; - break; - case WL_SCAN_RESULTS_SUCCESS: - WL_TRACE("iscanresults complete\n"); - iscan->iscan_state = ISCAN_STATE_IDLE; - wl_iw_send_scan_complete(iscan); - break; - case WL_SCAN_RESULTS_PENDING: - WL_TRACE("iscanresults pending\n"); - mod_timer(&iscan->timer, - jiffies + iscan->timer_ms * HZ / 1000); - iscan->timer_on = 1; - break; - case WL_SCAN_RESULTS_ABORTED: - WL_TRACE("iscanresults aborted\n"); - iscan->iscan_state = ISCAN_STATE_IDLE; - if (g_scan_specified_ssid == 0) - wl_iw_send_scan_complete(iscan); - else { - iscan_pass_abort = true; - wl_iw_force_specific_scan(iscan); - } - break; - case WL_SCAN_RESULTS_NO_MEM: - WL_TRACE("iscanresults can't alloc memory: skip\n"); - iscan->iscan_state = ISCAN_STATE_IDLE; - break; - default: - WL_TRACE("iscanresults returned unknown status %d\n", - status); - break; - } - } - - if (iscan->timer_on) { - del_timer_sync(&iscan->timer); - iscan->timer_on = 0; - } - return 0; -} -#endif /* WL_IW_USE_ISCAN */ - -static int -wl_iw_set_scan(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - int error; - WL_TRACE("\n:%s dev:%s: SIOCSIWSCAN : SCAN\n", __func__, dev->name); - - g_set_essid_before_scan = false; -#if defined(CSCAN) - WL_ERROR("%s: Scan from SIOCGIWSCAN not supported\n", __func__); - return -EINVAL; -#endif - - if (g_onoff == G_WLAN_SET_OFF) - return 0; - - memset(&g_specific_ssid, 0, sizeof(g_specific_ssid)); -#ifndef WL_IW_USE_ISCAN - g_scan_specified_ssid = 0; -#endif - -#if WIRELESS_EXT > 17 - if (wrqu->data.length == sizeof(struct iw_scan_req)) { - if (wrqu->data.flags & IW_SCAN_THIS_ESSID) { - struct iw_scan_req *req = (struct iw_scan_req *)extra; - if (g_scan_specified_ssid) { - WL_TRACE("%s Specific SCAN is not done ignore scan for = %s\n", - __func__, req->essid); - return -EBUSY; - } else { - g_specific_ssid.SSID_len = min_t(size_t, - sizeof(g_specific_ssid.SSID), - req->essid_len); - memcpy(g_specific_ssid.SSID, req->essid, - g_specific_ssid.SSID_len); - g_specific_ssid.SSID_len = - cpu_to_le32(g_specific_ssid.SSID_len); - g_scan_specified_ssid = 1; - WL_TRACE("### Specific scan ssid=%s len=%d\n", - g_specific_ssid.SSID, - g_specific_ssid.SSID_len); - } - } - } -#endif /* WIRELESS_EXT > 17 */ - error = dev_wlc_ioctl(dev, WLC_SCAN, &g_specific_ssid, - sizeof(g_specific_ssid)); - if (error) { - WL_TRACE("#### Set SCAN for %s failed with %d\n", - g_specific_ssid.SSID, error); - g_scan_specified_ssid = 0; - return -EBUSY; - } - - return 0; -} - -#ifdef WL_IW_USE_ISCAN -int wl_iw_iscan_set_scan_broadcast_prep(struct net_device *dev, uint flag) -{ - wlc_ssid_t ssid; - iscan_info_t *iscan = g_iscan; - - if (flag) - rtnl_lock(); - - wl_iw_set_event_mask(dev); - - WL_TRACE("+++: Set Broadcast ISCAN\n"); - memset(&ssid, 0, sizeof(ssid)); - - iscan->list_cur = iscan->list_hdr; - iscan->iscan_state = ISCAN_STATE_SCANING; - - memset(&iscan->iscan_ex_params_p->params, 0, - iscan->iscan_ex_param_size); - wl_iw_iscan_prep(&iscan->iscan_ex_params_p->params, &ssid); - wl_iw_iscan(iscan, &ssid, WL_SCAN_ACTION_START); - - if (flag) - rtnl_unlock(); - - mod_timer(&iscan->timer, jiffies + iscan->timer_ms * HZ / 1000); - - iscan->timer_on = 1; - - return 0; -} - -static int -wl_iw_iscan_set_scan(struct net_device *dev, - struct iw_request_info *info, - union iwreq_data *wrqu, char *extra) -{ - wlc_ssid_t ssid; - iscan_info_t *iscan = g_iscan; - - WL_TRACE("%s: SIOCSIWSCAN : ISCAN\n", dev->name); - -#if defined(CSCAN) - WL_ERROR("%s: Scan from SIOCGIWSCAN not supported\n", __func__); - return -EINVAL; -#endif - - if (g_onoff == G_WLAN_SET_OFF) { - WL_TRACE("%s: driver is not up yet after START\n", __func__); - return 0; - } -#ifdef PNO_SUPPORT - if (dhd_dev_get_pno_status(dev)) { - WL_ERROR("%s: Scan called when PNO is active\n", __func__); - } -#endif - - if ((!iscan) || (!iscan->sysioc_tsk)) - return wl_iw_set_scan(dev, info, wrqu, extra); - - if (g_scan_specified_ssid) { - WL_TRACE("%s Specific SCAN already running ignoring BC scan\n", - __func__); - return -EBUSY; - } - - memset(&ssid, 0, sizeof(ssid)); - -#if WIRELESS_EXT > 17 - if (wrqu->data.length == sizeof(struct iw_scan_req)) { - if (wrqu->data.flags & IW_SCAN_THIS_ESSID) { - struct iw_scan_req *req = (struct iw_scan_req *)extra; - ssid.SSID_len = min_t(size_t, sizeof(ssid.SSID), - req->essid_len); - memcpy(ssid.SSID, req->essid, ssid.SSID_len); - ssid.SSID_len = cpu_to_le32(ssid.SSID_len); - } else { - g_scan_specified_ssid = 0; - - if (iscan->iscan_state == ISCAN_STATE_SCANING) { - WL_TRACE("%s ISCAN already in progress\n", - __func__); - return 0; - } - } - } -#endif /* WIRELESS_EXT > 17 */ - wl_iw_iscan_set_scan_broadcast_prep(dev, 0); - - return 0; -} -#endif /* WL_IW_USE_ISCAN */ - -#if WIRELESS_EXT > 17 -static bool ie_is_wpa_ie(u8 **wpaie, u8 **tlvs, int *tlvs_len) -{ - - u8 *ie = *wpaie; - - if ((ie[1] >= 6) && - !memcmp((const void *)&ie[2], (const void *)(WPA_OUI "\x01"), 4)) { - return true; - } - - ie += ie[1] + 2; - *tlvs_len -= (int)(ie - *tlvs); - *tlvs = ie; - return false; -} - -static bool ie_is_wps_ie(u8 **wpsie, u8 **tlvs, int *tlvs_len) -{ - - u8 *ie = *wpsie; - - if ((ie[1] >= 4) && - !memcmp((const void *)&ie[2], (const void *)(WPA_OUI "\x04"), 4)) { - return true; - } - - ie += ie[1] + 2; - *tlvs_len -= (int)(ie - *tlvs); - *tlvs = ie; - return false; -} -#endif /* WIRELESS_EXT > 17 */ - -static int -wl_iw_handle_scanresults_ies(char **event_p, char *end, - struct iw_request_info *info, wl_bss_info_t *bi) -{ -#if WIRELESS_EXT > 17 - struct iw_event iwe; - char *event; - - event = *event_p; - if (bi->ie_length) { - bcm_tlv_t *ie; - u8 *ptr = ((u8 *) bi) + sizeof(wl_bss_info_t); - int ptr_len = bi->ie_length; - - ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_RSN_ID); - if (ie) { - iwe.cmd = IWEVGENIE; - iwe.u.data.length = ie->len + 2; - event = - IWE_STREAM_ADD_POINT(info, event, end, &iwe, - (char *)ie); - } - ptr = ((u8 *) bi) + sizeof(wl_bss_info_t); - - while ((ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_WPA_ID))) { - if (ie_is_wps_ie(((u8 **)&ie), &ptr, &ptr_len)) { - iwe.cmd = IWEVGENIE; - iwe.u.data.length = ie->len + 2; - event = - IWE_STREAM_ADD_POINT(info, event, end, &iwe, - (char *)ie); - break; - } - } - - ptr = ((u8 *) bi) + sizeof(wl_bss_info_t); - ptr_len = bi->ie_length; - while ((ie = bcm_parse_tlvs(ptr, ptr_len, DOT11_MNG_WPA_ID))) { - if (ie_is_wpa_ie(((u8 **)&ie), &ptr, &ptr_len)) { - iwe.cmd = IWEVGENIE; - iwe.u.data.length = ie->len + 2; - event = - IWE_STREAM_ADD_POINT(info, event, end, &iwe, - (char *)ie); - break; - } - } - - *event_p = event; - } -#endif /* WIRELESS_EXT > 17 */ - return 0; -} - -static uint -wl_iw_get_scan_prep(wl_scan_results_t *list, - struct iw_request_info *info, char *extra, short max_size) -{ - int i, j; - struct iw_event iwe; - wl_bss_info_t *bi = NULL; - char *event = extra, *end = extra + max_size - WE_ADD_EVENT_FIX, *value; - int ret = 0; - - ASSERT(list); - - for (i = 0; i < list->count && i < IW_MAX_AP; i++) { - if (list->version != WL_BSS_INFO_VERSION) { - WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n", - __func__, list->version); - return ret; - } - - bi = bi ? (wl_bss_info_t *)((unsigned long)bi + - le32_to_cpu(bi->length)) : list-> - bss_info; - - WL_TRACE("%s : %s\n", __func__, bi->SSID); - - iwe.cmd = SIOCGIWAP; - iwe.u.ap_addr.sa_family = ARPHRD_ETHER; - memcpy(iwe.u.ap_addr.sa_data, &bi->BSSID, ETH_ALEN); - event = - IWE_STREAM_ADD_EVENT(info, event, end, &iwe, - IW_EV_ADDR_LEN); - iwe.u.data.length = le32_to_cpu(bi->SSID_len); - iwe.cmd = SIOCGIWESSID; - iwe.u.data.flags = 1; - event = IWE_STREAM_ADD_POINT(info, event, end, &iwe, bi->SSID); - - if (le16_to_cpu(bi->capability) & (WLAN_CAPABILITY_ESS | - WLAN_CAPABILITY_IBSS)) { - iwe.cmd = SIOCGIWMODE; - if (le16_to_cpu(bi->capability) & WLAN_CAPABILITY_ESS) - iwe.u.mode = IW_MODE_INFRA; - else - iwe.u.mode = IW_MODE_ADHOC; - event = - IWE_STREAM_ADD_EVENT(info, event, end, &iwe, - IW_EV_UINT_LEN); - } - - iwe.cmd = SIOCGIWFREQ; - - if (CHSPEC_CHANNEL(bi->chanspec) <= CH_MAX_2G_CHANNEL) - iwe.u.freq.m = ieee80211_dsss_chan_to_freq( - CHSPEC_CHANNEL(bi->chanspec)); - else - iwe.u.freq.m = ieee80211_ofdm_chan_to_freq( - WF_CHAN_FACTOR_5_G/2, - CHSPEC_CHANNEL(bi->chanspec)); - - iwe.u.freq.e = 6; - event = - IWE_STREAM_ADD_EVENT(info, event, end, &iwe, - IW_EV_FREQ_LEN); - - iwe.cmd = IWEVQUAL; - iwe.u.qual.qual = rssi_to_qual(le16_to_cpu(bi->RSSI)); - iwe.u.qual.level = 0x100 + le16_to_cpu(bi->RSSI); - iwe.u.qual.noise = 0x100 + bi->phy_noise; - event = - IWE_STREAM_ADD_EVENT(info, event, end, &iwe, - IW_EV_QUAL_LEN); - - wl_iw_handle_scanresults_ies(&event, end, info, bi); - - iwe.cmd = SIOCGIWENCODE; - if (le16_to_cpu(bi->capability) & WLAN_CAPABILITY_PRIVACY) - iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; - else - iwe.u.data.flags = IW_ENCODE_DISABLED; - iwe.u.data.length = 0; - event = - IWE_STREAM_ADD_POINT(info, event, end, &iwe, (char *)event); - - if (bi->rateset.count) { - if (((event - extra) + - IW_EV_LCP_LEN) <= (unsigned long)end) { - value = event + IW_EV_LCP_LEN; - iwe.cmd = SIOCGIWRATE; - iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = - 0; - for (j = 0; - j < bi->rateset.count - && j < IW_MAX_BITRATES; j++) { - iwe.u.bitrate.value = - (bi->rateset.rates[j] & 0x7f) * - 500000; - value = - IWE_STREAM_ADD_VALUE(info, event, - value, end, &iwe, - IW_EV_PARAM_LEN); - } - event = value; - } - } - } - - ret = event - extra; - if (ret < 0) { - WL_ERROR("==> Wrong size\n"); - ret = 0; - } - WL_TRACE("%s: size=%d bytes prepared\n", - __func__, (unsigned int)(event - extra)); - return (uint)ret; -} - -static int -wl_iw_get_scan(struct net_device *dev, - struct iw_request_info *info, struct iw_point *dwrq, char *extra) -{ - channel_info_t ci; - wl_scan_results_t *list_merge; - wl_scan_results_t *list = (wl_scan_results_t *) g_scan; - int error; - uint buflen_from_user = dwrq->length; - uint len = G_SCAN_RESULTS; - __u16 len_ret = 0; -#if defined(WL_IW_USE_ISCAN) - iscan_info_t *iscan = g_iscan; - iscan_buf_t *p_buf; -#endif - - WL_TRACE("%s: buflen_from_user %d:\n", dev->name, buflen_from_user); - - if (!extra) { - WL_TRACE("%s: wl_iw_get_scan return -EINVAL\n", dev->name); - return -EINVAL; - } - - error = dev_wlc_ioctl(dev, WLC_GET_CHANNEL, &ci, sizeof(ci)); - if (error) - return error; - ci.scan_channel = le32_to_cpu(ci.scan_channel); - if (ci.scan_channel) - return -EAGAIN; - - if (g_scan_specified_ssid) { - list = kmalloc(len, GFP_KERNEL); - if (!list) { - WL_TRACE("%s: wl_iw_get_scan return -ENOMEM\n", - dev->name); - g_scan_specified_ssid = 0; - return -ENOMEM; - } - } - - memset(list, 0, len); - list->buflen = cpu_to_le32(len); - error = dev_wlc_ioctl(dev, WLC_SCAN_RESULTS, list, len); - if (error) { - WL_ERROR("%s: %s : Scan_results ERROR %d\n", - dev->name, __func__, error); - dwrq->length = len; - if (g_scan_specified_ssid) { - g_scan_specified_ssid = 0; - kfree(list); - } - return 0; - } - list->buflen = le32_to_cpu(list->buflen); - list->version = le32_to_cpu(list->version); - list->count = le32_to_cpu(list->count); - - if (list->version != WL_BSS_INFO_VERSION) { - WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n", - __func__, list->version); - if (g_scan_specified_ssid) { - g_scan_specified_ssid = 0; - kfree(list); - } - return -EINVAL; - } - - if (g_scan_specified_ssid) { - WL_TRACE("%s: Specified scan APs in the list =%d\n", - __func__, list->count); - len_ret = - (__u16) wl_iw_get_scan_prep(list, info, extra, - buflen_from_user); - kfree(list); - -#if defined(WL_IW_USE_ISCAN) - p_buf = iscan->list_hdr; - while (p_buf != iscan->list_cur) { - list_merge = - &((wl_iscan_results_t *) p_buf->iscan_buf)->results; - WL_TRACE("%s: Bcast APs list=%d\n", - __func__, list_merge->count); - if (list_merge->count > 0) - len_ret += - (__u16) wl_iw_get_scan_prep(list_merge, - info, extra + len_ret, - buflen_from_user - len_ret); - p_buf = p_buf->next; - } -#else - list_merge = (wl_scan_results_t *) g_scan; - WL_TRACE("%s: Bcast APs list=%d\n", - __func__, list_merge->count); - if (list_merge->count > 0) - len_ret += - (__u16) wl_iw_get_scan_prep(list_merge, info, - extra + len_ret, - buflen_from_user - - len_ret); -#endif /* defined(WL_IW_USE_ISCAN) */ - } else { - list = (wl_scan_results_t *) g_scan; - len_ret = - (__u16) wl_iw_get_scan_prep(list, info, extra, - buflen_from_user); - } - -#if defined(WL_IW_USE_ISCAN) - g_scan_specified_ssid = 0; -#endif - if ((len_ret + WE_ADD_EVENT_FIX) < buflen_from_user) - len = len_ret; - - dwrq->length = len; - dwrq->flags = 0; - - WL_TRACE("%s return to WE %d bytes APs=%d\n", - __func__, dwrq->length, list->count); - return 0; -} - -#if defined(WL_IW_USE_ISCAN) -static int -wl_iw_iscan_get_scan(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - wl_scan_results_t *list; - struct iw_event iwe; - wl_bss_info_t *bi = NULL; - int ii, j; - int apcnt; - char *event = extra, *end = extra + dwrq->length, *value; - iscan_info_t *iscan = g_iscan; - iscan_buf_t *p_buf; - u32 counter = 0; - u8 channel; - - WL_TRACE("%s %s buflen_from_user %d:\n", - dev->name, __func__, dwrq->length); - - if (!extra) { - WL_TRACE("%s: INVALID SIOCGIWSCAN GET bad parameter\n", - dev->name); - return -EINVAL; - } - - if ((!iscan) || (!iscan->sysioc_tsk)) { - WL_ERROR("%ssysioc_tsk\n", __func__); - return wl_iw_get_scan(dev, info, dwrq, extra); - } - - if (iscan->iscan_state == ISCAN_STATE_SCANING) { - WL_TRACE("%s: SIOCGIWSCAN GET still scanning\n", dev->name); - return -EAGAIN; - } - - WL_TRACE("%s: SIOCGIWSCAN GET broadcast results\n", dev->name); - apcnt = 0; - p_buf = iscan->list_hdr; - while (p_buf != iscan->list_cur) { - list = &((wl_iscan_results_t *) p_buf->iscan_buf)->results; - - counter += list->count; - - if (list->version != WL_BSS_INFO_VERSION) { - WL_ERROR("%s : list->version %d != WL_BSS_INFO_VERSION\n", - __func__, list->version); - return -EINVAL; - } - - bi = NULL; - for (ii = 0; ii < list->count && apcnt < IW_MAX_AP; - apcnt++, ii++) { - bi = bi ? (wl_bss_info_t *)((unsigned long)bi + - le32_to_cpu(bi->length)) : - list->bss_info; - ASSERT(((unsigned long)bi + le32_to_cpu(bi->length)) <= - ((unsigned long)list + WLC_IW_ISCAN_MAXLEN)); - - if (event + ETH_ALEN + bi->SSID_len + - IW_EV_UINT_LEN + IW_EV_FREQ_LEN + IW_EV_QUAL_LEN >= - end) - return -E2BIG; - iwe.cmd = SIOCGIWAP; - iwe.u.ap_addr.sa_family = ARPHRD_ETHER; - memcpy(iwe.u.ap_addr.sa_data, &bi->BSSID, - ETH_ALEN); - event = - IWE_STREAM_ADD_EVENT(info, event, end, &iwe, - IW_EV_ADDR_LEN); - - iwe.u.data.length = le32_to_cpu(bi->SSID_len); - iwe.cmd = SIOCGIWESSID; - iwe.u.data.flags = 1; - event = - IWE_STREAM_ADD_POINT(info, event, end, &iwe, - bi->SSID); - - if (le16_to_cpu(bi->capability) & - (WLAN_CAPABILITY_ESS | WLAN_CAPABILITY_IBSS)) { - iwe.cmd = SIOCGIWMODE; - if (le16_to_cpu(bi->capability) & - WLAN_CAPABILITY_ESS) - iwe.u.mode = IW_MODE_INFRA; - else - iwe.u.mode = IW_MODE_ADHOC; - event = - IWE_STREAM_ADD_EVENT(info, event, end, &iwe, - IW_EV_UINT_LEN); - } - - iwe.cmd = SIOCGIWFREQ; - channel = - (bi->ctl_ch == - 0) ? CHSPEC_CHANNEL(bi->chanspec) : bi->ctl_ch; - - if (channel <= CH_MAX_2G_CHANNEL) - iwe.u.freq.m = - ieee80211_dsss_chan_to_freq(channel); - else - iwe.u.freq.m = ieee80211_ofdm_chan_to_freq( - WF_CHAN_FACTOR_5_G/2, - channel); - - iwe.u.freq.e = 6; - event = - IWE_STREAM_ADD_EVENT(info, event, end, &iwe, - IW_EV_FREQ_LEN); - - iwe.cmd = IWEVQUAL; - iwe.u.qual.qual = rssi_to_qual(le16_to_cpu(bi->RSSI)); - iwe.u.qual.level = 0x100 + le16_to_cpu(bi->RSSI); - iwe.u.qual.noise = 0x100 + bi->phy_noise; - event = - IWE_STREAM_ADD_EVENT(info, event, end, &iwe, - IW_EV_QUAL_LEN); - - wl_iw_handle_scanresults_ies(&event, end, info, bi); - - iwe.cmd = SIOCGIWENCODE; - if (le16_to_cpu(bi->capability) & - WLAN_CAPABILITY_PRIVACY) - iwe.u.data.flags = - IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; - else - iwe.u.data.flags = IW_ENCODE_DISABLED; - iwe.u.data.length = 0; - event = - IWE_STREAM_ADD_POINT(info, event, end, &iwe, - (char *)event); - - if (bi->rateset.count) { - if (event + IW_MAX_BITRATES * IW_EV_PARAM_LEN >= - end) - return -E2BIG; - - value = event + IW_EV_LCP_LEN; - iwe.cmd = SIOCGIWRATE; - iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = - 0; - for (j = 0; - j < bi->rateset.count - && j < IW_MAX_BITRATES; j++) { - iwe.u.bitrate.value = - (bi->rateset.rates[j] & 0x7f) * - 500000; - value = - IWE_STREAM_ADD_VALUE(info, event, - value, end, - &iwe, - IW_EV_PARAM_LEN); - } - event = value; - } - } - p_buf = p_buf->next; - } - - dwrq->length = event - extra; - dwrq->flags = 0; - - WL_TRACE("%s return to WE %d bytes APs=%d\n", - __func__, dwrq->length, counter); - - if (!dwrq->length) - return -EAGAIN; - - return 0; -} -#endif /* defined(WL_IW_USE_ISCAN) */ - -static int -wl_iw_set_essid(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - int error; - wl_join_params_t join_params; - int join_params_size; - - WL_TRACE("%s: SIOCSIWESSID\n", dev->name); - - if (g_set_essid_before_scan) - return -EAGAIN; - - memset(&g_ssid, 0, sizeof(g_ssid)); - - CHECK_EXTRA_FOR_NULL(extra); - - if (dwrq->length && extra) { -#if WIRELESS_EXT > 20 - g_ssid.SSID_len = min_t(size_t, sizeof(g_ssid.SSID), - dwrq->length); -#else - g_ssid.SSID_len = min_t(size_t, sizeof(g_ssid.SSID), - dwrq->length - 1); -#endif - memcpy(g_ssid.SSID, extra, g_ssid.SSID_len); - } else { - g_ssid.SSID_len = 0; - } - g_ssid.SSID_len = cpu_to_le32(g_ssid.SSID_len); - - memset(&join_params, 0, sizeof(join_params)); - join_params_size = sizeof(join_params.ssid); - - memcpy(&join_params.ssid.SSID, g_ssid.SSID, g_ssid.SSID_len); - join_params.ssid.SSID_len = cpu_to_le32(g_ssid.SSID_len); - memcpy(join_params.params.bssid, ether_bcast, ETH_ALEN); - - wl_iw_ch_to_chanspec(g_wl_iw_params.target_channel, &join_params, - &join_params_size); - - error = dev_wlc_ioctl(dev, WLC_SET_SSID, &join_params, - join_params_size); - if (error) - WL_ERROR("Invalid ioctl data=%d\n", error); - - if (g_ssid.SSID_len) { - WL_TRACE("%s: join SSID=%s ch=%d\n", - __func__, g_ssid.SSID, g_wl_iw_params.target_channel); - } - return 0; -} - -static int -wl_iw_get_essid(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - wlc_ssid_t ssid; - int error; - - WL_TRACE("%s: SIOCGIWESSID\n", dev->name); - - if (!extra) - return -EINVAL; - - error = dev_wlc_ioctl(dev, WLC_GET_SSID, &ssid, sizeof(ssid)); - if (error) { - WL_ERROR("Error getting the SSID\n"); - return error; - } - - ssid.SSID_len = le32_to_cpu(ssid.SSID_len); - - memcpy(extra, ssid.SSID, ssid.SSID_len); - - dwrq->length = ssid.SSID_len; - - dwrq->flags = 1; - - return 0; -} - -static int -wl_iw_set_nick(struct net_device *dev, - struct iw_request_info *info, struct iw_point *dwrq, char *extra) -{ - wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev); - - WL_TRACE("%s: SIOCSIWNICKN\n", dev->name); - - if (!extra) - return -EINVAL; - - if (dwrq->length > sizeof(iw->nickname)) - return -E2BIG; - - memcpy(iw->nickname, extra, dwrq->length); - iw->nickname[dwrq->length - 1] = '\0'; - - return 0; -} - -static int -wl_iw_get_nick(struct net_device *dev, - struct iw_request_info *info, struct iw_point *dwrq, char *extra) -{ - wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev); - - WL_TRACE("%s: SIOCGIWNICKN\n", dev->name); - - if (!extra) - return -EINVAL; - - strcpy(extra, iw->nickname); - dwrq->length = strlen(extra) + 1; - - return 0; -} - -static int -wl_iw_set_rate(struct net_device *dev, - struct iw_request_info *info, struct iw_param *vwrq, char *extra) -{ - wl_rateset_t rateset; - int error, rate, i, error_bg, error_a; - - WL_TRACE("%s: SIOCSIWRATE\n", dev->name); - - error = dev_wlc_ioctl(dev, WLC_GET_CURR_RATESET, &rateset, - sizeof(rateset)); - if (error) - return error; - - rateset.count = le32_to_cpu(rateset.count); - - if (vwrq->value < 0) - rate = rateset.rates[rateset.count - 1] & 0x7f; - else if (vwrq->value < rateset.count) - rate = rateset.rates[vwrq->value] & 0x7f; - else - rate = vwrq->value / 500000; - - if (vwrq->fixed) { - error_bg = dev_wlc_intvar_set(dev, "bg_rate", rate); - error_a = dev_wlc_intvar_set(dev, "a_rate", rate); - - if (error_bg && error_a) - return error_bg | error_a; - } else { - error_bg = dev_wlc_intvar_set(dev, "bg_rate", 0); - error_a = dev_wlc_intvar_set(dev, "a_rate", 0); - - if (error_bg && error_a) - return error_bg | error_a; - - for (i = 0; i < rateset.count; i++) - if ((rateset.rates[i] & 0x7f) > rate) - break; - rateset.count = cpu_to_le32(i); - - error = dev_wlc_ioctl(dev, WLC_SET_RATESET, &rateset, - sizeof(rateset)); - if (error) - return error; - } - - return 0; -} - -static int -wl_iw_get_rate(struct net_device *dev, - struct iw_request_info *info, struct iw_param *vwrq, char *extra) -{ - int error, rate; - - WL_TRACE("%s: SIOCGIWRATE\n", dev->name); - - error = dev_wlc_ioctl(dev, WLC_GET_RATE, &rate, sizeof(rate)); - if (error) - return error; - rate = le32_to_cpu(rate); - vwrq->value = rate * 500000; - - return 0; -} - -static int -wl_iw_set_rts(struct net_device *dev, - struct iw_request_info *info, struct iw_param *vwrq, char *extra) -{ - int error, rts; - - WL_TRACE("%s: SIOCSIWRTS\n", dev->name); - - if (vwrq->disabled) - rts = DOT11_DEFAULT_RTS_LEN; - else if (vwrq->value < 0 || vwrq->value > DOT11_DEFAULT_RTS_LEN) - return -EINVAL; - else - rts = vwrq->value; - - error = dev_wlc_intvar_set(dev, "rtsthresh", rts); - if (error) - return error; - - return 0; -} - -static int -wl_iw_get_rts(struct net_device *dev, - struct iw_request_info *info, struct iw_param *vwrq, char *extra) -{ - int error, rts; - - WL_TRACE("%s: SIOCGIWRTS\n", dev->name); - - error = dev_wlc_intvar_get(dev, "rtsthresh", &rts); - if (error) - return error; - - vwrq->value = rts; - vwrq->disabled = (rts >= DOT11_DEFAULT_RTS_LEN); - vwrq->fixed = 1; - - return 0; -} - -static int -wl_iw_set_frag(struct net_device *dev, - struct iw_request_info *info, struct iw_param *vwrq, char *extra) -{ - int error, frag; - - WL_TRACE("%s: SIOCSIWFRAG\n", dev->name); - - if (vwrq->disabled) - frag = DOT11_DEFAULT_FRAG_LEN; - else if (vwrq->value < 0 || vwrq->value > DOT11_DEFAULT_FRAG_LEN) - return -EINVAL; - else - frag = vwrq->value; - - error = dev_wlc_intvar_set(dev, "fragthresh", frag); - if (error) - return error; - - return 0; -} - -static int -wl_iw_get_frag(struct net_device *dev, - struct iw_request_info *info, struct iw_param *vwrq, char *extra) -{ - int error, fragthreshold; - - WL_TRACE("%s: SIOCGIWFRAG\n", dev->name); - - error = dev_wlc_intvar_get(dev, "fragthresh", &fragthreshold); - if (error) - return error; - - vwrq->value = fragthreshold; - vwrq->disabled = (fragthreshold >= DOT11_DEFAULT_FRAG_LEN); - vwrq->fixed = 1; - - return 0; -} - -static int -wl_iw_set_txpow(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - int error, disable; - u16 txpwrmw; - WL_TRACE("%s: SIOCSIWTXPOW\n", dev->name); - - disable = vwrq->disabled ? WL_RADIO_SW_DISABLE : 0; - disable += WL_RADIO_SW_DISABLE << 16; - - disable = cpu_to_le32(disable); - error = dev_wlc_ioctl(dev, WLC_SET_RADIO, &disable, sizeof(disable)); - if (error) - return error; - - if (disable & WL_RADIO_SW_DISABLE) - return 0; - - if (!(vwrq->flags & IW_TXPOW_MWATT)) - return -EINVAL; - - if (vwrq->value < 0) - return 0; - - if (vwrq->value > 0xffff) - txpwrmw = 0xffff; - else - txpwrmw = (u16) vwrq->value; - - error = - dev_wlc_intvar_set(dev, "qtxpower", (int)(bcm_mw_to_qdbm(txpwrmw))); - return error; -} - -static int -wl_iw_get_txpow(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - int error, disable, txpwrdbm; - u8 result; - - WL_TRACE("%s: SIOCGIWTXPOW\n", dev->name); - - error = dev_wlc_ioctl(dev, WLC_GET_RADIO, &disable, sizeof(disable)); - if (error) - return error; - - error = dev_wlc_intvar_get(dev, "qtxpower", &txpwrdbm); - if (error) - return error; - - disable = le32_to_cpu(disable); - result = (u8) (txpwrdbm & ~WL_TXPWR_OVERRIDE); - vwrq->value = (s32) bcm_qdbm_to_mw(result); - vwrq->fixed = 0; - vwrq->disabled = - (disable & (WL_RADIO_SW_DISABLE | WL_RADIO_HW_DISABLE)) ? 1 : 0; - vwrq->flags = IW_TXPOW_MWATT; - - return 0; -} - -#if WIRELESS_EXT > 10 -static int -wl_iw_set_retry(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - int error, lrl, srl; - - WL_TRACE("%s: SIOCSIWRETRY\n", dev->name); - - if (vwrq->disabled || (vwrq->flags & IW_RETRY_LIFETIME)) - return -EINVAL; - - if (vwrq->flags & IW_RETRY_LIMIT) { - -#if WIRELESS_EXT > 20 - if ((vwrq->flags & IW_RETRY_LONG) - || (vwrq->flags & IW_RETRY_MAX) - || !((vwrq->flags & IW_RETRY_SHORT) - || (vwrq->flags & IW_RETRY_MIN))) { -#else - if ((vwrq->flags & IW_RETRY_MAX) - || !(vwrq->flags & IW_RETRY_MIN)) { -#endif - lrl = cpu_to_le32(vwrq->value); - error = dev_wlc_ioctl(dev, WLC_SET_LRL, &lrl, - sizeof(lrl)); - if (error) - return error; - } -#if WIRELESS_EXT > 20 - if ((vwrq->flags & IW_RETRY_SHORT) - || (vwrq->flags & IW_RETRY_MIN) - || !((vwrq->flags & IW_RETRY_LONG) - || (vwrq->flags & IW_RETRY_MAX))) { -#else - if ((vwrq->flags & IW_RETRY_MIN) - || !(vwrq->flags & IW_RETRY_MAX)) { -#endif - srl = cpu_to_le32(vwrq->value); - error = dev_wlc_ioctl(dev, WLC_SET_SRL, &srl, - sizeof(srl)); - if (error) - return error; - } - } - return 0; -} - -static int -wl_iw_get_retry(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - int error, lrl, srl; - - WL_TRACE("%s: SIOCGIWRETRY\n", dev->name); - - vwrq->disabled = 0; - - if ((vwrq->flags & IW_RETRY_TYPE) == IW_RETRY_LIFETIME) - return -EINVAL; - - error = dev_wlc_ioctl(dev, WLC_GET_LRL, &lrl, sizeof(lrl)); - if (error) - return error; - - error = dev_wlc_ioctl(dev, WLC_GET_SRL, &srl, sizeof(srl)); - if (error) - return error; - - lrl = le32_to_cpu(lrl); - srl = le32_to_cpu(srl); - - if (vwrq->flags & IW_RETRY_MAX) { - vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_MAX; - vwrq->value = lrl; - } else { - vwrq->flags = IW_RETRY_LIMIT; - vwrq->value = srl; - if (srl != lrl) - vwrq->flags |= IW_RETRY_MIN; - } - - return 0; -} -#endif /* WIRELESS_EXT > 10 */ - -static int -wl_iw_set_encode(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - wl_wsec_key_t key; - int error, val, wsec; - - WL_TRACE("%s: SIOCSIWENCODE\n", dev->name); - - memset(&key, 0, sizeof(key)); - - if ((dwrq->flags & IW_ENCODE_INDEX) == 0) { - for (key.index = 0; key.index < DOT11_MAX_DEFAULT_KEYS; - key.index++) { - val = cpu_to_le32(key.index); - error = dev_wlc_ioctl(dev, WLC_GET_KEY_PRIMARY, &val, - sizeof(val)); - if (error) - return error; - val = le32_to_cpu(val); - if (val) - break; - } - if (key.index == DOT11_MAX_DEFAULT_KEYS) - key.index = 0; - } else { - key.index = (dwrq->flags & IW_ENCODE_INDEX) - 1; - if (key.index >= DOT11_MAX_DEFAULT_KEYS) - return -EINVAL; - } - - if (!extra || !dwrq->length || (dwrq->flags & IW_ENCODE_NOKEY)) { - val = cpu_to_le32(key.index); - error = dev_wlc_ioctl(dev, WLC_SET_KEY_PRIMARY, &val, - sizeof(val)); - if (error) - return error; - } else { - key.len = dwrq->length; - - if (dwrq->length > sizeof(key.data)) - return -EINVAL; - - memcpy(key.data, extra, dwrq->length); - - key.flags = WL_PRIMARY_KEY; - switch (key.len) { - case WLAN_KEY_LEN_WEP40: - key.algo = CRYPTO_ALGO_WEP1; - break; - case WLAN_KEY_LEN_WEP104: - key.algo = CRYPTO_ALGO_WEP128; - break; - case WLAN_KEY_LEN_TKIP: - key.algo = CRYPTO_ALGO_TKIP; - break; - case WLAN_KEY_LEN_AES_CMAC: - key.algo = CRYPTO_ALGO_AES_CCM; - break; - default: - return -EINVAL; - } - - swap_key_from_BE(&key); - error = dev_wlc_ioctl(dev, WLC_SET_KEY, &key, sizeof(key)); - if (error) - return error; - } - - val = (dwrq->flags & IW_ENCODE_DISABLED) ? 0 : WEP_ENABLED; - - error = dev_wlc_intvar_get(dev, "wsec", &wsec); - if (error) - return error; - - wsec &= ~(WEP_ENABLED); - wsec |= val; - - error = dev_wlc_intvar_set(dev, "wsec", wsec); - if (error) - return error; - - val = (dwrq->flags & IW_ENCODE_RESTRICTED) ? 1 : 0; - val = cpu_to_le32(val); - error = dev_wlc_ioctl(dev, WLC_SET_AUTH, &val, sizeof(val)); - if (error) - return error; - - return 0; -} - -static int -wl_iw_get_encode(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - wl_wsec_key_t key; - int error, val, wsec, auth; - - WL_TRACE("%s: SIOCGIWENCODE\n", dev->name); - - memset(&key, 0, sizeof(wl_wsec_key_t)); - - if ((dwrq->flags & IW_ENCODE_INDEX) == 0) { - for (key.index = 0; key.index < DOT11_MAX_DEFAULT_KEYS; - key.index++) { - val = key.index; - error = dev_wlc_ioctl(dev, WLC_GET_KEY_PRIMARY, &val, - sizeof(val)); - if (error) - return error; - val = le32_to_cpu(val); - if (val) - break; - } - } else - key.index = (dwrq->flags & IW_ENCODE_INDEX) - 1; - - if (key.index >= DOT11_MAX_DEFAULT_KEYS) - key.index = 0; - - error = dev_wlc_ioctl(dev, WLC_GET_WSEC, &wsec, sizeof(wsec)); - if (error) - return error; - - error = dev_wlc_ioctl(dev, WLC_GET_AUTH, &auth, sizeof(auth)); - if (error) - return error; - - swap_key_to_BE(&key); - - wsec = le32_to_cpu(wsec); - auth = le32_to_cpu(auth); - dwrq->length = min_t(u16, WLAN_MAX_KEY_LEN, key.len); - - dwrq->flags = key.index + 1; - if (!(wsec & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED))) - dwrq->flags |= IW_ENCODE_DISABLED; - - if (auth) - dwrq->flags |= IW_ENCODE_RESTRICTED; - - if (dwrq->length && extra) - memcpy(extra, key.data, dwrq->length); - - return 0; -} - -static int -wl_iw_set_power(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - int error, pm; - - WL_TRACE("%s: SIOCSIWPOWER\n", dev->name); - - pm = vwrq->disabled ? PM_OFF : PM_MAX; - - pm = cpu_to_le32(pm); - error = dev_wlc_ioctl(dev, WLC_SET_PM, &pm, sizeof(pm)); - if (error) - return error; - - return 0; -} - -static int -wl_iw_get_power(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - int error, pm; - - WL_TRACE("%s: SIOCGIWPOWER\n", dev->name); - - error = dev_wlc_ioctl(dev, WLC_GET_PM, &pm, sizeof(pm)); - if (error) - return error; - - pm = le32_to_cpu(pm); - vwrq->disabled = pm ? 0 : 1; - vwrq->flags = IW_POWER_ALL_R; - - return 0; -} - -#if WIRELESS_EXT > 17 -static int -wl_iw_set_wpaie(struct net_device *dev, - struct iw_request_info *info, struct iw_point *iwp, char *extra) -{ - - WL_TRACE("%s: SIOCSIWGENIE\n", dev->name); - - CHECK_EXTRA_FOR_NULL(extra); - - dev_wlc_bufvar_set(dev, "wpaie", extra, iwp->length); - - return 0; -} - -static int -wl_iw_get_wpaie(struct net_device *dev, - struct iw_request_info *info, struct iw_point *iwp, char *extra) -{ - WL_TRACE("%s: SIOCGIWGENIE\n", dev->name); - iwp->length = 64; - dev_wlc_bufvar_get(dev, "wpaie", extra, iwp->length); - return 0; -} - -static int -wl_iw_set_encodeext(struct net_device *dev, - struct iw_request_info *info, - struct iw_point *dwrq, char *extra) -{ - wl_wsec_key_t key; - int error; - struct iw_encode_ext *iwe; - - WL_TRACE("%s: SIOCSIWENCODEEXT\n", dev->name); - - CHECK_EXTRA_FOR_NULL(extra); - - memset(&key, 0, sizeof(key)); - iwe = (struct iw_encode_ext *)extra; - - if (dwrq->flags & IW_ENCODE_DISABLED) { - - } - - key.index = 0; - if (dwrq->flags & IW_ENCODE_INDEX) - key.index = (dwrq->flags & IW_ENCODE_INDEX) - 1; - - key.len = iwe->key_len; - - if (!is_multicast_ether_addr(iwe->addr.sa_data)) - memcpy(&key.ea, &iwe->addr.sa_data, ETH_ALEN); - - if (key.len == 0) { - if (iwe->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) { - WL_WSEC("Changing the the primary Key to %d\n", - key.index); - key.index = cpu_to_le32(key.index); - error = dev_wlc_ioctl(dev, WLC_SET_KEY_PRIMARY, - &key.index, sizeof(key.index)); - if (error) - return error; - } else { - swap_key_from_BE(&key); - dev_wlc_ioctl(dev, WLC_SET_KEY, &key, sizeof(key)); - } - } else { - if (iwe->key_len > sizeof(key.data)) - return -EINVAL; - - WL_WSEC("Setting the key index %d\n", key.index); - if (iwe->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) { - WL_WSEC("key is a Primary Key\n"); - key.flags = WL_PRIMARY_KEY; - } - - memcpy(key.data, iwe->key, iwe->key_len); - - if (iwe->alg == IW_ENCODE_ALG_TKIP) { - u8 keybuf[8]; - memcpy(keybuf, &key.data[24], sizeof(keybuf)); - memcpy(&key.data[24], &key.data[16], sizeof(keybuf)); - memcpy(&key.data[16], keybuf, sizeof(keybuf)); - } - - if (iwe->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) { - unsigned char *ivptr; - ivptr = (unsigned char *) iwe->rx_seq; - key.rxiv.hi = (ivptr[5] << 24) | (ivptr[4] << 16) | - (ivptr[3] << 8) | ivptr[2]; - key.rxiv.lo = (ivptr[1] << 8) | ivptr[0]; - key.iv_initialized = true; - } - - switch (iwe->alg) { - case IW_ENCODE_ALG_NONE: - key.algo = CRYPTO_ALGO_OFF; - break; - case IW_ENCODE_ALG_WEP: - if (iwe->key_len == WLAN_KEY_LEN_WEP40) - key.algo = CRYPTO_ALGO_WEP1; - else - key.algo = CRYPTO_ALGO_WEP128; - break; - case IW_ENCODE_ALG_TKIP: - key.algo = CRYPTO_ALGO_TKIP; - break; - case IW_ENCODE_ALG_CCMP: - key.algo = CRYPTO_ALGO_AES_CCM; - break; - default: - break; - } - swap_key_from_BE(&key); - - dhd_wait_pend8021x(dev); - - error = dev_wlc_ioctl(dev, WLC_SET_KEY, &key, sizeof(key)); - if (error) - return error; - } - return 0; -} - -#if WIRELESS_EXT > 17 -struct { - pmkid_list_t pmkids; - pmkid_t foo[MAXPMKID - 1]; -} pmkid_list; - -static int -wl_iw_set_pmksa(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - struct iw_pmksa *iwpmksa; - uint i; - int ret = 0; - - WL_WSEC("%s: SIOCSIWPMKSA\n", dev->name); - - CHECK_EXTRA_FOR_NULL(extra); - - iwpmksa = (struct iw_pmksa *)extra; - - if (iwpmksa->cmd == IW_PMKSA_FLUSH) { - WL_WSEC("wl_iw_set_pmksa - IW_PMKSA_FLUSH\n"); - memset((char *)&pmkid_list, 0, sizeof(pmkid_list)); - } - - else if (iwpmksa->cmd == IW_PMKSA_REMOVE) { - { - pmkid_list_t pmkid, *pmkidptr; - uint j; - pmkidptr = &pmkid; - - memcpy(&pmkidptr->pmkid[0].BSSID, - &iwpmksa->bssid.sa_data[0], - ETH_ALEN); - memcpy(&pmkidptr->pmkid[0].PMKID, - &iwpmksa->pmkid[0], - WLAN_PMKID_LEN); - - WL_WSEC("wl_iw_set_pmksa:IW_PMKSA_REMOVE:PMKID: " - "%pM = ", &pmkidptr->pmkid[0].BSSID); - for (j = 0; j < WLAN_PMKID_LEN; j++) - WL_WSEC("%02x ", pmkidptr->pmkid[0].PMKID[j]); - WL_WSEC("\n"); - } - - for (i = 0; i < pmkid_list.pmkids.npmkid; i++) - if (!memcmp - (&iwpmksa->bssid.sa_data[0], - &pmkid_list.pmkids.pmkid[i].BSSID, ETH_ALEN)) - break; - - if ((pmkid_list.pmkids.npmkid > 0) - && (i < pmkid_list.pmkids.npmkid)) { - memset(&pmkid_list.pmkids.pmkid[i], 0, sizeof(pmkid_t)); - for (; i < (pmkid_list.pmkids.npmkid - 1); i++) { - memcpy(&pmkid_list.pmkids.pmkid[i].BSSID, - &pmkid_list.pmkids.pmkid[i + 1].BSSID, - ETH_ALEN); - memcpy(&pmkid_list.pmkids.pmkid[i].PMKID, - &pmkid_list.pmkids.pmkid[i + 1].PMKID, - WLAN_PMKID_LEN); - } - pmkid_list.pmkids.npmkid--; - } else - ret = -EINVAL; - } - - else if (iwpmksa->cmd == IW_PMKSA_ADD) { - for (i = 0; i < pmkid_list.pmkids.npmkid; i++) - if (!memcmp - (&iwpmksa->bssid.sa_data[0], - &pmkid_list.pmkids.pmkid[i].BSSID, ETH_ALEN)) - break; - if (i < MAXPMKID) { - memcpy(&pmkid_list.pmkids.pmkid[i].BSSID, - &iwpmksa->bssid.sa_data[0], - ETH_ALEN); - memcpy(&pmkid_list.pmkids.pmkid[i].PMKID, - &iwpmksa->pmkid[0], - WLAN_PMKID_LEN); - if (i == pmkid_list.pmkids.npmkid) - pmkid_list.pmkids.npmkid++; - } else - ret = -EINVAL; - { - uint j; - uint k; - k = pmkid_list.pmkids.npmkid; - WL_WSEC("wl_iw_set_pmksa,IW_PMKSA_ADD - PMKID: %pM = ", - &pmkid_list.pmkids.pmkid[k].BSSID); - for (j = 0; j < WLAN_PMKID_LEN; j++) - WL_WSEC("%02x ", - pmkid_list.pmkids.pmkid[k].PMKID[j]); - WL_WSEC("\n"); - } - } - WL_WSEC("PRINTING pmkid LIST - No of elements %d\n", - pmkid_list.pmkids.npmkid); - for (i = 0; i < pmkid_list.pmkids.npmkid; i++) { - uint j; - WL_WSEC("PMKID[%d]: %pM = ", - i, &pmkid_list.pmkids.pmkid[i].BSSID); - for (j = 0; j < WLAN_PMKID_LEN; j++) - WL_WSEC("%02x ", pmkid_list.pmkids.pmkid[i].PMKID[j]); - WL_WSEC("\n"); - } - WL_WSEC("\n"); - - if (!ret) - ret = dev_wlc_bufvar_set(dev, "pmkid_info", (char *)&pmkid_list, - sizeof(pmkid_list)); - return ret; -} -#endif /* WIRELESS_EXT > 17 */ - -static int -wl_iw_get_encodeext(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - WL_TRACE("%s: SIOCGIWENCODEEXT\n", dev->name); - return 0; -} - -static int -wl_iw_set_wpaauth(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - int error = 0; - int paramid; - int paramval; - int val = 0; - wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev); - - WL_TRACE("%s: SIOCSIWAUTH\n", dev->name); - - paramid = vwrq->flags & IW_AUTH_INDEX; - paramval = vwrq->value; - - WL_TRACE("%s: SIOCSIWAUTH, paramid = 0x%0x, paramval = 0x%0x\n", - dev->name, paramid, paramval); - - switch (paramid) { - case IW_AUTH_WPA_VERSION: - if (paramval & IW_AUTH_WPA_VERSION_DISABLED) - val = WPA_AUTH_DISABLED; - else if (paramval & (IW_AUTH_WPA_VERSION_WPA)) - val = WPA_AUTH_PSK | WPA_AUTH_UNSPECIFIED; - else if (paramval & IW_AUTH_WPA_VERSION_WPA2) - val = WPA2_AUTH_PSK | WPA2_AUTH_UNSPECIFIED; - WL_INFORM("%s: %d: setting wpa_auth to 0x%0x\n", - __func__, __LINE__, val); - error = dev_wlc_intvar_set(dev, "wpa_auth", val); - if (error) - return error; - break; - case IW_AUTH_CIPHER_PAIRWISE: - case IW_AUTH_CIPHER_GROUP: - if (paramval & (IW_AUTH_CIPHER_WEP40 | IW_AUTH_CIPHER_WEP104)) - val = WEP_ENABLED; - if (paramval & IW_AUTH_CIPHER_TKIP) - val = TKIP_ENABLED; - if (paramval & IW_AUTH_CIPHER_CCMP) - val = AES_ENABLED; - - if (paramid == IW_AUTH_CIPHER_PAIRWISE) { - iw->pwsec = val; - val |= iw->gwsec; - } else { - iw->gwsec = val; - val |= iw->pwsec; - } - - if (iw->privacy_invoked && !val) { - WL_WSEC("%s: %s: 'Privacy invoked' true but clearing wsec, assuming we're a WPS enrollee\n", - dev->name, __func__); - error = dev_wlc_intvar_set(dev, "is_WPS_enrollee", - true); - if (error) { - WL_WSEC("Failed to set is_WPS_enrollee\n"); - return error; - } - } else if (val) { - error = dev_wlc_intvar_set(dev, "is_WPS_enrollee", - false); - if (error) { - WL_WSEC("Failed to clear is_WPS_enrollee\n"); - return error; - } - } - - error = dev_wlc_intvar_set(dev, "wsec", val); - if (error) - return error; - - break; - - case IW_AUTH_KEY_MGMT: - error = dev_wlc_intvar_get(dev, "wpa_auth", &val); - if (error) - return error; - - if (val & (WPA_AUTH_PSK | WPA_AUTH_UNSPECIFIED)) { - if (paramval & IW_AUTH_KEY_MGMT_PSK) - val = WPA_AUTH_PSK; - else - val = WPA_AUTH_UNSPECIFIED; - } else if (val & (WPA2_AUTH_PSK | WPA2_AUTH_UNSPECIFIED)) { - if (paramval & IW_AUTH_KEY_MGMT_PSK) - val = WPA2_AUTH_PSK; - else - val = WPA2_AUTH_UNSPECIFIED; - } - WL_INFORM("%s: %d: setting wpa_auth to %d\n", - __func__, __LINE__, val); - error = dev_wlc_intvar_set(dev, "wpa_auth", val); - if (error) - return error; - - break; - case IW_AUTH_TKIP_COUNTERMEASURES: - dev_wlc_bufvar_set(dev, "tkip_countermeasures", - (char *)¶mval, 1); - break; - - case IW_AUTH_80211_AUTH_ALG: - WL_INFORM("Setting the D11auth %d\n", paramval); - if (paramval == IW_AUTH_ALG_OPEN_SYSTEM) - val = 0; - else if (paramval == IW_AUTH_ALG_SHARED_KEY) - val = 1; - else if (paramval == - (IW_AUTH_ALG_OPEN_SYSTEM | IW_AUTH_ALG_SHARED_KEY)) - val = 2; - else - error = 1; - if (!error) { - error = dev_wlc_intvar_set(dev, "auth", val); - if (error) - return error; - } - break; - - case IW_AUTH_WPA_ENABLED: - if (paramval == 0) { - iw->pwsec = 0; - iw->gwsec = 0; - error = dev_wlc_intvar_get(dev, "wsec", &val); - if (error) - return error; - if (val & (TKIP_ENABLED | AES_ENABLED)) { - val &= ~(TKIP_ENABLED | AES_ENABLED); - dev_wlc_intvar_set(dev, "wsec", val); - } - val = 0; - WL_INFORM("%s: %d: setting wpa_auth to %d\n", - __func__, __LINE__, val); - dev_wlc_intvar_set(dev, "wpa_auth", 0); - return error; - } - break; - - case IW_AUTH_DROP_UNENCRYPTED: - dev_wlc_bufvar_set(dev, "wsec_restrict", (char *)¶mval, 1); - break; - - case IW_AUTH_RX_UNENCRYPTED_EAPOL: - dev_wlc_bufvar_set(dev, "rx_unencrypted_eapol", - (char *)¶mval, 1); - break; - -#if WIRELESS_EXT > 17 - case IW_AUTH_ROAMING_CONTROL: - WL_INFORM("%s: IW_AUTH_ROAMING_CONTROL\n", __func__); - break; - case IW_AUTH_PRIVACY_INVOKED: - { - int wsec; - - if (paramval == 0) { - iw->privacy_invoked = false; - error = dev_wlc_intvar_set(dev, - "is_WPS_enrollee", false); - if (error) { - WL_WSEC("Failed to clear iovar is_WPS_enrollee\n"); - return error; - } - } else { - iw->privacy_invoked = true; - error = dev_wlc_intvar_get(dev, "wsec", &wsec); - if (error) - return error; - - if (!(IW_WSEC_ENABLED(wsec))) { - error = dev_wlc_intvar_set(dev, - "is_WPS_enrollee", - true); - if (error) { - WL_WSEC("Failed to set iovar is_WPS_enrollee\n"); - return error; - } - } else { - error = dev_wlc_intvar_set(dev, - "is_WPS_enrollee", - false); - if (error) { - WL_WSEC("Failed to clear is_WPS_enrollee\n"); - return error; - } - } - } - break; - } -#endif /* WIRELESS_EXT > 17 */ - default: - break; - } - return 0; -} - -#define VAL_PSK(_val) (((_val) & WPA_AUTH_PSK) || ((_val) & WPA2_AUTH_PSK)) - -static int -wl_iw_get_wpaauth(struct net_device *dev, - struct iw_request_info *info, - struct iw_param *vwrq, char *extra) -{ - int error; - int paramid; - int paramval = 0; - int val; - wl_iw_t *iw = *(wl_iw_t **) netdev_priv(dev); - - WL_TRACE("%s: SIOCGIWAUTH\n", dev->name); - - paramid = vwrq->flags & IW_AUTH_INDEX; - - switch (paramid) { - case IW_AUTH_WPA_VERSION: - error = dev_wlc_intvar_get(dev, "wpa_auth", &val); - if (error) - return error; - if (val & (WPA_AUTH_NONE | WPA_AUTH_DISABLED)) - paramval = IW_AUTH_WPA_VERSION_DISABLED; - else if (val & (WPA_AUTH_PSK | WPA_AUTH_UNSPECIFIED)) - paramval = IW_AUTH_WPA_VERSION_WPA; - else if (val & (WPA2_AUTH_PSK | WPA2_AUTH_UNSPECIFIED)) - paramval = IW_AUTH_WPA_VERSION_WPA2; - break; - case IW_AUTH_CIPHER_PAIRWISE: - case IW_AUTH_CIPHER_GROUP: - if (paramid == IW_AUTH_CIPHER_PAIRWISE) - val = iw->pwsec; - else - val = iw->gwsec; - - paramval = 0; - if (val) { - if (val & WEP_ENABLED) - paramval |= - (IW_AUTH_CIPHER_WEP40 | - IW_AUTH_CIPHER_WEP104); - if (val & TKIP_ENABLED) - paramval |= (IW_AUTH_CIPHER_TKIP); - if (val & AES_ENABLED) - paramval |= (IW_AUTH_CIPHER_CCMP); - } else - paramval = IW_AUTH_CIPHER_NONE; - break; - case IW_AUTH_KEY_MGMT: - error = dev_wlc_intvar_get(dev, "wpa_auth", &val); - if (error) - return error; - if (VAL_PSK(val)) - paramval = IW_AUTH_KEY_MGMT_PSK; - else - paramval = IW_AUTH_KEY_MGMT_802_1X; - - break; - case IW_AUTH_TKIP_COUNTERMEASURES: - dev_wlc_bufvar_get(dev, "tkip_countermeasures", - (char *)¶mval, 1); - break; - - case IW_AUTH_DROP_UNENCRYPTED: - dev_wlc_bufvar_get(dev, "wsec_restrict", (char *)¶mval, 1); - break; - - case IW_AUTH_RX_UNENCRYPTED_EAPOL: - dev_wlc_bufvar_get(dev, "rx_unencrypted_eapol", - (char *)¶mval, 1); - break; - - case IW_AUTH_80211_AUTH_ALG: - error = dev_wlc_intvar_get(dev, "auth", &val); - if (error) - return error; - if (!val) - paramval = IW_AUTH_ALG_OPEN_SYSTEM; - else - paramval = IW_AUTH_ALG_SHARED_KEY; - break; - case IW_AUTH_WPA_ENABLED: - error = dev_wlc_intvar_get(dev, "wpa_auth", &val); - if (error) - return error; - if (val) - paramval = true; - else - paramval = false; - break; -#if WIRELESS_EXT > 17 - case IW_AUTH_ROAMING_CONTROL: - WL_ERROR("%s: IW_AUTH_ROAMING_CONTROL\n", __func__); - break; - case IW_AUTH_PRIVACY_INVOKED: - paramval = iw->privacy_invoked; - break; - -#endif - } - vwrq->value = paramval; - return 0; -} -#endif /* WIRELESS_EXT > 17 */ - -static const iw_handler wl_iw_handler[] = { - (iw_handler) wl_iw_config_commit, - (iw_handler) wl_iw_get_name, - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) wl_iw_set_freq, - (iw_handler) wl_iw_get_freq, - (iw_handler) wl_iw_set_mode, - (iw_handler) wl_iw_get_mode, - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) wl_iw_get_range, - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) wl_iw_set_spy, - (iw_handler) wl_iw_get_spy, - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) wl_iw_set_wap, - (iw_handler) wl_iw_get_wap, -#if WIRELESS_EXT > 17 - (iw_handler) wl_iw_mlme, -#else - (iw_handler) NULL, -#endif -#if defined(WL_IW_USE_ISCAN) - (iw_handler) wl_iw_iscan_get_aplist, -#else - (iw_handler) wl_iw_get_aplist, -#endif -#if WIRELESS_EXT > 13 -#if defined(WL_IW_USE_ISCAN) - (iw_handler) wl_iw_iscan_set_scan, - (iw_handler) wl_iw_iscan_get_scan, -#else - (iw_handler) wl_iw_set_scan, - (iw_handler) wl_iw_get_scan, -#endif -#else - (iw_handler) NULL, - (iw_handler) NULL, -#endif /* WIRELESS_EXT > 13 */ - (iw_handler) wl_iw_set_essid, - (iw_handler) wl_iw_get_essid, - (iw_handler) wl_iw_set_nick, - (iw_handler) wl_iw_get_nick, - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) wl_iw_set_rate, - (iw_handler) wl_iw_get_rate, - (iw_handler) wl_iw_set_rts, - (iw_handler) wl_iw_get_rts, - (iw_handler) wl_iw_set_frag, - (iw_handler) wl_iw_get_frag, - (iw_handler) wl_iw_set_txpow, - (iw_handler) wl_iw_get_txpow, -#if WIRELESS_EXT > 10 - (iw_handler) wl_iw_set_retry, - (iw_handler) wl_iw_get_retry, -#endif - (iw_handler) wl_iw_set_encode, - (iw_handler) wl_iw_get_encode, - (iw_handler) wl_iw_set_power, - (iw_handler) wl_iw_get_power, -#if WIRELESS_EXT > 17 - (iw_handler) NULL, - (iw_handler) NULL, - (iw_handler) wl_iw_set_wpaie, - (iw_handler) wl_iw_get_wpaie, - (iw_handler) wl_iw_set_wpaauth, - (iw_handler) wl_iw_get_wpaauth, - (iw_handler) wl_iw_set_encodeext, - (iw_handler) wl_iw_get_encodeext, - (iw_handler) wl_iw_set_pmksa, -#endif /* WIRELESS_EXT > 17 */ -}; - -#if WIRELESS_EXT > 12 - -const struct iw_handler_def wl_iw_handler_def = { - .num_standard = ARRAY_SIZE(wl_iw_handler), - .standard = (iw_handler *) wl_iw_handler, - .num_private = 0, - .num_private_args = 0, - .private = 0, - .private_args = 0, - -#if WIRELESS_EXT >= 19 - .get_wireless_stats = NULL, -#endif -}; -#endif /* WIRELESS_EXT > 12 */ - -int wl_iw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) -{ - struct iwreq *wrq = (struct iwreq *)rq; - struct iw_request_info info; - iw_handler handler; - char *extra = NULL; - int token_size = 1, max_tokens = 0, ret = 0; - - WL_TRACE("\n%s, cmd:%x alled via dhd->do_ioctl()entry point\n", - __func__, cmd); - if (cmd < SIOCIWFIRST || - IW_IOCTL_IDX(cmd) >= ARRAY_SIZE(wl_iw_handler)) { - WL_ERROR("%s: error in cmd=%x : out of range\n", - __func__, cmd); - return -EOPNOTSUPP; - } - - handler = wl_iw_handler[IW_IOCTL_IDX(cmd)]; - if (!handler) { - WL_ERROR("%s: error in cmd=%x : not supported\n", - __func__, cmd); - return -EOPNOTSUPP; - } - - switch (cmd) { - - case SIOCSIWESSID: - case SIOCGIWESSID: - case SIOCSIWNICKN: - case SIOCGIWNICKN: - max_tokens = IW_ESSID_MAX_SIZE + 1; - break; - - case SIOCSIWENCODE: - case SIOCGIWENCODE: -#if WIRELESS_EXT > 17 - case SIOCSIWENCODEEXT: - case SIOCGIWENCODEEXT: -#endif - max_tokens = wrq->u.data.length; - break; - - case SIOCGIWRANGE: - max_tokens = sizeof(struct iw_range) + 500; - break; - - case SIOCGIWAPLIST: - token_size = - sizeof(struct sockaddr) + sizeof(struct iw_quality); - max_tokens = IW_MAX_AP; - break; - -#if WIRELESS_EXT > 13 - case SIOCGIWSCAN: -#if defined(WL_IW_USE_ISCAN) - if (g_iscan) - max_tokens = wrq->u.data.length; - else -#endif - max_tokens = IW_SCAN_MAX_DATA; - break; -#endif /* WIRELESS_EXT > 13 */ - - case SIOCSIWSPY: - token_size = sizeof(struct sockaddr); - max_tokens = IW_MAX_SPY; - break; - - case SIOCGIWSPY: - token_size = - sizeof(struct sockaddr) + sizeof(struct iw_quality); - max_tokens = IW_MAX_SPY; - break; - -#if WIRELESS_EXT > 17 - case SIOCSIWPMKSA: - case SIOCSIWGENIE: -#endif - case SIOCSIWPRIV: - max_tokens = wrq->u.data.length; - break; - } - - if (max_tokens && wrq->u.data.pointer) { - if (wrq->u.data.length > max_tokens) { - WL_ERROR("%s: error in cmd=%x wrq->u.data.length=%d > max_tokens=%d\n", - __func__, cmd, wrq->u.data.length, max_tokens); - return -E2BIG; - } - extra = kmalloc(max_tokens * token_size, GFP_KERNEL); - if (!extra) - return -ENOMEM; - - if (copy_from_user - (extra, wrq->u.data.pointer, - wrq->u.data.length * token_size)) { - kfree(extra); - return -EFAULT; - } - } - - info.cmd = cmd; - info.flags = 0; - - ret = handler(dev, &info, &wrq->u, extra); - - if (extra) { - if (copy_to_user - (wrq->u.data.pointer, extra, - wrq->u.data.length * token_size)) { - kfree(extra); - return -EFAULT; - } - - kfree(extra); - } - - return ret; -} - -bool -wl_iw_conn_status_str(u32 event_type, u32 status, u32 reason, - char *stringBuf, uint buflen) -{ - typedef struct conn_fail_event_map_t { - u32 inEvent; - u32 inStatus; - u32 inReason; - const char *outName; - const char *outCause; - } conn_fail_event_map_t; - -#define WL_IW_DONT_CARE 9999 - const conn_fail_event_map_t event_map[] = { - {WLC_E_SET_SSID, WLC_E_STATUS_SUCCESS, WL_IW_DONT_CARE, - "Conn", "Success"}, - {WLC_E_SET_SSID, WLC_E_STATUS_NO_NETWORKS, WL_IW_DONT_CARE, - "Conn", "NoNetworks"}, - {WLC_E_SET_SSID, WLC_E_STATUS_FAIL, WL_IW_DONT_CARE, - "Conn", "ConfigMismatch"}, - {WLC_E_PRUNE, WL_IW_DONT_CARE, WLC_E_PRUNE_ENCR_MISMATCH, - "Conn", "EncrypMismatch"}, - {WLC_E_PRUNE, WL_IW_DONT_CARE, WLC_E_RSN_MISMATCH, - "Conn", "RsnMismatch"}, - {WLC_E_AUTH, WLC_E_STATUS_TIMEOUT, WL_IW_DONT_CARE, - "Conn", "AuthTimeout"}, - {WLC_E_AUTH, WLC_E_STATUS_FAIL, WL_IW_DONT_CARE, - "Conn", "AuthFail"}, - {WLC_E_AUTH, WLC_E_STATUS_NO_ACK, WL_IW_DONT_CARE, - "Conn", "AuthNoAck"}, - {WLC_E_REASSOC, WLC_E_STATUS_FAIL, WL_IW_DONT_CARE, - "Conn", "ReassocFail"}, - {WLC_E_REASSOC, WLC_E_STATUS_TIMEOUT, WL_IW_DONT_CARE, - "Conn", "ReassocTimeout"}, - {WLC_E_REASSOC, WLC_E_STATUS_ABORT, WL_IW_DONT_CARE, - "Conn", "ReassocAbort"}, - {WLC_E_PSK_SUP, WLC_SUP_KEYED, WL_IW_DONT_CARE, - "Sup", "ConnSuccess"}, - {WLC_E_PSK_SUP, WL_IW_DONT_CARE, WL_IW_DONT_CARE, - "Sup", "WpaHandshakeFail"}, - {WLC_E_DEAUTH_IND, WL_IW_DONT_CARE, WL_IW_DONT_CARE, - "Conn", "Deauth"}, - {WLC_E_DISASSOC_IND, WL_IW_DONT_CARE, WL_IW_DONT_CARE, - "Conn", "DisassocInd"}, - {WLC_E_DISASSOC, WL_IW_DONT_CARE, WL_IW_DONT_CARE, - "Conn", "Disassoc"} - }; - - const char *name = ""; - const char *cause = NULL; - int i; - - for (i = 0; i < sizeof(event_map) / sizeof(event_map[0]); i++) { - const conn_fail_event_map_t *row = &event_map[i]; - if (row->inEvent == event_type && - (row->inStatus == status - || row->inStatus == WL_IW_DONT_CARE) - && (row->inReason == reason - || row->inReason == WL_IW_DONT_CARE)) { - name = row->outName; - cause = row->outCause; - break; - } - } - - if (cause) { - memset(stringBuf, 0, buflen); - snprintf(stringBuf, buflen, "%s %s %02d %02d", - name, cause, status, reason); - WL_INFORM("Connection status: %s\n", stringBuf); - return true; - } else { - return false; - } -} - -#if WIRELESS_EXT > 14 - -static bool -wl_iw_check_conn_fail(wl_event_msg_t *e, char *stringBuf, uint buflen) -{ - u32 event = be32_to_cpu(e->event_type); - u32 status = be32_to_cpu(e->status); - u32 reason = be32_to_cpu(e->reason); - - if (wl_iw_conn_status_str(event, status, reason, stringBuf, buflen)) { - return true; - } else - return false; -} -#endif - -#ifndef IW_CUSTOM_MAX -#define IW_CUSTOM_MAX 256 -#endif - -void wl_iw_event(struct net_device *dev, wl_event_msg_t *e, void *data) -{ -#if WIRELESS_EXT > 13 - union iwreq_data wrqu; - char extra[IW_CUSTOM_MAX + 1]; - int cmd = 0; - u32 event_type = be32_to_cpu(e->event_type); - u16 flags = be16_to_cpu(e->flags); - u32 datalen = be32_to_cpu(e->datalen); - u32 status = be32_to_cpu(e->status); - wl_iw_t *iw; - u32 toto; - memset(&wrqu, 0, sizeof(wrqu)); - memset(extra, 0, sizeof(extra)); - iw = 0; - - if (!dev) { - WL_ERROR("%s: dev is null\n", __func__); - return; - } - - iw = *(wl_iw_t **) netdev_priv(dev); - - WL_TRACE("%s: dev=%s event=%d\n", __func__, dev->name, event_type); - - switch (event_type) { - case WLC_E_TXFAIL: - cmd = IWEVTXDROP; - memcpy(wrqu.addr.sa_data, &e->addr, ETH_ALEN); - wrqu.addr.sa_family = ARPHRD_ETHER; - break; -#if WIRELESS_EXT > 14 - case WLC_E_JOIN: - case WLC_E_ASSOC_IND: - case WLC_E_REASSOC_IND: - memcpy(wrqu.addr.sa_data, &e->addr, ETH_ALEN); - wrqu.addr.sa_family = ARPHRD_ETHER; - cmd = IWEVREGISTERED; - break; - case WLC_E_DEAUTH_IND: - case WLC_E_DISASSOC_IND: - cmd = SIOCGIWAP; - memset(wrqu.addr.sa_data, 0, ETH_ALEN); - wrqu.addr.sa_family = ARPHRD_ETHER; - memset(&extra, 0, ETH_ALEN); - break; - case WLC_E_LINK: - case WLC_E_NDIS_LINK: - cmd = SIOCGIWAP; - if (!(flags & WLC_EVENT_MSG_LINK)) { - memset(wrqu.addr.sa_data, 0, ETH_ALEN); - memset(&extra, 0, ETH_ALEN); - } else { - memcpy(wrqu.addr.sa_data, &e->addr, ETH_ALEN); - WL_TRACE("Link UP\n"); - - } - wrqu.addr.sa_family = ARPHRD_ETHER; - break; - case WLC_E_ACTION_FRAME: - cmd = IWEVCUSTOM; - if (datalen + 1 <= sizeof(extra)) { - wrqu.data.length = datalen + 1; - extra[0] = WLC_E_ACTION_FRAME; - memcpy(&extra[1], data, datalen); - WL_TRACE("WLC_E_ACTION_FRAME len %d\n", - wrqu.data.length); - } - break; - - case WLC_E_ACTION_FRAME_COMPLETE: - cmd = IWEVCUSTOM; - memcpy(&toto, data, 4); - if (sizeof(status) + 1 <= sizeof(extra)) { - wrqu.data.length = sizeof(status) + 1; - extra[0] = WLC_E_ACTION_FRAME_COMPLETE; - memcpy(&extra[1], &status, sizeof(status)); - WL_TRACE("wl_iw_event status %d PacketId %d\n", status, - toto); - WL_TRACE("WLC_E_ACTION_FRAME_COMPLETE len %d\n", - wrqu.data.length); - } - break; -#endif /* WIRELESS_EXT > 14 */ -#if WIRELESS_EXT > 17 - case WLC_E_MIC_ERROR: - { - struct iw_michaelmicfailure *micerrevt = - (struct iw_michaelmicfailure *)&extra; - cmd = IWEVMICHAELMICFAILURE; - wrqu.data.length = sizeof(struct iw_michaelmicfailure); - if (flags & WLC_EVENT_MSG_GROUP) - micerrevt->flags |= IW_MICFAILURE_GROUP; - else - micerrevt->flags |= IW_MICFAILURE_PAIRWISE; - memcpy(micerrevt->src_addr.sa_data, &e->addr, - ETH_ALEN); - micerrevt->src_addr.sa_family = ARPHRD_ETHER; - - break; - } - case WLC_E_PMKID_CACHE: - { - if (data) { - struct iw_pmkid_cand *iwpmkidcand = - (struct iw_pmkid_cand *)&extra; - pmkid_cand_list_t *pmkcandlist; - pmkid_cand_t *pmkidcand; - int count; - - cmd = IWEVPMKIDCAND; - pmkcandlist = data; - count = get_unaligned_be32(&pmkcandlist-> - npmkid_cand); - ASSERT(count >= 0); - wrqu.data.length = sizeof(struct iw_pmkid_cand); - pmkidcand = pmkcandlist->pmkid_cand; - while (count) { - memset(iwpmkidcand, 0, - sizeof(struct iw_pmkid_cand)); - if (pmkidcand->preauth) - iwpmkidcand->flags |= - IW_PMKID_CAND_PREAUTH; - memcpy(&iwpmkidcand->bssid.sa_data, - &pmkidcand->BSSID, - ETH_ALEN); -#ifndef SANDGATE2G - wireless_send_event(dev, cmd, &wrqu, - extra); -#endif - pmkidcand++; - count--; - } - } - return; - } -#endif /* WIRELESS_EXT > 17 */ - - case WLC_E_SCAN_COMPLETE: -#if defined(WL_IW_USE_ISCAN) - if ((g_iscan) && (g_iscan->sysioc_tsk) && - (g_iscan->iscan_state != ISCAN_STATE_IDLE)) { - up(&g_iscan->sysioc_sem); - } else { - cmd = SIOCGIWSCAN; - wrqu.data.length = strlen(extra); - WL_TRACE("Event WLC_E_SCAN_COMPLETE from specific scan %d\n", - g_iscan->iscan_state); - } -#else - cmd = SIOCGIWSCAN; - wrqu.data.length = strlen(extra); - WL_TRACE("Event WLC_E_SCAN_COMPLETE\n"); -#endif - break; - - case WLC_E_PFN_NET_FOUND: - { - wlc_ssid_t *ssid; - ssid = (wlc_ssid_t *) data; - WL_ERROR("%s Event WLC_E_PFN_NET_FOUND, send %s up : find %s len=%d\n", - __func__, PNO_EVENT_UP, - ssid->SSID, ssid->SSID_len); - cmd = IWEVCUSTOM; - memset(&wrqu, 0, sizeof(wrqu)); - strcpy(extra, PNO_EVENT_UP); - wrqu.data.length = strlen(extra); - } - break; - - default: - WL_TRACE("Unknown Event %d: ignoring\n", event_type); - break; - } -#ifndef SANDGATE2G - if (cmd) { - if (cmd == SIOCGIWSCAN) - wireless_send_event(dev, cmd, &wrqu, NULL); - else - wireless_send_event(dev, cmd, &wrqu, extra); - } -#endif - -#if WIRELESS_EXT > 14 - memset(extra, 0, sizeof(extra)); - if (wl_iw_check_conn_fail(e, extra, sizeof(extra))) { - cmd = IWEVCUSTOM; - wrqu.data.length = strlen(extra); -#ifndef SANDGATE2G - wireless_send_event(dev, cmd, &wrqu, extra); -#endif - } -#endif /* WIRELESS_EXT > 14 */ -#endif /* WIRELESS_EXT > 13 */ -} - -int wl_iw_attach(struct net_device *dev, void *dhdp) -{ - int params_size; - wl_iw_t *iw; -#if defined(WL_IW_USE_ISCAN) - iscan_info_t *iscan = NULL; - - if (!dev) - return 0; - - memset(&g_wl_iw_params, 0, sizeof(wl_iw_extra_params_t)); - -#ifdef CSCAN - params_size = - (WL_SCAN_PARAMS_FIXED_SIZE + offsetof(wl_iscan_params_t, params)) + - (WL_NUMCHANNELS * sizeof(u16)) + - WL_SCAN_PARAMS_SSID_MAX * sizeof(wlc_ssid_t); -#else - params_size = - (WL_SCAN_PARAMS_FIXED_SIZE + offsetof(wl_iscan_params_t, params)); -#endif - iscan = kzalloc(sizeof(iscan_info_t), GFP_KERNEL); - - if (!iscan) - return -ENOMEM; - - iscan->iscan_ex_params_p = kmalloc(params_size, GFP_KERNEL); - if (!iscan->iscan_ex_params_p) { - kfree(iscan); - return -ENOMEM; - } - iscan->iscan_ex_param_size = params_size; - iscan->sysioc_tsk = NULL; - - g_iscan = iscan; - iscan->dev = dev; - iscan->iscan_state = ISCAN_STATE_IDLE; - - iscan->timer_ms = 3000; - init_timer(&iscan->timer); - iscan->timer.data = (unsigned long) iscan; - iscan->timer.function = wl_iw_timerfunc; - - sema_init(&iscan->sysioc_sem, 0); - iscan->sysioc_tsk = kthread_run(_iscan_sysioc_thread, iscan, - "_iscan_sysioc"); - if (IS_ERR(iscan->sysioc_tsk)) { - iscan->sysioc_tsk = NULL; - return -ENOMEM; - } -#endif /* defined(WL_IW_USE_ISCAN) */ - - iw = *(wl_iw_t **) netdev_priv(dev); - iw->pub = (dhd_pub_t *) dhdp; - MUTEX_LOCK_INIT(iw->pub); - MUTEX_LOCK_WL_SCAN_SET_INIT(); -#ifdef SOFTAP - priv_dev = dev; - MUTEX_LOCK_SOFTAP_SET_INIT(iw->pub); -#endif - g_scan = kzalloc(G_SCAN_RESULTS, GFP_KERNEL); - if (!g_scan) - return -ENOMEM; - - g_scan_specified_ssid = 0; - - return 0; -} - -void wl_iw_detach(void) -{ -#if defined(WL_IW_USE_ISCAN) - iscan_buf_t *buf; - iscan_info_t *iscan = g_iscan; - - if (!iscan) - return; - if (iscan->sysioc_tsk) { - send_sig(SIGTERM, iscan->sysioc_tsk, 1); - kthread_stop(iscan->sysioc_tsk); - iscan->sysioc_tsk = NULL; - } - - MUTEX_LOCK_WL_SCAN_SET(); - while (iscan->list_hdr) { - buf = iscan->list_hdr->next; - kfree(iscan->list_hdr); - iscan->list_hdr = buf; - } - MUTEX_UNLOCK_WL_SCAN_SET(); - kfree(iscan->iscan_ex_params_p); - kfree(iscan); - g_iscan = NULL; -#endif /* WL_IW_USE_ISCAN */ - - kfree(g_scan); - - g_scan = NULL; -} - -#if defined(BCMDBG) -void osl_assert(char *exp, char *file, int line) -{ - char tempbuf[256]; - char *basename; - - basename = strrchr(file, '/'); - /* skip the '/' */ - if (basename) - basename++; - - if (!basename) - basename = file; - - snprintf(tempbuf, 256, - "assertion \"%s\" failed: file \"%s\", line %d\n", exp, - basename, line); - - /* - * Print assert message and give it time to - * be written to /var/log/messages - */ - if (!in_interrupt()) { - const int delay = 3; - printk(KERN_ERR "%s", tempbuf); - printk(KERN_ERR "panic in %d seconds\n", delay); - set_current_state(TASK_INTERRUPTIBLE); - schedule_timeout(delay * HZ); - } - - switch (g_assert_type) { - case 0: - panic(KERN_ERR "%s", tempbuf); - break; - case 1: - printk(KERN_ERR "%s", tempbuf); - BUG(); - break; - case 2: - printk(KERN_ERR "%s", tempbuf); - break; - default: - break; - } -} -#endif /* defined(BCMDBG) */ diff --git a/drivers/staging/brcm80211/brcmfmac/wl_iw.h b/drivers/staging/brcm80211/brcmfmac/wl_iw.h deleted file mode 100644 index fe06174cee7..00000000000 --- a/drivers/staging/brcm80211/brcmfmac/wl_iw.h +++ /dev/null @@ -1,142 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wl_iw_h_ -#define _wl_iw_h_ - -#include <linux/wireless.h> - -#include <wlioctl.h> - -#define WL_SCAN_PARAMS_SSID_MAX 10 -#define GET_SSID "SSID=" -#define GET_CHANNEL "CH=" -#define GET_NPROBE "NPROBE=" -#define GET_ACTIVE_ASSOC_DWELL "ACTIVE=" -#define GET_PASSIVE_ASSOC_DWELL "PASSIVE=" -#define GET_HOME_DWELL "HOME=" -#define GET_SCAN_TYPE "TYPE=" - -#define BAND_GET_CMD "BANDGET" -#define BAND_SET_CMD "BANDSET" -#define DTIM_SKIP_GET_CMD "DTIMSKIPGET" -#define DTIM_SKIP_SET_CMD "DTIMSKIPSET" -#define SETSUSPEND_CMD "SETSUSPENDOPT" -#define PNOSSIDCLR_SET_CMD "PNOSSIDCLR" -#define PNOSETUP_SET_CMD "PNOSETUP" -#define PNOENABLE_SET_CMD "PNOFORCE" -#define PNODEBUG_SET_CMD "PNODEBUG" - -typedef struct wl_iw_extra_params { - int target_channel; -} wl_iw_extra_params_t; - -#define WL_IW_RSSI_MINVAL -200 -#define WL_IW_RSSI_NO_SIGNAL -91 -#define WL_IW_RSSI_VERY_LOW -80 -#define WL_IW_RSSI_LOW -70 -#define WL_IW_RSSI_GOOD -68 -#define WL_IW_RSSI_VERY_GOOD -58 -#define WL_IW_RSSI_EXCELLENT -57 -#define WL_IW_RSSI_INVALID 0 -#define MAX_WX_STRING 80 -#define WL_IW_SET_ACTIVE_SCAN (SIOCIWFIRSTPRIV+1) -#define WL_IW_GET_RSSI (SIOCIWFIRSTPRIV+3) -#define WL_IW_SET_PASSIVE_SCAN (SIOCIWFIRSTPRIV+5) -#define WL_IW_GET_LINK_SPEED (SIOCIWFIRSTPRIV+7) -#define WL_IW_GET_CURR_MACADDR (SIOCIWFIRSTPRIV+9) -#define WL_IW_SET_STOP (SIOCIWFIRSTPRIV+11) -#define WL_IW_SET_START (SIOCIWFIRSTPRIV+13) - -#define WL_SET_AP_CFG (SIOCIWFIRSTPRIV+15) -#define WL_AP_STA_LIST (SIOCIWFIRSTPRIV+17) -#define WL_AP_MAC_FLTR (SIOCIWFIRSTPRIV+19) -#define WL_AP_BSS_START (SIOCIWFIRSTPRIV+21) -#define AP_LPB_CMD (SIOCIWFIRSTPRIV+23) -#define WL_AP_STOP (SIOCIWFIRSTPRIV+25) -#define WL_FW_RELOAD (SIOCIWFIRSTPRIV+27) -#define WL_COMBO_SCAN (SIOCIWFIRSTPRIV+29) -#define WL_AP_SPARE3 (SIOCIWFIRSTPRIV+31) -#define G_SCAN_RESULTS (8*1024) -#define WE_ADD_EVENT_FIX 0x80 -#define G_WLAN_SET_ON 0 -#define G_WLAN_SET_OFF 1 - -#define CHECK_EXTRA_FOR_NULL(extra) \ -if (!extra) { \ - WL_ERROR("%s: error : extra is null pointer\n", __func__); \ - return -EINVAL; \ -} - -typedef struct wl_iw { - char nickname[IW_ESSID_MAX_SIZE]; - - struct iw_statistics wstats; - - int spy_num; - u32 pwsec; - u32 gwsec; - bool privacy_invoked; - - u8 spy_addr[IW_MAX_SPY][ETH_ALEN]; - struct iw_quality spy_qual[IW_MAX_SPY]; - void *wlinfo; - dhd_pub_t *pub; -} wl_iw_t; - -#if WIRELESS_EXT > 12 -#include <net/iw_handler.h> -extern const struct iw_handler_def wl_iw_handler_def; -#endif - -extern int wl_iw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); -extern void wl_iw_event(struct net_device *dev, wl_event_msg_t *e, void *data); -extern int wl_iw_get_wireless_stats(struct net_device *dev, - struct iw_statistics *wstats); -int wl_iw_attach(struct net_device *dev, void *dhdp); -void wl_iw_detach(void); -extern int net_os_set_suspend_disable(struct net_device *dev, int val); -extern int net_os_set_suspend(struct net_device *dev, int val); -extern int net_os_set_dtim_skip(struct net_device *dev, int val); -extern int net_os_set_packet_filter(struct net_device *dev, int val); - -#define IWE_STREAM_ADD_EVENT(info, stream, ends, iwe, extra) \ - iwe_stream_add_event(info, stream, ends, iwe, extra) -#define IWE_STREAM_ADD_VALUE(info, event, value, ends, iwe, event_len) \ - iwe_stream_add_value(info, event, value, ends, iwe, event_len) -#define IWE_STREAM_ADD_POINT(info, stream, ends, iwe, extra) \ - iwe_stream_add_point(info, stream, ends, iwe, extra) - -extern int dhd_pno_enable(dhd_pub_t *dhd, int pfn_enabled); -extern int dhd_pno_clean(dhd_pub_t *dhd); -extern int dhd_pno_set(dhd_pub_t *dhd, wlc_ssid_t *ssids_local, int nssid, - unsigned char scan_fr); -extern int dhd_pno_get_status(dhd_pub_t *dhd); -extern int dhd_dev_pno_reset(struct net_device *dev); -extern int dhd_dev_pno_set(struct net_device *dev, wlc_ssid_t *ssids_local, - int nssid, unsigned char scan_fr); -extern int dhd_dev_pno_enable(struct net_device *dev, int pfn_enabled); -extern int dhd_dev_get_pno_status(struct net_device *dev); - -#define PNO_TLV_PREFIX 'S' -#define PNO_TLV_VERSION 1 -#define PNO_TLV_SUBVERSION 0 -#define PNO_TLV_RESERVED 0 -#define PNO_TLV_TYPE_SSID_IE 'S' -#define PNO_TLV_TYPE_TIME 'T' -#define PNO_EVENT_UP "PNO_EVENT" - -#endif /* _wl_iw_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/Makefile b/drivers/staging/brcm80211/brcmsmac/Makefile index 8d75fe19ca9..1ea3e0c48f3 100644 --- a/drivers/staging/brcm80211/brcmsmac/Makefile +++ b/drivers/staging/brcm80211/brcmsmac/Makefile @@ -28,30 +28,29 @@ ccflags-y := \ -Idrivers/staging/brcm80211/include BRCMSMAC_OFILES := \ - wl_mac80211.o \ - wl_ucode_loader.o \ - wlc_alloc.o \ - wlc_ampdu.o \ - wlc_antsel.o \ - wlc_bmac.o \ - wlc_channel.o \ - wlc_main.o \ - wlc_phy_shim.o \ - wlc_pmu.o \ - wlc_rate.o \ - wlc_stf.o \ + mac80211_if.o \ + ucode_loader.o \ + alloc.o \ + ampdu.o \ + antsel.o \ + bmac.o \ + channel.o \ + main.o \ + phy_shim.o \ + pmu.o \ + rate.o \ + stf.o \ aiutils.o \ - phy/wlc_phy_cmn.o \ - phy/wlc_phy_lcn.o \ - phy/wlc_phy_n.o \ - phy/wlc_phytbl_lcn.o \ - phy/wlc_phytbl_n.o \ - phy/wlc_phy_qmath.o \ - bcmotp.o \ - bcmsrom.o \ - hnddma.o \ - nicpci.o \ - nvram.o + phy/phy_cmn.o \ + phy/phy_lcn.o \ + phy/phy_n.o \ + phy/phytbl_lcn.o \ + phy/phytbl_n.o \ + phy/phy_qmath.o \ + otp.o \ + srom.o \ + dma.o \ + nicpci.o MODULEPFX := brcmsmac diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.c b/drivers/staging/brcm80211/brcmsmac/aiutils.c index a61185f70a7..a25901e9981 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.c +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.c @@ -13,36 +13,354 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ - #include <linux/delay.h> -#include <linux/kernel.h> -#include <linux/string.h> -#include <bcmdefs.h> -#include <linux/module.h> #include <linux/pci.h> -#include <bcmutils.h> -#include <aiutils.h> -#include <hndsoc.h> -#include <sbchipc.h> -#include <pcicfg.h> -#include <bcmdevs.h> - -/* ********** from siutils.c *********** */ -#include <pci_core.h> -#include <pcie_core.h> -#include <nicpci.h> -#include <bcmnvram.h> -#include <bcmsrom.h> -#include <wlc_pmu.h> + +#include <defs.h> +#include <chipcommon.h> +#include <brcmu_utils.h> +#include <brcm_hw_ids.h> +#include "types.h" +#include "pub.h" +#include "pmu.h" +#include "srom.h" +#include "nicpci.h" +#include "aiutils.h" + +/* slow_clk_ctl */ +#define SCC_SS_MASK 0x00000007 /* slow clock source mask */ +#define SCC_SS_LPO 0x00000000 /* source of slow clock is LPO */ +#define SCC_SS_XTAL 0x00000001 /* source of slow clock is crystal */ +#define SCC_SS_PCI 0x00000002 /* source of slow clock is PCI */ +#define SCC_LF 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */ +#define SCC_LP 0x00000400 /* LPOPowerDown, 1: LPO is disabled, + * 0: LPO is enabled + */ +#define SCC_FS 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock, + * 0: power logic control + */ +#define SCC_IP 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors + * PLL clock disable requests from core + */ +#define SCC_XC 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't + * disable crystal when appropriate + */ +#define SCC_XP 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */ +#define SCC_CD_MASK 0xffff0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */ +#define SCC_CD_SHIFT 16 + +/* system_clk_ctl */ +#define SYCC_IE 0x00000001 /* ILPen: Enable Idle Low Power */ +#define SYCC_AE 0x00000002 /* ALPen: Enable Active Low Power */ +#define SYCC_FP 0x00000004 /* ForcePLLOn */ +#define SYCC_AR 0x00000008 /* Force ALP (or HT if ALPen is not set */ +#define SYCC_HR 0x00000010 /* Force HT */ +#define SYCC_CD_MASK 0xffff0000 /* ClkDiv (ILP = 1/(4 * (divisor + 1)) */ +#define SYCC_CD_SHIFT 16 + +#define CST4329_SPROM_OTP_SEL_MASK 0x00000003 +#define CST4329_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ +#define CST4329_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ +#define CST4329_OTP_SEL 2 /* OTP is powered up, no SPROM */ +#define CST4329_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */ +#define CST4329_SPI_SDIO_MODE_MASK 0x00000004 +#define CST4329_SPI_SDIO_MODE_SHIFT 2 + +/* 43224 chip-specific ChipControl register bits */ +#define CCTRL43224_GPIO_TOGGLE 0x8000 +#define CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */ +#define CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */ + +/* 43236 Chip specific ChipStatus register bits */ +#define CST43236_SFLASH_MASK 0x00000040 +#define CST43236_OTP_MASK 0x00000080 +#define CST43236_HSIC_MASK 0x00000100 /* USB/HSIC */ +#define CST43236_BP_CLK 0x00000200 /* 120/96Mbps */ +#define CST43236_BOOT_MASK 0x00001800 +#define CST43236_BOOT_SHIFT 11 +#define CST43236_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */ +#define CST43236_BOOT_FROM_ROM 1 /* boot from ROM */ +#define CST43236_BOOT_FROM_FLASH 2 /* boot from FLASH */ +#define CST43236_BOOT_FROM_INVALID 3 + +/* 4331 chip-specific ChipControl register bits */ +#define CCTRL4331_BT_COEXIST (1<<0) /* 0 disable */ +#define CCTRL4331_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */ +#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */ +#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */ +#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */ +#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */ +#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */ +#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */ +#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */ +#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */ +#define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */ +#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */ +#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */ +#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */ + +/* 4331 Chip specific ChipStatus register bits */ +#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */ +#define CST4331_SPROM_PRESENT 0x00000002 +#define CST4331_OTP_PRESENT 0x00000004 +#define CST4331_LDO_RF 0x00000008 +#define CST4331_LDO_PAR 0x00000010 + +/* 4319 chip-specific ChipStatus register bits */ +#define CST4319_SPI_CPULESSUSB 0x00000001 +#define CST4319_SPI_CLK_POL 0x00000002 +#define CST4319_SPI_CLK_PH 0x00000008 +#define CST4319_SPROM_OTP_SEL_MASK 0x000000c0 /* gpio [7:6], SDIO CIS selection */ +#define CST4319_SPROM_OTP_SEL_SHIFT 6 +#define CST4319_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */ +#define CST4319_SPROM_SEL 0x00000040 /* use SPROM, OTP is powered up */ +#define CST4319_OTP_SEL 0x00000080 /* use OTP, OTP is powered up */ +#define CST4319_OTP_PWRDN 0x000000c0 /* use SPROM, OTP is powered down */ +#define CST4319_SDIO_USB_MODE 0x00000100 /* gpio [8], sdio/usb mode */ +#define CST4319_REMAP_SEL_MASK 0x00000600 +#define CST4319_ILPDIV_EN 0x00000800 +#define CST4319_XTAL_PD_POL 0x00001000 +#define CST4319_LPO_SEL 0x00002000 +#define CST4319_RES_INIT_MODE 0x0000c000 +#define CST4319_PALDO_EXTPNP 0x00010000 /* PALDO is configured with external PNP */ +#define CST4319_CBUCK_MODE_MASK 0x00060000 +#define CST4319_CBUCK_MODE_BURST 0x00020000 +#define CST4319_CBUCK_MODE_LPBURST 0x00060000 +#define CST4319_RCAL_VALID 0x01000000 +#define CST4319_RCAL_VALUE_MASK 0x3e000000 +#define CST4319_RCAL_VALUE_SHIFT 25 + +/* 4336 chip-specific ChipStatus register bits */ +#define CST4336_SPI_MODE_MASK 0x00000001 +#define CST4336_SPROM_PRESENT 0x00000002 +#define CST4336_OTP_PRESENT 0x00000004 +#define CST4336_ARMREMAP_0 0x00000008 +#define CST4336_ILPDIV_EN_MASK 0x00000010 +#define CST4336_ILPDIV_EN_SHIFT 4 +#define CST4336_XTAL_PD_POL_MASK 0x00000020 +#define CST4336_XTAL_PD_POL_SHIFT 5 +#define CST4336_LPO_SEL_MASK 0x00000040 +#define CST4336_LPO_SEL_SHIFT 6 +#define CST4336_RES_INIT_MODE_MASK 0x00000180 +#define CST4336_RES_INIT_MODE_SHIFT 7 +#define CST4336_CBUCK_MODE_MASK 0x00000600 +#define CST4336_CBUCK_MODE_SHIFT 9 + +/* 4313 chip-specific ChipStatus register bits */ +#define CST4313_SPROM_PRESENT 1 +#define CST4313_OTP_PRESENT 2 +#define CST4313_SPROM_OTP_SEL_MASK 0x00000002 +#define CST4313_SPROM_OTP_SEL_SHIFT 0 + +/* 4313 Chip specific ChipControl register bits */ +#define CCTRL_4313_12MA_LED_DRIVE 0x00000007 /* 12 mA drive strengh for later 4313 */ #define BCM47162_DMP() ((sih->chip == BCM47162_CHIP_ID) && \ (sih->chiprev == 0) && \ (sii->coreid[sii->curidx] == MIPS74K_CORE_ID)) +/* Manufacturer Ids */ +#define MFGID_ARM 0x43b +#define MFGID_BRCM 0x4bf +#define MFGID_MIPS 0x4a7 + +/* Enumeration ROM registers */ +#define ER_EROMENTRY 0x000 +#define ER_REMAPCONTROL 0xe00 +#define ER_REMAPSELECT 0xe04 +#define ER_MASTERSELECT 0xe10 +#define ER_ITCR 0xf00 +#define ER_ITIP 0xf04 + +/* Erom entries */ +#define ER_TAG 0xe +#define ER_TAG1 0x6 +#define ER_VALID 1 +#define ER_CI 0 +#define ER_MP 2 +#define ER_ADD 4 +#define ER_END 0xe +#define ER_BAD 0xffffffff + +/* EROM CompIdentA */ +#define CIA_MFG_MASK 0xfff00000 +#define CIA_MFG_SHIFT 20 +#define CIA_CID_MASK 0x000fff00 +#define CIA_CID_SHIFT 8 +#define CIA_CCL_MASK 0x000000f0 +#define CIA_CCL_SHIFT 4 + +/* EROM CompIdentB */ +#define CIB_REV_MASK 0xff000000 +#define CIB_REV_SHIFT 24 +#define CIB_NSW_MASK 0x00f80000 +#define CIB_NSW_SHIFT 19 +#define CIB_NMW_MASK 0x0007c000 +#define CIB_NMW_SHIFT 14 +#define CIB_NSP_MASK 0x00003e00 +#define CIB_NSP_SHIFT 9 +#define CIB_NMP_MASK 0x000001f0 +#define CIB_NMP_SHIFT 4 + +/* EROM AddrDesc */ +#define AD_ADDR_MASK 0xfffff000 +#define AD_SP_MASK 0x00000f00 +#define AD_SP_SHIFT 8 +#define AD_ST_MASK 0x000000c0 +#define AD_ST_SHIFT 6 +#define AD_ST_SLAVE 0x00000000 +#define AD_ST_BRIDGE 0x00000040 +#define AD_ST_SWRAP 0x00000080 +#define AD_ST_MWRAP 0x000000c0 +#define AD_SZ_MASK 0x00000030 +#define AD_SZ_SHIFT 4 +#define AD_SZ_4K 0x00000000 +#define AD_SZ_8K 0x00000010 +#define AD_SZ_16K 0x00000020 +#define AD_SZ_SZD 0x00000030 +#define AD_AG32 0x00000008 +#define AD_ADDR_ALIGN 0x00000fff +#define AD_SZ_BASE 0x00001000 /* 4KB */ + +/* EROM SizeDesc */ +#define SD_SZ_MASK 0xfffff000 +#define SD_SG32 0x00000008 +#define SD_SZ_ALIGN 0x00000fff + +#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */ +#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */ +#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */ + +/* power control defines */ +#define PLL_DELAY 150 /* us pll on delay */ +#define FREF_DELAY 200 /* us fref change delay */ +#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */ + +/* resetctrl */ +#define AIRC_RESET 1 + +struct aidmp { + u32 oobselina30; /* 0x000 */ + u32 oobselina74; /* 0x004 */ + u32 PAD[6]; + u32 oobselinb30; /* 0x020 */ + u32 oobselinb74; /* 0x024 */ + u32 PAD[6]; + u32 oobselinc30; /* 0x040 */ + u32 oobselinc74; /* 0x044 */ + u32 PAD[6]; + u32 oobselind30; /* 0x060 */ + u32 oobselind74; /* 0x064 */ + u32 PAD[38]; + u32 oobselouta30; /* 0x100 */ + u32 oobselouta74; /* 0x104 */ + u32 PAD[6]; + u32 oobseloutb30; /* 0x120 */ + u32 oobseloutb74; /* 0x124 */ + u32 PAD[6]; + u32 oobseloutc30; /* 0x140 */ + u32 oobseloutc74; /* 0x144 */ + u32 PAD[6]; + u32 oobseloutd30; /* 0x160 */ + u32 oobseloutd74; /* 0x164 */ + u32 PAD[38]; + u32 oobsynca; /* 0x200 */ + u32 oobseloutaen; /* 0x204 */ + u32 PAD[6]; + u32 oobsyncb; /* 0x220 */ + u32 oobseloutben; /* 0x224 */ + u32 PAD[6]; + u32 oobsyncc; /* 0x240 */ + u32 oobseloutcen; /* 0x244 */ + u32 PAD[6]; + u32 oobsyncd; /* 0x260 */ + u32 oobseloutden; /* 0x264 */ + u32 PAD[38]; + u32 oobaextwidth; /* 0x300 */ + u32 oobainwidth; /* 0x304 */ + u32 oobaoutwidth; /* 0x308 */ + u32 PAD[5]; + u32 oobbextwidth; /* 0x320 */ + u32 oobbinwidth; /* 0x324 */ + u32 oobboutwidth; /* 0x328 */ + u32 PAD[5]; + u32 oobcextwidth; /* 0x340 */ + u32 oobcinwidth; /* 0x344 */ + u32 oobcoutwidth; /* 0x348 */ + u32 PAD[5]; + u32 oobdextwidth; /* 0x360 */ + u32 oobdinwidth; /* 0x364 */ + u32 oobdoutwidth; /* 0x368 */ + u32 PAD[37]; + u32 ioctrlset; /* 0x400 */ + u32 ioctrlclear; /* 0x404 */ + u32 ioctrl; /* 0x408 */ + u32 PAD[61]; + u32 iostatus; /* 0x500 */ + u32 PAD[127]; + u32 ioctrlwidth; /* 0x700 */ + u32 iostatuswidth; /* 0x704 */ + u32 PAD[62]; + u32 resetctrl; /* 0x800 */ + u32 resetstatus; /* 0x804 */ + u32 resetreadid; /* 0x808 */ + u32 resetwriteid; /* 0x80c */ + u32 PAD[60]; + u32 errlogctrl; /* 0x900 */ + u32 errlogdone; /* 0x904 */ + u32 errlogstatus; /* 0x908 */ + u32 errlogaddrlo; /* 0x90c */ + u32 errlogaddrhi; /* 0x910 */ + u32 errlogid; /* 0x914 */ + u32 errloguser; /* 0x918 */ + u32 errlogflags; /* 0x91c */ + u32 PAD[56]; + u32 intstatus; /* 0xa00 */ + u32 PAD[127]; + u32 config; /* 0xe00 */ + u32 PAD[63]; + u32 itcr; /* 0xf00 */ + u32 PAD[3]; + u32 itipooba; /* 0xf10 */ + u32 itipoobb; /* 0xf14 */ + u32 itipoobc; /* 0xf18 */ + u32 itipoobd; /* 0xf1c */ + u32 PAD[4]; + u32 itipoobaout; /* 0xf30 */ + u32 itipoobbout; /* 0xf34 */ + u32 itipoobcout; /* 0xf38 */ + u32 itipoobdout; /* 0xf3c */ + u32 PAD[4]; + u32 itopooba; /* 0xf50 */ + u32 itopoobb; /* 0xf54 */ + u32 itopoobc; /* 0xf58 */ + u32 itopoobd; /* 0xf5c */ + u32 PAD[4]; + u32 itopoobain; /* 0xf70 */ + u32 itopoobbin; /* 0xf74 */ + u32 itopoobcin; /* 0xf78 */ + u32 itopoobdin; /* 0xf7c */ + u32 PAD[4]; + u32 itopreset; /* 0xf90 */ + u32 PAD[15]; + u32 peripherialid4; /* 0xfd0 */ + u32 peripherialid5; /* 0xfd4 */ + u32 peripherialid6; /* 0xfd8 */ + u32 peripherialid7; /* 0xfdc */ + u32 peripherialid0; /* 0xfe0 */ + u32 peripherialid1; /* 0xfe4 */ + u32 peripherialid2; /* 0xfe8 */ + u32 peripherialid3; /* 0xfec */ + u32 componentid0; /* 0xff0 */ + u32 componentid1; /* 0xff4 */ + u32 componentid2; /* 0xff8 */ + u32 componentid3; /* 0xffc */ +}; + /* EROM parsing */ static u32 -get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match) +get_erom_ent(struct si_pub *sih, u32 **eromptr, u32 mask, u32 match) { u32 ent; uint inv = 0, nom = 0; @@ -77,7 +395,7 @@ get_erom_ent(si_t *sih, u32 **eromptr, u32 mask, u32 match) } static u32 -get_asd(si_t *sih, u32 **eromptr, uint sp, uint ad, uint st, +get_asd(struct si_pub *sih, u32 **eromptr, uint sp, uint ad, uint st, u32 *addrl, u32 *addrh, u32 *sizel, u32 *sizeh) { u32 asd, sz, szd; @@ -111,14 +429,14 @@ get_asd(si_t *sih, u32 **eromptr, uint sp, uint ad, uint st, return asd; } -static void ai_hwfixup(si_info_t *sii) +static void ai_hwfixup(struct si_info *sii) { } /* parse the enumeration rom to identify all cores */ -void ai_scan(si_t *sih, void *regs, uint devid) +void ai_scan(struct si_pub *sih, void *regs) { - si_info_t *sii = SI_INFO(sih); + struct si_info *sii = SI_INFO(sih); chipcregs_t *cc = (chipcregs_t *) regs; u32 erombase, *eromptr, *eromlim; @@ -319,9 +637,9 @@ void ai_scan(si_t *sih, void *regs, uint devid) /* This function changes the logical "focus" to the indicated core. * Return the current core's virtual address. */ -void *ai_setcoreidx(si_t *sih, uint coreidx) +void *ai_setcoreidx(struct si_pub *sih, uint coreidx) { - si_info_t *sii = SI_INFO(sih); + struct si_info *sii = SI_INFO(sih); u32 addr = sii->coresba[coreidx]; u32 wrap = sii->wrapba[coreidx]; void *regs; @@ -368,15 +686,15 @@ void *ai_setcoreidx(si_t *sih, uint coreidx) } /* Return the number of address spaces in current core */ -int ai_numaddrspaces(si_t *sih) +int ai_numaddrspaces(struct si_pub *sih) { return 2; } /* Return the address of the nth address space in the current core */ -u32 ai_addrspace(si_t *sih, uint asidx) +u32 ai_addrspace(struct si_pub *sih, uint asidx) { - si_info_t *sii; + struct si_info *sii; uint cidx; sii = SI_INFO(sih); @@ -393,9 +711,9 @@ u32 ai_addrspace(si_t *sih, uint asidx) } /* Return the size of the nth address space in the current core */ -u32 ai_addrspacesize(si_t *sih, uint asidx) +u32 ai_addrspacesize(struct si_pub *sih, uint asidx) { - si_info_t *sii; + struct si_info *sii; uint cidx; sii = SI_INFO(sih); @@ -411,10 +729,10 @@ u32 ai_addrspacesize(si_t *sih, uint asidx) } } -uint ai_flag(si_t *sih) +uint ai_flag(struct si_pub *sih) { - si_info_t *sii; - aidmp_t *ai; + struct si_info *sii; + struct aidmp *ai; sii = SI_INFO(sih); if (BCM47162_DMP()) { @@ -426,13 +744,13 @@ uint ai_flag(si_t *sih) return R_REG(&ai->oobselouta30) & 0x1f; } -void ai_setint(si_t *sih, int siflag) +void ai_setint(struct si_pub *sih, int siflag) { } -uint ai_corevendor(si_t *sih) +uint ai_corevendor(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; u32 cia; sii = SI_INFO(sih); @@ -440,9 +758,9 @@ uint ai_corevendor(si_t *sih) return (cia & CIA_MFG_MASK) >> CIA_MFG_SHIFT; } -uint ai_corerev(si_t *sih) +uint ai_corerev(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; u32 cib; sii = SI_INFO(sih); @@ -450,10 +768,10 @@ uint ai_corerev(si_t *sih) return (cib & CIB_REV_MASK) >> CIB_REV_SHIFT; } -bool ai_iscoreup(si_t *sih) +bool ai_iscoreup(struct si_pub *sih) { - si_info_t *sii; - aidmp_t *ai; + struct si_info *sii; + struct aidmp *ai; sii = SI_INFO(sih); ai = sii->curwrap; @@ -463,10 +781,10 @@ bool ai_iscoreup(si_t *sih) && ((R_REG(&ai->resetctrl) & AIRC_RESET) == 0)); } -void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val) +void ai_core_cflags_wo(struct si_pub *sih, u32 mask, u32 val) { - si_info_t *sii; - aidmp_t *ai; + struct si_info *sii; + struct aidmp *ai; u32 w; sii = SI_INFO(sih); @@ -485,10 +803,10 @@ void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val) } } -u32 ai_core_cflags(si_t *sih, u32 mask, u32 val) +u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val) { - si_info_t *sii; - aidmp_t *ai; + struct si_info *sii; + struct aidmp *ai; u32 w; sii = SI_INFO(sih); @@ -508,10 +826,10 @@ u32 ai_core_cflags(si_t *sih, u32 mask, u32 val) return R_REG(&ai->ioctrl); } -u32 ai_core_sflags(si_t *sih, u32 mask, u32 val) +u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val) { - si_info_t *sii; - aidmp_t *ai; + struct si_info *sii; + struct aidmp *ai; u32 w; sii = SI_INFO(sih); @@ -532,19 +850,19 @@ u32 ai_core_sflags(si_t *sih, u32 mask, u32 val) /* *************** from siutils.c ************** */ /* local prototypes */ -static si_info_t *ai_doattach(si_info_t *sii, uint devid, void *regs, +static struct si_info *ai_doattach(struct si_info *sii, void *regs, uint bustype, void *sdh, char **vars, uint *varsz); -static bool ai_buscore_prep(si_info_t *sii, uint bustype, uint devid, - void *sdh); -static bool ai_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, +static bool ai_buscore_prep(struct si_info *sii, uint bustype); +static bool ai_buscore_setup(struct si_info *sii, chipcregs_t *cc, uint bustype, u32 savewin, uint *origidx, void *regs); -static void ai_nvram_process(si_info_t *sii, char *pvars); +static void ai_nvram_process(struct si_info *sii, char *pvars); /* dev path concatenation util */ -static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name); -static bool _ai_clkctl_cc(si_info_t *sii, uint mode); -static bool ai_ispcie(si_info_t *sii); +static char *ai_devpathvar(struct si_pub *sih, char *var, int len, + const char *name); +static bool _ai_clkctl_cc(struct si_info *sii, uint mode); +static bool ai_ispcie(struct si_info *sii); /* global variable to indicate reservation/release of gpio's */ static u32 ai_gpioreservation; @@ -558,19 +876,19 @@ static u32 ai_gpioreservation; * vars - pointer to a pointer area for "environment" variables * varsz - pointer to int to return the size of the vars */ -si_t *ai_attach(uint devid, void *regs, uint bustype, +struct si_pub *ai_attach(void *regs, uint bustype, void *sdh, char **vars, uint *varsz) { - si_info_t *sii; + struct si_info *sii; - /* alloc si_info_t */ - sii = kmalloc(sizeof(si_info_t), GFP_ATOMIC); + /* alloc struct si_info */ + sii = kmalloc(sizeof(struct si_info), GFP_ATOMIC); if (sii == NULL) { SI_ERROR(("si_attach: malloc failed!\n")); return NULL; } - if (ai_doattach(sii, devid, regs, bustype, sdh, vars, varsz) == + if (ai_doattach(sii, regs, bustype, sdh, vars, varsz) == NULL) { kfree(sii); return NULL; @@ -578,14 +896,13 @@ si_t *ai_attach(uint devid, void *regs, uint bustype, sii->vars = vars ? *vars : NULL; sii->varsz = varsz ? *varsz : 0; - return (si_t *) sii; + return (struct si_pub *) sii; } /* global kernel resource */ -static si_info_t ksii; +static struct si_info ksii; -static bool ai_buscore_prep(si_info_t *sii, uint bustype, uint devid, - void *sdh) +static bool ai_buscore_prep(struct si_info *sii, uint bustype) { /* kludge to enable the clock on the 4306 which lacks a slowclock */ if (bustype == PCI_BUS && !ai_ispcie(sii)) @@ -593,7 +910,7 @@ static bool ai_buscore_prep(si_info_t *sii, uint bustype, uint devid, return true; } -static bool ai_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, +static bool ai_buscore_setup(struct si_info *sii, chipcregs_t *cc, uint bustype, u32 savewin, uint *origidx, void *regs) { bool pci, pcie; @@ -702,7 +1019,7 @@ static bool ai_buscore_setup(si_info_t *sii, chipcregs_t *cc, uint bustype, return true; } -static __used void ai_nvram_process(si_info_t *sii, char *pvars) +static __used void ai_nvram_process(struct si_info *sii, char *pvars) { uint w = 0; @@ -751,7 +1068,7 @@ static __used void ai_nvram_process(si_info_t *sii, char *pvars) sii->pub.boardflags = getintvar(pvars, "boardflags"); } -static si_info_t *ai_doattach(si_info_t *sii, uint devid, +static struct si_info *ai_doattach(struct si_info *sii, void *regs, uint bustype, void *pbus, char **vars, uint *varsz) { @@ -762,7 +1079,7 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, uint socitype; uint origidx; - memset((unsigned char *) sii, 0, sizeof(si_info_t)); + memset((unsigned char *) sii, 0, sizeof(struct si_info)); savewin = 0; @@ -797,7 +1114,7 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, sih->bustype = bustype; /* bus/core/clk setup for register access */ - if (!ai_buscore_prep(sii, bustype, devid, pbus)) { + if (!ai_buscore_prep(sii, bustype)) { SI_ERROR(("si_doattach: si_core_clk_prep failed %d\n", bustype)); return NULL; @@ -823,7 +1140,7 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, if (socitype == SOCI_AI) { SI_MSG(("Found chip type AI (0x%08x)\n", w)); /* pass chipc address instead of original core base */ - ai_scan(&sii->pub, (void *)cc, devid); + ai_scan(&sii->pub, (void *)cc); } else { SI_ERROR(("Found chip of unknown type (0x%08x)\n", w)); return NULL; @@ -840,28 +1157,6 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, goto exit; } - /* assume current core is CC */ - if ((sii->pub.ccrev == 0x25) - && - ((sih->chip == BCM43236_CHIP_ID - || sih->chip == BCM43235_CHIP_ID - || sih->chip == BCM43238_CHIP_ID) - && (sii->pub.chiprev <= 2))) { - - if ((cc->chipstatus & CST43236_BP_CLK) != 0) { - uint clkdiv; - clkdiv = R_REG(&cc->clkdiv); - /* otp_clk_div is even number, 120/14 < 9mhz */ - clkdiv = (clkdiv & ~CLKD_OTP) | (14 << CLKD_OTP_SHIFT); - W_REG(&cc->clkdiv, clkdiv); - SI_ERROR(("%s: set clkdiv to %x\n", __func__, clkdiv)); - } - udelay(10); - } - - /* Init nvram from flash if it exists */ - nvram_init(); - /* Init nvram from sprom/otp if they exist */ if (srom_var_init (&sii->pub, bustype, regs, vars, varsz)) { @@ -901,8 +1196,7 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, pcicore_attach(sii->pch, pvars, SI_DOATTACH); } - if ((sih->chip == BCM43224_CHIP_ID) || - (sih->chip == BCM43421_CHIP_ID)) { + if (sih->chip == BCM43224_CHIP_ID) { /* * enable 12 mA drive strenth for 43224 and * set chipControl register bit 15 @@ -933,11 +1227,6 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, CCTRL_4313_12MA_LED_DRIVE); } - if (sih->chip == BCM4331_CHIP_ID) { - /* Enable Ext PA lines depending on chip package option */ - ai_chipcontrl_epa4331(sih, true); - } - return sii; exit: if (sih->bustype == PCI_BUS) { @@ -950,13 +1239,13 @@ static si_info_t *ai_doattach(si_info_t *sii, uint devid, } /* may be called with core in reset */ -void ai_detach(si_t *sih) +void ai_detach(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; uint idx; struct si_pub *si_local = NULL; - bcopy(&sih, &si_local, sizeof(si_t **)); + memcpy(&si_local, &sih, sizeof(struct si_pub **)); sii = SI_INFO(sih); @@ -970,8 +1259,6 @@ void ai_detach(si_t *sih) sii->regs[idx] = NULL; } - nvram_exit(); /* free up nvram buffers */ - if (sih->bustype == PCI_BUS) { if (sii->pch) pcicore_deinit(sii->pch); @@ -984,10 +1271,11 @@ void ai_detach(si_t *sih) /* register driver interrupt disabling and restoring callback functions */ void -ai_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn, +ai_register_intr_callback(struct si_pub *sih, void *intrsoff_fn, + void *intrsrestore_fn, void *intrsenabled_fn, void *intr_arg) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); sii->intr_arg = intr_arg; @@ -1000,39 +1288,39 @@ ai_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn, sii->dev_coreid = sii->coreid[sii->curidx]; } -void ai_deregister_intr_callback(si_t *sih) +void ai_deregister_intr_callback(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); sii->intrsoff_fn = NULL; } -uint ai_coreid(si_t *sih) +uint ai_coreid(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); return sii->coreid[sii->curidx]; } -uint ai_coreidx(si_t *sih) +uint ai_coreidx(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); return sii->curidx; } -bool ai_backplane64(si_t *sih) +bool ai_backplane64(struct si_pub *sih) { return (sih->cccaps & CC_CAP_BKPLN64) != 0; } /* return index of coreid or BADIDX if not found */ -uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit) +uint ai_findcoreidx(struct si_pub *sih, uint coreid, uint coreunit) { - si_info_t *sii; + struct si_info *sii; uint found; uint i; @@ -1056,7 +1344,7 @@ uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit) * Moreover, callers should keep interrupts off during switching * out of and back to d11 core. */ -void *ai_setcore(si_t *sih, uint coreid, uint coreunit) +void *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit) { uint idx; @@ -1068,10 +1356,11 @@ void *ai_setcore(si_t *sih, uint coreid, uint coreunit) } /* Turn off interrupt as required by ai_setcore, before switch core */ -void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val) +void *ai_switch_core(struct si_pub *sih, uint coreid, uint *origidx, + uint *intr_val) { void *cc; - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); @@ -1093,9 +1382,9 @@ void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val) } /* restore coreidx and restore interrupt */ -void ai_restore_core(si_t *sih, uint coreid, uint intr_val) +void ai_restore_core(struct si_pub *sih, uint coreid, uint intr_val) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); if (SI_FAST(sii) @@ -1106,9 +1395,9 @@ void ai_restore_core(si_t *sih, uint coreid, uint intr_val) INTR_RESTORE(sii, intr_val); } -void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val) +void ai_write_wrapperreg(struct si_pub *sih, u32 offset, u32 val) { - si_info_t *sii = SI_INFO(sih); + struct si_info *sii = SI_INFO(sih); u32 *w = (u32 *) sii->curwrap; W_REG(w + (offset / 4), val); return; @@ -1124,14 +1413,15 @@ void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val) * Also, when using pci/pcie, we can optimize away the core switching for pci * registers and (on newer pci cores) chipcommon registers. */ -uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) +uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask, + uint val) { uint origidx = 0; u32 *r = NULL; uint w; uint intr_val = 0; bool fast = false; - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); @@ -1208,11 +1498,11 @@ uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) return w; } -void ai_core_disable(si_t *sih, u32 bits) +void ai_core_disable(struct si_pub *sih, u32 bits) { - si_info_t *sii; + struct si_info *sii; u32 dummy; - aidmp_t *ai; + struct aidmp *ai; sii = SI_INFO(sih); @@ -1235,10 +1525,10 @@ void ai_core_disable(si_t *sih, u32 bits) * bits - core specific bits that are set during and after reset sequence * resetbits - core specific bits that are set only during reset sequence */ -void ai_core_reset(si_t *sih, u32 bits, u32 resetbits) +void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits) { - si_info_t *sii; - aidmp_t *ai; + struct si_info *sii; + struct aidmp *ai; u32 dummy; sii = SI_INFO(sih); @@ -1264,7 +1554,7 @@ void ai_core_reset(si_t *sih, u32 bits, u32 resetbits) } /* return the slow clock source - LPO, XTAL, or PCI */ -static uint ai_slowclk_src(si_info_t *sii) +static uint ai_slowclk_src(struct si_info *sii) { chipcregs_t *cc; u32 val; @@ -1288,7 +1578,7 @@ static uint ai_slowclk_src(si_info_t *sii) * return the ILP (slowclock) min or max frequency * precondition: we've established the chip has dynamic clk control */ -static uint ai_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc) +static uint ai_slowclk_freq(struct si_info *sii, bool max_freq, chipcregs_t *cc) { u32 slowclk; uint div; @@ -1322,7 +1612,7 @@ static uint ai_slowclk_freq(si_info_t *sii, bool max_freq, chipcregs_t *cc) return 0; } -static void ai_clkctl_setdelay(si_info_t *sii, void *chipcregs) +static void ai_clkctl_setdelay(struct si_info *sii, void *chipcregs) { chipcregs_t *cc = (chipcregs_t *) chipcregs; uint slowmaxfreq, pll_delay, slowclk; @@ -1352,9 +1642,9 @@ static void ai_clkctl_setdelay(si_info_t *sii, void *chipcregs) } /* initialize power control delay registers */ -void ai_clkctl_init(si_t *sih) +void ai_clkctl_init(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; uint origidx = 0; chipcregs_t *cc; bool fast; @@ -1390,9 +1680,9 @@ void ai_clkctl_init(si_t *sih) * return the value suitable for writing to the * dot11 core FAST_PWRUP_DELAY register */ -u16 ai_clkctl_fast_pwrup_delay(si_t *sih) +u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; uint origidx = 0; chipcregs_t *cc; uint slowminfreq; @@ -1438,9 +1728,9 @@ u16 ai_clkctl_fast_pwrup_delay(si_t *sih) } /* turn primary xtal and/or pll off/on */ -int ai_clkctl_xtal(si_t *sih, uint what, bool on) +int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on) { - si_info_t *sii; + struct si_info *sii; u32 in, out, outen; sii = SI_INFO(sih); @@ -1515,9 +1805,9 @@ int ai_clkctl_xtal(si_t *sih, uint what, bool on) * this is a wrapper over the next internal function * to allow flexible policy settings for outside caller */ -bool ai_clkctl_cc(si_t *sih, uint mode) +bool ai_clkctl_cc(struct si_pub *sih, uint mode) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); @@ -1532,7 +1822,7 @@ bool ai_clkctl_cc(si_t *sih, uint mode) } /* clk control mechanism through chipcommon, no policy checking */ -static bool _ai_clkctl_cc(si_info_t *sii, uint mode) +static bool _ai_clkctl_cc(struct si_info *sii, uint mode) { uint origidx = 0; chipcregs_t *cc; @@ -1624,7 +1914,7 @@ static bool _ai_clkctl_cc(si_info_t *sii, uint mode) } /* Build device path. Support SI, PCI, and JTAG for now. */ -int ai_devpath(si_t *sih, char *path, int size) +int ai_devpath(struct si_pub *sih, char *path, int size) { int slen; @@ -1657,7 +1947,7 @@ int ai_devpath(si_t *sih, char *path, int size) } /* Get a variable, but only if it has a devpath prefix */ -char *ai_getdevpathvar(si_t *sih, const char *name) +char *ai_getdevpathvar(struct si_pub *sih, const char *name) { char varname[SI_DEVPATH_BUFSZ + 32]; @@ -1667,7 +1957,7 @@ char *ai_getdevpathvar(si_t *sih, const char *name) } /* Get a variable, but only if it has a devpath prefix */ -int ai_getdevpathintvar(si_t *sih, const char *name) +int ai_getdevpathintvar(struct si_pub *sih, const char *name) { #if defined(BCMBUSTYPE) && (BCMBUSTYPE == SI_BUS) return getintvar(NULL, name); @@ -1680,7 +1970,7 @@ int ai_getdevpathintvar(si_t *sih, const char *name) #endif } -char *ai_getnvramflvar(si_t *sih, const char *name) +char *ai_getnvramflvar(struct si_pub *sih, const char *name) { return getvar(NULL, name); } @@ -1690,7 +1980,8 @@ char *ai_getnvramflvar(si_t *sih, const char *name) * len == 0 or var is NULL, var is still returned. On overflow, the * first char will be set to '\0'. */ -static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name) +static char *ai_devpathvar(struct si_pub *sih, char *var, int len, + const char *name) { uint path_len; @@ -1710,7 +2001,7 @@ static char *ai_devpathvar(si_t *sih, char *var, int len, const char *name) } /* return true if PCIE capability exists in the pci config space */ -static __used bool ai_ispcie(si_info_t *sii) +static bool ai_ispcie(struct si_info *sii) { u8 cap_ptr; @@ -1726,18 +2017,18 @@ static __used bool ai_ispcie(si_info_t *sii) return true; } -bool ai_pci_war16165(si_t *sih) +bool ai_pci_war16165(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); return PCI(sii) && (sih->buscorerev <= 10); } -void ai_pci_up(si_t *sih) +void ai_pci_up(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); @@ -1754,9 +2045,9 @@ void ai_pci_up(si_t *sih) } /* Unconfigure and/or apply various WARs when system is going to sleep mode */ -void ai_pci_sleep(si_t *sih) +void ai_pci_sleep(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); @@ -1764,9 +2055,9 @@ void ai_pci_sleep(si_t *sih) } /* Unconfigure and/or apply various WARs when going down */ -void ai_pci_down(si_t *sih) +void ai_pci_down(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); @@ -1785,10 +2076,10 @@ void ai_pci_down(si_t *sih) * Configure the pci core for pci client (NIC) action * coremask is the bitvec of cores by index to be enabled. */ -void ai_pci_setup(si_t *sih, uint coremask) +void ai_pci_setup(struct si_pub *sih, uint coremask) { - si_info_t *sii; - struct sbpciregs *pciregs = NULL; + struct si_info *sii; + void *regs = NULL; u32 siflag = 0, w; uint idx = 0; @@ -1805,7 +2096,7 @@ void ai_pci_setup(si_t *sih, uint coremask) siflag = ai_flag(sih); /* switch over to pci core */ - pciregs = ai_setcoreidx(sih, sii->pub.buscoreidx); + regs = ai_setcoreidx(sih, sii->pub.buscoreidx); } /* @@ -1823,16 +2114,7 @@ void ai_pci_setup(si_t *sih, uint coremask) } if (PCI(sii)) { - OR_REG(&pciregs->sbtopci2, - (SBTOPCI_PREF | SBTOPCI_BURST)); - if (sii->pub.buscorerev >= 11) { - OR_REG(&pciregs->sbtopci2, - SBTOPCI_RC_READMULTI); - w = R_REG(&pciregs->clkrun); - W_REG(&pciregs->clkrun, - (w | PCI_CLKRUN_DSBL)); - w = R_REG(&pciregs->clkrun); - } + pcicore_pci_setup(sii->pch, regs); /* switch back to previous core */ ai_setcoreidx(sih, idx); @@ -1843,38 +2125,20 @@ void ai_pci_setup(si_t *sih, uint coremask) * Fixup SROMless PCI device's configuration. * The current core may be changed upon return. */ -int ai_pci_fixcfg(si_t *sih) +int ai_pci_fixcfg(struct si_pub *sih) { - uint origidx, pciidx; - struct sbpciregs *pciregs = NULL; - sbpcieregs_t *pcieregs = NULL; + uint origidx; void *regs = NULL; - u16 val16, *reg16 = NULL; - si_info_t *sii = SI_INFO(sih); + struct si_info *sii = SI_INFO(sih); /* Fixup PI in SROM shadow area to enable the correct PCI core access */ /* save the current index */ origidx = ai_coreidx(&sii->pub); /* check 'pi' is correct and fix it if not */ - if (sii->pub.buscoretype == PCIE_CORE_ID) { - pcieregs = ai_setcore(&sii->pub, PCIE_CORE_ID, 0); - regs = pcieregs; - reg16 = &pcieregs->sprom[SRSH_PI_OFFSET]; - } else if (sii->pub.buscoretype == PCI_CORE_ID) { - pciregs = ai_setcore(&sii->pub, PCI_CORE_ID, 0); - regs = pciregs; - reg16 = &pciregs->sprom[SRSH_PI_OFFSET]; - } - pciidx = ai_coreidx(&sii->pub); - val16 = R_REG(reg16); - if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16) pciidx) { - val16 = - (u16) (pciidx << SRSH_PI_SHIFT) | (val16 & - ~SRSH_PI_MASK); - W_REG(reg16, val16); - } + regs = ai_setcore(&sii->pub, sii->pub.buscoretype, 0); + pcicore_fixcfg(sii->pch, regs); /* restore the original index */ ai_setcoreidx(&sii->pub, origidx); @@ -1884,7 +2148,7 @@ int ai_pci_fixcfg(si_t *sih) } /* mask&set gpiocontrol bits */ -u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, u8 priority) +u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, u8 priority) { uint regoff; @@ -1904,9 +2168,9 @@ u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, u8 priority) return ai_corereg(sih, SI_CC_IDX, regoff, mask, val); } -void ai_chipcontrl_epa4331(si_t *sih, bool on) +void ai_chipcontrl_epa4331(struct si_pub *sih, bool on) { - si_info_t *sii; + struct si_info *sii; chipcregs_t *cc; uint origidx; u32 val; @@ -1938,9 +2202,9 @@ void ai_chipcontrl_epa4331(si_t *sih, bool on) } /* Enable BT-COEX & Ex-PA for 4313 */ -void ai_epa_4313war(si_t *sih) +void ai_epa_4313war(struct si_pub *sih) { - si_info_t *sii; + struct si_info *sii; chipcregs_t *cc; uint origidx; @@ -1957,10 +2221,10 @@ void ai_epa_4313war(si_t *sih) } /* check if the device is removed */ -bool ai_deviceremoved(si_t *sih) +bool ai_deviceremoved(struct si_pub *sih) { u32 w; - si_info_t *sii; + struct si_info *sii; sii = SI_INFO(sih); @@ -1974,10 +2238,10 @@ bool ai_deviceremoved(si_t *sih) return false; } -bool ai_is_sprom_available(si_t *sih) +bool ai_is_sprom_available(struct si_pub *sih) { if (sih->ccrev >= 31) { - si_info_t *sii; + struct si_info *sii; uint origidx; chipcregs_t *cc; u32 sromctrl; @@ -1994,61 +2258,22 @@ bool ai_is_sprom_available(si_t *sih) } switch (sih->chip) { - case BCM4329_CHIP_ID: - return (sih->chipst & CST4329_SPROM_SEL) != 0; - case BCM4319_CHIP_ID: - return (sih->chipst & CST4319_SPROM_SEL) != 0; - case BCM4336_CHIP_ID: - return (sih->chipst & CST4336_SPROM_PRESENT) != 0; - case BCM4330_CHIP_ID: - return (sih->chipst & CST4330_SPROM_PRESENT) != 0; case BCM4313_CHIP_ID: return (sih->chipst & CST4313_SPROM_PRESENT) != 0; - case BCM4331_CHIP_ID: - return (sih->chipst & CST4331_SPROM_PRESENT) != 0; default: return true; } } -bool ai_is_otp_disabled(si_t *sih) +bool ai_is_otp_disabled(struct si_pub *sih) { switch (sih->chip) { - case BCM4329_CHIP_ID: - return (sih->chipst & CST4329_SPROM_OTP_SEL_MASK) == - CST4329_OTP_PWRDN; - case BCM4319_CHIP_ID: - return (sih->chipst & CST4319_SPROM_OTP_SEL_MASK) == - CST4319_OTP_PWRDN; - case BCM4336_CHIP_ID: - return (sih->chipst & CST4336_OTP_PRESENT) == 0; - case BCM4330_CHIP_ID: - return (sih->chipst & CST4330_OTP_PRESENT) == 0; case BCM4313_CHIP_ID: return (sih->chipst & CST4313_OTP_PRESENT) == 0; /* These chips always have their OTP on */ case BCM43224_CHIP_ID: case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: default: return false; } } - -bool ai_is_otp_powered(si_t *sih) -{ - if (PMUCTL_ENAB(sih)) - return si_pmu_is_otp_powered(sih); - return true; -} - -void ai_otp_power(si_t *sih, bool on) -{ - if (PMUCTL_ENAB(sih)) - si_pmu_otp_power(sih, on); - udelay(1000); -} diff --git a/drivers/staging/brcm80211/brcmsmac/aiutils.h b/drivers/staging/brcm80211/brcmsmac/aiutils.h index b98099eaa62..e245c278beb 100644 --- a/drivers/staging/brcm80211/brcmsmac/aiutils.h +++ b/drivers/staging/brcm80211/brcmsmac/aiutils.h @@ -14,18 +14,10 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _aiutils_h_ -#define _aiutils_h_ - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif +#ifndef _BRCM_AIUTILS_H_ +#define _BRCM_AIUTILS_H_ -/* Include the soci specific files */ -#include <aidmp.h> +#include "types.h" /* * SOC Interconnect Address Map. @@ -158,9 +150,7 @@ * maps all unused address ranges */ -/* There are TWO constants on all HND chips: SI_ENUM_BASE above, - * and chipcommon being the first core: - */ +/* chipcommon being the first core: */ #define SI_CC_IDX 0 /* SOC Interconnect types (aka chip types) */ @@ -225,7 +215,70 @@ #define BISZ_BSSEND_IDX 6 /* 6: bss end */ #define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ -#define SI_INFO(sih) (si_info_t *)sih +#define CC_SROM_OTP 0x800 /* SROM/OTP address space */ + +/* gpiotimerval */ +#define GPIO_ONTIME_SHIFT 16 + +/* Fields in clkdiv */ +#define CLKD_OTP 0x000f0000 +#define CLKD_OTP_SHIFT 16 + +/* When Srom support present, fields in sromcontrol */ +#define SRC_START 0x80000000 +#define SRC_BUSY 0x80000000 +#define SRC_OPCODE 0x60000000 +#define SRC_OP_READ 0x00000000 +#define SRC_OP_WRITE 0x20000000 +#define SRC_OP_WRDIS 0x40000000 +#define SRC_OP_WREN 0x60000000 +#define SRC_OTPSEL 0x00000010 +#define SRC_LOCK 0x00000008 +#define SRC_SIZE_MASK 0x00000006 +#define SRC_SIZE_1K 0x00000000 +#define SRC_SIZE_4K 0x00000002 +#define SRC_SIZE_16K 0x00000004 +#define SRC_SIZE_SHIFT 1 +#define SRC_PRESENT 0x00000001 + +/* 4330 chip-specific ChipStatus register bits */ +#define CST4330_CHIPMODE_SDIOD(cs) (((cs) & 0x7) < 6) /* SDIO || gSPI */ +#define CST4330_CHIPMODE_USB20D(cs) (((cs) & 0x7) >= 6) /* USB || USBDA */ +#define CST4330_CHIPMODE_SDIO(cs) (((cs) & 0x4) == 0) /* SDIO */ +#define CST4330_CHIPMODE_GSPI(cs) (((cs) & 0x6) == 4) /* gSPI */ +#define CST4330_CHIPMODE_USB(cs) (((cs) & 0x7) == 6) /* USB packet-oriented */ +#define CST4330_CHIPMODE_USBDA(cs) (((cs) & 0x7) == 7) /* USB Direct Access */ +#define CST4330_OTP_PRESENT 0x00000010 +#define CST4330_LPO_AUTODET_EN 0x00000020 +#define CST4330_ARMREMAP_0 0x00000040 +#define CST4330_SPROM_PRESENT 0x00000080 /* takes priority over OTP if both set */ +#define CST4330_ILPDIV_EN 0x00000100 +#define CST4330_LPO_SEL 0x00000200 +#define CST4330_RES_INIT_MODE_SHIFT 10 +#define CST4330_RES_INIT_MODE_MASK 0x00000c00 +#define CST4330_CBUCK_MODE_SHIFT 12 +#define CST4330_CBUCK_MODE_MASK 0x00003000 +#define CST4330_CBUCK_POWER_OK 0x00004000 +#define CST4330_BB_PLL_LOCKED 0x00008000 + +/* Package IDs */ +#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */ +#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */ +#define BCM4717_PKG_ID 9 /* 4717 package id */ +#define BCM4718_PKG_ID 10 /* 4718 package id */ +#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ +#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ +#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */ + +/* these are router chips */ +#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */ +#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */ +#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */ +#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */ +#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */ + + +#define SI_INFO(sih) ((struct si_info *)sih) #define GOODCOREADDR(x, b) \ (((x) >= (b)) && ((x) < ((b) + SI_MAXCORES * SI_CORE_SIZE)) && \ @@ -315,13 +368,6 @@ struct si_pub { }; /* - * for HIGH_ONLY driver, the si_t must be writable to allow states sync from - * BMAC to HIGH driver for monolithic driver, it is readonly to prevent accident - * change - */ -typedef const struct si_pub si_t; - -/* * Many of the routines below take an 'sih' handle as their first arg. * Allocate this by calling si_attach(). Free it by calling si_detach(). * At any one time, the sih is logically focused on one particular si core @@ -363,8 +409,6 @@ typedef const struct si_pub si_t; #define SI_PCIDOWN 2 #define SI_PCIUP 3 -#define ISSIM_ENAB(sih) 0 - /* PMU clock/power control */ #if defined(BCMPMUCTL) #define PMUCTL_ENAB(sih) (BCMPMUCTL) @@ -404,16 +448,16 @@ typedef u32(*si_intrsoff_t) (void *intr_arg); typedef void (*si_intrsrestore_t) (void *intr_arg, u32 arg); typedef bool(*si_intrsenabled_t) (void *intr_arg); -typedef struct gpioh_item { +struct gpioh_item { void *arg; bool level; gpio_handler_t handler; u32 event; struct gpioh_item *next; -} gpioh_item_t; +}; /* misc si info needed by some of the routines */ -typedef struct si_info { +struct si_info { struct si_pub pub; /* back plane public state (must be first) */ void *pbus; /* handle to bus (pci/sdio/..) */ uint dev_coreid; /* the core provides driver functions */ @@ -424,10 +468,6 @@ typedef struct si_info { void *pch; /* PCI/E core handle */ - gpioh_item_t *gpioh_head; /* GPIO event handlers list */ - - bool memseg; /* flag to toggle MEM_SEG register */ - char *vars; uint varsz; @@ -450,97 +490,95 @@ typedef struct si_info { u32 cia[SI_MAXCORES]; /* erom cia entry for each core */ u32 cib[SI_MAXCORES]; /* erom cia entry for each core */ u32 oob_router; /* oob router registers for axi */ -} si_info_t; +}; /* AMBA Interconnect exported externs */ -extern void ai_scan(si_t *sih, void *regs, uint devid); - -extern uint ai_flag(si_t *sih); -extern void ai_setint(si_t *sih, int siflag); -extern uint ai_coreidx(si_t *sih); -extern uint ai_corevendor(si_t *sih); -extern uint ai_corerev(si_t *sih); -extern bool ai_iscoreup(si_t *sih); -extern void *ai_setcoreidx(si_t *sih, uint coreidx); -extern u32 ai_core_cflags(si_t *sih, u32 mask, u32 val); -extern void ai_core_cflags_wo(si_t *sih, u32 mask, u32 val); -extern u32 ai_core_sflags(si_t *sih, u32 mask, u32 val); -extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, +extern void ai_scan(struct si_pub *sih, void *regs); + +extern uint ai_flag(struct si_pub *sih); +extern void ai_setint(struct si_pub *sih, int siflag); +extern uint ai_coreidx(struct si_pub *sih); +extern uint ai_corevendor(struct si_pub *sih); +extern uint ai_corerev(struct si_pub *sih); +extern bool ai_iscoreup(struct si_pub *sih); +extern void *ai_setcoreidx(struct si_pub *sih, uint coreidx); +extern u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val); +extern void ai_core_cflags_wo(struct si_pub *sih, u32 mask, u32 val); +extern u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val); +extern uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask, uint val); -extern void ai_core_reset(si_t *sih, u32 bits, u32 resetbits); -extern void ai_core_disable(si_t *sih, u32 bits); -extern int ai_numaddrspaces(si_t *sih); -extern u32 ai_addrspace(si_t *sih, uint asidx); -extern u32 ai_addrspacesize(si_t *sih, uint asidx); -extern void ai_write_wrap_reg(si_t *sih, u32 offset, u32 val); +extern void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits); +extern void ai_core_disable(struct si_pub *sih, u32 bits); +extern int ai_numaddrspaces(struct si_pub *sih); +extern u32 ai_addrspace(struct si_pub *sih, uint asidx); +extern u32 ai_addrspacesize(struct si_pub *sih, uint asidx); +extern void ai_write_wrap_reg(struct si_pub *sih, u32 offset, u32 val); /* === exported functions === */ -extern si_t *ai_attach(uint pcidev, void *regs, uint bustype, +extern struct si_pub *ai_attach(void *regs, uint bustype, void *sdh, char **vars, uint *varsz); -extern void ai_detach(si_t *sih); -extern bool ai_pci_war16165(si_t *sih); +extern void ai_detach(struct si_pub *sih); +extern bool ai_pci_war16165(struct si_pub *sih); -extern uint ai_coreid(si_t *sih); -extern uint ai_corerev(si_t *sih); -extern uint ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, +extern uint ai_coreid(struct si_pub *sih); +extern uint ai_corerev(struct si_pub *sih); +extern uint ai_corereg(struct si_pub *sih, uint coreidx, uint regoff, uint mask, uint val); -extern void ai_write_wrapperreg(si_t *sih, u32 offset, u32 val); -extern u32 ai_core_cflags(si_t *sih, u32 mask, u32 val); -extern u32 ai_core_sflags(si_t *sih, u32 mask, u32 val); -extern bool ai_iscoreup(si_t *sih); -extern uint ai_findcoreidx(si_t *sih, uint coreid, uint coreunit); -extern void *ai_setcoreidx(si_t *sih, uint coreidx); -extern void *ai_setcore(si_t *sih, uint coreid, uint coreunit); -extern void *ai_switch_core(si_t *sih, uint coreid, uint *origidx, +extern void ai_write_wrapperreg(struct si_pub *sih, u32 offset, u32 val); +extern u32 ai_core_cflags(struct si_pub *sih, u32 mask, u32 val); +extern u32 ai_core_sflags(struct si_pub *sih, u32 mask, u32 val); +extern bool ai_iscoreup(struct si_pub *sih); +extern uint ai_findcoreidx(struct si_pub *sih, uint coreid, uint coreunit); +extern void *ai_setcoreidx(struct si_pub *sih, uint coreidx); +extern void *ai_setcore(struct si_pub *sih, uint coreid, uint coreunit); +extern void *ai_switch_core(struct si_pub *sih, uint coreid, uint *origidx, uint *intr_val); -extern void ai_restore_core(si_t *sih, uint coreid, uint intr_val); -extern void ai_core_reset(si_t *sih, u32 bits, u32 resetbits); -extern void ai_core_disable(si_t *sih, u32 bits); -extern u32 ai_alp_clock(si_t *sih); -extern u32 ai_ilp_clock(si_t *sih); -extern void ai_pci_setup(si_t *sih, uint coremask); -extern void ai_setint(si_t *sih, int siflag); -extern bool ai_backplane64(si_t *sih); -extern void ai_register_intr_callback(si_t *sih, void *intrsoff_fn, +extern void ai_restore_core(struct si_pub *sih, uint coreid, uint intr_val); +extern void ai_core_reset(struct si_pub *sih, u32 bits, u32 resetbits); +extern void ai_core_disable(struct si_pub *sih, u32 bits); +extern u32 ai_alp_clock(struct si_pub *sih); +extern u32 ai_ilp_clock(struct si_pub *sih); +extern void ai_pci_setup(struct si_pub *sih, uint coremask); +extern void ai_setint(struct si_pub *sih, int siflag); +extern bool ai_backplane64(struct si_pub *sih); +extern void ai_register_intr_callback(struct si_pub *sih, void *intrsoff_fn, void *intrsrestore_fn, void *intrsenabled_fn, void *intr_arg); -extern void ai_deregister_intr_callback(si_t *sih); -extern void ai_clkctl_init(si_t *sih); -extern u16 ai_clkctl_fast_pwrup_delay(si_t *sih); -extern bool ai_clkctl_cc(si_t *sih, uint mode); -extern int ai_clkctl_xtal(si_t *sih, uint what, bool on); -extern bool ai_deviceremoved(si_t *sih); -extern u32 ai_gpiocontrol(si_t *sih, u32 mask, u32 val, +extern void ai_deregister_intr_callback(struct si_pub *sih); +extern void ai_clkctl_init(struct si_pub *sih); +extern u16 ai_clkctl_fast_pwrup_delay(struct si_pub *sih); +extern bool ai_clkctl_cc(struct si_pub *sih, uint mode); +extern int ai_clkctl_xtal(struct si_pub *sih, uint what, bool on); +extern bool ai_deviceremoved(struct si_pub *sih); +extern u32 ai_gpiocontrol(struct si_pub *sih, u32 mask, u32 val, u8 priority); /* OTP status */ -extern bool ai_is_otp_disabled(si_t *sih); -extern bool ai_is_otp_powered(si_t *sih); -extern void ai_otp_power(si_t *sih, bool on); +extern bool ai_is_otp_disabled(struct si_pub *sih); /* SPROM availability */ -extern bool ai_is_sprom_available(si_t *sih); +extern bool ai_is_sprom_available(struct si_pub *sih); /* * Build device path. Path size must be >= SI_DEVPATH_BUFSZ. * The returned path is NULL terminated and has trailing '/'. * Return 0 on success, nonzero otherwise. */ -extern int ai_devpath(si_t *sih, char *path, int size); +extern int ai_devpath(struct si_pub *sih, char *path, int size); /* Read variable with prepending the devpath to the name */ -extern char *ai_getdevpathvar(si_t *sih, const char *name); -extern int ai_getdevpathintvar(si_t *sih, const char *name); +extern char *ai_getdevpathvar(struct si_pub *sih, const char *name); +extern int ai_getdevpathintvar(struct si_pub *sih, const char *name); -extern void ai_pci_sleep(si_t *sih); -extern void ai_pci_down(si_t *sih); -extern void ai_pci_up(si_t *sih); -extern int ai_pci_fixcfg(si_t *sih); +extern void ai_pci_sleep(struct si_pub *sih); +extern void ai_pci_down(struct si_pub *sih); +extern void ai_pci_up(struct si_pub *sih); +extern int ai_pci_fixcfg(struct si_pub *sih); -extern void ai_chipcontrl_epa4331(si_t *sih, bool on); +extern void ai_chipcontrl_epa4331(struct si_pub *sih, bool on); /* Enable Ex-PA for 4313 */ -extern void ai_epa_4313war(si_t *sih); +extern void ai_epa_4313war(struct si_pub *sih); -char *ai_getnvramflvar(si_t *sih, const char *name); +char *ai_getnvramflvar(struct si_pub *sih, const char *name); -#endif /* _aiutils_h_ */ +#endif /* _BRCM_AIUTILS_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c b/drivers/staging/brcm80211/brcmsmac/alloc.c index 82c64cd4486..7f8dd7b396b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.c +++ b/drivers/staging/brcm80211/brcmsmac/alloc.c @@ -13,37 +13,21 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> -#include <linux/types.h> - -#include <bcmdefs.h> -#include <bcmutils.h> -#include <aiutils.h> -#include <wlioctl.h> -#include <sbhnddma.h> - -#include "d11.h" -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "wlc_alloc.h" -#include "wl_dbg.h" -#include "wlc_rate.h" -#include "wlc_bsscfg.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "wlc_main.h" - -static struct wlc_bsscfg *wlc_bsscfg_malloc(uint unit); -static void wlc_bsscfg_mfree(struct wlc_bsscfg *cfg); -static struct wlc_pub *wlc_pub_malloc(uint unit, + +#include <brcmu_utils.h> +#include "types.h" +#include "pub.h" +#include "main.h" +#include "alloc.h" + +static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit); +static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg); +static struct brcms_pub *brcms_c_pub_malloc(uint unit, uint *err, uint devid); -static void wlc_pub_mfree(struct wlc_pub *pub); -static void wlc_tunables_init(wlc_tunables_t *tunables, uint devid); +static void brcms_c_pub_mfree(struct brcms_pub *pub); +static void brcms_c_tunables_init(struct brcms_tunables *tunables, uint devid); -static void wlc_tunables_init(wlc_tunables_t *tunables, uint devid) +static void brcms_c_tunables_init(struct brcms_tunables *tunables, uint devid) { tunables->ntxd = NTXD; tunables->nrxd = NRXD; @@ -52,33 +36,33 @@ static void wlc_tunables_init(wlc_tunables_t *tunables, uint devid) tunables->maxscb = MAXSCB; tunables->ampdunummpdu = AMPDU_NUM_MPDU; tunables->maxpktcb = MAXPKTCB; - tunables->maxucodebss = WLC_MAX_UCODE_BSS; - tunables->maxucodebss4 = WLC_MAX_UCODE_BSS4; + tunables->maxucodebss = BRCMS_MAX_UCODE_BSS; + tunables->maxucodebss4 = BRCMS_MAX_UCODE_BSS4; tunables->maxbss = MAXBSS; - tunables->datahiwat = WLC_DATAHIWAT; - tunables->ampdudatahiwat = WLC_AMPDUDATAHIWAT; + tunables->datahiwat = BRCMS_DATAHIWAT; + tunables->ampdudatahiwat = BRCMS_AMPDUDATAHIWAT; tunables->rxbnd = RXBND; tunables->txsbnd = TXSBND; } -static struct wlc_pub *wlc_pub_malloc(uint unit, uint *err, uint devid) +static struct brcms_pub *brcms_c_pub_malloc(uint unit, uint *err, uint devid) { - struct wlc_pub *pub; + struct brcms_pub *pub; - pub = kzalloc(sizeof(struct wlc_pub), GFP_ATOMIC); + pub = kzalloc(sizeof(struct brcms_pub), GFP_ATOMIC); if (pub == NULL) { *err = 1001; goto fail; } - pub->tunables = kzalloc(sizeof(wlc_tunables_t), GFP_ATOMIC); + pub->tunables = kzalloc(sizeof(struct brcms_tunables), GFP_ATOMIC); if (pub->tunables == NULL) { *err = 1028; goto fail; } /* need to init the tunables now */ - wlc_tunables_init(pub->tunables, devid); + brcms_c_tunables_init(pub->tunables, devid); pub->multicast = kzalloc(ETH_ALEN * MAXMULTILIST, GFP_ATOMIC); if (pub->multicast == NULL) { @@ -89,11 +73,11 @@ static struct wlc_pub *wlc_pub_malloc(uint unit, uint *err, uint devid) return pub; fail: - wlc_pub_mfree(pub); + brcms_c_pub_mfree(pub); return NULL; } -static void wlc_pub_mfree(struct wlc_pub *pub) +static void brcms_c_pub_mfree(struct brcms_pub *pub) { if (pub == NULL) return; @@ -103,26 +87,26 @@ static void wlc_pub_mfree(struct wlc_pub *pub) kfree(pub); } -static struct wlc_bsscfg *wlc_bsscfg_malloc(uint unit) +static struct brcms_bss_cfg *brcms_c_bsscfg_malloc(uint unit) { - struct wlc_bsscfg *cfg; + struct brcms_bss_cfg *cfg; - cfg = kzalloc(sizeof(struct wlc_bsscfg), GFP_ATOMIC); + cfg = kzalloc(sizeof(struct brcms_bss_cfg), GFP_ATOMIC); if (cfg == NULL) goto fail; - cfg->current_bss = kzalloc(sizeof(wlc_bss_info_t), GFP_ATOMIC); + cfg->current_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC); if (cfg->current_bss == NULL) goto fail; return cfg; fail: - wlc_bsscfg_mfree(cfg); + brcms_c_bsscfg_mfree(cfg); return NULL; } -static void wlc_bsscfg_mfree(struct wlc_bsscfg *cfg) +static void brcms_c_bsscfg_mfree(struct brcms_bss_cfg *cfg) { if (cfg == NULL) return; @@ -132,8 +116,8 @@ static void wlc_bsscfg_mfree(struct wlc_bsscfg *cfg) kfree(cfg); } -static void wlc_bsscfg_ID_assign(struct wlc_info *wlc, - struct wlc_bsscfg *bsscfg) +static void brcms_c_bsscfg_ID_assign(struct brcms_c_info *wlc, + struct brcms_bss_cfg *bsscfg) { bsscfg->ID = wlc->next_bsscfg_ID; wlc->next_bsscfg_ID++; @@ -142,29 +126,27 @@ static void wlc_bsscfg_ID_assign(struct wlc_info *wlc, /* * The common driver entry routine. Error codes should be unique */ -struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) +struct brcms_c_info *brcms_c_attach_malloc(uint unit, uint *err, uint devid) { - struct wlc_info *wlc; + struct brcms_c_info *wlc; - wlc = kzalloc(sizeof(struct wlc_info), GFP_ATOMIC); + wlc = kzalloc(sizeof(struct brcms_c_info), GFP_ATOMIC); if (wlc == NULL) { *err = 1002; goto fail; } - wlc->hwrxoff = WL_HWRXOFF; - - /* allocate struct wlc_pub state structure */ - wlc->pub = wlc_pub_malloc(unit, err, devid); + /* allocate struct brcms_c_pub state structure */ + wlc->pub = brcms_c_pub_malloc(unit, err, devid); if (wlc->pub == NULL) { *err = 1003; goto fail; } wlc->pub->wlc = wlc; - /* allocate struct wlc_hw_info state structure */ + /* allocate struct brcms_hardware state structure */ - wlc->hw = kzalloc(sizeof(struct wlc_hw_info), GFP_ATOMIC); + wlc->hw = kzalloc(sizeof(struct brcms_hardware), GFP_ATOMIC); if (wlc->hw == NULL) { *err = 1005; goto fail; @@ -172,7 +154,7 @@ struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) wlc->hw->wlc = wlc; wlc->hw->bandstate[0] = - kzalloc(sizeof(struct wlc_hwband) * MAXBANDS, GFP_ATOMIC); + kzalloc(sizeof(struct brcms_hw_band) * MAXBANDS, GFP_ATOMIC); if (wlc->hw->bandstate[0] == NULL) { *err = 1006; goto fail; @@ -180,68 +162,62 @@ struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) int i; for (i = 1; i < MAXBANDS; i++) { - wlc->hw->bandstate[i] = (struct wlc_hwband *) + wlc->hw->bandstate[i] = (struct brcms_hw_band *) ((unsigned long)wlc->hw->bandstate[0] + - (sizeof(struct wlc_hwband) * i)); + (sizeof(struct brcms_hw_band) * i)); } } wlc->modulecb = - kzalloc(sizeof(struct modulecb) * WLC_MAXMODULES, GFP_ATOMIC); + kzalloc(sizeof(struct modulecb) * BRCMS_MAXMODULES, GFP_ATOMIC); if (wlc->modulecb == NULL) { *err = 1009; goto fail; } - wlc->default_bss = kzalloc(sizeof(wlc_bss_info_t), GFP_ATOMIC); + wlc->default_bss = kzalloc(sizeof(struct brcms_bss_info), GFP_ATOMIC); if (wlc->default_bss == NULL) { *err = 1010; goto fail; } - wlc->cfg = wlc_bsscfg_malloc(unit); + wlc->cfg = brcms_c_bsscfg_malloc(unit); if (wlc->cfg == NULL) { *err = 1011; goto fail; } - wlc_bsscfg_ID_assign(wlc, wlc->cfg); - - wlc->pkt_callback = kzalloc(sizeof(struct pkt_cb) * - (wlc->pub->tunables->maxpktcb + 1), - GFP_ATOMIC); - if (wlc->pkt_callback == NULL) { - *err = 1013; - goto fail; - } + brcms_c_bsscfg_ID_assign(wlc, wlc->cfg); wlc->wsec_def_keys[0] = - kzalloc(sizeof(wsec_key_t) * WLC_DEFAULT_KEYS, GFP_ATOMIC); + kzalloc(sizeof(struct wsec_key) * BRCMS_DEFAULT_KEYS, + GFP_ATOMIC); if (wlc->wsec_def_keys[0] == NULL) { *err = 1015; goto fail; } else { int i; - for (i = 1; i < WLC_DEFAULT_KEYS; i++) { - wlc->wsec_def_keys[i] = (wsec_key_t *) + for (i = 1; i < BRCMS_DEFAULT_KEYS; i++) { + wlc->wsec_def_keys[i] = (struct wsec_key *) ((unsigned long)wlc->wsec_def_keys[0] + - (sizeof(wsec_key_t) * i)); + (sizeof(struct wsec_key) * i)); } } - wlc->protection = kzalloc(sizeof(struct wlc_protection), GFP_ATOMIC); + wlc->protection = kzalloc(sizeof(struct brcms_protection), + GFP_ATOMIC); if (wlc->protection == NULL) { *err = 1016; goto fail; } - wlc->stf = kzalloc(sizeof(struct wlc_stf), GFP_ATOMIC); + wlc->stf = kzalloc(sizeof(struct brcms_stf), GFP_ATOMIC); if (wlc->stf == NULL) { *err = 1017; goto fail; } wlc->bandstate[0] = - kzalloc(sizeof(struct wlcband)*MAXBANDS, GFP_ATOMIC); + kzalloc(sizeof(struct brcms_band)*MAXBANDS, GFP_ATOMIC); if (wlc->bandstate[0] == NULL) { *err = 1025; goto fail; @@ -249,20 +225,20 @@ struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) int i; for (i = 1; i < MAXBANDS; i++) { - wlc->bandstate[i] = - (struct wlcband *) ((unsigned long)wlc->bandstate[0] - + (sizeof(struct wlcband)*i)); + wlc->bandstate[i] = (struct brcms_band *) + ((unsigned long)wlc->bandstate[0] + + (sizeof(struct brcms_band)*i)); } } - wlc->corestate = kzalloc(sizeof(struct wlccore), GFP_ATOMIC); + wlc->corestate = kzalloc(sizeof(struct brcms_core), GFP_ATOMIC); if (wlc->corestate == NULL) { *err = 1026; goto fail; } wlc->corestate->macstat_snapshot = - kzalloc(sizeof(macstat_t), GFP_ATOMIC); + kzalloc(sizeof(struct macstat), GFP_ATOMIC); if (wlc->corestate->macstat_snapshot == NULL) { *err = 1027; goto fail; @@ -271,20 +247,19 @@ struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid) return wlc; fail: - wlc_detach_mfree(wlc); + brcms_c_detach_mfree(wlc); return NULL; } -void wlc_detach_mfree(struct wlc_info *wlc) +void brcms_c_detach_mfree(struct brcms_c_info *wlc) { if (wlc == NULL) return; - wlc_bsscfg_mfree(wlc->cfg); - wlc_pub_mfree(wlc->pub); + brcms_c_bsscfg_mfree(wlc->cfg); + brcms_c_pub_mfree(wlc->pub); kfree(wlc->modulecb); kfree(wlc->default_bss); - kfree(wlc->pkt_callback); kfree(wlc->wsec_def_keys[0]); kfree(wlc->protection); kfree(wlc->stf); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.h b/drivers/staging/brcm80211/brcmsmac/alloc.h index 95f951eb2b2..f465d304303 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_alloc.h +++ b/drivers/staging/brcm80211/brcmsmac/alloc.h @@ -14,5 +14,6 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -extern struct wlc_info *wlc_attach_malloc(uint unit, uint *err, uint devid); -extern void wlc_detach_mfree(struct wlc_info *wlc); +extern struct brcms_c_info *brcms_c_attach_malloc(uint unit, uint *err, + uint devid); +extern void brcms_c_detach_mfree(struct brcms_c_info *wlc); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c b/drivers/staging/brcm80211/brcmsmac/ampdu.c index 85ad7009605..fcaf61e3b13 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.c +++ b/drivers/staging/brcm80211/brcmsmac/ampdu.c @@ -13,30 +13,14 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> #include <net/mac80211.h> -#include <bcmdefs.h> -#include <bcmutils.h> -#include <aiutils.h> -#include <wlioctl.h> -#include <sbhnddma.h> -#include <hnddma.h> -#include <d11.h> - -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_antsel.h" -#include "wl_export.h" -#include "wl_dbg.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wlc_ampdu.h" +#include "rate.h" +#include "scb.h" +#include "phy/phy_hal.h" +#include "antsel.h" +#include "main.h" +#include "ampdu.h" #define AMPDU_MAX_MPDU 32 /* max number of mpdus in an ampdu */ #define AMPDU_NUM_MPDU_LEGACY 16 /* max number of mpdus in an ampdu to a legacy */ @@ -76,7 +60,7 @@ * This allows to maintain a specific state independently of * how often and/or when the wlc counters are updated. */ -typedef struct wlc_fifo_info { +struct brcms_fifo_info { u16 ampdu_pld_size; /* number of bytes to be pre-loaded */ u8 mcs2ampdu_table[FFPLD_MAX_MCS + 1]; /* per-mcs max # of mpdus in an ampdu */ u16 prev_txfunfl; /* num of underflows last read from the HW macstats counter */ @@ -84,11 +68,11 @@ typedef struct wlc_fifo_info { u32 accum_txampdu; /* num of tx ampdu since we modified pld params */ u32 prev_txampdu; /* previous reading of tx ampdu */ u32 dmaxferrate; /* estimated dma avg xfer rate in kbits/sec */ -} wlc_fifo_info_t; +}; /* AMPDU module specific state */ struct ampdu_info { - struct wlc_info *wlc; /* pointer to main wlc structure */ + struct brcms_c_info *wlc; /* pointer to main wlc structure */ int scb_handle; /* scb cubby handle to retrieve data from scb */ u8 ini_enable[AMPDU_MAX_SCB_TID]; /* per-tid initiator enable/disable of ampdu */ u8 ba_tx_wsize; /* Tx ba window size (in pdu) */ @@ -110,7 +94,8 @@ struct ampdu_info { u32 tx_max_funl; /* underflows should be kept such that * (tx_max_funfl*underflows) < tx frames */ - wlc_fifo_info_t fifo_tb[NUM_FFPLD_FIFO]; /* table of fifo infos */ + /* table of fifo infos */ + struct brcms_fifo_info fifo_tb[NUM_FFPLD_FIFO]; }; @@ -126,35 +111,36 @@ struct cb_del_ampdu_pars { #define SCB_AMPDU_CUBBY(ampdu, scb) (&(scb->scb_ampdu)) #define SCB_AMPDU_INI(scb_ampdu, tid) (&(scb_ampdu->ini[tid])) -static void wlc_ffpld_init(struct ampdu_info *ampdu); -static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int f); -static void wlc_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f); +static void brcms_c_ffpld_init(struct ampdu_info *ampdu); +static int brcms_c_ffpld_check_txfunfl(struct brcms_c_info *wlc, int f); +static void brcms_c_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f); + +static void brcms_c_scb_ampdu_update_max_txlen(struct ampdu_info *ampdu, + u8 dur); +static void brcms_c_scb_ampdu_update_config(struct ampdu_info *ampdu, + struct scb *scb); +static void brcms_c_scb_ampdu_update_config_all(struct ampdu_info *ampdu); -static scb_ampdu_tid_ini_t *wlc_ampdu_init_tid_ini(struct ampdu_info *ampdu, - scb_ampdu_t *scb_ampdu, - u8 tid, bool override); -static void ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur); -static void scb_ampdu_update_config(struct ampdu_info *ampdu, struct scb *scb); -static void scb_ampdu_update_config_all(struct ampdu_info *ampdu); +#define brcms_c_ampdu_txflowcontrol(a, b, c) do {} while (0) -#define wlc_ampdu_txflowcontrol(a, b, c) do {} while (0) +static void +brcms_c_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, + struct scb *scb, + struct sk_buff *p, struct tx_status *txs, + u32 frmtxstatus, u32 frmtxstatus2); -static void wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, - struct scb *scb, - struct sk_buff *p, tx_status_t *txs, - u32 frmtxstatus, u32 frmtxstatus2); -static bool wlc_ampdu_cap(struct ampdu_info *ampdu); -static int wlc_ampdu_set(struct ampdu_info *ampdu, bool on); +static bool brcms_c_ampdu_cap(struct ampdu_info *ampdu); +static int brcms_c_ampdu_set(struct ampdu_info *ampdu, bool on); -struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc) +struct ampdu_info *brcms_c_ampdu_attach(struct brcms_c_info *wlc) { struct ampdu_info *ampdu; int i; ampdu = kzalloc(sizeof(struct ampdu_info), GFP_ATOMIC); if (!ampdu) { - wiphy_err(wlc->wiphy, "wl%d: wlc_ampdu_attach: out of mem\n", - wlc->pub->unit); + wiphy_err(wlc->wiphy, "wl%d: brcms_c_ampdu_attach: out of mem" + "\n", wlc->pub->unit); return NULL; } ampdu->wlc = wlc; @@ -178,7 +164,7 @@ struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc) ampdu->ffpld_rsvd = AMPDU_DEF_FFPLD_RSVD; /* bump max ampdu rcv size to 64k for all 11n devices except 4321A0 and 4321A1 */ - if (WLCISNPHY(wlc->band) && NREV_LT(wlc->band->phyrev, 2)) + if (BRCMS_ISNPHY(wlc->band) && NREV_LT(wlc->band->phyrev, 2)) ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_32K; else ampdu->rx_factor = IEEE80211_HT_MAX_AMPDU_64K; @@ -190,18 +176,18 @@ struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc) ampdu->rr_retry_limit_tid[i] = ampdu->rr_retry_limit; } - ampdu_update_max_txlen(ampdu, ampdu->dur); + brcms_c_scb_ampdu_update_max_txlen(ampdu, ampdu->dur); ampdu->mfbr = false; /* try to set ampdu to the default value */ - wlc_ampdu_set(ampdu, wlc->pub->_ampdu); + brcms_c_ampdu_set(ampdu, wlc->pub->_ampdu); ampdu->tx_max_funl = FFPLD_TX_MAX_UNFL; - wlc_ffpld_init(ampdu); + brcms_c_ffpld_init(ampdu); return ampdu; } -void wlc_ampdu_detach(struct ampdu_info *ampdu) +void brcms_c_ampdu_detach(struct ampdu_info *ampdu) { int i; @@ -213,13 +199,14 @@ void wlc_ampdu_detach(struct ampdu_info *ampdu) kfree(ampdu->ini_free[i]); } - wlc_module_unregister(ampdu->wlc->pub, "ampdu", ampdu); + brcms_c_module_unregister(ampdu->wlc->pub, "ampdu", ampdu); kfree(ampdu); } -static void scb_ampdu_update_config(struct ampdu_info *ampdu, struct scb *scb) +static void brcms_c_scb_ampdu_update_config(struct ampdu_info *ampdu, + struct scb *scb) { - scb_ampdu_t *scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); + struct scb_ampdu *scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); int i; scb_ampdu->max_pdu = (u8) ampdu->wlc->pub->tunables->ampdunummpdu; @@ -236,24 +223,24 @@ static void scb_ampdu_update_config(struct ampdu_info *ampdu, struct scb *scb) scb_ampdu->release = min_t(u8, scb_ampdu->max_pdu, AMPDU_SCB_MAX_RELEASE); - if (scb_ampdu->max_rxlen) - scb_ampdu->release = - min_t(u8, scb_ampdu->release, scb_ampdu->max_rxlen / 1600); + if (scb_ampdu->max_rx_ampdu_bytes) + scb_ampdu->release = min_t(u8, scb_ampdu->release, + scb_ampdu->max_rx_ampdu_bytes / 1600); scb_ampdu->release = min(scb_ampdu->release, ampdu->fifo_tb[TX_AC_BE_FIFO]. mcs2ampdu_table[FFPLD_MAX_MCS]); } -static void scb_ampdu_update_config_all(struct ampdu_info *ampdu) +static void brcms_c_scb_ampdu_update_config_all(struct ampdu_info *ampdu) { - scb_ampdu_update_config(ampdu, ampdu->wlc->pub->global_scb); + brcms_c_scb_ampdu_update_config(ampdu, ampdu->wlc->pub->global_scb); } -static void wlc_ffpld_init(struct ampdu_info *ampdu) +static void brcms_c_ffpld_init(struct ampdu_info *ampdu) { int i, j; - wlc_fifo_info_t *fifo; + struct brcms_fifo_info *fifo; for (j = 0; j < NUM_FFPLD_FIFO; j++) { fifo = (ampdu->fifo_tb + j); @@ -274,7 +261,7 @@ static void wlc_ffpld_init(struct ampdu_info *ampdu) * Return 1 if pre-loading not active, -1 if not an underflow event, * 0 if pre-loading module took care of the event. */ -static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int fid) +static int brcms_c_ffpld_check_txfunfl(struct brcms_c_info *wlc, int fid) { struct ampdu_info *ampdu = wlc->ampdu; u32 phy_rate = MCS_RATE(FFPLD_MAX_MCS, true, false); @@ -283,14 +270,14 @@ static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int fid) u32 current_ampdu_cnt = 0; u16 max_pld_size; u32 new_txunfl; - wlc_fifo_info_t *fifo = (ampdu->fifo_tb + fid); + struct brcms_fifo_info *fifo = (ampdu->fifo_tb + fid); uint xmtfifo_sz; u16 cur_txunfl; /* return if we got here for a different reason than underflows */ - cur_txunfl = - wlc_read_shm(wlc, - M_UCODE_MACSTAT + offsetof(macstat_t, txfunfl[fid])); + cur_txunfl = brcms_c_read_shm(wlc, + M_UCODE_MACSTAT + + offsetof(struct macstat, txfunfl[fid])); new_txunfl = (u16) (cur_txunfl - fifo->prev_txfunfl); if (new_txunfl == 0) { BCMMSG(wlc->wiphy, "TX status FRAG set but no tx underflows\n"); @@ -302,9 +289,8 @@ static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int fid) return 1; /* check if fifo is big enough */ - if (wlc_xmtfifo_sz_get(wlc, fid, &xmtfifo_sz)) { + if (brcms_c_xmtfifo_sz_get(wlc, fid, &xmtfifo_sz)) return -1; - } if ((TXFIFO_SIZE_UNIT * (u32) xmtfifo_sz) <= ampdu->ffpld_rsvd) return 1; @@ -356,7 +342,7 @@ static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int fid) fifo->ampdu_pld_size = max_pld_size; /* update scb release size */ - scb_ampdu_update_config_all(ampdu); + brcms_c_scb_ampdu_update_config_all(ampdu); /* compute a new dma xfer rate for max_mpdu @ max mcs. @@ -383,22 +369,22 @@ static int wlc_ffpld_check_txfunfl(struct wlc_info *wlc, int fid) fifo->mcs2ampdu_table[FFPLD_MAX_MCS] -= 1; /* recompute the table */ - wlc_ffpld_calc_mcs2ampdu_table(ampdu, fid); + brcms_c_ffpld_calc_mcs2ampdu_table(ampdu, fid); /* update scb release size */ - scb_ampdu_update_config_all(ampdu); + brcms_c_scb_ampdu_update_config_all(ampdu); } } fifo->accum_txfunfl = 0; return 0; } -static void wlc_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f) +static void brcms_c_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f) { int i; u32 phy_rate, dma_rate, tmp; u8 max_mpdu; - wlc_fifo_info_t *fifo = (ampdu->fifo_tb + f); + struct brcms_fifo_info *fifo = (ampdu->fifo_tb + f); /* recompute the dma rate */ /* note : we divide/multiply by 100 to avoid integer overflows */ @@ -425,47 +411,53 @@ static void wlc_ffpld_calc_mcs2ampdu_table(struct ampdu_info *ampdu, int f) } } -static void -wlc_ampdu_agg(struct ampdu_info *ampdu, struct scb *scb, struct sk_buff *p, - uint prec) +void +brcms_c_ampdu_tx_operational(struct brcms_c_info *wlc, u8 tid, + u8 ba_wsize, /* negotiated ba window size (in pdu) */ + uint max_rx_ampdu_bytes) /* from ht_cap in beacon */ { - scb_ampdu_t *scb_ampdu; - scb_ampdu_tid_ini_t *ini; - u8 tid = (u8) (p->priority); - + struct scb_ampdu *scb_ampdu; + struct scb_ampdu_tid_ini *ini; + struct ampdu_info *ampdu = wlc->ampdu; + struct scb *scb = wlc->pub->global_scb; scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); - /* initialize initiator on first packet; sends addba req */ - ini = SCB_AMPDU_INI(scb_ampdu, tid); - if (ini->magic != INI_MAGIC) { - ini = wlc_ampdu_init_tid_ini(ampdu, scb_ampdu, tid, false); + if (!ampdu->ini_enable[tid]) { + wiphy_err(ampdu->wlc->wiphy, "%s: Rejecting tid %d\n", + __func__, tid); + return; } - return; + + ini = SCB_AMPDU_INI(scb_ampdu, tid); + ini->tid = tid; + ini->scb = scb_ampdu->scb; + ini->ba_wsize = ba_wsize; + scb_ampdu->max_rx_ampdu_bytes = max_rx_ampdu_bytes; } int -wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, +brcms_c_sendampdu(struct ampdu_info *ampdu, struct brcms_txq_info *qi, struct sk_buff **pdu, int prec) { - struct wlc_info *wlc; + struct brcms_c_info *wlc; struct sk_buff *p, *pkt[AMPDU_MAX_MPDU]; u8 tid, ndelim; int err = 0; - u8 preamble_type = WLC_GF_PREAMBLE; - u8 fbr_preamble_type = WLC_GF_PREAMBLE; - u8 rts_preamble_type = WLC_LONG_PREAMBLE; - u8 rts_fbr_preamble_type = WLC_LONG_PREAMBLE; + u8 preamble_type = BRCMS_GF_PREAMBLE; + u8 fbr_preamble_type = BRCMS_GF_PREAMBLE; + u8 rts_preamble_type = BRCMS_LONG_PREAMBLE; + u8 rts_fbr_preamble_type = BRCMS_LONG_PREAMBLE; bool rr = true, fbr = false; uint i, count = 0, fifo, seg_cnt = 0; u16 plen, len, seq = 0, mcl, mch, index, frameid, dma_len = 0; - u32 ampdu_len, maxlen = 0; - d11txh_t *txh = NULL; + u32 ampdu_len, max_ampdu_bytes = 0; + struct d11txh *txh = NULL; u8 *plcp; struct ieee80211_hdr *h; struct scb *scb; - scb_ampdu_t *scb_ampdu; - scb_ampdu_tid_ini_t *ini; + struct scb_ampdu *scb_ampdu; + struct scb_ampdu_tid_ini *ini; u8 mcs = 0; bool use_rts = false, use_cts = false; ratespec_t rspec = 0, rspec_fallback = 0; @@ -473,7 +465,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, u16 mimo_ctlchbw = PHY_TXC1_BW_20MHZ; struct ieee80211_rts *rts; u8 rr_retry_limit; - wlc_fifo_info_t *f; + struct brcms_fifo_info *f; bool fbr_iscck; struct ieee80211_tx_info *tx_info; u16 qlen; @@ -493,16 +485,13 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, /* Let pressure continue to build ... */ qlen = pktq_plen(&qi->q, prec); - if (ini->tx_in_transit > 0 && qlen < scb_ampdu->max_pdu) { + if (ini->tx_in_transit > 0 && + qlen < min(scb_ampdu->max_pdu, ini->ba_wsize)) { + /* Collect multiple MPDU's to be sent in the next AMPDU */ return -EBUSY; } - wlc_ampdu_agg(ampdu, scb, p, tid); - - if (wlc->block_datafifo) { - wiphy_err(wiphy, "%s: Fifo blocked\n", __func__); - return -EBUSY; - } + /* at this point we intend to transmit an AMPDU */ rr_retry_limit = ampdu->rr_retry_limit_tid[tid]; ampdu_len = 0; dma_len = 0; @@ -513,7 +502,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, txrate = tx_info->status.rates; if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { - err = wlc_prep_pdu(wlc, p, &fifo); + err = brcms_c_prep_pdu(wlc, p, &fifo); } else { wiphy_err(wiphy, "%s: AMPDU flag is off!\n", __func__); *pdu = NULL; @@ -523,7 +512,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, if (err) { if (err == -EBUSY) { - wiphy_err(wiphy, "wl%d: wlc_sendampdu: " + wiphy_err(wiphy, "wl%d: sendampdu: " "prep_xdu retry; seq 0x%x\n", wlc->pub->unit, seq); *pdu = p; @@ -531,14 +520,14 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, } /* error in the packet; reject it */ - wiphy_err(wiphy, "wl%d: wlc_sendampdu: prep_xdu " + wiphy_err(wiphy, "wl%d: sendampdu: prep_xdu " "rejected; seq 0x%x\n", wlc->pub->unit, seq); *pdu = NULL; break; } /* pkt is good to be aggregated */ - txh = (d11txh_t *) p->data; + txh = (struct d11txh *) p->data; plcp = (u8 *) (txh + 1); h = (struct ieee80211_hdr *)(plcp + D11_PHY_HDR_LEN); seq = le16_to_cpu(h->seq_ctrl) >> SEQNUM_SHIFT; @@ -562,8 +551,8 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, } /* extract the length info */ - len = fbr_iscck ? WLC_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) - : WLC_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback); + len = fbr_iscck ? BRCMS_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) + : BRCMS_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback); /* retrieve null delimiter count */ ndelim = txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM]; @@ -598,7 +587,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, len = roundup(len, 4); ampdu_len += (len + (ndelim + 1) * AMPDU_DELIMITER_LEN); - dma_len += (u16) bcm_pkttotlen(p); + dma_len += (u16) brcmu_pkttotlen(p); BCMMSG(wlc->wiphy, "wl%d: ampdu_len %d" " seg_cnt %d null delim %d\n", @@ -627,19 +616,14 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, is40 = (plcp0 & MIMO_PLCP_40MHZ) ? 1 : 0; sgi = PLCP3_ISSGI(plcp3) ? 1 : 0; mcs = plcp0 & ~MIMO_PLCP_40MHZ; - maxlen = - min(scb_ampdu->max_rxlen, + max_ampdu_bytes = + min(scb_ampdu->max_rx_ampdu_bytes, ampdu->max_txlen[mcs][is40][sgi]); - /* XXX Fix me to honor real max_rxlen */ - /* can fix this as soon as ampdu_action() in mac80211.h - * gets extra u8buf_size par */ - maxlen = 64 * 1024; - if (is40) mimo_ctlchbw = - CHSPEC_SB_UPPER(WLC_BAND_PI_RADIO_CHANSPEC) - ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; + CHSPEC_SB_UPPER(BRCMS_BAND_PI_RADIO_CHANSPEC) + ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; /* rebuild the rspec and rspec_fallback */ rspec = RSPEC_MIMORATE; @@ -663,11 +647,11 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, if (use_rts || use_cts) { rts_rspec = - wlc_rspec_to_rts_rspec(wlc, rspec, false, - mimo_ctlchbw); + brcms_c_rspec_to_rts_rspec(wlc, + rspec, false, mimo_ctlchbw); rts_rspec_fallback = - wlc_rspec_to_rts_rspec(wlc, rspec_fallback, - false, mimo_ctlchbw); + brcms_c_rspec_to_rts_rspec(wlc, + rspec_fallback, false, mimo_ctlchbw); } } @@ -693,14 +677,12 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && ((u8) (p->priority) == tid)) { - plen = - bcm_pkttotlen(p) + AMPDU_MAX_MPDU_OVERHEAD; + plen = brcmu_pkttotlen(p) + + AMPDU_MAX_MPDU_OVERHEAD; plen = max(scb_ampdu->min_len, plen); - if ((plen + ampdu_len) > maxlen) { + if ((plen + ampdu_len) > max_ampdu_bytes) { p = NULL; - wiphy_err(wiphy, "%s: Bogus plen #1\n", - __func__); continue; } @@ -711,7 +693,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, p = NULL; continue; } - p = bcm_pktq_pdeq(&qi->q, prec); + p = brcmu_pktq_pdeq(&qi->q, prec); } else { p = NULL; } @@ -722,7 +704,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, if (count) { /* patch up the last txh */ - txh = (d11txh_t *) pkt[count - 1]->data; + txh = (struct d11txh *) pkt[count - 1]->data; mcl = le16_to_cpu(txh->MacTxControlLow); mcl &= ~TXC_AMPDU_MASK; mcl |= (TXC_AMPDU_LAST << TXC_AMPDU_SHIFT); @@ -735,30 +717,31 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, /* remove the pad len from last mpdu */ fbr_iscck = ((le16_to_cpu(txh->XtraFrameTypes) & 0x3) == 0); - len = fbr_iscck ? WLC_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) - : WLC_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback); + len = fbr_iscck ? BRCMS_GET_CCK_PLCP_LEN(txh->FragPLCPFallback) + : BRCMS_GET_MIMO_PLCP_LEN(txh->FragPLCPFallback); ampdu_len -= roundup(len, 4) - len; /* patch up the first txh & plcp */ - txh = (d11txh_t *) pkt[0]->data; + txh = (struct d11txh *) pkt[0]->data; plcp = (u8 *) (txh + 1); - WLC_SET_MIMO_PLCP_LEN(plcp, ampdu_len); + BRCMS_SET_MIMO_PLCP_LEN(plcp, ampdu_len); /* mark plcp to indicate ampdu */ - WLC_SET_MIMO_PLCP_AMPDU(plcp); + BRCMS_SET_MIMO_PLCP_AMPDU(plcp); /* reset the mixed mode header durations */ if (txh->MModeLen) { u16 mmodelen = - wlc_calc_lsig_len(wlc, rspec, ampdu_len); + brcms_c_calc_lsig_len(wlc, rspec, ampdu_len); txh->MModeLen = cpu_to_le16(mmodelen); - preamble_type = WLC_MM_PREAMBLE; + preamble_type = BRCMS_MM_PREAMBLE; } if (txh->MModeFbrLen) { u16 mmfbrlen = - wlc_calc_lsig_len(wlc, rspec_fallback, ampdu_len); + brcms_c_calc_lsig_len(wlc, rspec_fallback, + ampdu_len); txh->MModeFbrLen = cpu_to_le16(mmfbrlen); - fbr_preamble_type = WLC_MM_PREAMBLE; + fbr_preamble_type = BRCMS_MM_PREAMBLE; } /* set the preload length */ @@ -776,19 +759,19 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, rts = (struct ieee80211_rts *)&txh->rts_frame; if ((mch & TXC_PREAMBLE_RTS_MAIN_SHORT) == TXC_PREAMBLE_RTS_MAIN_SHORT) - rts_preamble_type = WLC_SHORT_PREAMBLE; + rts_preamble_type = BRCMS_SHORT_PREAMBLE; if ((mch & TXC_PREAMBLE_RTS_FB_SHORT) == TXC_PREAMBLE_RTS_FB_SHORT) - rts_fbr_preamble_type = WLC_SHORT_PREAMBLE; + rts_fbr_preamble_type = BRCMS_SHORT_PREAMBLE; durid = - wlc_compute_rtscts_dur(wlc, use_cts, rts_rspec, + brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec, rspec, rts_preamble_type, preamble_type, ampdu_len, true); rts->duration = cpu_to_le16(durid); - durid = wlc_compute_rtscts_dur(wlc, use_cts, + durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec_fallback, rspec_fallback, rts_fbr_preamble_type, @@ -805,8 +788,8 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, if (fbr) { mch |= TXC_AMPDU_FBR; txh->MacTxControlHigh = cpu_to_le16(mch); - WLC_SET_MIMO_PLCP_AMPDU(plcp); - WLC_SET_MIMO_PLCP_AMPDU(txh->FragPLCPFallback); + BRCMS_SET_MIMO_PLCP_AMPDU(plcp); + BRCMS_SET_MIMO_PLCP_AMPDU(txh->FragPLCPFallback); } BCMMSG(wlc->wiphy, "wl%d: count %d ampdu_len %d\n", @@ -819,7 +802,7 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, "TXFID_RATE_PROBE_MASK!?\n", __func__); } for (i = 0; i < count; i++) - wlc_txfifo(wlc, fifo, pkt[i], i == (count - 1), + brcms_c_txfifo(wlc, fifo, pkt[i], i == (count - 1), ampdu->txpkt_weight); } @@ -828,12 +811,12 @@ wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, } void -wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, - struct sk_buff *p, tx_status_t *txs) +brcms_c_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, + struct sk_buff *p, struct tx_status *txs) { - scb_ampdu_t *scb_ampdu; - struct wlc_info *wlc = ampdu->wlc; - scb_ampdu_tid_ini_t *ini; + struct scb_ampdu *scb_ampdu; + struct brcms_c_info *wlc = ampdu->wlc; + struct scb_ampdu_tid_ini *ini; u32 s1 = 0, s2 = 0; struct ieee80211_tx_info *tx_info; @@ -861,31 +844,32 @@ wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, if (likely(scb)) { scb_ampdu = SCB_AMPDU_CUBBY(ampdu, scb); ini = SCB_AMPDU_INI(scb_ampdu, p->priority); - wlc_ampdu_dotxstatus_complete(ampdu, scb, p, txs, s1, s2); + brcms_c_ampdu_dotxstatus_complete(ampdu, scb, p, txs, s1, s2); } else { /* loop through all pkts and free */ u8 queue = txs->frameid & TXFID_QUEUE_MASK; - d11txh_t *txh; + struct d11txh *txh; u16 mcl; while (p) { tx_info = IEEE80211_SKB_CB(p); - txh = (d11txh_t *) p->data; + txh = (struct d11txh *) p->data; mcl = le16_to_cpu(txh->MacTxControlLow); - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); /* break out if last packet of ampdu */ if (((mcl & TXC_AMPDU_MASK) >> TXC_AMPDU_SHIFT) == TXC_AMPDU_LAST) break; p = GETNEXTTXP(wlc, queue); } - wlc_txfifo_complete(wlc, queue, ampdu->txpkt_weight); + brcms_c_txfifo_complete(wlc, queue, ampdu->txpkt_weight); } - wlc_ampdu_txflowcontrol(wlc, scb_ampdu, ini); + brcms_c_ampdu_txflowcontrol(wlc, scb_ampdu, ini); } static void -rate_status(struct wlc_info *wlc, struct ieee80211_tx_info *tx_info, - tx_status_t *txs, u8 mcs) +brcms_c_ampdu_rate_status(struct brcms_c_info *wlc, + struct ieee80211_tx_info *tx_info, + struct tx_status *txs, u8 mcs) { struct ieee80211_tx_rate *txrate = tx_info->status.rates; int i; @@ -900,15 +884,15 @@ rate_status(struct wlc_info *wlc, struct ieee80211_tx_info *tx_info, #define SHORTNAME "AMPDU status" static void -wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, - struct sk_buff *p, tx_status_t *txs, +brcms_c_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, + struct sk_buff *p, struct tx_status *txs, u32 s1, u32 s2) { - scb_ampdu_t *scb_ampdu; - struct wlc_info *wlc = ampdu->wlc; - scb_ampdu_tid_ini_t *ini; + struct scb_ampdu *scb_ampdu; + struct brcms_c_info *wlc = ampdu->wlc; + struct scb_ampdu_tid_ini *ini; u8 bitmap[8], queue, tid; - d11txh_t *txh; + struct d11txh *txh; u8 *plcp; struct ieee80211_hdr *h; u16 seq, start_seq = 0, bindex, index, mcl; @@ -974,9 +958,9 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, wlc->default_bss->chanspec)); } else { if (supr_status != TX_STATUS_SUPR_FRAG) - wiphy_err(wiphy, "%s: wlc_ampdu_dotx" - "status:supr_status 0x%x\n", - __func__, supr_status); + wiphy_err(wiphy, "%s:" + "supr_status 0x%x\n", + __func__, supr_status); } /* no need to retry for badch; will fail again */ if (supr_status == TX_STATUS_SUPR_BADCH || @@ -988,29 +972,29 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, /* if there were underflows, but pre-loading is not active, notify rate adaptation. */ - if (wlc_ffpld_check_txfunfl(wlc, prio2fifo[tid]) - > 0) { + if (brcms_c_ffpld_check_txfunfl(wlc, + prio2fifo[tid]) > 0) { tx_error = true; } } } else if (txs->phyerr) { update_rate = false; - wiphy_err(wiphy, "wl%d: wlc_ampdu_dotxstatus: tx phy " + wiphy_err(wiphy, "wl%d: ampdu tx phy " "error (0x%x)\n", wlc->pub->unit, txs->phyerr); if (WL_ERROR_ON()) { - bcm_prpkt("txpkt (AMPDU)", p); - wlc_print_txdesc((d11txh_t *) p->data); + brcmu_prpkt("txpkt (AMPDU)", p); + brcms_c_print_txdesc((struct d11txh *) p->data); } - wlc_print_txstatus(txs); + brcms_c_print_txstatus(txs); } } /* loop through all pkts and retry if not acked */ while (p) { tx_info = IEEE80211_SKB_CB(p); - txh = (d11txh_t *) p->data; + txh = (struct d11txh *) p->data; mcl = le16_to_cpu(txh->MacTxControlLow); plcp = (u8 *) (txh + 1); h = (struct ieee80211_hdr *)(plcp + D11_PHY_HDR_LEN); @@ -1037,7 +1021,8 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, /* ampdu_ack_len: number of acked aggregated frames */ /* ampdu_len: number of aggregated frames */ - rate_status(wlc, tx_info, txs, mcs); + brcms_c_ampdu_rate_status(wlc, tx_info, txs, + mcs); tx_info->flags |= IEEE80211_TX_STAT_ACK; tx_info->flags |= IEEE80211_TX_STAT_AMPDU; tx_info->status.ampdu_ack_len = @@ -1060,9 +1045,10 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, ini->txretry[index]++; ini->tx_in_transit--; /* Use high prededence for retransmit to give some punch */ - /* wlc_txq_enq(wlc, scb, p, WLC_PRIO_TO_PREC(tid)); */ - wlc_txq_enq(wlc, scb, p, - WLC_PRIO_TO_HI_PREC(tid)); + /* brcms_c_txq_enq(wlc, scb, p, + * BRCMS_PRIO_TO_PREC(tid)); */ + brcms_c_txq_enq(wlc, scb, p, + BRCMS_PRIO_TO_HI_PREC(tid)); } else { /* Retry timeout */ ini->tx_in_transit--; @@ -1089,38 +1075,17 @@ wlc_ampdu_dotxstatus_complete(struct ampdu_info *ampdu, struct scb *scb, p = GETNEXTTXP(wlc, queue); } - wlc_send_q(wlc); + brcms_c_send_q(wlc); /* update rate state */ - antselid = wlc_antsel_antsel2id(wlc->asi, mimoantsel); + antselid = brcms_c_antsel_antsel2id(wlc->asi, mimoantsel); - wlc_txfifo_complete(wlc, queue, ampdu->txpkt_weight); -} - -/* initialize the initiator code for tid */ -static scb_ampdu_tid_ini_t *wlc_ampdu_init_tid_ini(struct ampdu_info *ampdu, - scb_ampdu_t *scb_ampdu, - u8 tid, bool override) -{ - scb_ampdu_tid_ini_t *ini; - - /* check for per-tid control of ampdu */ - if (!ampdu->ini_enable[tid]) { - wiphy_err(ampdu->wlc->wiphy, "%s: Rejecting tid %d\n", - __func__, tid); - return NULL; - } - - ini = SCB_AMPDU_INI(scb_ampdu, tid); - ini->tid = tid; - ini->scb = scb_ampdu->scb; - ini->magic = INI_MAGIC; - return ini; + brcms_c_txfifo_complete(wlc, queue, ampdu->txpkt_weight); } -static int wlc_ampdu_set(struct ampdu_info *ampdu, bool on) +static int brcms_c_ampdu_set(struct ampdu_info *ampdu, bool on) { - struct wlc_info *wlc = ampdu->wlc; + struct brcms_c_info *wlc = ampdu->wlc; wlc->pub->_ampdu = false; @@ -1130,7 +1095,7 @@ static int wlc_ampdu_set(struct ampdu_info *ampdu, bool on) "nmode enabled\n", wlc->pub->unit); return -ENOTSUPP; } - if (!wlc_ampdu_cap(ampdu)) { + if (!brcms_c_ampdu_cap(ampdu)) { wiphy_err(ampdu->wlc->wiphy, "wl%d: device not " "ampdu capable\n", wlc->pub->unit); return -ENOTSUPP; @@ -1141,15 +1106,15 @@ static int wlc_ampdu_set(struct ampdu_info *ampdu, bool on) return 0; } -static bool wlc_ampdu_cap(struct ampdu_info *ampdu) +static bool brcms_c_ampdu_cap(struct ampdu_info *ampdu) { - if (WLC_PHY_11N_CAP(ampdu->wlc->band)) + if (BRCMS_PHY_11N_CAP(ampdu->wlc->band)) return true; else return false; } -static void ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur) +static void brcms_c_scb_ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur) { u32 rate, mcs; @@ -1170,34 +1135,35 @@ static void ampdu_update_max_txlen(struct ampdu_info *ampdu, u8 dur) } } -void wlc_ampdu_macaddr_upd(struct wlc_info *wlc) +void brcms_c_ampdu_macaddr_upd(struct brcms_c_info *wlc) { char template[T_RAM_ACCESS_SZ * 2]; /* driver needs to write the ta in the template; ta is at offset 16 */ memset(template, 0, sizeof(template)); memcpy(template, wlc->pub->cur_etheraddr, ETH_ALEN); - wlc_write_template_ram(wlc, (T_BA_TPL_BASE + 16), (T_RAM_ACCESS_SZ * 2), - template); + brcms_c_write_template_ram(wlc, (T_BA_TPL_BASE + 16), + (T_RAM_ACCESS_SZ * 2), + template); } -bool wlc_aggregatable(struct wlc_info *wlc, u8 tid) +bool brcms_c_aggregatable(struct brcms_c_info *wlc, u8 tid) { return wlc->ampdu->ini_enable[tid]; } -void wlc_ampdu_shm_upd(struct ampdu_info *ampdu) +void brcms_c_ampdu_shm_upd(struct ampdu_info *ampdu) { - struct wlc_info *wlc = ampdu->wlc; + struct brcms_c_info *wlc = ampdu->wlc; /* Extend ucode internal watchdog timer to match larger received frames */ if ((ampdu->rx_factor & IEEE80211_HT_AMPDU_PARM_FACTOR) == IEEE80211_HT_MAX_AMPDU_64K) { - wlc_write_shm(wlc, M_MIMO_MAXSYM, MIMO_MAXSYM_MAX); - wlc_write_shm(wlc, M_WATCHDOG_8TU, WATCHDOG_8TU_MAX); + brcms_c_write_shm(wlc, M_MIMO_MAXSYM, MIMO_MAXSYM_MAX); + brcms_c_write_shm(wlc, M_WATCHDOG_8TU, WATCHDOG_8TU_MAX); } else { - wlc_write_shm(wlc, M_MIMO_MAXSYM, MIMO_MAXSYM_DEF); - wlc_write_shm(wlc, M_WATCHDOG_8TU, WATCHDOG_8TU_DEF); + brcms_c_write_shm(wlc, M_MIMO_MAXSYM, MIMO_MAXSYM_DEF); + brcms_c_write_shm(wlc, M_WATCHDOG_8TU, WATCHDOG_8TU_DEF); } } @@ -1235,10 +1201,10 @@ static void dma_cb_fn_ampdu(void *txi, void *arg_a) * When a remote party is no longer available for ampdu communication, any * pending tx ampdu packets in the driver have to be flushed. */ -void wlc_ampdu_flush(struct wlc_info *wlc, +void brcms_c_ampdu_flush(struct brcms_c_info *wlc, struct ieee80211_sta *sta, u16 tid) { - struct wlc_txq_info *qi = wlc->pkt_queue; + struct brcms_txq_info *qi = wlc->pkt_queue; struct pktq *pq = &qi->q; int prec; struct cb_del_ampdu_pars ampdu_pars; @@ -1246,8 +1212,8 @@ void wlc_ampdu_flush(struct wlc_info *wlc, ampdu_pars.sta = sta; ampdu_pars.tid = tid; for (prec = 0; prec < pq->num_prec; prec++) { - bcm_pktq_pflush(pq, prec, true, cb_del_ampdu_pkt, + brcmu_pktq_pflush(pq, prec, true, cb_del_ampdu_pkt, (void *)&du_pars); } - wlc_inval_dma_pkts(wlc->hw, sta, dma_cb_fn_ampdu); + brcms_c_inval_dma_pkts(wlc->hw, sta, dma_cb_fn_ampdu); } diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_types.h b/drivers/staging/brcm80211/brcmsmac/ampdu.h index df6e04c6ac5..421f4ba7c63 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_types.h +++ b/drivers/staging/brcm80211/brcmsmac/ampdu.h @@ -14,24 +14,17 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_types_h_ -#define _wlc_types_h_ +#ifndef _BRCM_AMPDU_H_ +#define _BRCM_AMPDU_H_ -/* forward declarations */ +extern struct ampdu_info *brcms_c_ampdu_attach(struct brcms_c_info *wlc); +extern void brcms_c_ampdu_detach(struct ampdu_info *ampdu); +extern int brcms_c_sendampdu(struct ampdu_info *ampdu, + struct brcms_txq_info *qi, + struct sk_buff **aggp, int prec); +extern void brcms_c_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, + struct sk_buff *p, struct tx_status *txs); +extern void brcms_c_ampdu_macaddr_upd(struct brcms_c_info *wlc); +extern void brcms_c_ampdu_shm_upd(struct ampdu_info *ampdu); -struct wlc_info; -struct wlc_hw_info; -struct wlc_if; -struct wl_if; -struct ampdu_info; -struct antsel_info; -struct bmac_pmq; - -struct d11init; - -#ifndef _hnddma_pub_ -#define _hnddma_pub_ -struct hnddma_pub; -#endif /* _hnddma_pub_ */ - -#endif /* _wlc_types_h_ */ +#endif /* _BRCM_AMPDU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c b/drivers/staging/brcm80211/brcmsmac/antsel.c index 111ef32b7ac..c4e76c093ae 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.c +++ b/drivers/staging/brcm80211/brcmsmac/antsel.c @@ -14,40 +14,29 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <wlc_cfg.h> - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/pci.h> - -#include <bcmdefs.h> -#include <bcmutils.h> -#include <bcmnvram.h> -#include <aiutils.h> -#include <bcmdevs.h> -#include <sbhnddma.h> -#include <wlioctl.h> - -#include "d11.h" -#include "wlc_rate.h" -#include "wlc_key.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wl_dbg.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_bmac.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wl_export.h" -#include "wlc_phy_shim.h" -#include "wlc_antsel.h" +#include <linux/slab.h> +#include <net/mac80211.h> + +#include "types.h" +#include "bmac.h" +#include "main.h" +#include "phy_shim.h" +#include "antsel.h" + +#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ +#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */ +#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */ +#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */ +#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */ +#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */ /* useful macros */ -#define WLC_ANTSEL_11N_0(ant) ((((ant) & ANT_SELCFG_MASK) >> 4) & 0xf) -#define WLC_ANTSEL_11N_1(ant) (((ant) & ANT_SELCFG_MASK) & 0xf) -#define WLC_ANTIDX_11N(ant) (((WLC_ANTSEL_11N_0(ant)) << 2) + (WLC_ANTSEL_11N_1(ant))) -#define WLC_ANT_ISAUTO_11N(ant) (((ant) & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO) -#define WLC_ANTSEL_11N(ant) ((ant) & ANT_SELCFG_MASK) +#define BRCMS_ANTSEL_11N_0(ant) ((((ant) & ANT_SELCFG_MASK) >> 4) & 0xf) +#define BRCMS_ANTSEL_11N_1(ant) (((ant) & ANT_SELCFG_MASK) & 0xf) +#define BRCMS_ANTIDX_11N(ant) (((BRCMS_ANTSEL_11N_0(ant)) << 2) +\ + (BRCMS_ANTSEL_11N_1(ant))) +#define BRCMS_ANT_ISAUTO_11N(ant) (((ant) & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO) +#define BRCMS_ANTSEL_11N(ant) ((ant) & ANT_SELCFG_MASK) /* antenna switch */ /* defines for no boardlevel antenna diversity */ @@ -62,11 +51,12 @@ #define ANT_SELCFG_DEF_2x4 0x02 /* default antenna configuration */ /* static functions */ -static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel); -static u8 wlc_antsel_id2antcfg(struct antsel_info *asi, u8 id); -static u16 wlc_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg); -static void wlc_antsel_init_cfg(struct antsel_info *asi, - wlc_antselcfg_t *antsel, +static int brcms_c_antsel_cfgupd(struct antsel_info *asi, + struct brcms_antselcfg *antsel); +static u8 brcms_c_antsel_id2antcfg(struct antsel_info *asi, u8 id); +static u16 brcms_c_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg); +static void brcms_c_antsel_init_cfg(struct antsel_info *asi, + struct brcms_antselcfg *antsel, bool auto_sel); const u16 mimo_2x4_div_antselpat_tbl[] = { @@ -93,14 +83,14 @@ const u8 mimo_2x3_div_antselid_tbl[16] = { 0, 0, 0, 0, 0, 0, 0, 0 /* pat to antselid */ }; -struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc) +struct antsel_info *brcms_c_antsel_attach(struct brcms_c_info *wlc) { struct antsel_info *asi; asi = kzalloc(sizeof(struct antsel_info), GFP_ATOMIC); if (!asi) { - wiphy_err(wlc->wiphy, "wl%d: wlc_antsel_attach: out of mem\n", - wlc->pub->unit); + wiphy_err(wlc->wiphy, "wl%d: brcms_c_antsel_attach: out of " + "mem\n", wlc->pub->unit); return NULL; } @@ -129,7 +119,7 @@ struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc) asi->antsel_avail = false; } else { asi->antsel_avail = false; - wiphy_err(wlc->wiphy, "wlc_antsel_attach: 2o3 " + wiphy_err(wlc->wiphy, "antsel_attach: 2o3 " "board cfg invalid\n"); } break; @@ -148,30 +138,30 @@ struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc) } /* Set the antenna selection type for the low driver */ - wlc_bmac_antsel_type_set(wlc->hw, asi->antsel_type); + brcms_b_antsel_type_set(wlc->hw, asi->antsel_type); /* Init (auto/manual) antenna selection */ - wlc_antsel_init_cfg(asi, &asi->antcfg_11n, true); - wlc_antsel_init_cfg(asi, &asi->antcfg_cur, true); + brcms_c_antsel_init_cfg(asi, &asi->antcfg_11n, true); + brcms_c_antsel_init_cfg(asi, &asi->antcfg_cur, true); return asi; } -void wlc_antsel_detach(struct antsel_info *asi) +void brcms_c_antsel_detach(struct antsel_info *asi) { kfree(asi); } -void wlc_antsel_init(struct antsel_info *asi) +void brcms_c_antsel_init(struct antsel_info *asi) { if ((asi->antsel_type == ANTSEL_2x3) || (asi->antsel_type == ANTSEL_2x4)) - wlc_antsel_cfgupd(asi, &asi->antcfg_11n); + brcms_c_antsel_cfgupd(asi, &asi->antcfg_11n); } /* boardlevel antenna selection: init antenna selection structure */ static void -wlc_antsel_init_cfg(struct antsel_info *asi, wlc_antselcfg_t *antsel, +brcms_c_antsel_init_cfg(struct antsel_info *asi, struct brcms_antselcfg *antsel, bool auto_sel) { if (asi->antsel_type == ANTSEL_2x3) { @@ -202,7 +192,7 @@ wlc_antsel_init_cfg(struct antsel_info *asi, wlc_antselcfg_t *antsel, } void -wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, bool sel, +brcms_c_antsel_antcfg_get(struct antsel_info *asi, bool usedef, bool sel, u8 antselid, u8 fbantselid, u8 *antcfg, u8 *fbantcfg) { @@ -222,8 +212,8 @@ wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, bool sel, } else { ant = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST]; if ((ant & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO) { - *antcfg = wlc_antsel_id2antcfg(asi, antselid); - *fbantcfg = wlc_antsel_id2antcfg(asi, fbantselid); + *antcfg = brcms_c_antsel_id2antcfg(asi, antselid); + *fbantcfg = brcms_c_antsel_id2antcfg(asi, fbantselid); } else { *antcfg = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST]; @@ -234,7 +224,7 @@ wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, bool sel, } /* boardlevel antenna selection: convert mimo_antsel (ucode interface) to id */ -u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel) +u8 brcms_c_antsel_antsel2id(struct antsel_info *asi, u16 antsel) { u8 antselid = 0; @@ -253,7 +243,7 @@ u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel) } /* boardlevel antenna selection: convert id to ant_cfg */ -static u8 wlc_antsel_id2antcfg(struct antsel_info *asi, u8 id) +static u8 brcms_c_antsel_id2antcfg(struct antsel_info *asi, u8 id) { u8 antcfg = ANT_SELCFG_DEF_2x2; @@ -272,9 +262,9 @@ static u8 wlc_antsel_id2antcfg(struct antsel_info *asi, u8 id) } /* boardlevel antenna selection: convert ant_cfg to mimo_antsel (ucode interface) */ -static u16 wlc_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg) +static u16 brcms_c_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg) { - u8 idx = WLC_ANTIDX_11N(WLC_ANTSEL_11N(ant_cfg)); + u8 idx = BRCMS_ANTIDX_11N(BRCMS_ANTSEL_11N(ant_cfg)); u16 mimo_antsel = 0; if (asi->antsel_type == ANTSEL_2x4) { @@ -292,9 +282,10 @@ static u16 wlc_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg) } /* boardlevel antenna selection: ucode interface control */ -static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel) +static int brcms_c_antsel_cfgupd(struct antsel_info *asi, + struct brcms_antselcfg *antsel) { - struct wlc_info *wlc = asi->wlc; + struct brcms_c_info *wlc = asi->wlc; u8 ant_cfg; u16 mimo_antsel; @@ -302,8 +293,8 @@ static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel) * (aka default TX) */ ant_cfg = antsel->ant_config[ANT_SELCFG_TX_DEF]; - mimo_antsel = wlc_antsel_antcfg2antsel(asi, ant_cfg); - wlc_write_shm(wlc, M_MIMO_ANTSEL_TXDFLT, mimo_antsel); + mimo_antsel = brcms_c_antsel_antcfg2antsel(asi, ant_cfg); + brcms_c_write_shm(wlc, M_MIMO_ANTSEL_TXDFLT, mimo_antsel); /* Update driver stats for currently selected default tx/rx antenna config */ asi->antcfg_cur.ant_config[ANT_SELCFG_TX_DEF] = ant_cfg; @@ -311,8 +302,8 @@ static int wlc_antsel_cfgupd(struct antsel_info *asi, wlc_antselcfg_t *antsel) * (aka default RX) */ ant_cfg = antsel->ant_config[ANT_SELCFG_RX_DEF]; - mimo_antsel = wlc_antsel_antcfg2antsel(asi, ant_cfg); - wlc_write_shm(wlc, M_MIMO_ANTSEL_RXDFLT, mimo_antsel); + mimo_antsel = brcms_c_antsel_antcfg2antsel(asi, ant_cfg); + brcms_c_write_shm(wlc, M_MIMO_ANTSEL_RXDFLT, mimo_antsel); /* Update driver stats for currently selected default tx/rx antenna config */ asi->antcfg_cur.ant_config[ANT_SELCFG_RX_DEF] = ant_cfg; diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h b/drivers/staging/brcm80211/brcmsmac/antsel.h index 2470c73fc4e..97ea3881a8e 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_antsel.h +++ b/drivers/staging/brcm80211/brcmsmac/antsel.h @@ -14,16 +14,16 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_antsel_h_ -#define _wlc_antsel_h_ +#ifndef _BRCM_ANTSEL_H_ +#define _BRCM_ANTSEL_H_ -extern struct antsel_info *wlc_antsel_attach(struct wlc_info *wlc); -extern void wlc_antsel_detach(struct antsel_info *asi); -extern void wlc_antsel_init(struct antsel_info *asi); -extern void wlc_antsel_antcfg_get(struct antsel_info *asi, bool usedef, +extern struct antsel_info *brcms_c_antsel_attach(struct brcms_c_info *wlc); +extern void brcms_c_antsel_detach(struct antsel_info *asi); +extern void brcms_c_antsel_init(struct antsel_info *asi); +extern void brcms_c_antsel_antcfg_get(struct antsel_info *asi, bool usedef, bool sel, u8 id, u8 fbid, u8 *antcfg, u8 *fbantcfg); -extern u8 wlc_antsel_antsel2id(struct antsel_info *asi, u16 antsel); +extern u8 brcms_c_antsel_antsel2id(struct antsel_info *asi, u16 antsel); -#endif /* _wlc_antsel_h_ */ +#endif /* _BRCM_ANTSEL_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmotp.c b/drivers/staging/brcm80211/brcmsmac/bcmotp.c deleted file mode 100644 index d09628b5a88..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/bcmotp.c +++ /dev/null @@ -1,936 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include <linux/delay.h> -#include <linux/kernel.h> -#include <linux/string.h> -#include <linux/module.h> -#include <linux/pci.h> -#include <linux/crc-ccitt.h> - -#include <bcmdefs.h> -#include <bcmdevs.h> -#include <bcmutils.h> -#include <aiutils.h> -#include <hndsoc.h> -#include <sbchipc.h> -#include <bcmotp.h> - -/* - * There are two different OTP controllers so far: - * 1. new IPX OTP controller: chipc 21, >=23 - * 2. older HND OTP controller: chipc 12, 17, 22 - * - * Define BCMHNDOTP to include support for the HND OTP controller. - * Define BCMIPXOTP to include support for the IPX OTP controller. - * - * NOTE 1: More than one may be defined - * NOTE 2: If none are defined, the default is to include them all. - */ - -#if !defined(BCMHNDOTP) && !defined(BCMIPXOTP) -#define BCMHNDOTP 1 -#define BCMIPXOTP 1 -#endif - -#define OTPTYPE_HND(ccrev) ((ccrev) < 21 || (ccrev) == 22) -#define OTPTYPE_IPX(ccrev) ((ccrev) == 21 || (ccrev) >= 23) - -#define OTPP_TRIES 10000000 /* # of tries for OTPP */ - -#ifdef BCMIPXOTP -#define MAXNUMRDES 9 /* Maximum OTP redundancy entries */ -#endif - -/* OTP common function type */ -typedef int (*otp_status_t) (void *oh); -typedef int (*otp_size_t) (void *oh); -typedef void *(*otp_init_t) (si_t *sih); -typedef u16(*otp_read_bit_t) (void *oh, chipcregs_t *cc, uint off); -typedef int (*otp_read_region_t) (si_t *sih, int region, u16 *data, - uint *wlen); -typedef int (*otp_nvread_t) (void *oh, char *data, uint *len); - -/* OTP function struct */ -typedef struct otp_fn_s { - otp_size_t size; - otp_read_bit_t read_bit; - otp_init_t init; - otp_read_region_t read_region; - otp_nvread_t nvread; - otp_status_t status; -} otp_fn_t; - -typedef struct { - uint ccrev; /* chipc revision */ - otp_fn_t *fn; /* OTP functions */ - si_t *sih; /* Saved sb handle */ - -#ifdef BCMIPXOTP - /* IPX OTP section */ - u16 wsize; /* Size of otp in words */ - u16 rows; /* Geometry */ - u16 cols; /* Geometry */ - u32 status; /* Flag bits (lock/prog/rv). - * (Reflected only when OTP is power cycled) - */ - u16 hwbase; /* hardware subregion offset */ - u16 hwlim; /* hardware subregion boundary */ - u16 swbase; /* software subregion offset */ - u16 swlim; /* software subregion boundary */ - u16 fbase; /* fuse subregion offset */ - u16 flim; /* fuse subregion boundary */ - int otpgu_base; /* offset to General Use Region */ -#endif /* BCMIPXOTP */ - -#ifdef BCMHNDOTP - /* HND OTP section */ - uint size; /* Size of otp in bytes */ - uint hwprot; /* Hardware protection bits */ - uint signvalid; /* Signature valid bits */ - int boundary; /* hw/sw boundary */ -#endif /* BCMHNDOTP */ -} otpinfo_t; - -static otpinfo_t otpinfo; - -/* - * IPX OTP Code - * - * Exported functions: - * ipxotp_status() - * ipxotp_size() - * ipxotp_init() - * ipxotp_read_bit() - * ipxotp_read_region() - * ipxotp_nvread() - * - */ - -#ifdef BCMIPXOTP - -#define HWSW_RGN(rgn) (((rgn) == OTP_HW_RGN) ? "h/w" : "s/w") - -/* OTP layout */ -/* CC revs 21, 24 and 27 OTP General Use Region word offset */ -#define REVA4_OTPGU_BASE 12 - -/* CC revs 23, 25, 26, 28 and above OTP General Use Region word offset */ -#define REVB8_OTPGU_BASE 20 - -/* CC rev 36 OTP General Use Region word offset */ -#define REV36_OTPGU_BASE 12 - -/* Subregion word offsets in General Use region */ -#define OTPGU_HSB_OFF 0 -#define OTPGU_SFB_OFF 1 -#define OTPGU_CI_OFF 2 -#define OTPGU_P_OFF 3 -#define OTPGU_SROM_OFF 4 - -/* Flag bit offsets in General Use region */ -#define OTPGU_HWP_OFF 60 -#define OTPGU_SWP_OFF 61 -#define OTPGU_CIP_OFF 62 -#define OTPGU_FUSEP_OFF 63 -#define OTPGU_CIP_MSK 0x4000 -#define OTPGU_P_MSK 0xf000 -#define OTPGU_P_SHIFT (OTPGU_HWP_OFF % 16) - -/* OTP Size */ -#define OTP_SZ_FU_324 ((roundup(324, 8))/8) /* 324 bits */ -#define OTP_SZ_FU_288 (288/8) /* 288 bits */ -#define OTP_SZ_FU_216 (216/8) /* 216 bits */ -#define OTP_SZ_FU_72 (72/8) /* 72 bits */ -#define OTP_SZ_CHECKSUM (16/8) /* 16 bits */ -#define OTP4315_SWREG_SZ 178 /* 178 bytes */ -#define OTP_SZ_FU_144 (144/8) /* 144 bits */ - -static int ipxotp_status(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - return (int)(oi->status); -} - -/* Return size in bytes */ -static int ipxotp_size(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - return (int)oi->wsize * 2; -} - -static u16 ipxotp_otpr(void *oh, chipcregs_t *cc, uint wn) -{ - otpinfo_t *oi; - - oi = (otpinfo_t *) oh; - - return R_REG(&cc->sromotp[wn]); -} - -static u16 ipxotp_read_bit(void *oh, chipcregs_t *cc, uint off) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - uint k, row, col; - u32 otpp, st; - - row = off / oi->cols; - col = off % oi->cols; - - otpp = OTPP_START_BUSY | - ((OTPPOC_READ << OTPP_OC_SHIFT) & OTPP_OC_MASK) | - ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) | - ((col << OTPP_COL_SHIFT) & OTPP_COL_MASK); - W_REG(&cc->otpprog, otpp); - - for (k = 0; - ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY) - && (k < OTPP_TRIES); k++) - ; - if (k >= OTPP_TRIES) { - return 0xffff; - } - if (st & OTPP_READERR) { - return 0xffff; - } - st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT; - - return (int)st; -} - -/* Calculate max HW/SW region byte size by subtracting fuse region and checksum size, - * osizew is oi->wsize (OTP size - GU size) in words - */ -static int ipxotp_max_rgnsz(si_t *sih, int osizew) -{ - int ret = 0; - - switch (sih->chip) { - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; - break; - case BCM4313_CHIP_ID: - ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; - break; - default: - break; /* Don't know about this chip */ - } - - return ret; -} - -static void _ipxotp_init(otpinfo_t *oi, chipcregs_t *cc) -{ - uint k; - u32 otpp, st; - - /* record word offset of General Use Region for various chipcommon revs */ - if (oi->sih->ccrev == 21 || oi->sih->ccrev == 24 - || oi->sih->ccrev == 27) { - oi->otpgu_base = REVA4_OTPGU_BASE; - } else if (oi->sih->ccrev == 36) { - /* OTP size greater than equal to 2KB (128 words), otpgu_base is similar to rev23 */ - if (oi->wsize >= 128) - oi->otpgu_base = REVB8_OTPGU_BASE; - else - oi->otpgu_base = REV36_OTPGU_BASE; - } else if (oi->sih->ccrev == 23 || oi->sih->ccrev >= 25) { - oi->otpgu_base = REVB8_OTPGU_BASE; - } - - /* First issue an init command so the status is up to date */ - otpp = - OTPP_START_BUSY | ((OTPPOC_INIT << OTPP_OC_SHIFT) & OTPP_OC_MASK); - - W_REG(&cc->otpprog, otpp); - for (k = 0; - ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY) - && (k < OTPP_TRIES); k++) - ; - if (k >= OTPP_TRIES) { - return; - } - - /* Read OTP lock bits and subregion programmed indication bits */ - oi->status = R_REG(&cc->otpstatus); - - if ((oi->sih->chip == BCM43224_CHIP_ID) - || (oi->sih->chip == BCM43225_CHIP_ID)) { - u32 p_bits; - p_bits = - (ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_P_OFF) & - OTPGU_P_MSK) - >> OTPGU_P_SHIFT; - oi->status |= (p_bits << OTPS_GUP_SHIFT); - } - - /* - * h/w region base and fuse region limit are fixed to the top and - * the bottom of the general use region. Everything else can be flexible. - */ - oi->hwbase = oi->otpgu_base + OTPGU_SROM_OFF; - oi->hwlim = oi->wsize; - if (oi->status & OTPS_GUP_HW) { - oi->hwlim = - ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_HSB_OFF) / 16; - oi->swbase = oi->hwlim; - } else - oi->swbase = oi->hwbase; - - /* subtract fuse and checksum from beginning */ - oi->swlim = ipxotp_max_rgnsz(oi->sih, oi->wsize) / 2; - - if (oi->status & OTPS_GUP_SW) { - oi->swlim = - ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_SFB_OFF) / 16; - oi->fbase = oi->swlim; - } else - oi->fbase = oi->swbase; - - oi->flim = oi->wsize; -} - -static void *ipxotp_init(si_t *sih) -{ - uint idx; - chipcregs_t *cc; - otpinfo_t *oi; - - /* Make sure we're running IPX OTP */ - if (!OTPTYPE_IPX(sih->ccrev)) - return NULL; - - /* Make sure OTP is not disabled */ - if (ai_is_otp_disabled(sih)) - return NULL; - - /* Make sure OTP is powered up */ - if (!ai_is_otp_powered(sih)) - return NULL; - - oi = &otpinfo; - - /* Check for otp size */ - switch ((sih->cccaps & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT) { - case 0: - /* Nothing there */ - return NULL; - case 1: /* 32x64 */ - oi->rows = 32; - oi->cols = 64; - oi->wsize = 128; - break; - case 2: /* 64x64 */ - oi->rows = 64; - oi->cols = 64; - oi->wsize = 256; - break; - case 5: /* 96x64 */ - oi->rows = 96; - oi->cols = 64; - oi->wsize = 384; - break; - case 7: /* 16x64 *//* 1024 bits */ - oi->rows = 16; - oi->cols = 64; - oi->wsize = 64; - break; - default: - /* Don't know the geometry */ - return NULL; - } - - /* Retrieve OTP region info */ - idx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - _ipxotp_init(oi, cc); - - ai_setcoreidx(sih, idx); - - return (void *)oi; -} - -static int ipxotp_read_region(void *oh, int region, u16 *data, uint *wlen) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - uint idx; - chipcregs_t *cc; - uint base, i, sz; - - /* Validate region selection */ - switch (region) { - case OTP_HW_RGN: - sz = (uint) oi->hwlim - oi->hwbase; - if (!(oi->status & OTPS_GUP_HW)) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->hwbase; - break; - case OTP_SW_RGN: - sz = ((uint) oi->swlim - oi->swbase); - if (!(oi->status & OTPS_GUP_SW)) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->swbase; - break; - case OTP_CI_RGN: - sz = OTPGU_CI_SZ; - if (!(oi->status & OTPS_GUP_CI)) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->otpgu_base + OTPGU_CI_OFF; - break; - case OTP_FUSE_RGN: - sz = (uint) oi->flim - oi->fbase; - if (!(oi->status & OTPS_GUP_FUSE)) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->fbase; - break; - case OTP_ALL_RGN: - sz = ((uint) oi->flim - oi->hwbase); - if (!(oi->status & (OTPS_GUP_HW | OTPS_GUP_SW))) { - *wlen = sz; - return -ENODATA; - } - if (*wlen < sz) { - *wlen = sz; - return -EOVERFLOW; - } - base = oi->hwbase; - break; - default: - return -EINVAL; - } - - idx = ai_coreidx(oi->sih); - cc = ai_setcoreidx(oi->sih, SI_CC_IDX); - - /* Read the data */ - for (i = 0; i < sz; i++) - data[i] = ipxotp_otpr(oh, cc, base + i); - - ai_setcoreidx(oi->sih, idx); - *wlen = sz; - return 0; -} - -static int ipxotp_nvread(void *oh, char *data, uint *len) -{ - return -ENOTSUPP; -} - -static otp_fn_t ipxotp_fn = { - (otp_size_t) ipxotp_size, - (otp_read_bit_t) ipxotp_read_bit, - - (otp_init_t) ipxotp_init, - (otp_read_region_t) ipxotp_read_region, - (otp_nvread_t) ipxotp_nvread, - - (otp_status_t) ipxotp_status -}; - -#endif /* BCMIPXOTP */ - -/* - * HND OTP Code - * - * Exported functions: - * hndotp_status() - * hndotp_size() - * hndotp_init() - * hndotp_read_bit() - * hndotp_read_region() - * hndotp_nvread() - * - */ - -#ifdef BCMHNDOTP - -/* Fields in otpstatus */ -#define OTPS_PROGFAIL 0x80000000 -#define OTPS_PROTECT 0x00000007 -#define OTPS_HW_PROTECT 0x00000001 -#define OTPS_SW_PROTECT 0x00000002 -#define OTPS_CID_PROTECT 0x00000004 -#define OTPS_RCEV_MSK 0x00003f00 -#define OTPS_RCEV_SHIFT 8 - -/* Fields in the otpcontrol register */ -#define OTPC_RECWAIT 0xff000000 -#define OTPC_PROGWAIT 0x00ffff00 -#define OTPC_PRW_SHIFT 8 -#define OTPC_MAXFAIL 0x00000038 -#define OTPC_VSEL 0x00000006 -#define OTPC_SELVL 0x00000001 - -/* OTP regions (Word offsets from otp size) */ -#define OTP_SWLIM_OFF (-4) -#define OTP_CIDBASE_OFF 0 -#define OTP_CIDLIM_OFF 4 - -/* Predefined OTP words (Word offset from otp size) */ -#define OTP_BOUNDARY_OFF (-4) -#define OTP_HWSIGN_OFF (-3) -#define OTP_SWSIGN_OFF (-2) -#define OTP_CIDSIGN_OFF (-1) -#define OTP_CID_OFF 0 -#define OTP_PKG_OFF 1 -#define OTP_FID_OFF 2 -#define OTP_RSV_OFF 3 -#define OTP_LIM_OFF 4 -#define OTP_RD_OFF 4 /* Redundancy row starts here */ -#define OTP_RC0_OFF 28 /* Redundancy control word 1 */ -#define OTP_RC1_OFF 32 /* Redundancy control word 2 */ -#define OTP_RC_LIM_OFF 36 /* Redundancy control word end */ - -#define OTP_HW_REGION OTPS_HW_PROTECT -#define OTP_SW_REGION OTPS_SW_PROTECT -#define OTP_CID_REGION OTPS_CID_PROTECT - -#if OTP_HW_REGION != OTP_HW_RGN -#error "incompatible OTP_HW_RGN" -#endif -#if OTP_SW_REGION != OTP_SW_RGN -#error "incompatible OTP_SW_RGN" -#endif -#if OTP_CID_REGION != OTP_CI_RGN -#error "incompatible OTP_CI_RGN" -#endif - -/* Redundancy entry definitions */ -#define OTP_RCE_ROW_SZ 6 -#define OTP_RCE_SIGN_MASK 0x7fff -#define OTP_RCE_ROW_MASK 0x3f -#define OTP_RCE_BITS 21 -#define OTP_RCE_SIGN_SZ 15 -#define OTP_RCE_BIT0 1 - -#define OTP_WPR 4 -#define OTP_SIGNATURE 0x578a -#define OTP_MAGIC 0x4e56 - -static int hndotp_status(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - return (int)(oi->hwprot | oi->signvalid); -} - -static int hndotp_size(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - return (int)(oi->size); -} - -static u16 hndotp_otpr(void *oh, chipcregs_t *cc, uint wn) -{ - volatile u16 *ptr; - - ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP); - return R_REG(&ptr[wn]); -} - -static u16 hndotp_otproff(void *oh, chipcregs_t *cc, int woff) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - volatile u16 *ptr; - - ptr = (volatile u16 *)((volatile char *)cc + CC_SROM_OTP); - - return R_REG(&ptr[(oi->size / 2) + woff]); -} - -static u16 hndotp_read_bit(void *oh, chipcregs_t *cc, uint idx) -{ - uint k, row, col; - u32 otpp, st; - - row = idx / 65; - col = idx % 65; - - otpp = OTPP_START_BUSY | OTPP_READ | - ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) | (col & OTPP_COL_MASK); - - W_REG(&cc->otpprog, otpp); - st = R_REG(&cc->otpprog); - for (k = 0; - ((st & OTPP_START_BUSY) == OTPP_START_BUSY) && (k < OTPP_TRIES); - k++) - st = R_REG(&cc->otpprog); - - if (k >= OTPP_TRIES) { - return 0xffff; - } - if (st & OTPP_READERR) { - return 0xffff; - } - st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT; - return (u16) st; -} - -static void *hndotp_init(si_t *sih) -{ - uint idx; - chipcregs_t *cc; - otpinfo_t *oi; - u32 cap = 0, clkdiv, otpdiv = 0; - void *ret = NULL; - - oi = &otpinfo; - - idx = ai_coreidx(sih); - - /* Check for otp */ - cc = ai_setcoreidx(sih, SI_CC_IDX); - if (cc != NULL) { - cap = R_REG(&cc->capabilities); - if ((cap & CC_CAP_OTPSIZE) == 0) { - /* Nothing there */ - goto out; - } - - if (!((oi->ccrev == 12) || (oi->ccrev == 17) - || (oi->ccrev == 22))) - return NULL; - - /* Read the OTP byte size. chipcommon rev >= 18 has RCE so the size is - * 8 row (64 bytes) smaller - */ - oi->size = - 1 << (((cap & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT) - + CC_CAP_OTPSIZE_BASE); - if (oi->ccrev >= 18) - oi->size -= ((OTP_RC0_OFF - OTP_BOUNDARY_OFF) * 2); - - oi->hwprot = (int)(R_REG(&cc->otpstatus) & OTPS_PROTECT); - oi->boundary = -1; - - /* Check the region signature */ - if (hndotp_otproff(oi, cc, OTP_HWSIGN_OFF) == OTP_SIGNATURE) { - oi->signvalid |= OTP_HW_REGION; - oi->boundary = hndotp_otproff(oi, cc, OTP_BOUNDARY_OFF); - } - - if (hndotp_otproff(oi, cc, OTP_SWSIGN_OFF) == OTP_SIGNATURE) - oi->signvalid |= OTP_SW_REGION; - - if (hndotp_otproff(oi, cc, OTP_CIDSIGN_OFF) == OTP_SIGNATURE) - oi->signvalid |= OTP_CID_REGION; - - /* Set OTP clkdiv for stability */ - if (oi->ccrev == 22) - otpdiv = 12; - - if (otpdiv) { - clkdiv = R_REG(&cc->clkdiv); - clkdiv = - (clkdiv & ~CLKD_OTP) | (otpdiv << CLKD_OTP_SHIFT); - W_REG(&cc->clkdiv, clkdiv); - } - udelay(10); - - ret = (void *)oi; - } - - out: /* All done */ - ai_setcoreidx(sih, idx); - - return ret; -} - -static int hndotp_read_region(void *oh, int region, u16 *data, uint *wlen) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - u32 idx, st; - chipcregs_t *cc; - int i; - - - if (region != OTP_HW_REGION) { - /* - * Only support HW region - * (no active chips use HND OTP SW region) - * */ - return -ENOTSUPP; - } - - /* Region empty? */ - st = oi->hwprot | oi->signvalid; - if ((st & region) == 0) - return -ENODATA; - - *wlen = - ((int)*wlen < oi->boundary / 2) ? *wlen : (uint) oi->boundary / 2; - - idx = ai_coreidx(oi->sih); - cc = ai_setcoreidx(oi->sih, SI_CC_IDX); - - for (i = 0; i < (int)*wlen; i++) - data[i] = hndotp_otpr(oh, cc, i); - - ai_setcoreidx(oi->sih, idx); - - return 0; -} - -static int hndotp_nvread(void *oh, char *data, uint *len) -{ - int rc = 0; - otpinfo_t *oi = (otpinfo_t *) oh; - u32 base, bound, lim = 0, st; - int i, chunk, gchunks, tsz = 0; - u32 idx; - chipcregs_t *cc; - uint offset; - u16 *rawotp = NULL; - - /* save the orig core */ - idx = ai_coreidx(oi->sih); - cc = ai_setcoreidx(oi->sih, SI_CC_IDX); - - st = hndotp_status(oh); - if (!(st & (OTP_HW_REGION | OTP_SW_REGION))) { - rc = -1; - goto out; - } - - /* Read the whole otp so we can easily manipulate it */ - lim = hndotp_size(oh); - rawotp = kmalloc(lim, GFP_ATOMIC); - if (rawotp == NULL) { - rc = -2; - goto out; - } - for (i = 0; i < (int)(lim / 2); i++) - rawotp[i] = hndotp_otpr(oh, cc, i); - - if ((st & OTP_HW_REGION) == 0) { - /* This could be a programming failure in the first - * chunk followed by one or more good chunks - */ - for (i = 0; i < (int)(lim / 2); i++) - if (rawotp[i] == OTP_MAGIC) - break; - - if (i < (int)(lim / 2)) { - base = i; - bound = (i * 2) + rawotp[i + 1]; - } else { - rc = -3; - goto out; - } - } else { - bound = rawotp[(lim / 2) + OTP_BOUNDARY_OFF]; - - /* There are two cases: 1) The whole otp is used as nvram - * and 2) There is a hardware header followed by nvram. - */ - if (rawotp[0] == OTP_MAGIC) { - base = 0; - } else - base = bound; - } - - /* Find and copy the data */ - - chunk = 0; - gchunks = 0; - i = base / 2; - offset = 0; - while ((i < (int)(lim / 2)) && (rawotp[i] == OTP_MAGIC)) { - int dsz, rsz = rawotp[i + 1]; - - if (((i * 2) + rsz) >= (int)lim) { - /* Bad length, try to find another chunk anyway */ - rsz = 6; - } - if (crc_ccitt(CRC16_INIT_VALUE, (u8 *) &rawotp[i], rsz) == - CRC16_GOOD_VALUE) { - /* Good crc, copy the vars */ - gchunks++; - dsz = rsz - 6; - tsz += dsz; - if (offset + dsz >= *len) { - goto out; - } - memcpy(&data[offset], &rawotp[i + 2], dsz); - offset += dsz; - /* Remove extra null characters at the end */ - while (offset > 1 && - data[offset - 1] == 0 && data[offset - 2] == 0) - offset--; - i += rsz / 2; - } else { - /* bad length or crc didn't check, try to find the next set */ - if (rawotp[i + (rsz / 2)] == OTP_MAGIC) { - /* Assume length is good */ - i += rsz / 2; - } else { - while (++i < (int)(lim / 2)) - if (rawotp[i] == OTP_MAGIC) - break; - } - } - chunk++; - } - - *len = offset; - - out: - kfree(rawotp); - ai_setcoreidx(oi->sih, idx); - - return rc; -} - -static otp_fn_t hndotp_fn = { - (otp_size_t) hndotp_size, - (otp_read_bit_t) hndotp_read_bit, - - (otp_init_t) hndotp_init, - (otp_read_region_t) hndotp_read_region, - (otp_nvread_t) hndotp_nvread, - - (otp_status_t) hndotp_status -}; - -#endif /* BCMHNDOTP */ - -/* - * Common Code: Compiled for IPX / HND / AUTO - * otp_status() - * otp_size() - * otp_read_bit() - * otp_init() - * otp_read_region() - * otp_nvread() - */ - -int otp_status(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - - return oi->fn->status(oh); -} - -int otp_size(void *oh) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - - return oi->fn->size(oh); -} - -u16 otp_read_bit(void *oh, uint offset) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - uint idx = ai_coreidx(oi->sih); - chipcregs_t *cc = ai_setcoreidx(oi->sih, SI_CC_IDX); - u16 readBit = (u16) oi->fn->read_bit(oh, cc, offset); - ai_setcoreidx(oi->sih, idx); - return readBit; -} - -void *otp_init(si_t *sih) -{ - otpinfo_t *oi; - void *ret = NULL; - - oi = &otpinfo; - memset(oi, 0, sizeof(otpinfo_t)); - - oi->ccrev = sih->ccrev; - -#ifdef BCMIPXOTP - if (OTPTYPE_IPX(oi->ccrev)) - oi->fn = &ipxotp_fn; -#endif - -#ifdef BCMHNDOTP - if (OTPTYPE_HND(oi->ccrev)) - oi->fn = &hndotp_fn; -#endif - - if (oi->fn == NULL) { - return NULL; - } - - oi->sih = sih; - - ret = (oi->fn->init) (sih); - - return ret; -} - -int -otp_read_region(si_t *sih, int region, u16 *data, - uint *wlen) { - bool wasup = false; - void *oh; - int err = 0; - - wasup = ai_is_otp_powered(sih); - if (!wasup) - ai_otp_power(sih, true); - - if (!ai_is_otp_powered(sih) || ai_is_otp_disabled(sih)) { - err = -EPERM; - goto out; - } - - oh = otp_init(sih); - if (oh == NULL) { - err = -EBADE; - goto out; - } - - err = (((otpinfo_t *) oh)->fn->read_region) (oh, region, data, wlen); - - out: - if (!wasup) - ai_otp_power(sih, false); - - return err; -} - -int otp_nvread(void *oh, char *data, uint *len) -{ - otpinfo_t *oi = (otpinfo_t *) oh; - - return oi->fn->nvread(oh, data, len); -} diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c b/drivers/staging/brcm80211/brcmsmac/bcmsrom.c deleted file mode 100644 index bbfc6420436..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom.c +++ /dev/null @@ -1,714 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include <linux/kernel.h> -#include <linux/string.h> -#include <linux/etherdevice.h> -#include <bcmdefs.h> -#include <linux/module.h> -#include <linux/pci.h> -#include <stdarg.h> -#include <bcmutils.h> -#include <hndsoc.h> -#include <sbchipc.h> -#include <bcmdevs.h> -#include <pcicfg.h> -#include <aiutils.h> -#include <bcmsrom.h> -#include <bcmsrom_tbl.h> - -#include <bcmnvram.h> -#include <bcmotp.h> - -#define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \ - (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \ - ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \ - ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET)) - -#if defined(BCMDBG) -#define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */ -#define WRITE_WORD_DELAY 20 /* 20 ms between each word write */ -#endif - -typedef struct varbuf { - char *base; /* pointer to buffer base */ - char *buf; /* pointer to current position */ - unsigned int size; /* current (residual) size in bytes */ -} varbuf_t; -extern char *_vars; -extern uint _varsz; - -static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *count); -static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b); -static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count); -static int initvars_flash_si(si_t *sih, char **vars, uint *count); -static int sprom_read_pci(si_t *sih, u16 *sprom, - uint wordoff, u16 *buf, uint nwords, bool check_crc); -#if defined(BCMNVRAMR) -static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz); -#endif -static u16 srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd, - uint wordoff, u16 data); - -static int initvars_table(char *start, char *end, - char **vars, uint *count); -static int initvars_flash(si_t *sih, char **vp, - uint len); - -/* Initialization of varbuf structure */ -static void varbuf_init(varbuf_t *b, char *buf, uint size) -{ - b->size = size; - b->base = b->buf = buf; -} - -/* append a null terminated var=value string */ -static int varbuf_append(varbuf_t *b, const char *fmt, ...) -{ - va_list ap; - int r; - size_t len; - char *s; - - if (b->size < 2) - return 0; - - va_start(ap, fmt); - r = vsnprintf(b->buf, b->size, fmt, ap); - va_end(ap); - - /* C99 snprintf behavior returns r >= size on overflow, - * others return -1 on overflow. - * All return -1 on format error. - * We need to leave room for 2 null terminations, one for the current var - * string, and one for final null of the var table. So check that the - * strlen written, r, leaves room for 2 chars. - */ - if ((r == -1) || (r > (int)(b->size - 2))) { - b->size = 0; - return 0; - } - - /* Remove any earlier occurrence of the same variable */ - s = strchr(b->buf, '='); - if (s != NULL) { - len = (size_t) (s - b->buf); - for (s = b->base; s < b->buf;) { - if ((memcmp(s, b->buf, len) == 0) && s[len] == '=') { - len = strlen(s) + 1; - memmove(s, (s + len), - ((b->buf + r + 1) - (s + len))); - b->buf -= len; - b->size += (unsigned int)len; - break; - } - - while (*s++) - ; - } - } - - /* skip over this string's null termination */ - r++; - b->size -= r; - b->buf += r; - - return r; -} - -/* - * Initialize local vars from the right source for this platform. - * Return 0 on success, nonzero on error. - */ -int srom_var_init(si_t *sih, uint bustype, void *curmap, - char **vars, uint *count) -{ - uint len; - - len = 0; - - if (vars == NULL || count == NULL) - return 0; - - *vars = NULL; - *count = 0; - - switch (bustype) { - case SI_BUS: - case JTAG_BUS: - return initvars_srom_si(sih, curmap, vars, count); - - case PCI_BUS: - if (curmap == NULL) - return -1; - - return initvars_srom_pci(sih, curmap, vars, count); - - default: - break; - } - return -1; -} - -/* In chips with chipcommon rev 32 and later, the srom is in chipcommon, - * not in the bus cores. - */ -static u16 -srom_cc_cmd(si_t *sih, void *ccregs, u32 cmd, - uint wordoff, u16 data) -{ - chipcregs_t *cc = (chipcregs_t *) ccregs; - uint wait_cnt = 1000; - - if ((cmd == SRC_OP_READ) || (cmd == SRC_OP_WRITE)) { - W_REG(&cc->sromaddress, wordoff * 2); - if (cmd == SRC_OP_WRITE) - W_REG(&cc->sromdata, data); - } - - W_REG(&cc->sromcontrol, SRC_START | cmd); - - while (wait_cnt--) { - if ((R_REG(&cc->sromcontrol) & SRC_BUSY) == 0) - break; - } - - if (!wait_cnt) { - return 0xffff; - } - if (cmd == SRC_OP_READ) - return (u16) R_REG(&cc->sromdata); - else - return 0xffff; -} - -static inline void ltoh16_buf(u16 *buf, unsigned int size) -{ - for (size /= 2; size; size--) - *(buf + size) = le16_to_cpu(*(buf + size)); -} - -static inline void htol16_buf(u16 *buf, unsigned int size) -{ - for (size /= 2; size; size--) - *(buf + size) = cpu_to_le16(*(buf + size)); -} - -/* - * Read in and validate sprom. - * Return 0 on success, nonzero on error. - */ -static int -sprom_read_pci(si_t *sih, u16 *sprom, uint wordoff, - u16 *buf, uint nwords, bool check_crc) -{ - int err = 0; - uint i; - void *ccregs = NULL; - - /* read the sprom */ - for (i = 0; i < nwords; i++) { - - if (sih->ccrev > 31 && ISSIM_ENAB(sih)) { - /* use indirect since direct is too slow on QT */ - if ((sih->cccaps & CC_CAP_SROM) == 0) - return 1; - - ccregs = (void *)((u8 *) sprom - CC_SROM_OTP); - buf[i] = - srom_cc_cmd(sih, ccregs, SRC_OP_READ, - wordoff + i, 0); - - } else { - if (ISSIM_ENAB(sih)) - buf[i] = R_REG(&sprom[wordoff + i]); - - buf[i] = R_REG(&sprom[wordoff + i]); - } - - } - - /* bypass crc checking for simulation to allow srom hack */ - if (ISSIM_ENAB(sih)) - return err; - - if (check_crc) { - - if (buf[0] == 0xffff) { - /* The hardware thinks that an srom that starts with 0xffff - * is blank, regardless of the rest of the content, so declare - * it bad. - */ - return 1; - } - - /* fixup the endianness so crc8 will pass */ - htol16_buf(buf, nwords * 2); - if (bcm_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) != - CRC8_GOOD_VALUE) { - /* DBG only pci always read srom4 first, then srom8/9 */ - err = 1; - } - /* now correct the endianness of the byte array */ - ltoh16_buf(buf, nwords * 2); - } - return err; -} - -#if defined(BCMNVRAMR) -static int otp_read_pci(si_t *sih, u16 *buf, uint bufsz) -{ - u8 *otp; - uint sz = OTP_SZ_MAX / 2; /* size in words */ - int err = 0; - - otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC); - if (otp == NULL) { - return -EBADE; - } - - err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz); - - memcpy(buf, otp, bufsz); - - kfree(otp); - - /* Check CRC */ - if (buf[0] == 0xffff) { - /* The hardware thinks that an srom that starts with 0xffff - * is blank, regardless of the rest of the content, so declare - * it bad. - */ - return 1; - } - - /* fixup the endianness so crc8 will pass */ - htol16_buf(buf, bufsz); - if (bcm_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) != - CRC8_GOOD_VALUE) { - err = 1; - } - /* now correct the endianness of the byte array */ - ltoh16_buf(buf, bufsz); - - return err; -} -#endif /* defined(BCMNVRAMR) */ -/* -* Create variable table from memory. -* Return 0 on success, nonzero on error. -*/ -static int initvars_table(char *start, char *end, - char **vars, uint *count) -{ - int c = (int)(end - start); - - /* do it only when there is more than just the null string */ - if (c > 1) { - char *vp = kmalloc(c, GFP_ATOMIC); - if (!vp) - return -ENOMEM; - memcpy(vp, start, c); - *vars = vp; - *count = c; - } else { - *vars = NULL; - *count = 0; - } - - return 0; -} - -/* - * Find variables with <devpath> from flash. 'base' points to the beginning - * of the table upon enter and to the end of the table upon exit when success. - * Return 0 on success, nonzero on error. - */ -static int initvars_flash(si_t *sih, char **base, uint len) -{ - char *vp = *base; - char *flash; - int err; - char *s; - uint l, dl, copy_len; - char devpath[SI_DEVPATH_BUFSZ]; - - /* allocate memory and read in flash */ - flash = kmalloc(NVRAM_SPACE, GFP_ATOMIC); - if (!flash) - return -ENOMEM; - err = nvram_getall(flash, NVRAM_SPACE); - if (err) - goto exit; - - ai_devpath(sih, devpath, sizeof(devpath)); - - /* grab vars with the <devpath> prefix in name */ - dl = strlen(devpath); - for (s = flash; s && *s; s += l + 1) { - l = strlen(s); - - /* skip non-matching variable */ - if (strncmp(s, devpath, dl)) - continue; - - /* is there enough room to copy? */ - copy_len = l - dl + 1; - if (len < copy_len) { - err = -EOVERFLOW; - goto exit; - } - - /* no prefix, just the name=value */ - strncpy(vp, &s[dl], copy_len); - vp += copy_len; - len -= copy_len; - } - - /* add null string as terminator */ - if (len < 1) { - err = -EOVERFLOW; - goto exit; - } - *vp++ = '\0'; - - *base = vp; - - exit: kfree(flash); - return err; -} - -/* - * Initialize nonvolatile variable table from flash. - * Return 0 on success, nonzero on error. - */ -static int initvars_flash_si(si_t *sih, char **vars, uint *count) -{ - char *vp, *base; - int err; - - base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC); - if (!vp) - return -ENOMEM; - - err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS); - if (err == 0) - err = initvars_table(base, vp, vars, count); - - kfree(base); - - return err; -} - -/* Parse SROM and create name=value pairs. 'srom' points to - * the SROM word array. 'off' specifies the offset of the - * first word 'srom' points to, which should be either 0 or - * SROM3_SWRG_OFF (full SROM or software region). - */ - -static uint mask_shift(u16 mask) -{ - uint i; - for (i = 0; i < (sizeof(mask) << 3); i++) { - if (mask & (1 << i)) - return i; - } - return 0; -} - -static uint mask_width(u16 mask) -{ - int i; - for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) { - if (mask & (1 << i)) - return (uint) (i - mask_shift(mask) + 1); - } - return 0; -} - -static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, varbuf_t *b) -{ - u16 w; - u32 val; - const sromvar_t *srv; - uint width; - uint flags; - u32 sr = (1 << sromrev); - - varbuf_append(b, "sromrev=%d", sromrev); - - for (srv = pci_sromvars; srv->name != NULL; srv++) { - const char *name; - - if ((srv->revmask & sr) == 0) - continue; - - if (srv->off < off) - continue; - - flags = srv->flags; - name = srv->name; - - /* This entry is for mfgc only. Don't generate param for it, */ - if (flags & SRFL_NOVAR) - continue; - - if (flags & SRFL_ETHADDR) { - u8 ea[ETH_ALEN]; - - ea[0] = (srom[srv->off - off] >> 8) & 0xff; - ea[1] = srom[srv->off - off] & 0xff; - ea[2] = (srom[srv->off + 1 - off] >> 8) & 0xff; - ea[3] = srom[srv->off + 1 - off] & 0xff; - ea[4] = (srom[srv->off + 2 - off] >> 8) & 0xff; - ea[5] = srom[srv->off + 2 - off] & 0xff; - - varbuf_append(b, "%s=%pM", name, ea); - } else { - w = srom[srv->off - off]; - val = (w & srv->mask) >> mask_shift(srv->mask); - width = mask_width(srv->mask); - - while (srv->flags & SRFL_MORE) { - srv++; - if (srv->off == 0 || srv->off < off) - continue; - - w = srom[srv->off - off]; - val += - ((w & srv->mask) >> mask_shift(srv-> - mask)) << - width; - width += mask_width(srv->mask); - } - - if ((flags & SRFL_NOFFS) - && ((int)val == (1 << width) - 1)) - continue; - - if (flags & SRFL_CCODE) { - if (val == 0) - varbuf_append(b, "ccode="); - else - varbuf_append(b, "ccode=%c%c", - (val >> 8), (val & 0xff)); - } - /* LED Powersave duty cycle has to be scaled: - *(oncount >> 24) (offcount >> 8) - */ - else if (flags & SRFL_LEDDC) { - u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */ - (((val & 0xff)) << 8); /* offcount */ - varbuf_append(b, "leddc=%d", w32); - } else if (flags & SRFL_PRHEX) - varbuf_append(b, "%s=0x%x", name, val); - else if ((flags & SRFL_PRSIGN) - && (val & (1 << (width - 1)))) - varbuf_append(b, "%s=%d", name, - (int)(val | (~0 << width))); - else - varbuf_append(b, "%s=%u", name, val); - } - } - - if (sromrev >= 4) { - /* Do per-path variables */ - uint p, pb, psz; - - if (sromrev >= 8) { - pb = SROM8_PATH0; - psz = SROM8_PATH1 - SROM8_PATH0; - } else { - pb = SROM4_PATH0; - psz = SROM4_PATH1 - SROM4_PATH0; - } - - for (p = 0; p < MAX_PATH_SROM; p++) { - for (srv = perpath_pci_sromvars; srv->name != NULL; - srv++) { - if ((srv->revmask & sr) == 0) - continue; - - if (pb + srv->off < off) - continue; - - /* This entry is for mfgc only. Don't generate param for it, */ - if (srv->flags & SRFL_NOVAR) - continue; - - w = srom[pb + srv->off - off]; - val = (w & srv->mask) >> mask_shift(srv->mask); - width = mask_width(srv->mask); - - /* Cheating: no per-path var is more than 1 word */ - - if ((srv->flags & SRFL_NOFFS) - && ((int)val == (1 << width) - 1)) - continue; - - if (srv->flags & SRFL_PRHEX) - varbuf_append(b, "%s%d=0x%x", srv->name, - p, val); - else - varbuf_append(b, "%s%d=%d", srv->name, - p, val); - } - pb += psz; - } - } -} - -/* - * Initialize nonvolatile variable table from sprom. - * Return 0 on success, nonzero on error. - */ -static int initvars_srom_pci(si_t *sih, void *curmap, char **vars, uint *count) -{ - u16 *srom, *sromwindow; - u8 sromrev = 0; - u32 sr; - varbuf_t b; - char *vp, *base = NULL; - bool flash = false; - int err = 0; - - /* - * Apply CRC over SROM content regardless SROM is present or not, - * and use variable <devpath>sromrev's existence in flash to decide - * if we should return an error when CRC fails or read SROM variables - * from flash. - */ - srom = kmalloc(SROM_MAX, GFP_ATOMIC); - if (!srom) - return -2; - - sromwindow = (u16 *) SROM_OFFSET(sih); - if (ai_is_sprom_available(sih)) { - err = - sprom_read_pci(sih, sromwindow, 0, srom, SROM_WORDS, - true); - - if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) || - (((sih->buscoretype == PCIE_CORE_ID) - && (sih->buscorerev >= 6)) - || ((sih->buscoretype == PCI_CORE_ID) - && (sih->buscorerev >= 0xe)))) { - /* sromrev >= 4, read more */ - err = - sprom_read_pci(sih, sromwindow, 0, srom, - SROM4_WORDS, true); - sromrev = srom[SROM4_CRCREV] & 0xff; - } else if (err == 0) { - /* srom is good and is rev < 4 */ - /* top word of sprom contains version and crc8 */ - sromrev = srom[SROM_CRCREV] & 0xff; - /* bcm4401 sroms misprogrammed */ - if (sromrev == 0x10) - sromrev = 1; - } - } -#if defined(BCMNVRAMR) - /* Use OTP if SPROM not available */ - else { - err = otp_read_pci(sih, srom, SROM_MAX); - if (err == 0) - /* OTP only contain SROM rev8/rev9 for now */ - sromrev = srom[SROM4_CRCREV] & 0xff; - else - err = 1; - } -#else - else - err = 1; -#endif - - /* - * We want internal/wltest driver to come up with default - * sromvars so we can program a blank SPROM/OTP. - */ - if (err) { - char *value; - u32 val; - val = 0; - - value = ai_getdevpathvar(sih, "sromrev"); - if (value) { - sromrev = (u8) simple_strtoul(value, NULL, 0); - flash = true; - goto varscont; - } - - value = ai_getnvramflvar(sih, "sromrev"); - if (value) { - err = 0; - goto errout; - } - - { - err = -1; - goto errout; - } - } - - varscont: - /* Bitmask for the sromrev */ - sr = 1 << sromrev; - - /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */ - if ((sr & 0x33e) == 0) { - err = -2; - goto errout; - } - - base = vp = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC); - if (!vp) { - err = -2; - goto errout; - } - - /* read variables from flash */ - if (flash) { - err = initvars_flash(sih, &vp, MAXSZ_NVRAM_VARS); - if (err) - goto errout; - goto varsdone; - } - - varbuf_init(&b, base, MAXSZ_NVRAM_VARS); - - /* parse SROM into name=value pairs. */ - _initvars_srom_pci(sromrev, srom, 0, &b); - - /* final nullbyte terminator */ - vp = b.buf; - *vp++ = '\0'; - - varsdone: - err = initvars_table(base, vp, vars, count); - - errout: - if (base) - kfree(base); - - kfree(srom); - return err; -} - - -static int initvars_srom_si(si_t *sih, void *curmap, char **vars, uint *varsz) -{ - /* Search flash nvram section for srom variables */ - return initvars_flash_si(sih, vars, varsz); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c b/drivers/staging/brcm80211/brcmsmac/bmac.c index 45349261061..b25c5170556 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.c +++ b/drivers/staging/brcm80211/brcmsmac/bmac.c @@ -13,49 +13,20 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ - - -#include <linux/kernel.h> -#include <linux/module.h> #include <linux/pci.h> -#include <linux/netdevice.h> -#include <linux/etherdevice.h> +#include <net/mac80211.h> -#include <proto/802.11.h> -#include <bcmdefs.h> -#include <bcmdevs.h> -#include <bcmwifi.h> +#include <brcm_hw_ids.h> #include <aiutils.h> -#include <bcmsrom.h> -#include <bcmotp.h> -#include <bcmutils.h> -#include <bcmnvram.h> -#include <wlioctl.h> -#include <sbconfig.h> -#include <sbchipc.h> -#include <pcicfg.h> -#include <sbhnddma.h> -#include <hnddma.h> - -#include "wlc_types.h" -#include "wlc_pmu.h" -#include "d11.h" -#include "wlc_cfg.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "wlc_phy_shim.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wl_export.h" -#include "wl_ucode.h" -#include "wlc_antsel.h" -#include "pcie_core.h" -#include "wlc_alloc.h" -#include "wl_dbg.h" -#include "wlc_bmac.h" +#include <chipcommon.h> +#include "types.h" +#include "rate.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include "main.h" +#include "ucode_loader.h" +#include "mac80211_if.h" +#include "bmac.h" #define TIMER_INTERVAL_WATCHDOG_BMAC 1000 /* watchdog timer, in unit of ms */ @@ -67,7 +38,6 @@ #define SYNTHPU_DLY_PHY_US_QT 100 /* QT synthpu_dly time in us */ #ifndef BMAC_DUP_TO_REMOVE -#define WLC_RM_WAIT_TX_SUSPEND 4 /* Wait Tx Suspend */ #define ANTCNT 10 /* vanilla M_MAX_ANTCNT value */ @@ -78,6 +48,9 @@ (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmaxmt) : \ (void *)&(wlc_hw->regs->fifo64regs[fifonum].dmarcv)) +#define APHY_SLOT_TIME 9 +#define BPHY_SLOT_TIME 20 + /* * The following table lists the buffer memory allocated to xmt fifos in HW. * the size is in units of 256bytes(one block), total size is HW dependent @@ -97,82 +70,86 @@ static u16 xmtfifo_sz[][NFIFO] = { {9, 58, 22, 14, 14, 5}, /* corerev 24: 2304, 14848, 5632, 3584, 3584, 1280 */ }; -static void wlc_clkctl_clk(struct wlc_hw_info *wlc, uint mode); -static void wlc_coreinit(struct wlc_info *wlc); +static void brcms_b_clkctl_clk(struct brcms_hardware *wlc, uint mode); +static void brcms_b_coreinit(struct brcms_c_info *wlc); /* used by wlc_wakeucode_init() */ -static void wlc_write_inits(struct wlc_hw_info *wlc_hw, +static void brcms_c_write_inits(struct brcms_hardware *wlc_hw, const struct d11init *inits); -static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], +static void brcms_ucode_write(struct brcms_hardware *wlc_hw, const u32 ucode[], const uint nbytes); -static void wlc_ucode_download(struct wlc_hw_info *wlc); -static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw); - -/* used by wlc_dpc() */ -static bool wlc_bmac_dotxstatus(struct wlc_hw_info *wlc, tx_status_t *txs, - u32 s2); -static bool wlc_bmac_txstatus(struct wlc_hw_info *wlc, bool bound, bool *fatal); -static bool wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound); - -/* used by wlc_down() */ -static void wlc_flushqueues(struct wlc_info *wlc); - -static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs); -static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw); -static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw); -static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, +static void brcms_ucode_download(struct brcms_hardware *wlc); +static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw); + +/* used by brcms_c_dpc() */ +static bool brcms_b_dotxstatus(struct brcms_hardware *wlc, + struct tx_status *txs, u32 s2); +static bool brcms_b_txstatus(struct brcms_hardware *wlc, bool bound, + bool *fatal); +static bool brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound); + +/* used by brcms_c_down() */ +static void brcms_c_flushqueues(struct brcms_c_info *wlc); + +static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs); +static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw); +static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw); +static bool brcms_b_tx_fifo_suspended(struct brcms_hardware *wlc_hw, uint tx_fifo); -static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo); -static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo); +static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw, + uint tx_fifo); +static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw, + uint tx_fifo); /* Low Level Prototypes */ -static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want); -static u16 wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, +static int brcms_b_bandtype(struct brcms_hardware *wlc_hw); +static void brcms_b_info_init(struct brcms_hardware *wlc_hw); +static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want); +static u16 brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel); -static void wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, +static void brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v, u32 sel); -static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk); -static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme); -static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw); -static void wlc_ucode_bsinit(struct wlc_hw_info *wlc_hw); -static bool wlc_validboardtype(struct wlc_hw_info *wlc); -static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw); -static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw); -static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw); -static void wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init); -static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw); -static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool want, mbool flags); -static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw); -static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw); -static u32 wlc_wlintrsoff(struct wlc_info *wlc); -static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask); -static void wlc_gpio_init(struct wlc_info *wlc); -static void wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, - int len); -static void wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, - int len); -static void wlc_bmac_bsinit(struct wlc_info *wlc, chanspec_t chanspec); -static u32 wlc_setband_inact(struct wlc_info *wlc, uint bandunit); -static void wlc_bmac_setband(struct wlc_hw_info *wlc_hw, uint bandunit, +static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk); +static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme); +static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw); +static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw); +static bool brcms_c_validboardtype(struct brcms_hardware *wlc); +static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw); +static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw); +static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw); +static void brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init); +static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw); +static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool want, + mbool flags); +static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw); +static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw); +static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc); +static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask); +static void brcms_c_gpio_init(struct brcms_c_info *wlc); +static void brcms_c_write_hw_bcntemplate0(struct brcms_hardware *wlc_hw, + void *bcn, int len); +static void brcms_c_write_hw_bcntemplate1(struct brcms_hardware *wlc_hw, + void *bcn, int len); +static void brcms_b_bsinit(struct brcms_c_info *wlc, chanspec_t chanspec); +static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, uint bandunit); +static void brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit, chanspec_t chanspec); -static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, +static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw, bool shortslot); -static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw); -static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, +static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw); +static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw, u8 rate); /* === Low Level functions === */ -void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot) +void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, bool shortslot) { wlc_hw->shortslot = shortslot; - if (BAND_2G(wlc_bmac_bandtype(wlc_hw)) && wlc_hw->up) { - wlc_suspend_mac_and_wait(wlc_hw->wlc); - wlc_bmac_update_slot_timing(wlc_hw, shortslot); - wlc_enable_mac(wlc_hw->wlc); + if (BAND_2G(brcms_b_bandtype(wlc_hw)) && wlc_hw->up) { + brcms_c_suspend_mac_and_wait(wlc_hw->wlc); + brcms_b_update_slot_timing(wlc_hw, shortslot); + brcms_c_enable_mac(wlc_hw->wlc); } } @@ -181,7 +158,7 @@ void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot) * or shortslot 11g (9us slots) * The PSM needs to be suspended for this call. */ -static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, +static void brcms_b_update_slot_timing(struct brcms_hardware *wlc_hw, bool shortslot) { d11regs_t *regs; @@ -191,25 +168,25 @@ static void wlc_bmac_update_slot_timing(struct wlc_hw_info *wlc_hw, if (shortslot) { /* 11g short slot: 11a timing */ W_REG(®s->ifs_slot, 0x0207); /* APHY_SLOT_TIME */ - wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME); + brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, APHY_SLOT_TIME); } else { /* 11g long slot: 11b timing */ W_REG(®s->ifs_slot, 0x0212); /* BPHY_SLOT_TIME */ - wlc_bmac_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME); + brcms_b_write_shm(wlc_hw, M_DOT11_SLOT, BPHY_SLOT_TIME); } } -static void WLBANDINITFN(wlc_ucode_bsinit) (struct wlc_hw_info *wlc_hw) +static void brcms_c_ucode_bsinit(struct brcms_hardware *wlc_hw) { struct wiphy *wiphy = wlc_hw->wlc->wiphy; /* init microcode host flags */ - wlc_write_mhf(wlc_hw, wlc_hw->band->mhfs); + brcms_c_write_mhf(wlc_hw, wlc_hw->band->mhfs); /* do band-specific ucode IHR, SHM, and SCR inits */ if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11n0bsinitvals16); + if (BRCMS_ISNPHY(wlc_hw->band)) { + brcms_c_write_inits(wlc_hw, d11n0bsinitvals16); } else { wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" " %d\n", __func__, wlc_hw->unit, @@ -217,8 +194,9 @@ static void WLBANDINITFN(wlc_ucode_bsinit) (struct wlc_hw_info *wlc_hw) } } else { if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11lcn0bsinitvals24); + if (BRCMS_ISLCNPHY(wlc_hw->band)) { + brcms_c_write_inits(wlc_hw, + d11lcn0bsinitvals24); } else wiphy_err(wiphy, "%s: wl%d: unsupported phy in" " core rev %d\n", __func__, @@ -231,9 +209,10 @@ static void WLBANDINITFN(wlc_ucode_bsinit) (struct wlc_hw_info *wlc_hw) } /* switch to new band but leave it inactive */ -static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) +static u32 brcms_c_setband_inact(struct brcms_c_info *wlc, + uint bandunit) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; u32 macintmask; BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); @@ -241,14 +220,14 @@ static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); /* disable interrupts */ - macintmask = wl_intrsoff(wlc->wl); + macintmask = brcms_intrsoff(wlc->wl); /* radio off */ wlc_phy_switch_radio(wlc_hw->band->pi, OFF); - wlc_bmac_core_phy_clk(wlc_hw, OFF); + brcms_b_core_phy_clk(wlc_hw, OFF); - wlc_setxband(wlc_hw, bandunit); + brcms_c_setxband(wlc_hw, bandunit); return macintmask; } @@ -259,14 +238,14 @@ static u32 WLBANDINITFN(wlc_setband_inact) (struct wlc_info *wlc, uint bandunit) * Param 'bound' indicates max. # frames to process before break out. */ static bool -wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound) +brcms_b_recv(struct brcms_hardware *wlc_hw, uint fifo, bool bound) { struct sk_buff *p; struct sk_buff *head = NULL; struct sk_buff *tail = NULL; uint n = 0; uint bound_limit = bound ? wlc_hw->wlc->pub->tunables->rxbnd : -1; - wlc_d11rxhdr_t *wlc_rxhdr = NULL; + struct brcms_d11rxhdr *wlc_rxhdr = NULL; BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); /* gather received frames */ @@ -292,12 +271,12 @@ wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound) head = head->prev; p->prev = NULL; - wlc_rxhdr = (wlc_d11rxhdr_t *) p->data; + wlc_rxhdr = (struct brcms_d11rxhdr *) p->data; /* compute the RSSI from d11rxhdr and record it in wlc_rxd11hr */ wlc_phy_rssi_compute(wlc_hw->band->pi, wlc_rxhdr); - wlc_recv(wlc_hw->wlc, p); + brcms_c_recv(wlc_hw->wlc, p); } return n >= bound_limit; @@ -307,10 +286,10 @@ wlc_bmac_recv(struct wlc_hw_info *wlc_hw, uint fifo, bool bound) * Return true if another dpc needs to be re-scheduled. false otherwise. * Param 'bounded' indicates if applicable loops should be bounded. */ -bool wlc_dpc(struct wlc_info *wlc, bool bounded) +bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded) { u32 macintstatus; - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; d11regs_t *regs = wlc_hw->regs; bool fatal = false; struct wiphy *wiphy = wlc->wiphy; @@ -318,7 +297,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) if (DEVICEREMOVED(wlc)) { wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return false; } @@ -333,18 +312,14 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) /* BCN template is available */ /* ZZZ: Use AP_ACTIVE ? */ - if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub) || wlc->aps_associated) + if (AP_ENAB(wlc->pub) && (!APSTA_ENAB(wlc->pub)) && (macintstatus & MI_BCNTPL)) { - wlc_update_beacon(wlc); - } - - /* PMQ entry addition */ - if (macintstatus & MI_PMQ) { + brcms_c_update_beacon(wlc); } /* tx status */ if (macintstatus & MI_TFS) { - if (wlc_bmac_txstatus(wlc->hw, bounded, &fatal)) + if (brcms_b_txstatus(wlc->hw, bounded, &fatal)) wlc->macintstatus |= MI_TFS; if (fatal) { wiphy_err(wiphy, "MI_TFS: fatal\n"); @@ -353,7 +328,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) } if (macintstatus & (MI_TBTT | MI_DTIM_TBTT)) - wlc_tbtt(wlc, regs); + brcms_c_tbtt(wlc); /* ATIM window end */ if (macintstatus & MI_ATIMWINEND) { @@ -363,18 +338,13 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) } /* received data or control frame, MI_DMAINT is indication of RX_FIFO interrupt */ - if (macintstatus & MI_DMAINT) { - if (wlc_bmac_recv(wlc_hw, RX_FIFO, bounded)) { + if (macintstatus & MI_DMAINT) + if (brcms_b_recv(wlc_hw, RX_FIFO, bounded)) wlc->macintstatus |= MI_DMAINT; - } - } /* TX FIFO suspend/flush completion */ - if (macintstatus & MI_TXSTOP) { - if (wlc_bmac_tx_fifo_suspended(wlc_hw, TX_DATA_FIFO)) { - /* wiphy_err(wiphy, "dpc: fifo_suspend_comlete\n"); */ - } - } + if (macintstatus & MI_TXSTOP) + brcms_b_tx_fifo_suspended(wlc_hw, TX_DATA_FIFO); /* noise sample collected */ if (macintstatus & MI_BG_NOISE) { @@ -389,7 +359,7 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) __func__, wlc_hw->sih->chip, wlc_hw->sih->chiprev); /* big hammer */ - wl_init(wlc->wl); + brcms_init(wlc->wl); } /* gptimer timeout */ @@ -400,26 +370,26 @@ bool wlc_dpc(struct wlc_info *wlc, bool bounded) if (macintstatus & MI_RFDISABLE) { BCMMSG(wlc->wiphy, "wl%d: BMAC Detected a change on the" " RF Disable Input\n", wlc_hw->unit); - wl_rfkill_set_hw_state(wlc->wl); + brcms_rfkill_set_hw_state(wlc->wl); } /* send any enq'd tx packets. Just makes sure to jump start tx */ if (!pktq_empty(&wlc->pkt_queue->q)) - wlc_send_q(wlc); + brcms_c_send_q(wlc); /* it isn't done and needs to be resched if macintstatus is non-zero */ return wlc->macintstatus != 0; fatal: - wl_init(wlc->wl); + brcms_init(wlc->wl); return wlc->macintstatus != 0; } /* common low-level watchdog code */ -void wlc_bmac_watchdog(void *arg) +void brcms_b_watchdog(void *arg) { - struct wlc_info *wlc = (struct wlc_info *) arg; - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_c_info *wlc = (struct brcms_c_info *) arg; + struct brcms_hardware *wlc_hw = wlc->hw; BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); @@ -430,7 +400,7 @@ void wlc_bmac_watchdog(void *arg) wlc_hw->now++; /* Check for FIFO error interrupts */ - wlc_bmac_fifoerrors(wlc_hw); + brcms_b_fifoerrors(wlc_hw); /* make sure RX dma has buffers */ dma_rxfill(wlc->hw->di[RX_FIFO]); @@ -439,7 +409,7 @@ void wlc_bmac_watchdog(void *arg) } void -wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, +brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, chanspec_t chanspec, bool mute, struct txpwr_limits *txpwr) { uint bandunit; @@ -450,18 +420,18 @@ wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, /* Switch bands if necessary */ if (NBANDS_HW(wlc_hw) > 1) { - bandunit = CHSPEC_WLCBANDUNIT(chanspec); + bandunit = CHSPEC_BANDUNIT(chanspec); if (wlc_hw->band->bandunit != bandunit) { - /* wlc_bmac_setband disables other bandunit, + /* brcms_b_setband disables other bandunit, * use light band switch if not up yet */ if (wlc_hw->up) { wlc_phy_chanspec_radio_set(wlc_hw-> bandstate[bandunit]-> pi, chanspec); - wlc_bmac_setband(wlc_hw, bandunit, chanspec); + brcms_b_setband(wlc_hw, bandunit, chanspec); } else { - wlc_setxband(wlc_hw, bandunit); + brcms_c_setxband(wlc_hw, bandunit); } } } @@ -478,26 +448,27 @@ wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, wlc_phy_txpower_limit_set(wlc_hw->band->pi, txpwr, chanspec); /* Update muting of the channel */ - wlc_bmac_mute(wlc_hw, mute, 0); + brcms_b_mute(wlc_hw, mute, 0); } } -int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, wlc_bmac_state_t *state) +int brcms_b_state_get(struct brcms_hardware *wlc_hw, + struct brcms_b_state *state) { state->machwcap = wlc_hw->machwcap; return 0; } -static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) +static bool brcms_b_attach_dmapio(struct brcms_c_info *wlc, uint j, bool wme) { uint i; char name[8]; /* ucode host flag 2 needed for pio mode, independent of band and fifo */ u16 pio_mhf2 = 0; - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; uint unit = wlc_hw->unit; - wlc_tunables_t *tune = wlc->pub->tunables; + struct brcms_tunables *tune = wlc->pub->tunables; struct wiphy *wiphy = wlc->wiphy; /* name and offsets for dma_attach */ @@ -529,7 +500,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) NULL), DMAREG(wlc_hw, DMA_RX, 0), (wme ? tune->ntxd : 0), tune->nrxd, tune->rxbufsz, -1, tune->nrxbufpost, - WL_HWRXOFF, &wl_msg_level); + BRCMS_HWRXOFF, &brcm_msg_level); dma_attach_err |= (NULL == wlc_hw->di[0]); /* @@ -541,7 +512,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) wlc_hw->di[1] = dma_attach(name, wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 1), NULL, tune->ntxd, 0, 0, -1, 0, 0, - &wl_msg_level); + &brcm_msg_level); dma_attach_err |= (NULL == wlc_hw->di[1]); /* @@ -552,7 +523,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) wlc_hw->di[2] = dma_attach(name, wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 2), NULL, tune->ntxd, 0, 0, -1, 0, 0, - &wl_msg_level); + &brcm_msg_level); dma_attach_err |= (NULL == wlc_hw->di[2]); /* * FIFO 3 @@ -562,7 +533,7 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) wlc_hw->di[3] = dma_attach(name, wlc_hw->sih, DMAREG(wlc_hw, DMA_TX, 3), NULL, tune->ntxd, 0, 0, -1, - 0, 0, &wl_msg_level); + 0, 0, &brcm_msg_level); dma_attach_err |= (NULL == wlc_hw->di[3]); /* Cleaner to leave this as if with AP defined */ @@ -581,12 +552,12 @@ static bool wlc_bmac_attach_dmapio(struct wlc_info *wlc, uint j, bool wme) } /* initial ucode host flags */ - wlc_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); + brcms_c_mhfdef(wlc, wlc_hw->band->mhfs, pio_mhf2); return true; } -static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw) +static void brcms_b_detach_dmapio(struct brcms_hardware *wlc_hw) { uint j; @@ -604,17 +575,17 @@ static void wlc_bmac_detach_dmapio(struct wlc_hw_info *wlc_hw) * initialize software state for each core and band * put the whole chip in reset(driver down state), no clock */ -int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, +int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device, uint unit, bool piomode, void *regsva, uint bustype, void *btparam) { - struct wlc_hw_info *wlc_hw; + struct brcms_hardware *wlc_hw; d11regs_t *regs; char *macaddr = NULL; char *vars; uint err = 0; uint j; bool wme = false; - shared_phy_params_t sha_params; + struct shared_phy_params sha_params; struct wiphy *wiphy = wlc->wiphy; BCMMSG(wlc->wiphy, "wl%d: vendor 0x%x device 0x%x\n", unit, vendor, @@ -628,18 +599,18 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, wlc_hw->band = wlc_hw->bandstate[0]; wlc_hw->_piomode = piomode; - /* populate struct wlc_hw_info with default values */ - wlc_bmac_info_init(wlc_hw); + /* populate struct brcms_hardware with default values */ + brcms_b_info_init(wlc_hw); /* * Do the hardware portion of the attach. * Also initialize software state that depends on the particular hardware * we are running. */ - wlc_hw->sih = ai_attach((uint) device, regsva, bustype, btparam, + wlc_hw->sih = ai_attach(regsva, bustype, btparam, &wlc_hw->vars, &wlc_hw->vars_size); if (wlc_hw->sih == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: si_attach failed\n", + wiphy_err(wiphy, "wl%d: brcms_b_attach: si_attach failed\n", unit); err = 11; goto fail; @@ -674,8 +645,8 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, } /* verify again the device is supported */ - if (!wlc_chipmatch(vendor, device)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported " + if (!brcms_c_chipmatch(vendor, device)) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported " "vendor/device (0x%x/0x%x)\n", unit, vendor, device); err = 12; @@ -695,7 +666,7 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, wlc->regs = wlc_hw->regs; /* validate chip, chiprev and corerev */ - if (!wlc_isgoodchip(wlc_hw)) { + if (!brcms_c_isgoodchip(wlc_hw)) { err = 13; goto fail; } @@ -708,11 +679,11 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, * For PMU chips, the first wlc_clkctl_clk is no-op since core-clk is still false; * But it will be called again inside wlc_corereset, after d11 is out of reset. */ - wlc_clkctl_clk(wlc_hw, CLK_FAST); - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); - if (!wlc_bmac_validate_chip_access(wlc_hw)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: validate_chip_access " + if (!brcms_b_validate_chip_access(wlc_hw)) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: validate_chip_access " "failed\n", unit); err = 14; goto fail; @@ -724,8 +695,8 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, if (j == BOARDREV_PROMOTABLE) j = BOARDREV_PROMOTED; wlc_hw->boardrev = (u16) j; - if (!wlc_validboardtype(wlc_hw)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: Unsupported Broadcom " + if (!brcms_c_validboardtype(wlc_hw)) { + wiphy_err(wiphy, "wl%d: brcms_b_attach: Unsupported Broadcom " "board type (0x%x)" " or revision level (0x%x)\n", unit, wlc_hw->sih->boardtype, wlc_hw->boardrev); err = 15; @@ -736,14 +707,15 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, wlc_hw->boardflags2 = (u32) getintvar(vars, "boardflags2"); if (wlc_hw->boardflags & BFL_NOPLLDOWN) - wlc_bmac_pllreq(wlc_hw, true, WLC_PLLREQ_SHARED); + brcms_b_pllreq(wlc_hw, true, BRCMS_PLLREQ_SHARED); if ((wlc_hw->sih->bustype == PCI_BUS) && (ai_pci_war16165(wlc_hw->sih))) wlc->war16165 = true; /* check device id(srom, nvram etc.) to set bands */ - if (wlc_hw->deviceid == BCM43224_D11N_ID) { + if (wlc_hw->deviceid == BCM43224_D11N_ID || + wlc_hw->deviceid == BCM43224_D11N_ID_VEN1) { /* Dualband boards */ wlc_hw->_nbands = 2; } else @@ -752,8 +724,8 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, if ((wlc_hw->sih->chip == BCM43225_CHIP_ID)) wlc_hw->_nbands = 1; - /* BMAC_NOTE: remove init of pub values when wlc_attach() unconditionally does the - * init of these values + /* BMAC_NOTE: remove init of pub values when brcms_c_attach() + * unconditionally does the init of these values */ wlc->vendorid = wlc_hw->vendorid; wlc->deviceid = wlc_hw->deviceid; @@ -768,7 +740,7 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, wlc_hw->physhim = wlc_phy_shim_attach(wlc_hw, wlc->wl, wlc); if (wlc_hw->physhim == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_shim_attach " + wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_shim_attach " "failed\n", unit); err = 25; goto fail; @@ -812,12 +784,12 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, if (IS_SINGLEBAND_5G(wlc_hw->deviceid)) j = BAND_5G_INDEX; - wlc_setxband(wlc_hw, j); + brcms_c_setxband(wlc_hw, j); wlc_hw->band->bandunit = j; - wlc_hw->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; + wlc_hw->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G; wlc->band->bandunit = j; - wlc->band->bandtype = j ? WLC_BAND_5G : WLC_BAND_2G; + wlc->band->bandtype = j ? BRCM_BAND_5G : BRCM_BAND_2G; wlc->core->coreidx = ai_coreidx(wlc_hw->sih); wlc_hw->machwcap = R_REG(®s->machwcap); @@ -829,10 +801,10 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, /* Get a phy for this band */ wlc_hw->band->pi = wlc_phy_attach(wlc_hw->phy_sh, - (void *)regs, wlc_bmac_bandtype(wlc_hw), vars, + (void *)regs, brcms_b_bandtype(wlc_hw), vars, wlc->wiphy); if (wlc_hw->band->pi == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: wlc_phy_" + wiphy_err(wiphy, "wl%d: brcms_b_attach: wlc_phy_" "attach failed\n", unit); err = 17; goto fail; @@ -851,19 +823,19 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, wlc_phy_get_coreflags(wlc_hw->band->pi); /* verify good phy_type & supported phy revision */ - if (WLCISNPHY(wlc_hw->band)) { + if (BRCMS_ISNPHY(wlc_hw->band)) { if (NCONF_HAS(wlc_hw->band->phyrev)) goto good_phy; else goto bad_phy; - } else if (WLCISLCNPHY(wlc_hw->band)) { + } else if (BRCMS_ISLCNPHY(wlc_hw->band)) { if (LCNCONF_HAS(wlc_hw->band->phyrev)) goto good_phy; else goto bad_phy; } else { bad_phy: - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: unsupported " + wiphy_err(wiphy, "wl%d: brcms_b_attach: unsupported " "phy type/rev (%d/%d)\n", unit, wlc_hw->band->phytype, wlc_hw->band->phyrev); err = 18; @@ -887,25 +859,25 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, wlc_hw->band->CWmin = APHY_CWMIN; wlc_hw->band->CWmax = PHY_CWMAX; - if (!wlc_bmac_attach_dmapio(wlc, j, wme)) { + if (!brcms_b_attach_dmapio(wlc, j, wme)) { err = 19; goto fail; } } /* disable core to match driver "down" state */ - wlc_coredisable(wlc_hw); + brcms_c_coredisable(wlc_hw); /* Match driver "down" state */ if (wlc_hw->sih->bustype == PCI_BUS) ai_pci_down(wlc_hw->sih); /* register sb interrupt callback functions */ - ai_register_intr_callback(wlc_hw->sih, (void *)wlc_wlintrsoff, - (void *)wlc_wlintrsrestore, NULL, wlc); + ai_register_intr_callback(wlc_hw->sih, (void *)brcms_c_wlintrsoff, + (void *)brcms_c_wlintrsrestore, NULL, wlc); /* turn off pll and xtal to match driver "down" state */ - wlc_bmac_xtal(wlc_hw, OFF); + brcms_b_xtal(wlc_hw, OFF); /* ********************************************************************* * The hardware is in the DOWN state at this point. D11 core @@ -918,17 +890,17 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, */ /* init etheraddr state variables */ - macaddr = wlc_get_macaddr(wlc_hw); + macaddr = brcms_c_get_macaddr(wlc_hw); if (macaddr == NULL) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: macaddr not found\n", + wiphy_err(wiphy, "wl%d: brcms_b_attach: macaddr not found\n", unit); err = 21; goto fail; } - bcm_ether_atoe(macaddr, wlc_hw->etheraddr); + brcmu_ether_atoe(macaddr, wlc_hw->etheraddr); if (is_broadcast_ether_addr(wlc_hw->etheraddr) || is_zero_ether_addr(wlc_hw->etheraddr)) { - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: bad macaddr %s\n", + wiphy_err(wiphy, "wl%d: brcms_b_attach: bad macaddr %s\n", unit, macaddr); err = 22; goto fail; @@ -942,19 +914,19 @@ int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, uint unit, return err; fail: - wiphy_err(wiphy, "wl%d: wlc_bmac_attach: failed with err %d\n", unit, + wiphy_err(wiphy, "wl%d: brcms_b_attach: failed with err %d\n", unit, err); return err; } /* - * Initialize wlc_info default values ... + * Initialize brcms_c_info default values ... * may get overrides later in this function * BMAC_NOTES, move low out and resolve the dangling ones */ -static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw) +static void brcms_b_info_init(struct brcms_hardware *wlc_hw) { - struct wlc_info *wlc = wlc_hw->wlc; + struct brcms_c_info *wlc = wlc_hw->wlc; /* set default sw macintmask value */ wlc->defmacintmask = DEF_MACINTMASK; @@ -974,11 +946,11 @@ static void wlc_bmac_info_init(struct wlc_hw_info *wlc_hw) /* * low level detach */ -int wlc_bmac_detach(struct wlc_info *wlc) +int brcms_b_detach(struct brcms_c_info *wlc) { uint i; - struct wlc_hwband *band; - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hw_band *band; + struct brcms_hardware *wlc_hw = wlc->hw; int callbacks; callbacks = 0; @@ -993,7 +965,7 @@ int wlc_bmac_detach(struct wlc_info *wlc) ai_pci_sleep(wlc_hw->sih); } - wlc_bmac_detach_dmapio(wlc_hw); + brcms_b_detach_dmapio(wlc_hw); band = wlc_hw->band; for (i = 0; i < NBANDS_HW(wlc_hw); i++) { @@ -1006,7 +978,7 @@ int wlc_bmac_detach(struct wlc_info *wlc) } /* Free shared phy state */ - wlc_phy_shared_detach(wlc_hw->phy_sh); + kfree(wlc_hw->phy_sh); wlc_phy_shim_detach(wlc_hw->physhim); @@ -1023,61 +995,61 @@ int wlc_bmac_detach(struct wlc_info *wlc) } -void wlc_bmac_reset(struct wlc_hw_info *wlc_hw) +void brcms_b_reset(struct brcms_hardware *wlc_hw) { BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); /* reset the core */ if (!DEVICEREMOVED(wlc_hw->wlc)) - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); /* purge the dma rings */ - wlc_flushqueues(wlc_hw->wlc); + brcms_c_flushqueues(wlc_hw->wlc); - wlc_reset_bmac_done(wlc_hw->wlc); + brcms_c_reset_bmac_done(wlc_hw->wlc); } void -wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, +brcms_b_init(struct brcms_hardware *wlc_hw, chanspec_t chanspec, bool mute) { u32 macintmask; bool fastclk; - struct wlc_info *wlc = wlc_hw->wlc; + struct brcms_c_info *wlc = wlc_hw->wlc; BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); /* request FAST clock if not on */ fastclk = wlc_hw->forcefastclk; if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); /* disable interrupts */ - macintmask = wl_intrsoff(wlc->wl); + macintmask = brcms_intrsoff(wlc->wl); /* set up the specified band and chanspec */ - wlc_setxband(wlc_hw, CHSPEC_WLCBANDUNIT(chanspec)); + brcms_c_setxband(wlc_hw, CHSPEC_BANDUNIT(chanspec)); wlc_phy_chanspec_radio_set(wlc_hw->band->pi, chanspec); /* do one-time phy inits and calibration */ wlc_phy_cal_init(wlc_hw->band->pi); /* core-specific initialization */ - wlc_coreinit(wlc); + brcms_b_coreinit(wlc); /* suspend the tx fifos and mute the phy for preism cac time */ if (mute) - wlc_bmac_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM); + brcms_b_mute(wlc_hw, ON, PHY_MUTE_FOR_PREISM); /* band-specific inits */ - wlc_bmac_bsinit(wlc, chanspec); + brcms_b_bsinit(wlc, chanspec); /* restore macintmask */ - wl_intrsrestore(wlc->wl, macintmask); + brcms_intrsrestore(wlc->wl, macintmask); - /* seed wake_override with WLC_WAKE_OVERRIDE_MACSUSPEND since the mac is suspended - * and wlc_enable_mac() will clear this override bit. + /* seed wake_override with BRCMS_WAKE_OVERRIDE_MACSUSPEND since the mac + * is suspended and brcms_c_enable_mac() will clear this override bit. */ - mboolset(wlc_hw->wake_override, WLC_WAKE_OVERRIDE_MACSUSPEND); + mboolset(wlc_hw->wake_override, BRCMS_WAKE_OVERRIDE_MACSUSPEND); /* * initialize mac_suspend_depth to 1 to match ucode initial suspended state @@ -1086,10 +1058,10 @@ wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, /* restore the clk */ if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); + brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); } -int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw) +int brcms_b_up_prep(struct brcms_hardware *wlc_hw) { uint coremask; @@ -1097,14 +1069,14 @@ int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw) /* * Enable pll and xtal, initialize the power control registers, - * and force fastclock for the remainder of wlc_up(). + * and force fastclock for the remainder of brcms_c_up(). */ - wlc_bmac_xtal(wlc_hw, ON); + brcms_b_xtal(wlc_hw, ON); ai_clkctl_init(wlc_hw->sih); - wlc_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); /* - * Configure pci/pcmcia here instead of in wlc_attach() + * Configure pci/pcmcia here instead of in brcms_c_attach() * to allow mfg hotswap: down, hotswap (chip power cycle), up. */ coremask = (1 << wlc_hw->wlc->core->coreidx); @@ -1116,11 +1088,11 @@ int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw) * Need to read the hwradio status here to cover the case where the system * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. */ - if (wlc_bmac_radio_read_hwdisabled(wlc_hw)) { + if (brcms_b_radio_read_hwdisabled(wlc_hw)) { /* put SB PCI in down state again */ if (wlc_hw->sih->bustype == PCI_BUS) ai_pci_down(wlc_hw->sih); - wlc_bmac_xtal(wlc_hw, OFF); + brcms_b_xtal(wlc_hw, OFF); return -ENOMEDIUM; } @@ -1128,12 +1100,12 @@ int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw) ai_pci_up(wlc_hw->sih); /* reset the d11 core */ - wlc_bmac_corereset(wlc_hw, WLC_USE_COREFLAGS); + brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); return 0; } -int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw) +int brcms_b_up_finish(struct brcms_hardware *wlc_hw) { BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); @@ -1141,12 +1113,12 @@ int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw) wlc_phy_hw_state_upd(wlc_hw->band->pi, true); /* FULLY enable dynamic power control and d11 core interrupt */ - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); - wl_intrson(wlc_hw->wlc->wl); + brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); + brcms_intrson(wlc_hw->wlc->wl); return 0; } -int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw) +int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw) { bool dev_gone; uint callbacks = 0; @@ -1163,10 +1135,10 @@ int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw) wlc_hw->wlc->macintmask = 0; else { /* now disable interrupts */ - wl_intrsoff(wlc_hw->wlc->wl); + brcms_intrsoff(wlc_hw->wlc->wl); /* ensure we're running on the pll clock again */ - wlc_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); } /* down phy at the last of this stage */ callbacks += wlc_phy_down(wlc_hw->band->pi); @@ -1174,7 +1146,7 @@ int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw) return callbacks; } -int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw) +int brcms_b_down_finish(struct brcms_hardware *wlc_hw) { uint callbacks = 0; bool dev_gone; @@ -1195,51 +1167,51 @@ int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw) wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, false); /* reclaim any posted packets */ - wlc_flushqueues(wlc_hw->wlc); + brcms_c_flushqueues(wlc_hw->wlc); } else { /* Reset and disable the core */ if (ai_iscoreup(wlc_hw->sih)) { if (R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) - wlc_suspend_mac_and_wait(wlc_hw->wlc); - callbacks += wl_reset(wlc_hw->wlc->wl); - wlc_coredisable(wlc_hw); + brcms_c_suspend_mac_and_wait(wlc_hw->wlc); + callbacks += brcms_reset(wlc_hw->wlc->wl); + brcms_c_coredisable(wlc_hw); } /* turn off primary xtal and pll */ if (!wlc_hw->noreset) { if (wlc_hw->sih->bustype == PCI_BUS) ai_pci_down(wlc_hw->sih); - wlc_bmac_xtal(wlc_hw, OFF); + brcms_b_xtal(wlc_hw, OFF); } } return callbacks; } -void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw) +void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw) { /* delay before first read of ucode state */ udelay(40); /* wait until ucode is no longer asleep */ - SPINWAIT((wlc_bmac_read_shm(wlc_hw, M_UCODE_DBGST) == + SPINWAIT((brcms_b_read_shm(wlc_hw, M_UCODE_DBGST) == DBGST_ASLEEP), wlc_hw->wlc->fastpwrup_dly); } -void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, u8 *ea) +void brcms_b_hw_etheraddr(struct brcms_hardware *wlc_hw, u8 *ea) { memcpy(ea, wlc_hw->etheraddr, ETH_ALEN); } -static int wlc_bmac_bandtype(struct wlc_hw_info *wlc_hw) +static int brcms_b_bandtype(struct brcms_hardware *wlc_hw) { return wlc_hw->band->bandtype; } /* control chip clock to save power, enable dynamic clock or force fast clock */ -static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode) +static void brcms_b_clkctl_clk(struct brcms_hardware *wlc_hw, uint mode) { if (PMUCTL_ENAB(wlc_hw->sih)) { /* new chips with PMU, CCS_FORCEHT will distribute the HT clock on backplane, @@ -1301,18 +1273,18 @@ static void wlc_clkctl_clk(struct wlc_hw_info *wlc_hw, uint mode) */ if (wlc_hw->forcefastclk) mboolset(wlc_hw->wake_override, - WLC_WAKE_OVERRIDE_FORCEFAST); + BRCMS_WAKE_OVERRIDE_FORCEFAST); else mboolclr(wlc_hw->wake_override, - WLC_WAKE_OVERRIDE_FORCEFAST); + BRCMS_WAKE_OVERRIDE_FORCEFAST); } } /* set initial host flags value */ static void -wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init) +brcms_c_mhfdef(struct brcms_c_info *wlc, u16 *mhfs, u16 mhf2_init) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; memset(mhfs, 0, MHFMAX * sizeof(u16)); @@ -1322,7 +1294,7 @@ wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init) if (wlc_hw->boardflags & BFL_NOPLLDOWN) mhfs[MHF1] |= MHF1_FORCEFASTCLK; - if (WLCISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) { + if (BRCMS_ISNPHY(wlc_hw->band) && NREV_LT(wlc_hw->band->phyrev, 2)) { mhfs[MHF2] |= MHF2_NPHY40MHZ_WAR; mhfs[MHF1] |= MHF1_IQSWAP_WAR; } @@ -1334,13 +1306,13 @@ wlc_mhfdef(struct wlc_info *wlc, u16 *mhfs, u16 mhf2_init) * pre-CLK changes should use wlc_write_mhf to get around the optimization * * - * bands values are: WLC_BAND_AUTO <--- Current band only - * WLC_BAND_5G <--- 5G band only - * WLC_BAND_2G <--- 2G band only - * WLC_BAND_ALL <--- All bands + * bands values are: BRCM_BAND_AUTO <--- Current band only + * BRCM_BAND_5G <--- 5G band only + * BRCM_BAND_2G <--- 2G band only + * BRCM_BAND_ALL <--- All bands */ void -wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, +brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, u16 val, int bands) { u16 save; @@ -1348,7 +1320,7 @@ wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, M_HOST_FLAGS1, M_HOST_FLAGS2, M_HOST_FLAGS3, M_HOST_FLAGS4, M_HOST_FLAGS5 }; - struct wlc_hwband *band; + struct brcms_hw_band *band; if ((val & ~mask) || idx >= MHFMAX) return; /* error condition */ @@ -1357,14 +1329,14 @@ wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, /* Current band only or all bands, * then set the band to current band */ - case WLC_BAND_AUTO: - case WLC_BAND_ALL: + case BRCM_BAND_AUTO: + case BRCM_BAND_ALL: band = wlc_hw->band; break; - case WLC_BAND_5G: + case BRCM_BAND_5G: band = wlc_hw->bandstate[BAND_5G_INDEX]; break; - case WLC_BAND_2G: + case BRCM_BAND_2G: band = wlc_hw->bandstate[BAND_2G_INDEX]; break; default: @@ -1380,11 +1352,11 @@ wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, */ if (wlc_hw->clk && (band->mhfs[idx] != save) && (band == wlc_hw->band)) - wlc_bmac_write_shm(wlc_hw, addr[idx], + brcms_b_write_shm(wlc_hw, addr[idx], (u16) band->mhfs[idx]); } - if (bands == WLC_BAND_ALL) { + if (bands == BRCM_BAND_ALL) { wlc_hw->bandstate[0]->mhfs[idx] = (wlc_hw->bandstate[0]->mhfs[idx] & ~mask) | val; wlc_hw->bandstate[1]->mhfs[idx] = @@ -1392,20 +1364,20 @@ wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, u16 val, } } -u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands) +u16 brcms_b_mhf_get(struct brcms_hardware *wlc_hw, u8 idx, int bands) { - struct wlc_hwband *band; + struct brcms_hw_band *band; if (idx >= MHFMAX) return 0; /* error condition */ switch (bands) { - case WLC_BAND_AUTO: + case BRCM_BAND_AUTO: band = wlc_hw->band; break; - case WLC_BAND_5G: + case BRCM_BAND_5G: band = wlc_hw->bandstate[BAND_5G_INDEX]; break; - case WLC_BAND_2G: + case BRCM_BAND_2G: band = wlc_hw->bandstate[BAND_2G_INDEX]; break; default: @@ -1418,7 +1390,7 @@ u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands) return band->mhfs[idx]; } -static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs) +static void brcms_c_write_mhf(struct brcms_hardware *wlc_hw, u16 *mhfs) { u8 idx; u16 addr[] = { @@ -1427,25 +1399,25 @@ static void wlc_write_mhf(struct wlc_hw_info *wlc_hw, u16 *mhfs) }; for (idx = 0; idx < MHFMAX; idx++) { - wlc_bmac_write_shm(wlc_hw, addr[idx], mhfs[idx]); + brcms_b_write_shm(wlc_hw, addr[idx], mhfs[idx]); } } /* set the maccontrol register to desired reset state and * initialize the sw cache of the register */ -static void wlc_mctrl_reset(struct wlc_hw_info *wlc_hw) +static void brcms_c_mctrl_reset(struct brcms_hardware *wlc_hw) { /* IHR accesses are always enabled, PSM disabled, HPS off and WAKE on */ wlc_hw->maccontrol = 0; wlc_hw->suspended_fifos = 0; wlc_hw->wake_override = 0; wlc_hw->mute_override = 0; - wlc_bmac_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE); + brcms_b_mctrl(wlc_hw, ~0, MCTL_IHR_EN | MCTL_WAKE); } /* set or clear maccontrol bits */ -void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val) +void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val) { u32 maccontrol; u32 new_maccontrol; @@ -1463,11 +1435,11 @@ void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val) wlc_hw->maccontrol = new_maccontrol; /* write the new values with overrides applied */ - wlc_mctrl_write(wlc_hw); + brcms_c_mctrl_write(wlc_hw); } /* write the software state of maccontrol and overrides to the maccontrol register */ -static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw) +static void brcms_c_mctrl_write(struct brcms_hardware *wlc_hw) { u32 maccontrol = wlc_hw->maccontrol; @@ -1484,7 +1456,8 @@ static void wlc_mctrl_write(struct wlc_hw_info *wlc_hw) W_REG(&wlc_hw->regs->maccontrol, maccontrol); } -void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, u32 override_bit) +void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw, + u32 override_bit) { if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) { mboolset(wlc_hw->wake_override, override_bit); @@ -1493,20 +1466,21 @@ void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, u32 override_bit) mboolset(wlc_hw->wake_override, override_bit); - wlc_mctrl_write(wlc_hw); - wlc_bmac_wait_for_wake(wlc_hw); + brcms_c_mctrl_write(wlc_hw); + brcms_b_wait_for_wake(wlc_hw); return; } -void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, u32 override_bit) +void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw, + u32 override_bit) { mboolclr(wlc_hw->wake_override, override_bit); if (wlc_hw->wake_override || (wlc_hw->maccontrol & MCTL_WAKE)) return; - wlc_mctrl_write(wlc_hw); + brcms_c_mctrl_write(wlc_hw); return; } @@ -1518,7 +1492,7 @@ void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, u32 override_bit) * STA 0 1 <--- This will ensure no beacons * IBSS 0 0 */ -static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw) +static void brcms_c_ucode_mute_override_set(struct brcms_hardware *wlc_hw) { wlc_hw->mute_override = 1; @@ -1528,13 +1502,13 @@ static void wlc_ucode_mute_override_set(struct wlc_hw_info *wlc_hw) if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) return; - wlc_mctrl_write(wlc_hw); + brcms_c_mctrl_write(wlc_hw); return; } /* Clear the override on AP and INFRA bits */ -static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw) +static void brcms_c_ucode_mute_override_clear(struct brcms_hardware *wlc_hw) { if (wlc_hw->mute_override == 0) return; @@ -1547,14 +1521,14 @@ static void wlc_ucode_mute_override_clear(struct wlc_hw_info *wlc_hw) if ((wlc_hw->maccontrol & (MCTL_AP | MCTL_INFRA)) == MCTL_INFRA) return; - wlc_mctrl_write(wlc_hw); + brcms_c_mctrl_write(wlc_hw); } /* * Write a MAC address to the given match reg offset in the RXE match engine. */ void -wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset, +brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, int match_reg_offset, const u8 *addr) { d11regs_t *regs; @@ -1562,7 +1536,7 @@ wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset, u16 mac_m; u16 mac_h; - BCMMSG(wlc_hw->wlc->wiphy, "wl%d: wlc_bmac_set_addrmatch\n", + BCMMSG(wlc_hw->wlc->wiphy, "wl%d: brcms_b_set_addrmatch\n", wlc_hw->unit); regs = wlc_hw->regs; @@ -1579,7 +1553,7 @@ wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, int match_reg_offset, } void -wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, int len, +brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, int offset, int len, void *buf) { d11regs_t *regs; @@ -1611,7 +1585,7 @@ wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, int len, } } -void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin) +void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin) { wlc_hw->band->CWmin = newmin; @@ -1620,7 +1594,7 @@ void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin) W_REG(&wlc_hw->regs->objdata, newmin); } -void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax) +void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax) { wlc_hw->band->CWmax = newmax; @@ -1629,124 +1603,126 @@ void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax) W_REG(&wlc_hw->regs->objdata, newmax); } -void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw) +void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw) { bool fastclk; /* request FAST clock if not on */ fastclk = wlc_hw->forcefastclk; if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); wlc_phy_bw_state_set(wlc_hw->band->pi, bw); - wlc_bmac_phy_reset(wlc_hw); + brcms_b_phy_reset(wlc_hw); wlc_phy_init(wlc_hw->band->pi, wlc_phy_chanspec_get(wlc_hw->band->pi)); /* restore the clk */ if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); + brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); } static void -wlc_write_hw_bcntemplate0(struct wlc_hw_info *wlc_hw, void *bcn, int len) +brcms_c_write_hw_bcntemplate0(struct brcms_hardware *wlc_hw, void *bcn, + int len) { d11regs_t *regs = wlc_hw->regs; - wlc_bmac_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3, + brcms_b_write_template_ram(wlc_hw, T_BCN0_TPL_BASE, (len + 3) & ~3, bcn); /* write beacon length to SCR */ - wlc_bmac_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len); + brcms_b_write_shm(wlc_hw, M_BCN0_FRM_BYTESZ, (u16) len); /* mark beacon0 valid */ OR_REG(®s->maccommand, MCMD_BCN0VLD); } static void -wlc_write_hw_bcntemplate1(struct wlc_hw_info *wlc_hw, void *bcn, int len) +brcms_c_write_hw_bcntemplate1(struct brcms_hardware *wlc_hw, void *bcn, + int len) { d11regs_t *regs = wlc_hw->regs; - wlc_bmac_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3, + brcms_b_write_template_ram(wlc_hw, T_BCN1_TPL_BASE, (len + 3) & ~3, bcn); /* write beacon length to SCR */ - wlc_bmac_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len); + brcms_b_write_shm(wlc_hw, M_BCN1_FRM_BYTESZ, (u16) len); /* mark beacon1 valid */ OR_REG(®s->maccommand, MCMD_BCN1VLD); } /* mac is assumed to be suspended at this point */ void -wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, void *bcn, int len, - bool both) +brcms_b_write_hw_bcntemplates(struct brcms_hardware *wlc_hw, void *bcn, + int len, bool both) { d11regs_t *regs = wlc_hw->regs; if (both) { - wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); - wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); + brcms_c_write_hw_bcntemplate0(wlc_hw, bcn, len); + brcms_c_write_hw_bcntemplate1(wlc_hw, bcn, len); } else { /* bcn 0 */ if (!(R_REG(®s->maccommand) & MCMD_BCN0VLD)) - wlc_write_hw_bcntemplate0(wlc_hw, bcn, len); + brcms_c_write_hw_bcntemplate0(wlc_hw, bcn, len); /* bcn 1 */ else if (! (R_REG(®s->maccommand) & MCMD_BCN1VLD)) - wlc_write_hw_bcntemplate1(wlc_hw, bcn, len); + brcms_c_write_hw_bcntemplate1(wlc_hw, bcn, len); } } -static void WLBANDINITFN(wlc_bmac_upd_synthpu) (struct wlc_hw_info *wlc_hw) +static void brcms_b_upd_synthpu(struct brcms_hardware *wlc_hw) { u16 v; - struct wlc_info *wlc = wlc_hw->wlc; + struct brcms_c_info *wlc = wlc_hw->wlc; /* update SYNTHPU_DLY */ - if (WLCISLCNPHY(wlc->band)) { + if (BRCMS_ISLCNPHY(wlc->band)) { v = SYNTHPU_DLY_LPPHY_US; - } else if (WLCISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3))) { + } else if (BRCMS_ISNPHY(wlc->band) && (NREV_GE(wlc->band->phyrev, 3))) { v = SYNTHPU_DLY_NPHY_US; } else { v = SYNTHPU_DLY_BPHY_US; } - wlc_bmac_write_shm(wlc_hw, M_SYNTHPU_DLY, v); + brcms_b_write_shm(wlc_hw, M_SYNTHPU_DLY, v); } /* band-specific init */ static void -WLBANDINITFN(wlc_bmac_bsinit) (struct wlc_info *wlc, chanspec_t chanspec) +brcms_b_bsinit(struct brcms_c_info *wlc, chanspec_t chanspec) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, wlc_hw->band->bandunit); - wlc_ucode_bsinit(wlc_hw); + brcms_c_ucode_bsinit(wlc_hw); wlc_phy_init(wlc_hw->band->pi, chanspec); - wlc_ucode_txant_set(wlc_hw); + brcms_c_ucode_txant_set(wlc_hw); /* cwmin is band-specific, update hardware with value for current band */ - wlc_bmac_set_cwmin(wlc_hw, wlc_hw->band->CWmin); - wlc_bmac_set_cwmax(wlc_hw, wlc_hw->band->CWmax); + brcms_b_set_cwmin(wlc_hw, wlc_hw->band->CWmin); + brcms_b_set_cwmax(wlc_hw, wlc_hw->band->CWmax); - wlc_bmac_update_slot_timing(wlc_hw, + brcms_b_update_slot_timing(wlc_hw, BAND_5G(wlc_hw->band-> bandtype) ? true : wlc_hw-> shortslot); /* write phytype and phyvers */ - wlc_bmac_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype); - wlc_bmac_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev); + brcms_b_write_shm(wlc_hw, M_PHYTYPE, (u16) wlc_hw->band->phytype); + brcms_b_write_shm(wlc_hw, M_PHYVER, (u16) wlc_hw->band->phyrev); /* initialize the txphyctl1 rate table since shmem is shared between bands */ - wlc_upd_ofdm_pctl1_table(wlc_hw); + brcms_upd_ofdm_pctl1_table(wlc_hw); - wlc_bmac_upd_synthpu(wlc_hw); + brcms_b_upd_synthpu(wlc_hw); } -static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk) +static void brcms_b_core_phy_clk(struct brcms_hardware *wlc_hw, bool clk) { BCMMSG(wlc_hw->wlc->wiphy, "wl%d: clk %d\n", wlc_hw->unit, clk); @@ -1771,7 +1747,7 @@ static void wlc_bmac_core_phy_clk(struct wlc_hw_info *wlc_hw, bool clk) } /* Perform a soft reset of the PHY PLL */ -void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw) +void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw) { BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); @@ -1790,12 +1766,12 @@ void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw) } /* light way to turn on phy clock without reset for NPHY only - * refer to wlc_bmac_core_phy_clk for full version + * refer to brcms_b_core_phy_clk for full version */ -void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk) +void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk) { /* support(necessary for NPHY and HYPHY) only */ - if (!WLCISNPHY(wlc_hw->band)) + if (!BRCMS_ISNPHY(wlc_hw->band)) return; if (ON == clk) @@ -1805,7 +1781,7 @@ void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk) } -void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk) +void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk) { if (ON == clk) ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, SICF_MPCLKE); @@ -1813,9 +1789,9 @@ void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk) ai_core_cflags(wlc_hw->sih, SICF_MPCLKE, 0); } -void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) +void brcms_b_phy_reset(struct brcms_hardware *wlc_hw) { - wlc_phy_t *pih = wlc_hw->band->pi; + struct brcms_phy_pub *pih = wlc_hw->band->pi; u32 phy_bw_clkbits; bool phy_in_reset = false; @@ -1827,7 +1803,7 @@ void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) phy_bw_clkbits = wlc_phy_clk_bwbits(wlc_hw->band->pi); /* Specific reset sequence required for NPHY rev 3 and 4 */ - if (WLCISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) && + if (BRCMS_ISNPHY(wlc_hw->band) && NREV_GE(wlc_hw->band->phyrev, 3) && NREV_LE(wlc_hw->band->phyrev, 4)) { /* Set the PHY bandwidth */ ai_core_cflags(wlc_hw->sih, SICF_BWMASK, phy_bw_clkbits); @@ -1835,7 +1811,7 @@ void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) udelay(1); /* Perform a soft reset of the PHY PLL */ - wlc_bmac_core_phypll_reset(wlc_hw); + brcms_b_core_phypll_reset(wlc_hw); /* reset the PHY */ ai_core_cflags(wlc_hw->sih, (SICF_PRST | SICF_PCLKE), @@ -1849,7 +1825,7 @@ void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) } udelay(2); - wlc_bmac_core_phy_clk(wlc_hw, ON); + brcms_b_core_phy_clk(wlc_hw, ON); if (pih) wlc_phy_anacore(pih, ON); @@ -1857,44 +1833,45 @@ void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw) /* switch to and initialize new band */ static void -WLBANDINITFN(wlc_bmac_setband) (struct wlc_hw_info *wlc_hw, uint bandunit, +brcms_b_setband(struct brcms_hardware *wlc_hw, uint bandunit, chanspec_t chanspec) { - struct wlc_info *wlc = wlc_hw->wlc; + struct brcms_c_info *wlc = wlc_hw->wlc; u32 macintmask; /* Enable the d11 core before accessing it */ if (!ai_iscoreup(wlc_hw->sih)) { ai_core_reset(wlc_hw->sih, 0, 0); - wlc_mctrl_reset(wlc_hw); + brcms_c_mctrl_reset(wlc_hw); } - macintmask = wlc_setband_inact(wlc, bandunit); + macintmask = brcms_c_setband_inact(wlc, bandunit); if (!wlc_hw->up) return; - wlc_bmac_core_phy_clk(wlc_hw, ON); + brcms_b_core_phy_clk(wlc_hw, ON); /* band-specific initializations */ - wlc_bmac_bsinit(wlc, chanspec); + brcms_b_bsinit(wlc, chanspec); /* * If there are any pending software interrupt bits, * then replace these with a harmless nonzero value - * so wlc_dpc() will re-enable interrupts when done. + * so brcms_c_dpc() will re-enable interrupts when done. */ if (wlc->macintstatus) wlc->macintstatus = MI_DMAINT; /* restore macintmask */ - wl_intrsrestore(wlc->wl, macintmask); + brcms_intrsrestore(wlc->wl, macintmask); /* ucode should still be suspended.. */ WARN_ON((R_REG(&wlc_hw->regs->maccontrol) & MCTL_EN_MAC) != 0); } /* low-level band switch utility routine */ -void WLBANDINITFN(wlc_setxband) (struct wlc_hw_info *wlc_hw, uint bandunit) +void brcms_c_setxband(struct brcms_hardware *wlc_hw, + uint bandunit) { BCMMSG(wlc_hw->wlc->wiphy, "wl%d: bandunit %d\n", wlc_hw->unit, bandunit); @@ -1911,7 +1888,7 @@ void WLBANDINITFN(wlc_setxband) (struct wlc_hw_info *wlc_hw, uint bandunit) } } -static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw) +static bool brcms_c_isgoodchip(struct brcms_hardware *wlc_hw) { /* reject unsupported corerev */ @@ -1924,31 +1901,36 @@ static bool wlc_isgoodchip(struct wlc_hw_info *wlc_hw) return true; } -static bool wlc_validboardtype(struct wlc_hw_info *wlc_hw) +/* Validate some board info parameters */ +static bool brcms_c_validboardtype(struct brcms_hardware *wlc_hw) { - bool goodboard = true; uint boardrev = wlc_hw->boardrev; + /* 4 bits each for board type, major, minor, and tiny version */ + uint brt = (boardrev & 0xf000) >> 12; + uint b0 = (boardrev & 0xf00) >> 8; + uint b1 = (boardrev & 0xf0) >> 4; + uint b2 = boardrev & 0xf; + + /* voards from other vendors are always considered valid */ + if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM) + return true; + + /* do some boardrev sanity checks when boardvendor is Broadcom */ if (boardrev == 0) - goodboard = false; - else if (boardrev > 0xff) { - uint brt = (boardrev & 0xf000) >> 12; - uint b0 = (boardrev & 0xf00) >> 8; - uint b1 = (boardrev & 0xf0) >> 4; - uint b2 = boardrev & 0xf; + return false; - if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9) - || (b2 > 9)) - goodboard = false; - } + if (boardrev <= 0xff) + return true; - if (wlc_hw->sih->boardvendor != PCI_VENDOR_ID_BROADCOM) - return goodboard; + if ((brt > 2) || (brt == 0) || (b0 > 9) || (b0 == 0) || (b1 > 9) + || (b2 > 9)) + return false; - return goodboard; + return true; } -static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw) +static char *brcms_c_get_macaddr(struct brcms_hardware *wlc_hw) { const char *varname = "macaddr"; char *macaddr; @@ -1978,14 +1960,14 @@ static char *wlc_get_macaddr(struct wlc_hw_info *wlc_hw) * this function could be called when driver is down and w/o clock * it operates on different registers depending on corerev and boardflag. */ -bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw) +bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw) { bool v, clk, xtal; u32 resetbits = 0, flags = 0; xtal = wlc_hw->sbclk; if (!xtal) - wlc_bmac_xtal(wlc_hw, ON); + brcms_b_xtal(wlc_hw, ON); /* may need to take core out of reset first */ clk = wlc_hw->clk; @@ -1999,13 +1981,12 @@ bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw) /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || - (wlc_hw->sih->chip == BCM43225_CHIP_ID) || - (wlc_hw->sih->chip == BCM43421_CHIP_ID)) + (wlc_hw->sih->chip == BCM43225_CHIP_ID)) wlc_hw->regs = (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); ai_core_reset(wlc_hw->sih, flags, resetbits); - wlc_mctrl_reset(wlc_hw); + brcms_c_mctrl_reset(wlc_hw); } v = ((R_REG(&wlc_hw->regs->phydebug) & PDBG_RFD) != 0); @@ -2015,13 +1996,13 @@ bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw) ai_core_disable(wlc_hw->sih, 0); if (!xtal) - wlc_bmac_xtal(wlc_hw, OFF); + brcms_b_xtal(wlc_hw, OFF); return v; } /* Initialize just the hardware when coming out of POR or S3/S5 system states */ -void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw) +void brcms_b_hw_up(struct brcms_hardware *wlc_hw) { if (wlc_hw->wlc->pub->hw_up) return; @@ -2030,19 +2011,18 @@ void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw) /* * Enable pll and xtal, initialize the power control registers, - * and force fastclock for the remainder of wlc_up(). + * and force fastclock for the remainder of brcms_c_up(). */ - wlc_bmac_xtal(wlc_hw, ON); + brcms_b_xtal(wlc_hw, ON); ai_clkctl_init(wlc_hw->sih); - wlc_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); if (wlc_hw->sih->bustype == PCI_BUS) { ai_pci_fixcfg(wlc_hw->sih); /* AI chip doesn't restore bar0win2 on hibernation/resume, need sw fixup */ if ((wlc_hw->sih->chip == BCM43224_CHIP_ID) || - (wlc_hw->sih->chip == BCM43225_CHIP_ID) || - (wlc_hw->sih->chip == BCM43421_CHIP_ID)) + (wlc_hw->sih->chip == BCM43225_CHIP_ID)) wlc_hw->regs = (d11regs_t *) ai_setcore(wlc_hw->sih, D11_CORE_ID, 0); @@ -2063,9 +2043,9 @@ void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw) } } -static bool wlc_dma_rxreset(struct wlc_hw_info *wlc_hw, uint fifo) +static bool wlc_dma_rxreset(struct brcms_hardware *wlc_hw, uint fifo) { - struct hnddma_pub *di = wlc_hw->di[fifo]; + struct dma_pub *di = wlc_hw->di[fifo]; return dma_rxreset(di); } @@ -2077,14 +2057,14 @@ static bool wlc_dma_rxreset(struct wlc_hw_info *wlc_hw, uint fifo) * clear software macintstatus for fresh new start * one testing hack wlc_hw->noreset will bypass the d11/phy reset */ -void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags) +void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags) { d11regs_t *regs; uint i; bool fastclk; u32 resetbits = 0; - if (flags == WLC_USE_COREFLAGS) + if (flags == BRCMS_USE_COREFLAGS) flags = (wlc_hw->band->pi ? wlc_hw->band->core_flags : 0); BCMMSG(wlc_hw->wlc->wiphy, "wl%d\n", wlc_hw->unit); @@ -2094,7 +2074,7 @@ void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags) /* request FAST clock if not on */ fastclk = wlc_hw->forcefastclk; if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); /* reset the dma engines except first time thru */ if (ai_iscoreup(wlc_hw->sih)) { @@ -2115,7 +2095,7 @@ void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags) /* if noreset, just stop the psm and return */ if (wlc_hw->noreset) { wlc_hw->wlc->macintstatus = 0; /* skip wl_dpc after down */ - wlc_bmac_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0); + brcms_b_mctrl(wlc_hw, MCTL_PSM_RUN | MCTL_EN_MAC, 0); return; } @@ -2139,28 +2119,28 @@ void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags) if (wlc_hw->band && wlc_hw->band->pi) wlc_phy_hw_clk_state_upd(wlc_hw->band->pi, true); - wlc_mctrl_reset(wlc_hw); + brcms_c_mctrl_reset(wlc_hw); if (PMUCTL_ENAB(wlc_hw->sih)) - wlc_clkctl_clk(wlc_hw, CLK_FAST); + brcms_b_clkctl_clk(wlc_hw, CLK_FAST); - wlc_bmac_phy_reset(wlc_hw); + brcms_b_phy_reset(wlc_hw); /* turn on PHY_PLL */ - wlc_bmac_core_phypll_ctl(wlc_hw, true); + brcms_b_core_phypll_ctl(wlc_hw, true); /* clear sw intstatus */ wlc_hw->wlc->macintstatus = 0; /* restore the clk setting */ if (!fastclk) - wlc_clkctl_clk(wlc_hw, CLK_DYNAMIC); + brcms_b_clkctl_clk(wlc_hw, CLK_DYNAMIC); } /* txfifo sizes needs to be modified(increased) since the newer cores * have more memory. */ -static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw) +static void brcms_b_corerev_fifofixup(struct brcms_hardware *wlc_hw) { d11regs_t *regs = wlc_hw->regs; u16 fifo_nu; @@ -2195,14 +2175,14 @@ static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw) * need to propagate to shm location to be in sync since ucode/hw won't * do this */ - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE0, + brcms_b_write_shm(wlc_hw, M_FIFOSIZE0, wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE1, + brcms_b_write_shm(wlc_hw, M_FIFOSIZE1, wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE2, + brcms_b_write_shm(wlc_hw, M_FIFOSIZE2, ((wlc_hw->xmtfifo_sz[TX_AC_VO_FIFO] << 8) | wlc_hw-> xmtfifo_sz[TX_AC_BK_FIFO])); - wlc_bmac_write_shm(wlc_hw, M_FIFOSIZE3, + brcms_b_write_shm(wlc_hw, M_FIFOSIZE3, ((wlc_hw->xmtfifo_sz[TX_ATIM_FIFO] << 8) | wlc_hw-> xmtfifo_sz[TX_BCMC_FIFO])); } @@ -2215,9 +2195,9 @@ static void wlc_corerev_fifofixup(struct wlc_hw_info *wlc_hw) * config other core registers * init dma */ -static void wlc_coreinit(struct wlc_info *wlc) +static void brcms_b_coreinit(struct brcms_c_info *wlc) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; d11regs_t *regs; u32 sflags; uint bcnint_us; @@ -2232,9 +2212,9 @@ static void wlc_coreinit(struct wlc_info *wlc) BCMMSG(wlc->wiphy, "wl%d\n", wlc_hw->unit); /* reset PSM */ - wlc_bmac_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE)); + brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_PSM_JMP_0 | MCTL_WAKE)); - wlc_ucode_download(wlc_hw); + brcms_ucode_download(wlc_hw); /* * FIFOSZ fixup. driver wants to controls the fifo allocation. */ @@ -2242,7 +2222,7 @@ static void wlc_coreinit(struct wlc_info *wlc) /* let the PSM run to the suspended state, set mode to BSS STA */ W_REG(®s->macintstatus, -1); - wlc_bmac_mctrl(wlc_hw, ~0, + brcms_b_mctrl(wlc_hw, ~0, (MCTL_IHR_EN | MCTL_INFRA | MCTL_PSM_RUN | MCTL_WAKE)); /* wait for ucode to self-suspend after auto-init */ @@ -2252,20 +2232,20 @@ static void wlc_coreinit(struct wlc_info *wlc) wiphy_err(wiphy, "wl%d: wlc_coreinit: ucode did not self-" "suspend!\n", wlc_hw->unit); - wlc_gpio_init(wlc); + brcms_c_gpio_init(wlc); sflags = ai_core_sflags(wlc_hw->sih, 0, 0); if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) - wlc_write_inits(wlc_hw, d11n0initvals16); + if (BRCMS_ISNPHY(wlc_hw->band)) + brcms_c_write_inits(wlc_hw, d11n0initvals16); else wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" " %d\n", __func__, wlc_hw->unit, wlc_hw->corerev); } else if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_write_inits(wlc_hw, d11lcn0initvals24); + if (BRCMS_ISLCNPHY(wlc_hw->band)) { + brcms_c_write_inits(wlc_hw, d11lcn0initvals24); } else { wiphy_err(wiphy, "%s: wl%d: unsupported phy in corerev" " %d\n", __func__, wlc_hw->unit, @@ -2278,21 +2258,21 @@ static void wlc_coreinit(struct wlc_info *wlc) /* For old ucode, txfifo sizes needs to be modified(increased) */ if (fifosz_fixup == true) { - wlc_corerev_fifofixup(wlc_hw); + brcms_b_corerev_fifofixup(wlc_hw); } /* check txfifo allocations match between ucode and driver */ - buf[TX_AC_BE_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE0); + buf[TX_AC_BE_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE0); if (buf[TX_AC_BE_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BE_FIFO]) { i = TX_AC_BE_FIFO; err = -1; } - buf[TX_AC_VI_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE1); + buf[TX_AC_VI_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE1); if (buf[TX_AC_VI_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_VI_FIFO]) { i = TX_AC_VI_FIFO; err = -1; } - buf[TX_AC_BK_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE2); + buf[TX_AC_BK_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE2); buf[TX_AC_VO_FIFO] = (buf[TX_AC_BK_FIFO] >> 8) & 0xff; buf[TX_AC_BK_FIFO] &= 0xff; if (buf[TX_AC_BK_FIFO] != wlc_hw->xmtfifo_sz[TX_AC_BK_FIFO]) { @@ -2303,7 +2283,7 @@ static void wlc_coreinit(struct wlc_info *wlc) i = TX_AC_VO_FIFO; err = -1; } - buf[TX_BCMC_FIFO] = wlc_bmac_read_shm(wlc_hw, M_FIFOSIZE3); + buf[TX_BCMC_FIFO] = brcms_b_read_shm(wlc_hw, M_FIFOSIZE3); buf[TX_ATIM_FIFO] = (buf[TX_BCMC_FIFO] >> 8) & 0xff; buf[TX_BCMC_FIFO] &= 0xff; if (buf[TX_BCMC_FIFO] != wlc_hw->xmtfifo_sz[TX_BCMC_FIFO]) { @@ -2326,14 +2306,14 @@ static void wlc_coreinit(struct wlc_info *wlc) /* band-specific inits done by wlc_bsinit() */ /* Set up frame burst size and antenna swap threshold init values */ - wlc_bmac_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST); - wlc_bmac_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT); + brcms_b_write_shm(wlc_hw, M_MBURST_SIZE, MAXTXFRAMEBURST); + brcms_b_write_shm(wlc_hw, M_MAX_ANTCNT, ANTCNT); /* enable one rx interrupt per received frame */ W_REG(®s->intrcvlazy[0], (1 << IRL_FC_SHIFT)); /* set the station mode (BSS STA) */ - wlc_bmac_mctrl(wlc_hw, + brcms_b_mctrl(wlc_hw, (MCTL_INFRA | MCTL_DISCARD_PMQ | MCTL_AP), (MCTL_INFRA | MCTL_DISCARD_PMQ)); @@ -2347,19 +2327,19 @@ static void wlc_coreinit(struct wlc_info *wlc) W_REG(®s->intctrlregs[RX_FIFO].intmask, DEF_RXINTMASK); /* allow the MAC to control the PHY clock (dynamic on/off) */ - wlc_bmac_macphyclk_set(wlc_hw, ON); + brcms_b_macphyclk_set(wlc_hw, ON); /* program dynamic clock control fast powerup delay register */ wlc->fastpwrup_dly = ai_clkctl_fast_pwrup_delay(wlc_hw->sih); W_REG(®s->scc_fastpwrup_dly, wlc->fastpwrup_dly); /* tell the ucode the corerev */ - wlc_bmac_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev); + brcms_b_write_shm(wlc_hw, M_MACHW_VER, (u16) wlc_hw->corerev); /* tell the ucode MAC capabilities */ - wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_L, + brcms_b_write_shm(wlc_hw, M_MACHW_CAP_L, (u16) (wlc_hw->machwcap & 0xffff)); - wlc_bmac_write_shm(wlc_hw, M_MACHW_CAP_H, + brcms_b_write_shm(wlc_hw, M_MACHW_CAP_H, (u16) ((wlc_hw-> machwcap >> 16) & 0xffff)); @@ -2372,8 +2352,8 @@ static void wlc_coreinit(struct wlc_info *wlc) W_REG(®s->objdata, wlc_hw->LRL); /* write rate fallback retry limits */ - wlc_bmac_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL); - wlc_bmac_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL); + brcms_b_write_shm(wlc_hw, M_SFRMTXCNTFBRTHSD, wlc_hw->SFBL); + brcms_b_write_shm(wlc_hw, M_LFRMTXCNTFBRTHSD, wlc_hw->LFBL); AND_REG(®s->ifs_ctl, 0x0FFF); W_REG(®s->ifs_aifsn, EDCF_AIFSN_MIN); @@ -2405,7 +2385,7 @@ static void wlc_coreinit(struct wlc_info *wlc) * - 559241 = 0x88889 => tsf_clk_frac_h = 0x8, tsf_clk_frac_l = 0x8889 */ -void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode) +void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode) { d11regs_t *regs; regs = wlc_hw->regs; @@ -2422,7 +2402,7 @@ void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode) W_REG(®s->tsf_clk_frac_l, 0x8889); W_REG(®s->tsf_clk_frac_h, 0x8); } - } else if (WLCISLCNPHY(wlc_hw->band)) { + } else if (BRCMS_ISLCNPHY(wlc_hw->band)) { if (spurmode == WL_SPURAVOID_ON1) { /* 82Mhz */ W_REG(®s->tsf_clk_frac_l, 0x7CE0); W_REG(®s->tsf_clk_frac_h, 0xC); @@ -2434,16 +2414,16 @@ void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode) } /* Initialize GPIOs that are controlled by D11 core */ -static void wlc_gpio_init(struct wlc_info *wlc) +static void brcms_c_gpio_init(struct brcms_c_info *wlc) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; d11regs_t *regs; u32 gc, gm; regs = wlc_hw->regs; /* use GPIO select 0 to get all gpio signals from the gpio out reg */ - wlc_bmac_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0); + brcms_b_mctrl(wlc_hw, MCTL_GPOUT_SEL_MASK, 0); /* * Common GPIO setup: @@ -2458,10 +2438,10 @@ static void wlc_gpio_init(struct wlc_info *wlc) /* Allocate GPIOs for mimo antenna diversity feature */ if (wlc_hw->antsel_type == ANTSEL_2x3) { /* Enable antenna diversity, use 2x3 mode */ - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, - MHF3_ANTSEL_EN, WLC_BAND_ALL); - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, - MHF3_ANTSEL_MODE, WLC_BAND_ALL); + brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, + MHF3_ANTSEL_EN, BRCM_BAND_ALL); + brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, + MHF3_ANTSEL_MODE, BRCM_BAND_ALL); /* init superswitch control */ wlc_phy_antsel_init(wlc_hw->band->pi, false); @@ -2478,13 +2458,13 @@ static void wlc_gpio_init(struct wlc_info *wlc) (BOARD_GPIO_12 | BOARD_GPIO_13)); /* Enable antenna diversity, use 2x4 mode */ - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, - MHF3_ANTSEL_EN, WLC_BAND_ALL); - wlc_bmac_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0, - WLC_BAND_ALL); + brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_EN, + MHF3_ANTSEL_EN, BRCM_BAND_ALL); + brcms_b_mhf(wlc_hw, MHF3, MHF3_ANTSEL_MODE, 0, + BRCM_BAND_ALL); /* Configure the desired clock to be 4Mhz */ - wlc_bmac_write_shm(wlc_hw, M_ANTSEL_CLKDIV, + brcms_b_write_shm(wlc_hw, M_ANTSEL_CLKDIV, ANTSEL_CLKDIV_4MHZ); } @@ -2496,17 +2476,17 @@ static void wlc_gpio_init(struct wlc_info *wlc) ai_gpiocontrol(wlc_hw->sih, gm, gc, GPIO_DRV_PRIORITY); } -static void wlc_ucode_download(struct wlc_hw_info *wlc_hw) +static void brcms_ucode_download(struct brcms_hardware *wlc_hw) { - struct wlc_info *wlc; + struct brcms_c_info *wlc; wlc = wlc_hw->wlc; if (wlc_hw->ucode_loaded) return; if (D11REV_IS(wlc_hw->corerev, 23)) { - if (WLCISNPHY(wlc_hw->band)) { - wlc_ucode_write(wlc_hw, bcm43xx_16_mimo, + if (BRCMS_ISNPHY(wlc_hw->band)) { + brcms_ucode_write(wlc_hw, bcm43xx_16_mimo, bcm43xx_16_mimosz); wlc_hw->ucode_loaded = true; } else @@ -2514,8 +2494,8 @@ static void wlc_ucode_download(struct wlc_hw_info *wlc_hw) "corerev %d\n", __func__, wlc_hw->unit, wlc_hw->corerev); } else if (D11REV_IS(wlc_hw->corerev, 24)) { - if (WLCISLCNPHY(wlc_hw->band)) { - wlc_ucode_write(wlc_hw, bcm43xx_24_lcn, + if (BRCMS_ISLCNPHY(wlc_hw->band)) { + brcms_ucode_write(wlc_hw, bcm43xx_24_lcn, bcm43xx_24_lcnsz); wlc_hw->ucode_loaded = true; } else { @@ -2526,7 +2506,7 @@ static void wlc_ucode_download(struct wlc_hw_info *wlc_hw) } } -static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], +static void brcms_ucode_write(struct brcms_hardware *wlc_hw, const u32 ucode[], const uint nbytes) { d11regs_t *regs = wlc_hw->regs; uint i; @@ -2542,7 +2522,7 @@ static void wlc_ucode_write(struct wlc_hw_info *wlc_hw, const u32 ucode[], W_REG(®s->objdata, ucode[i]); } -static void wlc_write_inits(struct wlc_hw_info *wlc_hw, +static void brcms_c_write_inits(struct brcms_hardware *wlc_hw, const struct d11init *inits) { int i; @@ -2562,24 +2542,24 @@ static void wlc_write_inits(struct wlc_hw_info *wlc_hw, } } -static void wlc_ucode_txant_set(struct wlc_hw_info *wlc_hw) +static void brcms_c_ucode_txant_set(struct brcms_hardware *wlc_hw) { u16 phyctl; u16 phytxant = wlc_hw->bmac_phytxant; u16 mask = PHY_TXC_ANT_MASK; /* set the Probe Response frame phy control word */ - phyctl = wlc_bmac_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS); + phyctl = brcms_b_read_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS); phyctl = (phyctl & ~mask) | phytxant; - wlc_bmac_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl); + brcms_b_write_shm(wlc_hw, M_CTXPRS_BLK + C_CTX_PCTLWD_POS, phyctl); /* set the Response (ACK/CTS) frame phy control word */ - phyctl = wlc_bmac_read_shm(wlc_hw, M_RSP_PCTLWD); + phyctl = brcms_b_read_shm(wlc_hw, M_RSP_PCTLWD); phyctl = (phyctl & ~mask) | phytxant; - wlc_bmac_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl); + brcms_b_write_shm(wlc_hw, M_RSP_PCTLWD, phyctl); } -void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant) +void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant) { /* update sw state */ wlc_hw->bmac_phytxant = phytxant; @@ -2587,16 +2567,16 @@ void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant) /* push to ucode if up */ if (!wlc_hw->up) return; - wlc_ucode_txant_set(wlc_hw); + brcms_c_ucode_txant_set(wlc_hw); } -u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw) +u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw) { return (u16) wlc_hw->wlc->stf->txant; } -void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, u8 antsel_type) +void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, u8 antsel_type) { wlc_hw->antsel_type = antsel_type; @@ -2604,7 +2584,7 @@ void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, u8 antsel_type) wlc_phy_antsel_type_set(wlc_hw->band->pi, antsel_type); } -void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw) +void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw) { bool fatal = false; uint unit; @@ -2660,7 +2640,7 @@ void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw) } if (fatal) { - wlc_fatal_error(wlc_hw->wlc); /* big hammer */ + brcms_c_fatal_error(wlc_hw->wlc); /* big hammer */ break; } else W_REG(®s->intctrlregs[idx].intstatus, @@ -2668,9 +2648,9 @@ void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw) } } -void wlc_intrson(struct wlc_info *wlc) +void brcms_c_intrson(struct brcms_c_info *wlc) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; wlc->macintmask = wlc->defmacintmask; W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); } @@ -2680,25 +2660,25 @@ void wlc_intrson(struct wlc_info *wlc) * but also because per-port code may require sync with valid interrupt. */ -static u32 wlc_wlintrsoff(struct wlc_info *wlc) +static u32 brcms_c_wlintrsoff(struct brcms_c_info *wlc) { if (!wlc->hw->up) return 0; - return wl_intrsoff(wlc->wl); + return brcms_intrsoff(wlc->wl); } -static void wlc_wlintrsrestore(struct wlc_info *wlc, u32 macintmask) +static void brcms_c_wlintrsrestore(struct brcms_c_info *wlc, u32 macintmask) { if (!wlc->hw->up) return; - wl_intrsrestore(wlc->wl, macintmask); + brcms_intrsrestore(wlc->wl, macintmask); } -u32 wlc_intrsoff(struct wlc_info *wlc) +u32 brcms_c_intrsoff(struct brcms_c_info *wlc) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; u32 macintmask; if (!wlc_hw->clk) @@ -2715,9 +2695,9 @@ u32 wlc_intrsoff(struct wlc_info *wlc) return wlc->macintstatus ? 0 : macintmask; } -void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask) +void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; if (!wlc_hw->clk) return; @@ -2725,43 +2705,44 @@ void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask) W_REG(&wlc_hw->regs->macintmask, wlc->macintmask); } -static void wlc_bmac_mute(struct wlc_hw_info *wlc_hw, bool on, mbool flags) +static void brcms_b_mute(struct brcms_hardware *wlc_hw, bool on, mbool flags) { u8 null_ether_addr[ETH_ALEN] = {0, 0, 0, 0, 0, 0}; if (on) { /* suspend tx fifos */ - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO); - wlc_bmac_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO); + brcms_b_tx_fifo_suspend(wlc_hw, TX_DATA_FIFO); + brcms_b_tx_fifo_suspend(wlc_hw, TX_CTL_FIFO); + brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_BK_FIFO); + brcms_b_tx_fifo_suspend(wlc_hw, TX_AC_VI_FIFO); /* zero the address match register so we do not send ACKs */ - wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, + brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, null_ether_addr); } else { /* resume tx fifos */ if (!wlc_hw->wlc->tx_suspended) { - wlc_bmac_tx_fifo_resume(wlc_hw, TX_DATA_FIFO); + brcms_b_tx_fifo_resume(wlc_hw, TX_DATA_FIFO); } - wlc_bmac_tx_fifo_resume(wlc_hw, TX_CTL_FIFO); - wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO); - wlc_bmac_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO); + brcms_b_tx_fifo_resume(wlc_hw, TX_CTL_FIFO); + brcms_b_tx_fifo_resume(wlc_hw, TX_AC_BK_FIFO); + brcms_b_tx_fifo_resume(wlc_hw, TX_AC_VI_FIFO); /* Restore address */ - wlc_bmac_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, + brcms_b_set_addrmatch(wlc_hw, RCM_MAC_OFFSET, wlc_hw->etheraddr); } wlc_phy_mute_upd(wlc_hw->band->pi, on, flags); if (on) - wlc_ucode_mute_override_set(wlc_hw); + brcms_c_ucode_mute_override_set(wlc_hw); else - wlc_ucode_mute_override_clear(wlc_hw); + brcms_c_ucode_mute_override_clear(wlc_hw); } -int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, uint *blocks) +int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo, + uint *blocks) { if (fifo >= NFIFO) return -EINVAL; @@ -2771,7 +2752,7 @@ int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, uint *blocks) return 0; } -/* wlc_bmac_tx_fifo_suspended: +/* brcms_b_tx_fifo_suspended: * Check the MAC's tx suspend status for a tx fifo. * * When the MAC acknowledges a tx suspend, it indicates that no more @@ -2780,7 +2761,8 @@ int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, uint *blocks) * be pulling data into a tx fifo, by the time the MAC acks the suspend * request. */ -static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, uint tx_fifo) +static bool brcms_b_tx_fifo_suspended(struct brcms_hardware *wlc_hw, + uint tx_fifo) { /* check that a suspend has been requested and is no longer pending */ @@ -2799,7 +2781,8 @@ static bool wlc_bmac_tx_fifo_suspended(struct wlc_hw_info *wlc_hw, uint tx_fifo) return false; } -static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo) +static void brcms_b_tx_fifo_suspend(struct brcms_hardware *wlc_hw, + uint tx_fifo) { u8 fifo = 1 << tx_fifo; @@ -2811,7 +2794,8 @@ static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo) /* force the core awake only if not already */ if (wlc_hw->suspended_fifos == 0) - wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_TXFIFO); + brcms_c_ucode_wake_override_set(wlc_hw, + BRCMS_WAKE_OVERRIDE_TXFIFO); wlc_hw->suspended_fifos |= fifo; @@ -2820,20 +2804,22 @@ static void wlc_bmac_tx_fifo_suspend(struct wlc_hw_info *wlc_hw, uint tx_fifo) * which may result in mismatch between ucode and driver * so suspend the mac before suspending the FIFO */ - if (WLC_PHY_11N_CAP(wlc_hw->band)) - wlc_suspend_mac_and_wait(wlc_hw->wlc); + if (BRCMS_PHY_11N_CAP(wlc_hw->band)) + brcms_c_suspend_mac_and_wait(wlc_hw->wlc); dma_txsuspend(wlc_hw->di[tx_fifo]); - if (WLC_PHY_11N_CAP(wlc_hw->band)) - wlc_enable_mac(wlc_hw->wlc); + if (BRCMS_PHY_11N_CAP(wlc_hw->band)) + brcms_c_enable_mac(wlc_hw->wlc); } } -static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo) +static void brcms_b_tx_fifo_resume(struct brcms_hardware *wlc_hw, + uint tx_fifo) { - /* BMAC_NOTE: WLC_TX_FIFO_ENAB is done in wlc_dpc() for DMA case but need to be done - * here for PIO otherwise the watchdog will catch the inconsistency and fire + /* BMAC_NOTE: BRCMS_TX_FIFO_ENAB is done in brcms_c_dpc() for DMA case + * but need to be done here for PIO otherwise the watchdog will catch + * the inconsistency and fire */ /* Two clients of this code, 11h Quiet period and scanning. */ if (wlc_hw->di[tx_fifo]) @@ -2845,8 +2831,8 @@ static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo) else { wlc_hw->suspended_fifos &= ~(1 << tx_fifo); if (wlc_hw->suspended_fifos == 0) - wlc_ucode_wake_override_clear(wlc_hw, - WLC_WAKE_OVERRIDE_TXFIFO); + brcms_c_ucode_wake_override_clear(wlc_hw, + BRCMS_WAKE_OVERRIDE_TXFIFO); } } @@ -2858,9 +2844,9 @@ static void wlc_bmac_tx_fifo_resume(struct wlc_hw_info *wlc_hw, uint tx_fifo) * 0 if the interrupt is not for us, or we are in some special cases; * device interrupt status bits otherwise. */ -static inline u32 wlc_intstatus(struct wlc_info *wlc, bool in_isr) +static inline u32 wlc_intstatus(struct brcms_c_info *wlc, bool in_isr) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; d11regs_t *regs = wlc_hw->regs; u32 macintstatus; @@ -2915,7 +2901,7 @@ static inline u32 wlc_intstatus(struct wlc_info *wlc, bool in_isr) /* Update wlc->macintstatus and wlc->intstatus[]. */ /* Return true if they are updated successfully. false otherwise */ -bool wlc_intrsupd(struct wlc_info *wlc) +bool brcms_c_intrsupd(struct brcms_c_info *wlc) { u32 macintstatus; @@ -2935,12 +2921,12 @@ bool wlc_intrsupd(struct wlc_info *wlc) /* * First-level interrupt processing. * Return true if this was our interrupt, false otherwise. - * *wantdpc will be set to true if further wlc_dpc() processing is required, + * *wantdpc will be set to true if further brcms_c_dpc() processing is required, * false otherwise. */ -bool wlc_isr(struct wlc_info *wlc, bool *wantdpc) +bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; u32 macintstatus; *wantdpc = false; @@ -2969,7 +2955,8 @@ bool wlc_isr(struct wlc_info *wlc, bool *wantdpc) } static bool -wlc_bmac_dotxstatus(struct wlc_hw_info *wlc_hw, tx_status_t *txs, u32 s2) +brcms_b_dotxstatus(struct brcms_hardware *wlc_hw, struct tx_status *txs, + u32 s2) { /* discard intermediate indications for ucode with one legitimate case: * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, but the subsequent @@ -2981,19 +2968,19 @@ wlc_bmac_dotxstatus(struct wlc_hw_info *wlc_hw, tx_status_t *txs, u32 s2) return false; } - return wlc_dotxstatus(wlc_hw->wlc, txs, s2); + return brcms_c_dotxstatus(wlc_hw->wlc, txs, s2); } /* process tx completion events in BMAC * Return true if more tx status need to be processed. false otherwise. */ static bool -wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) +brcms_b_txstatus(struct brcms_hardware *wlc_hw, bool bound, bool *fatal) { bool morepending = false; - struct wlc_info *wlc = wlc_hw->wlc; + struct brcms_c_info *wlc = wlc_hw->wlc; d11regs_t *regs; - tx_status_t txstatus, *txs; + struct tx_status txstatus, *txs; u32 s1, s2; uint n = 0; /* @@ -3023,7 +3010,7 @@ wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) txs->phyerr = (s2 & TXS_PTX_MASK) >> TXS_PTX_SHIFT; txs->lasttxtime = 0; - *fatal = wlc_bmac_dotxstatus(wlc_hw, txs, s2); + *fatal = brcms_b_dotxstatus(wlc_hw, txs, s2); /* !give others some time to run! */ if (++n >= max_tx_num) @@ -3037,14 +3024,14 @@ wlc_bmac_txstatus(struct wlc_hw_info *wlc_hw, bool bound, bool *fatal) morepending = true; if (!pktq_empty(&wlc->pkt_queue->q)) - wlc_send_q(wlc); + brcms_c_send_q(wlc); return morepending; } -void wlc_suspend_mac_and_wait(struct wlc_info *wlc) +void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; d11regs_t *regs = wlc_hw->regs; u32 mc, mi; struct wiphy *wiphy = wlc->wiphy; @@ -3060,14 +3047,14 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc) return; /* force the core awake */ - wlc_ucode_wake_override_set(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); + brcms_c_ucode_wake_override_set(wlc_hw, BRCMS_WAKE_OVERRIDE_MACSUSPEND); mc = R_REG(®s->maccontrol); if (mc == 0xffffffff) { wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } WARN_ON(mc & MCTL_PSM_JMP_0); @@ -3078,20 +3065,20 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc) if (mi == 0xffffffff) { wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } WARN_ON(mi & MI_MACSSPNDD); - wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, 0); + brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, 0); SPINWAIT(!(R_REG(®s->macintstatus) & MI_MACSSPNDD), - WLC_MAX_MAC_SUSPEND); + BRCMS_MAX_MAC_SUSPEND); if (!(R_REG(®s->macintstatus) & MI_MACSSPNDD)) { wiphy_err(wiphy, "wl%d: wlc_suspend_mac_and_wait: waited %d uS" " and MI_MACSSPNDD is still not on.\n", - wlc_hw->unit, WLC_MAX_MAC_SUSPEND); + wlc_hw->unit, BRCMS_MAX_MAC_SUSPEND); wiphy_err(wiphy, "wl%d: psmdebug 0x%08x, phydebug 0x%08x, " "psm_brc 0x%04x\n", wlc_hw->unit, R_REG(®s->psmdebug), @@ -3103,7 +3090,7 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc) if (mc == 0xffffffff) { wiphy_err(wiphy, "wl%d: %s: dead chip\n", wlc_hw->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } WARN_ON(mc & MCTL_PSM_JMP_0); @@ -3111,9 +3098,9 @@ void wlc_suspend_mac_and_wait(struct wlc_info *wlc) WARN_ON(mc & MCTL_EN_MAC); } -void wlc_enable_mac(struct wlc_info *wlc) +void brcms_c_enable_mac(struct brcms_c_info *wlc) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; d11regs_t *regs = wlc_hw->regs; u32 mc, mi; @@ -3132,7 +3119,7 @@ void wlc_enable_mac(struct wlc_info *wlc) WARN_ON(mc & MCTL_EN_MAC); WARN_ON(!(mc & MCTL_PSM_RUN)); - wlc_bmac_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC); + brcms_b_mctrl(wlc_hw, MCTL_EN_MAC, MCTL_EN_MAC); W_REG(®s->macintstatus, MI_MACSSPNDD); mc = R_REG(®s->maccontrol); @@ -3143,44 +3130,46 @@ void wlc_enable_mac(struct wlc_info *wlc) mi = R_REG(®s->macintstatus); WARN_ON(mi & MI_MACSSPNDD); - wlc_ucode_wake_override_clear(wlc_hw, WLC_WAKE_OVERRIDE_MACSUSPEND); + brcms_c_ucode_wake_override_clear(wlc_hw, + BRCMS_WAKE_OVERRIDE_MACSUSPEND); } -static void wlc_upd_ofdm_pctl1_table(struct wlc_hw_info *wlc_hw) +static void brcms_upd_ofdm_pctl1_table(struct brcms_hardware *wlc_hw) { u8 rate; u8 rates[8] = { - WLC_RATE_6M, WLC_RATE_9M, WLC_RATE_12M, WLC_RATE_18M, - WLC_RATE_24M, WLC_RATE_36M, WLC_RATE_48M, WLC_RATE_54M + BRCM_RATE_6M, BRCM_RATE_9M, BRCM_RATE_12M, BRCM_RATE_18M, + BRCM_RATE_24M, BRCM_RATE_36M, BRCM_RATE_48M, BRCM_RATE_54M }; u16 entry_ptr; u16 pctl1; uint i; - if (!WLC_PHY_11N_CAP(wlc_hw->band)) + if (!BRCMS_PHY_11N_CAP(wlc_hw->band)) return; /* walk the phy rate table and update the entries */ for (i = 0; i < ARRAY_SIZE(rates); i++) { rate = rates[i]; - entry_ptr = wlc_bmac_ofdm_ratetable_offset(wlc_hw, rate); + entry_ptr = brcms_b_ofdm_ratetable_offset(wlc_hw, rate); /* read the SHM Rate Table entry OFDM PCTL1 values */ pctl1 = - wlc_bmac_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS); + brcms_b_read_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS); /* modify the value */ pctl1 &= ~PHY_TXC1_MODE_MASK; pctl1 |= (wlc_hw->hw_stf_ss_opmode << PHY_TXC1_MODE_SHIFT); /* Update the SHM Rate Table entry OFDM PCTL1 values */ - wlc_bmac_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS, + brcms_b_write_shm(wlc_hw, entry_ptr + M_RT_OFDM_PCTL1_POS, pctl1); } } -static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, u8 rate) +static u16 brcms_b_ofdm_ratetable_offset(struct brcms_hardware *wlc_hw, + u8 rate) { uint i; u8 plcp_rate = 0; @@ -3190,14 +3179,14 @@ static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, u8 rate) }; /* OFDM RATE sub-field of PLCP SIGNAL field, per 802.11 sec 17.3.4.1 */ const struct plcp_signal_rate_lookup rate_lookup[] = { - {WLC_RATE_6M, 0xB}, - {WLC_RATE_9M, 0xF}, - {WLC_RATE_12M, 0xA}, - {WLC_RATE_18M, 0xE}, - {WLC_RATE_24M, 0x9}, - {WLC_RATE_36M, 0xD}, - {WLC_RATE_48M, 0x8}, - {WLC_RATE_54M, 0xC} + {BRCM_RATE_6M, 0xB}, + {BRCM_RATE_9M, 0xF}, + {BRCM_RATE_12M, 0xA}, + {BRCM_RATE_18M, 0xE}, + {BRCM_RATE_24M, 0x9}, + {BRCM_RATE_36M, 0xD}, + {BRCM_RATE_48M, 0x8}, + {BRCM_RATE_54M, 0xC} }; for (i = 0; i < ARRAY_SIZE(rate_lookup); i++) { @@ -3210,19 +3199,19 @@ static u16 wlc_bmac_ofdm_ratetable_offset(struct wlc_hw_info *wlc_hw, u8 rate) /* Find the SHM pointer to the rate table entry by looking in the * Direct-map Table */ - return 2 * wlc_bmac_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)); + return 2 * brcms_b_read_shm(wlc_hw, M_RT_DIRMAP_A + (plcp_rate * 2)); } -void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode) +void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, u8 stf_mode) { wlc_hw->hw_stf_ss_opmode = stf_mode; if (wlc_hw->clk) - wlc_upd_ofdm_pctl1_table(wlc_hw); + brcms_upd_ofdm_pctl1_table(wlc_hw); } void -wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, +brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr, u32 *tsf_h_ptr) { d11regs_t *regs = wlc_hw->regs; @@ -3234,7 +3223,7 @@ wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, return; } -static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw) +static bool brcms_b_validate_chip_access(struct brcms_hardware *wlc_hw) { d11regs_t *regs; u32 w, val; @@ -3299,7 +3288,7 @@ static bool wlc_bmac_validate_chip_access(struct wlc_hw_info *wlc_hw) #define PHYPLL_WAIT_US 100000 -void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on) +void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on) { d11regs_t *regs; u32 tmp; @@ -3351,7 +3340,7 @@ void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on) } } -void wlc_coredisable(struct wlc_hw_info *wlc_hw) +void brcms_c_coredisable(struct brcms_hardware *wlc_hw) { bool dev_gone; @@ -3372,7 +3361,7 @@ void wlc_coredisable(struct wlc_hw_info *wlc_hw) wlc_phy_anacore(wlc_hw->band->pi, OFF); /* turn off PHYPLL to save power */ - wlc_bmac_core_phypll_ctl(wlc_hw, false); + brcms_b_core_phypll_ctl(wlc_hw, false); /* No need to set wlc->pub->radio_active = OFF * because this function needs down capability and @@ -3389,7 +3378,7 @@ void wlc_coredisable(struct wlc_hw_info *wlc_hw) } /* power both the pll and external oscillator on/off */ -static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want) +static void brcms_b_xtal(struct brcms_hardware *wlc_hw, bool want) { BCMMSG(wlc_hw->wlc->wiphy, "wl%d: want %d\n", wlc_hw->unit, want); @@ -3408,9 +3397,9 @@ static void wlc_bmac_xtal(struct wlc_hw_info *wlc_hw, bool want) } } -static void wlc_flushqueues(struct wlc_info *wlc) +static void brcms_c_flushqueues(struct brcms_c_info *wlc) { - struct wlc_hw_info *wlc_hw = wlc->hw; + struct brcms_hardware *wlc_hw = wlc->hw; uint i; wlc->txpend16165war = 0; @@ -3418,7 +3407,7 @@ static void wlc_flushqueues(struct wlc_info *wlc) /* free any posted tx packets */ for (i = 0; i < NFIFO; i++) if (wlc_hw->di[i]) { - dma_txreclaim(wlc_hw->di[i], HNDDMA_RANGE_ALL); + dma_txreclaim(wlc_hw->di[i], DMA_RANGE_ALL); TXPKTPENDCLR(wlc, i); BCMMSG(wlc->wiphy, "pktpend fifo %d clrd\n", i); } @@ -3427,18 +3416,18 @@ static void wlc_flushqueues(struct wlc_info *wlc) dma_rxreclaim(wlc_hw->di[RX_FIFO]); } -u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset) +u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset) { - return wlc_bmac_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL); + return brcms_b_read_objmem(wlc_hw, offset, OBJADDR_SHM_SEL); } -void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v) +void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, u16 v) { - wlc_bmac_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); + brcms_b_write_objmem(wlc_hw, offset, v, OBJADDR_SHM_SEL); } static u16 -wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, u32 sel) +brcms_b_read_objmem(struct brcms_hardware *wlc_hw, uint offset, u32 sel) { d11regs_t *regs = wlc_hw->regs; volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; @@ -3457,7 +3446,8 @@ wlc_bmac_read_objmem(struct wlc_hw_info *wlc_hw, uint offset, u32 sel) } static void -wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, u16 v, u32 sel) +brcms_b_write_objmem(struct brcms_hardware *wlc_hw, uint offset, u16 v, + u32 sel) { d11regs_t *regs = wlc_hw->regs; volatile u16 *objdata_lo = (volatile u16 *)®s->objdata; @@ -3478,8 +3468,8 @@ wlc_bmac_write_objmem(struct wlc_hw_info *wlc_hw, uint offset, u16 v, u32 sel) * 'sel' selects the type of memory */ void -wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, uint offset, const void *buf, - int len, u32 sel) +brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, uint offset, + const void *buf, int len, u32 sel) { u16 v; const u8 *p = (const u8 *)buf; @@ -3490,7 +3480,7 @@ wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, uint offset, const void *buf, for (i = 0; i < len; i += 2) { v = p[i] | (p[i + 1] << 8); - wlc_bmac_write_objmem(wlc_hw, offset + i, v, sel); + brcms_b_write_objmem(wlc_hw, offset + i, v, sel); } } @@ -3500,7 +3490,7 @@ wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, uint offset, const void *buf, * 'sel' selects the type of memory */ void -wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, void *buf, +brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, void *buf, int len, u32 sel) { u16 v; @@ -3511,13 +3501,14 @@ wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, void *buf, return; for (i = 0; i < len; i += 2) { - v = wlc_bmac_read_objmem(wlc_hw, offset + i, sel); + v = brcms_b_read_objmem(wlc_hw, offset + i, sel); p[i] = v & 0xFF; p[i + 1] = (v >> 8) & 0xFF; } } -void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, uint *len) +void brcms_b_copyfrom_vars(struct brcms_hardware *wlc_hw, char **buf, + uint *len) { BCMMSG(wlc_hw->wlc->wiphy, "nvram vars totlen=%d\n", wlc_hw->vars_size); @@ -3526,7 +3517,7 @@ void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, uint *len) *len = wlc_hw->vars_size; } -void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, u16 LRL) +void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw, u16 SRL, u16 LRL) { wlc_hw->SRL = SRL; wlc_hw->LRL = LRL; @@ -3544,7 +3535,7 @@ void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, u16 LRL) } } -void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit) +void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, mbool req_bit) { if (set) { if (mboolisset(wlc_hw->pllreq, req_bit)) @@ -3552,9 +3543,9 @@ void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit) mboolset(wlc_hw->pllreq, req_bit); - if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { + if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) { if (!wlc_hw->sbclk) { - wlc_bmac_xtal(wlc_hw, ON); + brcms_b_xtal(wlc_hw, ON); } } } else { @@ -3563,9 +3554,9 @@ void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit) mboolclr(wlc_hw->pllreq, req_bit); - if (mboolisset(wlc_hw->pllreq, WLC_PLLREQ_FLIP)) { + if (mboolisset(wlc_hw->pllreq, BRCMS_PLLREQ_FLIP)) { if (wlc_hw->sbclk) { - wlc_bmac_xtal(wlc_hw, OFF); + brcms_b_xtal(wlc_hw, OFF); } } } @@ -3573,13 +3564,12 @@ void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, mbool req_bit) return; } -u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate) +u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate) { u16 table_ptr; u8 phy_rate, index; /* get the phy specific rate encoding for the PLCP SIGNAL field */ - /* XXX4321 fixup needed ? */ if (IS_OFDM(rate)) table_ptr = M_RT_DIRMAP_A; else @@ -3588,16 +3578,16 @@ u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate) /* for a given rate, the LS-nibble of the PLCP SIGNAL field is * the index into the rate table. */ - phy_rate = rate_info[rate] & WLC_RATE_MASK; + phy_rate = rate_info[rate] & BRCMS_RATE_MASK; index = phy_rate & 0xf; /* Find the SHM pointer to the rate table entry by looking in the * Direct-map Table */ - return 2 * wlc_bmac_read_shm(wlc_hw, table_ptr + (index * 2)); + return 2 * brcms_b_read_shm(wlc_hw, table_ptr + (index * 2)); } -void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail) +void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, u32 antsel_avail) { wlc_hw->antsel_avail = antsel_avail; } diff --git a/drivers/staging/brcm80211/brcmsmac/bmac.h b/drivers/staging/brcm80211/brcmsmac/bmac.h new file mode 100644 index 00000000000..3c9ad4f3bd2 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/bmac.h @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ +#ifndef _BRCM_BOTTOM_MAC_H_ +#define _BRCM_BOTTOM_MAC_H_ + +#include <brcmu_wifi.h> +#include "types.h" + +/* dup state between BMAC(struct brcms_hardware) and HIGH(struct brcms_c_info) + driver */ +struct brcms_b_state { + u32 machwcap; /* mac hw capibility */ + u32 preamble_ovr; /* preamble override */ +}; + +enum { + IOV_BMAC_DIAG, + IOV_BMAC_SBGPIOTIMERVAL, + IOV_BMAC_SBGPIOOUT, + IOV_BMAC_CCGPIOCTRL, /* CC GPIOCTRL REG */ + IOV_BMAC_CCGPIOOUT, /* CC GPIOOUT REG */ + IOV_BMAC_CCGPIOOUTEN, /* CC GPIOOUTEN REG */ + IOV_BMAC_CCGPIOIN, /* CC GPIOIN REG */ + IOV_BMAC_WPSGPIO, /* WPS push button GPIO pin */ + IOV_BMAC_OTPDUMP, + IOV_BMAC_OTPSTAT, + IOV_BMAC_PCIEASPM, /* obfuscation clkreq/aspm control */ + IOV_BMAC_PCIEADVCORRMASK, /* advanced correctable error mask */ + IOV_BMAC_PCIECLKREQ, /* PCIE 1.1 clockreq enab support */ + IOV_BMAC_PCIELCREG, /* PCIE LCREG */ + IOV_BMAC_SBGPIOTIMERMASK, + IOV_BMAC_RFDISABLEDLY, + IOV_BMAC_PCIEREG, /* PCIE REG */ + IOV_BMAC_PCICFGREG, /* PCI Config register */ + IOV_BMAC_PCIESERDESREG, /* PCIE SERDES REG (dev, 0}offset) */ + IOV_BMAC_PCIEGPIOOUT, /* PCIEOUT REG */ + IOV_BMAC_PCIEGPIOOUTEN, /* PCIEOUTEN REG */ + IOV_BMAC_PCIECLKREQENCTRL, /* clkreqenctrl REG (PCIE REV > 6.0 */ + IOV_BMAC_DMALPBK, + IOV_BMAC_CCREG, + IOV_BMAC_COREREG, + IOV_BMAC_SDCIS, + IOV_BMAC_SDIO_DRIVE, + IOV_BMAC_OTPW, + IOV_BMAC_NVOTPW, + IOV_BMAC_SROM, + IOV_BMAC_SRCRC, + IOV_BMAC_CIS_SOURCE, + IOV_BMAC_CISVAR, + IOV_BMAC_OTPLOCK, + IOV_BMAC_OTP_CHIPID, + IOV_BMAC_CUSTOMVAR1, + IOV_BMAC_BOARDFLAGS, + IOV_BMAC_BOARDFLAGS2, + IOV_BMAC_WPSLED, + IOV_BMAC_NVRAM_SOURCE, + IOV_BMAC_OTP_RAW_READ, + IOV_BMAC_LAST +}; + +extern int brcms_b_attach(struct brcms_c_info *wlc, u16 vendor, u16 device, + uint unit, bool piomode, void *regsva, uint bustype, + void *btparam); +extern int brcms_b_detach(struct brcms_c_info *wlc); +extern void brcms_b_watchdog(void *arg); + +/* up/down, reset, clk */ +extern void brcms_b_copyto_objmem(struct brcms_hardware *wlc_hw, + uint offset, const void *buf, int len, + u32 sel); +extern void brcms_b_copyfrom_objmem(struct brcms_hardware *wlc_hw, uint offset, + void *buf, int len, u32 sel); +#define brcms_b_copyfrom_shm(wlc_hw, offset, buf, len) \ + brcms_b_copyfrom_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) +#define brcms_b_copyto_shm(wlc_hw, offset, buf, len) \ + brcms_b_copyto_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) + +extern void brcms_b_core_phypll_reset(struct brcms_hardware *wlc_hw); +extern void brcms_b_core_phypll_ctl(struct brcms_hardware *wlc_hw, bool on); +extern void brcms_b_phyclk_fgc(struct brcms_hardware *wlc_hw, bool clk); +extern void brcms_b_macphyclk_set(struct brcms_hardware *wlc_hw, bool clk); +extern void brcms_b_phy_reset(struct brcms_hardware *wlc_hw); +extern void brcms_b_corereset(struct brcms_hardware *wlc_hw, u32 flags); +extern void brcms_b_reset(struct brcms_hardware *wlc_hw); +extern void brcms_b_init(struct brcms_hardware *wlc_hw, chanspec_t chanspec, + bool mute); +extern int brcms_b_up_prep(struct brcms_hardware *wlc_hw); +extern int brcms_b_up_finish(struct brcms_hardware *wlc_hw); +extern int brcms_b_bmac_down_prep(struct brcms_hardware *wlc_hw); +extern int brcms_b_down_finish(struct brcms_hardware *wlc_hw); +extern void brcms_b_switch_macfreq(struct brcms_hardware *wlc_hw, u8 spurmode); + +/* chanspec, ucode interface */ +extern void brcms_b_set_chanspec(struct brcms_hardware *wlc_hw, + chanspec_t chanspec, + bool mute, struct txpwr_limits *txpwr); + +extern int brcms_b_xmtfifo_sz_get(struct brcms_hardware *wlc_hw, uint fifo, + uint *blocks); +extern void brcms_b_mhf(struct brcms_hardware *wlc_hw, u8 idx, u16 mask, + u16 val, int bands); +extern void brcms_b_mctrl(struct brcms_hardware *wlc_hw, u32 mask, u32 val); +extern u16 brcms_b_mhf_get(struct brcms_hardware *wlc_hw, u8 idx, int bands); +extern void brcms_b_txant_set(struct brcms_hardware *wlc_hw, u16 phytxant); +extern u16 brcms_b_get_txant(struct brcms_hardware *wlc_hw); +extern void brcms_b_antsel_type_set(struct brcms_hardware *wlc_hw, + u8 antsel_type); +extern int brcms_b_state_get(struct brcms_hardware *wlc_hw, + struct brcms_b_state *state); +extern void brcms_b_write_shm(struct brcms_hardware *wlc_hw, uint offset, + u16 v); +extern u16 brcms_b_read_shm(struct brcms_hardware *wlc_hw, uint offset); +extern void brcms_b_write_template_ram(struct brcms_hardware *wlc_hw, + int offset, int len, void *buf); +extern void brcms_b_copyfrom_vars(struct brcms_hardware *wlc_hw, char **buf, + uint *len); + +extern void brcms_b_hw_etheraddr(struct brcms_hardware *wlc_hw, + u8 *ea); + +extern bool brcms_b_radio_read_hwdisabled(struct brcms_hardware *wlc_hw); +extern void brcms_b_set_shortslot(struct brcms_hardware *wlc_hw, + bool shortslot); +extern void brcms_b_band_stf_ss_set(struct brcms_hardware *wlc_hw, + u8 stf_mode); + +extern void brcms_b_wait_for_wake(struct brcms_hardware *wlc_hw); + +extern void brcms_c_ucode_wake_override_set(struct brcms_hardware *wlc_hw, + u32 override_bit); +extern void brcms_c_ucode_wake_override_clear(struct brcms_hardware *wlc_hw, + u32 override_bit); + +extern void brcms_b_set_addrmatch(struct brcms_hardware *wlc_hw, + int match_reg_offset, + const u8 *addr); +extern void brcms_b_write_hw_bcntemplates(struct brcms_hardware *wlc_hw, + void *bcn, int len, bool both); + +extern void brcms_b_read_tsf(struct brcms_hardware *wlc_hw, u32 *tsf_l_ptr, + u32 *tsf_h_ptr); +extern void brcms_b_set_cwmin(struct brcms_hardware *wlc_hw, u16 newmin); +extern void brcms_b_set_cwmax(struct brcms_hardware *wlc_hw, u16 newmax); + +extern void brcms_b_retrylimit_upd(struct brcms_hardware *wlc_hw, u16 SRL, + u16 LRL); + +extern void brcms_b_fifoerrors(struct brcms_hardware *wlc_hw); + + +/* API for BMAC driver (e.g. wlc_phy.c etc) */ + +extern void brcms_b_bw_set(struct brcms_hardware *wlc_hw, u16 bw); +extern void brcms_b_pllreq(struct brcms_hardware *wlc_hw, bool set, + mbool req_bit); +extern void brcms_b_hw_up(struct brcms_hardware *wlc_hw); +extern u16 brcms_b_rate_shm_offset(struct brcms_hardware *wlc_hw, u8 rate); +extern void brcms_b_antsel_set(struct brcms_hardware *wlc_hw, + u32 antsel_avail); + +#endif /* _BRCM_BOTTOM_MAC_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c b/drivers/staging/brcm80211/brcmsmac/channel.c index a3a2bf9b4f1..f59693e1d8a 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.c +++ b/drivers/staging/brcm80211/brcmsmac/channel.c @@ -14,109 +14,99 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> #include <linux/types.h> -#include <linux/module.h> -#include <linux/pci.h> - -#include <bcmdefs.h> -#include <bcmutils.h> -#include <bcmnvram.h> -#include <aiutils.h> -#include <sbhnddma.h> -#include <wlioctl.h> - -#include "wlc_types.h" -#include "d11.h" -#include "wlc_cfg.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_bmac.h" -#include "wlc_rate.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wlc_stf.h" -#include "wl_dbg.h" - -#define VALID_CHANNEL20_DB(wlc, val) wlc_valid_channel20_db((wlc)->cmi, val) +#include <net/mac80211.h> + +#include <defs.h> +#include "pub.h" +#include "phy/phy_hal.h" +#include "bmac.h" +#include "main.h" +#include "stf.h" +#include "channel.h" + +#define VALID_CHANNEL20_DB(wlc, val) brcms_c_valid_channel20_db((wlc)->cmi, val) #define VALID_CHANNEL20_IN_BAND(wlc, bandunit, val) \ - wlc_valid_channel20_in_band((wlc)->cmi, bandunit, val) -#define VALID_CHANNEL20(wlc, val) wlc_valid_channel20((wlc)->cmi, val) + brcms_c_valid_channel20_in_band((wlc)->cmi, bandunit, val) +#define VALID_CHANNEL20(wlc, val) brcms_c_valid_channel20((wlc)->cmi, val) -typedef struct wlc_cm_band { - u8 locale_flags; /* locale_info_t flags */ +struct brcms_cm_band { + u8 locale_flags; /* struct locale_info flags */ chanvec_t valid_channels; /* List of valid channels in the country */ const chanvec_t *restricted_channels; /* List of restricted use channels */ const chanvec_t *radar_channels; /* List of radar sensitive channels */ u8 PAD[8]; -} wlc_cm_band_t; +}; -struct wlc_cm_info { - struct wlc_pub *pub; - struct wlc_info *wlc; - char srom_ccode[WLC_CNTRY_BUF_SZ]; /* Country Code in SROM */ +struct brcms_cm_info { + struct brcms_pub *pub; + struct brcms_c_info *wlc; + char srom_ccode[BRCM_CNTRY_BUF_SZ]; /* Country Code in SROM */ uint srom_regrev; /* Regulatory Rev for the SROM ccode */ - const country_info_t *country; /* current country def */ - char ccode[WLC_CNTRY_BUF_SZ]; /* current internal Country Code */ + const struct country_info *country; /* current country def */ + char ccode[BRCM_CNTRY_BUF_SZ]; /* current internal Country Code */ uint regrev; /* current Regulatory Revision */ - char country_abbrev[WLC_CNTRY_BUF_SZ]; /* current advertised ccode */ - wlc_cm_band_t bandstate[MAXBANDS]; /* per-band state (one per phy/radio) */ + char country_abbrev[BRCM_CNTRY_BUF_SZ]; /* current advertised ccode */ + /* per-band state (one per phy/radio) */ + struct brcms_cm_band bandstate[MAXBANDS]; /* quiet channels currently for radar sensitivity or 11h support */ chanvec_t quiet_channels; /* channels on which we cannot transmit */ }; -static int wlc_channels_init(wlc_cm_info_t *wlc_cm, - const country_info_t *country); -static void wlc_set_country_common(wlc_cm_info_t *wlc_cm, +static int brcms_c_channels_init(struct brcms_cm_info *wlc_cm, + const struct country_info *country); +static void brcms_c_set_country_common(struct brcms_cm_info *wlc_cm, const char *country_abbrev, const char *ccode, uint regrev, - const country_info_t *country); -static int wlc_set_countrycode(wlc_cm_info_t *wlc_cm, const char *ccode); -static int wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, + const struct country_info *country); +static int brcms_c_set_countrycode(struct brcms_cm_info *wlc_cm, + const char *ccode); +static int brcms_c_set_countrycode_rev(struct brcms_cm_info *wlc_cm, const char *country_abbrev, const char *ccode, int regrev); -static int wlc_country_aggregate_map(wlc_cm_info_t *wlc_cm, const char *ccode, - char *mapped_ccode, uint *mapped_regrev); -static const country_info_t *wlc_country_lookup_direct(const char *ccode, - uint regrev); -static const country_info_t *wlc_countrycode_map(wlc_cm_info_t *wlc_cm, - const char *ccode, - char *mapped_ccode, - uint *mapped_regrev); -static void wlc_channels_commit(wlc_cm_info_t *wlc_cm); -static void wlc_quiet_channels_reset(wlc_cm_info_t *wlc_cm); -static bool wlc_quiet_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec); -static bool wlc_valid_channel20_db(wlc_cm_info_t *wlc_cm, uint val); -static bool wlc_valid_channel20_in_band(wlc_cm_info_t *wlc_cm, uint bandunit, - uint val); -static bool wlc_valid_channel20(wlc_cm_info_t *wlc_cm, uint val); -static const country_info_t *wlc_country_lookup(struct wlc_info *wlc, - const char *ccode); -static void wlc_locale_get_channels(const locale_info_t *locale, +static int brcms_c_country_aggregate_map(struct brcms_cm_info *wlc_cm, + const char *ccode, + char *mapped_ccode, uint *mapped_regrev); + +static const struct country_info * +brcms_c_country_lookup_direct(const char *ccode, uint regrev); + +static const struct country_info * +brcms_c_countrycode_map(struct brcms_cm_info *wlc_cm, + const char *ccode, char *mapped_ccode, + uint *mapped_regrev); + +static void brcms_c_channels_commit(struct brcms_cm_info *wlc_cm); +static void brcms_c_quiet_channels_reset(struct brcms_cm_info *wlc_cm); +static bool brcms_c_quiet_chanspec(struct brcms_cm_info *wlc_cm, + chanspec_t chspec); +static bool brcms_c_valid_channel20_db(struct brcms_cm_info *wlc_cm, uint val); +static bool brcms_c_valid_channel20_in_band(struct brcms_cm_info *wlc_cm, + uint bandunit, uint val); +static bool brcms_c_valid_channel20(struct brcms_cm_info *wlc_cm, uint val); + +static const struct country_info * +brcms_c_country_lookup(struct brcms_c_info *wlc, const char *ccode); + +static void brcms_c_locale_get_channels(const struct locale_info *locale, chanvec_t *valid_channels); -static const locale_info_t *wlc_get_locale_2g(u8 locale_idx); -static const locale_info_t *wlc_get_locale_5g(u8 locale_idx); -static bool wlc_japan(struct wlc_info *wlc); -static bool wlc_japan_ccode(const char *ccode); -static void wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm_info_t * - wlc_cm, - struct - txpwr_limits - *txpwr, - u8 - local_constraint_qdbm); -static void wlc_locale_add_channels(chanvec_t *target, +static const struct locale_info *brcms_c_get_locale_2g(u8 locale_idx); +static const struct locale_info *brcms_c_get_locale_5g(u8 locale_idx); +static bool brcms_c_japan(struct brcms_c_info *wlc); +static bool brcms_c_japan_ccode(const char *ccode); +static void brcms_c_channel_min_txpower_limits_with_local_constraint( + struct brcms_cm_info *wlc_cm, struct txpwr_limits *txpwr, + u8 local_constraint_qdbm); +static void brcms_c_locale_add_channels(chanvec_t *target, const chanvec_t *channels); -static const locale_mimo_info_t *wlc_get_mimo_2g(u8 locale_idx); -static const locale_mimo_info_t *wlc_get_mimo_5g(u8 locale_idx); +static const struct locale_mimo_info *brcms_c_get_mimo_2g(u8 locale_idx); +static const struct locale_mimo_info *brcms_c_get_mimo_5g(u8 locale_idx); /* QDB() macro takes a dB value and converts to a quarter dB value */ #ifdef QDB #undef QDB #endif -#define QDB(n) ((n) * WLC_TXPWR_DB_FACTOR) +#define QDB(n) ((n) * BRCMS_TXPWR_DB_FACTOR) /* Regulatory Matrix Spreadsheet (CLM) MIMO v3.7.9 */ @@ -398,7 +388,7 @@ static const chanvec_t *g_table_locale_base[] = { &locale_5g_HIGH4 }; -static void wlc_locale_add_channels(chanvec_t *target, +static void brcms_c_locale_add_channels(chanvec_t *target, const chanvec_t *channels) { u8 i; @@ -407,7 +397,7 @@ static void wlc_locale_add_channels(chanvec_t *target, } } -static void wlc_locale_get_channels(const locale_info_t *locale, +static void brcms_c_locale_get_channels(const struct locale_info *locale, chanvec_t *channels) { u8 i; @@ -416,7 +406,7 @@ static void wlc_locale_get_channels(const locale_info_t *locale, for (i = 0; i < ARRAY_SIZE(g_table_locale_base); i++) { if (locale->valid_channels & (1 << i)) { - wlc_locale_add_channels(channels, + brcms_c_locale_add_channels(channels, g_table_locale_base[i]); } } @@ -425,43 +415,43 @@ static void wlc_locale_get_channels(const locale_info_t *locale, /* * Locale Definitions - 2.4 GHz */ -static const locale_info_t locale_i = { /* locale i. channel 1 - 13 */ +static const struct locale_info locale_i = { /* locale i. channel 1 - 13 */ LOCALE_CHAN_01_11 | LOCALE_CHAN_12_13, LOCALE_RADAR_SET_NONE, LOCALE_RESTRICTED_SET_2G_SHORT, {QDB(19), QDB(19), QDB(19), QDB(19), QDB(19), QDB(19)}, {20, 20, 20, 0}, - WLC_EIRP + BRCMS_EIRP }; /* * Locale Definitions - 5 GHz */ -static const locale_info_t locale_11 = { +static const struct locale_info locale_11 = { /* locale 11. channel 36 - 48, 52 - 64, 100 - 140, 149 - 165 */ LOCALE_CHAN_36_64 | LOCALE_CHAN_100_140 | LOCALE_CHAN_149_165, LOCALE_RADAR_SET_1, LOCALE_RESTRICTED_NONE, {QDB(21), QDB(21), QDB(21), QDB(21), QDB(21)}, {23, 23, 23, 30, 30}, - WLC_EIRP | WLC_DFS_EU + BRCMS_EIRP | BRCMS_DFS_EU }; #define LOCALE_2G_IDX_i 0 -static const locale_info_t *g_locale_2g_table[] = { +static const struct locale_info *g_locale_2g_table[] = { &locale_i }; #define LOCALE_5G_IDX_11 0 -static const locale_info_t *g_locale_5g_table[] = { +static const struct locale_info *g_locale_5g_table[] = { &locale_11 }; /* * MIMO Locale Definitions - 2.4 GHz */ -static const locale_mimo_info_t locale_bn = { +static const struct locale_mimo_info locale_bn = { {QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), QDB(13), QDB(13)}, @@ -474,21 +464,21 @@ static const locale_mimo_info_t locale_bn = { /* locale mimo 2g indexes */ #define LOCALE_MIMO_IDX_bn 0 -static const locale_mimo_info_t *g_mimo_2g_table[] = { +static const struct locale_mimo_info *g_mimo_2g_table[] = { &locale_bn }; /* * MIMO Locale Definitions - 5 GHz */ -static const locale_mimo_info_t locale_11n = { +static const struct locale_mimo_info locale_11n = { { /* 12.5 dBm */ 50, 50, 50, QDB(15), QDB(15)}, {QDB(14), QDB(15), QDB(15), QDB(15), QDB(15)}, 0 }; #define LOCALE_MIMO_IDX_11n 0 -static const locale_mimo_info_t *g_mimo_5g_table[] = { +static const struct locale_mimo_info *g_mimo_5g_table[] = { &locale_11n }; @@ -510,8 +500,8 @@ static const locale_mimo_info_t *g_mimo_5g_table[] = { #define LOCALES(band2, band5, mimo2, mimo5) {LC_2G(band2), LC_5G(band5), LC(mimo2), LC(mimo5)} static const struct { - char abbrev[WLC_CNTRY_BUF_SZ]; /* country abbreviation */ - country_info_t country; + char abbrev[BRCM_CNTRY_BUF_SZ]; /* country abbreviation */ + struct country_info country; } cntry_locales[] = { { "X2", LOCALES(i, 11, bn, 11n)}, /* Worldwide RoW 2 */ @@ -594,7 +584,7 @@ struct chan20_info chan20_info[] = { }; #endif /* SUPPORT_40MHZ */ -static const locale_info_t *wlc_get_locale_2g(u8 locale_idx) +static const struct locale_info *brcms_c_get_locale_2g(u8 locale_idx) { if (locale_idx >= ARRAY_SIZE(g_locale_2g_table)) { return NULL; /* error condition */ @@ -602,7 +592,7 @@ static const locale_info_t *wlc_get_locale_2g(u8 locale_idx) return g_locale_2g_table[locale_idx]; } -static const locale_info_t *wlc_get_locale_5g(u8 locale_idx) +static const struct locale_info *brcms_c_get_locale_5g(u8 locale_idx) { if (locale_idx >= ARRAY_SIZE(g_locale_5g_table)) { return NULL; /* error condition */ @@ -610,7 +600,7 @@ static const locale_info_t *wlc_get_locale_5g(u8 locale_idx) return g_locale_5g_table[locale_idx]; } -static const locale_mimo_info_t *wlc_get_mimo_2g(u8 locale_idx) +static const struct locale_mimo_info *brcms_c_get_mimo_2g(u8 locale_idx) { if (locale_idx >= ARRAY_SIZE(g_mimo_2g_table)) { return NULL; @@ -618,7 +608,7 @@ static const locale_mimo_info_t *wlc_get_mimo_2g(u8 locale_idx) return g_mimo_2g_table[locale_idx]; } -static const locale_mimo_info_t *wlc_get_mimo_5g(u8 locale_idx) +static const struct locale_mimo_info *brcms_c_get_mimo_5g(u8 locale_idx) { if (locale_idx >= ARRAY_SIZE(g_mimo_5g_table)) { return NULL; @@ -626,17 +616,17 @@ static const locale_mimo_info_t *wlc_get_mimo_5g(u8 locale_idx) return g_mimo_5g_table[locale_idx]; } -wlc_cm_info_t *wlc_channel_mgr_attach(struct wlc_info *wlc) +struct brcms_cm_info *brcms_c_channel_mgr_attach(struct brcms_c_info *wlc) { - wlc_cm_info_t *wlc_cm; - char country_abbrev[WLC_CNTRY_BUF_SZ]; - const country_info_t *country; - struct wlc_pub *pub = wlc->pub; + struct brcms_cm_info *wlc_cm; + char country_abbrev[BRCM_CNTRY_BUF_SZ]; + const struct country_info *country; + struct brcms_pub *pub = wlc->pub; char *ccode; BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - wlc_cm = kzalloc(sizeof(wlc_cm_info_t), GFP_ATOMIC); + wlc_cm = kzalloc(sizeof(struct brcms_cm_info), GFP_ATOMIC); if (wlc_cm == NULL) { wiphy_err(wlc->wiphy, "wl%d: %s: out of memory", pub->unit, __func__); @@ -649,31 +639,33 @@ wlc_cm_info_t *wlc_channel_mgr_attach(struct wlc_info *wlc) /* store the country code for passing up as a regulatory hint */ ccode = getvar(wlc->pub->vars, "ccode"); if (ccode) { - strncpy(wlc->pub->srom_ccode, ccode, WLC_CNTRY_BUF_SZ - 1); + strncpy(wlc->pub->srom_ccode, ccode, BRCM_CNTRY_BUF_SZ - 1); } /* internal country information which must match regulatory constraints in firmware */ - memset(country_abbrev, 0, WLC_CNTRY_BUF_SZ); + memset(country_abbrev, 0, BRCM_CNTRY_BUF_SZ); strncpy(country_abbrev, "X2", sizeof(country_abbrev) - 1); - country = wlc_country_lookup(wlc, country_abbrev); + country = brcms_c_country_lookup(wlc, country_abbrev); /* save default country for exiting 11d regulatory mode */ - strncpy(wlc->country_default, country_abbrev, WLC_CNTRY_BUF_SZ - 1); + strncpy(wlc->country_default, country_abbrev, BRCM_CNTRY_BUF_SZ - 1); /* initialize autocountry_default to driver default */ - strncpy(wlc->autocountry_default, "X2", WLC_CNTRY_BUF_SZ - 1); + strncpy(wlc->autocountry_default, "X2", BRCM_CNTRY_BUF_SZ - 1); - wlc_set_countrycode(wlc_cm, country_abbrev); + brcms_c_set_countrycode(wlc_cm, country_abbrev); return wlc_cm; } -void wlc_channel_mgr_detach(wlc_cm_info_t *wlc_cm) +void brcms_c_channel_mgr_detach(struct brcms_cm_info *wlc_cm) { kfree(wlc_cm); } -u8 wlc_channel_locale_flags_in_band(wlc_cm_info_t *wlc_cm, uint bandunit) +u8 +brcms_c_channel_locale_flags_in_band(struct brcms_cm_info *wlc_cm, + uint bandunit) { return wlc_cm->bandstate[bandunit].locale_flags; } @@ -681,20 +673,21 @@ u8 wlc_channel_locale_flags_in_band(wlc_cm_info_t *wlc_cm, uint bandunit) /* set the driver's current country and regulatory information using a country code * as the source. Lookup built in country information found with the country code. */ -static int wlc_set_countrycode(wlc_cm_info_t *wlc_cm, const char *ccode) +static int +brcms_c_set_countrycode(struct brcms_cm_info *wlc_cm, const char *ccode) { - char country_abbrev[WLC_CNTRY_BUF_SZ]; - strncpy(country_abbrev, ccode, WLC_CNTRY_BUF_SZ); - return wlc_set_countrycode_rev(wlc_cm, country_abbrev, ccode, -1); + char country_abbrev[BRCM_CNTRY_BUF_SZ]; + strncpy(country_abbrev, ccode, BRCM_CNTRY_BUF_SZ); + return brcms_c_set_countrycode_rev(wlc_cm, country_abbrev, ccode, -1); } static int -wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, +brcms_c_set_countrycode_rev(struct brcms_cm_info *wlc_cm, const char *country_abbrev, const char *ccode, int regrev) { - const country_info_t *country; - char mapped_ccode[WLC_CNTRY_BUF_SZ]; + const struct country_info *country; + char mapped_ccode[BRCM_CNTRY_BUF_SZ]; uint mapped_regrev; /* if regrev is -1, lookup the mapped country code, @@ -703,12 +696,12 @@ wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, if (regrev == -1) { /* map the country code to a built-in country code, regrev, and country_info */ country = - wlc_countrycode_map(wlc_cm, ccode, mapped_ccode, + brcms_c_countrycode_map(wlc_cm, ccode, mapped_ccode, &mapped_regrev); } else { /* find the matching built-in country definition */ - country = wlc_country_lookup_direct(ccode, regrev); - strncpy(mapped_ccode, ccode, WLC_CNTRY_BUF_SZ); + country = brcms_c_country_lookup_direct(ccode, regrev); + strncpy(mapped_ccode, ccode, BRCM_CNTRY_BUF_SZ); mapped_regrev = regrev; } @@ -716,7 +709,7 @@ wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, return -EINVAL; /* set the driver state for the country */ - wlc_set_country_common(wlc_cm, country_abbrev, mapped_ccode, + brcms_c_set_country_common(wlc_cm, country_abbrev, mapped_ccode, mapped_regrev, country); return 0; @@ -726,49 +719,49 @@ wlc_set_countrycode_rev(wlc_cm_info_t *wlc_cm, * as the source. Look up built in country information found with the country code. */ static void -wlc_set_country_common(wlc_cm_info_t *wlc_cm, +brcms_c_set_country_common(struct brcms_cm_info *wlc_cm, const char *country_abbrev, const char *ccode, uint regrev, - const country_info_t *country) + const struct country_info *country) { - const locale_mimo_info_t *li_mimo; - const locale_info_t *locale; - struct wlc_info *wlc = wlc_cm->wlc; - char prev_country_abbrev[WLC_CNTRY_BUF_SZ]; + const struct locale_mimo_info *li_mimo; + const struct locale_info *locale; + struct brcms_c_info *wlc = wlc_cm->wlc; + char prev_country_abbrev[BRCM_CNTRY_BUF_SZ]; /* save current country state */ wlc_cm->country = country; - memset(&prev_country_abbrev, 0, WLC_CNTRY_BUF_SZ); + memset(&prev_country_abbrev, 0, BRCM_CNTRY_BUF_SZ); strncpy(prev_country_abbrev, wlc_cm->country_abbrev, - WLC_CNTRY_BUF_SZ - 1); + BRCM_CNTRY_BUF_SZ - 1); - strncpy(wlc_cm->country_abbrev, country_abbrev, WLC_CNTRY_BUF_SZ - 1); - strncpy(wlc_cm->ccode, ccode, WLC_CNTRY_BUF_SZ - 1); + strncpy(wlc_cm->country_abbrev, country_abbrev, BRCM_CNTRY_BUF_SZ - 1); + strncpy(wlc_cm->ccode, ccode, BRCM_CNTRY_BUF_SZ - 1); wlc_cm->regrev = regrev; /* disable/restore nmode based on country regulations */ - li_mimo = wlc_get_mimo_2g(country->locale_mimo_2G); - if (li_mimo && (li_mimo->flags & WLC_NO_MIMO)) { - wlc_set_nmode(wlc, OFF); + li_mimo = brcms_c_get_mimo_2g(country->locale_mimo_2G); + if (li_mimo && (li_mimo->flags & BRCMS_NO_MIMO)) { + brcms_c_set_nmode(wlc, OFF); wlc->stf->no_cddstbc = true; } else { wlc->stf->no_cddstbc = false; if (N_ENAB(wlc->pub) != wlc->protection->nmode_user) - wlc_set_nmode(wlc, wlc->protection->nmode_user); + brcms_c_set_nmode(wlc, wlc->protection->nmode_user); } - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); + brcms_c_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); + brcms_c_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); /* set or restore gmode as required by regulatory */ - locale = wlc_get_locale_2g(country->locale_2G); - if (locale && (locale->flags & WLC_NO_OFDM)) { - wlc_set_gmode(wlc, GMODE_LEGACY_B, false); + locale = brcms_c_get_locale_2g(country->locale_2G); + if (locale && (locale->flags & BRCMS_NO_OFDM)) { + brcms_c_set_gmode(wlc, GMODE_LEGACY_B, false); } else { - wlc_set_gmode(wlc, wlc->protection->gmode_user, false); + brcms_c_set_gmode(wlc, wlc->protection->gmode_user, false); } - wlc_channels_init(wlc_cm, country); + brcms_c_channels_init(wlc_cm, country); return; } @@ -776,40 +769,39 @@ wlc_set_country_common(wlc_cm_info_t *wlc_cm, /* Lookup a country info structure from a null terminated country code * The lookup is case sensitive. */ -static const country_info_t *wlc_country_lookup(struct wlc_info *wlc, - const char *ccode) +static const struct country_info * +brcms_c_country_lookup(struct brcms_c_info *wlc, const char *ccode) { - const country_info_t *country; - char mapped_ccode[WLC_CNTRY_BUF_SZ]; + const struct country_info *country; + char mapped_ccode[BRCM_CNTRY_BUF_SZ]; uint mapped_regrev; /* map the country code to a built-in country code, regrev, and country_info struct */ - country = - wlc_countrycode_map(wlc->cmi, ccode, mapped_ccode, &mapped_regrev); + country = brcms_c_countrycode_map(wlc->cmi, ccode, mapped_ccode, + &mapped_regrev); return country; } -static const country_info_t *wlc_countrycode_map(wlc_cm_info_t *wlc_cm, - const char *ccode, - char *mapped_ccode, - uint *mapped_regrev) +static const struct country_info * +brcms_c_countrycode_map(struct brcms_cm_info *wlc_cm, const char *ccode, + char *mapped_ccode, uint *mapped_regrev) { - struct wlc_info *wlc = wlc_cm->wlc; - const country_info_t *country; + struct brcms_c_info *wlc = wlc_cm->wlc; + const struct country_info *country; uint srom_regrev = wlc_cm->srom_regrev; const char *srom_ccode = wlc_cm->srom_ccode; int mapped; /* check for currently supported ccode size */ - if (strlen(ccode) > (WLC_CNTRY_BUF_SZ - 1)) { + if (strlen(ccode) > (BRCM_CNTRY_BUF_SZ - 1)) { wiphy_err(wlc->wiphy, "wl%d: %s: ccode \"%s\" too long for " "match\n", wlc->pub->unit, __func__, ccode); return NULL; } /* default mapping is the given ccode and regrev 0 */ - strncpy(mapped_ccode, ccode, WLC_CNTRY_BUF_SZ); + strncpy(mapped_ccode, ccode, BRCM_CNTRY_BUF_SZ); *mapped_regrev = 0; /* If the desired country code matches the srom country code, @@ -822,25 +814,25 @@ static const country_info_t *wlc_countrycode_map(wlc_cm_info_t *wlc_cm, wiphy_err(wlc->wiphy, "srom_code == ccode %s\n", __func__); } else { mapped = - wlc_country_aggregate_map(wlc_cm, ccode, mapped_ccode, + brcms_c_country_aggregate_map(wlc_cm, ccode, mapped_ccode, mapped_regrev); } /* find the matching built-in country definition */ - country = wlc_country_lookup_direct(mapped_ccode, *mapped_regrev); + country = brcms_c_country_lookup_direct(mapped_ccode, *mapped_regrev); /* if there is not an exact rev match, default to rev zero */ if (country == NULL && *mapped_regrev != 0) { *mapped_regrev = 0; country = - wlc_country_lookup_direct(mapped_ccode, *mapped_regrev); + brcms_c_country_lookup_direct(mapped_ccode, *mapped_regrev); } return country; } static int -wlc_country_aggregate_map(wlc_cm_info_t *wlc_cm, const char *ccode, +brcms_c_country_aggregate_map(struct brcms_cm_info *wlc_cm, const char *ccode, char *mapped_ccode, uint *mapped_regrev) { return false; @@ -849,8 +841,8 @@ wlc_country_aggregate_map(wlc_cm_info_t *wlc_cm, const char *ccode, /* Lookup a country info structure from a null terminated country * abbreviation and regrev directly with no translation. */ -static const country_info_t *wlc_country_lookup_direct(const char *ccode, - uint regrev) +static const struct country_info * +brcms_c_country_lookup_direct(const char *ccode, uint regrev) { uint size, i; @@ -872,26 +864,27 @@ static const country_info_t *wlc_country_lookup_direct(const char *ccode, } static int -wlc_channels_init(wlc_cm_info_t *wlc_cm, const country_info_t *country) +brcms_c_channels_init(struct brcms_cm_info *wlc_cm, + const struct country_info *country) { - struct wlc_info *wlc = wlc_cm->wlc; + struct brcms_c_info *wlc = wlc_cm->wlc; uint i, j; - struct wlcband *band; - const locale_info_t *li; + struct brcms_band *band; + const struct locale_info *li; chanvec_t sup_chan; - const locale_mimo_info_t *li_mimo; + const struct locale_mimo_info *li_mimo; band = wlc->band; for (i = 0; i < NBANDS(wlc); i++, band = wlc->bandstate[OTHERBANDUNIT(wlc)]) { li = BAND_5G(band->bandtype) ? - wlc_get_locale_5g(country->locale_5G) : - wlc_get_locale_2g(country->locale_2G); + brcms_c_get_locale_5g(country->locale_5G) : + brcms_c_get_locale_2g(country->locale_2G); wlc_cm->bandstate[band->bandunit].locale_flags = li->flags; li_mimo = BAND_5G(band->bandtype) ? - wlc_get_mimo_5g(country->locale_mimo_5G) : - wlc_get_mimo_2g(country->locale_mimo_2G); + brcms_c_get_mimo_5g(country->locale_mimo_5G) : + brcms_c_get_mimo_2g(country->locale_mimo_2G); /* merge the mimo non-mimo locale flags */ wlc_cm->bandstate[band->bandunit].locale_flags |= @@ -907,7 +900,7 @@ wlc_channels_init(wlc_cm_info_t *wlc_cm, const country_info_t *country) */ wlc_phy_chanspec_band_validch(band->pi, band->bandtype, &sup_chan); - wlc_locale_get_channels(li, + brcms_c_locale_get_channels(li, &wlc_cm->bandstate[band->bandunit]. valid_channels); for (j = 0; j < sizeof(chanvec_t); j++) @@ -915,8 +908,8 @@ wlc_channels_init(wlc_cm_info_t *wlc_cm, const country_info_t *country) vec[j] &= sup_chan.vec[j]; } - wlc_quiet_channels_reset(wlc_cm); - wlc_channels_commit(wlc_cm); + brcms_c_quiet_channels_reset(wlc_cm); + brcms_c_channels_commit(wlc_cm); return 0; } @@ -924,9 +917,9 @@ wlc_channels_init(wlc_cm_info_t *wlc_cm, const country_info_t *country) /* Update the radio state (enable/disable) and tx power targets * based on a new set of channel/regulatory information */ -static void wlc_channels_commit(wlc_cm_info_t *wlc_cm) +static void brcms_c_channels_commit(struct brcms_cm_info *wlc_cm) { - struct wlc_info *wlc = wlc_cm->wlc; + struct brcms_c_info *wlc = wlc_cm->wlc; uint chan; struct txpwr_limits txpwr; @@ -959,25 +952,24 @@ static void wlc_channels_commit(wlc_cm_info_t *wlc_cm) */ if (NBANDS(wlc) > 1 || BAND_2G(wlc->band->bandtype)) { wlc_phy_chanspec_ch14_widefilter_set(wlc->band->pi, - wlc_japan(wlc) ? true : + brcms_c_japan(wlc) ? true : false); } if (wlc->pub->up && chan != INVCHANNEL) { - wlc_channel_reg_limits(wlc_cm, wlc->chanspec, &txpwr); - wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm, - &txpwr, - WLC_TXPWR_MAX); + brcms_c_channel_reg_limits(wlc_cm, wlc->chanspec, &txpwr); + brcms_c_channel_min_txpower_limits_with_local_constraint(wlc_cm, + &txpwr, BRCMS_TXPWR_MAX); wlc_phy_txpower_limit_set(wlc->band->pi, &txpwr, wlc->chanspec); } } /* reset the quiet channels vector to the union of the restricted and radar channel sets */ -static void wlc_quiet_channels_reset(wlc_cm_info_t *wlc_cm) +static void brcms_c_quiet_channels_reset(struct brcms_cm_info *wlc_cm) { - struct wlc_info *wlc = wlc_cm->wlc; + struct brcms_c_info *wlc = wlc_cm->wlc; uint i, j; - struct wlcband *band; + struct brcms_band *band; const chanvec_t *chanvec; memset(&wlc_cm->quiet_channels, 0, sizeof(chanvec_t)); @@ -994,7 +986,8 @@ static void wlc_quiet_channels_reset(wlc_cm_info_t *wlc_cm) } } -static bool wlc_quiet_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec) +static bool +brcms_c_quiet_chanspec(struct brcms_cm_info *wlc_cm, chanspec_t chspec) { return N_ENAB(wlc_cm->wlc->pub) && CHSPEC_IS40(chspec) ? (isset @@ -1011,9 +1004,9 @@ static bool wlc_quiet_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chspec) /* Is the channel valid for the current locale? (but don't consider channels not * available due to bandlocking) */ -static bool wlc_valid_channel20_db(wlc_cm_info_t *wlc_cm, uint val) +static bool brcms_c_valid_channel20_db(struct brcms_cm_info *wlc_cm, uint val) { - struct wlc_info *wlc = wlc_cm->wlc; + struct brcms_c_info *wlc = wlc_cm->wlc; return VALID_CHANNEL20(wlc, val) || (!wlc->bandlocked @@ -1021,17 +1014,17 @@ static bool wlc_valid_channel20_db(wlc_cm_info_t *wlc_cm, uint val) } /* Is the channel valid for the current locale and specified band? */ -static bool -wlc_valid_channel20_in_band(wlc_cm_info_t *wlc_cm, uint bandunit, uint val) +static bool brcms_c_valid_channel20_in_band(struct brcms_cm_info *wlc_cm, + uint bandunit, uint val) { return ((val < MAXCHANNEL) && isset(wlc_cm->bandstate[bandunit].valid_channels.vec, val)); } /* Is the channel valid for the current locale and current band? */ -static bool wlc_valid_channel20(wlc_cm_info_t *wlc_cm, uint val) +static bool brcms_c_valid_channel20(struct brcms_cm_info *wlc_cm, uint val) { - struct wlc_info *wlc = wlc_cm->wlc; + struct brcms_c_info *wlc = wlc_cm->wlc; return ((val < MAXCHANNEL) && isset(wlc_cm->bandstate[wlc->band->bandunit].valid_channels.vec, @@ -1039,10 +1032,9 @@ static bool wlc_valid_channel20(wlc_cm_info_t *wlc_cm, uint val) } static void -wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm_info_t *wlc_cm, - struct txpwr_limits *txpwr, - u8 - local_constraint_qdbm) +brcms_c_channel_min_txpower_limits_with_local_constraint( + struct brcms_cm_info *wlc_cm, struct txpwr_limits *txpwr, + u8 local_constraint_qdbm) { int j; @@ -1057,66 +1049,66 @@ wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm_info_t *wlc_cm, } /* 20 MHz Legacy OFDM CDD */ - for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_OFDM; j++) { txpwr->ofdm_cdd[j] = min(txpwr->ofdm_cdd[j], local_constraint_qdbm); } /* 40 MHz Legacy OFDM SISO */ - for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_OFDM; j++) { txpwr->ofdm_40_siso[j] = min(txpwr->ofdm_40_siso[j], local_constraint_qdbm); } /* 40 MHz Legacy OFDM CDD */ - for (j = 0; j < WLC_NUM_RATES_OFDM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_OFDM; j++) { txpwr->ofdm_40_cdd[j] = min(txpwr->ofdm_40_cdd[j], local_constraint_qdbm); } /* 20MHz MCS 0-7 SISO */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_MCS_1_STREAM; j++) { txpwr->mcs_20_siso[j] = min(txpwr->mcs_20_siso[j], local_constraint_qdbm); } /* 20MHz MCS 0-7 CDD */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_MCS_1_STREAM; j++) { txpwr->mcs_20_cdd[j] = min(txpwr->mcs_20_cdd[j], local_constraint_qdbm); } /* 20MHz MCS 0-7 STBC */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_MCS_1_STREAM; j++) { txpwr->mcs_20_stbc[j] = min(txpwr->mcs_20_stbc[j], local_constraint_qdbm); } /* 20MHz MCS 8-15 MIMO */ - for (j = 0; j < WLC_NUM_RATES_MCS_2_STREAM; j++) + for (j = 0; j < BRCMS_NUM_RATES_MCS_2_STREAM; j++) txpwr->mcs_20_mimo[j] = min(txpwr->mcs_20_mimo[j], local_constraint_qdbm); /* 40MHz MCS 0-7 SISO */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_MCS_1_STREAM; j++) { txpwr->mcs_40_siso[j] = min(txpwr->mcs_40_siso[j], local_constraint_qdbm); } /* 40MHz MCS 0-7 CDD */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_MCS_1_STREAM; j++) { txpwr->mcs_40_cdd[j] = min(txpwr->mcs_40_cdd[j], local_constraint_qdbm); } /* 40MHz MCS 0-7 STBC */ - for (j = 0; j < WLC_NUM_RATES_MCS_1_STREAM; j++) { + for (j = 0; j < BRCMS_NUM_RATES_MCS_1_STREAM; j++) { txpwr->mcs_40_stbc[j] = min(txpwr->mcs_40_stbc[j], local_constraint_qdbm); } /* 40MHz MCS 8-15 MIMO */ - for (j = 0; j < WLC_NUM_RATES_MCS_2_STREAM; j++) + for (j = 0; j < BRCMS_NUM_RATES_MCS_2_STREAM; j++) txpwr->mcs_40_mimo[j] = min(txpwr->mcs_40_mimo[j], local_constraint_qdbm); @@ -1126,162 +1118,172 @@ wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm_info_t *wlc_cm, } void -wlc_channel_set_chanspec(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, +brcms_c_channel_set_chanspec(struct brcms_cm_info *wlc_cm, chanspec_t chanspec, u8 local_constraint_qdbm) { - struct wlc_info *wlc = wlc_cm->wlc; + struct brcms_c_info *wlc = wlc_cm->wlc; struct txpwr_limits txpwr; - wlc_channel_reg_limits(wlc_cm, chanspec, &txpwr); + brcms_c_channel_reg_limits(wlc_cm, chanspec, &txpwr); - wlc_channel_min_txpower_limits_with_local_constraint(wlc_cm, &txpwr, + brcms_c_channel_min_txpower_limits_with_local_constraint(wlc_cm, &txpwr, local_constraint_qdbm); - wlc_bmac_set_chanspec(wlc->hw, chanspec, - (wlc_quiet_chanspec(wlc_cm, chanspec) != 0), + brcms_b_set_chanspec(wlc->hw, chanspec, + (brcms_c_quiet_chanspec(wlc_cm, chanspec) != 0), &txpwr); } #ifdef POWER_DBG -static void wlc_phy_txpower_limits_dump(txpwr_limits_t *txpwr) +static void wlc_phy_txpower_limits_dump(struct txpwr_limits *txpwr) { int i; char buf[80]; char fraction[4][4] = { " ", ".25", ".5 ", ".75" }; sprintf(buf, "CCK "); - for (i = 0; i < WLC_NUM_RATES_CCK; i++) { + for (i = 0; i < BRCMS_NUM_RATES_CCK; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->cck[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->cck[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->cck[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->cck[i] % BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "20 MHz OFDM SISO "); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_OFDM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->ofdm[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->ofdm[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->ofdm[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->ofdm[i] % BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "20 MHz OFDM CDD "); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_OFDM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->ofdm_cdd[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->ofdm_cdd[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->ofdm_cdd[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->ofdm_cdd[i] % BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "40 MHz OFDM SISO "); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_OFDM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->ofdm_40_siso[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->ofdm_40_siso[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->ofdm_40_siso[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->ofdm_40_siso[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "40 MHz OFDM CDD "); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_OFDM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->ofdm_40_cdd[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->ofdm_40_cdd[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->ofdm_40_cdd[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->ofdm_40_cdd[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "20 MHz MCS0-7 SISO "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_20_siso[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_20_siso[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs_20_siso[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_20_siso[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "20 MHz MCS0-7 CDD "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_20_cdd[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_20_cdd[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs_20_cdd[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_20_cdd[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "20 MHz MCS0-7 STBC "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_20_stbc[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_20_stbc[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs_20_stbc[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_20_stbc[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "20 MHz MCS8-15 SDM "); - for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_2_STREAM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_20_mimo[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_20_mimo[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs_20_mimo[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_20_mimo[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "40 MHz MCS0-7 SISO "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_40_siso[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_40_siso[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs_40_siso[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_40_siso[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "40 MHz MCS0-7 CDD "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_40_cdd[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_40_cdd[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs_40_cdd[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_40_cdd[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "40 MHz MCS0-7 STBC "); - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_40_stbc[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_40_stbc[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs_40_stbc[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_40_stbc[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); sprintf(buf, "40 MHz MCS8-15 SDM "); - for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_2_STREAM; i++) { sprintf(buf[strlen(buf)], " %2d%s", - txpwr->mcs_40_mimo[i] / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs_40_mimo[i] % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs_40_mimo[i] / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs_40_mimo[i] % + BRCMS_TXPWR_DB_FACTOR]); } printk(KERN_DEBUG "%s\n", buf); printk(KERN_DEBUG "MCS32 %2d%s\n", - txpwr->mcs32 / WLC_TXPWR_DB_FACTOR, - fraction[txpwr->mcs32 % WLC_TXPWR_DB_FACTOR]); + txpwr->mcs32 / BRCMS_TXPWR_DB_FACTOR, + fraction[txpwr->mcs32 % BRCMS_TXPWR_DB_FACTOR]); } #endif /* POWER_DBG */ void -wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, - txpwr_limits_t *txpwr) +brcms_c_channel_reg_limits(struct brcms_cm_info *wlc_cm, chanspec_t chanspec, + struct txpwr_limits *txpwr) { - struct wlc_info *wlc = wlc_cm->wlc; + struct brcms_c_info *wlc = wlc_cm->wlc; uint i; uint chan; int maxpwr; int delta; - const country_info_t *country; - struct wlcband *band; - const locale_info_t *li; + const struct country_info *country; + struct brcms_band *band; + const struct locale_info *li; int conducted_max; int conducted_ofdm_max; - const locale_mimo_info_t *li_mimo; + const struct locale_mimo_info *li_mimo; int maxpwr20, maxpwr40; int maxpwr_idx; uint j; - memset(txpwr, 0, sizeof(txpwr_limits_t)); + memset(txpwr, 0, sizeof(struct txpwr_limits)); - if (!wlc_valid_chanspec_db(wlc_cm, chanspec)) { - country = wlc_country_lookup(wlc, wlc->autocountry_default); + if (!brcms_c_valid_chanspec_db(wlc_cm, chanspec)) { + country = brcms_c_country_lookup(wlc, wlc->autocountry_default); if (country == NULL) return; } else { @@ -1289,16 +1291,16 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, } chan = CHSPEC_CHANNEL(chanspec); - band = wlc->bandstate[CHSPEC_WLCBANDUNIT(chanspec)]; + band = wlc->bandstate[CHSPEC_BANDUNIT(chanspec)]; li = BAND_5G(band->bandtype) ? - wlc_get_locale_5g(country->locale_5G) : - wlc_get_locale_2g(country->locale_2G); + brcms_c_get_locale_5g(country->locale_5G) : + brcms_c_get_locale_2g(country->locale_2G); li_mimo = BAND_5G(band->bandtype) ? - wlc_get_mimo_5g(country->locale_mimo_5G) : - wlc_get_mimo_2g(country->locale_mimo_2G); + brcms_c_get_mimo_5g(country->locale_mimo_5G) : + brcms_c_get_mimo_2g(country->locale_mimo_2G); - if (li->flags & WLC_EIRP) { + if (li->flags & BRCMS_EIRP) { delta = band->antgain; } else { delta = 0; @@ -1319,7 +1321,7 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, maxpwr = max(maxpwr, 0); maxpwr = min(maxpwr, conducted_max); - for (i = 0; i < WLC_NUM_RATES_CCK; i++) + for (i = 0; i < BRCMS_NUM_RATES_CCK; i++) txpwr->cck[i] = (u8) maxpwr; } @@ -1339,11 +1341,10 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, if (BAND_2G(band->bandtype)) maxpwr = min_t(int, maxpwr, txpwr->cck[0]); - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_OFDM; i++) txpwr->ofdm[i] = (u8) maxpwr; - } - for (i = 0; i < WLC_NUM_RATES_OFDM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_OFDM; i++) { /* OFDM 40 MHz SISO has the same power as the corresponding MCS0-7 rate unless * overriden by the locale specific code. We set this value to 0 as a * flag (presumably 0 dBm isn't a possibility) and then copy the MCS0-7 value @@ -1357,7 +1358,7 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, } /* MIMO/HT specific limits */ - if (li_mimo->flags & WLC_EIRP) { + if (li_mimo->flags & BRCMS_EIRP) { delta = band->antgain; } else { delta = 0; @@ -1379,7 +1380,7 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, maxpwr40 = max(maxpwr40, 0); /* Fill in the MCS 0-7 (SISO) rates */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { /* 20 MHz has the same power as the corresponding OFDM rate unless * overriden by the locale specific code. @@ -1389,7 +1390,7 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, } /* Fill in the MCS 0-7 CDD rates */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { txpwr->mcs_20_cdd[i] = (u8) maxpwr20; txpwr->mcs_40_cdd[i] = (u8) maxpwr40; } @@ -1405,20 +1406,20 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, } } - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { txpwr->mcs_20_siso[i] = (u8) maxpwr20; txpwr->mcs_40_siso[i] = (u8) maxpwr40; } } /* Fill in the MCS 0-7 STBC rates */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { txpwr->mcs_20_stbc[i] = 0; txpwr->mcs_40_stbc[i] = 0; } /* Fill in the MCS 8-15 SDM rates */ - for (i = 0; i < WLC_NUM_RATES_MCS_2_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_2_STREAM; i++) { txpwr->mcs_20_mimo[i] = (u8) maxpwr20; txpwr->mcs_40_mimo[i] = (u8) maxpwr40; } @@ -1426,7 +1427,7 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, /* Fill in MCS32 */ txpwr->mcs32 = (u8) maxpwr40; - for (i = 0, j = 0; i < WLC_NUM_RATES_OFDM; i++, j++) { + for (i = 0, j = 0; i < BRCMS_NUM_RATES_OFDM; i++, j++) { if (txpwr->ofdm_40_cdd[i] == 0) txpwr->ofdm_40_cdd[i] = txpwr->mcs_40_cdd[j]; if (i == 0) { @@ -1440,12 +1441,12 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, * provided explicitly. */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { if (txpwr->mcs_40_siso[i] == 0) txpwr->mcs_40_siso[i] = txpwr->mcs_40_cdd[i]; } - for (i = 0, j = 0; i < WLC_NUM_RATES_OFDM; i++, j++) { + for (i = 0, j = 0; i < BRCMS_NUM_RATES_OFDM; i++, j++) { if (txpwr->ofdm_40_siso[i] == 0) txpwr->ofdm_40_siso[i] = txpwr->mcs_40_siso[j]; if (i == 0) { @@ -1458,7 +1459,7 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, /* Copy the 20 and 40 MHz MCS0-7 CDD values to the corresponding STBC values if they weren't * provided explicitly. */ - for (i = 0; i < WLC_NUM_RATES_MCS_1_STREAM; i++) { + for (i = 0; i < BRCMS_NUM_RATES_MCS_1_STREAM; i++) { if (txpwr->mcs_20_stbc[i] == 0) txpwr->mcs_20_stbc[i] = txpwr->mcs_20_cdd[i]; @@ -1473,13 +1474,13 @@ wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, chanspec_t chanspec, } /* Returns true if currently set country is Japan or variant */ -static bool wlc_japan(struct wlc_info *wlc) +static bool brcms_c_japan(struct brcms_c_info *wlc) { - return wlc_japan_ccode(wlc->cmi->country_abbrev); + return brcms_c_japan_ccode(wlc->cmi->country_abbrev); } /* JP, J1 - J10 are Japan ccodes */ -static bool wlc_japan_ccode(const char *ccode) +static bool brcms_c_japan_ccode(const char *ccode) { return (ccode[0] == 'J' && (ccode[1] == 'P' || (ccode[1] >= '1' && ccode[1] <= '9'))); @@ -1490,20 +1491,21 @@ static bool wlc_japan_ccode(const char *ccode) * are valid 20MZH channels in this locale and they are also a legal HT combination */ static bool -wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband) +brcms_c_valid_chanspec_ext(struct brcms_cm_info *wlc_cm, chanspec_t chspec, + bool dualband) { - struct wlc_info *wlc = wlc_cm->wlc; + struct brcms_c_info *wlc = wlc_cm->wlc; u8 channel = CHSPEC_CHANNEL(chspec); /* check the chanspec */ - if (bcm_chspec_malformed(chspec)) { + if (brcmu_chspec_malformed(chspec)) { wiphy_err(wlc->wiphy, "wl%d: malformed chanspec 0x%x\n", wlc->pub->unit, chspec); return false; } if (CHANNEL_BANDUNIT(wlc_cm->wlc, channel) != - CHSPEC_WLCBANDUNIT(chspec)) + CHSPEC_BANDUNIT(chspec)) return false; /* Check a 20Mhz channel */ @@ -1517,12 +1519,12 @@ wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband) /* We know we are now checking a 40MHZ channel, so we should only be here * for NPHYS */ - if (WLCISNPHY(wlc->band) || WLCISSSLPNPHY(wlc->band)) { + if (BRCMS_ISNPHY(wlc->band) || BRCMS_ISSSLPNPHY(wlc->band)) { u8 upper_sideband = 0, idx; u8 num_ch20_entries = sizeof(chan20_info) / sizeof(struct chan20_info); - if (!VALID_40CHANSPEC_IN_BAND(wlc, CHSPEC_WLCBANDUNIT(chspec))) + if (!VALID_40CHANSPEC_IN_BAND(wlc, CHSPEC_BANDUNIT(chspec))) return false; if (dualband) { @@ -1551,7 +1553,7 @@ wlc_valid_chanspec_ext(wlc_cm_info_t *wlc_cm, chanspec_t chspec, bool dualband) return false; } -bool wlc_valid_chanspec_db(wlc_cm_info_t *wlc_cm, chanspec_t chspec) +bool brcms_c_valid_chanspec_db(struct brcms_cm_info *wlc_cm, chanspec_t chspec) { - return wlc_valid_chanspec_ext(wlc_cm, chspec, true); + return brcms_c_valid_chanspec_ext(wlc_cm, chspec, true); } diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_channel.h b/drivers/staging/brcm80211/brcmsmac/channel.h index b8dec5b39d8..d22f2f5f592 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_channel.h +++ b/drivers/staging/brcm80211/brcmsmac/channel.h @@ -14,12 +14,12 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _WLC_CHANNEL_H_ -#define _WLC_CHANNEL_H_ +#ifndef _BRCM_CHANNEL_H_ +#define _BRCM_CHANNEL_H_ -#define WLC_TXPWR_DB_FACTOR 4 /* conversion for phy txpwr cacluations that use .25 dB units */ +/* conversion for phy txpwr calculations that use .25 dB units */ +#define BRCMS_TXPWR_DB_FACTOR 4 -struct wlc_info; /* maxpwr mapping to 5GHz band channels: * maxpwr[0] - channels [34-48] @@ -47,43 +47,56 @@ struct wlc_info; #define CHANNEL_POWER_IDX_5G(c) \ (((c) < 52) ? 0 : (((c) < 62) ? 1 : (((c) < 100) ? 2 : (((c) < 149) ? 3 : 4)))) -#define WLC_MAXPWR_TBL_SIZE 6 /* max of BAND_5G_PWR_LVLS and 6 for 2.4 GHz */ -#define WLC_MAXPWR_MIMO_TBL_SIZE 14 /* max of BAND_5G_PWR_LVLS and 14 for 2.4 GHz */ +/* max of BAND_5G_PWR_LVLS and 6 for 2.4 GHz */ +#define BRCMS_MAXPWR_TBL_SIZE 6 +/* max of BAND_5G_PWR_LVLS and 14 for 2.4 GHz */ +#define BRCMS_MAXPWR_MIMO_TBL_SIZE 14 + +#define NBANDS(wlc) ((wlc)->pub->_nbands) +#define NBANDS_PUB(pub) ((pub)->_nbands) +#define NBANDS_HW(hw) ((hw)->_nbands) + +#define IS_SINGLEBAND_5G(device) 0 /* locale channel and power info. */ -typedef struct { +struct locale_info { u32 valid_channels; - u8 radar_channels; /* List of radar sensitive channels */ - u8 restricted_channels; /* List of channels used only if APs are detected */ - s8 maxpwr[WLC_MAXPWR_TBL_SIZE]; /* Max tx pwr in qdBm for each sub-band */ + /* List of radar sensitive channels */ + u8 radar_channels; + /* List of channels used only if APs are detected */ + u8 restricted_channels; + /* Max tx pwr in qdBm for each sub-band */ + s8 maxpwr[BRCMS_MAXPWR_TBL_SIZE]; s8 pub_maxpwr[BAND_5G_PWR_LVLS]; /* Country IE advertised max tx pwr in dBm * per sub-band */ u8 flags; -} locale_info_t; +}; /* bits for locale_info flags */ -#define WLC_PEAK_CONDUCTED 0x00 /* Peak for locals */ -#define WLC_EIRP 0x01 /* Flag for EIRP */ -#define WLC_DFS_TPC 0x02 /* Flag for DFS TPC */ -#define WLC_NO_OFDM 0x04 /* Flag for No OFDM */ -#define WLC_NO_40MHZ 0x08 /* Flag for No MIMO 40MHz */ -#define WLC_NO_MIMO 0x10 /* Flag for No MIMO, 20 or 40 MHz */ -#define WLC_RADAR_TYPE_EU 0x20 /* Flag for EU */ -#define WLC_DFS_FCC WLC_DFS_TPC /* Flag for DFS FCC */ -#define WLC_DFS_EU (WLC_DFS_TPC | WLC_RADAR_TYPE_EU) /* Flag for DFS EU */ - -#define ISDFS_EU(fl) (((fl) & WLC_DFS_EU) == WLC_DFS_EU) +#define BRCMS_PEAK_CONDUCTED 0x00 /* Peak for locals */ +#define BRCMS_EIRP 0x01 /* Flag for EIRP */ +#define BRCMS_DFS_TPC 0x02 /* Flag for DFS TPC */ +#define BRCMS_NO_OFDM 0x04 /* Flag for No OFDM */ +#define BRCMS_NO_40MHZ 0x08 /* Flag for No MIMO 40MHz */ +#define BRCMS_NO_MIMO 0x10 /* Flag for No MIMO, 20 or 40 MHz */ +#define BRCMS_RADAR_TYPE_EU 0x20 /* Flag for EU */ +#define BRCMS_DFS_FCC BRCMS_DFS_TPC /* Flag for DFS FCC */ +#define BRCMS_DFS_EU (BRCMS_DFS_TPC | BRCMS_RADAR_TYPE_EU) /* Flag for DFS EU */ + +#define ISDFS_EU(fl) (((fl) & BRCMS_DFS_EU) == BRCMS_DFS_EU) /* locale per-channel tx power limits for MIMO frames * maxpwr arrays are index by channel for 2.4 GHz limits, and * by sub-band for 5 GHz limits using CHANNEL_POWER_IDX_5G(channel) */ -typedef struct { - s8 maxpwr20[WLC_MAXPWR_MIMO_TBL_SIZE]; /* tx 20 MHz power limits, qdBm units */ - s8 maxpwr40[WLC_MAXPWR_MIMO_TBL_SIZE]; /* tx 40 MHz power limits, qdBm units */ +struct locale_mimo_info { + /* tx 20 MHz power limits, qdBm units */ + s8 maxpwr20[BRCMS_MAXPWR_MIMO_TBL_SIZE]; + /* tx 40 MHz power limits, qdBm units */ + s8 maxpwr40[BRCMS_MAXPWR_MIMO_TBL_SIZE]; u8 flags; -} locale_mimo_info_t; +}; extern const chanvec_t chanvec_all_2G; extern const chanvec_t chanvec_all_5G; @@ -98,22 +111,21 @@ struct country_info { const u8 locale_mimo_5G; /* 5G mimo info */ }; -typedef struct country_info country_info_t; - -typedef struct wlc_cm_info wlc_cm_info_t; +extern struct brcms_cm_info * +brcms_c_channel_mgr_attach(struct brcms_c_info *wlc); -extern wlc_cm_info_t *wlc_channel_mgr_attach(struct wlc_info *wlc); -extern void wlc_channel_mgr_detach(wlc_cm_info_t *wlc_cm); +extern void brcms_c_channel_mgr_detach(struct brcms_cm_info *wlc_cm); -extern u8 wlc_channel_locale_flags_in_band(wlc_cm_info_t *wlc_cm, +extern u8 brcms_c_channel_locale_flags_in_band(struct brcms_cm_info *wlc_cm, uint bandunit); -extern bool wlc_valid_chanspec_db(wlc_cm_info_t *wlc_cm, chanspec_t chspec); +extern bool brcms_c_valid_chanspec_db(struct brcms_cm_info *wlc_cm, + chanspec_t chspec); -extern void wlc_channel_reg_limits(wlc_cm_info_t *wlc_cm, +extern void brcms_c_channel_reg_limits(struct brcms_cm_info *wlc_cm, chanspec_t chanspec, struct txpwr_limits *txpwr); -extern void wlc_channel_set_chanspec(wlc_cm_info_t *wlc_cm, +extern void brcms_c_channel_set_chanspec(struct brcms_cm_info *wlc_cm, chanspec_t chanspec, u8 local_constraint_qdbm); diff --git a/drivers/staging/brcm80211/brcmsmac/d11.h b/drivers/staging/brcm80211/brcmsmac/d11.h index d91e4189a3e..e7ff0e6f28e 100644 --- a/drivers/staging/brcm80211/brcmsmac/d11.h +++ b/drivers/staging/brcm80211/brcmsmac/d11.h @@ -14,23 +14,14 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _D11_H -#define _D11_H +#ifndef _BRCM_D11_H_ +#define _BRCM_D11_H_ -#include <sbconfig.h> +#include <linux/ieee80211.h> -#ifndef WL_RSSI_ANT_MAX -#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */ -#elif WL_RSSI_ANT_MAX != 4 -#error "WL_RSSI_ANT_MAX does not match" -#endif - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif +#include <defs.h> +#include "pub.h" +#include "dma.h" #define BCN_TMPL_LEN 512 /* length of the BCN template area */ @@ -56,10 +47,16 @@ #define TX_DATA_FIFO TX_AC_BE_FIFO #define TX_CTL_FIFO TX_AC_VO_FIFO -typedef volatile struct { +#ifndef WL_RSSI_ANT_MAX +#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */ +#elif WL_RSSI_ANT_MAX != 4 +#error "WL_RSSI_ANT_MAX does not match" +#endif + +struct intctrlregs { u32 intstatus; u32 intmask; -} intctrlregs_t; +}; /* PIO structure, * support two PIO format: 2 bytes access and 4 bytes access @@ -67,55 +64,53 @@ typedef volatile struct { * a pair of channels is defined for convenience */ /* 2byte-wide pio register set per channel(xmt or rcv) */ -typedef volatile struct { +struct pio2regs { u16 fifocontrol; u16 fifodata; u16 fifofree; /* only valid in xmt channel, not in rcv channel */ u16 PAD; -} pio2regs_t; +}; /* a pair of pio channels(tx and rx) */ -typedef volatile struct { +struct pio2regp { pio2regs_t tx; pio2regs_t rx; -} pio2regp_t; +}; /* 4byte-wide pio register set per channel(xmt or rcv) */ -typedef volatile struct { +struct pio4regs { u32 fifocontrol; u32 fifodata; -} pio4regs_t; +}; /* a pair of pio channels(tx and rx) */ -typedef volatile struct { +struct pio4regp { pio4regs_t tx; pio4regs_t rx; -} pio4regp_t; +}; /* read: 32-bit register that can be read as 32-bit or as 2 16-bit * write: only low 16b-it half can be written */ -typedef volatile union { +union pmqreg { u32 pmqhostdata; /* read only! */ struct { u16 pmqctrlstatus; /* read/write */ u16 PAD; } w; -} pmqreg_t; +}; -typedef volatile struct { +struct fifo64 { dma64regs_t dmaxmt; /* dma tx */ pio4regs_t piotx; /* pio tx */ dma64regs_t dmarcv; /* dma rx */ pio4regs_t piorx; /* pio rx */ -} fifo64_t; +}; /* * Host Interface Registers - * - primed from hnd_cores/dot11mac/systemC/registers/ihr.h - * - but definitely not complete */ -typedef volatile struct _d11regs { +struct d11regs { /* Device Control ("semi-standard host registers") */ u32 PAD[3]; /* 0x0 - 0x8 */ u32 biststatus; /* 0xC */ @@ -439,10 +434,7 @@ typedef volatile struct _d11regs { /* SHM *//* 0x800 - 0xEFE */ u16 PAD[0x380]; /* 0x800 - 0xEFE */ - - /* SB configuration registers: 0xF00 */ - sbconfig_t sbconfig; /* sb config regs occupy top 256 bytes */ -} d11regs_t; +}; #define PIHR_BASE 0x0400 /* byte address of packed IHR region */ @@ -629,12 +621,11 @@ typedef volatile struct _d11regs { #define ANA_11N_013 5 /* 802.11a PLCP header def */ -typedef struct ofdm_phy_hdr ofdm_phy_hdr_t; struct ofdm_phy_hdr { u8 rlpt[3]; /* rate, length, parity, tail */ u16 service; u8 pad; -} __attribute__((packed)); +} __packed; #define D11A_PHY_HDR_GRATE(phdr) ((phdr)->rlpt[0] & 0x0f) #define D11A_PHY_HDR_GRES(phdr) (((phdr)->rlpt[0] >> 4) & 0x01) @@ -664,13 +655,12 @@ struct ofdm_phy_hdr { #define D11A_PHY_PREHDR_TIME (D11A_PHY_PRE_TIME + D11A_PHY_HDR_TIME) /* 802.11b PLCP header def */ -typedef struct cck_phy_hdr cck_phy_hdr_t; struct cck_phy_hdr { u8 signal; u8 service; u16 length; u16 crc; -} __attribute__((packed)); +} __packed; #define D11B_PHY_HDR_LEN 6 @@ -691,17 +681,17 @@ struct cck_phy_hdr { #define MIMO_PLCP_40MHZ 0x80 /* 40 Hz frame */ #define MIMO_PLCP_AMPDU 0x08 /* ampdu */ -#define WLC_GET_CCK_PLCP_LEN(plcp) (plcp[4] + (plcp[5] << 8)) -#define WLC_GET_MIMO_PLCP_LEN(plcp) (plcp[1] + (plcp[2] << 8)) -#define WLC_SET_MIMO_PLCP_LEN(plcp, len) \ +#define BRCMS_GET_CCK_PLCP_LEN(plcp) (plcp[4] + (plcp[5] << 8)) +#define BRCMS_GET_MIMO_PLCP_LEN(plcp) (plcp[1] + (plcp[2] << 8)) +#define BRCMS_SET_MIMO_PLCP_LEN(plcp, len) \ do { \ plcp[1] = len & 0xff; \ plcp[2] = ((len >> 8) & 0xff); \ } while (0); -#define WLC_SET_MIMO_PLCP_AMPDU(plcp) (plcp[3] |= MIMO_PLCP_AMPDU) -#define WLC_CLR_MIMO_PLCP_AMPDU(plcp) (plcp[3] &= ~MIMO_PLCP_AMPDU) -#define WLC_IS_MIMO_PLCP_AMPDU(plcp) (plcp[3] & MIMO_PLCP_AMPDU) +#define BRCMS_SET_MIMO_PLCP_AMPDU(plcp) (plcp[3] |= MIMO_PLCP_AMPDU) +#define BRCMS_CLR_MIMO_PLCP_AMPDU(plcp) (plcp[3] &= ~MIMO_PLCP_AMPDU) +#define BRCMS_IS_MIMO_PLCP_AMPDU(plcp) (plcp[3] & MIMO_PLCP_AMPDU) /* The dot11a PLCP header is 5 bytes. To simplify the software (so that we * don't need e.g. different tx DMA headers for 11a and 11b), the PLCP header has @@ -710,7 +700,6 @@ struct cck_phy_hdr { #define D11_PHY_HDR_LEN 6 /* TX DMA buffer header */ -typedef struct d11txh d11txh_t; struct d11txh { u16 MacTxControlLow; /* 0x0 */ u16 MacTxControlHigh; /* 0x1 */ @@ -746,7 +735,7 @@ struct d11txh { u8 RTSPhyHeader[D11_PHY_HDR_LEN]; /* 0x2c - 0x2e */ struct ieee80211_rts rts_frame; /* 0x2f - 0x36 */ u16 PAD; /* 0x37 */ -} __attribute__((packed)); +} __packed; #define D11_TXH_LEN 112 /* bytes */ @@ -854,7 +843,6 @@ struct d11txh { #define ABI_MAS_MRT_ANT_PTN_MASK 0x000f /* tx status packet */ -typedef struct tx_status tx_status_t; struct tx_status { u16 framelen; u16 PAD; @@ -864,7 +852,7 @@ struct tx_status { u16 sequence; u16 phyerr; u16 ackphyrxsh; -} __attribute__((packed)); +} __packed; #define TXSTATUS_LEN 16 @@ -1160,25 +1148,25 @@ struct tx_status { #define M_TX_IDLE_BUSY_RATIO_X_16_OFDM (0x5A * 2) /* CW RSSI for LCNPHY */ -#define M_LCN_RSSI_0 0x1332 -#define M_LCN_RSSI_1 0x1338 -#define M_LCN_RSSI_2 0x133e -#define M_LCN_RSSI_3 0x1344 +#define M_LCN_RSSI_0 0x1332 +#define M_LCN_RSSI_1 0x1338 +#define M_LCN_RSSI_2 0x133e +#define M_LCN_RSSI_3 0x1344 /* SNR for LCNPHY */ -#define M_LCN_SNR_A_0 0x1334 -#define M_LCN_SNR_B_0 0x1336 +#define M_LCN_SNR_A_0 0x1334 +#define M_LCN_SNR_B_0 0x1336 -#define M_LCN_SNR_A_1 0x133a -#define M_LCN_SNR_B_1 0x133c +#define M_LCN_SNR_A_1 0x133a +#define M_LCN_SNR_B_1 0x133c -#define M_LCN_SNR_A_2 0x1340 -#define M_LCN_SNR_B_2 0x1342 +#define M_LCN_SNR_A_2 0x1340 +#define M_LCN_SNR_B_2 0x1342 -#define M_LCN_SNR_A_3 0x1346 -#define M_LCN_SNR_B_3 0x1348 +#define M_LCN_SNR_A_3 0x1346 +#define M_LCN_SNR_B_3 0x1348 -#define M_LCN_LAST_RESET (81*2) +#define M_LCN_LAST_RESET (81*2) #define M_LCN_LAST_LOC (63*2) #define M_LCNPHY_RESET_STATUS (4902) #define M_LCNPHY_DSC_TIME (0x98d*2) @@ -1247,7 +1235,6 @@ struct tx_status { #define MIMO_ANTSEL_WAIT 50 /* 50us wait */ #define MIMO_ANTSEL_OVERRIDE 0x8000 /* flag */ -typedef struct shm_acparams shm_acparams_t; struct shm_acparams { u16 txop; u16 cwmin; @@ -1258,7 +1245,7 @@ struct shm_acparams { u16 reggap; u16 status; u16 rsvd[8]; -} __attribute__((packed)); +} __packed; #define M_EDCF_QLEN (16 * 2) #define WME_STATUS_NEWAC (1 << 8) @@ -1292,7 +1279,7 @@ struct shm_acparams { /* Flags in M_HOST_FLAGS4 */ #define MHF4_BPHY_TXCORE0 0x0080 /* force bphy Tx on core 0 (board level WAR) */ -#define MHF4_EXTPA_ENABLE 0x4000 /* for 4313A0 FEM boards */ +#define MHF4_EXTPA_ENABLE 0x4000 /* for 4313A0 FEM boards */ /* Flags in M_HOST_FLAGS5 */ #define MHF5_4313_GPIOCTRL 0x0001 @@ -1306,7 +1293,6 @@ struct shm_acparams { #define PHY_NOISE_MASK 0x00ff /* Receive Frame Data Header for 802.11b DCF-only frames */ -typedef struct d11rxhdr d11rxhdr_t; struct d11rxhdr { u16 RxFrameSize; /* Actual byte length of the frame data received */ u16 PAD; @@ -1320,21 +1306,20 @@ struct d11rxhdr { u16 RxStatus2; /* extended MAC Rx status */ u16 RxTSFTime; /* RxTSFTime time of first MAC symbol + M_PHY_PLCPRX_DLY */ u16 RxChan; /* gain code, channel radio code, and phy type */ -} __attribute__((packed)); +} __packed; -#define RXHDR_LEN 24 /* sizeof d11rxhdr_t */ +#define RXHDR_LEN 24 /* sizeof struct d11rxhdr */ #define FRAMELEN(h) ((h)->RxFrameSize) -typedef struct wlc_d11rxhdr wlc_d11rxhdr_t; -struct wlc_d11rxhdr { - d11rxhdr_t rxhdr; +struct brcms_d11rxhdr { + struct d11rxhdr rxhdr; u32 tsf_l; /* TSF_L reading */ s8 rssi; /* computed instanteneous rssi in BMAC */ s8 rxpwr0; /* obsoleted, place holder for legacy ROM code. use rxpwr[] */ s8 rxpwr1; /* obsoleted, place holder for legacy ROM code. use rxpwr[] */ s8 do_rssi_ma; /* do per-pkt sampling for per-antenna ma in HIGH */ s8 rxpwr[WL_RSSI_ANT_MAX]; /* rssi for supported antennas */ -} __attribute__((packed)); +} __packed; /* PhyRxStatus_0: */ #define PRXS0_FT_MASK 0x0003 /* NPHY only: CCK, OFDM, preN, N */ @@ -1473,7 +1458,7 @@ struct wlc_d11rxhdr { #define DBGST_ASLEEP 4 /* asleep (PS mode) */ /* Scratch Reg defs */ -typedef enum { +enum _ePsmScratchPadRegDefinitions { S_RSV0 = 0, S_RSV1, S_RSV2, @@ -1551,7 +1536,7 @@ typedef enum { S_MFGTEST_TMP0, /* Temp register used for RX test calculations 0x3D */ S_RXESN, /* Received end sequence number for A-MPDU BA 0x3E */ S_STREG6, /* 0x3F */ -} ePsmScratchPadRegDefinitions; +}; #define S_BEACON_INDX S_OLD_BREM #define S_PRS_INDX S_OLD_CWWIN @@ -1563,7 +1548,7 @@ typedef enum { #define SLOW_CTRL_FD (1 << 8) /* ucode mac statistic counters in shared memory */ -typedef struct macstat { +struct macstat { u16 txallfrm; /* 0x80 */ u16 txrtsfrm; /* 0x82 */ u16 txctsfrm; /* 0x84 */ @@ -1621,7 +1606,7 @@ typedef struct macstat { u16 phywatchdog; /* 0xfa # of phy watchdog events */ u16 PAD; u16 bphy_badplcp; /* bphy bad plcp */ -} macstat_t; +}; /* dot11 core-specific control flags */ #define SICF_PCLKE 0x0004 /* PHY clock enable */ @@ -1688,7 +1673,7 @@ typedef struct macstat { #define BPHY_PEAK_ENERGY_HI 0x34 #define BPHY_SYNC_CTL 0x35 #define BPHY_TX_PWR_CTRL 0x36 -#define BPHY_TX_EST_PWR 0x37 +#define BPHY_TX_EST_PWR 0x37 #define BPHY_STEP 0x38 #define BPHY_WARMUP 0x39 #define BPHY_LMS_CFF_READ 0x3a @@ -1770,4 +1755,21 @@ typedef struct macstat { #define SHM_BYT_CNT 0x2 /* IHR location */ #define MAX_BYT_CNT 0x600 /* Maximum frame len */ -#endif /* _D11_H */ +struct d11cnt { + u32 txfrag; + u32 txmulti; + u32 txfail; + u32 txretry; + u32 txretrie; + u32 rxdup; + u32 txrts; + u32 txnocts; + u32 txnoack; + u32 rxfrag; + u32 rxmulti; + u32 rxcrc; + u32 txfrmsnt; + u32 rxundec; +}; + +#endif /* _BRCM_D11_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/hnddma.c b/drivers/staging/brcm80211/brcmsmac/dma.c index f607315f814..ea17671efb6 100644 --- a/drivers/staging/brcm80211/brcmsmac/hnddma.c +++ b/drivers/staging/brcm80211/brcmsmac/dma.c @@ -13,27 +13,149 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ - -#include <linux/kernel.h> -#include <linux/string.h> -#include <linux/netdevice.h> +#include <linux/slab.h> +#include <linux/skbuff.h> +#include <linux/delay.h> #include <linux/pci.h> -#include <bcmdefs.h> -#include <bcmdevs.h> -#include <hndsoc.h> -#include <bcmutils.h> -#include <aiutils.h> - -#include <sbhnddma.h> -#include <hnddma.h> #if defined(__mips__) #include <asm/addrspace.h> #endif -#ifdef BRCM_FULLMAC -#error "hnddma.c shouldn't be needed for FULLMAC" -#endif +#include <brcmu_utils.h> +#include <aiutils.h> +#include "types.h" +#include "dma.h" + +/* + * Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB physical address. + */ +#define D64RINGALIGN_BITS 13 +#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS) +#define D64RINGALIGN (1 << D64RINGALIGN_BITS) + +#define D64MAXDD (D64MAXRINGSZ / sizeof(struct dma64desc)) + +/* transmit channel control */ +#define D64_XC_XE 0x00000001 /* transmit enable */ +#define D64_XC_SE 0x00000002 /* transmit suspend request */ +#define D64_XC_LE 0x00000004 /* loopback enable */ +#define D64_XC_FL 0x00000010 /* flush request */ +#define D64_XC_PD 0x00000800 /* parity check disable */ +#define D64_XC_AE 0x00030000 /* address extension bits */ +#define D64_XC_AE_SHIFT 16 + +/* transmit descriptor table pointer */ +#define D64_XP_LD_MASK 0x00000fff /* last valid descriptor */ + +/* transmit channel status */ +#define D64_XS0_CD_MASK 0x00001fff /* current descriptor pointer */ +#define D64_XS0_XS_MASK 0xf0000000 /* transmit state */ +#define D64_XS0_XS_SHIFT 28 +#define D64_XS0_XS_DISABLED 0x00000000 /* disabled */ +#define D64_XS0_XS_ACTIVE 0x10000000 /* active */ +#define D64_XS0_XS_IDLE 0x20000000 /* idle wait */ +#define D64_XS0_XS_STOPPED 0x30000000 /* stopped */ +#define D64_XS0_XS_SUSP 0x40000000 /* suspend pending */ + +#define D64_XS1_AD_MASK 0x00001fff /* active descriptor */ +#define D64_XS1_XE_MASK 0xf0000000 /* transmit errors */ +#define D64_XS1_XE_SHIFT 28 +#define D64_XS1_XE_NOERR 0x00000000 /* no error */ +#define D64_XS1_XE_DPE 0x10000000 /* descriptor protocol error */ +#define D64_XS1_XE_DFU 0x20000000 /* data fifo underrun */ +#define D64_XS1_XE_DTE 0x30000000 /* data transfer error */ +#define D64_XS1_XE_DESRE 0x40000000 /* descriptor read error */ +#define D64_XS1_XE_COREE 0x50000000 /* core error */ + +/* receive channel control */ +#define D64_RC_RE 0x00000001 /* receive enable */ +#define D64_RC_RO_MASK 0x000000fe /* receive frame offset */ +#define D64_RC_RO_SHIFT 1 +#define D64_RC_FM 0x00000100 /* direct fifo receive (pio) mode */ +#define D64_RC_SH 0x00000200 /* separate rx header descriptor enable */ +#define D64_RC_OC 0x00000400 /* overflow continue */ +#define D64_RC_PD 0x00000800 /* parity check disable */ +#define D64_RC_AE 0x00030000 /* address extension bits */ +#define D64_RC_AE_SHIFT 16 + +/* flags for dma controller */ +#define DMA_CTRL_PEN (1 << 0) /* partity enable */ +#define DMA_CTRL_ROC (1 << 1) /* rx overflow continue */ +#define DMA_CTRL_RXMULTI (1 << 2) /* allow rx scatter to multiple descriptors */ +#define DMA_CTRL_UNFRAMED (1 << 3) /* Unframed Rx/Tx data */ + +/* receive descriptor table pointer */ +#define D64_RP_LD_MASK 0x00000fff /* last valid descriptor */ + +/* receive channel status */ +#define D64_RS0_CD_MASK 0x00001fff /* current descriptor pointer */ +#define D64_RS0_RS_MASK 0xf0000000 /* receive state */ +#define D64_RS0_RS_SHIFT 28 +#define D64_RS0_RS_DISABLED 0x00000000 /* disabled */ +#define D64_RS0_RS_ACTIVE 0x10000000 /* active */ +#define D64_RS0_RS_IDLE 0x20000000 /* idle wait */ +#define D64_RS0_RS_STOPPED 0x30000000 /* stopped */ +#define D64_RS0_RS_SUSP 0x40000000 /* suspend pending */ + +#define D64_RS1_AD_MASK 0x0001ffff /* active descriptor */ +#define D64_RS1_RE_MASK 0xf0000000 /* receive errors */ +#define D64_RS1_RE_SHIFT 28 +#define D64_RS1_RE_NOERR 0x00000000 /* no error */ +#define D64_RS1_RE_DPO 0x10000000 /* descriptor protocol error */ +#define D64_RS1_RE_DFU 0x20000000 /* data fifo overflow */ +#define D64_RS1_RE_DTE 0x30000000 /* data transfer error */ +#define D64_RS1_RE_DESRE 0x40000000 /* descriptor read error */ +#define D64_RS1_RE_COREE 0x50000000 /* core error */ + +/* fifoaddr */ +#define D64_FA_OFF_MASK 0xffff /* offset */ +#define D64_FA_SEL_MASK 0xf0000 /* select */ +#define D64_FA_SEL_SHIFT 16 +#define D64_FA_SEL_XDD 0x00000 /* transmit dma data */ +#define D64_FA_SEL_XDP 0x10000 /* transmit dma pointers */ +#define D64_FA_SEL_RDD 0x40000 /* receive dma data */ +#define D64_FA_SEL_RDP 0x50000 /* receive dma pointers */ +#define D64_FA_SEL_XFD 0x80000 /* transmit fifo data */ +#define D64_FA_SEL_XFP 0x90000 /* transmit fifo pointers */ +#define D64_FA_SEL_RFD 0xc0000 /* receive fifo data */ +#define D64_FA_SEL_RFP 0xd0000 /* receive fifo pointers */ +#define D64_FA_SEL_RSD 0xe0000 /* receive frame status data */ +#define D64_FA_SEL_RSP 0xf0000 /* receive frame status pointers */ + +/* descriptor control flags 1 */ +#define D64_CTRL_COREFLAGS 0x0ff00000 /* core specific flags */ +#define D64_CTRL1_EOT ((u32)1 << 28) /* end of descriptor table */ +#define D64_CTRL1_IOC ((u32)1 << 29) /* interrupt on completion */ +#define D64_CTRL1_EOF ((u32)1 << 30) /* end of frame */ +#define D64_CTRL1_SOF ((u32)1 << 31) /* start of frame */ + +/* descriptor control flags 2 */ +#define D64_CTRL2_BC_MASK 0x00007fff /* buffer byte count. real data len must <= 16KB */ +#define D64_CTRL2_AE 0x00030000 /* address extension bits */ +#define D64_CTRL2_AE_SHIFT 16 +#define D64_CTRL2_PARITY 0x00040000 /* parity bit */ + +/* control flags in the range [27:20] are core-specific and not defined here */ +#define D64_CTRL_CORE_MASK 0x0ff00000 + +#define D64_RX_FRM_STS_LEN 0x0000ffff /* frame length mask */ +#define D64_RX_FRM_STS_OVFL 0x00800000 /* RxOverFlow */ +#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */ +#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */ + +#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */ +#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */ +#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */ +#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */ + +/* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF). + * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL. + * There is a compile time check in wlc.c which ensure that this value is at least as big + * as TXOFF. This value is used in dma_rxfill (dma.c). + */ + +#define BCMEXTRAHDROOM 172 /* debug/trace */ #ifdef BCMDBG @@ -58,6 +180,15 @@ #define DMA_NONE(args) +typedef unsigned long dmaaddr_t; +#define PHYSADDRHI(_pa) (0) +#define PHYSADDRHISET(_pa, _val) +#define PHYSADDRLO(_pa) ((_pa)) +#define PHYSADDRLOSET(_pa, _val) \ + do { \ + (_pa) = (_val); \ + } while (0) + #define d64txregs dregs.d64_u.txregs_64 #define d64rxregs dregs.d64_u.rxregs_64 #define txd64 dregs.d64_u.txd_64 @@ -73,9 +204,33 @@ static uint dma_msg_level; #define R_SM(r) (*(r)) #define W_SM(r, v) (*(r) = (v)) +/* One physical DMA segment */ +struct dma_seg { + dmaaddr_t addr; + u32 length; +}; + +struct dma_seg_map { + void *oshdmah; /* Opaque handle for OSL to store its information */ + uint origsize; /* Size of the virtual packet */ + uint nsegs; + struct dma_seg segs[MAX_DMA_SEGS]; +}; + +/* + * DMA Descriptor + * Descriptors are only read by the hardware, never written back. + */ +struct dma64desc { + u32 ctrl1; /* misc control bits & bufcount */ + u32 ctrl2; /* buffer count and address extension */ + u32 addrlow; /* memory address of the date buffer, bits 31:0 */ + u32 addrhigh; /* memory address of the date buffer, bits 63:32 */ +}; + /* dma engine software state */ -typedef struct dma_info { - struct hnddma_pub hnddma; /* exported structure */ +struct dma_info { + struct dma_pub dma; /* exported structure */ uint *msg_level; /* message level pointer */ char name[MAXNAMEL]; /* callers name for diag msgs */ @@ -88,8 +243,10 @@ typedef struct dma_info { struct { dma64regs_t *txregs_64; /* 64-bit dma tx engine registers */ dma64regs_t *rxregs_64; /* 64-bit dma rx engine registers */ - dma64dd_t *txd_64; /* pointer to dma64 tx descriptor ring */ - dma64dd_t *rxd_64; /* pointer to dma64 rx descriptor ring */ + /* pointer to dma64 tx descriptor ring */ + struct dma64desc *txd_64; + /* pointer to dma64 rx descriptor ring */ + struct dma64desc *rxd_64; } d64_u; } dregs; @@ -99,7 +256,7 @@ typedef struct dma_info { u16 txin; /* index of next descriptor to reclaim */ u16 txout; /* index of next descriptor to post */ void **txp; /* pointer to parallel array of pointers to packets */ - hnddma_seg_map_t *txp_dmah; /* DMA MAP meta-data handle */ + struct dma_seg_map *txp_dmah; /* DMA MAP meta-data handle */ dmaaddr_t txdpa; /* Aligned physical address of descriptor ring */ dmaaddr_t txdpaorig; /* Original physical address of descriptor ring */ u16 txdalign; /* #bytes added to alloc'd mem to align txd */ @@ -113,7 +270,7 @@ typedef struct dma_info { u16 rxin; /* index of next descriptor to reclaim */ u16 rxout; /* index of next descriptor to post */ void **rxp; /* pointer to parallel array of pointers to packets */ - hnddma_seg_map_t *rxp_dmah; /* DMA MAP meta-data handle */ + struct dma_seg_map *rxp_dmah; /* DMA MAP meta-data handle */ dmaaddr_t rxdpa; /* Aligned physical address of descriptor ring */ dmaaddr_t rxdpaorig; /* Original physical address of descriptor ring */ u16 rxdalign; /* #bytes added to alloc'd mem to align rxd */ @@ -137,7 +294,7 @@ typedef struct dma_info { uint dataoffsetlow; /* add to get dma address of data buffer, low 32 bits */ uint dataoffsethigh; /* high 32 bits */ bool aligndesc_4k; /* descriptor base need to be aligned or not */ -} dma_info_t; +}; /* DMA Scatter-gather list is supported. Note this is limited to TX direction only */ #ifdef BCMDMASGLISTOSL @@ -169,65 +326,67 @@ typedef struct dma_info { #define PCI64ADDR_HIGH_SHIFT 31 /* address[63] */ /* Common prototypes */ -static bool _dma_isaddrext(dma_info_t *di); -static bool _dma_descriptor_align(dma_info_t *di); -static bool _dma_alloc(dma_info_t *di, uint direction); -static void _dma_detach(dma_info_t *di); -static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa); -static void _dma_rxinit(dma_info_t *di); -static void *_dma_rx(dma_info_t *di); -static bool _dma_rxfill(dma_info_t *di); -static void _dma_rxreclaim(dma_info_t *di); -static void _dma_rxenable(dma_info_t *di); -static void *_dma_getnextrxp(dma_info_t *di, bool forceall); -static void _dma_rx_param_get(dma_info_t *di, u16 *rxoffset, +static bool _dma_isaddrext(struct dma_info *di); +static bool _dma_descriptor_align(struct dma_info *di); +static bool _dma_alloc(struct dma_info *di, uint direction); +static void _dma_detach(struct dma_info *di); +static void _dma_ddtable_init(struct dma_info *di, uint direction, + dmaaddr_t pa); +static void _dma_rxinit(struct dma_info *di); +static void *_dma_rx(struct dma_info *di); +static bool _dma_rxfill(struct dma_info *di); +static void _dma_rxreclaim(struct dma_info *di); +static void _dma_rxenable(struct dma_info *di); +static void *_dma_getnextrxp(struct dma_info *di, bool forceall); +static void _dma_rx_param_get(struct dma_info *di, u16 *rxoffset, u16 *rxbufsize); -static void _dma_txblock(dma_info_t *di); -static void _dma_txunblock(dma_info_t *di); -static uint _dma_txactive(dma_info_t *di); -static uint _dma_rxactive(dma_info_t *di); -static uint _dma_txpending(dma_info_t *di); -static uint _dma_txcommitted(dma_info_t *di); - -static void *_dma_peeknexttxp(dma_info_t *di); -static void *_dma_peeknextrxp(dma_info_t *di); -static unsigned long _dma_getvar(dma_info_t *di, const char *name); -static void _dma_counterreset(dma_info_t *di); -static void _dma_fifoloopbackenable(dma_info_t *di); -static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags); +static void _dma_txblock(struct dma_info *di); +static void _dma_txunblock(struct dma_info *di); +static uint _dma_txactive(struct dma_info *di); +static uint _dma_rxactive(struct dma_info *di); +static uint _dma_txpending(struct dma_info *di); +static uint _dma_txcommitted(struct dma_info *di); + +static void *_dma_peeknexttxp(struct dma_info *di); +static void *_dma_peeknextrxp(struct dma_info *di); +static unsigned long _dma_getvar(struct dma_info *di, const char *name); +static void _dma_counterreset(struct dma_info *di); +static void _dma_fifoloopbackenable(struct dma_info *di); +static uint _dma_ctrlflags(struct dma_info *di, uint mask, uint flags); static u8 dma_align_sizetobits(uint size); -static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size, +static void *dma_ringalloc(struct dma_info *di, u32 boundary, uint size, u16 *alignbits, uint *alloced, dmaaddr_t *descpa); /* Prototypes for 64-bit routines */ -static bool dma64_alloc(dma_info_t *di, uint direction); -static bool dma64_txreset(dma_info_t *di); -static bool dma64_rxreset(dma_info_t *di); -static bool dma64_txsuspendedidle(dma_info_t *di); -static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, bool commit); -static int dma64_txunframed(dma_info_t *di, void *p0, uint len, bool commit); -static void *dma64_getpos(dma_info_t *di, bool direction); -static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range); -static void *dma64_getnextrxp(dma_info_t *di, bool forceall); -static void dma64_txrotate(dma_info_t *di); - -static bool dma64_rxidle(dma_info_t *di); -static void dma64_txinit(dma_info_t *di); -static bool dma64_txenabled(dma_info_t *di); -static void dma64_txsuspend(dma_info_t *di); -static void dma64_txresume(dma_info_t *di); -static bool dma64_txsuspended(dma_info_t *di); -static void dma64_txreclaim(dma_info_t *di, txd_range_t range); -static bool dma64_txstopped(dma_info_t *di); -static bool dma64_rxstopped(dma_info_t *di); -static bool dma64_rxenabled(dma_info_t *di); +static bool dma64_alloc(struct dma_info *di, uint direction); +static bool dma64_txreset(struct dma_info *di); +static bool dma64_rxreset(struct dma_info *di); +static bool dma64_txsuspendedidle(struct dma_info *di); +static int dma64_txfast(struct dma_info *di, struct sk_buff *p0, bool commit); +static int dma64_txunframed(struct dma_info *di, void *p0, uint len, + bool commit); +static void *dma64_getpos(struct dma_info *di, bool direction); +static void *dma64_getnexttxp(struct dma_info *di, enum txd_range range); +static void *dma64_getnextrxp(struct dma_info *di, bool forceall); +static void dma64_txrotate(struct dma_info *di); + +static bool dma64_rxidle(struct dma_info *di); +static void dma64_txinit(struct dma_info *di); +static bool dma64_txenabled(struct dma_info *di); +static void dma64_txsuspend(struct dma_info *di); +static void dma64_txresume(struct dma_info *di); +static bool dma64_txsuspended(struct dma_info *di); +static void dma64_txreclaim(struct dma_info *di, enum txd_range range); +static bool dma64_txstopped(struct dma_info *di); +static bool dma64_rxstopped(struct dma_info *di); +static bool dma64_rxenabled(struct dma_info *di); static bool _dma64_addrext(dma64regs_t *dma64regs); static inline u32 parity32(u32 data); -const di_fcn_t dma64proc = { +const struct di_fcn_s dma64proc = { (di_detach_t) _dma_detach, (di_txinit_t) dma64_txinit, (di_txreset_t) dma64_txreset, @@ -274,16 +433,16 @@ const di_fcn_t dma64proc = { 39 }; -struct hnddma_pub *dma_attach(char *name, si_t *sih, +struct dma_pub *dma_attach(char *name, struct si_pub *sih, void *dmaregstx, void *dmaregsrx, uint ntxd, uint nrxd, uint rxbufsize, int rxextheadroom, uint nrxpost, uint rxoffset, uint *msg_level) { - dma_info_t *di; + struct dma_info *di; uint size; /* allocate private info structure */ - di = kzalloc(sizeof(dma_info_t), GFP_ATOMIC); + di = kzalloc(sizeof(struct dma_info), GFP_ATOMIC); if (di == NULL) { #ifdef BCMDBG printk(KERN_ERR "dma_attach: out of memory\n"); @@ -299,20 +458,20 @@ struct hnddma_pub *dma_attach(char *name, si_t *sih, /* init dma reg pointer */ di->d64txregs = (dma64regs_t *) dmaregstx; di->d64rxregs = (dma64regs_t *) dmaregsrx; - di->hnddma.di_fn = (const di_fcn_t *)&dma64proc; + di->dma.di_fn = (const struct di_fcn_s *)&dma64proc; /* Default flags (which can be changed by the driver calling dma_ctrlflags * before enable): For backwards compatibility both Rx Overflow Continue * and Parity are DISABLED. * supports it. */ - di->hnddma.di_fn->ctrlflags(&di->hnddma, DMA_CTRL_ROC | DMA_CTRL_PEN, - 0); + di->dma.di_fn->ctrlflags(&di->dma, DMA_CTRL_ROC | DMA_CTRL_PEN, + 0); DMA_TRACE(("%s: dma_attach: %s flags 0x%x ntxd %d nrxd %d " "rxbufsize %d rxextheadroom %d nrxpost %d rxoffset %d " "dmaregstx %p dmaregsrx %p\n", name, "DMA64", - di->hnddma.dmactrlflags, ntxd, nrxd, rxbufsize, + di->dma.dmactrlflags, ntxd, nrxd, rxbufsize, rxextheadroom, nrxpost, rxoffset, dmaregstx, dmaregsrx)); /* make a private copy of our callers name */ @@ -427,21 +586,21 @@ struct hnddma_pub *dma_attach(char *name, si_t *sih, /* allocate DMA mapping vectors */ if (DMASGLIST_ENAB) { if (ntxd) { - size = ntxd * sizeof(hnddma_seg_map_t); + size = ntxd * sizeof(struct dma_seg_map); di->txp_dmah = kzalloc(size, GFP_ATOMIC); if (di->txp_dmah == NULL) goto fail; } if (nrxd) { - size = nrxd * sizeof(hnddma_seg_map_t); + size = nrxd * sizeof(struct dma_seg_map); di->rxp_dmah = kzalloc(size, GFP_ATOMIC); if (di->rxp_dmah == NULL) goto fail; } } - return (struct hnddma_pub *) di; + return (struct dma_pub *) di; fail: _dma_detach(di); @@ -463,8 +622,8 @@ static inline u32 parity32(u32 data) #define DMA64_DD_PARITY(dd) parity32((dd)->addrlow ^ (dd)->addrhigh ^ (dd)->ctrl1 ^ (dd)->ctrl2) static inline void -dma64_dd_upd(dma_info_t *di, dma64dd_t *ddring, dmaaddr_t pa, uint outidx, - u32 *flags, u32 bufcount) +dma64_dd_upd(struct dma_info *di, struct dma64desc *ddring, + dmaaddr_t pa, uint outidx, u32 *flags, u32 bufcount) { u32 ctrl2 = bufcount & D64_CTRL2_BC_MASK; @@ -497,7 +656,7 @@ dma64_dd_upd(dma_info_t *di, dma64dd_t *ddring, dmaaddr_t pa, uint outidx, W_SM(&ddring[outidx].ctrl1, BUS_SWAP32(*flags)); W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2)); } - if (di->hnddma.dmactrlflags & DMA_CTRL_PEN) { + if (di->dma.dmactrlflags & DMA_CTRL_PEN) { if (DMA64_DD_PARITY(&ddring[outidx])) { W_SM(&ddring[outidx].ctrl2, BUS_SWAP32(ctrl2 | D64_CTRL2_PARITY)); @@ -505,7 +664,7 @@ dma64_dd_upd(dma_info_t *di, dma64dd_t *ddring, dmaaddr_t pa, uint outidx, } } -static bool _dma_alloc(dma_info_t *di, uint direction) +static bool _dma_alloc(struct dma_info *di, uint direction) { return dma64_alloc(di, direction); } @@ -523,7 +682,7 @@ void *dma_alloc_consistent(struct pci_dev *pdev, uint size, u16 align_bits, } /* !! may be called with core in reset */ -static void _dma_detach(dma_info_t *di) +static void _dma_detach(struct dma_info *di) { DMA_TRACE(("%s: dma_detach\n", di->name)); @@ -553,7 +712,7 @@ static void _dma_detach(dma_info_t *di) } -static bool _dma_descriptor_align(dma_info_t *di) +static bool _dma_descriptor_align(struct dma_info *di) { u32 addrl; @@ -573,7 +732,7 @@ static bool _dma_descriptor_align(dma_info_t *di) } /* return true if this dma engine supports DmaExtendedAddrChanges, otherwise false */ -static bool _dma_isaddrext(dma_info_t *di) +static bool _dma_isaddrext(struct dma_info *di) { /* DMA64 supports full 32- or 64-bit operation. AE is always valid */ @@ -595,7 +754,7 @@ static bool _dma_isaddrext(dma_info_t *di) } /* initialize descriptor table base address */ -static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa) +static void _dma_ddtable_init(struct dma_info *di, uint direction, dmaaddr_t pa) { if (!di->aligndesc_4k) { if (direction == DMA_TX) @@ -644,14 +803,14 @@ static void _dma_ddtable_init(dma_info_t *di, uint direction, dmaaddr_t pa) } } -static void _dma_fifoloopbackenable(dma_info_t *di) +static void _dma_fifoloopbackenable(struct dma_info *di) { DMA_TRACE(("%s: dma_fifoloopbackenable\n", di->name)); OR_REG(&di->d64txregs->control, D64_XC_LE); } -static void _dma_rxinit(dma_info_t *di) +static void _dma_rxinit(struct dma_info *di) { DMA_TRACE(("%s: dma_rxinit\n", di->name)); @@ -662,7 +821,7 @@ static void _dma_rxinit(dma_info_t *di) /* clear rx descriptor ring */ memset((void *)di->rxd64, '\0', - (di->nrxd * sizeof(dma64dd_t))); + (di->nrxd * sizeof(struct dma64desc))); /* DMA engine with out alignment requirement requires table to be inited * before enabling the engine @@ -676,9 +835,9 @@ static void _dma_rxinit(dma_info_t *di) _dma_ddtable_init(di, DMA_RX, di->rxdpa); } -static void _dma_rxenable(dma_info_t *di) +static void _dma_rxenable(struct dma_info *di) { - uint dmactrlflags = di->hnddma.dmactrlflags; + uint dmactrlflags = di->dma.dmactrlflags; u32 control; DMA_TRACE(("%s: dma_rxenable\n", di->name)); @@ -698,7 +857,7 @@ static void _dma_rxenable(dma_info_t *di) } static void -_dma_rx_param_get(dma_info_t *di, u16 *rxoffset, u16 *rxbufsize) +_dma_rx_param_get(struct dma_info *di, u16 *rxoffset, u16 *rxbufsize) { /* the normal values fit into 16 bits */ *rxoffset = (u16) di->rxoffset; @@ -714,7 +873,7 @@ _dma_rx_param_get(dma_info_t *di, u16 *rxoffset, u16 *rxbufsize) * After it reaches the max size of buffer, the data continues in next DMA descriptor * buffer WITHOUT DMA header */ -static void *_dma_rx(dma_info_t *di) +static void *_dma_rx(struct dma_info *di) { struct sk_buff *p, *head, *tail; uint len; @@ -754,17 +913,17 @@ static void *_dma_rx(dma_info_t *di) B2I(((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) - di->rcvptrbase) & D64_RS0_CD_MASK, - dma64dd_t); + struct dma64desc); DMA_ERROR(("_dma_rx, rxin %d rxout %d, hw_curr %d\n", di->rxin, di->rxout, cur)); } #endif /* BCMDBG */ - if ((di->hnddma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) { + if ((di->dma.dmactrlflags & DMA_CTRL_RXMULTI) == 0) { DMA_ERROR(("%s: dma_rx: bad frame length (%d)\n", di->name, len)); - bcm_pkt_buf_free_skb(head); - di->hnddma.rxgiants++; + brcmu_pkt_buf_free_skb(head); + di->dma.rxgiants++; goto next_frame; } } @@ -777,7 +936,7 @@ static void *_dma_rx(dma_info_t *di) * this will stall the rx dma and user might want to call rxfill again asap * This unlikely happens on memory-rich NIC, but often on memory-constrained dongle */ -static bool _dma_rxfill(dma_info_t *di) +static bool _dma_rxfill(struct dma_info *di) { struct sk_buff *p; u16 rxin, rxout; @@ -811,7 +970,7 @@ static bool _dma_rxfill(dma_info_t *di) size to be allocated */ - p = bcm_pkt_buf_get_skb(di->rxbufsize + extra_offset); + p = brcmu_pkt_buf_get_skb(di->rxbufsize + extra_offset); if (p == NULL) { DMA_ERROR(("%s: dma_rxfill: out of rxbufs\n", @@ -821,7 +980,7 @@ static bool _dma_rxfill(dma_info_t *di) di->name)); ring_empty = true; } - di->hnddma.rxnobuf++; + di->dma.rxnobuf++; break; } /* reserve an extra headroom, if applicable */ @@ -835,7 +994,7 @@ static bool _dma_rxfill(dma_info_t *di) if (DMASGLIST_ENAB) memset(&di->rxp_dmah[rxout], 0, - sizeof(hnddma_seg_map_t)); + sizeof(struct dma_seg_map)); pa = pci_map_single(di->pbus, p->data, di->rxbufsize, PCI_DMA_FROMDEVICE); @@ -857,13 +1016,13 @@ static bool _dma_rxfill(dma_info_t *di) /* update the chip lastdscr pointer */ W_REG(&di->d64rxregs->ptr, - di->rcvptrbase + I2B(rxout, dma64dd_t)); + di->rcvptrbase + I2B(rxout, struct dma64desc)); return ring_empty; } /* like getnexttxp but no reclaim */ -static void *_dma_peeknexttxp(dma_info_t *di) +static void *_dma_peeknexttxp(struct dma_info *di) { uint end, i; @@ -873,7 +1032,7 @@ static void *_dma_peeknexttxp(dma_info_t *di) end = B2I(((R_REG(&di->d64txregs->status0) & D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK, - dma64dd_t); + struct dma64desc); for (i = di->txin; i != end; i = NEXTTXD(i)) if (di->txp[i]) @@ -883,7 +1042,7 @@ static void *_dma_peeknexttxp(dma_info_t *di) } /* like getnextrxp but not take off the ring */ -static void *_dma_peeknextrxp(dma_info_t *di) +static void *_dma_peeknextrxp(struct dma_info *di) { uint end, i; @@ -893,7 +1052,7 @@ static void *_dma_peeknextrxp(dma_info_t *di) end = B2I(((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) - di->rcvptrbase) & D64_RS0_CD_MASK, - dma64dd_t); + struct dma64desc); for (i = di->rxin; i != end; i = NEXTRXD(i)) if (di->rxp[i]) @@ -902,17 +1061,17 @@ static void *_dma_peeknextrxp(dma_info_t *di) return NULL; } -static void _dma_rxreclaim(dma_info_t *di) +static void _dma_rxreclaim(struct dma_info *di) { void *p; DMA_TRACE(("%s: dma_rxreclaim\n", di->name)); while ((p = _dma_getnextrxp(di, true))) - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); } -static void *_dma_getnextrxp(dma_info_t *di, bool forceall) +static void *_dma_getnextrxp(struct dma_info *di, bool forceall) { if (di->nrxd == 0) return NULL; @@ -920,34 +1079,34 @@ static void *_dma_getnextrxp(dma_info_t *di, bool forceall) return dma64_getnextrxp(di, forceall); } -static void _dma_txblock(dma_info_t *di) +static void _dma_txblock(struct dma_info *di) { - di->hnddma.txavail = 0; + di->dma.txavail = 0; } -static void _dma_txunblock(dma_info_t *di) +static void _dma_txunblock(struct dma_info *di) { - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; } -static uint _dma_txactive(dma_info_t *di) +static uint _dma_txactive(struct dma_info *di) { return NTXDACTIVE(di->txin, di->txout); } -static uint _dma_txpending(dma_info_t *di) +static uint _dma_txpending(struct dma_info *di) { uint curr; curr = B2I(((R_REG(&di->d64txregs->status0) & D64_XS0_CD_MASK) - di->xmtptrbase) & D64_XS0_CD_MASK, - dma64dd_t); + struct dma64desc); return NTXDACTIVE(curr, di->txout); } -static uint _dma_txcommitted(dma_info_t *di) +static uint _dma_txcommitted(struct dma_info *di) { uint ptr; uint txin = di->txin; @@ -955,27 +1114,27 @@ static uint _dma_txcommitted(dma_info_t *di) if (txin == di->txout) return 0; - ptr = B2I(R_REG(&di->d64txregs->ptr), dma64dd_t); + ptr = B2I(R_REG(&di->d64txregs->ptr), struct dma64desc); return NTXDACTIVE(di->txin, ptr); } -static uint _dma_rxactive(dma_info_t *di) +static uint _dma_rxactive(struct dma_info *di) { return NRXDACTIVE(di->rxin, di->rxout); } -static void _dma_counterreset(dma_info_t *di) +static void _dma_counterreset(struct dma_info *di) { /* reset all software counter */ - di->hnddma.rxgiants = 0; - di->hnddma.rxnobuf = 0; - di->hnddma.txnobuf = 0; + di->dma.rxgiants = 0; + di->dma.rxnobuf = 0; + di->dma.txnobuf = 0; } -static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags) +static uint _dma_ctrlflags(struct dma_info *di, uint mask, uint flags) { - uint dmactrlflags = di->hnddma.dmactrlflags; + uint dmactrlflags = di->dma.dmactrlflags; if (di == NULL) { DMA_ERROR(("%s: _dma_ctrlflags: NULL dma handle\n", di->name)); @@ -1004,16 +1163,16 @@ static uint _dma_ctrlflags(dma_info_t *di, uint mask, uint flags) } } - di->hnddma.dmactrlflags = dmactrlflags; + di->dma.dmactrlflags = dmactrlflags; return dmactrlflags; } /* get the address of the var in order to change later */ -static unsigned long _dma_getvar(dma_info_t *di, const char *name) +static unsigned long _dma_getvar(struct dma_info *di, const char *name) { if (!strcmp(name, "&txavail")) - return (unsigned long)&(di->hnddma.txavail); + return (unsigned long)&(di->dma.txavail); return 0; } @@ -1033,7 +1192,7 @@ u8 dma_align_sizetobits(uint size) * descriptor ring size aligned location. This will ensure that the ring will * not cross page boundary */ -static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size, +static void *dma_ringalloc(struct dma_info *di, u32 boundary, uint size, u16 *alignbits, uint *alloced, dmaaddr_t *descpa) { @@ -1059,7 +1218,7 @@ static void *dma_ringalloc(dma_info_t *di, u32 boundary, uint size, /* 64-bit DMA functions */ -static void dma64_txinit(dma_info_t *di) +static void dma64_txinit(struct dma_info *di) { u32 control = D64_XC_XE; @@ -1069,10 +1228,10 @@ static void dma64_txinit(dma_info_t *di) return; di->txin = di->txout = 0; - di->hnddma.txavail = di->ntxd - 1; + di->dma.txavail = di->ntxd - 1; /* clear tx descriptor ring */ - memset((void *)di->txd64, '\0', (di->ntxd * sizeof(dma64dd_t))); + memset((void *)di->txd64, '\0', (di->ntxd * sizeof(struct dma64desc))); /* DMA engine with out alignment requirement requires table to be inited * before enabling the engine @@ -1080,7 +1239,7 @@ static void dma64_txinit(dma_info_t *di) if (!di->aligndesc_4k) _dma_ddtable_init(di, DMA_TX, di->txdpa); - if ((di->hnddma.dmactrlflags & DMA_CTRL_PEN) == 0) + if ((di->dma.dmactrlflags & DMA_CTRL_PEN) == 0) control |= D64_XC_PD; OR_REG(&di->d64txregs->control, control); @@ -1091,7 +1250,7 @@ static void dma64_txinit(dma_info_t *di) _dma_ddtable_init(di, DMA_TX, di->txdpa); } -static bool dma64_txenabled(dma_info_t *di) +static bool dma64_txenabled(struct dma_info *di) { u32 xc; @@ -1100,7 +1259,7 @@ static bool dma64_txenabled(dma_info_t *di) return (xc != 0xffffffff) && (xc & D64_XC_XE); } -static void dma64_txsuspend(dma_info_t *di) +static void dma64_txsuspend(struct dma_info *di) { DMA_TRACE(("%s: dma_txsuspend\n", di->name)); @@ -1110,7 +1269,7 @@ static void dma64_txsuspend(dma_info_t *di) OR_REG(&di->d64txregs->control, D64_XC_SE); } -static void dma64_txresume(dma_info_t *di) +static void dma64_txresume(struct dma_info *di) { DMA_TRACE(("%s: dma_txresume\n", di->name)); @@ -1120,21 +1279,21 @@ static void dma64_txresume(dma_info_t *di) AND_REG(&di->d64txregs->control, ~D64_XC_SE); } -static bool dma64_txsuspended(dma_info_t *di) +static bool dma64_txsuspended(struct dma_info *di) { return (di->ntxd == 0) || ((R_REG(&di->d64txregs->control) & D64_XC_SE) == D64_XC_SE); } -static void dma64_txreclaim(dma_info_t *di, txd_range_t range) +static void dma64_txreclaim(struct dma_info *di, enum txd_range range) { void *p; DMA_TRACE(("%s: dma_txreclaim %s\n", di->name, - (range == HNDDMA_RANGE_ALL) ? "all" : + (range == DMA_RANGE_ALL) ? "all" : ((range == - HNDDMA_RANGE_TRANSMITTED) ? "transmitted" : + DMA_RANGE_TRANSMITTED) ? "transmitted" : "transferred"))); if (di->txin == di->txout) @@ -1142,24 +1301,24 @@ static void dma64_txreclaim(dma_info_t *di, txd_range_t range) while ((p = dma64_getnexttxp(di, range))) { /* For unframed data, we don't have any packets to free */ - if (!(di->hnddma.dmactrlflags & DMA_CTRL_UNFRAMED)) - bcm_pkt_buf_free_skb(p); + if (!(di->dma.dmactrlflags & DMA_CTRL_UNFRAMED)) + brcmu_pkt_buf_free_skb(p); } } -static bool dma64_txstopped(dma_info_t *di) +static bool dma64_txstopped(struct dma_info *di) { return ((R_REG(&di->d64txregs->status0) & D64_XS0_XS_MASK) == D64_XS0_XS_STOPPED); } -static bool dma64_rxstopped(dma_info_t *di) +static bool dma64_rxstopped(struct dma_info *di) { return ((R_REG(&di->d64rxregs->status0) & D64_RS0_RS_MASK) == D64_RS0_RS_STOPPED); } -static bool dma64_alloc(dma_info_t *di, uint direction) +static bool dma64_alloc(struct dma_info *di, uint direction) { u16 size; uint ddlen; @@ -1168,7 +1327,7 @@ static bool dma64_alloc(dma_info_t *di, uint direction) u16 align; u16 align_bits; - ddlen = sizeof(dma64dd_t); + ddlen = sizeof(struct dma64desc); size = (direction == DMA_TX) ? (di->ntxd * ddlen) : (di->nrxd * ddlen); align_bits = di->dmadesc_align; @@ -1182,7 +1341,8 @@ static bool dma64_alloc(dma_info_t *di, uint direction) return false; } align = (1 << align_bits); - di->txd64 = (dma64dd_t *) roundup((unsigned long)va, align); + di->txd64 = (struct dma64desc *) + roundup((unsigned long)va, align); di->txdalign = (uint) ((s8 *)di->txd64 - (s8 *) va); PHYSADDRLOSET(di->txdpa, PHYSADDRLO(di->txdpaorig) + di->txdalign); @@ -1196,7 +1356,8 @@ static bool dma64_alloc(dma_info_t *di, uint direction) return false; } align = (1 << align_bits); - di->rxd64 = (dma64dd_t *) roundup((unsigned long)va, align); + di->rxd64 = (struct dma64desc *) + roundup((unsigned long)va, align); di->rxdalign = (uint) ((s8 *)di->rxd64 - (s8 *) va); PHYSADDRLOSET(di->rxdpa, PHYSADDRLO(di->rxdpaorig) + di->rxdalign); @@ -1207,7 +1368,7 @@ static bool dma64_alloc(dma_info_t *di, uint direction) return true; } -static bool dma64_txreset(dma_info_t *di) +static bool dma64_txreset(struct dma_info *di) { u32 status; @@ -1232,7 +1393,7 @@ static bool dma64_txreset(dma_info_t *di) return status == D64_XS0_XS_DISABLED; } -static bool dma64_rxidle(dma_info_t *di) +static bool dma64_rxidle(struct dma_info *di) { DMA_TRACE(("%s: dma_rxidle\n", di->name)); @@ -1243,7 +1404,7 @@ static bool dma64_rxidle(dma_info_t *di) (R_REG(&di->d64rxregs->ptr) & D64_RS0_CD_MASK)); } -static bool dma64_rxreset(dma_info_t *di) +static bool dma64_rxreset(struct dma_info *di) { u32 status; @@ -1258,7 +1419,7 @@ static bool dma64_rxreset(dma_info_t *di) return status == D64_RS0_RS_DISABLED; } -static bool dma64_rxenabled(dma_info_t *di) +static bool dma64_rxenabled(struct dma_info *di) { u32 rc; @@ -1266,7 +1427,7 @@ static bool dma64_rxenabled(dma_info_t *di) return (rc != 0xffffffff) && (rc & D64_RC_RE); } -static bool dma64_txsuspendedidle(dma_info_t *di) +static bool dma64_txsuspendedidle(struct dma_info *di) { if (di->ntxd == 0) @@ -1286,7 +1447,7 @@ static bool dma64_txsuspendedidle(dma_info_t *di) * We return a pointer to the beginning of the DATA buffer of the current descriptor. * If DMA is idle, we return NULL. */ -static void *dma64_getpos(dma_info_t *di, bool direction) +static void *dma64_getpos(struct dma_info *di, bool direction) { void *va; bool idle; @@ -1296,12 +1457,12 @@ static void *dma64_getpos(dma_info_t *di, bool direction) cd_offset = R_REG(&di->d64txregs->status0) & D64_XS0_CD_MASK; idle = !NTXDACTIVE(di->txin, di->txout); - va = di->txp[B2I(cd_offset, dma64dd_t)]; + va = di->txp[B2I(cd_offset, struct dma64desc)]; } else { cd_offset = R_REG(&di->d64rxregs->status0) & D64_XS0_CD_MASK; idle = !NRXDACTIVE(di->rxin, di->rxout); - va = di->rxp[B2I(cd_offset, dma64dd_t)]; + va = di->rxp[B2I(cd_offset, struct dma64desc)]; } /* If DMA is IDLE, return NULL */ @@ -1316,12 +1477,13 @@ static void *dma64_getpos(dma_info_t *di, bool direction) /* TX of unframed data * * Adds a DMA ring descriptor for the data pointed to by "buf". - * This is for DMA of a buffer of data and is unlike other hnddma TX functions + * This is for DMA of a buffer of data and is unlike other dma TX functions * that take a pointer to a "packet" * Each call to this is results in a single descriptor being added for "len" bytes of * data starting at "buf", it doesn't handle chained buffers. */ -static int dma64_txunframed(dma_info_t *di, void *buf, uint len, bool commit) +static int +dma64_txunframed(struct dma_info *di, void *buf, uint len, bool commit) { u16 txout; u32 flags = 0; @@ -1355,18 +1517,18 @@ static int dma64_txunframed(dma_info_t *di, void *buf, uint len, bool commit) /* kick the chip */ if (commit) { W_REG(&di->d64txregs->ptr, - di->xmtptrbase + I2B(txout, dma64dd_t)); + di->xmtptrbase + I2B(txout, struct dma64desc)); } /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; return 0; outoftxd: DMA_ERROR(("%s: %s: out of txds !!!\n", di->name, __func__)); - di->hnddma.txavail = 0; - di->hnddma.txnobuf++; + di->dma.txavail = 0; + di->dma.txnobuf++; return -1; } @@ -1374,7 +1536,7 @@ static int dma64_txunframed(dma_info_t *di, void *buf, uint len, bool commit) * WARNING: call must check the return value for error. * the error(toss frames) could be fatal and cause many subsequent hard to debug problems */ -static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, +static int dma64_txfast(struct dma_info *di, struct sk_buff *p0, bool commit) { struct sk_buff *p, *next; @@ -1394,7 +1556,7 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, */ for (p = p0; p; p = next) { uint nsegs, j; - hnddma_seg_map_t *map; + struct dma_seg_map *map; data = p->data; len = p->len; @@ -1410,7 +1572,7 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, /* get physical address of buffer start */ if (DMASGLIST_ENAB) memset(&di->txp_dmah[txout], 0, - sizeof(hnddma_seg_map_t)); + sizeof(struct dma_seg_map)); pa = pci_map_single(di->pbus, data, len, PCI_DMA_TODEVICE); @@ -1471,41 +1633,41 @@ static int dma64_txfast(dma_info_t *di, struct sk_buff *p0, /* kick the chip */ if (commit) W_REG(&di->d64txregs->ptr, - di->xmtptrbase + I2B(txout, dma64dd_t)); + di->xmtptrbase + I2B(txout, struct dma64desc)); /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; return 0; outoftxd: DMA_ERROR(("%s: dma_txfast: out of txds !!!\n", di->name)); - bcm_pkt_buf_free_skb(p0); - di->hnddma.txavail = 0; - di->hnddma.txnobuf++; + brcmu_pkt_buf_free_skb(p0); + di->dma.txavail = 0; + di->dma.txnobuf++; return -1; } /* * Reclaim next completed txd (txds if using chained buffers) in the range * specified and return associated packet. - * If range is HNDDMA_RANGE_TRANSMITTED, reclaim descriptors that have be + * If range is DMA_RANGE_TRANSMITTED, reclaim descriptors that have be * transmitted as noted by the hardware "CurrDescr" pointer. - * If range is HNDDMA_RANGE_TRANSFERED, reclaim descriptors that have be + * If range is DMA_RANGE_TRANSFERED, reclaim descriptors that have be * transferred by the DMA as noted by the hardware "ActiveDescr" pointer. - * If range is HNDDMA_RANGE_ALL, reclaim all txd(s) posted to the ring and + * If range is DMA_RANGE_ALL, reclaim all txd(s) posted to the ring and * return associated packet regardless of the value of hardware pointers. */ -static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) +static void *dma64_getnexttxp(struct dma_info *di, enum txd_range range) { u16 start, end, i; u16 active_desc; void *txp; DMA_TRACE(("%s: dma_getnexttxp %s\n", di->name, - (range == HNDDMA_RANGE_ALL) ? "all" : + (range == DMA_RANGE_ALL) ? "all" : ((range == - HNDDMA_RANGE_TRANSMITTED) ? "transmitted" : + DMA_RANGE_TRANSMITTED) ? "transmitted" : "transferred"))); if (di->ntxd == 0) @@ -1514,24 +1676,23 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) txp = NULL; start = di->txin; - if (range == HNDDMA_RANGE_ALL) + if (range == DMA_RANGE_ALL) end = di->txout; else { dma64regs_t *dregs = di->d64txregs; - end = - (u16) (B2I - (((R_REG(&dregs->status0) & + end = (u16) (B2I(((R_REG(&dregs->status0) & D64_XS0_CD_MASK) - - di->xmtptrbase) & D64_XS0_CD_MASK, dma64dd_t)); + di->xmtptrbase) & D64_XS0_CD_MASK, + struct dma64desc)); - if (range == HNDDMA_RANGE_TRANSFERED) { + if (range == DMA_RANGE_TRANSFERED) { active_desc = (u16) (R_REG(&dregs->status1) & D64_XS1_AD_MASK); active_desc = (active_desc - di->xmtptrbase) & D64_XS0_CD_MASK; - active_desc = B2I(active_desc, dma64dd_t); + active_desc = B2I(active_desc, struct dma64desc); if (end != active_desc) end = PREVTXD(active_desc); } @@ -1542,7 +1703,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) for (i = start; i != end && !txp; i = NEXTTXD(i)) { dmaaddr_t pa; - hnddma_seg_map_t *map = NULL; + struct dma_seg_map *map = NULL; uint size, j, nsegs; PHYSADDRLOSET(pa, @@ -1579,7 +1740,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) di->txin = i; /* tx flow control */ - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; return txp; @@ -1588,7 +1749,7 @@ static void *dma64_getnexttxp(dma_info_t *di, txd_range_t range) return NULL; } -static void *dma64_getnextrxp(dma_info_t *di, bool forceall) +static void *dma64_getnextrxp(struct dma_info *di, bool forceall) { uint i, curr; void *rxp; @@ -1602,7 +1763,7 @@ static void *dma64_getnextrxp(dma_info_t *di, bool forceall) curr = B2I(((R_REG(&di->d64rxregs->status0) & D64_RS0_CD_MASK) - - di->rcvptrbase) & D64_RS0_CD_MASK, dma64dd_t); + di->rcvptrbase) & D64_RS0_CD_MASK, struct dma64desc); /* ignore curr if forceall */ if (!forceall && (i == curr)) @@ -1642,7 +1803,7 @@ static bool _dma64_addrext(dma64regs_t *dma64regs) /* * Rotate all active tx dma ring entries "forward" by (ActiveDescriptor - txin). */ -static void dma64_txrotate(dma_info_t *di) +static void dma64_txrotate(struct dma_info *di) { u16 ad; uint nactive; @@ -1652,10 +1813,9 @@ static void dma64_txrotate(dma_info_t *di) u16 first, last; nactive = _dma_txactive(di); - ad = (u16) (B2I - ((((R_REG(&di->d64txregs->status1) & - D64_XS1_AD_MASK) - - di->xmtptrbase) & D64_XS1_AD_MASK), dma64dd_t)); + ad = (u16) (B2I((((R_REG(&di->d64txregs->status1) & + D64_XS1_AD_MASK) - di->xmtptrbase) & + D64_XS1_AD_MASK), struct dma64desc)); rot = TXD(ad - di->txin); /* full-ring case is a lot harder - don't worry about this */ @@ -1696,8 +1856,9 @@ static void dma64_txrotate(dma_info_t *di) /* Move the map */ if (DMASGLIST_ENAB) { memcpy(&di->txp_dmah[new], &di->txp_dmah[old], - sizeof(hnddma_seg_map_t)); - memset(&di->txp_dmah[old], 0, sizeof(hnddma_seg_map_t)); + sizeof(struct dma_seg_map)); + memset(&di->txp_dmah[old], 0, + sizeof(struct dma_seg_map)); } di->txp[old] = NULL; @@ -1706,14 +1867,14 @@ static void dma64_txrotate(dma_info_t *di) /* update txin and txout */ di->txin = ad; di->txout = TXD(di->txout + rot); - di->hnddma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; + di->dma.txavail = di->ntxd - NTXDACTIVE(di->txin, di->txout) - 1; /* kick the chip */ W_REG(&di->d64txregs->ptr, - di->xmtptrbase + I2B(di->txout, dma64dd_t)); + di->xmtptrbase + I2B(di->txout, struct dma64desc)); } -uint dma_addrwidth(si_t *sih, void *dmaregs) +uint dma_addrwidth(struct si_pub *sih, void *dmaregs) { /* Perform 64-bit checks only if we want to advertise 64-bit (> 32bit) capability) */ /* DMA engine is 64-bit capable */ @@ -1736,10 +1897,10 @@ uint dma_addrwidth(si_t *sih, void *dmaregs) * engine. This function calls a caller-supplied function for each packet in * the caller specified dma chain. */ -void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc) +void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc) (void *pkt, void *arg_a), void *arg_a) { - dma_info_t *di = (dma_info_t *) dmah; + struct dma_info *di = (struct dma_info *) dmah; uint i = di->txin; uint end = di->txout; struct sk_buff *skb; diff --git a/drivers/staging/brcm80211/include/hnddma.h b/drivers/staging/brcm80211/brcmsmac/dma.h index fbbcb9b5ae6..9c8b9a6a557 100644 --- a/drivers/staging/brcm80211/include/hnddma.h +++ b/drivers/staging/brcm80211/brcmsmac/dma.h @@ -14,13 +14,37 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _hnddma_h_ -#define _hnddma_h_ +#ifndef _BRCM_DMA_H_ +#define _BRCM_DMA_H_ -#ifndef _hnddma_pub_ -#define _hnddma_pub_ -struct hnddma_pub; -#endif /* _hnddma_pub_ */ +#include "types.h" /* forward structure declarations */ + +/* DMA structure: + * support two DMA engines: 32 bits address or 64 bit addressing + * basic DMA register set is per channel(transmit or receive) + * a pair of channels is defined for convenience + */ + +/* 32 bits addressing */ + +struct dma32diag { /* diag access */ + u32 fifoaddr; /* diag address */ + u32 fifodatalow; /* low 32bits of data */ + u32 fifodatahigh; /* high 32bits of data */ + u32 pad; /* reserved */ +}; + +/* 64 bits addressing */ + +/* dma registers per channel(xmt or rcv) */ +struct dma64regs { + u32 control; /* enable, et al */ + u32 ptr; /* last descriptor posted to chip */ + u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */ + u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */ + u32 status0; /* current descriptor, xmt state */ + u32 status1; /* active descriptor, xmt error */ +}; /* map/unmap direction */ #define DMA_TX 1 /* TX direction for DMA */ @@ -28,64 +52,64 @@ struct hnddma_pub; #define BUS_SWAP32(v) (v) /* range param for dma_getnexttxp() and dma_txreclaim */ -typedef enum txd_range { - HNDDMA_RANGE_ALL = 1, - HNDDMA_RANGE_TRANSMITTED, - HNDDMA_RANGE_TRANSFERED -} txd_range_t; +enum txd_range { + DMA_RANGE_ALL = 1, + DMA_RANGE_TRANSMITTED, + DMA_RANGE_TRANSFERED +}; /* dma function type */ -typedef void (*di_detach_t) (struct hnddma_pub *dmah); -typedef bool(*di_txreset_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxreset_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxidle_t) (struct hnddma_pub *dmah); -typedef void (*di_txinit_t) (struct hnddma_pub *dmah); -typedef bool(*di_txenabled_t) (struct hnddma_pub *dmah); -typedef void (*di_rxinit_t) (struct hnddma_pub *dmah); -typedef void (*di_txsuspend_t) (struct hnddma_pub *dmah); -typedef void (*di_txresume_t) (struct hnddma_pub *dmah); -typedef bool(*di_txsuspended_t) (struct hnddma_pub *dmah); -typedef bool(*di_txsuspendedidle_t) (struct hnddma_pub *dmah); -typedef int (*di_txfast_t) (struct hnddma_pub *dmah, struct sk_buff *p, +typedef void (*di_detach_t) (struct dma_pub *dmah); +typedef bool(*di_txreset_t) (struct dma_pub *dmah); +typedef bool(*di_rxreset_t) (struct dma_pub *dmah); +typedef bool(*di_rxidle_t) (struct dma_pub *dmah); +typedef void (*di_txinit_t) (struct dma_pub *dmah); +typedef bool(*di_txenabled_t) (struct dma_pub *dmah); +typedef void (*di_rxinit_t) (struct dma_pub *dmah); +typedef void (*di_txsuspend_t) (struct dma_pub *dmah); +typedef void (*di_txresume_t) (struct dma_pub *dmah); +typedef bool(*di_txsuspended_t) (struct dma_pub *dmah); +typedef bool(*di_txsuspendedidle_t) (struct dma_pub *dmah); +typedef int (*di_txfast_t) (struct dma_pub *dmah, struct sk_buff *p, bool commit); -typedef int (*di_txunframed_t) (struct hnddma_pub *dmah, void *p, uint len, +typedef int (*di_txunframed_t) (struct dma_pub *dmah, void *p, uint len, bool commit); -typedef void *(*di_getpos_t) (struct hnddma_pub *di, bool direction); -typedef void (*di_fifoloopbackenable_t) (struct hnddma_pub *dmah); -typedef bool(*di_txstopped_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxstopped_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxenable_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxenabled_t) (struct hnddma_pub *dmah); -typedef void *(*di_rx_t) (struct hnddma_pub *dmah); -typedef bool(*di_rxfill_t) (struct hnddma_pub *dmah); -typedef void (*di_txreclaim_t) (struct hnddma_pub *dmah, txd_range_t range); -typedef void (*di_rxreclaim_t) (struct hnddma_pub *dmah); -typedef unsigned long (*di_getvar_t) (struct hnddma_pub *dmah, +typedef void *(*di_getpos_t) (struct dma_pub *di, bool direction); +typedef void (*di_fifoloopbackenable_t) (struct dma_pub *dmah); +typedef bool(*di_txstopped_t) (struct dma_pub *dmah); +typedef bool(*di_rxstopped_t) (struct dma_pub *dmah); +typedef bool(*di_rxenable_t) (struct dma_pub *dmah); +typedef bool(*di_rxenabled_t) (struct dma_pub *dmah); +typedef void *(*di_rx_t) (struct dma_pub *dmah); +typedef bool(*di_rxfill_t) (struct dma_pub *dmah); +typedef void (*di_txreclaim_t) (struct dma_pub *dmah, enum txd_range range); +typedef void (*di_rxreclaim_t) (struct dma_pub *dmah); +typedef unsigned long (*di_getvar_t) (struct dma_pub *dmah, const char *name); -typedef void *(*di_getnexttxp_t) (struct hnddma_pub *dmah, txd_range_t range); -typedef void *(*di_getnextrxp_t) (struct hnddma_pub *dmah, bool forceall); -typedef void *(*di_peeknexttxp_t) (struct hnddma_pub *dmah); -typedef void *(*di_peeknextrxp_t) (struct hnddma_pub *dmah); -typedef void (*di_rxparam_get_t) (struct hnddma_pub *dmah, u16 *rxoffset, +typedef void *(*di_getnexttxp_t) (struct dma_pub *dmah, enum txd_range range); +typedef void *(*di_getnextrxp_t) (struct dma_pub *dmah, bool forceall); +typedef void *(*di_peeknexttxp_t) (struct dma_pub *dmah); +typedef void *(*di_peeknextrxp_t) (struct dma_pub *dmah); +typedef void (*di_rxparam_get_t) (struct dma_pub *dmah, u16 *rxoffset, u16 *rxbufsize); -typedef void (*di_txblock_t) (struct hnddma_pub *dmah); -typedef void (*di_txunblock_t) (struct hnddma_pub *dmah); -typedef uint(*di_txactive_t) (struct hnddma_pub *dmah); -typedef void (*di_txrotate_t) (struct hnddma_pub *dmah); -typedef void (*di_counterreset_t) (struct hnddma_pub *dmah); -typedef uint(*di_ctrlflags_t) (struct hnddma_pub *dmah, uint mask, uint flags); -typedef char *(*di_dump_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, +typedef void (*di_txblock_t) (struct dma_pub *dmah); +typedef void (*di_txunblock_t) (struct dma_pub *dmah); +typedef uint(*di_txactive_t) (struct dma_pub *dmah); +typedef void (*di_txrotate_t) (struct dma_pub *dmah); +typedef void (*di_counterreset_t) (struct dma_pub *dmah); +typedef uint(*di_ctrlflags_t) (struct dma_pub *dmah, uint mask, uint flags); +typedef char *(*di_dump_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, bool dumpring); -typedef char *(*di_dumptx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, +typedef char *(*di_dumptx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, bool dumpring); -typedef char *(*di_dumprx_t) (struct hnddma_pub *dmah, struct bcmstrbuf *b, +typedef char *(*di_dumprx_t) (struct dma_pub *dmah, struct brcmu_strbuf *b, bool dumpring); -typedef uint(*di_rxactive_t) (struct hnddma_pub *dmah); -typedef uint(*di_txpending_t) (struct hnddma_pub *dmah); -typedef uint(*di_txcommitted_t) (struct hnddma_pub *dmah); +typedef uint(*di_rxactive_t) (struct dma_pub *dmah); +typedef uint(*di_txpending_t) (struct dma_pub *dmah); +typedef uint(*di_txcommitted_t) (struct dma_pub *dmah); /* dma opsvec */ -typedef struct di_fcn_s { +struct di_fcn_s { di_detach_t detach; di_txinit_t txinit; di_txreset_t txreset; @@ -130,14 +154,14 @@ typedef struct di_fcn_s { di_txpending_t txpending; di_txcommitted_t txcommitted; uint endnum; -} di_fcn_t; +}; /* * Exported data structure (read-only) */ /* export structure */ -struct hnddma_pub { - const di_fcn_t *di_fn; /* DMA function pointers */ +struct dma_pub { + const struct di_fcn_s *di_fn; /* DMA function pointers */ uint txavail; /* # free tx descriptors */ uint dmactrlflags; /* dma control flags */ @@ -148,12 +172,12 @@ struct hnddma_pub { uint txnobuf; /* tx out of dma descriptors */ }; -extern struct hnddma_pub *dma_attach(char *name, si_t *sih, +extern struct dma_pub *dma_attach(char *name, struct si_pub *sih, void *dmaregstx, void *dmaregsrx, uint ntxd, uint nrxd, uint rxbufsize, int rxextheadroom, uint nrxpost, uint rxoffset, uint *msg_level); -extern const di_fcn_t dma64proc; +extern const struct di_fcn_s dma64proc; #define dma_detach(di) (dma64proc.detach(di)) #define dma_txreset(di) (dma64proc.txreset(di)) @@ -201,8 +225,8 @@ extern const di_fcn_t dma64proc; * SB attach provides ability to probe backplane and dma core capabilities * This info is needed by DMA_ALLOC_CONSISTENT in dma attach */ -extern uint dma_addrwidth(si_t *sih, void *dmaregs); -void dma_walk_packets(struct hnddma_pub *dmah, void (*callback_fnc) +extern uint dma_addrwidth(struct si_pub *sih, void *dmaregs); +void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc) (void *pkt, void *arg_a), void *arg_a); /* @@ -223,4 +247,4 @@ static inline void dma_spin_for_len(uint len, struct sk_buff *head) #endif /* defined(__mips__) */ } -#endif /* _hnddma_h_ */ +#endif /* _BRCM_DMA_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c index 82612290b99..d6de44e430d 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.c +++ b/drivers/staging/brcm80211/brcmsmac/mac80211_if.c @@ -16,44 +16,46 @@ #define __UNDEF_NO_VERSION__ -#include <linux/kernel.h> #include <linux/etherdevice.h> -#include <linux/types.h> -#include <linux/pci_ids.h> -#include <linux/module.h> #include <linux/pci.h> #include <linux/sched.h> #include <linux/firmware.h> #include <linux/interrupt.h> #include <net/mac80211.h> - -#include <proto/802.11.h> -#include <bcmdefs.h> -#include <bcmwifi.h> -#include <bcmutils.h> -#include <bcmnvram.h> -#include <pcicfg.h> -#include <wlioctl.h> -#include <sbhnddma.h> - -#include "phy/wlc_phy_int.h" +#include <defs.h> +#include "nicpci.h" +#include "phy/phy_int.h" #include "d11.h" -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "phy/phy_version.h" -#include "wlc_key.h" -#include "wlc_channel.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wl_dbg.h" -#include "wl_export.h" -#include "wl_ucode.h" -#include "wl_mac80211.h" +#include "channel.h" +#include "scb.h" +#include "pub.h" +#include "ucode_loader.h" +#include "mac80211_if.h" #define N_TX_QUEUES 4 /* #tx queues on mac80211<->driver interface */ -static void wl_timer(unsigned long data); -static void _wl_timer(struct wl_timer *t); +#define LOCK(wl) spin_lock_bh(&(wl)->lock) +#define UNLOCK(wl) spin_unlock_bh(&(wl)->lock) + +/* locking from inside brcms_isr */ +#define ISR_LOCK(wl, flags)\ + do {\ + spin_lock(&(wl)->isr_lock);\ + (void)(flags); } \ + while (0) + +#define ISR_UNLOCK(wl, flags)\ + do {\ + spin_unlock(&(wl)->isr_lock);\ + (void)(flags); } \ + while (0) + +/* locking under LOCK() to synchronize with brcms_isr */ +#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags) +#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags) + +static void brcms_timer(unsigned long data); +static void _brcms_timer(struct brcms_timer *t); static int ieee_hw_init(struct ieee80211_hw *hw); @@ -70,22 +72,20 @@ static int wl_linux_watchdog(void *ctx); FIF_OTHER_BSS | \ FIF_BCN_PRBRESP_PROMISC) -static int wl_found; +static int n_adapters_found; -#define WL_DEV_IF(dev) ((struct wl_if *)netdev_priv(dev)) -#define WL_INFO(dev) ((struct wl_info *)(WL_DEV_IF(dev)->wl)) -static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev); -static void wl_release_fw(struct wl_info *wl); +static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev); +static void brcms_release_fw(struct brcms_info *wl); /* local prototypes */ -static void wl_dpc(unsigned long data); -static irqreturn_t wl_isr(int irq, void *dev_id); +static void brcms_dpc(unsigned long data); +static irqreturn_t brcms_isr(int irq, void *dev_id); -static int __devinit wl_pci_probe(struct pci_dev *pdev, +static int __devinit brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent); -static void wl_remove(struct pci_dev *pdev); -static void wl_free(struct wl_info *wl); -static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br); +static void brcms_remove(struct pci_dev *pdev); +static void brcms_free(struct brcms_info *wl); +static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br); MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver."); @@ -93,14 +93,16 @@ MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); MODULE_LICENSE("Dual BSD/GPL"); /* recognized PCI IDs */ -static struct pci_device_id wl_id_table[] = { +static DEFINE_PCI_DEVICE_TABLE(brcms_pci_id_table) = { {PCI_VENDOR_ID_BROADCOM, 0x4357, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43225 2G */ {PCI_VENDOR_ID_BROADCOM, 0x4353, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 43224 DUAL */ {PCI_VENDOR_ID_BROADCOM, 0x4727, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, /* 4313 DUAL */ + /* 43224 Ven */ + {PCI_VENDOR_ID_BROADCOM, 0x0576, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, {0} }; -MODULE_DEVICE_TABLE(pci, wl_id_table); +MODULE_DEVICE_TABLE(pci, brcms_pci_id_table); #ifdef BCMDBG static int msglevel = 0xdeadbeef; @@ -113,88 +115,89 @@ module_param(phymsglevel, int, 0); #define WL_TO_HW(wl) (wl->pub->ieee_hw) /* MAC80211 callback functions */ -static int wl_ops_start(struct ieee80211_hw *hw); -static void wl_ops_stop(struct ieee80211_hw *hw); -static int wl_ops_add_interface(struct ieee80211_hw *hw, +static int brcms_ops_start(struct ieee80211_hw *hw); +static void brcms_ops_stop(struct ieee80211_hw *hw); +static int brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif); -static void wl_ops_remove_interface(struct ieee80211_hw *hw, +static void brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif); -static int wl_ops_config(struct ieee80211_hw *hw, u32 changed); -static void wl_ops_bss_info_changed(struct ieee80211_hw *hw, +static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed); +static void brcms_ops_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *info, u32 changed); -static void wl_ops_configure_filter(struct ieee80211_hw *hw, +static void brcms_ops_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, unsigned int *total_flags, u64 multicast); -static int wl_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, +static int brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set); -static void wl_ops_sw_scan_start(struct ieee80211_hw *hw); -static void wl_ops_sw_scan_complete(struct ieee80211_hw *hw); -static void wl_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf); -static int wl_ops_get_stats(struct ieee80211_hw *hw, +static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw); +static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw); +static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf); +static int brcms_ops_get_stats(struct ieee80211_hw *hw, struct ieee80211_low_level_stats *stats); -static void wl_ops_sta_notify(struct ieee80211_hw *hw, +static void brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum sta_notify_cmd cmd, struct ieee80211_sta *sta); -static int wl_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, +static int brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, const struct ieee80211_tx_queue_params *params); -static u64 wl_ops_get_tsf(struct ieee80211_hw *hw); -static int wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, +static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw); +static int brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta); -static int wl_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, - struct ieee80211_sta *sta); -static int wl_ops_ampdu_action(struct ieee80211_hw *hw, +static int brcms_ops_sta_remove(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta); +static int brcms_ops_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum ieee80211_ampdu_mlme_action action, struct ieee80211_sta *sta, u16 tid, u16 *ssn, u8 buf_size); -static void wl_ops_rfkill_poll(struct ieee80211_hw *hw); -static void wl_ops_flush(struct ieee80211_hw *hw, bool drop); +static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw); +static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop); -static void wl_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) +static void brcms_ops_tx(struct ieee80211_hw *hw, struct sk_buff *skb) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; - WL_LOCK(wl); + LOCK(wl); if (!wl->pub->up) { wiphy_err(wl->wiphy, "ops->tx called while down\n"); kfree_skb(skb); goto done; } - wlc_sendpkt_mac80211(wl->wlc, skb, hw); + brcms_c_sendpkt_mac80211(wl->wlc, skb, hw); done: - WL_UNLOCK(wl); + UNLOCK(wl); } -static int wl_ops_start(struct ieee80211_hw *hw) +static int brcms_ops_start(struct ieee80211_hw *hw) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; bool blocked; /* struct ieee80211_channel *curchan = hw->conf.channel; */ ieee80211_wake_queues(hw); - WL_LOCK(wl); - blocked = wl_rfkill_set_hw_state(wl); - WL_UNLOCK(wl); + LOCK(wl); + blocked = brcms_rfkill_set_hw_state(wl); + UNLOCK(wl); if (!blocked) wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); return 0; } -static void wl_ops_stop(struct ieee80211_hw *hw) +static void brcms_ops_stop(struct ieee80211_hw *hw) { ieee80211_stop_queues(hw); } static int -wl_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +brcms_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) { - struct wl_info *wl; + struct brcms_info *wl; int err; /* Just STA for now */ @@ -209,28 +212,28 @@ wl_ops_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) } wl = HW_TO_WL(hw); - WL_LOCK(wl); - err = wl_up(wl); - WL_UNLOCK(wl); + LOCK(wl); + err = brcms_up(wl); + UNLOCK(wl); if (err != 0) { - wiphy_err(hw->wiphy, "%s: wl_up() returned %d\n", __func__, + wiphy_err(hw->wiphy, "%s: brcms_up() returned %d\n", __func__, err); } return err; } static void -wl_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +brcms_ops_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) { - struct wl_info *wl; + struct brcms_info *wl; wl = HW_TO_WL(hw); /* put driver in down state */ - WL_LOCK(wl); - wl_down(wl); - WL_UNLOCK(wl); + LOCK(wl); + brcms_down(wl); + UNLOCK(wl); } /* @@ -240,13 +243,13 @@ static int ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, enum nl80211_channel_type type) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); int err = 0; switch (type) { case NL80211_CHAN_HT20: case NL80211_CHAN_NO_HT: - err = wlc_set(wl->wlc, WLC_SET_CHANNEL, chan->hw_value); + err = brcms_c_set(wl->wlc, BRCM_SET_CHANNEL, chan->hw_value); break; case NL80211_CHAN_HT40MINUS: case NL80211_CHAN_HT40PLUS: @@ -261,24 +264,24 @@ ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, return err; } -static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) +static int brcms_ops_config(struct ieee80211_hw *hw, u32 changed) { struct ieee80211_conf *conf = &hw->conf; - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); int err = 0; int new_int; struct wiphy *wiphy = hw->wiphy; - WL_LOCK(wl); + LOCK(wl); if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { - if (wlc_iovar_setint - (wl->wlc, "bcn_li_bcn", conf->listen_interval)) { + if (brcms_c_set_par(wl->wlc, IOV_BCN_LI_BCN, + conf->listen_interval) < 0) { wiphy_err(wiphy, "%s: Error setting listen_interval\n", __func__); err = -EIO; goto config_out; } - wlc_iovar_getint(wl->wlc, "bcn_li_bcn", &new_int); + brcms_c_get_par(wl->wlc, IOV_BCN_LI_BCN, &new_int); } if (changed & IEEE80211_CONF_CHANGE_MONITOR) wiphy_err(wiphy, "%s: change monitor mode: %s (implement)\n", @@ -290,14 +293,14 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) "true" : "false"); if (changed & IEEE80211_CONF_CHANGE_POWER) { - if (wlc_iovar_setint - (wl->wlc, "qtxpower", conf->power_level * 4)) { + if (brcms_c_set_par(wl->wlc, IOV_QTXPOWER, + conf->power_level * 4) < 0) { wiphy_err(wiphy, "%s: Error setting power_level\n", __func__); err = -EIO; goto config_out; } - wlc_iovar_getint(wl->wlc, "qtxpower", &new_int); + brcms_c_get_par(wl->wlc, IOV_QTXPOWER, &new_int); if (new_int != (conf->power_level * 4)) wiphy_err(wiphy, "%s: Power level req != actual, %d %d" "\n", __func__, conf->power_level * 4, @@ -307,15 +310,15 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) err = ieee_set_channel(hw, conf->channel, conf->channel_type); } if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) { - if (wlc_set - (wl->wlc, WLC_SET_SRL, + if (brcms_c_set + (wl->wlc, BRCM_SET_SRL, conf->short_frame_max_tx_count) < 0) { wiphy_err(wiphy, "%s: Error setting srl\n", __func__); err = -EIO; goto config_out; } - if (wlc_set(wl->wlc, WLC_SET_LRL, conf->long_frame_max_tx_count) - < 0) { + if (brcms_c_set(wl->wlc, BRCM_SET_LRL, + conf->long_frame_max_tx_count) < 0) { wiphy_err(wiphy, "%s: Error setting lrl\n", __func__); err = -EIO; goto config_out; @@ -323,16 +326,16 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) } config_out: - WL_UNLOCK(wl); + UNLOCK(wl); return err; } static void -wl_ops_bss_info_changed(struct ieee80211_hw *hw, +brcms_ops_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *info, u32 changed) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); struct wiphy *wiphy = hw->wiphy; int val; @@ -342,9 +345,9 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, */ wiphy_err(wiphy, "%s: %s: %sassociated\n", KBUILD_MODNAME, __func__, info->assoc ? "" : "dis"); - WL_LOCK(wl); - wlc_associate_upd(wl->wlc, info->assoc); - WL_UNLOCK(wl); + LOCK(wl); + brcms_c_associate_upd(wl->wlc, info->assoc); + UNLOCK(wl); } if (changed & BSS_CHANGED_ERP_SLOT) { /* slot timing changed */ @@ -352,23 +355,23 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, val = 1; else val = 0; - WL_LOCK(wl); - wlc_set(wl->wlc, WLC_SET_SHORTSLOT_OVERRIDE, val); - WL_UNLOCK(wl); + LOCK(wl); + brcms_c_set(wl->wlc, BRCMS_SET_SHORTSLOT_OVERRIDE, val); + UNLOCK(wl); } if (changed & BSS_CHANGED_HT) { /* 802.11n parameters changed */ u16 mode = info->ht_operation_mode; - WL_LOCK(wl); - wlc_protection_upd(wl->wlc, WLC_PROT_N_CFG, + LOCK(wl); + brcms_c_protection_upd(wl->wlc, BRCMS_PROT_N_CFG, mode & IEEE80211_HT_OP_MODE_PROTECTION); - wlc_protection_upd(wl->wlc, WLC_PROT_N_NONGF, + brcms_c_protection_upd(wl->wlc, BRCMS_PROT_N_NONGF, mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT); - wlc_protection_upd(wl->wlc, WLC_PROT_N_OBSS, + brcms_c_protection_upd(wl->wlc, BRCMS_PROT_N_OBSS, mode & IEEE80211_HT_OP_MODE_NON_HT_STA_PRSNT); - WL_UNLOCK(wl); + UNLOCK(wl); } if (changed & BSS_CHANGED_BASIC_RATES) { struct ieee80211_supported_band *bi; @@ -378,43 +381,43 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, int error; /* retrieve the current rates */ - WL_LOCK(wl); - error = wlc_ioctl(wl->wlc, WLC_GET_CURR_RATESET, + LOCK(wl); + error = brcms_c_ioctl(wl->wlc, BRCM_GET_CURR_RATESET, &rs, sizeof(rs), NULL); - WL_UNLOCK(wl); + UNLOCK(wl); if (error) { wiphy_err(wiphy, "%s: retrieve rateset failed: %d\n", __func__, error); return; } br_mask = info->basic_rates; - bi = hw->wiphy->bands[wlc_get_curband(wl->wlc)]; + bi = hw->wiphy->bands[brcms_c_get_curband(wl->wlc)]; for (i = 0; i < bi->n_bitrates; i++) { /* convert to internal rate value */ rate = (bi->bitrates[i].bitrate << 1) / 10; /* set/clear basic rate flag */ - wl_set_basic_rate(&rs, rate, br_mask & 1); + brcms_set_basic_rate(&rs, rate, br_mask & 1); br_mask >>= 1; } /* update the rate set */ - WL_LOCK(wl); - wlc_ioctl(wl->wlc, WLC_SET_RATESET, &rs, sizeof(rs), NULL); - WL_UNLOCK(wl); + LOCK(wl); + brcms_c_ioctl(wl->wlc, BRCM_SET_RATESET, &rs, sizeof(rs), NULL); + UNLOCK(wl); } if (changed & BSS_CHANGED_BEACON_INT) { /* Beacon interval changed */ - WL_LOCK(wl); - wlc_set(wl->wlc, WLC_SET_BCNPRD, info->beacon_int); - WL_UNLOCK(wl); + LOCK(wl); + brcms_c_set(wl->wlc, BRCM_SET_BCNPRD, info->beacon_int); + UNLOCK(wl); } if (changed & BSS_CHANGED_BSSID) { /* BSSID changed, for whatever reason (IBSS and managed mode) */ - WL_LOCK(wl); - wlc_set_addrmatch(wl->wlc, RCM_BSSID_OFFSET, + LOCK(wl); + brcms_c_set_addrmatch(wl->wlc, RCM_BSSID_OFFSET, info->bssid); - WL_UNLOCK(wl); + UNLOCK(wl); } if (changed & BSS_CHANGED_BEACON) { /* Beacon data changed, retrieve new beacon (beaconing modes) */ @@ -450,20 +453,15 @@ wl_ops_bss_info_changed(struct ieee80211_hw *hw, wiphy_err(wiphy, "%s: qos enabled: %s (implement)\n", __func__, info->qos ? "true" : "false"); } - if (changed & BSS_CHANGED_IDLE) { - /* Idle changed for this BSS/interface */ - wiphy_err(wiphy, "%s: BSS idle: %s (implement)\n", __func__, - info->idle ? "true" : "false"); - } return; } static void -wl_ops_configure_filter(struct ieee80211_hw *hw, +brcms_ops_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, unsigned int *total_flags, u64 multicast) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; struct wiphy *wiphy = hw->wiphy; changed_flags &= MAC_FILTERS; @@ -481,68 +479,68 @@ wl_ops_configure_filter(struct ieee80211_hw *hw, if (changed_flags & FIF_OTHER_BSS) wiphy_err(wiphy, "FIF_OTHER_BSS\n"); if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { - WL_LOCK(wl); + LOCK(wl); if (*total_flags & FIF_BCN_PRBRESP_PROMISC) { wl->pub->mac80211_state |= MAC80211_PROMISC_BCNS; - wlc_mac_bcn_promisc_change(wl->wlc, 1); + brcms_c_mac_bcn_promisc_change(wl->wlc, 1); } else { - wlc_mac_bcn_promisc_change(wl->wlc, 0); + brcms_c_mac_bcn_promisc_change(wl->wlc, 0); wl->pub->mac80211_state &= ~MAC80211_PROMISC_BCNS; } - WL_UNLOCK(wl); + UNLOCK(wl); } return; } static int -wl_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) +brcms_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) { return 0; } -static void wl_ops_sw_scan_start(struct ieee80211_hw *hw) +static void brcms_ops_sw_scan_start(struct ieee80211_hw *hw) { - struct wl_info *wl = hw->priv; - WL_LOCK(wl); - wlc_scan_start(wl->wlc); - WL_UNLOCK(wl); + struct brcms_info *wl = hw->priv; + LOCK(wl); + brcms_c_scan_start(wl->wlc); + UNLOCK(wl); return; } -static void wl_ops_sw_scan_complete(struct ieee80211_hw *hw) +static void brcms_ops_sw_scan_complete(struct ieee80211_hw *hw) { - struct wl_info *wl = hw->priv; - WL_LOCK(wl); - wlc_scan_stop(wl->wlc); - WL_UNLOCK(wl); + struct brcms_info *wl = hw->priv; + LOCK(wl); + brcms_c_scan_stop(wl->wlc); + UNLOCK(wl); return; } -static void wl_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf) +static void brcms_ops_set_tsf(struct ieee80211_hw *hw, u64 tsf) { wiphy_err(hw->wiphy, "%s: Enter\n", __func__); return; } static int -wl_ops_get_stats(struct ieee80211_hw *hw, +brcms_ops_get_stats(struct ieee80211_hw *hw, struct ieee80211_low_level_stats *stats) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; struct wl_cnt *cnt; - WL_LOCK(wl); + LOCK(wl); cnt = wl->pub->_cnt; stats->dot11ACKFailureCount = 0; stats->dot11RTSFailureCount = 0; stats->dot11FCSErrorCount = 0; stats->dot11RTSSuccessCount = 0; - WL_UNLOCK(wl); + UNLOCK(wl); return 0; } static void -wl_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, +brcms_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum sta_notify_cmd cmd, struct ieee80211_sta *sta) { switch (cmd) { @@ -555,32 +553,32 @@ wl_ops_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif, } static int -wl_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, +brcms_ops_conf_tx(struct ieee80211_hw *hw, u16 queue, const struct ieee80211_tx_queue_params *params) { - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; - WL_LOCK(wl); - wlc_wme_setparams(wl->wlc, queue, params, true); - WL_UNLOCK(wl); + LOCK(wl); + brcms_c_wme_setparams(wl->wlc, queue, params, true); + UNLOCK(wl); return 0; } -static u64 wl_ops_get_tsf(struct ieee80211_hw *hw) +static u64 brcms_ops_get_tsf(struct ieee80211_hw *hw) { wiphy_err(hw->wiphy, "%s: Enter\n", __func__); return 0; } static int -wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, +brcms_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct scb *scb; int i; - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; /* Init the scb */ scb = (struct scb *)sta->drv_priv; @@ -594,7 +592,7 @@ wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, wl->pub->global_ampdu = &(scb->scb_ampdu); wl->pub->global_ampdu->scb = scb; wl->pub->global_ampdu->max_pdu = 16; - bcm_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, + brcmu_pktq_init(&scb->scb_ampdu.txq, AMPDU_MAX_SCB_TID, AMPDU_MAX_SCB_TID * PKTQ_LEN_DEFAULT); sta->ht_cap.ht_supported = true; @@ -609,21 +607,21 @@ wl_ops_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, } static int -wl_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, +brcms_ops_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { return 0; } static int -wl_ops_ampdu_action(struct ieee80211_hw *hw, +brcms_ops_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif, enum ieee80211_ampdu_mlme_action action, struct ieee80211_sta *sta, u16 tid, u16 *ssn, u8 buf_size) { struct scb *scb = (struct scb *)sta->drv_priv; - struct wl_info *wl = hw->priv; + struct brcms_info *wl = hw->priv; int status; if (WARN_ON(scb->magic != SCB_MAGIC)) @@ -634,27 +632,37 @@ wl_ops_ampdu_action(struct ieee80211_hw *hw, case IEEE80211_AMPDU_RX_STOP: break; case IEEE80211_AMPDU_TX_START: - WL_LOCK(wl); - status = wlc_aggregatable(wl->wlc, tid); - WL_UNLOCK(wl); + LOCK(wl); + status = brcms_c_aggregatable(wl->wlc, tid); + UNLOCK(wl); if (!status) { wiphy_err(wl->wiphy, "START: tid %d is not agg\'able\n", tid); return -EINVAL; } - /* XXX: Use the starting sequence number provided ... */ + /* Future improvement: Use the starting sequence number provided ... */ *ssn = 0; ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid); break; case IEEE80211_AMPDU_TX_STOP: - WL_LOCK(wl); - wlc_ampdu_flush(wl->wlc, sta, tid); - WL_UNLOCK(wl); + LOCK(wl); + brcms_c_ampdu_flush(wl->wlc, sta, tid); + UNLOCK(wl); ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); break; case IEEE80211_AMPDU_TX_OPERATIONAL: - /* Not sure what to do here */ + /* + * BA window size from ADDBA response ('buf_size') defines how + * many outstanding MPDUs are allowed for the BA stream by + * recipient and traffic class. 'ampdu_factor' gives maximum + * AMPDU size. + */ + LOCK(wl); + brcms_c_ampdu_tx_operational(wl->wlc, tid, buf_size, + (1 << (IEEE80211_HT_MAX_AMPDU_FACTOR + + sta->ht_cap.ampdu_factor)) - 1); + UNLOCK(wl); /* Power save wakeup */ break; default: @@ -665,58 +673,58 @@ wl_ops_ampdu_action(struct ieee80211_hw *hw, return 0; } -static void wl_ops_rfkill_poll(struct ieee80211_hw *hw) +static void brcms_ops_rfkill_poll(struct ieee80211_hw *hw) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); bool blocked; - WL_LOCK(wl); - blocked = wlc_check_radio_disabled(wl->wlc); - WL_UNLOCK(wl); + LOCK(wl); + blocked = brcms_c_check_radio_disabled(wl->wlc); + UNLOCK(wl); wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); } -static void wl_ops_flush(struct ieee80211_hw *hw, bool drop) +static void brcms_ops_flush(struct ieee80211_hw *hw, bool drop) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); no_printk("%s: drop = %s\n", __func__, drop ? "true" : "false"); /* wait for packet queue and dma fifos to run empty */ - WL_LOCK(wl); - wlc_wait_for_tx_completion(wl->wlc, drop); - WL_UNLOCK(wl); + LOCK(wl); + brcms_c_wait_for_tx_completion(wl->wlc, drop); + UNLOCK(wl); } -static const struct ieee80211_ops wl_ops = { - .tx = wl_ops_tx, - .start = wl_ops_start, - .stop = wl_ops_stop, - .add_interface = wl_ops_add_interface, - .remove_interface = wl_ops_remove_interface, - .config = wl_ops_config, - .bss_info_changed = wl_ops_bss_info_changed, - .configure_filter = wl_ops_configure_filter, - .set_tim = wl_ops_set_tim, - .sw_scan_start = wl_ops_sw_scan_start, - .sw_scan_complete = wl_ops_sw_scan_complete, - .set_tsf = wl_ops_set_tsf, - .get_stats = wl_ops_get_stats, - .sta_notify = wl_ops_sta_notify, - .conf_tx = wl_ops_conf_tx, - .get_tsf = wl_ops_get_tsf, - .sta_add = wl_ops_sta_add, - .sta_remove = wl_ops_sta_remove, - .ampdu_action = wl_ops_ampdu_action, - .rfkill_poll = wl_ops_rfkill_poll, - .flush = wl_ops_flush, +static const struct ieee80211_ops brcms_ops = { + .tx = brcms_ops_tx, + .start = brcms_ops_start, + .stop = brcms_ops_stop, + .add_interface = brcms_ops_add_interface, + .remove_interface = brcms_ops_remove_interface, + .config = brcms_ops_config, + .bss_info_changed = brcms_ops_bss_info_changed, + .configure_filter = brcms_ops_configure_filter, + .set_tim = brcms_ops_set_tim, + .sw_scan_start = brcms_ops_sw_scan_start, + .sw_scan_complete = brcms_ops_sw_scan_complete, + .set_tsf = brcms_ops_set_tsf, + .get_stats = brcms_ops_get_stats, + .sta_notify = brcms_ops_sta_notify, + .conf_tx = brcms_ops_conf_tx, + .get_tsf = brcms_ops_get_tsf, + .sta_add = brcms_ops_sta_add, + .sta_remove = brcms_ops_sta_remove, + .ampdu_action = brcms_ops_ampdu_action, + .rfkill_poll = brcms_ops_rfkill_poll, + .flush = brcms_ops_flush, }; /* - * is called in wl_pci_probe() context, therefore no locking required. + * is called in brcms_pci_probe() context, therefore no locking required. */ -static int wl_set_hint(struct wl_info *wl, char *abbrev) +static int brcms_set_hint(struct brcms_info *wl, char *abbrev) { return regulatory_hint(wl->pub->ieee_hw->wiphy, abbrev); } @@ -727,25 +735,25 @@ static int wl_set_hint(struct wl_info *wl, char *abbrev) * Attach to the WL device identified by vendor and device parameters. * regs is a host accessible memory address pointing to WL device registers. * - * wl_attach is not defined as static because in the case where no bus + * brcms_attach is not defined as static because in the case where no bus * is defined, wl_attach will never be called, and thus, gcc will issue * a warning that this function is defined but not used if we declare * it as static. * * - * is called in wl_pci_probe() context, therefore no locking required. + * is called in brcms_pci_probe() context, therefore no locking required. */ -static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, +static struct brcms_info *brcms_attach(u16 vendor, u16 device, + unsigned long regs, uint bustype, void *btparam, uint irq) { - struct wl_info *wl = NULL; + struct brcms_info *wl = NULL; int unit, err; - unsigned long base_addr; struct ieee80211_hw *hw; u8 perm[ETH_ALEN]; - unit = wl_found; + unit = n_adapters_found; err = 0; if (unit < 0) { @@ -763,15 +771,13 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, atomic_set(&wl->callbacks, 0); /* setup the bottom half handler */ - tasklet_init(&wl->tasklet, wl_dpc, (unsigned long) wl); + tasklet_init(&wl->tasklet, brcms_dpc, (unsigned long) wl); base_addr = regs; - if (bustype == PCI_BUS) { - wl->piomode = false; - } else if (bustype == RPC_BUS) { + if (bustype == PCI_BUS || bustype == RPC_BUS) { /* Do nothing */ } else { bustype = PCI_BUS; @@ -788,42 +794,41 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, spin_lock_init(&wl->isr_lock); /* prepare ucode */ - if (wl_request_fw(wl, (struct pci_dev *)btparam) < 0) { + if (brcms_request_fw(wl, (struct pci_dev *)btparam) < 0) { wiphy_err(wl->wiphy, "%s: Failed to find firmware usually in " "%s\n", KBUILD_MODNAME, "/lib/firmware/brcm"); - wl_release_fw(wl); - wl_remove((struct pci_dev *)btparam); + brcms_release_fw(wl); + brcms_remove((struct pci_dev *)btparam); return NULL; } /* common load-time initialization */ - wl->wlc = wlc_attach((void *)wl, vendor, device, unit, wl->piomode, + wl->wlc = brcms_c_attach((void *)wl, vendor, device, unit, false, wl->regsva, wl->bcm_bustype, btparam, &err); - wl_release_fw(wl); + brcms_release_fw(wl); if (!wl->wlc) { - wiphy_err(wl->wiphy, "%s: wlc_attach() failed with code %d\n", + wiphy_err(wl->wiphy, "%s: attach() failed with code %d\n", KBUILD_MODNAME, err); goto fail; } - wl->pub = wlc_pub(wl->wlc); + wl->pub = brcms_c_pub(wl->wlc); wl->pub->ieee_hw = hw; - if (wlc_iovar_setint(wl->wlc, "mpc", 0)) { + if (brcms_c_set_par(wl->wlc, IOV_MPC, 0) < 0) { wiphy_err(wl->wiphy, "wl%d: Error setting MPC variable to 0\n", unit); } /* register our interrupt handler */ - if (request_irq(irq, wl_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) { + if (request_irq(irq, brcms_isr, IRQF_SHARED, KBUILD_MODNAME, wl)) { wiphy_err(wl->wiphy, "wl%d: request_irq() failed\n", unit); goto fail; } wl->irq = irq; /* register module */ - wlc_module_register(wl->pub, NULL, "linux", wl, NULL, wl_linux_watchdog, - NULL); + brcms_c_module_register(wl->pub, "linux", wl, wl_linux_watchdog, NULL); if (ieee_hw_init(hw)) { wiphy_err(wl->wiphy, "wl%d: %s: ieee_hw_init failed!\n", unit, @@ -843,19 +848,19 @@ static struct wl_info *wl_attach(u16 vendor, u16 device, unsigned long regs, } if (wl->pub->srom_ccode[0]) - err = wl_set_hint(wl, wl->pub->srom_ccode); + err = brcms_set_hint(wl, wl->pub->srom_ccode); else - err = wl_set_hint(wl, "US"); + err = brcms_set_hint(wl, "US"); if (err) { wiphy_err(wl->wiphy, "%s: regulatory_hint failed, status %d\n", __func__, err); } - wl_found++; + n_adapters_found++; return wl; fail: - wl_free(wl); + brcms_free(wl); return NULL; } @@ -870,7 +875,7 @@ fail: .max_power = 19, \ } -static struct ieee80211_channel wl_2ghz_chantable[] = { +static struct ieee80211_channel brcms_2ghz_chantable[] = { CHAN2GHZ(1, 2412, IEEE80211_CHAN_NO_HT40MINUS), CHAN2GHZ(2, 2417, IEEE80211_CHAN_NO_HT40MINUS), CHAN2GHZ(3, 2422, IEEE80211_CHAN_NO_HT40MINUS), @@ -902,7 +907,7 @@ static struct ieee80211_channel wl_2ghz_chantable[] = { .max_power = 21, \ } -static struct ieee80211_channel wl_5ghz_nphy_chantable[] = { +static struct ieee80211_channel brcms_5ghz_nphy_chantable[] = { /* UNII-1 */ CHAN5GHZ(36, IEEE80211_CHAN_NO_HT40MINUS), CHAN5GHZ(40, IEEE80211_CHAN_NO_HT40PLUS), @@ -970,7 +975,7 @@ static struct ieee80211_channel wl_5ghz_nphy_chantable[] = { .hw_value = (rate100m / 5), \ } -static struct ieee80211_rate wl_legacy_ratetable[] = { +static struct ieee80211_rate legacy_ratetable[] = { RATE(10, 0), RATE(20, IEEE80211_RATE_SHORT_PREAMBLE), RATE(55, IEEE80211_RATE_SHORT_PREAMBLE), @@ -985,12 +990,12 @@ static struct ieee80211_rate wl_legacy_ratetable[] = { RATE(540, 0), }; -static struct ieee80211_supported_band wl_band_2GHz_nphy = { +static struct ieee80211_supported_band brcms_band_2GHz_nphy = { .band = IEEE80211_BAND_2GHZ, - .channels = wl_2ghz_chantable, - .n_channels = ARRAY_SIZE(wl_2ghz_chantable), - .bitrates = wl_legacy_ratetable, - .n_bitrates = ARRAY_SIZE(wl_legacy_ratetable), + .channels = brcms_2ghz_chantable, + .n_channels = ARRAY_SIZE(brcms_2ghz_chantable), + .bitrates = legacy_ratetable, + .n_bitrates = ARRAY_SIZE(legacy_ratetable), .ht_cap = { /* from include/linux/ieee80211.h */ .cap = IEEE80211_HT_CAP_GRN_FLD | @@ -1007,12 +1012,12 @@ static struct ieee80211_supported_band wl_band_2GHz_nphy = { } }; -static struct ieee80211_supported_band wl_band_5GHz_nphy = { +static struct ieee80211_supported_band brcms_band_5GHz_nphy = { .band = IEEE80211_BAND_5GHZ, - .channels = wl_5ghz_nphy_chantable, - .n_channels = ARRAY_SIZE(wl_5ghz_nphy_chantable), - .bitrates = wl_legacy_ratetable + 4, - .n_bitrates = ARRAY_SIZE(wl_legacy_ratetable) - 4, + .channels = brcms_5ghz_nphy_chantable, + .n_channels = ARRAY_SIZE(brcms_5ghz_nphy_chantable), + .bitrates = legacy_ratetable + 4, + .n_bitrates = ARRAY_SIZE(legacy_ratetable) - 4, .ht_cap = { /* use IEEE80211_HT_CAP_* from include/linux/ieee80211.h */ .cap = IEEE80211_HT_CAP_GRN_FLD | IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_40MHZ_INTOLERANT, /* No 40 mhz yet */ @@ -1028,11 +1033,11 @@ static struct ieee80211_supported_band wl_band_5GHz_nphy = { }; /* - * is called in wl_pci_probe() context, therefore no locking required. + * is called in brcms_pci_probe() context, therefore no locking required. */ static int ieee_hw_rate_init(struct ieee80211_hw *hw) { - struct wl_info *wl = HW_TO_WL(hw); + struct brcms_info *wl = HW_TO_WL(hw); int has_5g; char phy_list[4]; @@ -1041,17 +1046,16 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw) hw->wiphy->bands[IEEE80211_BAND_2GHZ] = NULL; hw->wiphy->bands[IEEE80211_BAND_5GHZ] = NULL; - if (wlc_get(wl->wlc, WLC_GET_PHYLIST, (int *)&phy_list) < 0) { + if (brcms_c_get(wl->wlc, BRCM_GET_PHYLIST, (int *)&phy_list) < 0) wiphy_err(hw->wiphy, "Phy list failed\n"); - } if (phy_list[0] == 'n' || phy_list[0] == 'c') { if (phy_list[0] == 'c') { /* Single stream */ - wl_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0; - wl_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72; + brcms_band_2GHz_nphy.ht_cap.mcs.rx_mask[1] = 0; + brcms_band_2GHz_nphy.ht_cap.mcs.rx_highest = 72; } - hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl_band_2GHz_nphy; + hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &brcms_band_2GHz_nphy; } else { return -EPERM; } @@ -1061,7 +1065,7 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw) has_5g++; if (phy_list[0] == 'n' || phy_list[0] == 'c') { hw->wiphy->bands[IEEE80211_BAND_5GHZ] = - &wl_band_5GHz_nphy; + &brcms_band_5GHz_nphy; } else { return -EPERM; } @@ -1070,7 +1074,7 @@ static int ieee_hw_rate_init(struct ieee80211_hw *hw) } /* - * is called in wl_pci_probe() context, therefore no locking required. + * is called in brcms_pci_probe() context, therefore no locking required. */ static int ieee_hw_init(struct ieee80211_hw *hw) { @@ -1079,13 +1083,8 @@ static int ieee_hw_init(struct ieee80211_hw *hw) | IEEE80211_HW_REPORTS_TX_ACK_STATUS | IEEE80211_HW_AMPDU_AGGREGATION; - hw->extra_tx_headroom = wlc_get_header_len(); + hw->extra_tx_headroom = brcms_c_get_header_len(); hw->queues = N_TX_QUEUES; - /* FIXME: this doesn't seem to be used properly in minstrel_ht. - * mac80211/status.c:ieee80211_tx_status() checks this value, - * but mac80211/rc80211_minstrel_ht.c:minstrel_ht_get_rate() - * appears to always set 3 rates - */ hw->max_rates = 2; /* Primary rate and 1 fallback rate */ hw->channel_change_time = 7 * 1000; /* channel change time is dependent on chip and band */ @@ -1101,15 +1100,15 @@ static int ieee_hw_init(struct ieee80211_hw *hw) * determines if a device is a WL device, and if so, attaches it. * * This function determines if a device pointed to by pdev is a WL device, - * and if so, performs a wl_attach() on it. + * and if so, performs a brcms_attach() on it. * * Perimeter lock is initialized in the course of this function. */ static int __devinit -wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) +brcms_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { int rc; - struct wl_info *wl; + struct brcms_info *wl; struct ieee80211_hw *hw; u32 val; @@ -1118,7 +1117,8 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) PCI_FUNC(pdev->devfn), pdev->irq); if ((pdev->vendor != PCI_VENDOR_ID_BROADCOM) || - (((pdev->device & 0xff00) != 0x4300) && + ((pdev->device != 0x0576) && + ((pdev->device & 0xff00) != 0x4300) && ((pdev->device & 0xff00) != 0x4700) && ((pdev->device < 43000) || (pdev->device > 43999)))) return -ENODEV; @@ -1136,7 +1136,7 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) if ((val & 0x0000ff00) != 0) pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); - hw = ieee80211_alloc_hw(sizeof(struct wl_info), &wl_ops); + hw = ieee80211_alloc_hw(sizeof(struct brcms_info), &brcms_ops); if (!hw) { pr_err("%s: ieee80211_alloc_hw failed\n", __func__); return -ENOMEM; @@ -1148,43 +1148,44 @@ wl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) memset(hw->priv, 0, sizeof(*wl)); - wl = wl_attach(pdev->vendor, pdev->device, pci_resource_start(pdev, 0), - PCI_BUS, pdev, pdev->irq); + wl = brcms_attach(pdev->vendor, pdev->device, + pci_resource_start(pdev, 0), PCI_BUS, pdev, + pdev->irq); if (!wl) { - pr_err("%s: %s: wl_attach failed!\n", KBUILD_MODNAME, + pr_err("%s: %s: brcms_attach failed!\n", KBUILD_MODNAME, __func__); return -ENODEV; } return 0; } -static int wl_suspend(struct pci_dev *pdev, pm_message_t state) +static int brcms_suspend(struct pci_dev *pdev, pm_message_t state) { - struct wl_info *wl; + struct brcms_info *wl; struct ieee80211_hw *hw; hw = pci_get_drvdata(pdev); wl = HW_TO_WL(hw); if (!wl) { wiphy_err(wl->wiphy, - "wl_suspend: pci_get_drvdata failed\n"); + "brcms_suspend: pci_get_drvdata failed\n"); return -ENODEV; } /* only need to flag hw is down for proper resume */ - WL_LOCK(wl); + LOCK(wl); wl->pub->hw_up = false; - WL_UNLOCK(wl); + UNLOCK(wl); pci_save_state(pdev); pci_disable_device(pdev); return pci_set_power_state(pdev, PCI_D3hot); } -static int wl_resume(struct pci_dev *pdev) +static int brcms_resume(struct pci_dev *pdev) { - struct wl_info *wl; + struct brcms_info *wl; struct ieee80211_hw *hw; int err = 0; u32 val; @@ -1193,7 +1194,7 @@ static int wl_resume(struct pci_dev *pdev) wl = HW_TO_WL(hw); if (!wl) { wiphy_err(wl->wiphy, - "wl: wl_resume: pci_get_drvdata failed\n"); + "wl: brcms_resume: pci_get_drvdata failed\n"); return -ENODEV; } @@ -1215,97 +1216,80 @@ static int wl_resume(struct pci_dev *pdev) /* * done. driver will be put in up state - * in wl_ops_add_interface() call. + * in brcms_ops_add_interface() call. */ return err; } /* -* called from both kernel as from wl_*() +* called from both kernel as from this kernel module. * precondition: perimeter lock is not acquired. */ -static void wl_remove(struct pci_dev *pdev) +static void brcms_remove(struct pci_dev *pdev) { - struct wl_info *wl; + struct brcms_info *wl; struct ieee80211_hw *hw; int status; hw = pci_get_drvdata(pdev); wl = HW_TO_WL(hw); if (!wl) { - pr_err("wl: wl_remove: pci_get_drvdata failed\n"); + pr_err("wl: brcms_remove: pci_get_drvdata failed\n"); return; } - WL_LOCK(wl); - status = wlc_chipmatch(pdev->vendor, pdev->device); - WL_UNLOCK(wl); + LOCK(wl); + status = brcms_c_chipmatch(pdev->vendor, pdev->device); + UNLOCK(wl); if (!status) { - wiphy_err(wl->wiphy, "wl: wl_remove: wlc_chipmatch failed\n"); + wiphy_err(wl->wiphy, "wl: brcms_remove: chipmatch " + "failed\n"); return; } if (wl->wlc) { wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, false); wiphy_rfkill_stop_polling(wl->pub->ieee_hw->wiphy); ieee80211_unregister_hw(hw); - WL_LOCK(wl); - wl_down(wl); - WL_UNLOCK(wl); + LOCK(wl); + brcms_down(wl); + UNLOCK(wl); } pci_disable_device(pdev); - wl_free(wl); + brcms_free(wl); pci_set_drvdata(pdev, NULL); ieee80211_free_hw(hw); } -static struct pci_driver wl_pci_driver = { +static struct pci_driver brcms_pci_driver = { .name = KBUILD_MODNAME, - .probe = wl_pci_probe, - .suspend = wl_suspend, - .resume = wl_resume, - .remove = __devexit_p(wl_remove), - .id_table = wl_id_table, + .probe = brcms_pci_probe, + .suspend = brcms_suspend, + .resume = brcms_resume, + .remove = __devexit_p(brcms_remove), + .id_table = brcms_pci_id_table, }; /** * This is the main entry point for the WL driver. * * This function determines if a device pointed to by pdev is a WL device, - * and if so, performs a wl_attach() on it. + * and if so, performs a brcms_attach() on it. * */ -static int __init wl_module_init(void) +static int __init brcms_module_init(void) { int error = -ENODEV; #ifdef BCMDBG if (msglevel != 0xdeadbeef) - wl_msg_level = msglevel; - else { - char *var = getvar(NULL, "wl_msglevel"); - if (var) { - unsigned long value; - - (void)strict_strtoul(var, 0, &value); - wl_msg_level = value; - } - } + brcm_msg_level = msglevel; if (phymsglevel != 0xdeadbeef) phyhal_msg_level = phymsglevel; - else { - char *var = getvar(NULL, "phy_msglevel"); - if (var) { - unsigned long value; - - (void)strict_strtoul(var, 0, &value); - phyhal_msg_level = value; - } - } #endif /* BCMDBG */ - error = pci_register_driver(&wl_pci_driver); + error = pci_register_driver(&brcms_pci_driver); if (!error) return 0; @@ -1321,14 +1305,14 @@ static int __init wl_module_init(void) * system. * */ -static void __exit wl_module_exit(void) +static void __exit brcms_module_exit(void) { - pci_unregister_driver(&wl_pci_driver); + pci_unregister_driver(&brcms_pci_driver); } -module_init(wl_module_init); -module_exit(wl_module_exit); +module_init(brcms_module_init); +module_exit(brcms_module_exit); /** * This function frees the WL per-device resources. @@ -1339,13 +1323,13 @@ module_exit(wl_module_exit); * precondition: can both be called locked and unlocked * */ -static void wl_free(struct wl_info *wl) +static void brcms_free(struct brcms_info *wl) { - struct wl_timer *t, *next; + struct brcms_timer *t, *next; /* free ucode data */ if (wl->fw.fw_cnt) - wl_ucode_data_free(); + brcms_ucode_data_free(); if (wl->irq) free_irq(wl->irq, wl); @@ -1353,12 +1337,12 @@ static void wl_free(struct wl_info *wl) tasklet_kill(&wl->tasklet); if (wl->pub) { - wlc_module_unregister(wl->pub, "linux", wl); + brcms_c_module_unregister(wl->pub, "linux", wl); } /* free common resources */ if (wl->wlc) { - wlc_detach(wl->wlc); + brcms_c_detach(wl->wlc); wl->wlc = NULL; wl->pub = NULL; } @@ -1390,7 +1374,7 @@ static void wl_free(struct wl_info *wl) } /* flags the given rate in rateset as requested */ -static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) +static void brcms_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) { u32 i; @@ -1399,9 +1383,9 @@ static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) continue; if (is_br) - rs->rates[i] |= WLC_RATE_FLAG; + rs->rates[i] |= BRCMS_RATE_FLAG; else - rs->rates[i] &= WLC_RATE_MASK; + rs->rates[i] &= BRCMS_RATE_MASK; return; } } @@ -1409,8 +1393,8 @@ static void wl_set_basic_rate(struct wl_rateset *rs, u16 rate, bool is_br) /* * precondition: perimeter lock has been acquired */ -void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state, - int prio) +void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, + bool state, int prio) { wiphy_err(wl->wiphy, "Shouldn't be here %s\n", __func__); } @@ -1418,21 +1402,21 @@ void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state, /* * precondition: perimeter lock has been acquired */ -void wl_init(struct wl_info *wl) +void brcms_init(struct brcms_info *wl) { BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); - wl_reset(wl); + brcms_reset(wl); - wlc_init(wl->wlc); + brcms_c_init(wl->wlc); } /* * precondition: perimeter lock has been acquired */ -uint wl_reset(struct wl_info *wl) +uint brcms_reset(struct brcms_info *wl) { BCMMSG(WL_TO_HW(wl)->wiphy, "wl%d\n", wl->pub->unit); - wlc_reset(wl->wlc); + brcms_c_reset(wl->wlc); /* dpc will not be rescheduled */ wl->resched = 0; @@ -1444,54 +1428,54 @@ uint wl_reset(struct wl_info *wl) * These are interrupt on/off entry points. Disable interrupts * during interrupt state transition. */ -void wl_intrson(struct wl_info *wl) +void brcms_intrson(struct brcms_info *wl) { unsigned long flags; INT_LOCK(wl, flags); - wlc_intrson(wl->wlc); + brcms_c_intrson(wl->wlc); INT_UNLOCK(wl, flags); } /* * precondition: perimeter lock has been acquired */ -bool wl_alloc_dma_resources(struct wl_info *wl, uint addrwidth) +bool wl_alloc_dma_resources(struct brcms_info *wl, uint addrwidth) { return true; } -u32 wl_intrsoff(struct wl_info *wl) +u32 brcms_intrsoff(struct brcms_info *wl) { unsigned long flags; u32 status; INT_LOCK(wl, flags); - status = wlc_intrsoff(wl->wlc); + status = brcms_c_intrsoff(wl->wlc); INT_UNLOCK(wl, flags); return status; } -void wl_intrsrestore(struct wl_info *wl, u32 macintmask) +void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask) { unsigned long flags; INT_LOCK(wl, flags); - wlc_intrsrestore(wl->wlc, macintmask); + brcms_c_intrsrestore(wl->wlc, macintmask); INT_UNLOCK(wl, flags); } /* * precondition: perimeter lock has been acquired */ -int wl_up(struct wl_info *wl) +int brcms_up(struct brcms_info *wl) { int error = 0; if (wl->pub->up) return 0; - error = wlc_up(wl->wlc); + error = brcms_c_up(wl->wlc); return error; } @@ -1499,37 +1483,37 @@ int wl_up(struct wl_info *wl) /* * precondition: perimeter lock has been acquired */ -void wl_down(struct wl_info *wl) +void brcms_down(struct brcms_info *wl) { uint callbacks, ret_val = 0; /* call common down function */ - ret_val = wlc_down(wl->wlc); + ret_val = brcms_c_down(wl->wlc); callbacks = atomic_read(&wl->callbacks) - ret_val; /* wait for down callbacks to complete */ - WL_UNLOCK(wl); + UNLOCK(wl); /* For HIGH_only driver, it's important to actually schedule other work, * not just spin wait since everything runs at schedule level */ SPINWAIT((atomic_read(&wl->callbacks) > callbacks), 100 * 1000); - WL_LOCK(wl); + LOCK(wl); } -static irqreturn_t wl_isr(int irq, void *dev_id) +static irqreturn_t brcms_isr(int irq, void *dev_id) { - struct wl_info *wl; + struct brcms_info *wl; bool ours, wantdpc; unsigned long flags; - wl = (struct wl_info *) dev_id; + wl = (struct brcms_info *) dev_id; - WL_ISRLOCK(wl, flags); + ISR_LOCK(wl, flags); /* call common first level interrupt handler */ - ours = wlc_isr(wl->wlc, &wantdpc); + ours = brcms_c_isr(wl->wlc, &wantdpc); if (ours) { /* if more to do... */ if (wantdpc) { @@ -1540,18 +1524,18 @@ static irqreturn_t wl_isr(int irq, void *dev_id) } } - WL_ISRUNLOCK(wl, flags); + ISR_UNLOCK(wl, flags); return IRQ_RETVAL(ours); } -static void wl_dpc(unsigned long data) +static void brcms_dpc(unsigned long data) { - struct wl_info *wl; + struct brcms_info *wl; - wl = (struct wl_info *) data; + wl = (struct brcms_info *) data; - WL_LOCK(wl); + LOCK(wl); /* call the common second level interrupt handler */ if (wl->pub->up) { @@ -1559,14 +1543,14 @@ static void wl_dpc(unsigned long data) unsigned long flags; INT_LOCK(wl, flags); - wlc_intrsupd(wl->wlc); + brcms_c_intrsupd(wl->wlc); INT_UNLOCK(wl, flags); } - wl->resched = wlc_dpc(wl->wlc, true); + wl->resched = brcms_c_dpc(wl->wlc, true); } - /* wlc_dpc() may bring the driver down */ + /* brcms_c_dpc() may bring the driver down */ if (!wl->pub->up) goto done; @@ -1575,27 +1559,27 @@ static void wl_dpc(unsigned long data) tasklet_schedule(&wl->tasklet); else { /* re-enable interrupts */ - wl_intrson(wl); + brcms_intrson(wl); } done: - WL_UNLOCK(wl); + UNLOCK(wl); } /* * is called by the kernel from software irq context */ -static void wl_timer(unsigned long data) +static void brcms_timer(unsigned long data) { - _wl_timer((struct wl_timer *) data); + _brcms_timer((struct brcms_timer *) data); } /* * precondition: perimeter lock is not acquired */ -static void _wl_timer(struct wl_timer *t) +static void _brcms_timer(struct brcms_timer *t) { - WL_LOCK(t->wl); + LOCK(t->wl); if (t->set) { if (t->periodic) { @@ -1611,7 +1595,7 @@ static void _wl_timer(struct wl_timer *t) atomic_dec(&t->wl->callbacks); - WL_UNLOCK(t->wl); + UNLOCK(t->wl); } /* @@ -1620,21 +1604,22 @@ static void _wl_timer(struct wl_timer *t) * * precondition: perimeter lock has been acquired */ -struct wl_timer *wl_init_timer(struct wl_info *wl, void (*fn) (void *arg), - void *arg, const char *name) +struct brcms_timer *brcms_init_timer(struct brcms_info *wl, + void (*fn) (void *arg), + void *arg, const char *name) { - struct wl_timer *t; + struct brcms_timer *t; - t = kzalloc(sizeof(struct wl_timer), GFP_ATOMIC); + t = kzalloc(sizeof(struct brcms_timer), GFP_ATOMIC); if (!t) { - wiphy_err(wl->wiphy, "wl%d: wl_init_timer: out of memory\n", + wiphy_err(wl->wiphy, "wl%d: brcms_init_timer: out of memory\n", wl->pub->unit); return 0; } init_timer(&t->timer); t->timer.data = (unsigned long) t; - t->timer.function = wl_timer; + t->timer.function = brcms_timer; t->wl = wl; t->fn = fn; t->arg = arg; @@ -1655,7 +1640,8 @@ struct wl_timer *wl_init_timer(struct wl_info *wl, void (*fn) (void *arg), * * precondition: perimeter lock has been acquired */ -void wl_add_timer(struct wl_info *wl, struct wl_timer *t, uint ms, int periodic) +void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *t, uint ms, + int periodic) { #ifdef BCMDBG if (t->set) { @@ -1677,7 +1663,7 @@ void wl_add_timer(struct wl_info *wl, struct wl_timer *t, uint ms, int periodic) * * precondition: perimeter lock has been acquired */ -bool wl_del_timer(struct wl_info *wl, struct wl_timer *t) +bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *t) { if (t->set) { t->set = false; @@ -1693,12 +1679,12 @@ bool wl_del_timer(struct wl_info *wl, struct wl_timer *t) /* * precondition: perimeter lock has been acquired */ -void wl_free_timer(struct wl_info *wl, struct wl_timer *t) +void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *t) { - struct wl_timer *tmp; + struct brcms_timer *tmp; /* delete the timer in case it is active */ - wl_del_timer(wl, t); + brcms_del_timer(wl, t); if (wl->timers == t) { wl->timers = wl->timers->next; @@ -1735,13 +1721,13 @@ static int wl_linux_watchdog(void *ctx) return 0; } -struct wl_fw_hdr { +struct firmware_hdr { u32 offset; u32 len; u32 idx; }; -char *wl_firmwares[WL_MAX_FW] = { +char *brcms_firmwares[MAX_FW_IMAGES] = { "brcm/bcm43xx", NULL }; @@ -1749,13 +1735,13 @@ char *wl_firmwares[WL_MAX_FW] = { /* * precondition: perimeter lock has been acquired */ -int wl_ucode_init_buf(struct wl_info *wl, void **pbuf, u32 idx) +int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, u32 idx) { int i, entry; const u8 *pdata; - struct wl_fw_hdr *hdr; + struct firmware_hdr *hdr; for (i = 0; i < wl->fw.fw_cnt; i++) { - hdr = (struct wl_fw_hdr *)wl->fw.fw_hdr[i]->data; + hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; for (entry = 0; entry < wl->fw.hdr_num_entries[i]; entry++, hdr++) { if (hdr->idx == idx) { @@ -1779,16 +1765,16 @@ fail: } /* - * Precondition: Since this function is called in wl_pci_probe() context, + * Precondition: Since this function is called in brcms_pci_probe() context, * no locking is required. */ -int wl_ucode_init_uint(struct wl_info *wl, u32 *data, u32 idx) +int brcms_ucode_init_uint(struct brcms_info *wl, u32 *data, u32 idx) { int i, entry; const u8 *pdata; - struct wl_fw_hdr *hdr; + struct firmware_hdr *hdr; for (i = 0; i < wl->fw.fw_cnt; i++) { - hdr = (struct wl_fw_hdr *)wl->fw.fw_hdr[i]->data; + hdr = (struct firmware_hdr *)wl->fw.fw_hdr[i]->data; for (entry = 0; entry < wl->fw.hdr_num_entries[i]; entry++, hdr++) { if (hdr->idx == idx) { @@ -1808,21 +1794,21 @@ int wl_ucode_init_uint(struct wl_info *wl, u32 *data, u32 idx) } /* - * Precondition: Since this function is called in wl_pci_probe() context, + * Precondition: Since this function is called in brcms_pci_probe() context, * no locking is required. */ -static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev) +static int brcms_request_fw(struct brcms_info *wl, struct pci_dev *pdev) { int status; struct device *device = &pdev->dev; char fw_name[100]; int i; - memset((void *)&wl->fw, 0, sizeof(struct wl_firmware)); - for (i = 0; i < WL_MAX_FW; i++) { - if (wl_firmwares[i] == NULL) + memset((void *)&wl->fw, 0, sizeof(struct brcms_firmware)); + for (i = 0; i < MAX_FW_IMAGES; i++) { + if (brcms_firmwares[i] == NULL) break; - sprintf(fw_name, "%s-%d.fw", wl_firmwares[i], + sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i], UCODE_LOADER_API_VER); status = request_firmware(&wl->fw.fw_bin[i], fw_name, device); if (status) { @@ -1830,7 +1816,7 @@ static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev) KBUILD_MODNAME, fw_name); return status; } - sprintf(fw_name, "%s_hdr-%d.fw", wl_firmwares[i], + sprintf(fw_name, "%s_hdr-%d.fw", brcms_firmwares[i], UCODE_LOADER_API_VER); status = request_firmware(&wl->fw.fw_hdr[i], fw_name, device); if (status) { @@ -1839,28 +1825,28 @@ static int wl_request_fw(struct wl_info *wl, struct pci_dev *pdev) return status; } wl->fw.hdr_num_entries[i] = - wl->fw.fw_hdr[i]->size / (sizeof(struct wl_fw_hdr)); + wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr)); } wl->fw.fw_cnt = i; - return wl_ucode_data_init(wl); + return brcms_ucode_data_init(wl); } /* * precondition: can both be called locked and unlocked */ -void wl_ucode_free_buf(void *p) +void brcms_ucode_free_buf(void *p) { kfree(p); } /* - * Precondition: Since this function is called in wl_pci_probe() context, + * Precondition: Since this function is called in brcms_pci_probe() context, * no locking is required. */ -static void wl_release_fw(struct wl_info *wl) +static void brcms_release_fw(struct brcms_info *wl) { int i; - for (i = 0; i < WL_MAX_FW; i++) { + for (i = 0; i < MAX_FW_IMAGES; i++) { release_firmware(wl->fw.fw_bin[i]); release_firmware(wl->fw.fw_hdr[i]); } @@ -1870,18 +1856,18 @@ static void wl_release_fw(struct wl_info *wl) /* * checks validity of all firmware images loaded from user space * - * Precondition: Since this function is called in wl_pci_probe() context, + * Precondition: Since this function is called in brcms_pci_probe() context, * no locking is required. */ -int wl_check_firmwares(struct wl_info *wl) +int brcms_check_firmwares(struct brcms_info *wl) { int i; int entry; int rc = 0; const struct firmware *fw; const struct firmware *fw_hdr; - struct wl_fw_hdr *ucode_hdr; - for (i = 0; i < WL_MAX_FW && rc == 0; i++) { + struct firmware_hdr *ucode_hdr; + for (i = 0; i < MAX_FW_IMAGES && rc == 0; i++) { fw = wl->fw.fw_bin[i]; fw_hdr = wl->fw.fw_hdr[i]; if (fw == NULL && fw_hdr == NULL) { @@ -1890,10 +1876,10 @@ int wl_check_firmwares(struct wl_info *wl) wiphy_err(wl->wiphy, "%s: invalid bin/hdr fw\n", __func__); rc = -EBADF; - } else if (fw_hdr->size % sizeof(struct wl_fw_hdr)) { + } else if (fw_hdr->size % sizeof(struct firmware_hdr)) { wiphy_err(wl->wiphy, "%s: non integral fw hdr file " "size %zu/%zu\n", __func__, fw_hdr->size, - sizeof(struct wl_fw_hdr)); + sizeof(struct firmware_hdr)); rc = -EBADF; } else if (fw->size < MIN_FW_SIZE || fw->size > MAX_FW_SIZE) { wiphy_err(wl->wiphy, "%s: out of bounds fw file size " @@ -1901,7 +1887,7 @@ int wl_check_firmwares(struct wl_info *wl) rc = -EBADF; } else { /* check if ucode section overruns firmware image */ - ucode_hdr = (struct wl_fw_hdr *)fw_hdr->data; + ucode_hdr = (struct firmware_hdr *)fw_hdr->data; for (entry = 0; entry < wl->fw.hdr_num_entries[i] && !rc; entry++, ucode_hdr++) { if (ucode_hdr->offset + ucode_hdr->len > @@ -1925,24 +1911,24 @@ int wl_check_firmwares(struct wl_info *wl) /* * precondition: perimeter lock has been acquired */ -bool wl_rfkill_set_hw_state(struct wl_info *wl) +bool brcms_rfkill_set_hw_state(struct brcms_info *wl) { - bool blocked = wlc_check_radio_disabled(wl->wlc); + bool blocked = brcms_c_check_radio_disabled(wl->wlc); - WL_UNLOCK(wl); + UNLOCK(wl); wiphy_rfkill_set_hw_state(wl->pub->ieee_hw->wiphy, blocked); if (blocked) wiphy_rfkill_start_polling(wl->pub->ieee_hw->wiphy); - WL_LOCK(wl); + LOCK(wl); return blocked; } /* * precondition: perimeter lock has been acquired */ -void wl_msleep(struct wl_info *wl, uint ms) +void brcms_msleep(struct brcms_info *wl, uint ms) { - WL_UNLOCK(wl); + UNLOCK(wl); msleep(ms); - WL_LOCK(wl); + LOCK(wl); } diff --git a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h b/drivers/staging/brcm80211/brcmsmac/mac80211_if.h index f7a58b7a550..5711e7c16b5 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_mac80211.h +++ b/drivers/staging/brcm80211/brcmsmac/mac80211_if.h @@ -14,8 +14,15 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wl_mac80211_h_ -#define _wl_mac80211_h_ +#ifndef _BRCM_MAC80211_IF_H_ +#define _BRCM_MAC80211_IF_H_ + +#include <linux/timer.h> +#include <linux/interrupt.h> + +/* softmac ioctl definitions */ +#define BRCMS_SET_SHORTSLOT_OVERRIDE 146 + #include <linux/interrupt.h> @@ -23,35 +30,35 @@ * sleep so perimeter lock has to be a semaphore instead of spinlock. This requires timers to be * submitted to workqueue instead of being on kernel timer */ -struct wl_timer { +struct brcms_timer { struct timer_list timer; - struct wl_info *wl; + struct brcms_info *wl; void (*fn) (void *); void *arg; /* argument to fn */ uint ms; bool periodic; bool set; - struct wl_timer *next; + struct brcms_timer *next; #ifdef BCMDBG char *name; /* Description of the timer */ #endif }; -struct wl_if { +struct brcms_if { uint subunit; /* WDS/BSS unit */ struct pci_dev *pci_dev; }; -#define WL_MAX_FW 4 -struct wl_firmware { +#define MAX_FW_IMAGES 4 +struct brcms_firmware { u32 fw_cnt; - const struct firmware *fw_bin[WL_MAX_FW]; - const struct firmware *fw_hdr[WL_MAX_FW]; - u32 hdr_num_entries[WL_MAX_FW]; + const struct firmware *fw_bin[MAX_FW_IMAGES]; + const struct firmware *fw_hdr[MAX_FW_IMAGES]; + u32 hdr_num_entries[MAX_FW_IMAGES]; }; -struct wl_info { - struct wlc_pub *pub; /* pointer to public wlc state */ +struct brcms_info { + struct brcms_pub *pub; /* pointer to public wlc state */ void *wlc; /* pointer to private common os-independent data */ u32 magic; @@ -59,29 +66,45 @@ struct wl_info { spinlock_t lock; /* per-device perimeter lock */ spinlock_t isr_lock; /* per-device ISR synchronization lock */ + + /* bus type and regsva for unmap in brcms_free() */ uint bcm_bustype; /* bus type */ - bool piomode; /* set from insmod argument */ void *regsva; /* opaque chip registers virtual address */ + + /* timer related fields */ atomic_t callbacks; /* # outstanding callback functions */ - struct wl_timer *timers; /* timer cleanup queue */ + struct brcms_timer *timers; /* timer cleanup queue */ + struct tasklet_struct tasklet; /* dpc tasklet */ bool resched; /* dpc needs to be and is rescheduled */ #ifdef LINUXSTA_PS u32 pci_psstate[16]; /* pci ps-state save/restore */ #endif - struct wl_firmware fw; + struct brcms_firmware fw; struct wiphy *wiphy; }; -#define WL_LOCK(wl) spin_lock_bh(&(wl)->lock) -#define WL_UNLOCK(wl) spin_unlock_bh(&(wl)->lock) - -/* locking from inside wl_isr */ -#define WL_ISRLOCK(wl, flags) do {spin_lock(&(wl)->isr_lock); (void)(flags); } while (0) -#define WL_ISRUNLOCK(wl, flags) do {spin_unlock(&(wl)->isr_lock); (void)(flags); } while (0) +/* misc callbacks */ +extern void brcms_init(struct brcms_info *wl); +extern uint brcms_reset(struct brcms_info *wl); +extern void brcms_intrson(struct brcms_info *wl); +extern u32 brcms_intrsoff(struct brcms_info *wl); +extern void brcms_intrsrestore(struct brcms_info *wl, u32 macintmask); +extern int brcms_up(struct brcms_info *wl); +extern void brcms_down(struct brcms_info *wl); +extern void brcms_txflowcontrol(struct brcms_info *wl, struct brcms_if *wlif, + bool state, int prio); +extern bool wl_alloc_dma_resources(struct brcms_info *wl, uint dmaddrwidth); +extern bool brcms_rfkill_set_hw_state(struct brcms_info *wl); -/* locking under WL_LOCK() to synchronize with wl_isr */ -#define INT_LOCK(wl, flags) spin_lock_irqsave(&(wl)->isr_lock, flags) -#define INT_UNLOCK(wl, flags) spin_unlock_irqrestore(&(wl)->isr_lock, flags) +/* timer functions */ +extern struct brcms_timer *brcms_init_timer(struct brcms_info *wl, + void (*fn) (void *arg), void *arg, + const char *name); +extern void brcms_free_timer(struct brcms_info *wl, struct brcms_timer *timer); +extern void brcms_add_timer(struct brcms_info *wl, struct brcms_timer *timer, + uint ms, int periodic); +extern bool brcms_del_timer(struct brcms_info *wl, struct brcms_timer *timer); +extern void brcms_msleep(struct brcms_info *wl, uint ms); -#endif /* _wl_mac80211_h_ */ +#endif /* _BRCM_MAC80211_IF_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.c b/drivers/staging/brcm80211/brcmsmac/main.c index 4b4a31eff90..1763c4535cd 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.c +++ b/drivers/staging/brcm80211/brcmsmac/main.c @@ -13,47 +13,23 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> -#include <linux/ctype.h> -#include <linux/etherdevice.h> + #include <linux/pci_ids.h> #include <net/mac80211.h> -#include <bcmdefs.h> -#include <bcmdevs.h> -#include <bcmutils.h> -#include <bcmwifi.h> -#include <bcmnvram.h> +#include <brcm_hw_ids.h> #include <aiutils.h> -#include <pcicfg.h> -#include <bcmsrom.h> -#include <wlioctl.h> -#include <sbhnddma.h> -#include <hnddma.h> - -#include "wlc_pmu.h" -#include "d11.h" -#include "wlc_types.h" -#include "wlc_cfg.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "wlc_bsscfg.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wlc_bmac.h" -#include "wlc_phy_hal.h" -#include "wlc_phy_shim.h" -#include "wlc_antsel.h" -#include "wlc_stf.h" -#include "wlc_ampdu.h" -#include "wl_export.h" -#include "wlc_alloc.h" -#include "wl_dbg.h" - -#include "wl_mac80211.h" +#include "rate.h" +#include "scb.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include "bmac.h" +#include "antsel.h" +#include "stf.h" +#include "ampdu.h" +#include "alloc.h" +#include "mac80211_if.h" +#include "main.h" /* * WPA(2) definitions @@ -71,7 +47,6 @@ #define ALLPRIO -1 /* - * buffer length needed for wlc_format_ssid * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL. */ #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) @@ -79,11 +54,14 @@ #define TIMER_INTERVAL_WATCHDOG 1000 /* watchdog timer, in unit of ms */ #define TIMER_INTERVAL_RADIOCHK 800 /* radio monitor timer, in unit of ms */ -#ifndef WLC_MPC_MAX_DELAYCNT -#define WLC_MPC_MAX_DELAYCNT 10 /* Max MPC timeout, in unit of watchdog */ +/* Max MPC timeout, in unit of watchdog */ +#ifndef BRCMS_MPC_MAX_DELAYCNT +#define BRCMS_MPC_MAX_DELAYCNT 10 #endif -#define WLC_MPC_MIN_DELAYCNT 1 /* Min MPC timeout, in unit of watchdog */ -#define WLC_MPC_THRESHOLD 3 /* MPC count threshold level */ + +/* Min MPC timeout, in unit of watchdog */ +#define BRCMS_MPC_MIN_DELAYCNT 1 +#define BRCMS_MPC_THRESHOLD 3 /* MPC count threshold level */ #define BEACON_INTERVAL_DEFAULT 100 /* beacon interval, in unit of 1024TU */ #define DTIM_INTERVAL_DEFAULT 3 /* DTIM interval, in unit of beacon interval */ @@ -94,6 +72,94 @@ #define TBTT_ALIGN_LEEWAY_US 100 /* min leeway before first TBTT in us */ +/* Software feature flag defines used by wlfeatureflag */ +#define WL_SWFL_NOHWRADIO 0x0004 +#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */ +#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */ + +/* n-mode support capability */ +/* 2x2 includes both 1x1 & 2x2 devices + * reserved #define 2 for future when we want to separate 1x1 & 2x2 and + * control it independently + */ +#define WL_11N_2x2 1 +#define WL_11N_3x3 3 +#define WL_11N_4x4 4 + +/* define 11n feature disable flags */ +#define WLFEATURE_DISABLE_11N 0x00000001 +#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 +#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 +#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 +#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 +#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 +#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 +#define WLFEATURE_DISABLE_11N_GF 0x00000080 + +#define EDCF_ACI_MASK 0x60 +#define EDCF_ACI_SHIFT 5 +#define EDCF_ECWMIN_MASK 0x0f +#define EDCF_ECWMAX_SHIFT 4 +#define EDCF_AIFSN_MASK 0x0f +#define EDCF_AIFSN_MAX 15 +#define EDCF_ECWMAX_MASK 0xf0 + +#define EDCF_AC_BE_TXOP_STA 0x0000 +#define EDCF_AC_BK_TXOP_STA 0x0000 +#define EDCF_AC_VO_ACI_STA 0x62 +#define EDCF_AC_VO_ECW_STA 0x32 +#define EDCF_AC_VI_ACI_STA 0x42 +#define EDCF_AC_VI_ECW_STA 0x43 +#define EDCF_AC_BK_ECW_STA 0xA4 +#define EDCF_AC_VI_TXOP_STA 0x005e +#define EDCF_AC_VO_TXOP_STA 0x002f +#define EDCF_AC_BE_ACI_STA 0x03 +#define EDCF_AC_BE_ECW_STA 0xA4 +#define EDCF_AC_BK_ACI_STA 0x27 +#define EDCF_AC_VO_TXOP_AP 0x002f + +#define EDCF_TXOP2USEC(txop) ((txop) << 5) +#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) + +#define APHY_SYMBOL_TIME 4 +#define APHY_PREAMBLE_TIME 16 +#define APHY_SIGNAL_TIME 4 +#define APHY_SIFS_TIME 16 +#define APHY_SERVICE_NBITS 16 +#define APHY_TAIL_NBITS 6 +#define BPHY_SIFS_TIME 10 +#define BPHY_PLCP_SHORT_TIME 96 + +#define PREN_PREAMBLE 24 +#define PREN_MM_EXT 12 +#define PREN_PREAMBLE_EXT 4 + +#define DOT11_MAC_HDR_LEN 24 +#define DOT11_ACK_LEN 10 +#define DOT11_BA_LEN 4 +#define DOT11_OFDM_SIGNAL_EXTENSION 6 +#define DOT11_MIN_FRAG_LEN 256 +#define DOT11_RTS_LEN 16 +#define DOT11_CTS_LEN 10 +#define DOT11_BA_BITMAP_LEN 128 +#define DOT11_MIN_BEACON_PERIOD 1 +#define DOT11_MAX_BEACON_PERIOD 0xFFFF +#define DOT11_MAXNUMFRAGS 16 +#define DOT11_MAX_FRAG_LEN 2346 + +#define BPHY_PLCP_TIME 192 +#define RIFS_11N_TIME 2 + +#define WME_VER 1 +#define WME_SUBTYPE_PARAM_IE 1 +#define WME_TYPE 2 +#define WME_OUI "\x00\x50\xf2" + +#define AC_BE 0 +#define AC_BK 1 +#define AC_VI 2 +#define AC_VO 3 + /* * driver maintains internal 'tick'(wlc->pub->now) which increments in 1s OS timer(soft * watchdog) it is not a wall clock and won't increment when driver is in "down" state @@ -101,26 +167,22 @@ * calibration and scb update */ -/* watchdog trigger mode: OSL timer or TBTT */ -#define WLC_WATCHDOG_TBTT(wlc) \ - (wlc->stas_associated > 0 && wlc->PM != PM_OFF && wlc->pub->align_wd_tbtt) - /* To inform the ucode of the last mcast frame posted so that it can clear moredata bit */ -#define BCMCFID(wlc, fid) wlc_bmac_write_shm((wlc)->hw, M_BCMC_FID, (fid)) +#define BCMCFID(wlc, fid) brcms_b_write_shm((wlc)->hw, M_BCMC_FID, (fid)) -#define WLC_WAR16165(wlc) (wlc->pub->sih->bustype == PCI_BUS && \ +#define BRCMS_WAR16165(wlc) (wlc->pub->sih->bustype == PCI_BUS && \ (!AP_ENAB(wlc->pub)) && (wlc->war16165)) /* debug/trace */ -uint wl_msg_level = +uint brcm_msg_level = #if defined(BCMDBG) - WL_ERROR_VAL; + LOG_ERROR_VAL; #else - 0; + 0; #endif /* BCMDBG */ /* Find basic rate for a given rate */ -#define WLC_BASIC_RATE(wlc, rspec) (IS_MCS(rspec) ? \ +#define BRCMS_BASIC_RATE(wlc, rspec) (IS_MCS(rspec) ? \ (wlc)->band->basic_rate[mcs_table[rspec & RSPEC_RATE_MASK].leg_ofdm] : \ (wlc)->band->basic_rate[rspec & RSPEC_RATE_MASK]) @@ -128,7 +190,7 @@ uint wl_msg_level = #define RFDISABLE_DEFAULT 10000000 /* rfdisable delay timer 500 ms, runs of ALP clock */ -#define WLC_TEMPSENSE_PERIOD 10 /* 10 second timeout */ +#define BRCMS_TEMPSENSE_PERIOD 10 /* 10 second timeout */ #define SCAN_IN_PROGRESS(x) 0 @@ -136,31 +198,9 @@ uint wl_msg_level = #ifdef BCMDBG /* pointer to most recently allocated wl/wlc */ -static struct wlc_info *wlc_info_dbg = (struct wlc_info *) (NULL); +static struct brcms_c_info *wlc_info_dbg = (struct brcms_c_info *) (NULL); #endif -/* IOVar table */ - -/* Parameter IDs, for use only internally to wlc -- in the wlc_iovars - * table and by the wlc_doiovar() function. No ordering is imposed: - * the table is keyed by name, and the function uses a switch. - */ -enum { - IOV_MPC = 1, - IOV_RTSTHRESH, - IOV_QTXPOWER, - IOV_BCN_LI_BCN, /* Beacon listen interval in # of beacons */ - IOV_LAST /* In case of a need to check max ID number */ -}; - -const bcm_iovar_t wlc_iovars[] = { - {"mpc", IOV_MPC, (0), IOVT_BOOL, 0}, - {"rtsthresh", IOV_RTSTHRESH, (IOVF_WHL), IOVT_UINT16, 0}, - {"qtxpower", IOV_QTXPOWER, (IOVF_WHL), IOVT_UINT32, 0}, - {"bcn_li_bcn", IOV_BCN_LI_BCN, (0), IOVT_UINT8, 0}, - {NULL, 0, 0, 0, 0} -}; - const u8 prio2fifo[NUMPRIO] = { TX_AC_BE_FIFO, /* 0 BE AC_BE Best Effort */ TX_AC_BK_FIFO, /* 1 BK AC_BK Background */ @@ -177,35 +217,48 @@ const u8 prio2fifo[NUMPRIO] = { * Odd numbers are used for HI priority traffic at same precedence levels * These constants are used ONLY by wlc_prio2prec_map. Do not use them elsewhere. */ -#define _WLC_PREC_NONE 0 /* None = - */ -#define _WLC_PREC_BK 2 /* BK - Background */ -#define _WLC_PREC_BE 4 /* BE - Best-effort */ -#define _WLC_PREC_EE 6 /* EE - Excellent-effort */ -#define _WLC_PREC_CL 8 /* CL - Controlled Load */ -#define _WLC_PREC_VI 10 /* Vi - Video */ -#define _WLC_PREC_VO 12 /* Vo - Voice */ -#define _WLC_PREC_NC 14 /* NC - Network Control */ +#define _BRCMS_PREC_NONE 0 /* None = - */ +#define _BRCMS_PREC_BK 2 /* BK - Background */ +#define _BRCMS_PREC_BE 4 /* BE - Best-effort */ +#define _BRCMS_PREC_EE 6 /* EE - Excellent-effort */ +#define _BRCMS_PREC_CL 8 /* CL - Controlled Load */ +#define _BRCMS_PREC_VI 10 /* Vi - Video */ +#define _BRCMS_PREC_VO 12 /* Vo - Voice */ +#define _BRCMS_PREC_NC 14 /* NC - Network Control */ + +#define MAXMACLIST 64 /* max # source MAC matches */ +#define BCN_TEMPLATE_COUNT 2 + +/* The BSS is generating beacons in HW */ +#define BRCMS_BSSCFG_HW_BCN 0x20 + +#define HWBCN_ENAB(cfg) (((cfg)->flags & BRCMS_BSSCFG_HW_BCN) != 0) + +#define MBSS_BCN_ENAB(cfg) 0 +#define MBSS_PRB_ENAB(cfg) 0 +#define SOFTBCN_ENAB(pub) (0) /* 802.1D Priority to precedence queue mapping */ const u8 wlc_prio2prec_map[] = { - _WLC_PREC_BE, /* 0 BE - Best-effort */ - _WLC_PREC_BK, /* 1 BK - Background */ - _WLC_PREC_NONE, /* 2 None = - */ - _WLC_PREC_EE, /* 3 EE - Excellent-effort */ - _WLC_PREC_CL, /* 4 CL - Controlled Load */ - _WLC_PREC_VI, /* 5 Vi - Video */ - _WLC_PREC_VO, /* 6 Vo - Voice */ - _WLC_PREC_NC, /* 7 NC - Network Control */ + _BRCMS_PREC_BE, /* 0 BE - Best-effort */ + _BRCMS_PREC_BK, /* 1 BK - Background */ + _BRCMS_PREC_NONE, /* 2 None = - */ + _BRCMS_PREC_EE, /* 3 EE - Excellent-effort */ + _BRCMS_PREC_CL, /* 4 CL - Controlled Load */ + _BRCMS_PREC_VI, /* 5 Vi - Video */ + _BRCMS_PREC_VO, /* 6 Vo - Voice */ + _BRCMS_PREC_NC, /* 7 NC - Network Control */ }; -/* Sanity check for tx_prec_map and fifo synchup - * Either there are some packets pending for the fifo, else if fifo is empty then - * all the corresponding precmap bits should be set - */ -#define WLC_TX_FIFO_CHECK(wlc, fifo) (TXPKTPENDGET((wlc), (fifo)) || \ - (TXPKTPENDGET((wlc), (fifo)) == 0 && \ - ((wlc)->tx_prec_map & (wlc)->fifo2prec_map[(fifo)]) == \ - (wlc)->fifo2prec_map[(fifo)])) +/* Check if a particular BSS config is AP or STA */ +#define BSSCFG_AP(cfg) (0) +#define BSSCFG_STA(cfg) (1) +#define BSSCFG_IBSS(cfg) (!(cfg)->BSS) + +/* As above for all non-NULL BSS configs */ +#define FOREACH_BSS(wlc, idx, cfg) \ + for (idx = 0; (int) idx < BRCMS_MAXBSSCFG; idx++) \ + if ((cfg = (wlc)->bsscfg[idx])) /* TX FIFO number to WME/802.1E Access Category */ const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE }; @@ -213,13 +266,13 @@ const u8 wme_fifo2ac[] = { AC_BK, AC_BE, AC_VI, AC_VO, AC_BE, AC_BE }; /* WME/802.1E Access Category to TX FIFO number */ static const u8 wme_ac2fifo[] = { 1, 0, 2, 3 }; -static bool in_send_q = false; +static bool in_send_q; /* Shared memory location index for various AC params */ #define wme_shmemacindex(ac) wme_ac2fifo[ac] #ifdef BCMDBG -static const char *fifo_names[] = { +static const char * const fifo_names[] = { "AC_BK", "AC_BE", "AC_VI", "AC_VO", "BCMC", "ATIM" }; #else static const char fifo_names[6][0]; @@ -233,148 +286,147 @@ static const u8 acbitmap2maxprio[] = { }; /* currently the best mechanism for determining SIFS is the band in use */ -#define SIFS(band) ((band)->bandtype == WLC_BAND_5G ? APHY_SIFS_TIME : BPHY_SIFS_TIME); - -/* value for # replay counters currently supported */ -#define WLC_REPLAY_CNTRS_VALUE WPA_CAP_16_REPLAY_CNTRS +#define SIFS(band) ((band)->bandtype == BRCM_BAND_5G ? APHY_SIFS_TIME : \ + BPHY_SIFS_TIME); /* local prototypes */ -static u16 wlc_d11hdrs_mac80211(struct wlc_info *wlc, +static u16 brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, struct sk_buff *p, struct scb *scb, uint frag, uint nfrags, uint queue, uint next_frag_len, - wsec_key_t *key, + struct wsec_key *key, ratespec_t rspec_override); -static void wlc_bss_default_init(struct wlc_info *wlc); -static void wlc_ucode_mac_upd(struct wlc_info *wlc); -static ratespec_t mac80211_wlc_set_nrate(struct wlc_info *wlc, - struct wlcband *cur_band, u32 int_val); -static void wlc_tx_prec_map_init(struct wlc_info *wlc); -static void wlc_watchdog(void *arg); -static void wlc_watchdog_by_timer(void *arg); -static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate); -static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg); -static int wlc_iovar_rangecheck(struct wlc_info *wlc, u32 val, - const bcm_iovar_t *vi); -static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc); +static void brcms_c_bss_default_init(struct brcms_c_info *wlc); +static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc); +static ratespec_t mac80211_wlc_set_nrate(struct brcms_c_info *wlc, + struct brcms_band *cur_band, + u32 int_val); +static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc); +static void brcms_c_watchdog(void *arg); +static void brcms_c_watchdog_by_timer(void *arg); +static u16 brcms_c_rate_shm_offset(struct brcms_c_info *wlc, u8 rate); +static int brcms_c_set_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs_arg); +static u8 brcms_c_local_constraint_qdbm(struct brcms_c_info *wlc); /* send and receive */ -static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc); -static void wlc_txq_free(struct wlc_info *wlc, - struct wlc_txq_info *qi); -static void wlc_txflowcontrol_signal(struct wlc_info *wlc, - struct wlc_txq_info *qi, +static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc); +static void brcms_c_txq_free(struct brcms_c_info *wlc, + struct brcms_txq_info *qi); +static void brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc, + struct brcms_txq_info *qi, bool on, int prio); -static void wlc_txflowcontrol_reset(struct wlc_info *wlc); -static void wlc_compute_cck_plcp(struct wlc_info *wlc, ratespec_t rate, +static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc); +static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, ratespec_t rate, uint length, u8 *plcp); -static void wlc_compute_ofdm_plcp(ratespec_t rate, uint length, u8 *plcp); -static void wlc_compute_mimo_plcp(ratespec_t rate, uint length, u8 *plcp); -static u16 wlc_compute_frame_dur(struct wlc_info *wlc, ratespec_t rate, +static void brcms_c_compute_ofdm_plcp(ratespec_t rate, uint length, u8 *plcp); +static void brcms_c_compute_mimo_plcp(ratespec_t rate, uint length, u8 *plcp); +static u16 brcms_c_compute_frame_dur(struct brcms_c_info *wlc, ratespec_t rate, u8 preamble_type, uint next_frag_len); -static u64 wlc_recover_tsf64(struct wlc_info *wlc, struct wlc_d11rxhdr *rxh); -static void wlc_recvctl(struct wlc_info *wlc, - d11rxhdr_t *rxh, struct sk_buff *p); -static uint wlc_calc_frame_len(struct wlc_info *wlc, ratespec_t rate, +static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc, + struct brcms_d11rxhdr *rxh); +static void brcms_c_recvctl(struct brcms_c_info *wlc, + struct d11rxhdr *rxh, struct sk_buff *p); +static uint brcms_c_calc_frame_len(struct brcms_c_info *wlc, ratespec_t rate, u8 preamble_type, uint dur); -static uint wlc_calc_ack_time(struct wlc_info *wlc, ratespec_t rate, +static uint brcms_c_calc_ack_time(struct brcms_c_info *wlc, ratespec_t rate, u8 preamble_type); -static uint wlc_calc_cts_time(struct wlc_info *wlc, ratespec_t rate, +static uint brcms_c_calc_cts_time(struct brcms_c_info *wlc, ratespec_t rate, u8 preamble_type); /* interrupt, up/down, band */ -static void wlc_setband(struct wlc_info *wlc, uint bandunit); -static chanspec_t wlc_init_chanspec(struct wlc_info *wlc); -static void wlc_bandinit_ordered(struct wlc_info *wlc, chanspec_t chanspec); -static void wlc_bsinit(struct wlc_info *wlc); -static int wlc_duty_cycle_set(struct wlc_info *wlc, int duty_cycle, bool isOFDM, - bool writeToShm); -static void wlc_radio_hwdisable_upd(struct wlc_info *wlc); -static bool wlc_radio_monitor_start(struct wlc_info *wlc); -static void wlc_radio_timer(void *arg); -static void wlc_radio_enable(struct wlc_info *wlc); -static void wlc_radio_upd(struct wlc_info *wlc); +static void brcms_c_setband(struct brcms_c_info *wlc, uint bandunit); +static chanspec_t brcms_c_init_chanspec(struct brcms_c_info *wlc); +static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc, + chanspec_t chanspec); +static void brcms_c_bsinit(struct brcms_c_info *wlc); +static int brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, + bool isOFDM, bool writeToShm); +static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc); +static bool brcms_c_radio_monitor_start(struct brcms_c_info *wlc); +static void brcms_c_radio_timer(void *arg); +static void brcms_c_radio_enable(struct brcms_c_info *wlc); +static void brcms_c_radio_upd(struct brcms_c_info *wlc); /* scan, association, BSS */ -static uint wlc_calc_ba_time(struct wlc_info *wlc, ratespec_t rate, +static uint brcms_c_calc_ba_time(struct brcms_c_info *wlc, ratespec_t rate, u8 preamble_type); -static void wlc_update_mimo_band_bwcap(struct wlc_info *wlc, u8 bwcap); -static void wlc_ht_update_sgi_rx(struct wlc_info *wlc, int val); -static void wlc_ht_update_ldpc(struct wlc_info *wlc, s8 val); -static void wlc_war16165(struct wlc_info *wlc, bool tx); - -static void wlc_wme_retries_write(struct wlc_info *wlc); -static bool wlc_attach_stf_ant_init(struct wlc_info *wlc); -static uint wlc_attach_module(struct wlc_info *wlc); -static void wlc_detach_module(struct wlc_info *wlc); -static void wlc_timers_deinit(struct wlc_info *wlc); -static void wlc_down_led_upd(struct wlc_info *wlc); -static uint wlc_down_del_timer(struct wlc_info *wlc); -static void wlc_ofdm_rateset_war(struct wlc_info *wlc); -static int _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, - struct wlc_if *wlcif); +static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap); +static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val); +static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val); +static void brcms_c_war16165(struct brcms_c_info *wlc, bool tx); + +static void brcms_c_wme_retries_write(struct brcms_c_info *wlc); +static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc); +static uint brcms_c_attach_module(struct brcms_c_info *wlc); +static void brcms_c_detach_module(struct brcms_c_info *wlc); +static void brcms_c_timers_deinit(struct brcms_c_info *wlc); +static void brcms_c_down_led_upd(struct brcms_c_info *wlc); +static uint brcms_c_down_del_timer(struct brcms_c_info *wlc); +static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc); +static int _brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, + struct brcms_c_if *wlcif); /* conditions under which the PM bit should be set in outgoing frames and STAY_AWAKE is meaningful */ -bool wlc_ps_allowed(struct wlc_info *wlc) +bool brcms_c_ps_allowed(struct brcms_c_info *wlc) { int idx; - struct wlc_bsscfg *cfg; + struct brcms_bss_cfg *cfg; /* disallow PS when one of the following global conditions meets */ - if (!wlc->pub->associated || !wlc->PMenabled || wlc->PM_override) + if (!wlc->pub->associated) return false; /* disallow PS when one of these meets when not scanning */ - if (!wlc->PMblocked) { - if (AP_ACTIVE(wlc) || wlc->monitor) - return false; - } + if (AP_ACTIVE(wlc) || wlc->monitor) + return false; - FOREACH_AS_STA(wlc, idx, cfg) { - /* disallow PS when one of the following bsscfg specific conditions meets */ - if (!cfg->BSS || !WLC_PORTOPEN(cfg)) - return false; + for (idx = 0; idx < BRCMS_MAXBSSCFG; idx++) { + cfg = wlc->bsscfg[idx]; + if (cfg && BSSCFG_STA(cfg) && cfg->associated) { + /* + * disallow PS when one of the following + * bsscfg specific conditions meets + */ + if (!cfg->BSS || !BRCMS_PORTOPEN(cfg)) + return false; - if (!cfg->dtim_programmed) - return false; + if (!cfg->dtim_programmed) + return false; + } } return true; } -void wlc_reset(struct wlc_info *wlc) +void brcms_c_reset(struct brcms_c_info *wlc) { BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - wlc->check_for_unaligned_tbtt = false; - /* slurp up hw mac counters before core reset */ - wlc_statsupd(wlc); + brcms_c_statsupd(wlc); /* reset our snapshot of macstat counters */ memset((char *)wlc->core->macstat_snapshot, 0, - sizeof(macstat_t)); - - wlc_bmac_reset(wlc->hw); - wlc->txretried = 0; + sizeof(struct macstat)); + brcms_b_reset(wlc->hw); } -void wlc_fatal_error(struct wlc_info *wlc) +void brcms_c_fatal_error(struct brcms_c_info *wlc) { wiphy_err(wlc->wiphy, "wl%d: fatal error, reinitializing\n", wlc->pub->unit); - wl_init(wlc->wl); + brcms_init(wlc->wl); } -/* Return the channel the driver should initialize during wlc_init. +/* Return the channel the driver should initialize during brcms_c_init. * the channel may have to be changed from the currently configured channel * if other configurations are in conflict (bandlocked, 11n mode disabled, * invalid channel for current country, etc.) */ -static chanspec_t wlc_init_chanspec(struct wlc_info *wlc) +static chanspec_t brcms_c_init_chanspec(struct brcms_c_info *wlc) { chanspec_t chanspec = 1 | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE | @@ -385,7 +437,7 @@ static chanspec_t wlc_init_chanspec(struct wlc_info *wlc) struct scb global_scb; -static void wlc_init_scb(struct wlc_info *wlc, struct scb *scb) +static void brcms_c_init_scb(struct brcms_c_info *wlc, struct scb *scb) { int i; scb->flags = SCB_WMECAP | SCB_HTCAP; @@ -393,12 +445,12 @@ static void wlc_init_scb(struct wlc_info *wlc, struct scb *scb) scb->seqnum[i] = 0; } -void wlc_init(struct wlc_info *wlc) +void brcms_c_init(struct brcms_c_info *wlc) { d11regs_t *regs; chanspec_t chanspec; int i; - struct wlc_bsscfg *bsscfg; + struct brcms_bss_cfg *bsscfg; bool mute = false; BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); @@ -411,27 +463,20 @@ void wlc_init(struct wlc_info *wlc) if (wlc->pub->associated) chanspec = wlc->home_chanspec; else - chanspec = wlc_init_chanspec(wlc); - - wlc_bmac_init(wlc->hw, chanspec, mute); + chanspec = brcms_c_init_chanspec(wlc); - wlc->seckeys = wlc_bmac_read_shm(wlc->hw, M_SECRXKEYS_PTR) * 2; - if (wlc->machwcap & MCAP_TKIPMIC) - wlc->tkmickeys = - wlc_bmac_read_shm(wlc->hw, M_TKMICKEYS_PTR) * 2; + brcms_b_init(wlc->hw, chanspec, mute); /* update beacon listen interval */ - wlc_bcn_li_upd(wlc); - wlc->bcn_wait_prd = - (u8) (wlc_bmac_read_shm(wlc->hw, M_NOSLPZNATDTIM) >> 10); + brcms_c_bcn_li_upd(wlc); /* the world is new again, so is our reported rate */ - wlc_reprate_init(wlc); + brcms_c_reprate_init(wlc); /* write ethernet address to core */ FOREACH_BSS(wlc, i, bsscfg) { - wlc_set_mac(bsscfg); - wlc_set_bssid(bsscfg); + brcms_c_set_mac(bsscfg); + brcms_c_set_bssid(bsscfg); } /* Update tsf_cfprep if associated and up */ @@ -450,58 +495,56 @@ void wlc_init(struct wlc_info *wlc) (bi << CFPREP_CBI_SHIFT)); /* Update maccontrol PM related bits */ - wlc_set_ps_ctrl(wlc); + brcms_c_set_ps_ctrl(wlc); break; } } } - wlc_key_hw_init_all(wlc); + brcms_c_bandinit_ordered(wlc, chanspec); - wlc_bandinit_ordered(wlc, chanspec); - - wlc_init_scb(wlc, &global_scb); + brcms_c_init_scb(wlc, &global_scb); /* init probe response timeout */ - wlc_write_shm(wlc, M_PRS_MAXTIME, wlc->prb_resp_timeout); + brcms_c_write_shm(wlc, M_PRS_MAXTIME, wlc->prb_resp_timeout); /* init max burst txop (framebursting) */ - wlc_write_shm(wlc, M_MBURST_TXOP, + brcms_c_write_shm(wlc, M_MBURST_TXOP, (wlc-> _rifs ? (EDCF_AC_VO_TXOP_AP << 5) : MAXFRAMEBURST_TXOP)); /* initialize maximum allowed duty cycle */ - wlc_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true); - wlc_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true); + brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_ofdm, true, true); + brcms_c_duty_cycle_set(wlc, wlc->tx_duty_cycle_cck, false, true); /* Update some shared memory locations related to max AMPDU size allowed to received */ - wlc_ampdu_shm_upd(wlc->ampdu); + brcms_c_ampdu_shm_upd(wlc->ampdu); /* band-specific inits */ - wlc_bsinit(wlc); + brcms_c_bsinit(wlc); /* Enable EDCF mode (while the MAC is suspended) */ if (EDCF_ENAB(wlc->pub)) { OR_REG(®s->ifs_ctl, IFS_USEEDCF); - wlc_edcf_setparams(wlc, false); + brcms_c_edcf_setparams(wlc, false); } /* Init precedence maps for empty FIFOs */ - wlc_tx_prec_map_init(wlc); + brcms_c_tx_prec_map_init(wlc); /* read the ucode version if we have not yet done so */ if (wlc->ucode_rev == 0) { wlc->ucode_rev = - wlc_read_shm(wlc, M_BOM_REV_MAJOR) << NBITS(u16); - wlc->ucode_rev |= wlc_read_shm(wlc, M_BOM_REV_MINOR); + brcms_c_read_shm(wlc, M_BOM_REV_MAJOR) << NBITS(u16); + wlc->ucode_rev |= brcms_c_read_shm(wlc, M_BOM_REV_MINOR); } /* ..now really unleash hell (allow the MAC out of suspend) */ - wlc_enable_mac(wlc); + brcms_c_enable_mac(wlc); /* clear tx flow control */ - wlc_txflowcontrol_reset(wlc); + brcms_c_txflowcontrol_reset(wlc); /* clear tx data fifo suspends */ wlc->tx_suspended = false; @@ -510,39 +553,40 @@ void wlc_init(struct wlc_info *wlc) W_REG(&wlc->regs->rfdisabledly, RFDISABLE_DEFAULT); /* initialize mpc delay */ - wlc->mpc_delay_off = wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; + wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT; /* * Initialize WME parameters; if they haven't been set by some other * mechanism (IOVar, etc) then read them from the hardware. */ - if (WLC_WME_RETRY_SHORT_GET(wlc, 0) == 0) { /* Uninitialized; read from HW */ + if (BRCMS_WME_RETRY_SHORT_GET(wlc, 0) == 0) { + /* Uninitialized; read from HW */ int ac; for (ac = 0; ac < AC_COUNT; ac++) { wlc->wme_retries[ac] = - wlc_read_shm(wlc, M_AC_TXLMT_ADDR(ac)); + brcms_c_read_shm(wlc, M_AC_TXLMT_ADDR(ac)); } } } -void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc) +void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, bool promisc) { wlc->bcnmisc_monitor = promisc; - wlc_mac_bcn_promisc(wlc); + brcms_c_mac_bcn_promisc(wlc); } -void wlc_mac_bcn_promisc(struct wlc_info *wlc) +void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc) { if ((AP_ENAB(wlc->pub) && (N_ENAB(wlc->pub) || wlc->band->gmode)) || wlc->bcnmisc_ibss || wlc->bcnmisc_scan || wlc->bcnmisc_monitor) - wlc_mctrl(wlc, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC); + brcms_c_mctrl(wlc, MCTL_BCNS_PROMISC, MCTL_BCNS_PROMISC); else - wlc_mctrl(wlc, MCTL_BCNS_PROMISC, 0); + brcms_c_mctrl(wlc, MCTL_BCNS_PROMISC, 0); } /* set or clear maccontrol bits MCTL_PROMISC and MCTL_KEEPCONTROL */ -void wlc_mac_promisc(struct wlc_info *wlc) +void brcms_c_mac_promisc(struct brcms_c_info *wlc) { u32 promisc_bits = 0; @@ -550,21 +594,21 @@ void wlc_mac_promisc(struct wlc_info *wlc) * Note: APs get all BSS traffic without the need to set the MCTL_PROMISC bit * since all BSS data traffic is directed at the AP */ - if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub) && !wlc->wet) + if (PROMISC_ENAB(wlc->pub) && !AP_ENAB(wlc->pub)) promisc_bits |= MCTL_PROMISC; /* monitor mode needs both MCTL_PROMISC and MCTL_KEEPCONTROL * Note: monitor mode also needs MCTL_BCNS_PROMISC, but that is - * handled in wlc_mac_bcn_promisc() + * handled in brcms_c_mac_bcn_promisc() */ if (MONITOR_ENAB(wlc)) promisc_bits |= MCTL_PROMISC | MCTL_KEEPCONTROL; - wlc_mctrl(wlc, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits); + brcms_c_mctrl(wlc, MCTL_PROMISC | MCTL_KEEPCONTROL, promisc_bits); } /* push sw hps and wake state through hardware */ -void wlc_set_ps_ctrl(struct wlc_info *wlc) +void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc) { u32 v1, v2; bool hps; @@ -579,12 +623,12 @@ void wlc_set_ps_ctrl(struct wlc_info *wlc) if (hps) v2 |= MCTL_HPS; - wlc_mctrl(wlc, MCTL_WAKE | MCTL_HPS, v2); + brcms_c_mctrl(wlc, MCTL_WAKE | MCTL_HPS, v2); awake_before = ((v1 & MCTL_WAKE) || ((v1 & MCTL_HPS) == 0)); if (!awake_before) - wlc_bmac_wait_for_wake(wlc->hw); + brcms_b_wait_for_wake(wlc->hw); } @@ -592,17 +636,17 @@ void wlc_set_ps_ctrl(struct wlc_info *wlc) * Write this BSS config's MAC address to core. * Updates RXE match engine. */ -int wlc_set_mac(struct wlc_bsscfg *cfg) +int brcms_c_set_mac(struct brcms_bss_cfg *cfg) { int err = 0; - struct wlc_info *wlc = cfg->wlc; + struct brcms_c_info *wlc = cfg->wlc; if (cfg == wlc->cfg) { /* enter the MAC addr into the RXE match registers */ - wlc_set_addrmatch(wlc, RCM_MAC_OFFSET, cfg->cur_etheraddr); + brcms_c_set_addrmatch(wlc, RCM_MAC_OFFSET, cfg->cur_etheraddr); } - wlc_ampdu_macaddr_upd(wlc); + brcms_c_ampdu_macaddr_upd(wlc); return err; } @@ -610,17 +654,17 @@ int wlc_set_mac(struct wlc_bsscfg *cfg) /* Write the BSS config's BSSID address to core (set_bssid in d11procs.tcl). * Updates RXE match engine. */ -void wlc_set_bssid(struct wlc_bsscfg *cfg) +void brcms_c_set_bssid(struct brcms_bss_cfg *cfg) { - struct wlc_info *wlc = cfg->wlc; + struct brcms_c_info *wlc = cfg->wlc; /* if primary config, we need to update BSSID in RXE match registers */ if (cfg == wlc->cfg) { - wlc_set_addrmatch(wlc, RCM_BSSID_OFFSET, cfg->BSSID); + brcms_c_set_addrmatch(wlc, RCM_BSSID_OFFSET, cfg->BSSID); } #ifdef SUPPORT_HWKEYS else if (BSSCFG_STA(cfg) && cfg->BSS) { - wlc_rcmta_add_bssid(wlc, cfg); + brcms_c_rcmta_add_bssid(wlc, cfg); } #endif } @@ -629,14 +673,14 @@ void wlc_set_bssid(struct wlc_bsscfg *cfg) * Suspend the the MAC and update the slot timing * for standard 11b/g (20us slots) or shortslot 11g (9us slots). */ -void wlc_switch_shortslot(struct wlc_info *wlc, bool shortslot) +void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot) { int idx; - struct wlc_bsscfg *cfg; + struct brcms_bss_cfg *cfg; /* use the override if it is set */ - if (wlc->shortslot_override != WLC_SHORTSLOT_AUTO) - shortslot = (wlc->shortslot_override == WLC_SHORTSLOT_ON); + if (wlc->shortslot_override != BRCMS_SHORTSLOT_AUTO) + shortslot = (wlc->shortslot_override == BRCMS_SHORTSLOT_ON); if (wlc->shortslot == shortslot) return; @@ -654,27 +698,28 @@ void wlc_switch_shortslot(struct wlc_info *wlc, bool shortslot) WLAN_CAPABILITY_SHORT_SLOT_TIME; } - wlc_bmac_set_shortslot(wlc->hw, shortslot); + brcms_b_set_shortslot(wlc->hw, shortslot); } -static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc) +static u8 brcms_c_local_constraint_qdbm(struct brcms_c_info *wlc) { u8 local; s16 local_max; - local = WLC_TXPWR_MAX; + local = BRCMS_TXPWR_MAX; if (wlc->pub->associated && - (bcm_chspec_ctlchan(wlc->chanspec) == - bcm_chspec_ctlchan(wlc->home_chanspec))) { + (brcmu_chspec_ctlchan(wlc->chanspec) == + brcmu_chspec_ctlchan(wlc->home_chanspec))) { /* get the local power constraint if we are on the AP's * channel [802.11h, 7.3.2.13] */ - /* Clamp the value between 0 and WLC_TXPWR_MAX w/o overflowing the target */ + /* Clamp the value between 0 and BRCMS_TXPWR_MAX w/o + * overflowing the target */ local_max = (wlc->txpwr_local_max - - wlc->txpwr_local_constraint) * WLC_TXPWR_DB_FACTOR; - if (local_max > 0 && local_max < WLC_TXPWR_MAX) + wlc->txpwr_local_constraint) * BRCMS_TXPWR_DB_FACTOR; + if (local_max > 0 && local_max < BRCMS_TXPWR_MAX) return (u8) local_max; if (local_max < 0) return 0; @@ -684,11 +729,11 @@ static u8 wlc_local_constraint_qdbm(struct wlc_info *wlc) } /* propagate home chanspec to all bsscfgs in case bsscfg->current_bss->chanspec is referenced */ -void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec) +void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, chanspec_t chanspec) { if (wlc->home_chanspec != chanspec) { int idx; - struct wlc_bsscfg *cfg; + struct brcms_bss_cfg *cfg; wlc->home_chanspec = chanspec; @@ -702,7 +747,8 @@ void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec) } } -static void wlc_set_phy_chanspec(struct wlc_info *wlc, chanspec_t chanspec) +static void brcms_c_set_phy_chanspec(struct brcms_c_info *wlc, + chanspec_t chanspec) { /* Save our copy of the chanspec */ wlc->chanspec = chanspec; @@ -710,24 +756,24 @@ static void wlc_set_phy_chanspec(struct wlc_info *wlc, chanspec_t chanspec) /* Set the chanspec and power limits for this locale after computing * any 11h local tx power constraints. */ - wlc_channel_set_chanspec(wlc->cmi, chanspec, - wlc_local_constraint_qdbm(wlc)); + brcms_c_channel_set_chanspec(wlc->cmi, chanspec, + brcms_c_local_constraint_qdbm(wlc)); if (wlc->stf->ss_algosel_auto) - wlc_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel, + brcms_c_stf_ss_algo_channel_get(wlc, &wlc->stf->ss_algo_channel, chanspec); - wlc_stf_ss_update(wlc, wlc->band); + brcms_c_stf_ss_update(wlc, wlc->band); } -void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec) +void brcms_c_set_chanspec(struct brcms_c_info *wlc, chanspec_t chanspec) { uint bandunit; bool switchband = false; chanspec_t old_chanspec = wlc->chanspec; - if (!wlc_valid_chanspec_db(wlc->cmi, chanspec)) { + if (!brcms_c_valid_chanspec_db(wlc->cmi, chanspec)) { wiphy_err(wlc->wiphy, "wl%d: %s: Bad channel %d\n", wlc->pub->unit, __func__, CHSPEC_CHANNEL(chanspec)); return; @@ -735,7 +781,7 @@ void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec) /* Switch bands if necessary */ if (NBANDS(wlc) > 1) { - bandunit = CHSPEC_WLCBANDUNIT(chanspec); + bandunit = CHSPEC_BANDUNIT(chanspec); if (wlc->band->bandunit != bandunit || wlc->bandinit_pending) { switchband = true; if (wlc->bandlocked) { @@ -745,263 +791,49 @@ void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec) CHSPEC_CHANNEL(chanspec)); return; } - /* BMAC_NOTE: should the setband call come after the wlc_bmac_chanspec() ? - * if the setband updates (wlc_bsinit) use low level calls to inspect and - * set state, the state inspected may be from the wrong band, or the - * following wlc_bmac_set_chanspec() may undo the work. + /* + * should the setband call come after the + * brcms_b_chanspec() ? if the setband updates + * (brcms_c_bsinit) use low level calls to inspect and + * set state, the state inspected may be from the wrong + * band, or the following brcms_b_set_chanspec() may + * undo the work. */ - wlc_setband(wlc, bandunit); + brcms_c_setband(wlc, bandunit); } } /* sync up phy/radio chanspec */ - wlc_set_phy_chanspec(wlc, chanspec); + brcms_c_set_phy_chanspec(wlc, chanspec); /* init antenna selection */ if (CHSPEC_WLC_BW(old_chanspec) != CHSPEC_WLC_BW(chanspec)) { - wlc_antsel_init(wlc->asi); + brcms_c_antsel_init(wlc->asi); /* Fix the hardware rateset based on bw. * Mainly add MCS32 for 40Mhz, remove MCS 32 for 20Mhz */ - wlc_rateset_bw_mcs_filter(&wlc->band->hw_rateset, + brcms_c_rateset_bw_mcs_filter(&wlc->band->hw_rateset, wlc->band-> mimo_cap_40 ? CHSPEC_WLC_BW(chanspec) : 0); } /* update some mac configuration since chanspec changed */ - wlc_ucode_mac_upd(wlc); -} - -#if defined(BCMDBG) -static int wlc_get_current_txpwr(struct wlc_info *wlc, void *pwr, uint len) -{ - txpwr_limits_t txpwr; - tx_power_t power; - tx_power_legacy_t *old_power = NULL; - int r, c; - uint qdbm; - bool override; - - if (len == sizeof(tx_power_legacy_t)) - old_power = (tx_power_legacy_t *) pwr; - else if (len < sizeof(tx_power_t)) - return -EOVERFLOW; - - memset(&power, 0, sizeof(tx_power_t)); - - power.chanspec = WLC_BAND_PI_RADIO_CHANSPEC; - if (wlc->pub->associated) - power.local_chanspec = wlc->home_chanspec; - - /* Return the user target tx power limits for the various rates. Note wlc_phy.c's - * public interface only implements getting and setting a single value for all of - * rates, so we need to fill the array ourselves. - */ - wlc_phy_txpower_get(wlc->band->pi, &qdbm, &override); - for (r = 0; r < WL_TX_POWER_RATES; r++) { - power.user_limit[r] = (u8) qdbm; - } - - power.local_max = wlc->txpwr_local_max * WLC_TXPWR_DB_FACTOR; - power.local_constraint = - wlc->txpwr_local_constraint * WLC_TXPWR_DB_FACTOR; - - power.antgain[0] = wlc->bandstate[BAND_2G_INDEX]->antgain; - power.antgain[1] = wlc->bandstate[BAND_5G_INDEX]->antgain; - - wlc_channel_reg_limits(wlc->cmi, power.chanspec, &txpwr); - -#if WL_TX_POWER_CCK_NUM != WLC_NUM_RATES_CCK -#error "WL_TX_POWER_CCK_NUM != WLC_NUM_RATES_CCK" -#endif - - /* CCK tx power limits */ - for (c = 0, r = WL_TX_POWER_CCK_FIRST; c < WL_TX_POWER_CCK_NUM; - c++, r++) - power.reg_limit[r] = txpwr.cck[c]; - -#if WL_TX_POWER_OFDM_NUM != WLC_NUM_RATES_OFDM -#error "WL_TX_POWER_OFDM_NUM != WLC_NUM_RATES_OFDM" -#endif - - /* 20 MHz OFDM SISO tx power limits */ - for (c = 0, r = WL_TX_POWER_OFDM_FIRST; c < WL_TX_POWER_OFDM_NUM; - c++, r++) - power.reg_limit[r] = txpwr.ofdm[c]; - - if (WLC_PHY_11N_CAP(wlc->band)) { - - /* 20 MHz OFDM CDD tx power limits */ - for (c = 0, r = WL_TX_POWER_OFDM20_CDD_FIRST; - c < WL_TX_POWER_OFDM_NUM; c++, r++) - power.reg_limit[r] = txpwr.ofdm_cdd[c]; - - /* 40 MHz OFDM SISO tx power limits */ - for (c = 0, r = WL_TX_POWER_OFDM40_SISO_FIRST; - c < WL_TX_POWER_OFDM_NUM; c++, r++) - power.reg_limit[r] = txpwr.ofdm_40_siso[c]; - - /* 40 MHz OFDM CDD tx power limits */ - for (c = 0, r = WL_TX_POWER_OFDM40_CDD_FIRST; - c < WL_TX_POWER_OFDM_NUM; c++, r++) - power.reg_limit[r] = txpwr.ofdm_40_cdd[c]; - -#if WL_TX_POWER_MCS_1_STREAM_NUM != WLC_NUM_RATES_MCS_1_STREAM -#error "WL_TX_POWER_MCS_1_STREAM_NUM != WLC_NUM_RATES_MCS_1_STREAM" -#endif - - /* 20MHz MCS0-7 SISO tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS20_SISO_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_20_siso[c]; - - /* 20MHz MCS0-7 CDD tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS20_CDD_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_20_cdd[c]; - - /* 20MHz MCS0-7 STBC tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS20_STBC_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_20_stbc[c]; - - /* 40MHz MCS0-7 SISO tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS40_SISO_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_40_siso[c]; - - /* 40MHz MCS0-7 CDD tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS40_CDD_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_40_cdd[c]; - - /* 40MHz MCS0-7 STBC tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS40_STBC_FIRST; - c < WLC_NUM_RATES_MCS_1_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_40_stbc[c]; - -#if WL_TX_POWER_MCS_2_STREAM_NUM != WLC_NUM_RATES_MCS_2_STREAM -#error "WL_TX_POWER_MCS_2_STREAM_NUM != WLC_NUM_RATES_MCS_2_STREAM" -#endif - - /* 20MHz MCS8-15 SDM tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS20_SDM_FIRST; - c < WLC_NUM_RATES_MCS_2_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_20_mimo[c]; - - /* 40MHz MCS8-15 SDM tx power limits */ - for (c = 0, r = WL_TX_POWER_MCS40_SDM_FIRST; - c < WLC_NUM_RATES_MCS_2_STREAM; c++, r++) - power.reg_limit[r] = txpwr.mcs_40_mimo[c]; - - /* MCS 32 */ - power.reg_limit[WL_TX_POWER_MCS_32] = txpwr.mcs32; - } - - wlc_phy_txpower_get_current(wlc->band->pi, &power, - CHSPEC_CHANNEL(power.chanspec)); - - /* copy the tx_power_t struct to the return buffer, - * or convert to a tx_power_legacy_t struct - */ - if (!old_power) { - memcpy(pwr, &power, sizeof(tx_power_t)); - } else { - int band_idx = CHSPEC_IS2G(power.chanspec) ? 0 : 1; - - memset(old_power, 0, sizeof(tx_power_legacy_t)); - - old_power->txpwr_local_max = power.local_max; - old_power->txpwr_local_constraint = power.local_constraint; - if (CHSPEC_IS2G(power.chanspec)) { - old_power->txpwr_chan_reg_max = txpwr.cck[0]; - old_power->txpwr_est_Pout[band_idx] = - power.est_Pout_cck; - old_power->txpwr_est_Pout_gofdm = power.est_Pout[0]; - } else { - old_power->txpwr_chan_reg_max = txpwr.ofdm[0]; - old_power->txpwr_est_Pout[band_idx] = power.est_Pout[0]; - } - old_power->txpwr_antgain[0] = power.antgain[0]; - old_power->txpwr_antgain[1] = power.antgain[1]; - - for (r = 0; r < NUM_PWRCTRL_RATES; r++) { - old_power->txpwr_band_max[r] = power.user_limit[r]; - old_power->txpwr_limit[r] = power.reg_limit[r]; - old_power->txpwr_target[band_idx][r] = power.target[r]; - if (CHSPEC_IS2G(power.chanspec)) - old_power->txpwr_bphy_cck_max[r] = - power.board_limit[r]; - else - old_power->txpwr_aphy_max[r] = - power.board_limit[r]; - } - } - - return 0; -} -#endif /* defined(BCMDBG) */ - -static u32 wlc_watchdog_backup_bi(struct wlc_info *wlc) -{ - u32 bi; - bi = 2 * wlc->cfg->current_bss->dtim_period * - wlc->cfg->current_bss->beacon_period; - if (wlc->bcn_li_dtim) - bi *= wlc->bcn_li_dtim; - else if (wlc->bcn_li_bcn) - /* recalculate bi based on bcn_li_bcn */ - bi = 2 * wlc->bcn_li_bcn * wlc->cfg->current_bss->beacon_period; - - if (bi < 2 * TIMER_INTERVAL_WATCHDOG) - bi = 2 * TIMER_INTERVAL_WATCHDOG; - return bi; -} - -/* Change to run the watchdog either from a periodic timer or from tbtt handler. - * Call watchdog from tbtt handler if tbtt is true, watchdog timer otherwise. - */ -void wlc_watchdog_upd(struct wlc_info *wlc, bool tbtt) -{ - /* make sure changing watchdog driver is allowed */ - if (!wlc->pub->up || !wlc->pub->align_wd_tbtt) - return; - if (!tbtt && wlc->WDarmed) { - wl_del_timer(wlc->wl, wlc->wdtimer); - wlc->WDarmed = false; - } - - /* stop watchdog timer and use tbtt interrupt to drive watchdog */ - if (tbtt && wlc->WDarmed) { - wl_del_timer(wlc->wl, wlc->wdtimer); - wlc->WDarmed = false; - wlc->WDlast = OSL_SYSUPTIME(); - } - /* arm watchdog timer and drive the watchdog there */ - else if (!tbtt && !wlc->WDarmed) { - wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, - true); - wlc->WDarmed = true; - } - if (tbtt && !wlc->WDarmed) { - wl_add_timer(wlc->wl, wlc->wdtimer, wlc_watchdog_backup_bi(wlc), - true); - wlc->WDarmed = true; - } + brcms_c_ucode_mac_upd(wlc); } -ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, wlc_rateset_t *rs) +ratespec_t brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc, + wlc_rateset_t *rs) { ratespec_t lowest_basic_rspec; uint i; /* Use the lowest basic rate */ - lowest_basic_rspec = rs->rates[0] & WLC_RATE_MASK; + lowest_basic_rspec = rs->rates[0] & BRCMS_RATE_MASK; for (i = 0; i < rs->count; i++) { - if (rs->rates[i] & WLC_RATE_FLAG) { - lowest_basic_rspec = rs->rates[i] & WLC_RATE_MASK; + if (rs->rates[i] & BRCMS_RATE_FLAG) { + lowest_basic_rspec = rs->rates[i] & BRCMS_RATE_MASK; break; } } @@ -1018,63 +850,63 @@ ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, wlc_rateset_t *rs) /* This function changes the phytxctl for beacon based on current beacon ratespec AND txant * setting as per this table: * ratespec CCK ant = wlc->stf->txant - * OFDM ant = 3 + * OFDM ant = 3 */ -void wlc_beacon_phytxctl_txant_upd(struct wlc_info *wlc, ratespec_t bcn_rspec) +void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, + ratespec_t bcn_rspec) { u16 phyctl; u16 phytxant = wlc->stf->phytxant; u16 mask = PHY_TXC_ANT_MASK; /* for non-siso rates or default setting, use the available chains */ - if (WLC_PHY_11N_CAP(wlc->band)) { - phytxant = wlc_stf_phytxchain_sel(wlc, bcn_rspec); - } + if (BRCMS_PHY_11N_CAP(wlc->band)) + phytxant = brcms_c_stf_phytxchain_sel(wlc, bcn_rspec); - phyctl = wlc_read_shm(wlc, M_BCN_PCTLWD); + phyctl = brcms_c_read_shm(wlc, M_BCN_PCTLWD); phyctl = (phyctl & ~mask) | phytxant; - wlc_write_shm(wlc, M_BCN_PCTLWD, phyctl); + brcms_c_write_shm(wlc, M_BCN_PCTLWD, phyctl); } /* centralized protection config change function to simplify debugging, no consistency checking * this should be called only on changes to avoid overhead in periodic function */ -void wlc_protection_upd(struct wlc_info *wlc, uint idx, int val) +void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, int val) { BCMMSG(wlc->wiphy, "idx %d, val %d\n", idx, val); switch (idx) { - case WLC_PROT_G_SPEC: + case BRCMS_PROT_G_SPEC: wlc->protection->_g = (bool) val; break; - case WLC_PROT_G_OVR: + case BRCMS_PROT_G_OVR: wlc->protection->g_override = (s8) val; break; - case WLC_PROT_G_USER: + case BRCMS_PROT_G_USER: wlc->protection->gmode_user = (u8) val; break; - case WLC_PROT_OVERLAP: + case BRCMS_PROT_OVERLAP: wlc->protection->overlap = (s8) val; break; - case WLC_PROT_N_USER: + case BRCMS_PROT_N_USER: wlc->protection->nmode_user = (s8) val; break; - case WLC_PROT_N_CFG: + case BRCMS_PROT_N_CFG: wlc->protection->n_cfg = (s8) val; break; - case WLC_PROT_N_CFG_OVR: + case BRCMS_PROT_N_CFG_OVR: wlc->protection->n_cfg_override = (s8) val; break; - case WLC_PROT_N_NONGF: + case BRCMS_PROT_N_NONGF: wlc->protection->nongf = (bool) val; break; - case WLC_PROT_N_NONGF_OVR: + case BRCMS_PROT_N_NONGF_OVR: wlc->protection->nongf_override = (s8) val; break; - case WLC_PROT_N_PAM_OVR: + case BRCMS_PROT_N_PAM_OVR: wlc->protection->n_pam_override = (s8) val; break; - case WLC_PROT_N_OBSS: + case BRCMS_PROT_N_OBSS: wlc->protection->n_obss = (bool) val; break; @@ -1084,22 +916,22 @@ void wlc_protection_upd(struct wlc_info *wlc, uint idx, int val) } -static void wlc_ht_update_sgi_rx(struct wlc_info *wlc, int val) +static void brcms_c_ht_update_sgi_rx(struct brcms_c_info *wlc, int val) { wlc->ht_cap.cap_info &= ~(IEEE80211_HT_CAP_SGI_20 | IEEE80211_HT_CAP_SGI_40); - wlc->ht_cap.cap_info |= (val & WLC_N_SGI_20) ? + wlc->ht_cap.cap_info |= (val & BRCMS_N_SGI_20) ? IEEE80211_HT_CAP_SGI_20 : 0; - wlc->ht_cap.cap_info |= (val & WLC_N_SGI_40) ? + wlc->ht_cap.cap_info |= (val & BRCMS_N_SGI_40) ? IEEE80211_HT_CAP_SGI_40 : 0; if (wlc->pub->up) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); + brcms_c_update_beacon(wlc); + brcms_c_update_probe_resp(wlc, true); } } -static void wlc_ht_update_ldpc(struct wlc_info *wlc, s8 val) +static void brcms_c_ht_update_ldpc(struct brcms_c_info *wlc, s8 val) { wlc->stf->ldpc = val; @@ -1108,8 +940,8 @@ static void wlc_ht_update_ldpc(struct wlc_info *wlc, s8 val) wlc->ht_cap.cap_info |= IEEE80211_HT_CAP_LDPC_CODING; if (wlc->pub->up) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); + brcms_c_update_beacon(wlc); + brcms_c_update_probe_resp(wlc, true); wlc_phy_ldpc_override_set(wlc->band->pi, (val ? true : false)); } } @@ -1118,12 +950,12 @@ static void wlc_ht_update_ldpc(struct wlc_info *wlc, s8 val) * ucode, hwmac update * Channel dependent updates for ucode and hw */ -static void wlc_ucode_mac_upd(struct wlc_info *wlc) +static void brcms_c_ucode_mac_upd(struct brcms_c_info *wlc) { /* enable or disable any active IBSSs depending on whether or not * we are on the home channel */ - if (wlc->home_chanspec == WLC_BAND_PI_RADIO_CHANSPEC) { + if (wlc->home_chanspec == BRCMS_BAND_PI_RADIO_CHANSPEC) { if (wlc->pub->associated) { /* BMAC_NOTE: This is something that should be fixed in ucode inits. * I think that the ucode inits set up the bcn templates and shm values @@ -1131,8 +963,8 @@ static void wlc_ucode_mac_upd(struct wlc_info *wlc) * to set up a beacon for testing, the test routines should write it down, * not expect the inits to populate a bogus beacon. */ - if (WLC_PHY_11N_CAP(wlc->band)) { - wlc_write_shm(wlc, M_BCN_TXTSF_OFFSET, + if (BRCMS_PHY_11N_CAP(wlc->band)) { + brcms_c_write_shm(wlc, M_BCN_TXTSF_OFFSET, wlc->band->bcntsfoff); } } @@ -1141,11 +973,12 @@ static void wlc_ucode_mac_upd(struct wlc_info *wlc) } /* update the various promisc bits */ - wlc_mac_bcn_promisc(wlc); - wlc_mac_promisc(wlc); + brcms_c_mac_bcn_promisc(wlc); + brcms_c_mac_promisc(wlc); } -static void wlc_bandinit_ordered(struct wlc_info *wlc, chanspec_t chanspec) +static void brcms_c_bandinit_ordered(struct brcms_c_info *wlc, + chanspec_t chanspec) { wlc_rateset_t default_rateset; uint parkband; @@ -1157,11 +990,12 @@ static void wlc_bandinit_ordered(struct wlc_info *wlc, chanspec_t chanspec) * figure out the right band to park on */ if (wlc->bandlocked || NBANDS(wlc) == 1) { - parkband = wlc->band->bandunit; /* updated in wlc_bandlock() */ + /* updated in brcms_c_bandlock() */ + parkband = wlc->band->bandunit; band_order[0] = band_order[1] = parkband; } else { /* park on the band of the specified chanspec */ - parkband = CHSPEC_WLCBANDUNIT(chanspec); + parkband = CHSPEC_BANDUNIT(chanspec); /* order so that parkband initialize last */ band_order[0] = parkband ^ 1; @@ -1174,43 +1008,44 @@ static void wlc_bandinit_ordered(struct wlc_info *wlc, chanspec_t chanspec) wlc->band = wlc->bandstate[j]; - wlc_default_rateset(wlc, &default_rateset); + brcms_default_rateset(wlc, &default_rateset); /* fill in hw_rate */ - wlc_rateset_filter(&default_rateset, &wlc->band->hw_rateset, - false, WLC_RATES_CCK_OFDM, WLC_RATE_MASK, + brcms_c_rateset_filter(&default_rateset, &wlc->band->hw_rateset, + false, BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK, (bool) N_ENAB(wlc->pub)); /* init basic rate lookup */ - wlc_rate_lookup_init(wlc, &default_rateset); + brcms_c_rate_lookup_init(wlc, &default_rateset); } /* sync up phy/radio chanspec */ - wlc_set_phy_chanspec(wlc, chanspec); + brcms_c_set_phy_chanspec(wlc, chanspec); } /* band-specific init */ -static void WLBANDINITFN(wlc_bsinit) (struct wlc_info *wlc) +static void brcms_c_bsinit(struct brcms_c_info *wlc) { BCMMSG(wlc->wiphy, "wl%d: bandunit %d\n", wlc->pub->unit, wlc->band->bandunit); /* write ucode ACK/CTS rate table */ - wlc_set_ratetable(wlc); + brcms_c_set_ratetable(wlc); /* update some band specific mac configuration */ - wlc_ucode_mac_upd(wlc); + brcms_c_ucode_mac_upd(wlc); /* init antenna selection */ - wlc_antsel_init(wlc->asi); + brcms_c_antsel_init(wlc->asi); } /* switch to and initialize new band */ -static void WLBANDINITFN(wlc_setband) (struct wlc_info *wlc, uint bandunit) +static void brcms_c_setband(struct brcms_c_info *wlc, + uint bandunit) { int idx; - struct wlc_bsscfg *cfg; + struct brcms_bss_cfg *cfg; wlc->band = wlc->bandstate[bandunit]; @@ -1218,19 +1053,22 @@ static void WLBANDINITFN(wlc_setband) (struct wlc_info *wlc, uint bandunit) return; /* wait for at least one beacon before entering sleeping state */ - wlc->PMawakebcn = true; - FOREACH_AS_STA(wlc, idx, cfg) - cfg->PMawakebcn = true; - wlc_set_ps_ctrl(wlc); + for (idx = 0; idx < BRCMS_MAXBSSCFG; idx++) { + cfg = wlc->bsscfg[idx]; + if (cfg && BSSCFG_STA(cfg) && cfg->associated) + cfg->PMawakebcn = true; + } + brcms_c_set_ps_ctrl(wlc); /* band-specific initializations */ - wlc_bsinit(wlc); + brcms_c_bsinit(wlc); } /* Initialize a WME Parameter Info Element with default STA parameters from WMM Spec, Table 12 */ -void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe) +void +brcms_c_wme_initparams_sta(struct brcms_c_info *wlc, struct wme_param_ie *pe) { - static const wme_param_ie_t stadef = { + static const struct wme_param_ie stadef = { WME_OUI, WME_TYPE, WME_SUBTYPE_PARAM_IE, @@ -1251,12 +1089,12 @@ void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe) memcpy(pe, &stadef, sizeof(*pe)); } -void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, +void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci, const struct ieee80211_tx_queue_params *params, bool suspend) { int i; - shm_acparams_t acp_shm; + struct shm_acparams acp_shm; u16 *shm_entry; /* Only apply params if the core is out of reset and has clocks */ @@ -1266,10 +1104,8 @@ void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, return; } - wlc->wme_admctl = 0; - do { - memset((char *)&acp_shm, 0, sizeof(shm_acparams_t)); + memset((char *)&acp_shm, 0, sizeof(struct shm_acparams)); /* fill in shm ac params struct */ acp_shm.txop = le16_to_cpu(params->txop); /* convert from units of 32us to us for ucode */ @@ -1283,7 +1119,7 @@ void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, if (acp_shm.aifs < EDCF_AIFSN_MIN || acp_shm.aifs > EDCF_AIFSN_MAX) { - wiphy_err(wlc->wiphy, "wl%d: wlc_edcf_setparams: bad " + wiphy_err(wlc->wiphy, "wl%d: edcf_setparams: bad " "aifs %d\n", wlc->pub->unit, acp_shm.aifs); continue; } @@ -1295,7 +1131,7 @@ void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, R_REG(&wlc->regs->tsf_random) & acp_shm.cwcur; acp_shm.reggap = acp_shm.bslots + acp_shm.aifs; /* Indicate the new params to the ucode */ - acp_shm.status = wlc_read_shm(wlc, (M_EDCF_QINFO + + acp_shm.status = brcms_c_read_shm(wlc, (M_EDCF_QINFO + wme_shmemacindex(aci) * M_EDCF_QLEN + M_EDCF_STATUS_OFF)); @@ -1303,8 +1139,8 @@ void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, /* Fill in shm acparam table */ shm_entry = (u16 *) &acp_shm; - for (i = 0; i < (int)sizeof(shm_acparams_t); i += 2) - wlc_write_shm(wlc, + for (i = 0; i < (int)sizeof(struct shm_acparams); i += 2) + brcms_c_write_shm(wlc, M_EDCF_QINFO + wme_shmemacindex(aci) * M_EDCF_QLEN + i, *shm_entry++); @@ -1312,18 +1148,18 @@ void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, } while (0); if (suspend) - wlc_suspend_mac_and_wait(wlc); + brcms_c_suspend_mac_and_wait(wlc); if (suspend) - wlc_enable_mac(wlc); + brcms_c_enable_mac(wlc); } -void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend) +void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend) { u16 aci; int i_ac; - edcf_acparam_t *edcf_acp; + struct edcf_acparam *edcf_acp; struct ieee80211_tx_queue_params txq_pars; struct ieee80211_tx_queue_params *params = &txq_pars; @@ -1334,15 +1170,11 @@ void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend) * STA uses AC params from wme_param_ie. */ - edcf_acp = (edcf_acparam_t *) &wlc->wme_param_ie.acparam[0]; + edcf_acp = (struct edcf_acparam *) &wlc->wme_param_ie.acparam[0]; for (i_ac = 0; i_ac < AC_COUNT; i_ac++, edcf_acp++) { /* find out which ac this set of params applies to */ aci = (edcf_acp->ACI & EDCF_ACI_MASK) >> EDCF_ACI_SHIFT; - /* set the admission control policy for this AC */ - if (edcf_acp->ACI & EDCF_ACM_MASK) { - wlc->wme_admctl |= 1 << aci; - } /* fill in shm ac params struct */ params->txop = edcf_acp->TXOP; @@ -1353,25 +1185,25 @@ void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend) /* CWmax = 2^(ECWmax) - 1 */ params->cw_max = EDCF_ECW2CW((edcf_acp->ECW & EDCF_ECWMAX_MASK) >> EDCF_ECWMAX_SHIFT); - wlc_wme_setparams(wlc, aci, params, suspend); + brcms_c_wme_setparams(wlc, aci, params, suspend); } if (suspend) - wlc_suspend_mac_and_wait(wlc); + brcms_c_suspend_mac_and_wait(wlc); if (AP_ENAB(wlc->pub) && WME_ENAB(wlc->pub)) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, false); + brcms_c_update_beacon(wlc); + brcms_c_update_probe_resp(wlc, false); } if (suspend) - wlc_enable_mac(wlc); + brcms_c_enable_mac(wlc); } -bool wlc_timers_init(struct wlc_info *wlc, int unit) +bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit) { - wlc->wdtimer = wl_init_timer(wlc->wl, wlc_watchdog_by_timer, + wlc->wdtimer = brcms_init_timer(wlc->wl, brcms_c_watchdog_by_timer, wlc, "watchdog"); if (!wlc->wdtimer) { wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for wdtimer " @@ -1379,7 +1211,7 @@ bool wlc_timers_init(struct wlc_info *wlc, int unit) goto fail; } - wlc->radio_timer = wl_init_timer(wlc->wl, wlc_radio_timer, + wlc->radio_timer = brcms_init_timer(wlc->wl, brcms_c_radio_timer, wlc, "radio"); if (!wlc->radio_timer) { wiphy_err(wlc->wiphy, "wl%d: wl_init_timer for radio_timer " @@ -1394,44 +1226,35 @@ bool wlc_timers_init(struct wlc_info *wlc, int unit) } /* - * Initialize wlc_info default values ... + * Initialize brcms_c_info default values ... * may get overrides later in this function */ -void wlc_info_init(struct wlc_info *wlc, int unit) +void brcms_c_info_init(struct brcms_c_info *wlc, int unit) { int i; /* Assume the device is there until proven otherwise */ wlc->device_present = true; - /* set default power output percentage to 100 percent */ - wlc->txpwr_percent = 100; - /* Save our copy of the chanspec */ wlc->chanspec = CH20MHZ_CHSPEC(1); - /* initialize CCK preamble mode to unassociated state */ - wlc->shortpreamble = false; - - wlc->legacy_probe = true; - /* various 802.11g modes */ wlc->shortslot = false; - wlc->shortslot_override = WLC_SHORTSLOT_AUTO; + wlc->shortslot_override = BRCMS_SHORTSLOT_AUTO; - wlc->barker_overlap_control = true; - wlc->barker_preamble = WLC_BARKER_SHORT_ALLOWED; - wlc->txburst_limit_override = AUTO; + brcms_c_protection_upd(wlc, BRCMS_PROT_G_OVR, BRCMS_PROTECTION_AUTO); + brcms_c_protection_upd(wlc, BRCMS_PROT_G_SPEC, false); - wlc_protection_upd(wlc, WLC_PROT_G_OVR, WLC_PROTECTION_AUTO); - wlc_protection_upd(wlc, WLC_PROT_G_SPEC, false); + brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG_OVR, + BRCMS_PROTECTION_AUTO); + brcms_c_protection_upd(wlc, BRCMS_PROT_N_CFG, BRCMS_N_PROTECTION_OFF); + brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF_OVR, + BRCMS_PROTECTION_AUTO); + brcms_c_protection_upd(wlc, BRCMS_PROT_N_NONGF, false); + brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, AUTO); - wlc_protection_upd(wlc, WLC_PROT_N_CFG_OVR, WLC_PROTECTION_AUTO); - wlc_protection_upd(wlc, WLC_PROT_N_CFG, WLC_N_PROTECTION_OFF); - wlc_protection_upd(wlc, WLC_PROT_N_NONGF_OVR, WLC_PROTECTION_AUTO); - wlc_protection_upd(wlc, WLC_PROT_N_NONGF, false); - wlc_protection_upd(wlc, WLC_PROT_N_PAM_OVR, AUTO); - - wlc_protection_upd(wlc, WLC_PROT_OVERLAP, WLC_PROTECTION_CTL_OVERLAP); + brcms_c_protection_upd(wlc, BRCMS_PROT_OVERLAP, + BRCMS_PROTECTION_CTL_OVERLAP); /* 802.11g draft 4.0 NonERP elt advertisement */ wlc->include_legacy_erp = true; @@ -1439,7 +1262,7 @@ void wlc_info_init(struct wlc_info *wlc, int unit) wlc->stf->ant_rx_ovr = ANT_RX_DIV_DEF; wlc->stf->txant = ANT_TX_DEF; - wlc->prb_resp_timeout = WLC_PRB_RESP_TIMEOUT; + wlc->prb_resp_timeout = BRCMS_PRB_RESP_TIMEOUT; wlc->usr_fragthresh = DOT11_DEFAULT_FRAG_LEN; for (i = 0; i < NFIFO; i++) @@ -1454,30 +1277,6 @@ void wlc_info_init(struct wlc_info *wlc, int unit) wlc->SRL = RETRY_SHORT_DEF; wlc->LRL = RETRY_LONG_DEF; - /* init PM state */ - wlc->PM = PM_OFF; /* User's setting of PM mode through IOCTL */ - wlc->PM_override = false; /* Prevents from going to PM if our AP is 'ill' */ - wlc->PMenabled = false; /* Current PM state */ - wlc->PMpending = false; /* Tracks whether STA indicated PM in the last attempt */ - wlc->PMblocked = false; /* To allow blocking going into PM during RM and scans */ - - /* In WMM Auto mode, PM is allowed if association is a UAPSD association */ - wlc->WME_PM_blocked = false; - - /* Init wme queuing method */ - wlc->wme_prec_queuing = false; - - /* Overrides for the core to stay awake under zillion conditions Look for STAY_AWAKE */ - wlc->wake = false; - /* Are we waiting for a response to PS-Poll that we sent */ - wlc->PSpoll = false; - - /* APSD defaults */ - wlc->wme_apsd = true; - wlc->apsd_sta_usp = false; - wlc->apsd_trigger_timeout = 0; /* disable the trigger timer */ - wlc->apsd_trigger_ac = AC_BITMAP_ALL; - /* Set flag to indicate that hw keys should be used when available. */ wlc->wsec_swkeys = false; @@ -1487,8 +1286,6 @@ void wlc_info_init(struct wlc_info *wlc, int unit) wlc->wsec_keys[i]->idx = (u8) i; } - wlc->_regulatory_domain = false; /* 802.11d */ - /* WME QoS mode is Auto by default */ wlc->pub->_wme = AUTO; @@ -1498,54 +1295,50 @@ void wlc_info_init(struct wlc_info *wlc, int unit) wlc->pub->_ampdu = AMPDU_AGG_HOST; wlc->pub->bcmerror = 0; - wlc->ibss_allowed = true; - wlc->ibss_coalesce_allowed = true; wlc->pub->_coex = ON; /* initialize mpc delay */ - wlc->mpc_delay_off = wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; - - wlc->pr80838_war = true; + wlc->mpc_delay_off = wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT; } -static bool wlc_state_bmac_sync(struct wlc_info *wlc) +static bool brcms_c_state_bmac_sync(struct brcms_c_info *wlc) { - wlc_bmac_state_t state_bmac; + struct brcms_b_state state_bmac; - if (wlc_bmac_state_get(wlc->hw, &state_bmac) != 0) + if (brcms_b_state_get(wlc->hw, &state_bmac) != 0) return false; wlc->machwcap = state_bmac.machwcap; - wlc_protection_upd(wlc, WLC_PROT_N_PAM_OVR, + brcms_c_protection_upd(wlc, BRCMS_PROT_N_PAM_OVR, (s8) state_bmac.preamble_ovr); return true; } -static uint wlc_attach_module(struct wlc_info *wlc) +static uint brcms_c_attach_module(struct brcms_c_info *wlc) { uint err = 0; uint unit; unit = wlc->pub->unit; - wlc->asi = wlc_antsel_attach(wlc); + wlc->asi = brcms_c_antsel_attach(wlc); if (wlc->asi == NULL) { - wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_antsel_attach " + wiphy_err(wlc->wiphy, "wl%d: attach: antsel_attach " "failed\n", unit); err = 44; goto fail; } - wlc->ampdu = wlc_ampdu_attach(wlc); + wlc->ampdu = brcms_c_ampdu_attach(wlc); if (wlc->ampdu == NULL) { - wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_ampdu_attach " + wiphy_err(wlc->wiphy, "wl%d: attach: ampdu_attach " "failed\n", unit); err = 50; goto fail; } - if ((wlc_stf_attach(wlc) != 0)) { - wiphy_err(wlc->wiphy, "wl%d: wlc_attach: wlc_stf_attach " + if ((brcms_c_stf_attach(wlc) != 0)) { + wiphy_err(wlc->wiphy, "wl%d: attach: stf_attach " "failed\n", unit); err = 68; goto fail; @@ -1554,28 +1347,28 @@ static uint wlc_attach_module(struct wlc_info *wlc) return err; } -struct wlc_pub *wlc_pub(void *wlc) +struct brcms_pub *brcms_c_pub(void *wlc) { - return ((struct wlc_info *) wlc)->pub; + return ((struct brcms_c_info *) wlc)->pub; } -#define CHIP_SUPPORTS_11N(wlc) 1 +#define CHIP_SUPPORTS_11N(wlc) 1 /* * The common driver entry routine. Error codes should be unique */ -void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, +void *brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, uint unit, bool piomode, void *regsva, uint bustype, void *btparam, uint *perr) { - struct wlc_info *wlc; + struct brcms_c_info *wlc; uint err = 0; uint j; - struct wlc_pub *pub; + struct brcms_pub *pub; uint n_disabled; - /* allocate struct wlc_info state and its substructures */ - wlc = (struct wlc_info *) wlc_attach_malloc(unit, &err, device); + /* allocate struct brcms_c_info state and its substructures */ + wlc = (struct brcms_c_info *) brcms_c_attach_malloc(unit, &err, device); if (wlc == NULL) goto fail; wlc->wiphy = wl->wiphy; @@ -1589,30 +1382,23 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->core = wlc->corestate; wlc->wl = wl; pub->unit = unit; - wlc->btparam = btparam; pub->_piomode = piomode; wlc->bandinit_pending = false; - /* By default restrict TKIP associations from 11n STA's */ - wlc->ht_wsec_restriction = WLC_HT_TKIP_RESTRICT; - /* populate struct wlc_info with default values */ - wlc_info_init(wlc, unit); + /* populate struct brcms_c_info with default values */ + brcms_c_info_init(wlc, unit); /* update sta/ap related parameters */ - wlc_ap_upd(wlc); + brcms_c_ap_upd(wlc); /* 11n_disable nvram */ n_disabled = getintvar(pub->vars, "11n_disable"); - /* register a module (to handle iovars) */ - wlc_module_register(wlc->pub, wlc_iovars, "wlc_iovars", wlc, - wlc_doiovar, NULL, NULL); - /* * low level attach steps(all hw accesses go * inside, no more in rest of the attach) */ - err = wlc_bmac_attach(wlc, vendor, device, unit, piomode, regsva, + err = brcms_b_attach(wlc, vendor, device, unit, piomode, regsva, bustype, btparam); if (err) goto fail; @@ -1620,15 +1406,15 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, /* for some states, due to different info pointer(e,g, wlc, wlc_hw) or master/slave split, * HIGH driver(both monolithic and HIGH_ONLY) needs to sync states FROM BMAC portion driver */ - if (!wlc_state_bmac_sync(wlc)) { + if (!brcms_c_state_bmac_sync(wlc)) { err = 20; goto fail; } - pub->phy_11ncapable = WLC_PHY_11N_CAP(wlc->band); + pub->phy_11ncapable = BRCMS_PHY_11N_CAP(wlc->band); /* propagate *vars* from BMAC driver to high driver */ - wlc_bmac_copyfrom_vars(wlc->hw, &pub->vars, &wlc->vars_size); + brcms_b_copyfrom_vars(wlc->hw, &pub->vars, &wlc->vars_size); /* set maximum allowed duty cycle */ @@ -1637,10 +1423,10 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->tx_duty_cycle_cck = (u16) getintvar(pub->vars, "tx_duty_cycle_cck"); - wlc_stf_phy_chain_calc(wlc); + brcms_c_stf_phy_chain_calc(wlc); /* txchain 1: txant 0, txchain 2: txant 1 */ - if (WLCISNPHY(wlc->band) && (wlc->stf->txstreams == 1)) + if (BRCMS_ISNPHY(wlc->band) && (wlc->stf->txstreams == 1)) wlc->stf->txant = wlc->stf->hw_txchain - 1; /* push to BMAC driver */ @@ -1654,7 +1440,7 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->core->txavail[i] = wlc->hw->txavail[i]; } - wlc_bmac_hw_etheraddr(wlc->hw, wlc->perm_etheraddr); + brcms_b_hw_etheraddr(wlc->hw, wlc->perm_etheraddr); memcpy(&pub->cur_etheraddr, &wlc->perm_etheraddr, ETH_ALEN); @@ -1665,7 +1451,7 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->band = wlc->bandstate[j]; - if (!wlc_attach_stf_ant_init(wlc)) { + if (!brcms_c_attach_stf_ant_init(wlc)) { err = 24; goto fail; } @@ -1677,18 +1463,19 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, /* init gmode value */ if (BAND_2G(wlc->band->bandtype)) { wlc->band->gmode = GMODE_AUTO; - wlc_protection_upd(wlc, WLC_PROT_G_USER, + brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, wlc->band->gmode); } /* init _n_enab supported mode */ - if (WLC_PHY_11N_CAP(wlc->band) && CHIP_SUPPORTS_11N(wlc)) { + if (BRCMS_PHY_11N_CAP(wlc->band) && CHIP_SUPPORTS_11N(wlc)) { if (n_disabled & WLFEATURE_DISABLE_11N) { pub->_n_enab = OFF; - wlc_protection_upd(wlc, WLC_PROT_N_USER, OFF); + brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER, + OFF); } else { pub->_n_enab = SUPPORT_11N; - wlc_protection_upd(wlc, WLC_PROT_N_USER, + brcms_c_protection_upd(wlc, BRCMS_PROT_N_USER, ((pub->_n_enab == SUPPORT_11N) ? WL_11N_2x2 : WL_11N_3x3)); @@ -1696,48 +1483,48 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, } /* init per-band default rateset, depend on band->gmode */ - wlc_default_rateset(wlc, &wlc->band->defrateset); + brcms_default_rateset(wlc, &wlc->band->defrateset); - /* fill in hw_rateset (used early by WLC_SET_RATESET) */ - wlc_rateset_filter(&wlc->band->defrateset, + /* fill in hw_rateset (used early by BRCM_SET_RATESET) */ + brcms_c_rateset_filter(&wlc->band->defrateset, &wlc->band->hw_rateset, false, - WLC_RATES_CCK_OFDM, WLC_RATE_MASK, + BRCMS_RATES_CCK_OFDM, BRCMS_RATE_MASK, (bool) N_ENAB(wlc->pub)); } /* update antenna config due to wlc->stf->txant/txchain/ant_rx_ovr change */ - wlc_stf_phy_txant_upd(wlc); + brcms_c_stf_phy_txant_upd(wlc); /* attach each modules */ - err = wlc_attach_module(wlc); + err = brcms_c_attach_module(wlc); if (err != 0) goto fail; - if (!wlc_timers_init(wlc, unit)) { - wiphy_err(wl->wiphy, "wl%d: %s: wlc_init_timer failed\n", unit, + if (!brcms_c_timers_init(wlc, unit)) { + wiphy_err(wl->wiphy, "wl%d: %s: init_timer failed\n", unit, __func__); err = 32; goto fail; } /* depend on rateset, gmode */ - wlc->cmi = wlc_channel_mgr_attach(wlc); + wlc->cmi = brcms_c_channel_mgr_attach(wlc); if (!wlc->cmi) { - wiphy_err(wl->wiphy, "wl%d: %s: wlc_channel_mgr_attach failed" + wiphy_err(wl->wiphy, "wl%d: %s: channel_mgr_attach failed" "\n", unit, __func__); err = 33; goto fail; } /* init default when all parameters are ready, i.e. ->rateset */ - wlc_bss_default_init(wlc); + brcms_c_bss_default_init(wlc); /* * Complete the wlc default state initializations.. */ /* allocate our initial queue */ - wlc->pkt_queue = wlc_txq_alloc(wlc); + wlc->pkt_queue = brcms_c_txq_alloc(wlc); if (wlc->pkt_queue == NULL) { wiphy_err(wl->wiphy, "wl%d: %s: failed to malloc tx queue\n", unit, __func__); @@ -1750,7 +1537,7 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->cfg->wlc = wlc; pub->txmaxpkts = MAXTXPKTS; - wlc_wme_initparams_sta(wlc, &wlc->wme_param_ie); + brcms_c_wme_initparams_sta(wlc, &wlc->wme_param_ie); wlc->mimoft = FT_HT; wlc->ht_cap.cap_info = HT_CAP; @@ -1760,20 +1547,19 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->mimo_40txbw = AUTO; wlc->ofdm_40txbw = AUTO; wlc->cck_40txbw = AUTO; - wlc_update_mimo_band_bwcap(wlc, WLC_N_BW_20IN2G_40IN5G); - - /* Enable setting the RIFS Mode bit by default in HT Info IE */ - wlc->rifs_advert = AUTO; + brcms_c_update_mimo_band_bwcap(wlc, BRCMS_N_BW_20IN2G_40IN5G); /* Set default values of SGI */ - if (WLC_SGI_CAP_PHY(wlc)) { - wlc_ht_update_sgi_rx(wlc, (WLC_N_SGI_20 | WLC_N_SGI_40)); + if (BRCMS_SGI_CAP_PHY(wlc)) { + brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 | + BRCMS_N_SGI_40)); wlc->sgi_tx = AUTO; - } else if (WLCISSSLPNPHY(wlc->band)) { - wlc_ht_update_sgi_rx(wlc, (WLC_N_SGI_20 | WLC_N_SGI_40)); + } else if (BRCMS_ISSSLPNPHY(wlc->band)) { + brcms_c_ht_update_sgi_rx(wlc, (BRCMS_N_SGI_20 | + BRCMS_N_SGI_40)); wlc->sgi_tx = AUTO; } else { - wlc_ht_update_sgi_rx(wlc, 0); + brcms_c_ht_update_sgi_rx(wlc, 0); wlc->sgi_tx = OFF; } @@ -1784,7 +1570,7 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->sgi_tx = OFF; if (n_disabled & WLFEATURE_DISABLE_11N_SGI_RX) - wlc_ht_update_sgi_rx(wlc, 0); + brcms_c_ht_update_sgi_rx(wlc, 0); /* apply the stbc override from nvram conf */ if (n_disabled & WLFEATURE_DISABLE_11N_STBC_TX) { @@ -1793,23 +1579,15 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_TX_STBC; } if (n_disabled & WLFEATURE_DISABLE_11N_STBC_RX) - wlc_stf_stbc_rx_set(wlc, HT_CAP_RX_STBC_NO); + brcms_c_stf_stbc_rx_set(wlc, HT_CAP_RX_STBC_NO); /* apply the GF override from nvram conf */ if (n_disabled & WLFEATURE_DISABLE_11N_GF) wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_GRN_FLD; /* initialize radio_mpc_disable according to wlc->mpc */ - wlc_radio_mpc_upd(wlc); - - if ((wlc->pub->sih->chip) == BCM43235_CHIP_ID) { - if ((getintvar(wlc->pub->vars, "aa2g") == 7) || - (getintvar(wlc->pub->vars, "aa5g") == 7)) { - wlc_bmac_antsel_set(wlc->hw, 1); - } - } else { - wlc_bmac_antsel_set(wlc->hw, wlc->asi->antsel_avail); - } + brcms_c_radio_mpc_upd(wlc); + brcms_b_antsel_set(wlc->hw, wlc->asi->antsel_avail); if (perr) *perr = 0; @@ -1820,14 +1598,14 @@ void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, wiphy_err(wl->wiphy, "wl%d: %s: failed with err %d\n", unit, __func__, err); if (wlc) - wlc_detach(wlc); + brcms_c_detach(wlc); if (perr) *perr = err; return NULL; } -static void wlc_attach_antgain_init(struct wlc_info *wlc) +static void brcms_c_attach_antgain_init(struct brcms_c_info *wlc) { uint unit; unit = wlc->pub->unit; @@ -1859,7 +1637,7 @@ static void wlc_attach_antgain_init(struct wlc_info *wlc) } } -static bool wlc_attach_stf_ant_init(struct wlc_info *wlc) +static bool brcms_c_attach_stf_ant_init(struct brcms_c_info *wlc) { int aa; uint unit; @@ -1894,49 +1672,51 @@ static bool wlc_attach_stf_ant_init(struct wlc_info *wlc) /* Compute Antenna Gain */ wlc->band->antgain = (s8) getintvar(vars, (BAND_5G(bandtype) ? "ag1" : "ag0")); - wlc_attach_antgain_init(wlc); + brcms_c_attach_antgain_init(wlc); return true; } -static void wlc_timers_deinit(struct wlc_info *wlc) +static void brcms_c_timers_deinit(struct brcms_c_info *wlc) { /* free timer state */ if (wlc->wdtimer) { - wl_free_timer(wlc->wl, wlc->wdtimer); + brcms_free_timer(wlc->wl, wlc->wdtimer); wlc->wdtimer = NULL; } if (wlc->radio_timer) { - wl_free_timer(wlc->wl, wlc->radio_timer); + brcms_free_timer(wlc->wl, wlc->radio_timer); wlc->radio_timer = NULL; } } -static void wlc_detach_module(struct wlc_info *wlc) +static void brcms_c_detach_module(struct brcms_c_info *wlc) { if (wlc->asi) { - wlc_antsel_detach(wlc->asi); + brcms_c_antsel_detach(wlc->asi); wlc->asi = NULL; } if (wlc->ampdu) { - wlc_ampdu_detach(wlc->ampdu); + brcms_c_ampdu_detach(wlc->ampdu); wlc->ampdu = NULL; } - wlc_stf_detach(wlc); + brcms_c_stf_detach(wlc); } /* * Return a count of the number of driver callbacks still pending. * - * General policy is that wlc_detach can only dealloc/free software states. It can NOT - * touch hardware registers since the d11core may be in reset and clock may not be available. - * One exception is sb register access, which is possible if crystal is turned on - * After "down" state, driver should avoid software timer with the exception of radio_monitor. + * General policy is that brcms_c_detach can only dealloc/free software states. + * It can NOT touch hardware registers since the d11core may be in reset and + * clock may not be available. + * One exception is sb register access, which is possible if crystal is turned + * on after "down" state, driver should avoid software timer with the exception + * of radio_monitor. */ -uint wlc_detach(struct wlc_info *wlc) +uint brcms_c_detach(struct brcms_c_info *wlc) { uint callbacks = 0; @@ -1945,70 +1725,47 @@ uint wlc_detach(struct wlc_info *wlc) BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - callbacks += wlc_bmac_detach(wlc); + callbacks += brcms_b_detach(wlc); /* delete software timers */ - if (!wlc_radio_monitor_stop(wlc)) + if (!brcms_c_radio_monitor_stop(wlc)) callbacks++; - wlc_channel_mgr_detach(wlc->cmi); - - wlc_timers_deinit(wlc); - - wlc_detach_module(wlc); - - /* free other state */ - + brcms_c_channel_mgr_detach(wlc->cmi); -#ifdef BCMDBG - kfree(wlc->country_ie_override); - wlc->country_ie_override = NULL; -#endif /* BCMDBG */ + brcms_c_timers_deinit(wlc); - { - /* free dumpcb list */ - struct dumpcb_s *prev, *ptr; - prev = ptr = wlc->dumpcb_head; - while (ptr) { - ptr = prev->next; - kfree(prev); - prev = ptr; - } - wlc->dumpcb_head = NULL; - } + brcms_c_detach_module(wlc); - /* Detach from iovar manager */ - wlc_module_unregister(wlc->pub, "wlc_iovars", wlc); while (wlc->tx_queues != NULL) - wlc_txq_free(wlc, wlc->tx_queues); + brcms_c_txq_free(wlc, wlc->tx_queues); - wlc_detach_mfree(wlc); + brcms_c_detach_mfree(wlc); return callbacks; } /* update state that depends on the current value of "ap" */ -void wlc_ap_upd(struct wlc_info *wlc) +void brcms_c_ap_upd(struct brcms_c_info *wlc) { if (AP_ENAB(wlc->pub)) - wlc->PLCPHdr_override = WLC_PLCP_AUTO; /* AP: short not allowed, but not enforced */ + /* AP: short not allowed, but not enforced */ + wlc->PLCPHdr_override = BRCMS_PLCP_AUTO; else - wlc->PLCPHdr_override = WLC_PLCP_SHORT; /* STA-BSS; short capable */ - - /* disable vlan_mode on AP since some legacy STAs cannot rx tagged pkts */ - wlc->vlan_mode = AP_ENAB(wlc->pub) ? OFF : AUTO; + /* STA-BSS; short capable */ + wlc->PLCPHdr_override = BRCMS_PLCP_SHORT; /* fixup mpc */ wlc->mpc = true; } /* read hwdisable state and propagate to wlc flag */ -static void wlc_radio_hwdisable_upd(struct wlc_info *wlc) +static void brcms_c_radio_hwdisable_upd(struct brcms_c_info *wlc) { if (wlc->pub->wlfeatureflag & WL_SWFL_NOHWRADIO || wlc->pub->hw_off) return; - if (wlc_bmac_radio_read_hwdisabled(wlc->hw)) { + if (brcms_b_radio_read_hwdisabled(wlc->hw)) { mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); } else { mboolclr(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); @@ -2016,17 +1773,17 @@ static void wlc_radio_hwdisable_upd(struct wlc_info *wlc) } /* return true if Minimum Power Consumption should be entered, false otherwise */ -bool wlc_is_non_delay_mpc(struct wlc_info *wlc) +bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc) { return false; } -bool wlc_ismpc(struct wlc_info *wlc) +bool brcms_c_ismpc(struct brcms_c_info *wlc) { - return (wlc->mpc_delay_off == 0) && (wlc_is_non_delay_mpc(wlc)); + return (wlc->mpc_delay_off == 0) && (brcms_c_is_non_delay_mpc(wlc)); } -void wlc_radio_mpc_upd(struct wlc_info *wlc) +void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc) { bool mpc_radio, radio_state; @@ -2040,9 +1797,9 @@ void wlc_radio_mpc_upd(struct wlc_info *wlc) if (!wlc->pub->radio_disabled) return; mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE); - wlc_radio_upd(wlc); + brcms_c_radio_upd(wlc); if (!wlc->pub->radio_disabled) - wlc_radio_monitor_stop(wlc); + brcms_c_radio_monitor_stop(wlc); return; } @@ -2054,17 +1811,17 @@ void wlc_radio_mpc_upd(struct wlc_info *wlc) radio_state = (mboolisset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE) ? OFF : ON); - mpc_radio = (wlc_ismpc(wlc) == true) ? OFF : ON; + mpc_radio = (brcms_c_ismpc(wlc) == true) ? OFF : ON; if (radio_state == ON && mpc_radio == OFF) wlc->mpc_delay_off = wlc->mpc_dlycnt; else if (radio_state == OFF && mpc_radio == ON) { mboolclr(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE); - wlc_radio_upd(wlc); - if (wlc->mpc_offcnt < WLC_MPC_THRESHOLD) { - wlc->mpc_dlycnt = WLC_MPC_MAX_DELAYCNT; - } else - wlc->mpc_dlycnt = WLC_MPC_MIN_DELAYCNT; + brcms_c_radio_upd(wlc); + if (wlc->mpc_offcnt < BRCMS_MPC_THRESHOLD) + wlc->mpc_dlycnt = BRCMS_MPC_MAX_DELAYCNT; + else + wlc->mpc_dlycnt = BRCMS_MPC_MIN_DELAYCNT; wlc->mpc_dur += OSL_SYSUPTIME() - wlc->mpc_laston_ts; } /* Below logic is meant to capture the transition from mpc off to mpc on for reasons @@ -2072,57 +1829,57 @@ void wlc_radio_mpc_upd(struct wlc_info *wlc) * wlc->mpc_delay_off to wlc->mpc_dlycnt, so that we restart the countdown of mpc_delay_off */ if ((wlc->prev_non_delay_mpc == false) && - (wlc_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off) { + (brcms_c_is_non_delay_mpc(wlc) == true) && wlc->mpc_delay_off) { wlc->mpc_delay_off = wlc->mpc_dlycnt; } - wlc->prev_non_delay_mpc = wlc_is_non_delay_mpc(wlc); + wlc->prev_non_delay_mpc = brcms_c_is_non_delay_mpc(wlc); } /* * centralized radio disable/enable function, * invoke radio enable/disable after updating hwradio status */ -static void wlc_radio_upd(struct wlc_info *wlc) +static void brcms_c_radio_upd(struct brcms_c_info *wlc) { if (wlc->pub->radio_disabled) { - wlc_radio_disable(wlc); + brcms_c_radio_disable(wlc); } else { - wlc_radio_enable(wlc); + brcms_c_radio_enable(wlc); } } /* maintain LED behavior in down state */ -static void wlc_down_led_upd(struct wlc_info *wlc) +static void brcms_c_down_led_upd(struct brcms_c_info *wlc) { /* maintain LEDs while in down state, turn on sbclk if not available yet */ /* turn on sbclk if necessary */ if (!AP_ENAB(wlc->pub)) { - wlc_pllreq(wlc, true, WLC_PLLREQ_FLIP); + brcms_c_pllreq(wlc, true, BRCMS_PLLREQ_FLIP); - wlc_pllreq(wlc, false, WLC_PLLREQ_FLIP); + brcms_c_pllreq(wlc, false, BRCMS_PLLREQ_FLIP); } } /* update hwradio status and return it */ -bool wlc_check_radio_disabled(struct wlc_info *wlc) +bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc) { - wlc_radio_hwdisable_upd(wlc); + brcms_c_radio_hwdisable_upd(wlc); return mboolisset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE) ? true : false; } -void wlc_radio_disable(struct wlc_info *wlc) +void brcms_c_radio_disable(struct brcms_c_info *wlc) { if (!wlc->pub->up) { - wlc_down_led_upd(wlc); + brcms_c_down_led_upd(wlc); return; } - wlc_radio_monitor_start(wlc); - wl_down(wlc->wl); + brcms_c_radio_monitor_start(wlc); + brcms_down(wlc->wl); } -static void wlc_radio_enable(struct wlc_info *wlc) +static void brcms_c_radio_enable(struct brcms_c_info *wlc) { if (wlc->pub->up) return; @@ -2130,71 +1887,63 @@ static void wlc_radio_enable(struct wlc_info *wlc) if (DEVICEREMOVED(wlc)) return; - if (!wlc->down_override) { /* imposed by wl down/out ioctl */ - wl_up(wlc->wl); - } + brcms_up(wlc->wl); } /* periodical query hw radio button while driver is "down" */ -static void wlc_radio_timer(void *arg) +static void brcms_c_radio_timer(void *arg) { - struct wlc_info *wlc = (struct wlc_info *) arg; + struct brcms_c_info *wlc = (struct brcms_c_info *) arg; if (DEVICEREMOVED(wlc)) { wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } /* cap mpc off count */ - if (wlc->mpc_offcnt < WLC_MPC_MAX_DELAYCNT) + if (wlc->mpc_offcnt < BRCMS_MPC_MAX_DELAYCNT) wlc->mpc_offcnt++; - wlc_radio_hwdisable_upd(wlc); - wlc_radio_upd(wlc); + brcms_c_radio_hwdisable_upd(wlc); + brcms_c_radio_upd(wlc); } -static bool wlc_radio_monitor_start(struct wlc_info *wlc) +static bool brcms_c_radio_monitor_start(struct brcms_c_info *wlc) { /* Don't start the timer if HWRADIO feature is disabled */ if (wlc->radio_monitor || (wlc->pub->wlfeatureflag & WL_SWFL_NOHWRADIO)) return true; wlc->radio_monitor = true; - wlc_pllreq(wlc, true, WLC_PLLREQ_RADIO_MON); - wl_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, true); + brcms_c_pllreq(wlc, true, BRCMS_PLLREQ_RADIO_MON); + brcms_add_timer(wlc->wl, wlc->radio_timer, TIMER_INTERVAL_RADIOCHK, + true); return true; } -bool wlc_radio_monitor_stop(struct wlc_info *wlc) +bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc) { if (!wlc->radio_monitor) return true; wlc->radio_monitor = false; - wlc_pllreq(wlc, false, WLC_PLLREQ_RADIO_MON); - return wl_del_timer(wlc->wl, wlc->radio_timer); + brcms_c_pllreq(wlc, false, BRCMS_PLLREQ_RADIO_MON); + return brcms_del_timer(wlc->wl, wlc->radio_timer); } -static void wlc_watchdog_by_timer(void *arg) +static void brcms_c_watchdog_by_timer(void *arg) { - struct wlc_info *wlc = (struct wlc_info *) arg; - wlc_watchdog(arg); - if (WLC_WATCHDOG_TBTT(wlc)) { - /* set to normal osl watchdog period */ - wl_del_timer(wlc->wl, wlc->wdtimer); - wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, - true); - } + brcms_c_watchdog(arg); } /* common watchdog code */ -static void wlc_watchdog(void *arg) +static void brcms_c_watchdog(void *arg) { - struct wlc_info *wlc = (struct wlc_info *) arg; + struct brcms_c_info *wlc = (struct brcms_c_info *) arg; int i; - struct wlc_bsscfg *cfg; + struct brcms_bss_cfg *cfg; BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); @@ -2204,7 +1953,7 @@ static void wlc_watchdog(void *arg) if (DEVICEREMOVED(wlc)) { wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return; } @@ -2216,26 +1965,26 @@ static void wlc_watchdog(void *arg) if (--wlc->mpc_delay_off == 0) { mboolset(wlc->pub->radio_disabled, WL_RADIO_MPC_DISABLE); - if (wlc->mpc && wlc_ismpc(wlc)) + if (wlc->mpc && brcms_c_ismpc(wlc)) wlc->mpc_offcnt = 0; wlc->mpc_laston_ts = OSL_SYSUPTIME(); } } /* mpc sync */ - wlc_radio_mpc_upd(wlc); + brcms_c_radio_mpc_upd(wlc); /* radio sync: sw/hw/mpc --> radio_disable/radio_enable */ - wlc_radio_hwdisable_upd(wlc); - wlc_radio_upd(wlc); + brcms_c_radio_hwdisable_upd(wlc); + brcms_c_radio_upd(wlc); /* if radio is disable, driver may be down, quit here */ if (wlc->pub->radio_disabled) return; - wlc_bmac_watchdog(wlc); + brcms_b_watchdog(wlc); /* occasionally sample mac stat counters to detect 16-bit counter wrap */ if ((wlc->pub->now % SW_TIMER_MAC_STAT_UPD) == 0) - wlc_statsupd(wlc); + brcms_c_statsupd(wlc); /* Manage TKIP countermeasures timers */ FOREACH_BSS(wlc, i, cfg) { @@ -2248,21 +1997,21 @@ static void wlc_watchdog(void *arg) } /* Call any registered watchdog handlers */ - for (i = 0; i < WLC_MAXMODULES; i++) { + for (i = 0; i < BRCMS_MAXMODULES; i++) { if (wlc->modulecb[i].watchdog_fn) wlc->modulecb[i].watchdog_fn(wlc->modulecb[i].hdl); } - if (WLCISNPHY(wlc->band) && !wlc->pub->tempsense_disable && + if (BRCMS_ISNPHY(wlc->band) && !wlc->pub->tempsense_disable && ((wlc->pub->now - wlc->tempsense_lasttime) >= - WLC_TEMPSENSE_PERIOD)) { + BRCMS_TEMPSENSE_PERIOD)) { wlc->tempsense_lasttime = wlc->pub->now; - wlc_tempsense_upd(wlc); + brcms_c_tempsense_upd(wlc); } } /* make interface operational */ -int wlc_up(struct wlc_info *wlc) +int brcms_c_up(struct brcms_c_info *wlc) { BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); @@ -2271,7 +2020,7 @@ int wlc_up(struct wlc_info *wlc) return -ENOMEDIUM; if (!wlc->pub->hw_up) { - wlc_bmac_hw_up(wlc->hw); + brcms_b_hw_up(wlc->hw); wlc->pub->hw_up = true; } @@ -2279,11 +2028,11 @@ int wlc_up(struct wlc_info *wlc) && (wlc->pub->sih->chip == BCM4313_CHIP_ID)) { if (wlc->pub->boardrev >= 0x1250 && (wlc->pub->boardflags & BFL_FEM_BT)) { - wlc_mhf(wlc, MHF5, MHF5_4313_GPIOCTRL, - MHF5_4313_GPIOCTRL, WLC_BAND_ALL); + brcms_c_mhf(wlc, MHF5, MHF5_4313_GPIOCTRL, + MHF5_4313_GPIOCTRL, BRCM_BAND_ALL); } else { - wlc_mhf(wlc, MHF4, MHF4_EXTPA_ENABLE, MHF4_EXTPA_ENABLE, - WLC_BAND_ALL); + brcms_c_mhf(wlc, MHF4, MHF4_EXTPA_ENABLE, + MHF4_EXTPA_ENABLE, BRCM_BAND_ALL); } } @@ -2291,17 +2040,17 @@ int wlc_up(struct wlc_info *wlc) * Need to read the hwradio status here to cover the case where the system * is loaded with the hw radio disabled. We do not want to bring the driver up in this case. * if radio is disabled, abort up, lower power, start radio timer and return 0(for NDIS) - * don't call radio_update to avoid looping wlc_up. + * don't call radio_update to avoid looping brcms_c_up. * - * wlc_bmac_up_prep() returns either 0 or -BCME_RADIOOFF only + * brcms_b_up_prep() returns either 0 or -BCME_RADIOOFF only */ if (!wlc->pub->radio_disabled) { - int status = wlc_bmac_up_prep(wlc->hw); + int status = brcms_b_up_prep(wlc->hw); if (status == -ENOMEDIUM) { if (!mboolisset (wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE)) { int idx; - struct wlc_bsscfg *bsscfg; + struct brcms_bss_cfg *bsscfg; mboolset(wlc->pub->radio_disabled, WL_RADIO_HW_DISABLE); @@ -2309,9 +2058,9 @@ int wlc_up(struct wlc_info *wlc) if (!BSSCFG_STA(bsscfg) || !bsscfg->enable || !bsscfg->BSS) continue; - wiphy_err(wlc->wiphy, "wl%d.%d: wlc_up" + wiphy_err(wlc->wiphy, "wl%d.%d: up" ": rfdisable -> " - "wlc_bsscfg_disable()\n", + "bsscfg_disable()\n", wlc->pub->unit, idx); } } @@ -2319,78 +2068,78 @@ int wlc_up(struct wlc_info *wlc) } if (wlc->pub->radio_disabled) { - wlc_radio_monitor_start(wlc); + brcms_c_radio_monitor_start(wlc); return 0; } - /* wlc_bmac_up_prep has done wlc_corereset(). so clk is on, set it */ + /* brcms_b_up_prep has done brcms_c_corereset(). so clk is on, set it */ wlc->clk = true; - wlc_radio_monitor_stop(wlc); + brcms_c_radio_monitor_stop(wlc); /* Set EDCF hostflags */ if (EDCF_ENAB(wlc->pub)) { - wlc_mhf(wlc, MHF1, MHF1_EDCF, MHF1_EDCF, WLC_BAND_ALL); + brcms_c_mhf(wlc, MHF1, MHF1_EDCF, MHF1_EDCF, BRCM_BAND_ALL); } else { - wlc_mhf(wlc, MHF1, MHF1_EDCF, 0, WLC_BAND_ALL); + brcms_c_mhf(wlc, MHF1, MHF1_EDCF, 0, BRCM_BAND_ALL); } - if (WLC_WAR16165(wlc)) - wlc_mhf(wlc, MHF2, MHF2_PCISLOWCLKWAR, MHF2_PCISLOWCLKWAR, - WLC_BAND_ALL); + if (BRCMS_WAR16165(wlc)) + brcms_c_mhf(wlc, MHF2, MHF2_PCISLOWCLKWAR, MHF2_PCISLOWCLKWAR, + BRCM_BAND_ALL); - wl_init(wlc->wl); + brcms_init(wlc->wl); wlc->pub->up = true; if (wlc->bandinit_pending) { - wlc_suspend_mac_and_wait(wlc); - wlc_set_chanspec(wlc, wlc->default_bss->chanspec); + brcms_c_suspend_mac_and_wait(wlc); + brcms_c_set_chanspec(wlc, wlc->default_bss->chanspec); wlc->bandinit_pending = false; - wlc_enable_mac(wlc); + brcms_c_enable_mac(wlc); } - wlc_bmac_up_finish(wlc->hw); + brcms_b_up_finish(wlc->hw); /* other software states up after ISR is running */ /* start APs that were to be brought up but are not up yet */ - /* if (AP_ENAB(wlc->pub)) wlc_restart_ap(wlc->ap); */ + /* if (AP_ENAB(wlc->pub)) brcms_c_restart_ap(wlc->ap); */ /* Program the TX wme params with the current settings */ - wlc_wme_retries_write(wlc); + brcms_c_wme_retries_write(wlc); /* start one second watchdog timer */ - wl_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true); + brcms_add_timer(wlc->wl, wlc->wdtimer, TIMER_INTERVAL_WATCHDOG, true); wlc->WDarmed = true; /* ensure antenna config is up to date */ - wlc_stf_phy_txant_upd(wlc); + brcms_c_stf_phy_txant_upd(wlc); /* ensure LDPC config is in sync */ - wlc_ht_update_ldpc(wlc, wlc->stf->ldpc); + brcms_c_ht_update_ldpc(wlc, wlc->stf->ldpc); return 0; } /* Initialize the base precedence map for dequeueing from txq based on WME settings */ -static void wlc_tx_prec_map_init(struct wlc_info *wlc) +static void brcms_c_tx_prec_map_init(struct brcms_c_info *wlc) { - wlc->tx_prec_map = WLC_PREC_BMP_ALL; + wlc->tx_prec_map = BRCMS_PREC_BMP_ALL; memset(wlc->fifo2prec_map, 0, NFIFO * sizeof(u16)); /* For non-WME, both fifos have overlapping MAXPRIO. So just disable all precedences * if either is full. */ if (!EDCF_ENAB(wlc->pub)) { - wlc->fifo2prec_map[TX_DATA_FIFO] = WLC_PREC_BMP_ALL; - wlc->fifo2prec_map[TX_CTL_FIFO] = WLC_PREC_BMP_ALL; + wlc->fifo2prec_map[TX_DATA_FIFO] = BRCMS_PREC_BMP_ALL; + wlc->fifo2prec_map[TX_CTL_FIFO] = BRCMS_PREC_BMP_ALL; } else { - wlc->fifo2prec_map[TX_AC_BK_FIFO] = WLC_PREC_BMP_AC_BK; - wlc->fifo2prec_map[TX_AC_BE_FIFO] = WLC_PREC_BMP_AC_BE; - wlc->fifo2prec_map[TX_AC_VI_FIFO] = WLC_PREC_BMP_AC_VI; - wlc->fifo2prec_map[TX_AC_VO_FIFO] = WLC_PREC_BMP_AC_VO; + wlc->fifo2prec_map[TX_AC_BK_FIFO] = BRCMS_PREC_BMP_AC_BK; + wlc->fifo2prec_map[TX_AC_BE_FIFO] = BRCMS_PREC_BMP_AC_BE; + wlc->fifo2prec_map[TX_AC_VI_FIFO] = BRCMS_PREC_BMP_AC_VI; + wlc->fifo2prec_map[TX_AC_VO_FIFO] = BRCMS_PREC_BMP_AC_VO; } } -static uint wlc_down_del_timer(struct wlc_info *wlc) +static uint brcms_c_down_del_timer(struct brcms_c_info *wlc) { uint callbacks = 0; @@ -2402,13 +2151,13 @@ static uint wlc_down_del_timer(struct wlc_info *wlc) * disable the hardware, free any transient buffer state. * Return a count of the number of driver callbacks still pending. */ -uint wlc_down(struct wlc_info *wlc) +uint brcms_c_down(struct brcms_c_info *wlc) { uint callbacks = 0; int i; bool dev_gone = false; - struct wlc_txq_info *qi; + struct brcms_txq_info *qi; BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); @@ -2424,12 +2173,12 @@ uint wlc_down(struct wlc_info *wlc) /* in between, mpc could try to bring down again.. */ wlc->going_down = true; - callbacks += wlc_bmac_down_prep(wlc->hw); + callbacks += brcms_b_bmac_down_prep(wlc->hw); dev_gone = DEVICEREMOVED(wlc); /* Call any registered down handlers */ - for (i = 0; i < WLC_MAXMODULES; i++) { + for (i = 0; i < BRCMS_MAXMODULES; i++) { if (wlc->modulecb[i].down_fn) callbacks += wlc->modulecb[i].down_fn(wlc->modulecb[i].hdl); @@ -2437,28 +2186,28 @@ uint wlc_down(struct wlc_info *wlc) /* cancel the watchdog timer */ if (wlc->WDarmed) { - if (!wl_del_timer(wlc->wl, wlc->wdtimer)) + if (!brcms_del_timer(wlc->wl, wlc->wdtimer)) callbacks++; wlc->WDarmed = false; } /* cancel all other timers */ - callbacks += wlc_down_del_timer(wlc); + callbacks += brcms_c_down_del_timer(wlc); wlc->pub->up = false; wlc_phy_mute_upd(wlc->band->pi, false, PHY_MUTE_ALL); /* clear txq flow control */ - wlc_txflowcontrol_reset(wlc); + brcms_c_txflowcontrol_reset(wlc); /* flush tx queues */ for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { - bcm_pktq_flush(&qi->q, true, NULL, NULL); + brcmu_pktq_flush(&qi->q, true, NULL, NULL); } - callbacks += wlc_bmac_down_finish(wlc->hw); + callbacks += brcms_b_down_finish(wlc->hw); - /* wlc_bmac_down_finish has done wlc_coredisable(). so clk is off */ + /* brcms_b_down_finish has done brcms_c_coredisable(). so clk is off */ wlc->clk = false; wlc->going_down = false; @@ -2466,22 +2215,23 @@ uint wlc_down(struct wlc_info *wlc) } /* Set the current gmode configuration */ -int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) +int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config) { int ret = 0; uint i; wlc_rateset_t rs; /* Default to 54g Auto */ - s8 shortslot = WLC_SHORTSLOT_AUTO; /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */ + /* Advertise and use shortslot (-1/0/1 Auto/Off/On) */ + s8 shortslot = BRCMS_SHORTSLOT_AUTO; bool shortslot_restrict = false; /* Restrict association to stations that support shortslot */ - bool ignore_bcns = true; /* Ignore legacy beacons on the same channel */ bool ofdm_basic = false; /* Make 6, 12, and 24 basic rates */ - int preamble = WLC_PLCP_LONG; /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */ + /* Advertise and use short preambles (-1/0/1 Auto/Off/On) */ + int preamble = BRCMS_PLCP_LONG; bool preamble_restrict = false; /* Restrict association to stations that support short * preambles */ - struct wlcband *band; + struct brcms_band *band; /* if N-support is enabled, allow Gmode set as long as requested * Gmode is not GMODE_LEGACY_B @@ -2490,22 +2240,22 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) return -ENOTSUPP; /* verify that we are dealing with 2G band and grab the band pointer */ - if (wlc->band->bandtype == WLC_BAND_2G) + if (wlc->band->bandtype == BRCM_BAND_2G) band = wlc->band; else if ((NBANDS(wlc) > 1) && - (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == WLC_BAND_2G)) + (wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype == BRCM_BAND_2G)) band = wlc->bandstate[OTHERBANDUNIT(wlc)]; else return -EINVAL; /* Legacy or bust when no OFDM is supported by regulatory */ - if ((wlc_channel_locale_flags_in_band(wlc->cmi, band->bandunit) & - WLC_NO_OFDM) && (gmode != GMODE_LEGACY_B)) + if ((brcms_c_channel_locale_flags_in_band(wlc->cmi, band->bandunit) & + BRCMS_NO_OFDM) && (gmode != GMODE_LEGACY_B)) return -EINVAL; /* update configuration value */ if (config == true) - wlc_protection_upd(wlc, WLC_PROT_G_USER, gmode); + brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode); /* Clear supported rates filter */ memset(&wlc->sup_rates_override, 0, sizeof(wlc_rateset_t)); @@ -2515,14 +2265,15 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) switch (gmode) { case GMODE_LEGACY_B: - shortslot = WLC_SHORTSLOT_OFF; - wlc_rateset_copy(&gphy_legacy_rates, &rs); + shortslot = BRCMS_SHORTSLOT_OFF; + brcms_c_rateset_copy(&gphy_legacy_rates, &rs); break; case GMODE_LRS: if (AP_ENAB(wlc->pub)) - wlc_rateset_copy(&cck_rates, &wlc->sup_rates_override); + brcms_c_rateset_copy(&cck_rates, + &wlc->sup_rates_override); break; case GMODE_AUTO: @@ -2531,19 +2282,19 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) case GMODE_ONLY: ofdm_basic = true; - preamble = WLC_PLCP_SHORT; + preamble = BRCMS_PLCP_SHORT; preamble_restrict = true; break; case GMODE_PERFORMANCE: if (AP_ENAB(wlc->pub)) /* Put all rates into the Supported Rates element */ - wlc_rateset_copy(&cck_ofdm_rates, + brcms_c_rateset_copy(&cck_ofdm_rates, &wlc->sup_rates_override); - shortslot = WLC_SHORTSLOT_ON; + shortslot = BRCMS_SHORTSLOT_ON; shortslot_restrict = true; ofdm_basic = true; - preamble = WLC_PLCP_SHORT; + preamble = BRCMS_PLCP_SHORT; preamble_restrict = true; break; @@ -2562,7 +2313,7 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) band->gmode = gmode; if (band->rspec_override && !IS_CCK(band->rspec_override)) { band->rspec_override = 0; - wlc_reprate_init(wlc); + brcms_c_reprate_init(wlc); } if (band->mrspec_override && !IS_CCK(band->mrspec_override)) { band->mrspec_override = 0; @@ -2571,26 +2322,24 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) band->gmode = gmode; - wlc->ignore_bcns = ignore_bcns; - wlc->shortslot_override = shortslot; if (AP_ENAB(wlc->pub)) { /* wlc->ap->shortslot_restrict = shortslot_restrict; */ wlc->PLCPHdr_override = (preamble != - WLC_PLCP_LONG) ? WLC_PLCP_SHORT : WLC_PLCP_AUTO; + BRCMS_PLCP_LONG) ? BRCMS_PLCP_SHORT : BRCMS_PLCP_AUTO; } - if ((AP_ENAB(wlc->pub) && preamble != WLC_PLCP_LONG) - || preamble == WLC_PLCP_SHORT) + if ((AP_ENAB(wlc->pub) && preamble != BRCMS_PLCP_LONG) + || preamble == BRCMS_PLCP_SHORT) wlc->default_bss->capability |= WLAN_CAPABILITY_SHORT_PREAMBLE; else wlc->default_bss->capability &= ~WLAN_CAPABILITY_SHORT_PREAMBLE; /* Update shortslot capability bit for AP and IBSS */ - if ((AP_ENAB(wlc->pub) && shortslot == WLC_SHORTSLOT_AUTO) || - shortslot == WLC_SHORTSLOT_ON) + if ((AP_ENAB(wlc->pub) && shortslot == BRCMS_SHORTSLOT_AUTO) || + shortslot == BRCMS_SHORTSLOT_ON) wlc->default_bss->capability |= WLAN_CAPABILITY_SHORT_SLOT_TIME; else wlc->default_bss->capability &= @@ -2598,26 +2347,26 @@ int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config) /* Use the default 11g rateset */ if (!rs.count) - wlc_rateset_copy(&cck_ofdm_rates, &rs); + brcms_c_rateset_copy(&cck_ofdm_rates, &rs); if (ofdm_basic) { for (i = 0; i < rs.count; i++) { - if (rs.rates[i] == WLC_RATE_6M - || rs.rates[i] == WLC_RATE_12M - || rs.rates[i] == WLC_RATE_24M) - rs.rates[i] |= WLC_RATE_FLAG; + if (rs.rates[i] == BRCM_RATE_6M + || rs.rates[i] == BRCM_RATE_12M + || rs.rates[i] == BRCM_RATE_24M) + rs.rates[i] |= BRCMS_RATE_FLAG; } } /* Set default bss rateset */ wlc->default_bss->rateset.count = rs.count; - memcpy(wlc->default_bss->rateset.rates, rs.rates, + memcpy(wlc->default_bss->rateset.rates, rs.rates, sizeof(wlc->default_bss->rateset.rates)); return ret; } -static int wlc_nmode_validate(struct wlc_info *wlc, s32 nmode) +static int brcms_c_nmode_validate(struct brcms_c_info *wlc, s32 nmode) { int err = 0; @@ -2629,7 +2378,7 @@ static int wlc_nmode_validate(struct wlc_info *wlc, s32 nmode) case AUTO: case WL_11N_2x2: case WL_11N_3x3: - if (!(WLC_PHY_11N_CAP(wlc->band))) + if (!(BRCMS_PHY_11N_CAP(wlc->band))) err = -EINVAL; break; @@ -2641,27 +2390,27 @@ static int wlc_nmode_validate(struct wlc_info *wlc, s32 nmode) return err; } -int wlc_set_nmode(struct wlc_info *wlc, s32 nmode) +int brcms_c_set_nmode(struct brcms_c_info *wlc, s32 nmode) { uint i; int err; - err = wlc_nmode_validate(wlc, nmode); + err = brcms_c_nmode_validate(wlc, nmode); if (err) return err; switch (nmode) { case OFF: wlc->pub->_n_enab = OFF; - wlc->default_bss->flags &= ~WLC_BSS_HT; + wlc->default_bss->flags &= ~BRCMS_BSS_HT; /* delete the mcs rates from the default and hw ratesets */ - wlc_rateset_mcs_clear(&wlc->default_bss->rateset); + brcms_c_rateset_mcs_clear(&wlc->default_bss->rateset); for (i = 0; i < NBANDS(wlc); i++) { memset(wlc->bandstate[i]->hw_rateset.mcs, 0, MCSSET_LEN); if (IS_MCS(wlc->band->rspec_override)) { wlc->bandstate[i]->rspec_override = 0; - wlc_reprate_init(wlc); + brcms_c_reprate_init(wlc); } if (IS_MCS(wlc->band->mrspec_override)) wlc->bandstate[i]->mrspec_override = 0; @@ -2676,14 +2425,14 @@ int wlc_set_nmode(struct wlc_info *wlc, s32 nmode) case WL_11N_2x2: case WL_11N_3x3: /* force GMODE_AUTO if NMODE is ON */ - wlc_set_gmode(wlc, GMODE_AUTO, true); + brcms_c_set_gmode(wlc, GMODE_AUTO, true); if (nmode == WL_11N_3x3) wlc->pub->_n_enab = SUPPORT_HT; else wlc->pub->_n_enab = SUPPORT_11N; - wlc->default_bss->flags |= WLC_BSS_HT; + wlc->default_bss->flags |= BRCMS_BSS_HT; /* add the mcs rates to the default and hw ratesets */ - wlc_rateset_mcs_build(&wlc->default_bss->rateset, + brcms_c_rateset_mcs_build(&wlc->default_bss->rateset, wlc->stf->txstreams); for (i = 0; i < NBANDS(wlc); i++) memcpy(wlc->bandstate[i]->hw_rateset.mcs, @@ -2697,7 +2446,7 @@ int wlc_set_nmode(struct wlc_info *wlc, s32 nmode) return err; } -static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg) +static int brcms_c_set_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs_arg) { wlc_rateset_t rs, new; uint bandunit; @@ -2705,13 +2454,13 @@ static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg) memcpy(&rs, rs_arg, sizeof(wlc_rateset_t)); /* check for bad count value */ - if ((rs.count == 0) || (rs.count > WLC_NUMRATES)) + if ((rs.count == 0) || (rs.count > BRCMS_NUMRATES)) return -EINVAL; /* try the current band */ bandunit = wlc->band->bandunit; memcpy(&new, &rs, sizeof(wlc_rateset_t)); - if (wlc_rate_hwrs_filter_sort_validate + if (brcms_c_rate_hwrs_filter_sort_validate (&new, &wlc->bandstate[bandunit]->hw_rateset, true, wlc->stf->txstreams)) goto good; @@ -2720,7 +2469,7 @@ static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg) if (IS_MBAND_UNLOCKED(wlc)) { bandunit = OTHERBANDUNIT(wlc); memcpy(&new, &rs, sizeof(wlc_rateset_t)); - if (wlc_rate_hwrs_filter_sort_validate(&new, + if (brcms_c_rate_hwrs_filter_sort_validate(&new, &wlc-> bandstate[bandunit]-> hw_rateset, true, @@ -2739,18 +2488,18 @@ static int wlc_set_rateset(struct wlc_info *wlc, wlc_rateset_t *rs_arg) } /* simplified integer set interface for common ioctl handler */ -int wlc_set(struct wlc_info *wlc, int cmd, int arg) +int brcms_c_set(struct brcms_c_info *wlc, int cmd, int arg) { - return wlc_ioctl(wlc, cmd, (void *)&arg, sizeof(arg), NULL); + return brcms_c_ioctl(wlc, cmd, (void *)&arg, sizeof(arg), NULL); } /* simplified integer get interface for common ioctl handler */ -int wlc_get(struct wlc_info *wlc, int cmd, int *arg) +int brcms_c_get(struct brcms_c_info *wlc, int cmd, int *arg) { - return wlc_ioctl(wlc, cmd, arg, sizeof(int), NULL); + return brcms_c_ioctl(wlc, cmd, arg, sizeof(int), NULL); } -static void wlc_ofdm_rateset_war(struct wlc_info *wlc) +static void brcms_c_ofdm_rateset_war(struct brcms_c_info *wlc) { u8 r; bool war = false; @@ -2766,28 +2515,25 @@ static void wlc_ofdm_rateset_war(struct wlc_info *wlc) } int -wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, - struct wlc_if *wlcif) +brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, + struct brcms_c_if *wlcif) { - return _wlc_ioctl(wlc, cmd, arg, len, wlcif); + return _brcms_c_ioctl(wlc, cmd, arg, len, wlcif); } /* common ioctl handler. return: 0=ok, -1=error, positive=particular error */ static int -_wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, - struct wlc_if *wlcif) +_brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, + struct brcms_c_if *wlcif) { int val, *pval; bool bool_val; int bcmerror; - d11regs_t *regs; - uint i; struct scb *nextscb; bool ta_ok; uint band; - rw_reg_t *r; - struct wlc_bsscfg *bsscfg; - wlc_bss_info_t *current_bss; + struct brcms_bss_cfg *bsscfg; + struct brcms_bss_info *current_bss; /* update bsscfg pointer */ bsscfg = wlc->cfg; @@ -2797,18 +2543,17 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, nextscb = NULL; ta_ok = false; band = 0; - r = NULL; /* If the device is turned off, then it's not "removed" */ if (!wlc->pub->hw_off && DEVICEREMOVED(wlc)) { wiphy_err(wlc->wiphy, "wl%d: %s: dead chip\n", wlc->pub->unit, __func__); - wl_down(wlc->wl); + brcms_down(wlc->wl); return -EBADE; } /* default argument is generic integer */ - pval = arg ? (int *)arg:NULL; + pval = arg ? (int *)arg : NULL; /* This will prevent the misaligned access */ if (pval && (u32) len >= sizeof(val)) @@ -2819,64 +2564,17 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, /* bool conversion to avoid duplication below */ bool_val = val != 0; bcmerror = 0; - regs = wlc->regs; - - /* A few commands don't need any arguments; all the others do. */ - switch (cmd) { - case WLC_UP: - case WLC_OUT: - case WLC_DOWN: - case WLC_DISASSOC: - case WLC_RESTART: - case WLC_REBOOT: - case WLC_START_CHANNEL_QA: - case WLC_INIT: - break; - default: - if ((arg == NULL) || (len <= 0)) { - wiphy_err(wlc->wiphy, "wl%d: %s: Command %d needs " - "arguments\n", - wlc->pub->unit, __func__, cmd); - bcmerror = -EINVAL; - goto done; - } + if ((arg == NULL) || (len <= 0)) { + wiphy_err(wlc->wiphy, "wl%d: %s: Command %d needs arguments\n", + wlc->pub->unit, __func__, cmd); + bcmerror = -EINVAL; + goto done; } switch (cmd) { -#if defined(BCMDBG) - case WLC_GET_MSGLEVEL: - *pval = wl_msg_level; - break; - - case WLC_SET_MSGLEVEL: - wl_msg_level = val; - break; -#endif - - case WLC_GET_INSTANCE: - *pval = wlc->pub->unit; - break; - - case WLC_GET_CHANNEL:{ - channel_info_t *ci = (channel_info_t *) arg; - - if (len <= (int)sizeof(ci)) { - bcmerror = EOVERFLOW; - goto done; - } - - ci->hw_channel = - CHSPEC_CHANNEL(WLC_BAND_PI_RADIO_CHANSPEC); - ci->target_channel = - CHSPEC_CHANNEL(wlc->default_bss->chanspec); - ci->scan_channel = 0; - - break; - } - - case WLC_SET_CHANNEL:{ + case BRCM_SET_CHANNEL:{ chanspec_t chspec = CH20MHZ_CHSPEC(val); if (val < 0 || val > MAXCHANNEL) { @@ -2884,486 +2582,63 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; } - if (!wlc_valid_chanspec_db(wlc->cmi, chspec)) { + if (!brcms_c_valid_chanspec_db(wlc->cmi, chspec)) { bcmerror = -EINVAL; break; } if (!wlc->pub->up && IS_MBAND_UNLOCKED(wlc)) { if (wlc->band->bandunit != - CHSPEC_WLCBANDUNIT(chspec)) + CHSPEC_BANDUNIT(chspec)) wlc->bandinit_pending = true; else wlc->bandinit_pending = false; } wlc->default_bss->chanspec = chspec; - /* wlc_BSSinit() will sanitize the rateset before using it.. */ + /* brcms_c_BSSinit() will sanitize the rateset before + * using it.. */ if (wlc->pub->up && - (WLC_BAND_PI_RADIO_CHANSPEC != chspec)) { - wlc_set_home_chanspec(wlc, chspec); - wlc_suspend_mac_and_wait(wlc); - wlc_set_chanspec(wlc, chspec); - wlc_enable_mac(wlc); - } - break; - } - -#if defined(BCMDBG) - case WLC_GET_UCFLAGS: - if (!wlc->pub->up) { - bcmerror = -ENOLINK; - break; - } - - /* optional band is stored in the second integer of incoming buffer */ - band = - (len < - (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1]; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if (val >= MHFMAX) { - bcmerror = -EINVAL; - break; - } - - *pval = wlc_bmac_mhf_get(wlc->hw, (u8) val, WLC_BAND_AUTO); - break; - - case WLC_SET_UCFLAGS: - if (!wlc->pub->up) { - bcmerror = -ENOLINK; - break; - } - - /* optional band is stored in the second integer of incoming buffer */ - band = - (len < - (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1]; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - i = (u16) val; - if (i >= MHFMAX) { - bcmerror = -EINVAL; - break; - } - - wlc_mhf(wlc, (u8) i, 0xffff, (u16) (val >> NBITS(u16)), - WLC_BAND_AUTO); - break; - - case WLC_GET_SHMEM: - ta_ok = true; - - /* optional band is stored in the second integer of incoming buffer */ - band = - (len < - (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1]; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if (val & 1) { - bcmerror = -EINVAL; - break; - } - - *pval = wlc_read_shm(wlc, (u16) val); - break; - - case WLC_SET_SHMEM: - ta_ok = true; - - /* optional band is stored in the second integer of incoming buffer */ - band = - (len < - (int)(2 * sizeof(int))) ? WLC_BAND_AUTO : ((int *)arg)[1]; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if (val & 1) { - bcmerror = -EINVAL; - break; - } - - wlc_write_shm(wlc, (u16) val, - (u16) (val >> NBITS(u16))); - break; - - case WLC_R_REG: /* MAC registers */ - ta_ok = true; - r = (rw_reg_t *) arg; - band = WLC_BAND_AUTO; - - if (len < (int)(sizeof(rw_reg_t) - sizeof(uint))) { - bcmerror = -EOVERFLOW; - break; - } - - if (len >= (int)sizeof(rw_reg_t)) - band = r->band; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if ((r->byteoff + r->size) > sizeof(d11regs_t)) { - bcmerror = -EINVAL; - break; - } - if (r->size == sizeof(u32)) - r->val = - R_REG((u32 *)((unsigned char *)(unsigned long)regs + - r->byteoff)); - else if (r->size == sizeof(u16)) - r->val = - R_REG((u16 *)((unsigned char *)(unsigned long)regs + - r->byteoff)); - else - bcmerror = -EINVAL; - break; - - case WLC_W_REG: - ta_ok = true; - r = (rw_reg_t *) arg; - band = WLC_BAND_AUTO; - - if (len < (int)(sizeof(rw_reg_t) - sizeof(uint))) { - bcmerror = -EOVERFLOW; - break; - } - - if (len >= (int)sizeof(rw_reg_t)) - band = r->band; - - /* bcmerror checking */ - bcmerror = wlc_iocregchk(wlc, band); - if (bcmerror) - break; - - if (r->byteoff + r->size > sizeof(d11regs_t)) { - bcmerror = -EINVAL; - break; - } - if (r->size == sizeof(u32)) - W_REG((u32 *)((unsigned char *)(unsigned long) regs + - r->byteoff), r->val); - else if (r->size == sizeof(u16)) - W_REG((u16 *)((unsigned char *)(unsigned long) regs + - r->byteoff), r->val); - else - bcmerror = -EINVAL; - break; -#endif /* BCMDBG */ - - case WLC_GET_TXANT: - *pval = wlc->stf->txant; - break; - - case WLC_SET_TXANT: - bcmerror = wlc_stf_ant_txant_validate(wlc, (s8) val); - if (bcmerror < 0) - break; - - wlc->stf->txant = (s8) val; - - /* if down, we are done */ - if (!wlc->pub->up) - break; - - wlc_suspend_mac_and_wait(wlc); - - wlc_stf_phy_txant_upd(wlc); - wlc_beacon_phytxctl_txant_upd(wlc, wlc->bcn_rspec); - - wlc_enable_mac(wlc); - - break; - - case WLC_GET_ANTDIV:{ - u8 phy_antdiv; - - /* return configured value if core is down */ - if (!wlc->pub->up) { - *pval = wlc->stf->ant_rx_ovr; - - } else { - if (wlc_phy_ant_rxdiv_get - (wlc->band->pi, &phy_antdiv)) - *pval = (int)phy_antdiv; - else - *pval = (int)wlc->stf->ant_rx_ovr; - } - - break; - } - case WLC_SET_ANTDIV: - /* values are -1=driver default, 0=force0, 1=force1, 2=start1, 3=start0 */ - if ((val < -1) || (val > 3)) { - bcmerror = -EINVAL; - break; - } - - if (val == -1) - val = ANT_RX_DIV_DEF; - - wlc->stf->ant_rx_ovr = (u8) val; - wlc_phy_ant_rxdiv_set(wlc->band->pi, (u8) val); - break; - - case WLC_GET_RX_ANT:{ /* get latest used rx antenna */ - u16 rxstatus; - - if (!wlc->pub->up) { - bcmerror = -ENOLINK; - break; - } - - rxstatus = R_REG(&wlc->regs->phyrxstatus0); - if (rxstatus == 0xdead || rxstatus == (u16) -1) { - bcmerror = -EBADE; - break; - } - *pval = (rxstatus & PRXS0_RXANT_UPSUBBAND) ? 1 : 0; - break; - } - -#if defined(BCMDBG) - case WLC_GET_UCANTDIV: - if (!wlc->clk) { - bcmerror = -EIO; - break; - } - - *pval = - (wlc_bmac_mhf_get(wlc->hw, MHF1, WLC_BAND_AUTO) & - MHF1_ANTDIV); - break; - - case WLC_SET_UCANTDIV:{ - if (!wlc->pub->up) { - bcmerror = -ENOLINK; - break; - } - - /* if multiband, band must be locked */ - if (IS_MBAND_UNLOCKED(wlc)) { - bcmerror = -ENOMEDIUM; - break; + (BRCMS_BAND_PI_RADIO_CHANSPEC != chspec)) { + brcms_c_set_home_chanspec(wlc, chspec); + brcms_c_suspend_mac_and_wait(wlc); + brcms_c_set_chanspec(wlc, chspec); + brcms_c_enable_mac(wlc); } - - wlc_mhf(wlc, MHF1, MHF1_ANTDIV, - (val ? MHF1_ANTDIV : 0), WLC_BAND_AUTO); break; } -#endif /* defined(BCMDBG) */ - case WLC_GET_SRL: - *pval = wlc->SRL; - break; - - case WLC_SET_SRL: + case BRCM_SET_SRL: if (val >= 1 && val <= RETRY_SHORT_MAX) { int ac; wlc->SRL = (u16) val; - wlc_bmac_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); + brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); for (ac = 0; ac < AC_COUNT; ac++) { - WLC_WME_RETRY_SHORT_SET(wlc, ac, wlc->SRL); + BRCMS_WME_RETRY_SHORT_SET(wlc, ac, wlc->SRL); } - wlc_wme_retries_write(wlc); + brcms_c_wme_retries_write(wlc); } else bcmerror = -EINVAL; break; - case WLC_GET_LRL: - *pval = wlc->LRL; - break; - - case WLC_SET_LRL: + case BRCM_SET_LRL: if (val >= 1 && val <= 255) { int ac; wlc->LRL = (u16) val; - wlc_bmac_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); + brcms_b_retrylimit_upd(wlc->hw, wlc->SRL, wlc->LRL); for (ac = 0; ac < AC_COUNT; ac++) { - WLC_WME_RETRY_LONG_SET(wlc, ac, wlc->LRL); - } - wlc_wme_retries_write(wlc); - } else - bcmerror = -EINVAL; - break; - - case WLC_GET_CWMIN: - *pval = wlc->band->CWmin; - break; - - case WLC_SET_CWMIN: - if (!wlc->clk) { - bcmerror = -EIO; - break; - } - - if (val >= 1 && val <= 255) { - wlc_set_cwmin(wlc, (u16) val); - } else - bcmerror = -EINVAL; - break; - - case WLC_GET_CWMAX: - *pval = wlc->band->CWmax; - break; - - case WLC_SET_CWMAX: - if (!wlc->clk) { - bcmerror = -EIO; - break; - } - - if (val >= 255 && val <= 2047) { - wlc_set_cwmax(wlc, (u16) val); - } else - bcmerror = -EINVAL; - break; - - case WLC_GET_RADIO: /* use mask if don't want to expose some internal bits */ - *pval = wlc->pub->radio_disabled; - break; - - case WLC_SET_RADIO:{ /* 32 bits input, higher 16 bits are mask, lower 16 bits are value to - * set - */ - u16 radiomask, radioval; - uint validbits = - WL_RADIO_SW_DISABLE | WL_RADIO_HW_DISABLE; - mbool new = 0; - - radiomask = (val & 0xffff0000) >> 16; - radioval = val & 0x0000ffff; - - if ((radiomask == 0) || (radiomask & ~validbits) - || (radioval & ~validbits) - || ((radioval & ~radiomask) != 0)) { - wiphy_err(wlc->wiphy, "SET_RADIO with wrong " - "bits 0x%x\n", val); - bcmerror = -EINVAL; - break; - } - - new = - (wlc->pub->radio_disabled & ~radiomask) | radioval; - wlc->pub->radio_disabled = new; - - wlc_radio_hwdisable_upd(wlc); - wlc_radio_upd(wlc); - break; - } - - case WLC_GET_PHYTYPE: - *pval = WLC_PHYTYPE(wlc->band->phytype); - break; - -#if defined(BCMDBG) - case WLC_GET_KEY: - if ((val >= 0) && (val < WLC_MAX_WSEC_KEYS(wlc))) { - wl_wsec_key_t key; - - wsec_key_t *src_key = wlc->wsec_keys[val]; - - if (len < (int)sizeof(key)) { - bcmerror = -EOVERFLOW; - break; - } - - memset((char *)&key, 0, sizeof(key)); - if (src_key) { - key.index = src_key->id; - key.len = src_key->len; - memcpy(key.data, src_key->data, key.len); - key.algo = src_key->algo; - if (WSEC_SOFTKEY(wlc, src_key, bsscfg)) - key.flags |= WL_SOFT_KEY; - if (src_key->flags & WSEC_PRIMARY_KEY) - key.flags |= WL_PRIMARY_KEY; - - memcpy(key.ea, src_key->ea, ETH_ALEN); + BRCMS_WME_RETRY_LONG_SET(wlc, ac, wlc->LRL); } - - memcpy(arg, &key, sizeof(key)); + brcms_c_wme_retries_write(wlc); } else bcmerror = -EINVAL; break; -#endif /* defined(BCMDBG) */ - - case WLC_SET_KEY: - bcmerror = - wlc_iovar_op(wlc, "wsec_key", NULL, 0, arg, len, IOV_SET, - wlcif); - break; - - case WLC_GET_KEY_SEQ:{ - wsec_key_t *key; - - if (len < DOT11_WPA_KEY_RSC_LEN) { - bcmerror = -EOVERFLOW; - break; - } - - /* Return the key's tx iv as an EAPOL sequence counter. - * This will be used to supply the RSC value to a supplicant. - * The format is 8 bytes, with least significant in seq[0]. - */ - - key = WSEC_KEY(wlc, val); - if ((val >= 0) && (val < WLC_MAX_WSEC_KEYS(wlc)) && - (key != NULL)) { - u8 seq[DOT11_WPA_KEY_RSC_LEN]; - u16 lo; - u32 hi; - /* group keys in WPA-NONE (IBSS only, AES and TKIP) use a global TXIV */ - if ((bsscfg->WPA_auth & WPA_AUTH_NONE) && - is_zero_ether_addr(key->ea)) { - lo = bsscfg->wpa_none_txiv.lo; - hi = bsscfg->wpa_none_txiv.hi; - } else { - lo = key->txiv.lo; - hi = key->txiv.hi; - } - - /* format the buffer, low to high */ - seq[0] = lo & 0xff; - seq[1] = (lo >> 8) & 0xff; - seq[2] = hi & 0xff; - seq[3] = (hi >> 8) & 0xff; - seq[4] = (hi >> 16) & 0xff; - seq[5] = (hi >> 24) & 0xff; - seq[6] = 0; - seq[7] = 0; - - memcpy(arg, seq, sizeof(seq)); - } else { - bcmerror = -EINVAL; - } - break; - } - case WLC_GET_CURR_RATESET:{ + case BRCM_GET_CURR_RATESET:{ wl_rateset_t *ret_rs = (wl_rateset_t *) arg; wlc_rateset_t *rs; @@ -3383,25 +2658,7 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; } - case WLC_GET_RATESET:{ - wlc_rateset_t rs; - wl_rateset_t *ret_rs = (wl_rateset_t *) arg; - - memset(&rs, 0, sizeof(wlc_rateset_t)); - wlc_default_rateset(wlc, (wlc_rateset_t *) &rs); - - if (len < (int)(rs.count + sizeof(rs.count))) { - bcmerror = -EOVERFLOW; - break; - } - - /* Copy only legacy rateset section */ - ret_rs->count = rs.count; - memcpy(&ret_rs->rates, &rs.rates, rs.count); - break; - } - - case WLC_SET_RATESET:{ + case BRCM_SET_RATESET:{ wlc_rateset_t rs; wl_rateset_t *in_rs = (wl_rateset_t *) arg; @@ -3410,7 +2667,7 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; } - if (in_rs->count > WLC_NUMRATES) { + if (in_rs->count > BRCMS_NUMRATES) { bcmerror = -ENOBUFS; break; } @@ -3433,149 +2690,24 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, MCSSET_LEN); } - bcmerror = wlc_set_rateset(wlc, &rs); + bcmerror = brcms_c_set_rateset(wlc, &rs); if (!bcmerror) - wlc_ofdm_rateset_war(wlc); + brcms_c_ofdm_rateset_war(wlc); break; } - case WLC_GET_BCNPRD: - if (BSSCFG_STA(bsscfg) && bsscfg->BSS && bsscfg->associated) - *pval = current_bss->beacon_period; - else - *pval = wlc->default_bss->beacon_period; - break; - - case WLC_SET_BCNPRD: + case BRCM_SET_BCNPRD: /* range [1, 0xffff] */ if (val >= DOT11_MIN_BEACON_PERIOD - && val <= DOT11_MAX_BEACON_PERIOD) { + && val <= DOT11_MAX_BEACON_PERIOD) wlc->default_bss->beacon_period = (u16) val; - } else - bcmerror = -EINVAL; - break; - - case WLC_GET_DTIMPRD: - if (BSSCFG_STA(bsscfg) && bsscfg->BSS && bsscfg->associated) - *pval = current_bss->dtim_period; else - *pval = wlc->default_bss->dtim_period; - break; - - case WLC_SET_DTIMPRD: - /* range [1, 0xff] */ - if (val >= DOT11_MIN_DTIM_PERIOD - && val <= DOT11_MAX_DTIM_PERIOD) { - wlc->default_bss->dtim_period = (u8) val; - } else bcmerror = -EINVAL; break; -#ifdef SUPPORT_PS - case WLC_GET_PM: - *pval = wlc->PM; - break; - - case WLC_SET_PM: - if ((val >= PM_OFF) && (val <= PM_MAX)) { - wlc->PM = (u8) val; - if (wlc->pub->up) { - } - /* Change watchdog driver to align watchdog with tbtt if possible */ - wlc_watchdog_upd(wlc, PS_ALLOWED(wlc)); - } else - bcmerror = -EBADE; - break; -#endif /* SUPPORT_PS */ - -#ifdef SUPPORT_PS -#ifdef BCMDBG - case WLC_GET_WAKE: - if (AP_ENAB(wlc->pub)) { - bcmerror = -BCME_NOTSTA; - break; - } - *pval = wlc->wake; - break; - - case WLC_SET_WAKE: - if (AP_ENAB(wlc->pub)) { - bcmerror = -BCME_NOTSTA; - break; - } - - wlc->wake = val ? true : false; - - /* if down, we're done */ - if (!wlc->pub->up) - break; - - /* apply to the mac */ - wlc_set_ps_ctrl(wlc); - break; -#endif /* BCMDBG */ -#endif /* SUPPORT_PS */ - - case WLC_GET_REVINFO: - bcmerror = wlc_get_revision_info(wlc, arg, (uint) len); - break; - - case WLC_GET_AP: - *pval = (int)AP_ENAB(wlc->pub); - break; - - case WLC_GET_ATIM: - if (bsscfg->associated) - *pval = (int)current_bss->atim_window; - else - *pval = (int)wlc->default_bss->atim_window; - break; - - case WLC_SET_ATIM: - wlc->default_bss->atim_window = (u32) val; - break; - -#ifdef SUPPORT_HWKEY - case WLC_GET_WSEC: - bcmerror = - wlc_iovar_op(wlc, "wsec", NULL, 0, arg, len, IOV_GET, - wlcif); - break; - - case WLC_SET_WSEC: - bcmerror = - wlc_iovar_op(wlc, "wsec", NULL, 0, arg, len, IOV_SET, - wlcif); - break; - - case WLC_GET_WPA_AUTH: - *pval = (int)bsscfg->WPA_auth; - break; - - case WLC_SET_WPA_AUTH: - /* change of WPA_Auth modifies the PS_ALLOWED state */ - if (BSSCFG_STA(bsscfg)) { - bsscfg->WPA_auth = (u16) val; - } else - bsscfg->WPA_auth = (u16) val; - break; -#endif /* SUPPORT_HWKEY */ - - case WLC_GET_BANDLIST: - /* count of number of bands, followed by each band type */ - *pval++ = NBANDS(wlc); - *pval++ = wlc->band->bandtype; - if (NBANDS(wlc) > 1) - *pval++ = wlc->bandstate[OTHERBANDUNIT(wlc)]->bandtype; - break; - - case WLC_GET_BAND: - *pval = wlc->bandlocked ? wlc->band->bandtype : WLC_BAND_AUTO; - break; - - case WLC_GET_PHYLIST: + case BRCM_GET_PHYLIST: { unsigned char *cp = arg; if (len < 3) { @@ -3583,28 +2715,19 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, break; } - if (WLCISNPHY(wlc->band)) { + if (BRCMS_ISNPHY(wlc->band)) *cp++ = 'n'; - } else if (WLCISLCNPHY(wlc->band)) { + else if (BRCMS_ISLCNPHY(wlc->band)) *cp++ = 'c'; - } else if (WLCISSSLPNPHY(wlc->band)) { + else if (BRCMS_ISSSLPNPHY(wlc->band)) *cp++ = 's'; - } *cp = '\0'; break; } - case WLC_GET_SHORTSLOT: - *pval = wlc->shortslot; - break; - - case WLC_GET_SHORTSLOT_OVERRIDE: - *pval = wlc->shortslot_override; - break; - - case WLC_SET_SHORTSLOT_OVERRIDE: - if ((val != WLC_SHORTSLOT_AUTO) && - (val != WLC_SHORTSLOT_OFF) && (val != WLC_SHORTSLOT_ON)) { + case BRCMS_SET_SHORTSLOT_OVERRIDE: + if (val != BRCMS_SHORTSLOT_AUTO && val != BRCMS_SHORTSLOT_OFF && + val != BRCMS_SHORTSLOT_ON) { bcmerror = -EINVAL; break; } @@ -3621,270 +2744,21 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, /* let watchdog or beacon processing update shortslot */ } else if (wlc->pub->up) { /* unassociated shortslot is off */ - wlc_switch_shortslot(wlc, false); + brcms_c_switch_shortslot(wlc, false); } else { - /* driver is down, so just update the wlc_info value */ - if (wlc->shortslot_override == WLC_SHORTSLOT_AUTO) { + /* driver is down, so just update the brcms_c_info + * value */ + if (wlc->shortslot_override == BRCMS_SHORTSLOT_AUTO) { wlc->shortslot = false; } else { wlc->shortslot = (wlc->shortslot_override == - WLC_SHORTSLOT_ON); - } - } - - break; - - case WLC_GET_LEGACY_ERP: - *pval = wlc->include_legacy_erp; - break; - - case WLC_SET_LEGACY_ERP: - if (wlc->include_legacy_erp == bool_val) - break; - - wlc->include_legacy_erp = bool_val; - - if (AP_ENAB(wlc->pub) && wlc->clk) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); - } - break; - - case WLC_GET_GMODE: - if (wlc->band->bandtype == WLC_BAND_2G) - *pval = wlc->band->gmode; - else if (NBANDS(wlc) > 1) - *pval = wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode; - break; - - case WLC_SET_GMODE: - if (!wlc->pub->associated) - bcmerror = wlc_set_gmode(wlc, (u8) val, true); - else { - bcmerror = -EISCONN; - break; - } - break; - - case WLC_GET_GMODE_PROTECTION: - *pval = wlc->protection->_g; - break; - - case WLC_GET_PROTECTION_CONTROL: - *pval = wlc->protection->overlap; - break; - - case WLC_SET_PROTECTION_CONTROL: - if ((val != WLC_PROTECTION_CTL_OFF) && - (val != WLC_PROTECTION_CTL_LOCAL) && - (val != WLC_PROTECTION_CTL_OVERLAP)) { - bcmerror = -EINVAL; - break; - } - - wlc_protection_upd(wlc, WLC_PROT_OVERLAP, (s8) val); - - /* Current g_protection will sync up to the specified control alg in watchdog - * if the driver is up and associated. - * If the driver is down or not associated, the control setting has no effect. - */ - break; - - case WLC_GET_GMODE_PROTECTION_OVERRIDE: - *pval = wlc->protection->g_override; - break; - - case WLC_SET_GMODE_PROTECTION_OVERRIDE: - if ((val != WLC_PROTECTION_AUTO) && - (val != WLC_PROTECTION_OFF) && (val != WLC_PROTECTION_ON)) { - bcmerror = -EINVAL; - break; - } - - wlc_protection_upd(wlc, WLC_PROT_G_OVR, (s8) val); - - break; - - case WLC_SET_SUP_RATESET_OVERRIDE:{ - wlc_rateset_t rs, new; - - /* copyin */ - if (len < (int)sizeof(wlc_rateset_t)) { - bcmerror = -EOVERFLOW; - break; - } - memcpy(&rs, arg, sizeof(wlc_rateset_t)); - - /* check for bad count value */ - if (rs.count > WLC_NUMRATES) { - bcmerror = -EINVAL; - break; - } - - /* this command is only appropriate for gmode operation */ - if (!(wlc->band->gmode || - ((NBANDS(wlc) > 1) - && wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode))) { - /* gmode only command when not in gmode */ - bcmerror = -EINVAL; - break; - } - - /* check for an empty rateset to clear the override */ - if (rs.count == 0) { - memset(&wlc->sup_rates_override, 0, - sizeof(wlc_rateset_t)); - break; - } - - /* - * validate rateset by comparing pre and - * post sorted against 11g hw rates - */ - wlc_rateset_filter(&rs, &new, false, - WLC_RATES_CCK_OFDM, WLC_RATE_MASK, - BSS_N_ENAB(wlc, bsscfg)); - wlc_rate_hwrs_filter_sort_validate(&new, - &cck_ofdm_rates, - false, - wlc->stf->txstreams); - if (rs.count != new.count) { - bcmerror = -EINVAL; - break; - } - - /* apply new rateset to the override */ - memcpy(&wlc->sup_rates_override, &new, - sizeof(wlc_rateset_t)); - - /* update bcn and probe resp if needed */ - if (wlc->pub->up && AP_ENAB(wlc->pub) - && wlc->pub->associated) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); - } - break; - } - - case WLC_GET_SUP_RATESET_OVERRIDE: - /* this command is only appropriate for gmode operation */ - if (!(wlc->band->gmode || - ((NBANDS(wlc) > 1) - && wlc->bandstate[OTHERBANDUNIT(wlc)]->gmode))) { - /* gmode only command when not in gmode */ - bcmerror = -EINVAL; - break; - } - if (len < (int)sizeof(wlc_rateset_t)) { - bcmerror = -EOVERFLOW; - break; - } - memcpy(arg, &wlc->sup_rates_override, sizeof(wlc_rateset_t)); - - break; - - case WLC_GET_PRB_RESP_TIMEOUT: - *pval = wlc->prb_resp_timeout; - break; - - case WLC_SET_PRB_RESP_TIMEOUT: - if (wlc->pub->up) { - bcmerror = -EISCONN; - break; - } - if (val < 0 || val >= 0xFFFF) { - bcmerror = -EINVAL; /* bad value */ - break; - } - wlc->prb_resp_timeout = (u16) val; - break; - - case WLC_GET_KEY_PRIMARY:{ - wsec_key_t *key; - - /* treat the 'val' parm as the key id */ - key = WSEC_BSS_DEFAULT_KEY(bsscfg); - if (key != NULL) { - *pval = key->id == val ? true : false; - } else { - bcmerror = -EINVAL; - } - break; - } - - case WLC_SET_KEY_PRIMARY:{ - wsec_key_t *key, *old_key; - - bcmerror = -EINVAL; - - /* treat the 'val' parm as the key id */ - for (i = 0; i < WSEC_MAX_DEFAULT_KEYS; i++) { - key = bsscfg->bss_def_keys[i]; - if (key != NULL && key->id == val) { - old_key = WSEC_BSS_DEFAULT_KEY(bsscfg); - if (old_key != NULL) - old_key->flags &= - ~WSEC_PRIMARY_KEY; - key->flags |= WSEC_PRIMARY_KEY; - bsscfg->wsec_index = i; - bcmerror = 0; - } + BRCMS_SHORTSLOT_ON); } - break; - } - -#ifdef BCMDBG - case WLC_INIT: - wl_init(wlc->wl); - break; -#endif - - case WLC_SET_VAR: - case WLC_GET_VAR:{ - char *name; - /* validate the name value */ - name = (char *)arg; - for (i = 0; i < (uint) len && *name != '\0'; - i++, name++) - ; - - if (i == (uint) len) { - bcmerror = -EOVERFLOW; - break; - } - i++; /* include the null in the string length */ - - if (cmd == WLC_GET_VAR) { - bcmerror = - wlc_iovar_op(wlc, arg, - (void *)((s8 *) arg + i), - len - i, arg, len, IOV_GET, - wlcif); - } else - bcmerror = - wlc_iovar_op(wlc, arg, NULL, 0, - (void *)((s8 *) arg + i), - len - i, IOV_SET, wlcif); - - break; } - case WLC_SET_WSEC_PMK: - bcmerror = -ENOTSUPP; - break; - -#if defined(BCMDBG) - case WLC_CURRENT_PWR: - if (!wlc->pub->up) - bcmerror = -ENOLINK; - else - bcmerror = wlc_get_current_txpwr(wlc, arg, len); break; -#endif - case WLC_LAST: - wiphy_err(wlc->wiphy, "%s: WLC_LAST\n", __func__); } done: @@ -3894,83 +2768,22 @@ _wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, return bcmerror; } -#if defined(BCMDBG) -/* consolidated register access ioctl error checking */ -int wlc_iocregchk(struct wlc_info *wlc, uint band) -{ - /* if band is specified, it must be the current band */ - if ((band != WLC_BAND_AUTO) && (band != (uint) wlc->band->bandtype)) - return -EINVAL; - - /* if multiband and band is not specified, band must be locked */ - if ((band == WLC_BAND_AUTO) && IS_MBAND_UNLOCKED(wlc)) - return -ENOMEDIUM; - - /* must have core clocks */ - if (!wlc->clk) - return -EIO; - - return 0; -} -#endif /* defined(BCMDBG) */ - -/* Look up the given var name in the given table */ -static const bcm_iovar_t *wlc_iovar_lookup(const bcm_iovar_t *table, - const char *name) -{ - const bcm_iovar_t *vi; - const char *lookup_name; - - /* skip any ':' delimited option prefixes */ - lookup_name = strrchr(name, ':'); - if (lookup_name != NULL) - lookup_name++; - else - lookup_name = name; - - for (vi = table; vi->name; vi++) { - if (!strcmp(vi->name, lookup_name)) - return vi; - } - /* ran to end of table */ - - return NULL; /* var name not found */ -} - -/* simplified integer get interface for common WLC_GET_VAR ioctl handler */ -int wlc_iovar_getint(struct wlc_info *wlc, const char *name, int *arg) -{ - return wlc_iovar_op(wlc, name, NULL, 0, arg, sizeof(s32), IOV_GET, - NULL); -} - -/* simplified integer set interface for common WLC_SET_VAR ioctl handler */ -int wlc_iovar_setint(struct wlc_info *wlc, const char *name, int arg) -{ - return wlc_iovar_op(wlc, name, NULL, 0, (void *)&arg, sizeof(arg), - IOV_SET, NULL); -} - /* - * register iovar table, watchdog and down handlers. - * calling function must keep 'iovars' until wlc_module_unregister is called. - * 'iovar' must have the last entry's name field being NULL as terminator. + * register watchdog and down handlers. */ -int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars, - const char *name, void *hdl, iovar_fn_t i_fn, +int brcms_c_module_register(struct brcms_pub *pub, + const char *name, void *hdl, watchdog_fn_t w_fn, down_fn_t d_fn) { - struct wlc_info *wlc = (struct wlc_info *) pub->wlc; + struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc; int i; /* find an empty entry and just add, no duplication check! */ - for (i = 0; i < WLC_MAXMODULES; i++) { + for (i = 0; i < BRCMS_MAXMODULES; i++) { if (wlc->modulecb[i].name[0] == '\0') { strncpy(wlc->modulecb[i].name, name, sizeof(wlc->modulecb[i].name) - 1); - wlc->modulecb[i].iovars = iovars; wlc->modulecb[i].hdl = hdl; - wlc->modulecb[i].iovar_fn = i_fn; wlc->modulecb[i].watchdog_fn = w_fn; wlc->modulecb[i].down_fn = d_fn; return 0; @@ -3981,15 +2794,16 @@ int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars, } /* unregister module callbacks */ -int wlc_module_unregister(struct wlc_pub *pub, const char *name, void *hdl) +int +brcms_c_module_unregister(struct brcms_pub *pub, const char *name, void *hdl) { - struct wlc_info *wlc = (struct wlc_info *) pub->wlc; + struct brcms_c_info *wlc = (struct brcms_c_info *) pub->wlc; int i; if (wlc == NULL) return -ENODATA; - for (i = 0; i < WLC_MAXMODULES; i++) { + for (i = 0; i < BRCMS_MAXMODULES; i++) { if (!strcmp(wlc->modulecb[i].name, name) && (wlc->modulecb[i].hdl == hdl)) { memset(&wlc->modulecb[i], 0, sizeof(struct modulecb)); @@ -4002,7 +2816,7 @@ int wlc_module_unregister(struct wlc_pub *pub, const char *name, void *hdl) } /* Write WME tunable parameters for retransmit/max rate from wlc struct to ucode */ -static void wlc_wme_retries_write(struct wlc_info *wlc) +static void brcms_c_wme_retries_write(struct brcms_c_info *wlc) { int ac; @@ -4011,307 +2825,19 @@ static void wlc_wme_retries_write(struct wlc_info *wlc) return; for (ac = 0; ac < AC_COUNT; ac++) { - wlc_write_shm(wlc, M_AC_TXLMT_ADDR(ac), wlc->wme_retries[ac]); - } -} - -/* Get or set an iovar. The params/p_len pair specifies any additional - * qualifying parameters (e.g. an "element index") for a get, while the - * arg/len pair is the buffer for the value to be set or retrieved. - * Operation (get/set) is specified by the last argument. - * interface context provided by wlcif - * - * All pointers may point into the same buffer. - */ -int -wlc_iovar_op(struct wlc_info *wlc, const char *name, - void *params, int p_len, void *arg, int len, - bool set, struct wlc_if *wlcif) -{ - int err = 0; - int val_size; - const bcm_iovar_t *vi = NULL; - u32 actionid; - int i; - - if (!set && (len == sizeof(int)) && - !(IS_ALIGNED((unsigned long)(arg), (uint) sizeof(int)))) { - wiphy_err(wlc->wiphy, "wl%d: %s unaligned get ptr for %s\n", - wlc->pub->unit, __func__, name); - return -ENOTSUPP; - } - - /* find the given iovar name */ - for (i = 0; i < WLC_MAXMODULES; i++) { - if (!wlc->modulecb[i].iovars) - continue; - vi = wlc_iovar_lookup(wlc->modulecb[i].iovars, name); - if (vi) - break; - } - /* iovar name not found */ - if (i >= WLC_MAXMODULES) { - return -ENOTSUPP; - } - - /* set up 'params' pointer in case this is a set command so that - * the convenience int and bool code can be common to set and get - */ - if (params == NULL) { - params = arg; - p_len = len; - } - - if (vi->type == IOVT_VOID) - val_size = 0; - else if (vi->type == IOVT_BUFFER) - val_size = len; - else - /* all other types are integer sized */ - val_size = sizeof(int); - - actionid = set ? IOV_SVAL(vi->varid) : IOV_GVAL(vi->varid); - - /* Do the actual parameter implementation */ - err = wlc->modulecb[i].iovar_fn(wlc->modulecb[i].hdl, vi, actionid, - name, params, p_len, arg, len, val_size, - wlcif); - return err; -} - -int -wlc_iovar_check(struct wlc_pub *pub, const bcm_iovar_t *vi, void *arg, int len, - bool set) -{ - struct wlc_info *wlc = (struct wlc_info *) pub->wlc; - int err = 0; - s32 int_val = 0; - - /* check generic condition flags */ - if (set) { - if (((vi->flags & IOVF_SET_DOWN) && wlc->pub->up) || - ((vi->flags & IOVF_SET_UP) && !wlc->pub->up)) { - err = (wlc->pub->up ? -EISCONN : -ENOLINK); - } else if ((vi->flags & IOVF_SET_BAND) - && IS_MBAND_UNLOCKED(wlc)) { - err = -ENOMEDIUM; - } else if ((vi->flags & IOVF_SET_CLK) && !wlc->clk) { - err = -EIO; - } - } else { - if (((vi->flags & IOVF_GET_DOWN) && wlc->pub->up) || - ((vi->flags & IOVF_GET_UP) && !wlc->pub->up)) { - err = (wlc->pub->up ? -EISCONN : -ENOLINK); - } else if ((vi->flags & IOVF_GET_BAND) - && IS_MBAND_UNLOCKED(wlc)) { - err = -ENOMEDIUM; - } else if ((vi->flags & IOVF_GET_CLK) && !wlc->clk) { - err = -EIO; - } - } - - if (err) - goto exit; - - /* length check on io buf */ - err = bcm_iovar_lencheck(vi, arg, len, set); - if (err) - goto exit; - - /* On set, check value ranges for integer types */ - if (set) { - switch (vi->type) { - case IOVT_BOOL: - case IOVT_INT8: - case IOVT_INT16: - case IOVT_INT32: - case IOVT_UINT8: - case IOVT_UINT16: - case IOVT_UINT32: - memcpy(&int_val, arg, sizeof(int)); - err = wlc_iovar_rangecheck(wlc, int_val, vi); - break; - } - } - exit: - return err; -} - -/* handler for iovar table wlc_iovars */ -/* - * IMPLEMENTATION NOTE: In order to avoid checking for get/set in each - * iovar case, the switch statement maps the iovar id into separate get - * and set values. If you add a new iovar to the switch you MUST use - * IOV_GVAL and/or IOV_SVAL in the case labels to avoid conflict with - * another case. - * Please use params for additional qualifying parameters. - */ -int -wlc_doiovar(void *hdl, const bcm_iovar_t *vi, u32 actionid, - const char *name, void *params, uint p_len, void *arg, int len, - int val_size, struct wlc_if *wlcif) -{ - struct wlc_info *wlc = hdl; - struct wlc_bsscfg *bsscfg; - int err = 0; - s32 int_val = 0; - s32 int_val2 = 0; - s32 *ret_int_ptr; - bool bool_val; - bool bool_val2; - wlc_bss_info_t *current_bss; - - BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); - - bsscfg = NULL; - current_bss = NULL; - - err = wlc_iovar_check(wlc->pub, vi, arg, len, IOV_ISSET(actionid)); - if (err != 0) - return err; - - /* convenience int and bool vals for first 8 bytes of buffer */ - if (p_len >= (int)sizeof(int_val)) - memcpy(&int_val, params, sizeof(int_val)); - - if (p_len >= (int)sizeof(int_val) * 2) - memcpy(&int_val2, - (void *)((unsigned long)params + sizeof(int_val)), - sizeof(int_val)); - - /* convenience int ptr for 4-byte gets (requires int aligned arg) */ - ret_int_ptr = (s32 *) arg; - - bool_val = (int_val != 0) ? true : false; - bool_val2 = (int_val2 != 0) ? true : false; - - BCMMSG(wlc->wiphy, "wl%d: id %d\n", wlc->pub->unit, IOV_ID(actionid)); - /* Do the actual parameter implementation */ - switch (actionid) { - case IOV_SVAL(IOV_RTSTHRESH): - wlc->RTSThresh = int_val; - break; - - case IOV_GVAL(IOV_QTXPOWER):{ - uint qdbm; - bool override; - - err = wlc_phy_txpower_get(wlc->band->pi, &qdbm, - &override); - if (err != 0) - return err; - - /* Return qdbm units */ - *ret_int_ptr = - qdbm | (override ? WL_TXPWR_OVERRIDE : 0); - break; - } - - /* As long as override is false, this only sets the *user* targets. - User can twiddle this all he wants with no harm. - wlc_phy_txpower_set() explicitly sets override to false if - not internal or test. - */ - case IOV_SVAL(IOV_QTXPOWER):{ - u8 qdbm; - bool override; - - /* Remove override bit and clip to max qdbm value */ - qdbm = (u8)min_t(u32, (int_val & ~WL_TXPWR_OVERRIDE), 0xff); - /* Extract override setting */ - override = (int_val & WL_TXPWR_OVERRIDE) ? true : false; - err = - wlc_phy_txpower_set(wlc->band->pi, qdbm, override); - break; - } - - case IOV_GVAL(IOV_MPC): - *ret_int_ptr = (s32) wlc->mpc; - break; - - case IOV_SVAL(IOV_MPC): - wlc->mpc = bool_val; - wlc_radio_mpc_upd(wlc); - - break; - - case IOV_GVAL(IOV_BCN_LI_BCN): - *ret_int_ptr = wlc->bcn_li_bcn; - break; - - case IOV_SVAL(IOV_BCN_LI_BCN): - wlc->bcn_li_bcn = (u8) int_val; - if (wlc->pub->up) - wlc_bcn_li_upd(wlc); - break; - - default: - wiphy_err(wlc->wiphy, "wl%d: %s: unsupported\n", - wlc->pub->unit, __func__); - err = -ENOTSUPP; - break; - } - - goto exit; /* avoid unused label warning */ - - exit: - return err; -} - -static int -wlc_iovar_rangecheck(struct wlc_info *wlc, u32 val, const bcm_iovar_t *vi) -{ - int err = 0; - u32 min_val = 0; - u32 max_val = 0; - - /* Only ranged integers are checked */ - switch (vi->type) { - case IOVT_INT32: - max_val |= 0x7fffffff; - /* fall through */ - case IOVT_INT16: - max_val |= 0x00007fff; - /* fall through */ - case IOVT_INT8: - max_val |= 0x0000007f; - min_val = ~max_val; - if (vi->flags & IOVF_NTRL) - min_val = 1; - else if (vi->flags & IOVF_WHL) - min_val = 0; - /* Signed values are checked against max_val and min_val */ - if ((s32) val < (s32) min_val - || (s32) val > (s32) max_val) - err = -EINVAL; - break; - - case IOVT_UINT32: - max_val |= 0xffffffff; - /* fall through */ - case IOVT_UINT16: - max_val |= 0x0000ffff; - /* fall through */ - case IOVT_UINT8: - max_val |= 0x000000ff; - if (vi->flags & IOVF_NTRL) - min_val = 1; - if ((val < min_val) || (val > max_val)) - err = -EINVAL; - break; + brcms_c_write_shm(wlc, M_AC_TXLMT_ADDR(ac), + wlc->wme_retries[ac]); } - - return err; } #ifdef BCMDBG -static const char *supr_reason[] = { +static const char * const supr_reason[] = { "None", "PMQ Entry", "Flush request", "Previous frag failure", "Channel mismatch", "Lifetime Expiry", "Underflow" }; -static void wlc_print_txs_status(u16 s) +static void brcms_c_print_txs_status(u16 s) { printk(KERN_DEBUG "[15:12] %d frame attempts\n", (s & TX_STATUS_FRM_RTX_MASK) >> TX_STATUS_FRM_RTX_SHIFT); @@ -4331,7 +2857,7 @@ static void wlc_print_txs_status(u16 s) } #endif /* BCMDBG */ -void wlc_print_txstatus(tx_status_t *txs) +void brcms_c_print_txstatus(struct tx_status *txs) { #if defined(BCMDBG) u16 s = txs->status; @@ -4343,7 +2869,7 @@ void wlc_print_txstatus(tx_status_t *txs) printk(KERN_DEBUG "TxStatus: %04x", s); printk(KERN_DEBUG "\n"); - wlc_print_txs_status(s); + brcms_c_print_txs_status(s); printk(KERN_DEBUG "LastTxTime: %04x ", txs->lasttxtime); printk(KERN_DEBUG "Seq: %04x ", txs->sequence); @@ -4356,10 +2882,10 @@ void wlc_print_txstatus(tx_status_t *txs) #endif /* defined(BCMDBG) */ } -void wlc_statsupd(struct wlc_info *wlc) +void brcms_c_statsupd(struct brcms_c_info *wlc) { int i; - macstat_t macstats; + struct macstat macstats; #ifdef BCMDBG u16 delta; u16 rxf0ovfl; @@ -4380,8 +2906,8 @@ void wlc_statsupd(struct wlc_info *wlc) #endif /* BCMDBG */ /* Read mac stats from contiguous shared memory */ - wlc_bmac_copyfrom_shm(wlc->hw, M_UCODE_MACSTAT, - &macstats, sizeof(macstat_t)); + brcms_b_copyfrom_shm(wlc->hw, M_UCODE_MACSTAT, + &macstats, sizeof(struct macstat)); #ifdef BCMDBG /* check for rx fifo 0 overflow */ @@ -4409,27 +2935,28 @@ void wlc_statsupd(struct wlc_info *wlc) } } -bool wlc_chipmatch(u16 vendor, u16 device) +bool brcms_c_chipmatch(u16 vendor, u16 device) { if (vendor != PCI_VENDOR_ID_BROADCOM) { - pr_err("wlc_chipmatch: unknown vendor id %04x\n", vendor); + pr_err("chipmatch: unknown vendor id %04x\n", vendor); return false; } + if (device == BCM43224_D11N_ID_VEN1) + return true; if ((device == BCM43224_D11N_ID) || (device == BCM43225_D11N2G_ID)) return true; - if (device == BCM4313_D11N2G_ID) return true; if ((device == BCM43236_D11N_ID) || (device == BCM43236_D11N2G_ID)) return true; - pr_err("wlc_chipmatch: unknown device id %04x\n", device); + pr_err("chipmatch: unknown device id %04x\n", device); return false; } #if defined(BCMDBG) -void wlc_print_txdesc(d11txh_t *txh) +void brcms_c_print_txdesc(struct d11txh *txh) { u16 mtcl = le16_to_cpu(txh->MacTxControlLow); u16 mtch = le16_to_cpu(txh->MacTxControlHigh); @@ -4465,7 +2992,7 @@ void wlc_print_txdesc(d11txh_t *txh) /* add plcp header along with txh descriptor */ printk(KERN_DEBUG "Raw TxDesc + plcp header:\n"); print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, - txh, sizeof(d11txh_t) + 48); + txh, sizeof(struct d11txh) + 48); printk(KERN_DEBUG "TxCtlLow: %04x ", mtcl); printk(KERN_DEBUG "TxCtlHigh: %04x ", mtch); @@ -4481,16 +3008,16 @@ void wlc_print_txdesc(d11txh_t *txh) printk(KERN_DEBUG "XtraFrameTypes: %04x ", xtraft); printk(KERN_DEBUG "\n"); - bcm_format_hex(hexbuf, iv, sizeof(txh->IV)); + brcmu_format_hex(hexbuf, iv, sizeof(txh->IV)); printk(KERN_DEBUG "SecIV: %s\n", hexbuf); - bcm_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA)); + brcmu_format_hex(hexbuf, ra, sizeof(txh->TxFrameRA)); printk(KERN_DEBUG "RA: %s\n", hexbuf); printk(KERN_DEBUG "Fb FES Time: %04x ", tfestfb); - bcm_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback)); + brcmu_format_hex(hexbuf, rtspfb, sizeof(txh->RTSPLCPFallback)); printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf); printk(KERN_DEBUG "RTS DUR: %04x ", rtsdfb); - bcm_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback)); + brcmu_format_hex(hexbuf, fragpfb, sizeof(txh->FragPLCPFallback)); printk(KERN_DEBUG "PLCP: %s ", hexbuf); printk(KERN_DEBUG "DUR: %04x", fragdfb); printk(KERN_DEBUG "\n"); @@ -4506,16 +3033,16 @@ void wlc_print_txdesc(d11txh_t *txh) printk(KERN_DEBUG "MaxAggbyte_fb: %04x\n", mabyte_f); printk(KERN_DEBUG "MinByte: %04x\n", mmbyte); - bcm_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader)); + brcmu_format_hex(hexbuf, rtsph, sizeof(txh->RTSPhyHeader)); printk(KERN_DEBUG "RTS PLCP: %s ", hexbuf); - bcm_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame)); + brcmu_format_hex(hexbuf, (u8 *) &rts, sizeof(txh->rts_frame)); printk(KERN_DEBUG "RTS Frame: %s", hexbuf); printk(KERN_DEBUG "\n"); } #endif /* defined(BCMDBG) */ #if defined(BCMDBG) -void wlc_print_rxh(d11rxhdr_t *rxh) +void brcms_c_print_rxh(struct d11rxhdr *rxh) { u16 len = rxh->RxFrameSize; u16 phystatus_0 = rxh->PhyRxStatus_0; @@ -4526,7 +3053,7 @@ void wlc_print_rxh(d11rxhdr_t *rxh) u16 macstatus2 = rxh->RxStatus2; char flagstr[64]; char lenbuf[20]; - static const bcm_bit_desc_t macstat_flags[] = { + static const struct brcmu_bit_desc macstat_flags[] = { {RXS_FCSERR, "FCSErr"}, {RXS_RESPFRAMETX, "Reply"}, {RXS_PBPRES, "PADDING"}, @@ -4537,9 +3064,10 @@ void wlc_print_rxh(d11rxhdr_t *rxh) }; printk(KERN_DEBUG "Raw RxDesc:\n"); - print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh, sizeof(d11rxhdr_t)); + print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, rxh, + sizeof(struct d11rxhdr)); - bcm_format_flags(macstat_flags, macstatus1, flagstr, 64); + brcmu_format_flags(macstat_flags, macstatus1, flagstr, 64); snprintf(lenbuf, sizeof(lenbuf), "0x%x", len); @@ -4554,35 +3082,9 @@ void wlc_print_rxh(d11rxhdr_t *rxh) } #endif /* defined(BCMDBG) */ -#if defined(BCMDBG) -int wlc_format_ssid(char *buf, const unsigned char ssid[], uint ssid_len) -{ - uint i, c; - char *p = buf; - char *endp = buf + SSID_FMT_BUF_LEN; - - if (ssid_len > IEEE80211_MAX_SSID_LEN) - ssid_len = IEEE80211_MAX_SSID_LEN; - - for (i = 0; i < ssid_len; i++) { - c = (uint) ssid[i]; - if (c == '\\') { - *p++ = '\\'; - *p++ = '\\'; - } else if (isprint((unsigned char) c)) { - *p++ = (char)c; - } else { - p += snprintf(p, (endp - p), "\\x%02X", c); - } - } - *p = '\0'; - return (int)(p - buf); -} -#endif /* defined(BCMDBG) */ - -static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate) +static u16 brcms_c_rate_shm_offset(struct brcms_c_info *wlc, u8 rate) { - return wlc_bmac_rate_shm_offset(wlc->hw, rate); + return brcms_b_rate_shm_offset(wlc->hw, rate); } /* Callback for device removed */ @@ -4597,14 +3099,14 @@ static u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate) * Returns true if packet consumed (queued), false if not. */ bool -wlc_prec_enq(struct wlc_info *wlc, struct pktq *q, void *pkt, int prec) +brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q, void *pkt, int prec) { - return wlc_prec_enq_head(wlc, q, pkt, prec, false); + return brcms_c_prec_enq_head(wlc, q, pkt, prec, false); } bool -wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt, - int prec, bool head) +brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q, + struct sk_buff *pkt, int prec, bool head) { struct sk_buff *p; int eprec = -1; /* precedence to evict from */ @@ -4613,7 +3115,7 @@ wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt, if (pktq_pfull(q, prec)) eprec = prec; else if (pktq_full(q)) { - p = bcm_pktq_peek_tail(q, &eprec); + p = brcmu_pktq_peek_tail(q, &eprec); if (eprec > prec) { wiphy_err(wlc->wiphy, "%s: Failing: eprec %d > prec %d" "\n", __func__, eprec, prec); @@ -4635,41 +3137,41 @@ wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, struct sk_buff *pkt, } /* Evict packet according to discard policy */ - p = discard_oldest ? bcm_pktq_pdeq(q, eprec) : - bcm_pktq_pdeq_tail(q, eprec); - bcm_pkt_buf_free_skb(p); + p = discard_oldest ? brcmu_pktq_pdeq(q, eprec) : + brcmu_pktq_pdeq_tail(q, eprec); + brcmu_pkt_buf_free_skb(p); } /* Enqueue */ if (head) - p = bcm_pktq_penq_head(q, prec, pkt); + p = brcmu_pktq_penq_head(q, prec, pkt); else - p = bcm_pktq_penq(q, prec, pkt); + p = brcmu_pktq_penq(q, prec, pkt); return true; } -void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, +void brcms_c_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, uint prec) { - struct wlc_info *wlc = (struct wlc_info *) ctx; - struct wlc_txq_info *qi = wlc->pkt_queue; /* Check me */ + struct brcms_c_info *wlc = (struct brcms_c_info *) ctx; + struct brcms_txq_info *qi = wlc->pkt_queue; /* Check me */ struct pktq *q = &qi->q; int prio; prio = sdu->priority; - if (!wlc_prec_enq(wlc, q, sdu, prec)) { + if (!brcms_c_prec_enq(wlc, q, sdu, prec)) { if (!EDCF_ENAB(wlc->pub) || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) - wiphy_err(wlc->wiphy, "wl%d: wlc_txq_enq: txq overflow" + wiphy_err(wlc->wiphy, "wl%d: txq_enq: txq overflow" "\n", wlc->pub->unit); /* - * XXX we might hit this condtion in case + * we might hit this condtion in case * packet flooding from mac80211 stack */ - bcm_pkt_buf_free_skb(sdu); + brcmu_pkt_buf_free_skb(sdu); } /* Check if flow control needs to be turned on after enqueuing the packet @@ -4679,18 +3181,18 @@ void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, if (!EDCF_ENAB(wlc->pub) || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) { if (pktq_len(q) >= wlc->pub->tunables->datahiwat) { - wlc_txflowcontrol(wlc, qi, ON, ALLPRIO); + brcms_c_txflowcontrol(wlc, qi, ON, ALLPRIO); } } else if (wlc->pub->_priofc) { if (pktq_plen(q, wlc_prio2prec_map[prio]) >= wlc->pub->tunables->datahiwat) { - wlc_txflowcontrol(wlc, qi, ON, prio); + brcms_c_txflowcontrol(wlc, qi, ON, prio); } } } bool -wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu, +brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, struct sk_buff *sdu, struct ieee80211_hw *hw) { u8 prio; @@ -4705,21 +3207,22 @@ wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu, fifo = prio2fifo[prio]; pkt = sdu; if (unlikely - (wlc_d11hdrs_mac80211(wlc, hw, pkt, scb, 0, 1, fifo, 0, NULL, 0))) + (brcms_c_d11hdrs_mac80211( + wlc, hw, pkt, scb, 0, 1, fifo, 0, NULL, 0))) return -EINVAL; - wlc_txq_enq(wlc, scb, pkt, WLC_PRIO_TO_PREC(prio)); - wlc_send_q(wlc); + brcms_c_txq_enq(wlc, scb, pkt, BRCMS_PRIO_TO_PREC(prio)); + brcms_c_send_q(wlc); return 0; } -void wlc_send_q(struct wlc_info *wlc) +void brcms_c_send_q(struct brcms_c_info *wlc) { struct sk_buff *pkt[DOT11_MAXNUMFRAGS]; int prec; u16 prec_map; int err = 0, i, count; uint fifo; - struct wlc_txq_info *qi = wlc->pkt_queue; + struct brcms_txq_info *qi = wlc->pkt_queue; struct pktq *q = &qi->q; struct ieee80211_tx_info *tx_info; @@ -4733,22 +3236,23 @@ void wlc_send_q(struct wlc_info *wlc) /* Send all the enq'd pkts that we can. * Dequeue packets with precedence with empty HW fifo only */ - while (prec_map && (pkt[0] = bcm_pktq_mdeq(q, prec_map, &prec))) { + while (prec_map && (pkt[0] = brcmu_pktq_mdeq(q, prec_map, &prec))) { tx_info = IEEE80211_SKB_CB(pkt[0]); if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { - err = wlc_sendampdu(wlc->ampdu, qi, pkt, prec); + err = brcms_c_sendampdu(wlc->ampdu, qi, pkt, prec); } else { count = 1; - err = wlc_prep_pdu(wlc, pkt[0], &fifo); + err = brcms_c_prep_pdu(wlc, pkt[0], &fifo); if (!err) { for (i = 0; i < count; i++) { - wlc_txfifo(wlc, fifo, pkt[i], true, 1); + brcms_c_txfifo(wlc, fifo, pkt[i], true, + 1); } } } if (err == -EBUSY) { - bcm_pktq_penq_head(q, prec, pkt[0]); + brcmu_pktq_penq_head(q, prec, pkt[0]); /* If send failed due to any other reason than a change in * HW FIFO condition, quit. Otherwise, read the new prec_map! */ @@ -4761,17 +3265,17 @@ void wlc_send_q(struct wlc_info *wlc) /* Check if flow control needs to be turned off after sending the packet */ if (!EDCF_ENAB(wlc->pub) || (wlc->pub->wlfeatureflag & WL_SWFL_FLOWCONTROL)) { - if (wlc_txflowcontrol_prio_isset(wlc, qi, ALLPRIO) + if (brcms_c_txflowcontrol_prio_isset(wlc, qi, ALLPRIO) && (pktq_len(q) < wlc->pub->tunables->datahiwat / 2)) { - wlc_txflowcontrol(wlc, qi, OFF, ALLPRIO); + brcms_c_txflowcontrol(wlc, qi, OFF, ALLPRIO); } } else if (wlc->pub->_priofc) { int prio; for (prio = MAXPRIO; prio >= 0; prio--) { - if (wlc_txflowcontrol_prio_isset(wlc, qi, prio) && + if (brcms_c_txflowcontrol_prio_isset(wlc, qi, prio) && (pktq_plen(q, wlc_prio2prec_map[prio]) < wlc->pub->tunables->datahiwat / 2)) { - wlc_txflowcontrol(wlc, qi, OFF, prio); + brcms_c_txflowcontrol(wlc, qi, OFF, prio); } } } @@ -4784,8 +3288,8 @@ void wlc_send_q(struct wlc_info *wlc) * for MC frames so is used as part of the sequence number. */ static inline u16 -bcmc_fid_generate(struct wlc_info *wlc, struct wlc_bsscfg *bsscfg, - d11txh_t *txh) +bcmc_fid_generate(struct brcms_c_info *wlc, struct brcms_bss_cfg *bsscfg, + struct d11txh *txh) { u16 frameid; @@ -4800,13 +3304,13 @@ bcmc_fid_generate(struct wlc_info *wlc, struct wlc_bsscfg *bsscfg, } void -wlc_txfifo(struct wlc_info *wlc, uint fifo, struct sk_buff *p, bool commit, - s8 txpktpend) +brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, struct sk_buff *p, + bool commit, s8 txpktpend) { u16 frameid = INVALIDFID; - d11txh_t *txh; + struct d11txh *txh; - txh = (d11txh_t *) (p->data); + txh = (struct d11txh *) (p->data); /* When a BC/MC frame is being committed to the BCMC fifo via DMA (NOT PIO), update * ucode or BSS info as appropriate. @@ -4816,12 +3320,12 @@ wlc_txfifo(struct wlc_info *wlc, uint fifo, struct sk_buff *p, bool commit, } - if (WLC_WAR16165(wlc)) - wlc_war16165(wlc, true); + if (BRCMS_WAR16165(wlc)) + brcms_c_war16165(wlc, true); /* Bump up pending count for if not using rpc. If rpc is used, this will be handled - * in wlc_bmac_txfifo() + * in brcms_b_txfifo() */ if (commit) { TXPKTPENDINC(wlc, fifo, txpktpend); @@ -4834,31 +3338,32 @@ wlc_txfifo(struct wlc_info *wlc, uint fifo, struct sk_buff *p, bool commit, BCMCFID(wlc, frameid); if (dma_txfast(wlc->hw->di[fifo], p, commit) < 0) { - wiphy_err(wlc->wiphy, "wlc_txfifo: fatal, toss frames !!!\n"); + wiphy_err(wlc->wiphy, "txfifo: fatal, toss frames !!!\n"); } } void -wlc_compute_plcp(struct wlc_info *wlc, ratespec_t rspec, uint length, u8 *plcp) +brcms_c_compute_plcp(struct brcms_c_info *wlc, ratespec_t rspec, + uint length, u8 *plcp) { if (IS_MCS(rspec)) { - wlc_compute_mimo_plcp(rspec, length, plcp); + brcms_c_compute_mimo_plcp(rspec, length, plcp); } else if (IS_OFDM(rspec)) { - wlc_compute_ofdm_plcp(rspec, length, plcp); + brcms_c_compute_ofdm_plcp(rspec, length, plcp); } else { - wlc_compute_cck_plcp(wlc, rspec, length, plcp); + brcms_c_compute_cck_plcp(wlc, rspec, length, plcp); } return; } /* Rate: 802.11 rate code, length: PSDU length in octets */ -static void wlc_compute_mimo_plcp(ratespec_t rspec, uint length, u8 *plcp) +static void brcms_c_compute_mimo_plcp(ratespec_t rspec, uint length, u8 *plcp) { u8 mcs = (u8) (rspec & RSPEC_RATE_MASK); plcp[0] = mcs; if (RSPEC_IS40MHZ(rspec) || (mcs == 32)) plcp[0] |= MIMO_PLCP_40MHZ; - WLC_SET_MIMO_PLCP_LEN(plcp, length); + BRCMS_SET_MIMO_PLCP_LEN(plcp, length); plcp[3] = RSPEC_MIMOPLCP3(rspec); /* rspec already holds this byte */ plcp[3] |= 0x7; /* set smoothing, not sounding ppdu & reserved */ plcp[4] = 0; /* number of extension spatial streams bit 0 & 1 */ @@ -4867,16 +3372,16 @@ static void wlc_compute_mimo_plcp(ratespec_t rspec, uint length, u8 *plcp) /* Rate: 802.11 rate code, length: PSDU length in octets */ static void -wlc_compute_ofdm_plcp(ratespec_t rspec, u32 length, u8 *plcp) +brcms_c_compute_ofdm_plcp(ratespec_t rspec, u32 length, u8 *plcp) { u8 rate_signal; u32 tmp = 0; int rate = RSPEC2RATE(rspec); /* encode rate per 802.11a-1999 sec 17.3.4.1, with lsb transmitted first */ - rate_signal = rate_info[rate] & WLC_RATE_MASK; + rate_signal = rate_info[rate] & BRCMS_RATE_MASK; memset(plcp, 0, D11_PHY_HDR_LEN); - D11A_PHY_HDR_SRATE((ofdm_phy_hdr_t *) plcp, rate_signal); + D11A_PHY_HDR_SRATE((struct ofdm_phy_hdr *) plcp, rate_signal); tmp = (length & 0xfff) << 5; plcp[2] |= (tmp >> 16) & 0xff; @@ -4893,25 +3398,25 @@ wlc_compute_ofdm_plcp(ratespec_t rspec, u32 length, u8 *plcp) * Broken out for PRQ. */ -static void wlc_cck_plcp_set(struct wlc_info *wlc, int rate_500, uint length, - u8 *plcp) +static void brcms_c_cck_plcp_set(struct brcms_c_info *wlc, int rate_500, + uint length, u8 *plcp) { u16 usec = 0; u8 le = 0; switch (rate_500) { - case WLC_RATE_1M: + case BRCM_RATE_1M: usec = length << 3; break; - case WLC_RATE_2M: + case BRCM_RATE_2M: usec = length << 2; break; - case WLC_RATE_5M5: + case BRCM_RATE_5M5: usec = (length << 4) / 11; if ((length << 4) - (usec * 11) > 0) usec++; break; - case WLC_RATE_11M: + case BRCM_RATE_11M: usec = (length << 3) / 11; if ((length << 3) - (usec * 11) > 0) { usec++; @@ -4921,9 +3426,9 @@ static void wlc_cck_plcp_set(struct wlc_info *wlc, int rate_500, uint length, break; default: - wiphy_err(wlc->wiphy, "wlc_cck_plcp_set: unsupported rate %d" + wiphy_err(wlc->wiphy, "brcms_c_cck_plcp_set: unsupported rate %d" "\n", rate_500); - rate_500 = WLC_RATE_1M; + rate_500 = BRCM_RATE_1M; usec = length << 3; break; } @@ -4940,15 +3445,15 @@ static void wlc_cck_plcp_set(struct wlc_info *wlc, int rate_500, uint length, } /* Rate: 802.11 rate code, length: PSDU length in octets */ -static void wlc_compute_cck_plcp(struct wlc_info *wlc, ratespec_t rspec, +static void brcms_c_compute_cck_plcp(struct brcms_c_info *wlc, ratespec_t rspec, uint length, u8 *plcp) { int rate = RSPEC2RATE(rspec); - wlc_cck_plcp_set(wlc, rate, length, plcp); + brcms_c_cck_plcp_set(wlc, rate, length, plcp); } -/* wlc_compute_frame_dur() +/* brcms_c_compute_frame_dur() * * Calculate the 802.11 MAC header DUR field for MPDU * DUR for a single frame = 1 SIFS + 1 ACK @@ -4959,15 +3464,15 @@ static void wlc_compute_cck_plcp(struct wlc_info *wlc, ratespec_t rspec, * preamble_type use short/GF or long/MM PLCP header */ static u16 -wlc_compute_frame_dur(struct wlc_info *wlc, ratespec_t rate, u8 preamble_type, - uint next_frag_len) +brcms_c_compute_frame_dur(struct brcms_c_info *wlc, ratespec_t rate, + u8 preamble_type, uint next_frag_len) { u16 dur, sifs; sifs = SIFS(wlc->band); dur = sifs; - dur += (u16) wlc_calc_ack_time(wlc, rate, preamble_type); + dur += (u16) brcms_c_calc_ack_time(wlc, rate, preamble_type); if (next_frag_len) { /* Double the current DUR to get 2 SIFS + 2 ACKs */ @@ -4975,13 +3480,13 @@ wlc_compute_frame_dur(struct wlc_info *wlc, ratespec_t rate, u8 preamble_type, /* add another SIFS and the frag time */ dur += sifs; dur += - (u16) wlc_calc_frame_time(wlc, rate, preamble_type, + (u16) brcms_c_calc_frame_time(wlc, rate, preamble_type, next_frag_len); } return dur; } -/* wlc_compute_rtscts_dur() +/* brcms_c_compute_rtscts_dur() * * Calculate the 802.11 MAC header DUR field for an RTS or CTS frame * DUR for normal RTS/CTS w/ frame = 3 SIFS + 1 CTS + next frame time + 1 ACK @@ -4993,9 +3498,10 @@ wlc_compute_frame_dur(struct wlc_info *wlc, ratespec_t rate, u8 preamble_type, * frame_len next MPDU frame length in bytes */ u16 -wlc_compute_rtscts_dur(struct wlc_info *wlc, bool cts_only, ratespec_t rts_rate, - ratespec_t frame_rate, u8 rts_preamble_type, - u8 frame_preamble_type, uint frame_len, bool ba) +brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only, + ratespec_t rts_rate, + ratespec_t frame_rate, u8 rts_preamble_type, + u8 frame_preamble_type, uint frame_len, bool ba) { u16 dur, sifs; @@ -5004,38 +3510,38 @@ wlc_compute_rtscts_dur(struct wlc_info *wlc, bool cts_only, ratespec_t rts_rate, if (!cts_only) { /* RTS/CTS */ dur = 3 * sifs; dur += - (u16) wlc_calc_cts_time(wlc, rts_rate, + (u16) brcms_c_calc_cts_time(wlc, rts_rate, rts_preamble_type); } else { /* CTS-TO-SELF */ dur = 2 * sifs; } dur += - (u16) wlc_calc_frame_time(wlc, frame_rate, frame_preamble_type, + (u16) brcms_c_calc_frame_time(wlc, frame_rate, frame_preamble_type, frame_len); if (ba) dur += - (u16) wlc_calc_ba_time(wlc, frame_rate, - WLC_SHORT_PREAMBLE); + (u16) brcms_c_calc_ba_time(wlc, frame_rate, + BRCMS_SHORT_PREAMBLE); else dur += - (u16) wlc_calc_ack_time(wlc, frame_rate, + (u16) brcms_c_calc_ack_time(wlc, frame_rate, frame_preamble_type); return dur; } -u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec) +u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, ratespec_t rspec) { u16 phyctl1 = 0; u16 bw; - if (WLCISLCNPHY(wlc->band)) { + if (BRCMS_ISLCNPHY(wlc->band)) { bw = PHY_TXC1_BW_20MHZ; } else { bw = RSPEC_GET_BW(rspec); /* 10Mhz is not supported yet */ if (bw < PHY_TXC1_BW_20MHZ) { - wiphy_err(wlc->wiphy, "wlc_phytxctl1_calc: bw %d is " + wiphy_err(wlc->wiphy, "phytxctl1_calc: bw %d is " "not supported yet, set to 20L\n", bw); bw = PHY_TXC1_BW_20MHZ; } @@ -5048,8 +3554,8 @@ u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec) phyctl1 = RSPEC_PHYTXBYTE2(rspec); /* set the upper byte of phyctl1 */ phyctl1 |= (mcs_table[mcs].tx_phy_ctl3 << 8); - } else if (IS_CCK(rspec) && !WLCISLCNPHY(wlc->band) - && !WLCISSSLPNPHY(wlc->band)) { + } else if (IS_CCK(rspec) && !BRCMS_ISLCNPHY(wlc->band) + && !BRCMS_ISSSLPNPHY(wlc->band)) { /* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */ /* Eventually MIMOPHY would also be converted to this format */ /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */ @@ -5057,9 +3563,9 @@ u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec) } else { /* legacy OFDM/CCK */ s16 phycfg; /* get the phyctl byte from rate phycfg table */ - phycfg = wlc_rate_legacy_phyctl(RSPEC2RATE(rspec)); + phycfg = brcms_c_rate_legacy_phyctl(RSPEC2RATE(rspec)); if (phycfg == -1) { - wiphy_err(wlc->wiphy, "wlc_phytxctl1_calc: wrong " + wiphy_err(wlc->wiphy, "phytxctl1_calc: wrong " "legacy OFDM/CCK rate\n"); phycfg = 0; } @@ -5072,8 +3578,8 @@ u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec) } ratespec_t -wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, bool use_rspec, - u16 mimo_ctlchbw) +brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, ratespec_t rspec, + bool use_rspec, u16 mimo_ctlchbw) { ratespec_t rts_rspec = 0; @@ -5083,21 +3589,21 @@ wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, bool use_rspec, } else if (wlc->band->gmode && wlc->protection->_g && !IS_CCK(rspec)) { /* Use 11Mbps as the g protection RTS target rate and fallback. - * Use the WLC_BASIC_RATE() lookup to find the best basic rate under the - * target in case 11 Mbps is not Basic. + * Use the BRCMS_BASIC_RATE() lookup to find the best basic rate + * under the target in case 11 Mbps is not Basic. * 6 and 9 Mbps are not usually selected by rate selection, but even * if the OFDM rate we are protecting is 6 or 9 Mbps, 11 is more robust. */ - rts_rspec = WLC_BASIC_RATE(wlc, WLC_RATE_11M); + rts_rspec = BRCMS_BASIC_RATE(wlc, BRCM_RATE_11M); } else { /* calculate RTS rate and fallback rate based on the frame rate * RTS must be sent at a basic rate since it is a * control frame, sec 9.6 of 802.11 spec */ - rts_rspec = WLC_BASIC_RATE(wlc, rspec); + rts_rspec = BRCMS_BASIC_RATE(wlc, rspec); } - if (WLC_PHY_11N_CAP(wlc->band)) { + if (BRCMS_PHY_11N_CAP(wlc->band)) { /* set rts txbw to correct side band */ rts_rspec &= ~RSPEC_BW_MASK; @@ -5119,7 +3625,7 @@ wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, bool use_rspec, } /* - * Add d11txh_t, cck_phy_hdr_t. + * Add struct d11txh, struct cck_phy_hdr. * * 'p' data must start with 802.11 MAC header * 'p' must allow enough bytes of local headers to be "pushed" onto the packet @@ -5128,25 +3634,25 @@ wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, bool use_rspec, * */ static u16 -wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, +brcms_c_d11hdrs_mac80211(struct brcms_c_info *wlc, struct ieee80211_hw *hw, struct sk_buff *p, struct scb *scb, uint frag, uint nfrags, uint queue, uint next_frag_len, - wsec_key_t *key, ratespec_t rspec_override) + struct wsec_key *key, ratespec_t rspec_override) { struct ieee80211_hdr *h; - d11txh_t *txh; + struct d11txh *txh; u8 *plcp, plcp_fallback[D11_PHY_HDR_LEN]; int len, phylen, rts_phylen; u16 mch, phyctl, xfts, mainrates; u16 seq = 0, mcl = 0, status = 0, frameid = 0; - ratespec_t rspec[2] = { WLC_RATE_1M, WLC_RATE_1M }, rts_rspec[2] = { - WLC_RATE_1M, WLC_RATE_1M}; + ratespec_t rspec[2] = { BRCM_RATE_1M, BRCM_RATE_1M }, rts_rspec[2] = { + BRCM_RATE_1M, BRCM_RATE_1M}; bool use_rts = false; bool use_cts = false; bool use_rifs = false; bool short_preamble[2] = { false, false }; - u8 preamble_type[2] = { WLC_LONG_PREAMBLE, WLC_LONG_PREAMBLE }; - u8 rts_preamble_type[2] = { WLC_LONG_PREAMBLE, WLC_LONG_PREAMBLE }; + u8 preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE }; + u8 rts_preamble_type[2] = { BRCMS_LONG_PREAMBLE, BRCMS_LONG_PREAMBLE }; u8 *rts_plcp, rts_plcp_fallback[D11_PHY_HDR_LEN]; struct ieee80211_rts *rts = NULL; bool qos; @@ -5171,7 +3677,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, qos = ieee80211_is_data_qos(h->frame_control); /* compute length of frame in bytes for use in PLCP computations */ - len = bcm_pkttotlen(p); + len = brcmu_pkttotlen(p); phylen = len + FCS_LEN; /* If WEP enabled, add room in phylen for the additional bytes of @@ -5190,7 +3696,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, plcp = skb_push(p, D11_PHY_HDR_LEN); /* add Broadcom tx descriptor header */ - txh = (d11txh_t *) skb_push(p, D11_TXH_LEN); + txh = (struct d11txh *) skb_push(p, D11_TXH_LEN); memset(txh, 0, D11_TXH_LEN); /* setup frameid */ @@ -5198,7 +3704,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, /* non-AP STA should never use BCMC queue */ if (queue == TX_BCMC_FIFO) { wiphy_err(wlc->wiphy, "wl%d: %s: ASSERT queue == " - "TX_BCMC!\n", WLCWLUNIT(wlc), __func__); + "TX_BCMC!\n", BRCMS_UNIT(wlc), __func__); frameid = bcmc_fid_generate(wlc, NULL, txh); } else { /* Increment the counter for first fragment */ @@ -5244,7 +3750,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE ? true : false; } else { - rate_val[k] = WLC_RATE_1M; + rate_val[k] = BRCM_RATE_1M; } } else { rate_val[k] = txrate[k]->idx; @@ -5266,12 +3772,12 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, /* (1) RATE: determine and validate primary rate and fallback rates */ if (!RSPEC_ACTIVE(rspec[k])) { - rspec[k] = WLC_RATE_1M; + rspec[k] = BRCM_RATE_1M; } else { if (!is_multicast_ether_addr(h->addr1)) { /* set tx antenna config */ - wlc_antsel_antcfg_get(wlc->asi, false, false, 0, - 0, &antcfg, &fbantcfg); + brcms_c_antsel_antcfg_get(wlc->asi, false, + false, 0, 0, &antcfg, &fbantcfg); } } } @@ -5290,7 +3796,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, /* For SISO MCS use STBC if possible */ if (IS_MCS(rspec[k]) - && WLC_STF_SS_STBC_TX(wlc, scb)) { + && BRCMS_STF_SS_STBC_TX(wlc, scb)) { u8 stc; stc = 1; /* Nss for single stream is always 1 */ @@ -5304,11 +3810,11 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, } /* Is the phy configured to use 40MHZ frames? If so then pick the desired txbw */ - if (CHSPEC_WLC_BW(wlc->chanspec) == WLC_40_MHZ) { + if (CHSPEC_WLC_BW(wlc->chanspec) == BRCMS_40_MHZ) { /* default txbw is 20in40 SB */ mimo_ctlchbw = mimo_txbw = - CHSPEC_SB_UPPER(WLC_BAND_PI_RADIO_CHANSPEC) - ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; + CHSPEC_SB_UPPER(BRCMS_BAND_PI_RADIO_CHANSPEC) + ? PHY_TXC1_BW_20MHZ_UP : PHY_TXC1_BW_20MHZ; if (IS_MCS(rspec[k])) { /* mcs 32 must be 40b/w DUP */ @@ -5357,15 +3863,15 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, rspec[k] &= ~RSPEC_SHORT_GI; #endif - mimo_preamble_type = WLC_MM_PREAMBLE; + mimo_preamble_type = BRCMS_MM_PREAMBLE; if (txrate[k]->flags & IEEE80211_TX_RC_GREEN_FIELD) - mimo_preamble_type = WLC_GF_PREAMBLE; + mimo_preamble_type = BRCMS_GF_PREAMBLE; if ((txrate[k]->flags & IEEE80211_TX_RC_MCS) && (!IS_MCS(rspec[k]))) { wiphy_err(wlc->wiphy, "wl%d: %s: IEEE80211_TX_" "RC_MCS != IS_MCS(rspec)\n", - WLCWLUNIT(wlc), __func__); + BRCMS_UNIT(wlc), __func__); } if (IS_MCS(rspec[k])) { @@ -5375,7 +3881,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, if ((rspec[k] & RSPEC_SHORT_GI) && IS_SINGLE_STREAM(rspec[k] & RSPEC_RATE_MASK)) { - preamble_type[k] = WLC_MM_PREAMBLE; + preamble_type[k] = BRCMS_MM_PREAMBLE; } } @@ -5383,7 +3889,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, if (!IS_MCS(rspec[0]) && (tx_info->control.rates[0]. flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)) - preamble_type[k] = WLC_SHORT_PREAMBLE; + preamble_type[k] = BRCMS_SHORT_PREAMBLE; } } else { for (k = 0; k < hw->max_rates; k++) { @@ -5392,7 +3898,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, rspec[k] |= (PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT); /* for nphy, stf of ofdm frames must follow policies */ - if (WLCISNPHY(wlc->band) && IS_OFDM(rspec[k])) { + if (BRCMS_ISNPHY(wlc->band) && IS_OFDM(rspec[k])) { rspec[k] &= ~RSPEC_STF_MASK; rspec[k] |= phyctl1_stf << RSPEC_STF_SHIFT; } @@ -5409,9 +3915,10 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, (phylen > wlc->RTSThresh) && !is_multicast_ether_addr(h->addr1)) use_rts = true; - /* (3) PLCP: determine PLCP header and MAC duration, fill d11txh_t */ - wlc_compute_plcp(wlc, rspec[0], phylen, plcp); - wlc_compute_plcp(wlc, rspec[1], phylen, plcp_fallback); + /* (3) PLCP: determine PLCP header and MAC duration, + * fill struct d11txh */ + brcms_c_compute_plcp(wlc, rspec[0], phylen, plcp); + brcms_c_compute_plcp(wlc, rspec[1], phylen, plcp_fallback); memcpy(&txh->FragPLCPFallback, plcp_fallback, sizeof(txh->FragPLCPFallback)); @@ -5422,21 +3929,21 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, } /* MIMO-RATE: need validation ?? */ - mainrates = - IS_OFDM(rspec[0]) ? D11A_PHY_HDR_GRATE((ofdm_phy_hdr_t *) plcp) : - plcp[0]; + mainrates = IS_OFDM(rspec[0]) ? + D11A_PHY_HDR_GRATE((struct ofdm_phy_hdr *) plcp) : + plcp[0]; /* DUR field for main rate */ if (!ieee80211_is_pspoll(h->frame_control) && !is_multicast_ether_addr(h->addr1) && !use_rifs) { durid = - wlc_compute_frame_dur(wlc, rspec[0], preamble_type[0], + brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0], next_frag_len); h->duration_id = cpu_to_le16(durid); } else if (use_rifs) { /* NAV protect to end of next max packet size */ durid = - (u16) wlc_calc_frame_time(wlc, rspec[0], + (u16) brcms_c_calc_frame_time(wlc, rspec[0], preamble_type[0], DOT11_MAX_FRAG_LEN); durid += RIFS_11N_TIME; @@ -5449,7 +3956,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, else if (is_multicast_ether_addr(h->addr1) || use_rifs) txh->FragDurFallback = 0; else { - durid = wlc_compute_frame_dur(wlc, rspec[1], + durid = brcms_c_compute_frame_dur(wlc, rspec[1], preamble_type[1], next_frag_len); txh->FragDurFallback = cpu_to_le16(durid); } @@ -5464,7 +3971,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, if (BAND_5G(wlc->band->bandtype)) mcl |= TXC_FREQBAND_5G; - if (CHSPEC_IS40(WLC_BAND_PI_RADIO_CHANSPEC)) + if (CHSPEC_IS40(BRCMS_BAND_PI_RADIO_CHANSPEC)) mcl |= TXC_BW_40; /* set AMIC bit if using hardware TKIP MIC */ @@ -5477,9 +3984,9 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, mch = 0; /* Set fallback rate preamble type */ - if ((preamble_type[1] == WLC_SHORT_PREAMBLE) || - (preamble_type[1] == WLC_GF_PREAMBLE)) { - if (RSPEC2RATE(rspec[1]) != WLC_RATE_1M) + if ((preamble_type[1] == BRCMS_SHORT_PREAMBLE) || + (preamble_type[1] == BRCMS_GF_PREAMBLE)) { + if (RSPEC2RATE(rspec[1]) != BRCM_RATE_1M) mch |= TXC_PREAMBLE_DATA_FB_SHORT; } @@ -5508,29 +4015,30 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, txh->MaxABytes_FBR = cpu_to_le16(0); txh->MinMBytes = cpu_to_le16(0); - /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration, furnish d11txh_t */ + /* (5) RTS/CTS: determine RTS/CTS PLCP header and MAC duration, + * furnish struct d11txh */ /* RTS PLCP header and RTS frame */ if (use_rts || use_cts) { if (use_rts && use_cts) use_cts = false; for (k = 0; k < 2; k++) { - rts_rspec[k] = wlc_rspec_to_rts_rspec(wlc, rspec[k], + rts_rspec[k] = brcms_c_rspec_to_rts_rspec(wlc, rspec[k], false, mimo_ctlchbw); } if (!IS_OFDM(rts_rspec[0]) && - !((RSPEC2RATE(rts_rspec[0]) == WLC_RATE_1M) || - (wlc->PLCPHdr_override == WLC_PLCP_LONG))) { - rts_preamble_type[0] = WLC_SHORT_PREAMBLE; + !((RSPEC2RATE(rts_rspec[0]) == BRCM_RATE_1M) || + (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) { + rts_preamble_type[0] = BRCMS_SHORT_PREAMBLE; mch |= TXC_PREAMBLE_RTS_MAIN_SHORT; } if (!IS_OFDM(rts_rspec[1]) && - !((RSPEC2RATE(rts_rspec[1]) == WLC_RATE_1M) || - (wlc->PLCPHdr_override == WLC_PLCP_LONG))) { - rts_preamble_type[1] = WLC_SHORT_PREAMBLE; + !((RSPEC2RATE(rts_rspec[1]) == BRCM_RATE_1M) || + (wlc->PLCPHdr_override == BRCMS_PLCP_LONG))) { + rts_preamble_type[1] = BRCMS_SHORT_PREAMBLE; mch |= TXC_PREAMBLE_RTS_FB_SHORT; } @@ -5549,10 +4057,10 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, else rts_phylen = DOT11_RTS_LEN + FCS_LEN; - wlc_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp); + brcms_c_compute_plcp(wlc, rts_rspec[0], rts_phylen, rts_plcp); /* fallback rate version of RTS PLCP header */ - wlc_compute_plcp(wlc, rts_rspec[1], rts_phylen, + brcms_c_compute_plcp(wlc, rts_rspec[1], rts_phylen, rts_plcp_fallback); memcpy(&txh->RTSPLCPFallback, rts_plcp_fallback, sizeof(txh->RTSPLCPFallback)); @@ -5560,12 +4068,12 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, /* RTS frame fields... */ rts = (struct ieee80211_rts *)&txh->rts_frame; - durid = wlc_compute_rtscts_dur(wlc, use_cts, rts_rspec[0], + durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[0], rspec[0], rts_preamble_type[0], preamble_type[0], phylen, false); rts->duration = cpu_to_le16(durid); /* fallback rate version of RTS DUR field */ - durid = wlc_compute_rtscts_dur(wlc, use_cts, + durid = brcms_c_compute_rtscts_dur(wlc, use_cts, rts_rspec[1], rspec[1], rts_preamble_type[1], preamble_type[1], phylen, false); @@ -5588,8 +4096,9 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, * high 8 bits: rts/cts rate/mcs */ mainrates |= (IS_OFDM(rts_rspec[0]) ? - D11A_PHY_HDR_GRATE((ofdm_phy_hdr_t *) rts_plcp) : - rts_plcp[0]) << 8; + D11A_PHY_HDR_GRATE( + (struct ofdm_phy_hdr *) rts_plcp) : + rts_plcp[0]) << 8; } else { memset((char *)txh->RTSPhyHeader, 0, D11_PHY_HDR_LEN); memset((char *)&txh->rts_frame, 0, @@ -5603,7 +4112,7 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, /* add null delimiter count */ if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && IS_MCS(rspec)) { txh->RTSPLCPFallback[AMPDU_FBR_NULL_DELIM] = - wlc_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen); + brcm_c_ampdu_null_delim_cnt(wlc->ampdu, scb, rspec, phylen); } #endif @@ -5618,34 +4127,34 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, xfts |= (FRAMETYPE(rts_rspec[0], wlc->mimoft) << XFTS_RTS_FT_SHIFT); xfts |= (FRAMETYPE(rts_rspec[1], wlc->mimoft) << XFTS_FBRRTS_FT_SHIFT); xfts |= - CHSPEC_CHANNEL(WLC_BAND_PI_RADIO_CHANSPEC) << XFTS_CHANNEL_SHIFT; + CHSPEC_CHANNEL(BRCMS_BAND_PI_RADIO_CHANSPEC) << XFTS_CHANNEL_SHIFT; txh->XtraFrameTypes = cpu_to_le16(xfts); /* PhyTxControlWord */ phyctl = FRAMETYPE(rspec[0], wlc->mimoft); - if ((preamble_type[0] == WLC_SHORT_PREAMBLE) || - (preamble_type[0] == WLC_GF_PREAMBLE)) { - if (RSPEC2RATE(rspec[0]) != WLC_RATE_1M) + if ((preamble_type[0] == BRCMS_SHORT_PREAMBLE) || + (preamble_type[0] == BRCMS_GF_PREAMBLE)) { + if (RSPEC2RATE(rspec[0]) != BRCM_RATE_1M) phyctl |= PHY_TXC_SHORT_HDR; } /* phytxant is properly bit shifted */ - phyctl |= wlc_stf_d11hdrs_phyctl_txant(wlc, rspec[0]); + phyctl |= brcms_c_stf_d11hdrs_phyctl_txant(wlc, rspec[0]); txh->PhyTxControlWord = cpu_to_le16(phyctl); /* PhyTxControlWord_1 */ - if (WLC_PHY_11N_CAP(wlc->band)) { + if (BRCMS_PHY_11N_CAP(wlc->band)) { u16 phyctl1 = 0; - phyctl1 = wlc_phytxctl1_calc(wlc, rspec[0]); + phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[0]); txh->PhyTxControlWord_1 = cpu_to_le16(phyctl1); - phyctl1 = wlc_phytxctl1_calc(wlc, rspec[1]); + phyctl1 = brcms_c_phytxctl1_calc(wlc, rspec[1]); txh->PhyTxControlWord_1_Fbr = cpu_to_le16(phyctl1); if (use_rts || use_cts) { - phyctl1 = wlc_phytxctl1_calc(wlc, rts_rspec[0]); + phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[0]); txh->PhyTxControlWord_1_Rts = cpu_to_le16(phyctl1); - phyctl1 = wlc_phytxctl1_calc(wlc, rts_rspec[1]); + phyctl1 = brcms_c_phytxctl1_calc(wlc, rts_rspec[1]); txh->PhyTxControlWord_1_FbrRts = cpu_to_le16(phyctl1); } @@ -5654,15 +4163,17 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, * fill in non-zero MModeLen and/or MModeFbrLen * it will be unnecessary if they are separated */ - if (IS_MCS(rspec[0]) && (preamble_type[0] == WLC_MM_PREAMBLE)) { + if (IS_MCS(rspec[0]) && + (preamble_type[0] == BRCMS_MM_PREAMBLE)) { u16 mmodelen = - wlc_calc_lsig_len(wlc, rspec[0], phylen); + brcms_c_calc_lsig_len(wlc, rspec[0], phylen); txh->MModeLen = cpu_to_le16(mmodelen); } - if (IS_MCS(rspec[1]) && (preamble_type[1] == WLC_MM_PREAMBLE)) { + if (IS_MCS(rspec[1]) && + (preamble_type[1] == BRCMS_MM_PREAMBLE)) { u16 mmodefbrlen = - wlc_calc_lsig_len(wlc, rspec[1], phylen); + brcms_c_calc_lsig_len(wlc, rspec[1], phylen); txh->MModeFbrLen = cpu_to_le16(mmodefbrlen); } } @@ -5674,16 +4185,16 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, /* WME: Update TXOP threshold */ if ((!(tx_info->flags & IEEE80211_TX_CTL_AMPDU)) && (frag == 0)) { frag_dur = - wlc_calc_frame_time(wlc, rspec[0], preamble_type[0], - phylen); + brcms_c_calc_frame_time(wlc, rspec[0], + preamble_type[0], phylen); if (rts) { /* 1 RTS or CTS-to-self frame */ dur = - wlc_calc_cts_time(wlc, rts_rspec[0], + brcms_c_calc_cts_time(wlc, rts_rspec[0], rts_preamble_type[0]); dur_fallback = - wlc_calc_cts_time(wlc, rts_rspec[1], + brcms_c_calc_cts_time(wlc, rts_rspec[1], rts_preamble_type[1]); /* (SIFS + CTS) + SIFS + frame + SIFS + ACK */ dur += le16_to_cpu(rts->duration); @@ -5696,15 +4207,15 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, /* frame + SIFS + ACK */ dur = frag_dur; dur += - wlc_compute_frame_dur(wlc, rspec[0], + brcms_c_compute_frame_dur(wlc, rspec[0], preamble_type[0], 0); dur_fallback = - wlc_calc_frame_time(wlc, rspec[1], + brcms_c_calc_frame_time(wlc, rspec[1], preamble_type[1], phylen); dur_fallback += - wlc_compute_frame_dur(wlc, rspec[1], + brcms_c_compute_frame_dur(wlc, rspec[1], preamble_type[1], 0); } /* NEED to set TxFesTimeNormal (hard) */ @@ -5719,12 +4230,10 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, uint newfragthresh; newfragthresh = - wlc_calc_frame_len(wlc, rspec[0], - preamble_type[0], - (wlc-> - edcf_txop[ac] - - (dur - - frag_dur))); + brcms_c_calc_frame_len(wlc, + rspec[0], preamble_type[0], + (wlc->edcf_txop[ac] - + (dur - frag_dur))); /* range bound the fragthreshold */ if (newfragthresh < DOT11_MIN_FRAG_LEN) newfragthresh = @@ -5759,32 +4268,9 @@ wlc_d11hdrs_mac80211(struct wlc_info *wlc, struct ieee80211_hw *hw, return 0; } -void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs) +void brcms_c_tbtt(struct brcms_c_info *wlc) { - struct wlc_bsscfg *cfg = wlc->cfg; - - if (BSSCFG_STA(cfg)) { - /* run watchdog here if the watchdog timer is not armed */ - if (WLC_WATCHDOG_TBTT(wlc)) { - u32 cur, delta; - if (wlc->WDarmed) { - wl_del_timer(wlc->wl, wlc->wdtimer); - wlc->WDarmed = false; - } - - cur = OSL_SYSUPTIME(); - delta = cur > wlc->WDlast ? cur - wlc->WDlast : - (u32) ~0 - wlc->WDlast + cur + 1; - if (delta >= TIMER_INTERVAL_WATCHDOG) { - wlc_watchdog((void *)wlc); - wlc->WDlast = cur; - } - - wl_add_timer(wlc->wl, wlc->wdtimer, - wlc_watchdog_backup_bi(wlc), true); - wlc->WDarmed = true; - } - } + struct brcms_bss_cfg *cfg = wlc->cfg; if (!cfg->BSS) { /* DirFrmQ is now valid...defer setting until end of ATIM window */ @@ -5792,27 +4278,26 @@ void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs) } } -static void wlc_war16165(struct wlc_info *wlc, bool tx) +static void brcms_c_war16165(struct brcms_c_info *wlc, bool tx) { if (tx) { /* the post-increment is used in STAY_AWAKE macro */ if (wlc->txpend16165war++ == 0) - wlc_set_ps_ctrl(wlc); + brcms_c_set_ps_ctrl(wlc); } else { wlc->txpend16165war--; if (wlc->txpend16165war == 0) - wlc_set_ps_ctrl(wlc); + brcms_c_set_ps_ctrl(wlc); } } -/* process an individual tx_status_t */ -/* WLC_HIGH_API */ +/* process an individual struct tx_status */ bool -wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) +brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs, u32 frm_tx2) { struct sk_buff *p; uint queue; - d11txh_t *txh; + struct d11txh *txh; struct scb *scb = NULL; bool free_pdu; int tx_rts, tx_frame_count, tx_rts_count; @@ -5845,21 +4330,21 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) } p = GETNEXTTXP(wlc, queue); - if (WLC_WAR16165(wlc)) - wlc_war16165(wlc, false); + if (BRCMS_WAR16165(wlc)) + brcms_c_war16165(wlc, false); if (p == NULL) goto fatal; - txh = (d11txh_t *) (p->data); + txh = (struct d11txh *) (p->data); mcl = le16_to_cpu(txh->MacTxControlLow); if (txs->phyerr) { if (WL_ERROR_ON()) { wiphy_err(wlc->wiphy, "phyerr 0x%x, rate 0x%x\n", txs->phyerr, txh->MainRates); - wlc_print_txdesc(txh); + brcms_c_print_txdesc(txh); } - wlc_print_txstatus(txs); + brcms_c_print_txstatus(txs); } if (txs->frameid != cpu_to_le16(txh->TxFrameID)) @@ -5871,7 +4356,7 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) scb = (struct scb *)tx_info->control.sta->drv_priv; if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { - wlc_ampdu_dotxstatus(wlc->ampdu, scb, p, txs); + brcms_c_ampdu_dotxstatus(wlc->ampdu, scb, p, txs); return false; } @@ -5892,25 +4377,41 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) if (!lastframe) { wiphy_err(wlc->wiphy, "Not last frame!\n"); } else { - u16 sfbl, lfbl; - ieee80211_tx_info_clear_status(tx_info); + /* + * Set information to be consumed by Minstrel ht. + * + * The "fallback limit" is the number of tx attempts a given + * MPDU is sent at the "primary" rate. Tx attempts beyond that + * limit are sent at the "secondary" rate. + * A 'short frame' does not exceed RTS treshold. + */ + u16 sfbl, /* Short Frame Rate Fallback Limit */ + lfbl, /* Long Frame Rate Fallback Limit */ + fbl; + if (queue < AC_COUNT) { - sfbl = WLC_WME_RETRY_SFB_GET(wlc, wme_fifo2ac[queue]); - lfbl = WLC_WME_RETRY_LFB_GET(wlc, wme_fifo2ac[queue]); + sfbl = BRCMS_WME_RETRY_SFB_GET(wlc, wme_fifo2ac[queue]); + lfbl = BRCMS_WME_RETRY_LFB_GET(wlc, wme_fifo2ac[queue]); } else { sfbl = wlc->SFBL; lfbl = wlc->LFBL; } txrate = tx_info->status.rates; - /* FIXME: this should use a combination of sfbl, lfbl depending on frame length and RTS setting */ - if ((tx_frame_count > sfbl) && (txrate[1].idx >= 0)) { + if (txrate[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) + fbl = lfbl; + else + fbl = sfbl; + + ieee80211_tx_info_clear_status(tx_info); + + if ((tx_frame_count > fbl) && (txrate[1].idx >= 0)) { /* rate selection requested a fallback rate and we used it */ - txrate->count = lfbl; - txrate[1].count = tx_frame_count - lfbl; + txrate[0].count = fbl; + txrate[1].count = tx_frame_count - fbl; } else { /* rate selection did not request fallback rate, or we didn't need it */ - txrate->count = tx_frame_count; + txrate[0].count = tx_frame_count; /* rc80211_minstrel.c:minstrel_tx_status() expects unused rates to be marked with idx = -1 */ txrate[1].idx = -1; txrate[1].count = 0; @@ -5926,15 +4427,14 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) tx_info->flags |= IEEE80211_TX_STAT_ACK; } - totlen = bcm_pkttotlen(p); + totlen = brcmu_pkttotlen(p); free_pdu = true; - wlc_txfifo_complete(wlc, queue, 1); + brcms_c_txfifo_complete(wlc, queue, 1); if (lastframe) { p->next = NULL; p->prev = NULL; - wlc->txretried = 0; /* remove PLCP & Broadcom tx descriptor header */ skb_pull(p, D11_PHY_HDR_LEN); skb_pull(p, D11_TXH_LEN); @@ -5948,48 +4448,42 @@ wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2) fatal: if (p) - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); return true; } void -wlc_txfifo_complete(struct wlc_info *wlc, uint fifo, s8 txpktpend) +brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, s8 txpktpend) { TXPKTPENDDEC(wlc, fifo, txpktpend); BCMMSG(wlc->wiphy, "pktpend dec %d to %d\n", txpktpend, TXPKTPENDGET(wlc, fifo)); /* There is more room; mark precedences related to this FIFO sendable */ - WLC_TX_FIFO_ENAB(wlc, fifo); - - if (!TXPKTPENDTOT(wlc)) { - if (wlc->block_datafifo & DATA_BLOCK_TX_SUPR) - wlc_bsscfg_tx_check(wlc); - } + BRCMS_TX_FIFO_ENAB(wlc, fifo); /* Clear MHF2_TXBCMC_NOW flag if BCMC fifo has drained */ if (AP_ENAB(wlc->pub) && - wlc->bcmcfifo_drain && !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) { - wlc->bcmcfifo_drain = false; - wlc_mhf(wlc, MHF2, MHF2_TXBCMC_NOW, 0, WLC_BAND_AUTO); + !TXPKTPENDGET(wlc, TX_BCMC_FIFO)) { + brcms_c_mhf(wlc, MHF2, MHF2_TXBCMC_NOW, 0, BRCM_BAND_AUTO); } /* figure out which bsscfg is being worked on... */ } /* Update beacon listen interval in shared memory */ -void wlc_bcn_li_upd(struct wlc_info *wlc) +void brcms_c_bcn_li_upd(struct brcms_c_info *wlc) { if (AP_ENAB(wlc->pub)) return; /* wake up every DTIM is the default */ if (wlc->bcn_li_dtim == 1) - wlc_write_shm(wlc, M_BCN_LI, 0); + brcms_c_write_shm(wlc, M_BCN_LI, 0); else - wlc_write_shm(wlc, M_BCN_LI, + brcms_c_write_shm(wlc, M_BCN_LI, (wlc->bcn_li_dtim << 8) | wlc->bcn_li_bcn); } @@ -6003,16 +4497,17 @@ void wlc_bcn_li_upd(struct wlc_info *wlc) * |<---------- tsf_h ----------->||<--- tsf_l -->||<-RxTSFTime ->| * * The RxTSFTime are the lowest 16 bits and provided by the ucode. The - * tsf_l is filled in by wlc_bmac_recv, which is done earlier in the + * tsf_l is filled in by brcms_b_recv, which is done earlier in the * receive call sequence after rx interrupt. Only the higher 16 bits * are used. Finally, the tsf_h is read from the tsf register. */ -static u64 wlc_recover_tsf64(struct wlc_info *wlc, struct wlc_d11rxhdr *rxh) +static u64 brcms_c_recover_tsf64(struct brcms_c_info *wlc, + struct brcms_d11rxhdr *rxh) { u32 tsf_h, tsf_l; u16 rx_tsf_0_15, rx_tsf_16_31; - wlc_bmac_read_tsf(wlc->hw, &tsf_l, &tsf_h); + brcms_b_read_tsf(wlc->hw, &tsf_l, &tsf_h); rx_tsf_16_31 = (u16)(tsf_l >> 16); rx_tsf_0_15 = rxh->rxhdr.RxTSFTime; @@ -6031,20 +4526,21 @@ static u64 wlc_recover_tsf64(struct wlc_info *wlc, struct wlc_d11rxhdr *rxh) } static void -prep_mac80211_status(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p, +prep_mac80211_status(struct brcms_c_info *wlc, struct d11rxhdr *rxh, + struct sk_buff *p, struct ieee80211_rx_status *rx_status) { - wlc_d11rxhdr_t *wlc_rxh = (wlc_d11rxhdr_t *) rxh; + struct brcms_d11rxhdr *wlc_rxh = (struct brcms_d11rxhdr *) rxh; int preamble; int channel; ratespec_t rspec; unsigned char *plcp; /* fill in TSF and flag its presence */ - rx_status->mactime = wlc_recover_tsf64(wlc, wlc_rxh); + rx_status->mactime = brcms_c_recover_tsf64(wlc, wlc_rxh); rx_status->flag |= RX_FLAG_MACTIME_MPDU; - channel = WLC_CHAN_CHANNEL(rxh->RxChan); + channel = BRCMS_CHAN_CHANNEL(rxh->RxChan); if (channel > 14) { rx_status->band = IEEE80211_BAND_5GHZ; @@ -6064,7 +4560,7 @@ prep_mac80211_status(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p, plcp = p->data; - rspec = wlc_compute_rspec(rxh, plcp); + rspec = brcms_c_compute_rspec(rxh, plcp); if (IS_MCS(rspec)) { rx_status->rate_idx = rspec & RSPEC_RATE_MASK; rx_status->flag |= RX_FLAG_HT; @@ -6072,40 +4568,40 @@ prep_mac80211_status(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p, rx_status->flag |= RX_FLAG_40MHZ; } else { switch (RSPEC2RATE(rspec)) { - case WLC_RATE_1M: + case BRCM_RATE_1M: rx_status->rate_idx = 0; break; - case WLC_RATE_2M: + case BRCM_RATE_2M: rx_status->rate_idx = 1; break; - case WLC_RATE_5M5: + case BRCM_RATE_5M5: rx_status->rate_idx = 2; break; - case WLC_RATE_11M: + case BRCM_RATE_11M: rx_status->rate_idx = 3; break; - case WLC_RATE_6M: + case BRCM_RATE_6M: rx_status->rate_idx = 4; break; - case WLC_RATE_9M: + case BRCM_RATE_9M: rx_status->rate_idx = 5; break; - case WLC_RATE_12M: + case BRCM_RATE_12M: rx_status->rate_idx = 6; break; - case WLC_RATE_18M: + case BRCM_RATE_18M: rx_status->rate_idx = 7; break; - case WLC_RATE_24M: + case BRCM_RATE_24M: rx_status->rate_idx = 8; break; - case WLC_RATE_36M: + case BRCM_RATE_36M: rx_status->rate_idx = 9; break; - case WLC_RATE_48M: + case BRCM_RATE_48M: rx_status->rate_idx = 10; break; - case WLC_RATE_54M: + case BRCM_RATE_54M: rx_status->rate_idx = 11; break; default: @@ -6141,7 +4637,8 @@ prep_mac80211_status(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p, } static void -wlc_recvctl(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p) +brcms_c_recvctl(struct brcms_c_info *wlc, struct d11rxhdr *rxh, + struct sk_buff *p) { int len_mpdu; struct ieee80211_rx_status rx_status; @@ -6164,10 +4661,9 @@ wlc_recvctl(struct wlc_info *wlc, d11rxhdr_t *rxh, struct sk_buff *p) * Return true if more frames need to be processed. false otherwise. * Param 'bound' indicates max. # frames to process before break out. */ -/* WLC_HIGH_API */ -void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) +void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p) { - d11rxhdr_t *rxh; + struct d11rxhdr *rxh; struct ieee80211_hdr *h; uint len; bool is_amsdu; @@ -6175,10 +4671,10 @@ void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) BCMMSG(wlc->wiphy, "wl%d\n", wlc->pub->unit); /* frame starts with rxhdr */ - rxh = (d11rxhdr_t *) (p->data); + rxh = (struct d11rxhdr *) (p->data); /* strip off rxhdr */ - skb_pull(p, wlc->hwrxoff); + skb_pull(p, BRCMS_HWRXOFF); /* fixup rx header endianness */ rxh->RxFrameSize = le16_to_cpu(rxh->RxFrameSize); @@ -6196,7 +4692,7 @@ void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) /* MAC inserts 2 pad bytes for a4 headers or QoS or A-MSDU subframes */ if (rxh->RxStatus1 & RXS_PBPRES) { if (p->len < 2) { - wiphy_err(wlc->wiphy, "wl%d: wlc_recv: rcvd runt of " + wiphy_err(wlc->wiphy, "wl%d: recv: rcvd runt of " "len %d\n", wlc->pub->unit, p->len); goto toss; } @@ -6248,11 +4744,11 @@ void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) if (is_amsdu) goto toss; - wlc_recvctl(wlc, rxh, p); + brcms_c_recvctl(wlc, rxh, p); return; toss: - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); } /* calculate frame duration for Mixed-mode L-SIG spoofing, return @@ -6262,7 +4758,8 @@ void wlc_recv(struct wlc_info *wlc, struct sk_buff *p) * len = 3(nsyms + nstream + 3) - 3 */ u16 -wlc_calc_lsig_len(struct wlc_info *wlc, ratespec_t ratespec, uint mac_len) +brcms_c_calc_lsig_len(struct brcms_c_info *wlc, ratespec_t ratespec, + uint mac_len) { uint nsyms, len = 0, kNdps; @@ -6302,8 +4799,8 @@ wlc_calc_lsig_len(struct wlc_info *wlc, ratespec_t ratespec, uint mac_len) /* calculate frame duration of a given rate and length, return time in usec unit */ uint -wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, - uint mac_len) +brcms_c_calc_frame_time(struct brcms_c_info *wlc, ratespec_t ratespec, + u8 preamble_type, uint mac_len) { uint nsyms, dur = 0, Ndps, kNdps; uint rate = RSPEC2RATE(ratespec); @@ -6311,7 +4808,7 @@ wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, if (rate == 0) { wiphy_err(wlc->wiphy, "wl%d: WAR: using rate of 1 mbps\n", wlc->pub->unit); - rate = WLC_RATE_1M; + rate = BRCM_RATE_1M; } BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, preamble_type %d, len%d\n", @@ -6322,7 +4819,7 @@ wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, int tot_streams = MCS_TXS(mcs) + RSPEC_STC(ratespec); dur = PREN_PREAMBLE + (tot_streams * PREN_PREAMBLE_EXT); - if (preamble_type == WLC_MM_PREAMBLE) + if (preamble_type == BRCMS_MM_PREAMBLE) dur += PREN_MM_EXT; /* 1000Ndbps = kbps * 4 */ kNdps = @@ -6361,7 +4858,7 @@ wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, mac_len = mac_len * 8 * 2; /* calc ceiling of bits/rate = microseconds of air time */ dur = (mac_len + rate - 1) / rate; - if (preamble_type & WLC_SHORT_PREAMBLE) + if (preamble_type & BRCMS_SHORT_PREAMBLE) dur += BPHY_PLCP_SHORT_TIME; else dur += BPHY_PLCP_TIME; @@ -6369,10 +4866,10 @@ wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, return dur; } -/* The opposite of wlc_calc_frame_time */ +/* The opposite of brcms_c_calc_frame_time */ static uint -wlc_calc_frame_len(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, - uint dur) +brcms_c_calc_frame_len(struct brcms_c_info *wlc, ratespec_t ratespec, + u8 preamble_type, uint dur) { uint nsyms, mac_len, Ndps, kNdps; uint rate = RSPEC2RATE(ratespec); @@ -6405,7 +4902,7 @@ wlc_calc_frame_len(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, ((nsyms * Ndps) - (APHY_SERVICE_NBITS + APHY_TAIL_NBITS)) / 8; } else { - if (preamble_type & WLC_SHORT_PREAMBLE) + if (preamble_type & BRCMS_SHORT_PREAMBLE) dur -= BPHY_PLCP_SHORT_TIME; else dur -= BPHY_PLCP_TIME; @@ -6417,22 +4914,24 @@ wlc_calc_frame_len(struct wlc_info *wlc, ratespec_t ratespec, u8 preamble_type, } static uint -wlc_calc_ba_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) +brcms_c_calc_ba_time(struct brcms_c_info *wlc, ratespec_t rspec, + u8 preamble_type) { BCMMSG(wlc->wiphy, "wl%d: rspec 0x%x, " "preamble_type %d\n", wlc->pub->unit, rspec, preamble_type); /* Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that is less than * or equal to the rate of the immediately previous frame in the FES */ - rspec = WLC_BASIC_RATE(wlc, rspec); + rspec = BRCMS_BASIC_RATE(wlc, rspec); /* BA len == 32 == 16(ctl hdr) + 4(ba len) + 8(bitmap) + 4(fcs) */ - return wlc_calc_frame_time(wlc, rspec, preamble_type, + return brcms_c_calc_frame_time(wlc, rspec, preamble_type, (DOT11_BA_LEN + DOT11_BA_BITMAP_LEN + FCS_LEN)); } static uint -wlc_calc_ack_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) +brcms_c_calc_ack_time(struct brcms_c_info *wlc, ratespec_t rspec, + u8 preamble_type) { uint dur = 0; @@ -6441,24 +4940,25 @@ wlc_calc_ack_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) /* Spec 9.6: ack rate is the highest rate in BSSBasicRateSet that is less than * or equal to the rate of the immediately previous frame in the FES */ - rspec = WLC_BASIC_RATE(wlc, rspec); + rspec = BRCMS_BASIC_RATE(wlc, rspec); /* ACK frame len == 14 == 2(fc) + 2(dur) + 6(ra) + 4(fcs) */ dur = - wlc_calc_frame_time(wlc, rspec, preamble_type, + brcms_c_calc_frame_time(wlc, rspec, preamble_type, (DOT11_ACK_LEN + FCS_LEN)); return dur; } static uint -wlc_calc_cts_time(struct wlc_info *wlc, ratespec_t rspec, u8 preamble_type) +brcms_c_calc_cts_time(struct brcms_c_info *wlc, ratespec_t rspec, + u8 preamble_type) { BCMMSG(wlc->wiphy, "wl%d: ratespec 0x%x, preamble_type %d\n", wlc->pub->unit, rspec, preamble_type); - return wlc_calc_ack_time(wlc, rspec, preamble_type); + return brcms_c_calc_ack_time(wlc, rspec, preamble_type); } /* derive wlc->band->basic_rate[] table from 'rateset' */ -void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset) +void brcms_c_rate_lookup_init(struct brcms_c_info *wlc, wlc_rateset_t *rateset) { u8 rate; u8 mandatory; @@ -6468,22 +4968,22 @@ void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset) uint i; /* incoming rates are in 500kbps units as in 802.11 Supported Rates */ - memset(br, 0, WLC_MAXRATE + 1); + memset(br, 0, BRCM_MAXRATE + 1); /* For each basic rate in the rates list, make an entry in the * best basic lookup. */ for (i = 0; i < rateset->count; i++) { /* only make an entry for a basic rate */ - if (!(rateset->rates[i] & WLC_RATE_FLAG)) + if (!(rateset->rates[i] & BRCMS_RATE_FLAG)) continue; /* mask off basic bit */ - rate = (rateset->rates[i] & WLC_RATE_MASK); + rate = (rateset->rates[i] & BRCMS_RATE_MASK); - if (rate > WLC_MAXRATE) { - wiphy_err(wlc->wiphy, "wlc_rate_lookup_init: invalid " - "rate 0x%X in rate set\n", + if (rate > BRCM_MAXRATE) { + wiphy_err(wlc->wiphy, "brcms_c_rate_lookup_init: " + "invalid rate 0x%X in rate set\n", rateset->rates[i]); continue; } @@ -6533,12 +5033,12 @@ void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset) if (IS_OFDM(rate)) { /* In 11g and 11a, the OFDM mandatory rates are 6, 12, and 24 Mbps */ - if (rate >= WLC_RATE_24M) - mandatory = WLC_RATE_24M; - else if (rate >= WLC_RATE_12M) - mandatory = WLC_RATE_12M; + if (rate >= BRCM_RATE_24M) + mandatory = BRCM_RATE_24M; + else if (rate >= BRCM_RATE_12M) + mandatory = BRCM_RATE_12M; else - mandatory = WLC_RATE_6M; + mandatory = BRCM_RATE_6M; } else { /* In 11b, all the CCK rates are mandatory 1 - 11 Mbps */ mandatory = rate; @@ -6548,7 +5048,8 @@ void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset) } } -static void wlc_write_rate_shm(struct wlc_info *wlc, u8 rate, u8 basic_rate) +static void brcms_c_write_rate_shm(struct brcms_c_info *wlc, u8 rate, + u8 basic_rate) { u8 phy_rate, index; u8 basic_phy_rate, basic_index; @@ -6565,27 +5066,27 @@ static void wlc_write_rate_shm(struct wlc_info *wlc, u8 rate, u8 basic_rate) * for a given rate, the LS-nibble of the PLCP SIGNAL field is * the index into the rate table. */ - phy_rate = rate_info[rate] & WLC_RATE_MASK; - basic_phy_rate = rate_info[basic_rate] & WLC_RATE_MASK; + phy_rate = rate_info[rate] & BRCMS_RATE_MASK; + basic_phy_rate = rate_info[basic_rate] & BRCMS_RATE_MASK; index = phy_rate & 0xf; basic_index = basic_phy_rate & 0xf; /* Find the SHM pointer to the ACK rate entry by looking in the * Direct-map Table */ - basic_ptr = wlc_read_shm(wlc, (dir_table + basic_index * 2)); + basic_ptr = brcms_c_read_shm(wlc, (dir_table + basic_index * 2)); /* Update the SHM BSS-basic-rate-set mapping table with the pointer * to the correct basic rate for the given incoming rate */ - wlc_write_shm(wlc, (basic_table + index * 2), basic_ptr); + brcms_c_write_shm(wlc, (basic_table + index * 2), basic_ptr); } -static const wlc_rateset_t *wlc_rateset_get_hwrs(struct wlc_info *wlc) +static const wlc_rateset_t *brcms_c_rateset_get_hwrs(struct brcms_c_info *wlc) { const wlc_rateset_t *rs_dflt; - if (WLC_PHY_11N_CAP(wlc->band)) { + if (BRCMS_PHY_11N_CAP(wlc->band)) { if (BAND_5G(wlc->band->bandtype)) rs_dflt = &ofdm_mimo_rates; else @@ -6598,48 +5099,48 @@ static const wlc_rateset_t *wlc_rateset_get_hwrs(struct wlc_info *wlc) return rs_dflt; } -void wlc_set_ratetable(struct wlc_info *wlc) +void brcms_c_set_ratetable(struct brcms_c_info *wlc) { const wlc_rateset_t *rs_dflt; wlc_rateset_t rs; u8 rate, basic_rate; uint i; - rs_dflt = wlc_rateset_get_hwrs(wlc); + rs_dflt = brcms_c_rateset_get_hwrs(wlc); - wlc_rateset_copy(rs_dflt, &rs); - wlc_rateset_mcs_upd(&rs, wlc->stf->txstreams); + brcms_c_rateset_copy(rs_dflt, &rs); + brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams); /* walk the phy rate table and update SHM basic rate lookup table */ for (i = 0; i < rs.count; i++) { - rate = rs.rates[i] & WLC_RATE_MASK; + rate = rs.rates[i] & BRCMS_RATE_MASK; - /* for a given rate WLC_BASIC_RATE returns the rate at + /* for a given rate BRCMS_BASIC_RATE returns the rate at * which a response ACK/CTS should be sent. */ - basic_rate = WLC_BASIC_RATE(wlc, rate); + basic_rate = BRCMS_BASIC_RATE(wlc, rate); if (basic_rate == 0) { /* This should only happen if we are using a * restricted rateset. */ - basic_rate = rs.rates[0] & WLC_RATE_MASK; + basic_rate = rs.rates[0] & BRCMS_RATE_MASK; } - wlc_write_rate_shm(wlc, rate, basic_rate); + brcms_c_write_rate_shm(wlc, rate, basic_rate); } } /* * Return true if the specified rate is supported by the specified band. - * WLC_BAND_AUTO indicates the current band. + * BRCM_BAND_AUTO indicates the current band. */ -bool wlc_valid_rate(struct wlc_info *wlc, ratespec_t rspec, int band, +bool brcms_c_valid_rate(struct brcms_c_info *wlc, ratespec_t rspec, int band, bool verbose) { wlc_rateset_t *hw_rateset; uint i; - if ((band == WLC_BAND_AUTO) || (band == wlc->band->bandtype)) { + if ((band == BRCM_BAND_AUTO) || (band == wlc->band->bandtype)) { hw_rateset = &wlc->band->hw_rateset; } else if (NBANDS(wlc) > 1) { hw_rateset = &wlc->bandstate[OTHERBANDUNIT(wlc)]->hw_rateset; @@ -6661,40 +5162,38 @@ bool wlc_valid_rate(struct wlc_info *wlc, ratespec_t rspec, int band, return true; error: if (verbose) { - wiphy_err(wlc->wiphy, "wl%d: wlc_valid_rate: rate spec 0x%x " + wiphy_err(wlc->wiphy, "wl%d: valid_rate: rate spec 0x%x " "not in hw_rateset\n", wlc->pub->unit, rspec); } return false; } -static void wlc_update_mimo_band_bwcap(struct wlc_info *wlc, u8 bwcap) +static void brcms_c_update_mimo_band_bwcap(struct brcms_c_info *wlc, u8 bwcap) { uint i; - struct wlcband *band; + struct brcms_band *band; for (i = 0; i < NBANDS(wlc); i++) { if (IS_SINGLEBAND_5G(wlc->deviceid)) i = BAND_5G_INDEX; band = wlc->bandstate[i]; - if (band->bandtype == WLC_BAND_5G) { - if ((bwcap == WLC_N_BW_40ALL) - || (bwcap == WLC_N_BW_20IN2G_40IN5G)) + if (band->bandtype == BRCM_BAND_5G) { + if ((bwcap == BRCMS_N_BW_40ALL) + || (bwcap == BRCMS_N_BW_20IN2G_40IN5G)) band->mimo_cap_40 = true; else band->mimo_cap_40 = false; } else { - if (bwcap == WLC_N_BW_40ALL) + if (bwcap == BRCMS_N_BW_40ALL) band->mimo_cap_40 = true; else band->mimo_cap_40 = false; } } - - wlc->mimo_band_bwcap = bwcap; } -void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len) +void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, uint frame_len) { const wlc_rateset_t *rs_dflt; wlc_rateset_t rs; @@ -6706,32 +5205,31 @@ void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len) sifs = SIFS(wlc->band); - rs_dflt = wlc_rateset_get_hwrs(wlc); + rs_dflt = brcms_c_rateset_get_hwrs(wlc); - wlc_rateset_copy(rs_dflt, &rs); - wlc_rateset_mcs_upd(&rs, wlc->stf->txstreams); + brcms_c_rateset_copy(rs_dflt, &rs); + brcms_c_rateset_mcs_upd(&rs, wlc->stf->txstreams); /* walk the phy rate table and update MAC core SHM basic rate table entries */ for (i = 0; i < rs.count; i++) { - rate = rs.rates[i] & WLC_RATE_MASK; + rate = rs.rates[i] & BRCMS_RATE_MASK; - entry_ptr = wlc_rate_shm_offset(wlc, rate); + entry_ptr = brcms_c_rate_shm_offset(wlc, rate); /* Calculate the Probe Response PLCP for the given rate */ - wlc_compute_plcp(wlc, rate, frame_len, plcp); + brcms_c_compute_plcp(wlc, rate, frame_len, plcp); /* Calculate the duration of the Probe Response frame plus SIFS for the MAC */ - dur = - (u16) wlc_calc_frame_time(wlc, rate, WLC_LONG_PREAMBLE, - frame_len); + dur = (u16) brcms_c_calc_frame_time(wlc, rate, + BRCMS_LONG_PREAMBLE, frame_len); dur += sifs; /* Update the SHM Rate Table entry Probe Response values */ - wlc_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS, + brcms_c_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS, (u16) (plcp[0] + (plcp[1] << 8))); - wlc_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS + 2, + brcms_c_write_shm(wlc, entry_ptr + M_RT_PRS_PLCP_POS + 2, (u16) (plcp[2] + (plcp[3] << 8))); - wlc_write_shm(wlc, entry_ptr + M_RT_PRS_DUR_POS, dur); + brcms_c_write_shm(wlc, entry_ptr + M_RT_PRS_DUR_POS, dur); } } @@ -6748,11 +5246,12 @@ void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len) * and included up to, but not including, the 4 byte FCS. */ static void -wlc_bcn_prb_template(struct wlc_info *wlc, u16 type, ratespec_t bcn_rspec, - struct wlc_bsscfg *cfg, u16 *buf, int *len) +brcms_c_bcn_prb_template(struct brcms_c_info *wlc, u16 type, + ratespec_t bcn_rspec, + struct brcms_bss_cfg *cfg, u16 *buf, int *len) { static const u8 ether_bcast[ETH_ALEN] = {255, 255, 255, 255, 255, 255}; - cck_phy_hdr_t *plcp; + struct cck_phy_hdr *plcp; struct ieee80211_mgmt *h; int hdr_len, body_len; @@ -6767,12 +5266,12 @@ wlc_bcn_prb_template(struct wlc_info *wlc, u16 type, ratespec_t bcn_rspec, /* format PHY and MAC headers */ memset((char *)buf, 0, hdr_len); - plcp = (cck_phy_hdr_t *) buf; + plcp = (struct cck_phy_hdr *) buf; /* PLCP for Probe Response frames are filled in from core's rate table */ if (type == IEEE80211_STYPE_BEACON && !MBSS_BCN_ENAB(cfg)) { /* fill in PLCP */ - wlc_compute_plcp(wlc, bcn_rspec, + brcms_c_compute_plcp(wlc, bcn_rspec, (DOT11_MAC_HDR_LEN + body_len + FCS_LEN), (u8 *) plcp); @@ -6780,7 +5279,7 @@ wlc_bcn_prb_template(struct wlc_info *wlc, u16 type, ratespec_t bcn_rspec, /* "Regular" and 16 MBSS but not for 4 MBSS */ /* Update the phytxctl for the beacon based on the rspec */ if (!SOFTBCN_ENAB(cfg)) - wlc_beacon_phytxctl_txant_upd(wlc, bcn_rspec); + brcms_c_beacon_phytxctl_txant_upd(wlc, bcn_rspec); if (MBSS_BCN_ENAB(cfg) && type == IEEE80211_STYPE_BEACON) h = (struct ieee80211_mgmt *)&plcp[0]; @@ -6802,7 +5301,7 @@ wlc_bcn_prb_template(struct wlc_info *wlc, u16 type, ratespec_t bcn_rspec, return; } -int wlc_get_header_len() +int brcms_c_get_header_len() { return TXOFF; } @@ -6812,7 +5311,8 @@ int wlc_get_header_len() * template updated. * Otherwise, it updates the hardware template. */ -void wlc_bss_update_beacon(struct wlc_info *wlc, struct wlc_bsscfg *cfg) +void brcms_c_bss_update_beacon(struct brcms_c_info *wlc, + struct brcms_bss_cfg *cfg) { int len = BCN_TMPL_LEN; @@ -6846,31 +5346,31 @@ void wlc_bss_update_beacon(struct wlc_info *wlc, struct wlc_bsscfg *cfg) } wlc->bcn_rspec = - wlc_lowest_basic_rspec(wlc, &cfg->current_bss->rateset); + brcms_c_lowest_basic_rspec(wlc, &cfg->current_bss->rateset); /* update the template and ucode shm */ - wlc_bcn_prb_template(wlc, IEEE80211_STYPE_BEACON, + brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_BEACON, wlc->bcn_rspec, cfg, bcn, &len); - wlc_write_hw_bcntemplates(wlc, bcn, len, false); + brcms_c_write_hw_bcntemplates(wlc, bcn, len, false); } } /* * Update all beacons for the system. */ -void wlc_update_beacon(struct wlc_info *wlc) +void brcms_c_update_beacon(struct brcms_c_info *wlc) { int idx; - struct wlc_bsscfg *bsscfg; + struct brcms_bss_cfg *bsscfg; /* update AP or IBSS beacons */ FOREACH_BSS(wlc, idx, bsscfg) { if (bsscfg->up && (BSSCFG_AP(bsscfg) || !bsscfg->BSS)) - wlc_bss_update_beacon(wlc, bsscfg); + brcms_c_bss_update_beacon(wlc, bsscfg); } } /* Write ssid into shared memory */ -void wlc_shm_ssid_upd(struct wlc_info *wlc, struct wlc_bsscfg *cfg) +void brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, struct brcms_bss_cfg *cfg) { u8 *ssidptr = cfg->SSID; u16 base = M_SSID; @@ -6880,27 +5380,28 @@ void wlc_shm_ssid_upd(struct wlc_info *wlc, struct wlc_bsscfg *cfg) memset(ssidbuf, 0, IEEE80211_MAX_SSID_LEN); memcpy(ssidbuf, ssidptr, cfg->SSID_len); - wlc_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN); + brcms_c_copyto_shm(wlc, base, ssidbuf, IEEE80211_MAX_SSID_LEN); if (!MBSS_BCN_ENAB(cfg)) - wlc_write_shm(wlc, M_SSIDLEN, (u16) cfg->SSID_len); + brcms_c_write_shm(wlc, M_SSIDLEN, (u16) cfg->SSID_len); } -void wlc_update_probe_resp(struct wlc_info *wlc, bool suspend) +void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend) { int idx; - struct wlc_bsscfg *bsscfg; + struct brcms_bss_cfg *bsscfg; /* update AP or IBSS probe responses */ FOREACH_BSS(wlc, idx, bsscfg) { if (bsscfg->up && (BSSCFG_AP(bsscfg) || !bsscfg->BSS)) - wlc_bss_update_probe_resp(wlc, bsscfg, suspend); + brcms_c_bss_update_probe_resp(wlc, bsscfg, suspend); } } void -wlc_bss_update_probe_resp(struct wlc_info *wlc, struct wlc_bsscfg *cfg, - bool suspend) +brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc, + struct brcms_bss_cfg *cfg, + bool suspend) { u16 prb_resp[BCN_TMPL_LEN / 2]; int len = BCN_TMPL_LEN; @@ -6909,49 +5410,51 @@ wlc_bss_update_probe_resp(struct wlc_info *wlc, struct wlc_bsscfg *cfg, if (!MBSS_PRB_ENAB(cfg)) { /* create the probe response template */ - wlc_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0, cfg, - prb_resp, &len); + brcms_c_bcn_prb_template(wlc, IEEE80211_STYPE_PROBE_RESP, 0, + cfg, prb_resp, &len); if (suspend) - wlc_suspend_mac_and_wait(wlc); + brcms_c_suspend_mac_and_wait(wlc); /* write the probe response into the template region */ - wlc_bmac_write_template_ram(wlc->hw, T_PRS_TPL_BASE, + brcms_b_write_template_ram(wlc->hw, T_PRS_TPL_BASE, (len + 3) & ~3, prb_resp); /* write the length of the probe response frame (+PLCP/-FCS) */ - wlc_write_shm(wlc, M_PRB_RESP_FRM_LEN, (u16) len); + brcms_c_write_shm(wlc, M_PRB_RESP_FRM_LEN, (u16) len); /* write the SSID and SSID length */ - wlc_shm_ssid_upd(wlc, cfg); + brcms_c_shm_ssid_upd(wlc, cfg); /* * Write PLCP headers and durations for probe response frames at all rates. * Use the actual frame length covered by the PLCP header for the call to - * wlc_mod_prb_rsp_rate_table() by subtracting the PLCP len and adding the FCS. + * brcms_c_mod_prb_rsp_rate_table() by subtracting the PLCP len + * and adding the FCS. */ len += (-D11_PHY_HDR_LEN + FCS_LEN); - wlc_mod_prb_rsp_rate_table(wlc, (u16) len); + brcms_c_mod_prb_rsp_rate_table(wlc, (u16) len); if (suspend) - wlc_enable_mac(wlc); + brcms_c_enable_mac(wlc); } else { /* Generating probe resp in sw; update local template */ /* error: No software probe response support without MBSS */ } } /* prepares pdu for transmission. returns BCM error codes */ -int wlc_prep_pdu(struct wlc_info *wlc, struct sk_buff *pdu, uint *fifop) +int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, uint *fifop) { uint fifo; - d11txh_t *txh; + struct d11txh *txh; struct ieee80211_hdr *h; struct scb *scb; - txh = (d11txh_t *) (pdu->data); + txh = (struct d11txh *) (pdu->data); h = (struct ieee80211_hdr *)((u8 *) (txh + 1) + D11_PHY_HDR_LEN); - /* get the pkt queue info. This was put at wlc_sendctl or wlc_send for PDU */ + /* get the pkt queue info. This was put at brcms_c_sendctl or + * brcms_c_send for PDU */ fifo = le16_to_cpu(txh->TxFrameID) & TXFID_QUEUE_MASK; scb = NULL; @@ -6961,87 +5464,49 @@ int wlc_prep_pdu(struct wlc_info *wlc, struct sk_buff *pdu, uint *fifop) /* return if insufficient dma resources */ if (TXAVAIL(wlc, fifo) < MAX_DMA_SEGS) { /* Mark precedences related to this FIFO, unsendable */ - WLC_TX_FIFO_CLEAR(wlc, fifo); + BRCMS_TX_FIFO_CLEAR(wlc, fifo); return -EBUSY; } return 0; } /* init tx reported rate mechanism */ -void wlc_reprate_init(struct wlc_info *wlc) +void brcms_c_reprate_init(struct brcms_c_info *wlc) { int i; - struct wlc_bsscfg *bsscfg; + struct brcms_bss_cfg *bsscfg; FOREACH_BSS(wlc, i, bsscfg) { - wlc_bsscfg_reprate_init(bsscfg); + brcms_c_bsscfg_reprate_init(bsscfg); } } /* per bsscfg init tx reported rate mechanism */ -void wlc_bsscfg_reprate_init(struct wlc_bsscfg *bsscfg) +void brcms_c_bsscfg_reprate_init(struct brcms_bss_cfg *bsscfg) { bsscfg->txrspecidx = 0; memset((char *)bsscfg->txrspec, 0, sizeof(bsscfg->txrspec)); } -/* Retrieve a consolidated set of revision information, - * typically for the WLC_GET_REVINFO ioctl - */ -int wlc_get_revision_info(struct wlc_info *wlc, void *buf, uint len) -{ - wlc_rev_info_t *rinfo = (wlc_rev_info_t *) buf; - - if (len < WL_REV_INFO_LEGACY_LENGTH) - return -EOVERFLOW; - - rinfo->vendorid = wlc->vendorid; - rinfo->deviceid = wlc->deviceid; - rinfo->radiorev = (wlc->band->radiorev << IDCODE_REV_SHIFT) | - (wlc->band->radioid << IDCODE_ID_SHIFT); - rinfo->chiprev = wlc->pub->sih->chiprev; - rinfo->corerev = wlc->pub->corerev; - rinfo->boardid = wlc->pub->sih->boardtype; - rinfo->boardvendor = wlc->pub->sih->boardvendor; - rinfo->boardrev = wlc->pub->boardrev; - rinfo->ucoderev = wlc->ucode_rev; - rinfo->driverrev = EPI_VERSION_NUM; - rinfo->bus = wlc->pub->sih->bustype; - rinfo->chipnum = wlc->pub->sih->chip; - - if (len >= (offsetof(wlc_rev_info_t, chippkg))) { - rinfo->phytype = wlc->band->phytype; - rinfo->phyrev = wlc->band->phyrev; - rinfo->anarev = 0; /* obsolete stuff, suppress */ - } - - if (len >= sizeof(*rinfo)) { - rinfo->chippkg = wlc->pub->sih->chippkg; - } - - return 0; -} - -void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs) +void brcms_default_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs) { - wlc_rateset_default(rs, NULL, wlc->band->phytype, wlc->band->bandtype, - false, WLC_RATE_MASK_FULL, (bool) N_ENAB(wlc->pub), - CHSPEC_WLC_BW(wlc->default_bss->chanspec), - wlc->stf->txstreams); + brcms_c_rateset_default(rs, NULL, wlc->band->phytype, + wlc->band->bandtype, false, BRCMS_RATE_MASK_FULL, + (bool) N_ENAB(wlc->pub), + CHSPEC_WLC_BW(wlc->default_bss->chanspec), + wlc->stf->txstreams); } -static void wlc_bss_default_init(struct wlc_info *wlc) +static void brcms_c_bss_default_init(struct brcms_c_info *wlc) { chanspec_t chanspec; - struct wlcband *band; - wlc_bss_info_t *bi = wlc->default_bss; + struct brcms_band *band; + struct brcms_bss_info *bi = wlc->default_bss; /* init default and target BSS with some sane initial values */ - memset((char *)(bi), 0, sizeof(wlc_bss_info_t)); - bi->beacon_period = ISSIM_ENAB(wlc->pub->sih) ? BEACON_INTERVAL_DEF_QT : - BEACON_INTERVAL_DEFAULT; - bi->dtim_period = ISSIM_ENAB(wlc->pub->sih) ? DTIM_INTERVAL_DEF_QT : - DTIM_INTERVAL_DEFAULT; + memset((char *)(bi), 0, sizeof(struct brcms_bss_info)); + bi->beacon_period = BEACON_INTERVAL_DEFAULT; + bi->dtim_period = DTIM_INTERVAL_DEFAULT; /* fill the default channel as the first valid channel * starting from the 2G channels @@ -7051,20 +5516,21 @@ static void wlc_bss_default_init(struct wlc_info *wlc) /* find the band of our default channel */ band = wlc->band; - if (NBANDS(wlc) > 1 && band->bandunit != CHSPEC_WLCBANDUNIT(chanspec)) + if (NBANDS(wlc) > 1 && band->bandunit != CHSPEC_BANDUNIT(chanspec)) band = wlc->bandstate[OTHERBANDUNIT(wlc)]; /* init bss rates to the band specific default rate set */ - wlc_rateset_default(&bi->rateset, NULL, band->phytype, band->bandtype, - false, WLC_RATE_MASK_FULL, (bool) N_ENAB(wlc->pub), - CHSPEC_WLC_BW(chanspec), wlc->stf->txstreams); + brcms_c_rateset_default(&bi->rateset, NULL, band->phytype, + band->bandtype, false, BRCMS_RATE_MASK_FULL, + (bool) N_ENAB(wlc->pub), CHSPEC_WLC_BW(chanspec), + wlc->stf->txstreams); if (N_ENAB(wlc->pub)) - bi->flags |= WLC_BSS_HT; + bi->flags |= BRCMS_BSS_HT; } static ratespec_t -mac80211_wlc_set_nrate(struct wlc_info *wlc, struct wlcband *cur_band, +mac80211_wlc_set_nrate(struct brcms_c_info *wlc, struct brcms_band *cur_band, u32 int_val) { u8 stf = (int_val & NRATE_STF_MASK) >> NRATE_STF_SHIFT; @@ -7085,7 +5551,7 @@ mac80211_wlc_set_nrate(struct wlc_info *wlc, struct wlcband *cur_band, /* mcs only allowed when nmode */ if (stf > PHY_TXC1_MODE_SDM) { wiphy_err(wlc->wiphy, "wl%d: %s: Invalid stf\n", - WLCWLUNIT(wlc), __func__); + BRCMS_UNIT(wlc), __func__); bcmerror = -EINVAL; goto done; } @@ -7096,7 +5562,7 @@ mac80211_wlc_set_nrate(struct wlc_info *wlc, struct wlcband *cur_band, ((stf != PHY_TXC1_MODE_SISO) && (stf != PHY_TXC1_MODE_CDD))) { wiphy_err(wlc->wiphy, "wl%d: %s: Invalid mcs " - "32\n", WLCWLUNIT(wlc), __func__); + "32\n", BRCMS_UNIT(wlc), __func__); bcmerror = -EINVAL; goto done; } @@ -7106,16 +5572,16 @@ mac80211_wlc_set_nrate(struct wlc_info *wlc, struct wlcband *cur_band, if (stf != PHY_TXC1_MODE_SDM) { BCMMSG(wlc->wiphy, "wl%d: enabling " "SDM mode for mcs %d\n", - WLCWLUNIT(wlc), rate); + BRCMS_UNIT(wlc), rate); stf = PHY_TXC1_MODE_SDM; } } else { /* MCS 0-7 may use SISO, CDD, and for phy_rev >= 3 STBC */ if ((stf > PHY_TXC1_MODE_STBC) || - (!WLC_STBC_CAP_PHY(wlc) + (!BRCMS_STBC_CAP_PHY(wlc) && (stf == PHY_TXC1_MODE_STBC))) { wiphy_err(wlc->wiphy, "wl%d: %s: Invalid STBC" - "\n", WLCWLUNIT(wlc), __func__); + "\n", BRCMS_UNIT(wlc), __func__); bcmerror = -EINVAL; goto done; } @@ -7123,28 +5589,28 @@ mac80211_wlc_set_nrate(struct wlc_info *wlc, struct wlcband *cur_band, } else if (IS_OFDM(rate)) { if ((stf != PHY_TXC1_MODE_CDD) && (stf != PHY_TXC1_MODE_SISO)) { wiphy_err(wlc->wiphy, "wl%d: %s: Invalid OFDM\n", - WLCWLUNIT(wlc), __func__); + BRCMS_UNIT(wlc), __func__); bcmerror = -EINVAL; goto done; } } else if (IS_CCK(rate)) { - if ((cur_band->bandtype != WLC_BAND_2G) + if ((cur_band->bandtype != BRCM_BAND_2G) || (stf != PHY_TXC1_MODE_SISO)) { wiphy_err(wlc->wiphy, "wl%d: %s: Invalid CCK\n", - WLCWLUNIT(wlc), __func__); + BRCMS_UNIT(wlc), __func__); bcmerror = -EINVAL; goto done; } } else { wiphy_err(wlc->wiphy, "wl%d: %s: Unknown rate type\n", - WLCWLUNIT(wlc), __func__); + BRCMS_UNIT(wlc), __func__); bcmerror = -EINVAL; goto done; } /* make sure multiple antennae are available for non-siso rates */ if ((stf != PHY_TXC1_MODE_SISO) && (wlc->stf->txstreams == 1)) { wiphy_err(wlc->wiphy, "wl%d: %s: SISO antenna but !SISO " - "request\n", WLCWLUNIT(wlc), __func__); + "request\n", BRCMS_UNIT(wlc), __func__); bcmerror = -EINVAL; goto done; } @@ -7169,7 +5635,7 @@ mac80211_wlc_set_nrate(struct wlc_info *wlc, struct wlcband *cur_band, rspec |= RSPEC_SHORT_GI; if ((rate != 0) - && !wlc_valid_rate(wlc, rspec, cur_band->bandtype, true)) { + && !brcms_c_valid_rate(wlc, rspec, cur_band->bandtype, true)) { return rate; } @@ -7180,7 +5646,7 @@ done: /* formula: IDLE_BUSY_RATIO_X_16 = (100-duty_cycle)/duty_cycle*16 */ static int -wlc_duty_cycle_set(struct wlc_info *wlc, int duty_cycle, bool isOFDM, +brcms_c_duty_cycle_set(struct brcms_c_info *wlc, int duty_cycle, bool isOFDM, bool writeToShm) { int idle_busy_ratio_x_16 = 0; @@ -7196,7 +5662,7 @@ wlc_duty_cycle_set(struct wlc_info *wlc, int duty_cycle, bool isOFDM, idle_busy_ratio_x_16 = (100 - duty_cycle) * 16 / duty_cycle; /* Only write to shared memory when wl is up */ if (writeToShm) - wlc_write_shm(wlc, offset, (u16) idle_busy_ratio_x_16); + brcms_c_write_shm(wlc, offset, (u16) idle_busy_ratio_x_16); if (isOFDM) wlc->tx_duty_cycle_ofdm = (u16) duty_cycle; @@ -7209,97 +5675,85 @@ wlc_duty_cycle_set(struct wlc_info *wlc, int duty_cycle, bool isOFDM, /* Read a single u16 from shared memory. * SHM 'offset' needs to be an even address */ -u16 wlc_read_shm(struct wlc_info *wlc, uint offset) +u16 brcms_c_read_shm(struct brcms_c_info *wlc, uint offset) { - return wlc_bmac_read_shm(wlc->hw, offset); + return brcms_b_read_shm(wlc->hw, offset); } /* Write a single u16 to shared memory. * SHM 'offset' needs to be an even address */ -void wlc_write_shm(struct wlc_info *wlc, uint offset, u16 v) +void brcms_c_write_shm(struct brcms_c_info *wlc, uint offset, u16 v) { - wlc_bmac_write_shm(wlc->hw, offset, v); + brcms_b_write_shm(wlc->hw, offset, v); } /* Copy a buffer to shared memory. * SHM 'offset' needs to be an even address and * Buffer length 'len' must be an even number of bytes */ -void wlc_copyto_shm(struct wlc_info *wlc, uint offset, const void *buf, int len) +void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset, const void *buf, + int len) { /* offset and len need to be even */ if (len <= 0 || (offset & 1) || (len & 1)) return; - wlc_bmac_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL); + brcms_b_copyto_objmem(wlc->hw, offset, buf, len, OBJADDR_SHM_SEL); } /* wrapper BMAC functions to for HIGH driver access */ -void wlc_mctrl(struct wlc_info *wlc, u32 mask, u32 val) +void brcms_c_mctrl(struct brcms_c_info *wlc, u32 mask, u32 val) { - wlc_bmac_mctrl(wlc->hw, mask, val); + brcms_b_mctrl(wlc->hw, mask, val); } -void wlc_mhf(struct wlc_info *wlc, u8 idx, u16 mask, u16 val, int bands) +void brcms_c_mhf(struct brcms_c_info *wlc, u8 idx, u16 mask, u16 val, int bands) { - wlc_bmac_mhf(wlc->hw, idx, mask, val, bands); + brcms_b_mhf(wlc->hw, idx, mask, val, bands); } -int wlc_xmtfifo_sz_get(struct wlc_info *wlc, uint fifo, uint *blocks) +int brcms_c_xmtfifo_sz_get(struct brcms_c_info *wlc, uint fifo, uint *blocks) { - return wlc_bmac_xmtfifo_sz_get(wlc->hw, fifo, blocks); + return brcms_b_xmtfifo_sz_get(wlc->hw, fifo, blocks); } -void wlc_write_template_ram(struct wlc_info *wlc, int offset, int len, +void brcms_c_write_template_ram(struct brcms_c_info *wlc, int offset, int len, void *buf) { - wlc_bmac_write_template_ram(wlc->hw, offset, len, buf); + brcms_b_write_template_ram(wlc->hw, offset, len, buf); } -void wlc_write_hw_bcntemplates(struct wlc_info *wlc, void *bcn, int len, +void brcms_c_write_hw_bcntemplates(struct brcms_c_info *wlc, void *bcn, int len, bool both) { - wlc_bmac_write_hw_bcntemplates(wlc->hw, bcn, len, both); + brcms_b_write_hw_bcntemplates(wlc->hw, bcn, len, both); } void -wlc_set_addrmatch(struct wlc_info *wlc, int match_reg_offset, +brcms_c_set_addrmatch(struct brcms_c_info *wlc, int match_reg_offset, const u8 *addr) { - wlc_bmac_set_addrmatch(wlc->hw, match_reg_offset, addr); + brcms_b_set_addrmatch(wlc->hw, match_reg_offset, addr); if (match_reg_offset == RCM_BSSID_OFFSET) memcpy(wlc->cfg->BSSID, addr, ETH_ALEN); } -void wlc_set_cwmin(struct wlc_info *wlc, u16 newmin) +void brcms_c_pllreq(struct brcms_c_info *wlc, bool set, mbool req_bit) { - wlc->band->CWmin = newmin; - wlc_bmac_set_cwmin(wlc->hw, newmin); + brcms_b_pllreq(wlc->hw, set, req_bit); } -void wlc_set_cwmax(struct wlc_info *wlc, u16 newmax) -{ - wlc->band->CWmax = newmax; - wlc_bmac_set_cwmax(wlc->hw, newmax); -} - -/* Search mem rw utilities */ - -void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit) -{ - wlc_bmac_pllreq(wlc->hw, set, req_bit); -} - -void wlc_reset_bmac_done(struct wlc_info *wlc) +void brcms_c_reset_bmac_done(struct brcms_c_info *wlc) { } /* check for the particular priority flow control bit being set */ bool -wlc_txflowcontrol_prio_isset(struct wlc_info *wlc, struct wlc_txq_info *q, - int prio) +brcms_c_txflowcontrol_prio_isset(struct brcms_c_info *wlc, + struct brcms_txq_info *q, + int prio) { uint prio_mask; @@ -7313,8 +5767,9 @@ wlc_txflowcontrol_prio_isset(struct wlc_info *wlc, struct wlc_txq_info *q, } /* propagate the flow control to all interfaces using the given tx queue */ -void wlc_txflowcontrol(struct wlc_info *wlc, struct wlc_txq_info *qi, - bool on, int prio) +void brcms_c_txflowcontrol(struct brcms_c_info *wlc, + struct brcms_txq_info *qi, + bool on, int prio) { uint prio_bits; uint cur_bits; @@ -7351,12 +5806,13 @@ void wlc_txflowcontrol(struct wlc_info *wlc, struct wlc_txq_info *qi, return; } - wlc_txflowcontrol_signal(wlc, qi, on, prio); + brcms_c_txflowcontrol_signal(wlc, qi, on, prio); } void -wlc_txflowcontrol_override(struct wlc_info *wlc, struct wlc_txq_info *qi, - bool on, uint override) +brcms_c_txflowcontrol_override(struct brcms_c_info *wlc, + struct brcms_txq_info *qi, + bool on, uint override) { uint prev_override; @@ -7374,7 +5830,7 @@ wlc_txflowcontrol_override(struct wlc_info *wlc, struct wlc_txq_info *qi, return; } - wlc_txflowcontrol_signal(wlc, qi, ON, ALLPRIO); + brcms_c_txflowcontrol_signal(wlc, qi, ON, ALLPRIO); } else { mboolclr(qi->stopped, override); /* clearing an override bit will only make a difference for @@ -7386,48 +5842,51 @@ wlc_txflowcontrol_override(struct wlc_info *wlc, struct wlc_txq_info *qi, } if (qi->stopped == 0) { - wlc_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); + brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); } else { int prio; for (prio = MAXPRIO; prio >= 0; prio--) { if (!mboolisset(qi->stopped, NBITVAL(prio))) - wlc_txflowcontrol_signal(wlc, qi, OFF, - prio); + brcms_c_txflowcontrol_signal( + wlc, qi, OFF, prio); } } } } -static void wlc_txflowcontrol_reset(struct wlc_info *wlc) +static void brcms_c_txflowcontrol_reset(struct brcms_c_info *wlc) { - struct wlc_txq_info *qi; + struct brcms_txq_info *qi; for (qi = wlc->tx_queues; qi != NULL; qi = qi->next) { if (qi->stopped) { - wlc_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); + brcms_c_txflowcontrol_signal(wlc, qi, OFF, ALLPRIO); qi->stopped = 0; } } } static void -wlc_txflowcontrol_signal(struct wlc_info *wlc, struct wlc_txq_info *qi, bool on, - int prio) +brcms_c_txflowcontrol_signal(struct brcms_c_info *wlc, + struct brcms_txq_info *qi, bool on, int prio) { - struct wlc_if *wlcif; +#ifdef NON_FUNCTIONAL + /* wlcif_list is never filled so this function is not functional */ + struct brcms_c_if *wlcif; for (wlcif = wlc->wlcif_list; wlcif != NULL; wlcif = wlcif->next) { - if (wlcif->qi == qi && wlcif->flags & WLC_IF_LINKED) - wl_txflowcontrol(wlc->wl, wlcif->wlif, on, prio); + if (wlcif->qi == qi && wlcif->flags & BRCMS_IF_LINKED) + brcms_txflowcontrol(wlc->wl, wlcif->wlif, on, prio); } +#endif } -static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc) +static struct brcms_txq_info *brcms_c_txq_alloc(struct brcms_c_info *wlc) { - struct wlc_txq_info *qi, *p; + struct brcms_txq_info *qi, *p; - qi = kzalloc(sizeof(struct wlc_txq_info), GFP_ATOMIC); + qi = kzalloc(sizeof(struct brcms_txq_info), GFP_ATOMIC); if (qi != NULL) { /* * Have enough room for control packets along with HI watermark @@ -7435,7 +5894,7 @@ static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc) * leave PS mode. The watermark for flowcontrol to OS packets * will remain the same */ - bcm_pktq_init(&qi->q, WLC_PREC_COUNT, + brcmu_pktq_init(&qi->q, BRCMS_PREC_COUNT, (2 * wlc->pub->tunables->datahiwat) + PKTQ_LEN_DEFAULT + wlc->pub->psq_pkts_total); @@ -7452,9 +5911,10 @@ static struct wlc_txq_info *wlc_txq_alloc(struct wlc_info *wlc) return qi; } -static void wlc_txq_free(struct wlc_info *wlc, struct wlc_txq_info *qi) +static void brcms_c_txq_free(struct brcms_c_info *wlc, + struct brcms_txq_info *qi) { - struct wlc_txq_info *p; + struct brcms_txq_info *p; if (qi == NULL) return; @@ -7476,17 +5936,17 @@ static void wlc_txq_free(struct wlc_info *wlc, struct wlc_txq_info *qi) /* * Flag 'scan in progress' to withhold dynamic phy calibration */ -void wlc_scan_start(struct wlc_info *wlc) +void brcms_c_scan_start(struct brcms_c_info *wlc) { wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true); } -void wlc_scan_stop(struct wlc_info *wlc) +void brcms_c_scan_stop(struct brcms_c_info *wlc) { wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false); } -void wlc_associate_upd(struct wlc_info *wlc, bool state) +void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state) { wlc->pub->associated = state; wlc->cfg->associated = state; @@ -7497,11 +5957,11 @@ void wlc_associate_upd(struct wlc_info *wlc, bool state) * AMPDU traffic, packets pending in hardware have to be invalidated so that * when later on hardware releases them, they can be handled appropriately. */ -void wlc_inval_dma_pkts(struct wlc_hw_info *hw, +void brcms_c_inval_dma_pkts(struct brcms_hardware *hw, struct ieee80211_sta *sta, void (*dma_callback_fn)) { - struct hnddma_pub *dmah; + struct dma_pub *dmah; int i; for (i = 0; i < NFIFO; i++) { dmah = hw->di[i]; @@ -7510,20 +5970,133 @@ void wlc_inval_dma_pkts(struct wlc_hw_info *hw, } } -int wlc_get_curband(struct wlc_info *wlc) +int brcms_c_get_curband(struct brcms_c_info *wlc) { return wlc->band->bandunit; } -void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop) +void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, bool drop) { /* flush packet queue when requested */ if (drop) - bcm_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL); + brcmu_pktq_flush(&wlc->pkt_queue->q, false, NULL, NULL); /* wait for queue and DMA fifos to run dry */ while (!pktq_empty(&wlc->pkt_queue->q) || TXPKTPENDTOT(wlc) > 0) { - wl_msleep(wlc->wl, 1); + brcms_msleep(wlc->wl, 1); + } +} + +int brcms_c_set_par(struct brcms_c_info *wlc, enum wlc_par_id par_id, + int int_val) +{ + int err = 0; + + switch (par_id) { + case IOV_BCN_LI_BCN: + wlc->bcn_li_bcn = (u8) int_val; + if (wlc->pub->up) + brcms_c_bcn_li_upd(wlc); + break; + /* As long as override is false, this only sets the *user* + targets. User can twiddle this all he wants with no harm. + wlc_phy_txpower_set() explicitly sets override to false if + not internal or test. + */ + case IOV_QTXPOWER:{ + u8 qdbm; + bool override; + + /* Remove override bit and clip to max qdbm value */ + qdbm = (u8)min_t(u32, (int_val & ~WL_TXPWR_OVERRIDE), 0xff); + /* Extract override setting */ + override = (int_val & WL_TXPWR_OVERRIDE) ? true : false; + err = + wlc_phy_txpower_set(wlc->band->pi, qdbm, override); + break; + } + case IOV_MPC: + wlc->mpc = (bool)int_val; + brcms_c_radio_mpc_upd(wlc); + break; + default: + err = -ENOTSUPP; + } + return err; +} + +int brcms_c_get_par(struct brcms_c_info *wlc, enum wlc_par_id par_id, + int *ret_int_ptr) +{ + int err = 0; + + switch (par_id) { + case IOV_BCN_LI_BCN: + *ret_int_ptr = wlc->bcn_li_bcn; + break; + case IOV_QTXPOWER: { + uint qdbm; + bool override; + + err = wlc_phy_txpower_get(wlc->band->pi, &qdbm, + &override); + if (err != 0) + return err; + + /* Return qdbm units */ + *ret_int_ptr = + qdbm | (override ? WL_TXPWR_OVERRIDE : 0); + break; + } + case IOV_MPC: + *ret_int_ptr = (s32) wlc->mpc; + break; + default: + err = -ENOTSUPP; + } + return err; +} + +/* + * Search the name=value vars for a specific one and return its value. + * Returns NULL if not found. + */ +char *getvar(char *vars, const char *name) +{ + char *s; + int len; + + if (!name) + return NULL; + + len = strlen(name); + if (len == 0) + return NULL; + + /* first look in vars[] */ + for (s = vars; s && *s;) { + if ((memcmp(s, name, len) == 0) && (s[len] == '=')) + return &s[len + 1]; + + while (*s++) + ; } + /* nothing found */ + return NULL; +} + +/* + * Search the vars for a specific one and return its value as + * an integer. Returns 0 if not found. + */ +int getintvar(char *vars, const char *name) +{ + char *val; + + val = getvar(vars, name); + if (val == NULL) + return 0; + + return simple_strtoul(val, NULL, 0); } diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_main.h b/drivers/staging/brcm80211/brcmsmac/main.h index fb48dfcb97d..f204b1f4747 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_main.h +++ b/drivers/staging/brcm80211/brcmsmac/main.h @@ -14,33 +14,67 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_h_ -#define _wlc_h_ +#ifndef _BRCM_MAIN_H_ +#define _BRCM_MAIN_H_ + +#include <linux/etherdevice.h> + +#include <brcmu_utils.h> +#include "types.h" +#include "d11.h" #define MA_WINDOW_SZ 8 /* moving average window size */ -#define WL_HWRXOFF 38 /* chip rx buffer offset */ +#define BRCMS_HWRXOFF 38 /* chip rx buffer offset */ #define INVCHANNEL 255 /* invalid channel */ -#define MAXCOREREV 28 /* max # supported core revisions (0 .. MAXCOREREV - 1) */ -#define WLC_MAXMODULES 22 /* max # wlc_module_register() calls */ +/* max # supported core revisions (0 .. MAXCOREREV - 1) */ +#define MAXCOREREV 28 +/* max # brcms_c_module_register() calls */ +#define BRCMS_MAXMODULES 22 + +#define SEQNUM_SHIFT 4 +#define AMPDU_DELIMITER_LEN 4 +#define SEQNUM_MAX 0x1000 + +#define APHY_CWMIN 15 +#define PHY_CWMAX 1023 + +#define EDCF_AIFSN_MIN 1 +#define FRAGNUM_MASK 0xF -#define WLC_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8)) +#define NTXRATE 64 /* # tx MPDUs rate is reported for */ + +#define BRCMS_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) /* Maximum wait time for a MAC suspend */ -#define WLC_MAX_MAC_SUSPEND 83000 /* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */ +/* uS: 83mS is max packet time (64KB ampdu @ 6Mbps) */ +#define BRCMS_MAX_MAC_SUSPEND 83000 /* Probe Response timeout - responses for probe requests older that this are tossed, zero to disable */ -#define WLC_PRB_RESP_TIMEOUT 0 /* Disable probe response timeout */ +#define BRCMS_PRB_RESP_TIMEOUT 0 /* Disable probe response timeout */ /* transmit buffer max headroom for protocol headers */ #define TXOFF (D11_TXH_LEN + D11_PHY_HDR_LEN) -/* For managing scan result lists */ -struct wlc_bss_list { - uint count; - bool beacon; /* set for beacon, cleared for probe response */ - wlc_bss_info_t *ptrs[MAXBSS]; -}; +#define AC_COUNT 4 + +/* Macros for doing definition and get/set of bitfields + * Usage example, e.g. a three-bit field (bits 4-6): + * #define <NAME>_M BITFIELD_MASK(3) + * #define <NAME>_S 4 + * ... + * regval = R_REG(osh, ®s->regfoo); + * field = GFIELD(regval, <NAME>); + * regval = SFIELD(regval, <NAME>, 1); + * W_REG(osh, ®s->regfoo, regval); + */ +#define BITFIELD_MASK(width) \ + (((unsigned)1 << (width)) - 1) +#define GFIELD(val, field) \ + (((val) >> field ## _S) & field ## _M) +#define SFIELD(val, field, bits) \ + (((val) & (~(field ## _M << field ## _S))) | \ + ((unsigned)(bits) << field ## _S)) #define SW_TIMER_MAC_STAT_UPD 30 /* periodic MAC stats update */ @@ -52,26 +86,28 @@ struct wlc_bss_list { #define VALID_COREREV(corerev) CONF_HAS(D11CONF, corerev) /* values for shortslot_override */ -#define WLC_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */ -#define WLC_SHORTSLOT_OFF 0 /* Turn off short slot */ -#define WLC_SHORTSLOT_ON 1 /* Turn on short slot */ +#define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */ +#define BRCMS_SHORTSLOT_OFF 0 /* Turn off short slot */ +#define BRCMS_SHORTSLOT_ON 1 /* Turn on short slot */ /* value for short/long and mixmode/greenfield preamble */ - -#define WLC_LONG_PREAMBLE (0) -#define WLC_SHORT_PREAMBLE (1 << 0) -#define WLC_GF_PREAMBLE (1 << 1) -#define WLC_MM_PREAMBLE (1 << 2) -#define WLC_IS_MIMO_PREAMBLE(_pre) (((_pre) == WLC_GF_PREAMBLE) || ((_pre) == WLC_MM_PREAMBLE)) +#define BRCMS_LONG_PREAMBLE (0) +#define BRCMS_SHORT_PREAMBLE (1 << 0) +#define BRCMS_GF_PREAMBLE (1 << 1) +#define BRCMS_MM_PREAMBLE (1 << 2) +#define BRCMS_IS_MIMO_PREAMBLE(_pre) (((_pre) == BRCMS_GF_PREAMBLE) || \ + ((_pre) == BRCMS_MM_PREAMBLE)) /* values for barker_preamble */ -#define WLC_BARKER_SHORT_ALLOWED 0 /* Short pre-amble allowed */ +#define BRCMS_BARKER_SHORT_ALLOWED 0 /* Short pre-amble allowed */ /* A fifo is full. Clear precedences related to that FIFO */ -#define WLC_TX_FIFO_CLEAR(wlc, fifo) ((wlc)->tx_prec_map &= ~(wlc)->fifo2prec_map[fifo]) +#define BRCMS_TX_FIFO_CLEAR(wlc, fifo) \ + ((wlc)->tx_prec_map &= ~(wlc)->fifo2prec_map[fifo]) /* Fifo is NOT full. Enable precedences for that FIFO */ -#define WLC_TX_FIFO_ENAB(wlc, fifo) ((wlc)->tx_prec_map |= (wlc)->fifo2prec_map[fifo]) +#define BRCMS_TX_FIFO_ENAB(wlc, fifo) \ + ((wlc)->tx_prec_map |= (wlc)->fifo2prec_map[fifo]) /* TxFrameID */ /* seq and frag bits: SEQNUM_SHIFT, FRAGNUM_MASK (802.11.h) */ @@ -90,14 +126,14 @@ struct wlc_bss_list { /* if wpa is in use then portopen is true when the group key is plumbed otherwise it is always true */ #define WSEC_ENABLED(wsec) ((wsec) & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED)) -#define WLC_SW_KEYS(wlc, bsscfg) ((((wlc)->wsec_swkeys) || \ +#define BRCMS_SW_KEYS(wlc, bsscfg) ((((wlc)->wsec_swkeys) || \ ((bsscfg)->wsec & WSEC_SWFLAG))) -#define WLC_PORTOPEN(cfg) \ +#define BRCMS_PORTOPEN(cfg) \ (((cfg)->WPA_auth != WPA_AUTH_DISABLED && WSEC_ENABLED((cfg)->wsec)) ? \ (cfg)->wsec_portopen : true) -#define PS_ALLOWED(wlc) wlc_ps_allowed(wlc) +#define PS_ALLOWED(wlc) brcms_c_ps_allowed(wlc) #define DATA_BLOCK_TX_SUPR (1 << 4) @@ -105,11 +141,11 @@ struct wlc_bss_list { extern const u8 prio2fifo[]; /* Ucode MCTL_WAKE override bits */ -#define WLC_WAKE_OVERRIDE_CLKCTL 0x01 -#define WLC_WAKE_OVERRIDE_PHYREG 0x02 -#define WLC_WAKE_OVERRIDE_MACSUSPEND 0x04 -#define WLC_WAKE_OVERRIDE_TXFIFO 0x08 -#define WLC_WAKE_OVERRIDE_FORCEFAST 0x10 +#define BRCMS_WAKE_OVERRIDE_CLKCTL 0x01 +#define BRCMS_WAKE_OVERRIDE_PHYREG 0x02 +#define BRCMS_WAKE_OVERRIDE_MACSUSPEND 0x04 +#define BRCMS_WAKE_OVERRIDE_TXFIFO 0x08 +#define BRCMS_WAKE_OVERRIDE_FORCEFAST 0x10 /* stuff pulled in from wlc.c */ @@ -136,7 +172,7 @@ extern const u8 prio2fifo[]; #define MAXTXFRAMEBURST 8 /* vanilla xpress mode: max frames/burst */ #define MAXFRAMEBURST_TXOP 10000 /* Frameburst TXOP in usec */ -/* Per-AC retry limit register definitions; uses bcmdefs.h bitfield macros */ +/* Per-AC retry limit register definitions; uses defs.h bitfield macros */ #define EDCF_SHORT_S 0 #define EDCF_SFB_S 4 #define EDCF_LONG_S 8 @@ -146,24 +182,34 @@ extern const u8 prio2fifo[]; #define EDCF_LONG_M BITFIELD_MASK(4) #define EDCF_LFB_M BITFIELD_MASK(4) -#define WLC_WME_RETRY_SHORT_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SHORT) -#define WLC_WME_RETRY_SFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_SFB) -#define WLC_WME_RETRY_LONG_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LONG) -#define WLC_WME_RETRY_LFB_GET(wlc, ac) GFIELD(wlc->wme_retries[ac], EDCF_LFB) +#define NFIFO 6 /* # tx/rx fifopairs */ -#define WLC_WME_RETRY_SHORT_SET(wlc, ac, val) \ +#define BRCMS_WME_RETRY_SHORT_GET(wlc, ac) \ + GFIELD(wlc->wme_retries[ac], EDCF_SHORT) +#define BRCMS_WME_RETRY_SFB_GET(wlc, ac) \ + GFIELD(wlc->wme_retries[ac], EDCF_SFB) +#define BRCMS_WME_RETRY_LONG_GET(wlc, ac) \ + GFIELD(wlc->wme_retries[ac], EDCF_LONG) +#define BRCMS_WME_RETRY_LFB_GET(wlc, ac) \ + GFIELD(wlc->wme_retries[ac], EDCF_LFB) + +#define BRCMS_WME_RETRY_SHORT_SET(wlc, ac, val) \ (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SHORT, val)) -#define WLC_WME_RETRY_SFB_SET(wlc, ac, val) \ +#define BRCMS_WME_RETRY_SFB_SET(wlc, ac, val) \ (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_SFB, val)) -#define WLC_WME_RETRY_LONG_SET(wlc, ac, val) \ +#define BRCMS_WME_RETRY_LONG_SET(wlc, ac, val) \ (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LONG, val)) -#define WLC_WME_RETRY_LFB_SET(wlc, ac, val) \ +#define BRCMS_WME_RETRY_LFB_SET(wlc, ac, val) \ (wlc->wme_retries[ac] = SFIELD(wlc->wme_retries[ac], EDCF_LFB, val)) /* PLL requests */ -#define WLC_PLLREQ_SHARED 0x1 /* pll is shared on old chips */ -#define WLC_PLLREQ_RADIO_MON 0x2 /* hold pll for radio monitor register checking */ -#define WLC_PLLREQ_FLIP 0x4 /* hold/release pll for some short operation */ + +/* pll is shared on old chips */ +#define BRCMS_PLLREQ_SHARED 0x1 +/* hold pll for radio monitor register checking */ +#define BRCMS_PLLREQ_RADIO_MON 0x2 +/* hold/release pll for some short operation */ +#define BRCMS_PLLREQ_FLIP 0x4 /* * Macros to check if AP or STA is active. @@ -194,9 +240,9 @@ extern const u8 prio2fifo[]; (MCTL_PSM_JMP_0 | MCTL_IHR_EN)) != MCTL_IHR_EN) : \ (ai_deviceremoved(wlc->hw->sih))) -#define WLCWLUNIT(wlc) ((wlc)->pub->unit) +#define BRCMS_UNIT(wlc) ((wlc)->pub->unit) -struct wlc_protection { +struct brcms_protection { bool _g; /* use g spec protection, driver internal */ s8 g_override; /* override for use of g spec protection */ u8 gmode_user; /* user config gmode, operating band->gmode is different */ @@ -208,23 +254,10 @@ struct wlc_protection { s8 nongf_override; /* override for use of GF protection */ s8 n_pam_override; /* override for preamble: MM or GF */ bool n_obss; /* indicated OBSS Non-HT STA present */ - - uint longpre_detect_timeout; /* #sec until long preamble bcns gone */ - uint barker_detect_timeout; /* #sec until bcns signaling Barker long preamble */ - /* only is gone */ - uint ofdm_ibss_timeout; /* #sec until ofdm IBSS beacons gone */ - uint ofdm_ovlp_timeout; /* #sec until ofdm overlapping BSS bcns gone */ - uint nonerp_ibss_timeout; /* #sec until nonerp IBSS beacons gone */ - uint nonerp_ovlp_timeout; /* #sec until nonerp overlapping BSS bcns gone */ - uint g_ibss_timeout; /* #sec until bcns signaling Use_Protection gone */ - uint n_ibss_timeout; /* #sec until bcns signaling Use_OFDM_Protection gone */ - uint ht20in40_ovlp_timeout; /* #sec until 20MHz overlapping OPMODE gone */ - uint ht20in40_ibss_timeout; /* #sec until 20MHz-only HT station bcns gone */ - uint non_gf_ibss_timeout; /* #sec until non-GF bcns gone */ }; /* anything affects the single/dual streams/antenna operation */ -struct wlc_stf { +struct brcms_stf { u8 hw_txchain; /* HW txchain bitmap cfg */ u8 txchain; /* txchain bitmap being used */ u8 txstreams; /* number of txchains being used */ @@ -250,60 +283,106 @@ struct wlc_stf { s8 spatial_policy; }; -#define WLC_STF_SS_STBC_TX(wlc, scb) \ +#define BRCMS_STF_SS_STBC_TX(wlc, scb) \ (((wlc)->stf->txstreams > 1) && (((wlc)->band->band_stf_stbc_tx == ON) || \ (SCB_STBC_CAP((scb)) && \ (wlc)->band->band_stf_stbc_tx == AUTO && \ isset(&((wlc)->stf->ss_algo_channel), PHY_TXC1_MODE_STBC)))) -#define WLC_STBC_CAP_PHY(wlc) (WLCISNPHY(wlc->band) && NREV_GE(wlc->band->phyrev, 3)) +#define BRCMS_STBC_CAP_PHY(wlc) (BRCMS_ISNPHY(wlc->band) && \ + NREV_GE(wlc->band->phyrev, 3)) -#define WLC_SGI_CAP_PHY(wlc) ((WLCISNPHY(wlc->band) && NREV_GE(wlc->band->phyrev, 3)) || \ - WLCISLCNPHY(wlc->band)) +#define BRCMS_SGI_CAP_PHY(wlc) ((BRCMS_ISNPHY(wlc->band) && \ + NREV_GE(wlc->band->phyrev, 3)) || \ + BRCMS_ISLCNPHY(wlc->band)) -#define WLC_CHAN_PHYTYPE(x) (((x) & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT) -#define WLC_CHAN_CHANNEL(x) (((x) & RXS_CHAN_ID_MASK) >> RXS_CHAN_ID_SHIFT) -#define WLC_RX_CHANNEL(rxh) (WLC_CHAN_CHANNEL((rxh)->RxChan)) +#define BRCMS_CHAN_PHYTYPE(x) (((x) & RXS_CHAN_PHYTYPE_MASK) \ + >> RXS_CHAN_PHYTYPE_SHIFT) +#define BRCMS_CHAN_CHANNEL(x) (((x) & RXS_CHAN_ID_MASK) \ + >> RXS_CHAN_ID_SHIFT) +#define BRCMS_RX_CHANNEL(rxh) (BRCMS_CHAN_CHANNEL((rxh)->RxChan)) -/* wlc_bss_info flag bit values */ -#define WLC_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */ +/* brcms_bss_info flag bit values */ +#define BRCMS_BSS_HT 0x0020 /* BSS is HT (MIMO) capable */ -/* Flags used in wlc_txq_info.stopped */ +/* Flags used in brcms_c_txq_info.stopped */ #define TXQ_STOP_FOR_PRIOFC_MASK 0x000000FF /* per prio flow control bits */ #define TXQ_STOP_FOR_PKT_DRAIN 0x00000100 /* stop txq enqueue for packet drain */ #define TXQ_STOP_FOR_AMPDU_FLOW_CNTRL 0x00000200 /* stop txq enqueue for ampdu flow control */ -#define WLC_HT_WEP_RESTRICT 0x01 /* restrict HT with WEP */ -#define WLC_HT_TKIP_RESTRICT 0x02 /* restrict HT with TKIP */ +#define BRCMS_HT_WEP_RESTRICT 0x01 /* restrict HT with WEP */ +#define BRCMS_HT_TKIP_RESTRICT 0x02 /* restrict HT with TKIP */ + +/* Maximum # of keys that wl driver supports in S/W. + * Keys supported in H/W is less than or equal to WSEC_MAX_KEYS. + */ +#define WSEC_MAX_KEYS 54 /* Max # of keys (50 + 4 default keys) */ +#define BRCMS_DEFAULT_KEYS 4 /* Default # of keys */ + +/* +* Max # of keys currently supported: +* +* s/w keys if WSEC_SW(wlc->wsec). +* h/w keys otherwise. +*/ +#define BRCMS_MAX_WSEC_KEYS(wlc) WSEC_MAX_KEYS + +/* number of 802.11 default (non-paired, group keys) */ +#define WSEC_MAX_DEFAULT_KEYS 4 /* # of default keys */ + +struct wsec_iv { + u32 hi; /* upper 32 bits of IV */ + u16 lo; /* lower 16 bits of IV */ +}; + +#define BRCMS_NUMRXIVS 16 /* # rx IVs (one per 802.11e TID) */ + +struct wsec_key { + u8 ea[ETH_ALEN]; /* per station */ + u8 idx; /* key index in wsec_keys array */ + u8 id; /* key ID [0-3] */ + u8 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ + u8 rcmta; /* rcmta entry index, same as idx by default */ + u16 flags; /* misc flags */ + u8 algo_hw; /* cache for hw register */ + u8 aes_mode; /* cache for hw register */ + s8 iv_len; /* IV length */ + s8 icv_len; /* ICV length */ + u32 len; /* key length..don't move this var */ + /* data is 4byte aligned */ + u8 data[WLAN_MAX_KEY_LEN]; /* key data */ + struct wsec_iv rxiv[BRCMS_NUMRXIVS]; /* Rx IV (one per TID) */ + struct wsec_iv txiv; /* Tx IV */ +}; /* * core state (mac) */ -struct wlccore { +struct brcms_core { uint coreidx; /* # sb enumerated core */ /* fifo */ uint *txavail[NFIFO]; /* # tx descriptors available */ s16 txpktpend[NFIFO]; /* tx admission control */ - macstat_t *macstat_snapshot; /* mac hw prev read values */ + struct macstat *macstat_snapshot; /* mac hw prev read values */ }; /* * band state (phy+ana+radio) */ -struct wlcband { - int bandtype; /* WLC_BAND_2G, WLC_BAND_5G */ +struct brcms_band { + int bandtype; /* BRCM_BAND_2G, BRCM_BAND_5G */ uint bandunit; /* bandstate[] index */ u16 phytype; /* phytype */ u16 phyrev; u16 radioid; u16 radiorev; - wlc_phy_t *pi; /* pointer to phy specific information */ + struct brcms_phy_pub *pi; /* pointer to phy specific information */ bool abgphy_encore; - u8 gmode; /* currently active gmode (see wlioctl.h) */ + u8 gmode; /* currently active gmode */ struct scb *hwrs_scb; /* permanent scb for hw rateset */ @@ -314,7 +393,7 @@ struct wlcband { u8 band_stf_ss_mode; /* Configured STF type, 0:siso; 1:cdd */ s8 band_stf_stbc_tx; /* STBC TX 0:off; 1:force on; -1:auto */ wlc_rateset_t hw_rateset; /* rates supported by chip (phy-specific) */ - u8 basic_rate[WLC_MAXRATE + 1]; /* basic rates indexed by rate */ + u8 basic_rate[BRCM_MAXRATE + 1]; /* basic rates indexed by rate */ bool mimo_cap_40; /* 40 MHz cap enabled on this band */ s8 antgain; /* antenna gain from srom */ @@ -324,7 +403,7 @@ struct wlcband { }; /* tx completion callback takes 3 args */ -typedef void (*pkcb_fn_t) (struct wlc_info *wlc, uint txstatus, void *arg); +typedef void (*pkcb_fn_t) (struct brcms_c_info *wlc, uint txstatus, void *arg); struct pkt_cb { pkcb_fn_t fn; /* function to call when tx frame completes */ @@ -336,7 +415,7 @@ struct pkt_cb { /* module control blocks */ struct modulecb { char name[32]; /* module name : NULL indicates empty array member */ - const bcm_iovar_t *iovars; /* iovar table */ + const struct brcmu_iovar *iovars; /* iovar table */ void *hdl; /* handle passed when handler 'doiovar' is called */ watchdog_fn_t watchdog_fn; /* watchdog handler */ iovar_fn_t iovar_fn; /* iovar handler */ @@ -355,28 +434,46 @@ struct dumpcb_s { struct dumpcb_s *next; }; +struct edcf_acparam { + u8 ACI; + u8 ECW; + u16 TXOP; +} __packed; + +struct wme_param_ie { + u8 oui[3]; + u8 type; + u8 subtype; + u8 version; + u8 qosinfo; + u8 rsvd; + struct edcf_acparam acparam[AC_COUNT]; +} __packed; + /* virtual interface */ -struct wlc_if { - struct wlc_if *next; - u8 type; /* WLC_IFTYPE_BSS or WLC_IFTYPE_WDS */ +struct brcms_c_if { + struct brcms_c_if *next; + u8 type; /* BSS or WDS */ u8 index; /* assigned in wl_add_if(), index of the wlif if any, * not necessarily corresponding to bsscfg._idx or * AID2PVBMAP(scb). */ u8 flags; /* flags for the interface */ - struct wl_if *wlif; /* pointer to wlif */ - struct wlc_txq_info *qi; /* pointer to associated tx queue */ + struct brcms_if *wlif; /* pointer to wlif */ + struct brcms_txq_info *qi; /* pointer to associated tx queue */ union { - struct scb *scb; /* pointer to scb if WLC_IFTYPE_WDS */ - struct wlc_bsscfg *bsscfg; /* pointer to bsscfg if WLC_IFTYPE_BSS */ + /* pointer to scb if WDS */ + struct scb *scb; + /* pointer to bsscfg if BSS */ + struct brcms_bss_cfg *bsscfg; } u; }; -/* flags for the interface */ -#define WLC_IF_LINKED 0x02 /* this interface is linked to a wl_if */ +/* flags for the interface, this interface is linked to a brcms_if */ +#define BRCMS_IF_LINKED 0x02 -struct wlc_hwband { - int bandtype; /* WLC_BAND_2G, WLC_BAND_5G */ +struct brcms_hw_band { + int bandtype; /* BRCM_BAND_2G, BRCM_BAND_5G */ uint bandunit; /* bandstate[] index */ u16 mhfs[MHFMAX]; /* MHF array shadow */ u8 bandhw_stf_ss_mode; /* HW configured STF type, 0:siso; 1:cdd */ @@ -388,16 +485,16 @@ struct wlc_hwband { u16 phyrev; u16 radioid; u16 radiorev; - wlc_phy_t *pi; /* pointer to phy specific information */ + struct brcms_phy_pub *pi; /* pointer to phy specific information */ bool abgphy_encore; }; -struct wlc_hw_info { +struct brcms_hardware { bool _piomode; /* true if pio mode */ - struct wlc_info *wlc; + struct brcms_c_info *wlc; /* fifo */ - struct hnddma_pub *di[NFIFO]; /* hnddma handles, per fifo */ + struct dma_pub *di[NFIFO]; /* dma handles, per fifo */ uint unit; /* device instance number */ @@ -413,14 +510,15 @@ struct wlc_hw_info { u32 machwcap_backup; /* backup of machwcap */ u16 ucode_dbgsel; /* dbgsel for ucode debug(config gpio) */ - si_t *sih; /* SB handle (cookie for siutils calls) */ + struct si_pub *sih; /* SI handle (cookie for siutils calls) */ char *vars; /* "environment" name=value */ uint vars_size; /* size of vars, free vars on detach */ d11regs_t *regs; /* pointer to device registers */ void *physhim; /* phy shim layer handler */ void *phy_sh; /* pointer to shared phy state */ - struct wlc_hwband *band;/* pointer to active per-band state */ - struct wlc_hwband *bandstate[MAXBANDS];/* band state per phy/radio */ + struct brcms_hw_band *band;/* pointer to active per-band state */ + /* band state per phy/radio */ + struct brcms_hw_band *bandstate[MAXBANDS]; u16 bmac_phytxant; /* cache of high phytxant state */ bool shortslot; /* currently using 11g ShortSlot timing */ u16 SRL; /* 802.11 dot11ShortRetryLimit */ @@ -473,8 +571,8 @@ struct wlc_hw_info { * if they belong to the same flow of traffic from the device. For multi-channel * operation there are independent TX Queues for each channel. */ -struct wlc_txq_info { - struct wlc_txq_info *next; +struct brcms_txq_info { + struct brcms_txq_info *next; struct pktq q; uint stopped; /* tx flow control bits */ }; @@ -482,12 +580,13 @@ struct wlc_txq_info { /* * Principal common (os-independent) software data structure. */ -struct wlc_info { - struct wlc_pub *pub; /* pointer to wlc public state */ - struct wl_info *wl; /* pointer to os-specific private state */ +struct brcms_c_info { + struct brcms_pub *pub; /* pointer to wlc public state */ + struct brcms_info *wl; /* pointer to os-specific private state */ d11regs_t *regs; /* pointer to device registers */ - struct wlc_hw_info *hw; /* HW related state used primarily by BMAC */ + /* HW related state used primarily by BMAC */ + struct brcms_hardware *hw; /* clock */ int clkreq_override; /* setting for clkreq for PCIE : Auto, 0, 1 */ @@ -504,11 +603,11 @@ struct wlc_info { bool clk; /* core is out of reset and has clock */ /* multiband */ - struct wlccore *core; /* pointer to active io core */ - struct wlcband *band; /* pointer to active per-band state */ - struct wlccore *corestate; /* per-core state (one per hw core) */ + struct brcms_core *core; /* pointer to active io core */ + struct brcms_band *band; /* pointer to active per-band state */ + struct brcms_core *corestate; /* per-core state (one per hw core) */ /* per-band state (one per phy/radio): */ - struct wlcband *bandstate[MAXBANDS]; + struct brcms_band *bandstate[MAXBANDS]; bool war16165; /* PCI slow clock 16165 war flag */ @@ -526,9 +625,7 @@ struct wlc_info { struct ampdu_info *ampdu; /* ampdu module handler */ struct antsel_info *asi; /* antsel module handler */ - wlc_cm_info_t *cmi; /* channel manager module handler */ - - void *btparam; /* bus type specific cookie */ + struct brcms_cm_info *cmi; /* channel manager module handler */ uint vars_size; /* size of vars, free vars on detach */ @@ -544,25 +641,18 @@ struct wlc_info { bool bandinit_pending; /* track band init in auto band */ bool radio_monitor; /* radio timer is running */ - bool down_override; /* true=down */ bool going_down; /* down path intermediate variable */ bool mpc; /* enable minimum power consumption */ u8 mpc_dlycnt; /* # of watchdog cnt before turn disable radio */ u8 mpc_offcnt; /* # of watchdog cnt that radio is disabled */ u8 mpc_delay_off; /* delay radio disable by # of watchdog cnt */ - u8 prev_non_delay_mpc; /* prev state wlc_is_non_delay_mpc */ + u8 prev_non_delay_mpc; /* prev state brcms_c_is_non_delay_mpc */ - /* timer */ - struct wl_timer *wdtimer; /* timer for watchdog routine */ - uint fast_timer; /* Periodic timeout for 'fast' timer */ - uint slow_timer; /* Periodic timeout for 'slow' timer */ - uint glacial_timer; /* Periodic timeout for 'glacial' timer */ - uint phycal_mlo; /* last time measurelow calibration was done */ - uint phycal_txpower; /* last time txpower calibration was done */ - - struct wl_timer *radio_timer; /* timer for hw radio button monitor routine */ - struct wl_timer *pspoll_timer; /* periodic pspoll timer */ + /* timer for watchdog routine */ + struct brcms_timer *wdtimer; + /* timer for hw radio button monitor routine */ + struct brcms_timer *radio_timer; /* promiscuous */ bool monitor; /* monitor (MPDU sniffing) mode */ @@ -570,30 +660,11 @@ struct wlc_info { bool bcnmisc_scan; /* bcns promisc mode override for scan */ bool bcnmisc_monitor; /* bcns promisc mode override for monitor */ - u8 bcn_wait_prd; /* max waiting period (for beacon) in 1024TU */ - /* driver feature */ bool _rifs; /* enable per-packet rifs */ - s32 rifs_advert; /* RIFS mode advertisement */ s8 sgi_tx; /* sgi tx */ - bool wet; /* true if wireless ethernet bridging mode */ /* AP-STA synchronization, power save */ - bool check_for_unaligned_tbtt; /* check unaligned tbtt flag */ - bool PM_override; /* no power-save flag, override PM(user input) */ - bool PMenabled; /* current power-management state (CAM or PS) */ - bool PMpending; /* waiting for tx status with PM indicated set */ - bool PMblocked; /* block any PSPolling in PS mode, used to buffer - * AP traffic, also used to indicate in progress - * of scan, rm, etc. off home channel activity. - */ - bool PSpoll; /* whether there is an outstanding PS-Poll frame */ - u8 PM; /* power-management mode (CAM, PS or FASTPS) */ - bool PMawakebcn; /* bcn recvd during current waking state */ - - bool WME_PM_blocked; /* Can STA go to PM when in WME Auto mode */ - bool wake; /* host-specified PS-mode sleep state */ - u8 pspoll_prd; /* pspoll interval in milliseconds */ u8 bcn_li_bcn; /* beacon listen interval in # beacons */ u8 bcn_li_dtim; /* beacon listen interval in # dtims */ @@ -602,18 +673,16 @@ struct wlc_info { /* WME */ ac_bitmap_t wme_dp; /* Discard (oldest first) policy per AC */ - bool wme_apsd; /* enable Advanced Power Save Delivery */ - ac_bitmap_t wme_admctl; /* bit i set if AC i under admission control */ u16 edcf_txop[AC_COUNT]; /* current txop for each ac */ - wme_param_ie_t wme_param_ie; /* WME parameter info element, which on STA - * contains parameters in use locally, and on - * AP contains parameters advertised to STA - * in beacons and assoc responses. - */ - bool wme_prec_queuing; /* enable/disable non-wme STA prec queuing */ + + /* + * WME parameter info element, which on STA contains parameters in use + * locally, and on AP contains parameters advertised to STA in beacons + * and assoc responses. + */ + struct wme_param_ie wme_param_ie; u16 wme_retries[AC_COUNT]; /* per-AC retry limits */ - int vlan_mode; /* OK to use 802.1Q Tags (ON, OFF, AUTO) */ u16 tx_prec_map; /* Precedence map based on HW FIFO space */ u16 fifo2prec_map[NFIFO]; /* pointer to fifo2_prec map based on WME */ @@ -621,60 +690,36 @@ struct wlc_info { * BSS Configurations set of BSS configurations, idx 0 is default and * always valid */ - struct wlc_bsscfg *bsscfg[WLC_MAXBSSCFG]; - struct wlc_bsscfg *cfg; /* the primary bsscfg (can be AP or STA) */ - u8 stas_associated; /* count of ASSOCIATED STA bsscfgs */ - u8 aps_associated; /* count of UP AP bsscfgs */ - u8 block_datafifo; /* prohibit posting frames to data fifos */ - bool bcmcfifo_drain; /* TX_BCMC_FIFO is set to drain */ + struct brcms_bss_cfg *bsscfg[BRCMS_MAXBSSCFG]; + struct brcms_bss_cfg *cfg; /* the primary bsscfg (can be AP or STA) */ /* tx queue */ - struct wlc_txq_info *tx_queues; /* common TX Queue list */ + struct brcms_txq_info *tx_queues; /* common TX Queue list */ /* security */ - wsec_key_t *wsec_keys[WSEC_MAX_KEYS]; /* dynamic key storage */ - wsec_key_t *wsec_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */ + struct wsec_key *wsec_keys[WSEC_MAX_KEYS]; /* dynamic key storage */ + /* default key storage */ + struct wsec_key *wsec_def_keys[BRCMS_DEFAULT_KEYS]; bool wsec_swkeys; /* indicates that all keys should be * treated as sw keys (used for debugging) */ struct modulecb *modulecb; - struct dumpcb_s *dumpcb_head; u8 mimoft; /* SIGN or 11N */ - u8 mimo_band_bwcap; /* bw cap per band type */ - s8 txburst_limit_override; /* tx burst limit override */ - u16 txburst_limit; /* tx burst limit value */ s8 cck_40txbw; /* 11N, cck tx b/w override when in 40MHZ mode */ s8 ofdm_40txbw; /* 11N, ofdm tx b/w override when in 40MHZ mode */ s8 mimo_40txbw; /* 11N, mimo tx b/w override when in 40MHZ mode */ /* HT CAP IE being advertised by this node: */ struct ieee80211_ht_cap ht_cap; - uint seckeys; /* 54 key table shm address */ - uint tkmickeys; /* 12 TKIP MIC key table shm address */ - - wlc_bss_info_t *default_bss; /* configured BSS parameters */ + struct brcms_bss_info *default_bss; /* configured BSS parameters */ - u16 AID; /* association ID */ - u16 counter; /* per-sdu monotonically increasing counter */ u16 mc_fid_counter; /* BC/MC FIFO frame ID counter */ - bool ibss_allowed; /* false, all IBSS will be ignored during a scan - * and the driver will not allow the creation of - * an IBSS network - */ - bool ibss_coalesce_allowed; - - char country_default[WLC_CNTRY_BUF_SZ]; /* saved country for leaving 802.11d - * auto-country mode - */ - char autocountry_default[WLC_CNTRY_BUF_SZ]; /* initial country for 802.11d - * auto-country mode - */ -#ifdef BCMDBG - bcm_tlv_t *country_ie_override; /* debug override of announced Country IE */ -#endif - + /* saved country for leaving 802.11d auto-country mode */ + char country_default[BRCM_CNTRY_BUF_SZ]; + /* initial country for 802.11d auto-country mode */ + char autocountry_default[BRCM_CNTRY_BUF_SZ]; u16 prb_resp_timeout; /* do not send prb resp if request older than this, * 0 = disable */ @@ -696,44 +741,17 @@ struct wlc_info { u16 LFBL; /* Long Frame Rate Fallback Limit */ /* network config */ - bool shortpreamble; /* currently operating with CCK ShortPreambles */ bool shortslot; /* currently using 11g ShortSlot timing */ - s8 barker_preamble; /* current Barker Preamble Mode */ s8 shortslot_override; /* 11g ShortSlot override */ bool include_legacy_erp; /* include Legacy ERP info elt ID 47 as well as g ID 42 */ - bool barker_overlap_control; /* true: be aware of overlapping BSSs for barker */ - bool ignore_bcns; /* override: ignore non shortslot bcns in a 11g network */ - bool legacy_probe; /* restricts probe requests to CCK rates */ - struct wlc_protection *protection; + struct brcms_protection *protection; s8 PLCPHdr_override; /* 802.11b Preamble Type override */ - struct wlc_stf *stf; - - struct pkt_cb *pkt_callback; /* tx completion callback handlers */ - - u32 txretried; /* tx retried number in one msdu */ + struct brcms_stf *stf; ratespec_t bcn_rspec; /* save bcn ratespec purpose */ - bool apsd_sta_usp; /* Unscheduled Service Period in progress on STA */ - struct wl_timer *apsd_trigger_timer; /* timer for wme apsd trigger frames */ - u32 apsd_trigger_timeout; /* timeout value for apsd_trigger_timer (in ms) - * 0 == disable - */ - ac_bitmap_t apsd_trigger_ac; /* Permissible Access Category in which APSD Null - * Trigger frames can be send - */ - u8 htphy_membership; /* HT PHY membership */ - - bool _regulatory_domain; /* 802.11d enabled? */ - - u8 mimops_PM; - - u8 txpwr_percent; /* power output percentage */ - - u8 ht_wsec_restriction; /* the restriction of HT with TKIP or WEP */ - uint tempsense_lasttime; u16 tx_duty_cycle_ofdm; /* maximum allowed duty cycle for OFDM */ @@ -741,30 +759,107 @@ struct wlc_info { u16 next_bsscfg_ID; - struct wlc_if *wlcif_list; /* linked list of wlc_if structs */ - struct wlc_txq_info *pkt_queue; /* txq for transmit packets */ + struct brcms_txq_info *pkt_queue; /* txq for transmit packets */ u32 mpc_dur; /* total time (ms) in mpc mode except for the * portion since radio is turned off last time */ u32 mpc_laston_ts; /* timestamp (ms) when radio is turned off last * time */ - bool pr80838_war; - uint hwrxoff; struct wiphy *wiphy; }; /* antsel module specific state */ struct antsel_info { - struct wlc_info *wlc; /* pointer to main wlc structure */ - struct wlc_pub *pub; /* pointer to public fn */ + struct brcms_c_info *wlc; /* pointer to main wlc structure */ + struct brcms_pub *pub; /* pointer to public fn */ u8 antsel_type; /* Type of boardlevel mimo antenna switch-logic * 0 = N/A, 1 = 2x4 board, 2 = 2x3 CB2 board */ u8 antsel_antswitch; /* board level antenna switch type */ bool antsel_avail; /* Ant selection availability (SROM based) */ - wlc_antselcfg_t antcfg_11n; /* antenna configuration */ - wlc_antselcfg_t antcfg_cur; /* current antenna config (auto) */ + struct brcms_antselcfg antcfg_11n; /* antenna configuration */ + struct brcms_antselcfg antcfg_cur; /* current antenna config (auto) */ +}; + +/* BSS configuration state */ +struct brcms_bss_cfg { + struct brcms_c_info *wlc; /* wlc to which this bsscfg belongs to. */ + bool up; /* is this configuration up operational */ + bool enable; /* is this configuration enabled */ + bool associated; /* is BSS in ASSOCIATED state */ + bool BSS; /* infraustructure or adhac */ + bool dtim_programmed; + + u8 SSID_len; /* the length of SSID */ + u8 SSID[IEEE80211_MAX_SSID_LEN]; /* SSID string */ + struct scb *bcmc_scb[MAXBANDS]; /* one bcmc_scb per band */ + s8 _idx; /* the index of this bsscfg, + * assigned at wlc_bsscfg_alloc() + */ + /* MAC filter */ + uint nmac; /* # of entries on maclist array */ + int macmode; /* allow/deny stations on maclist array */ + struct ether_addr *maclist; /* list of source MAC addrs to match */ + + /* security */ + u32 wsec; /* wireless security bitvec */ + s16 auth; /* 802.11 authentication: Open, Shared Key, WPA */ + s16 openshared; /* try Open auth first, then Shared Key */ + bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */ + bool eap_restrict; /* restrict data until 802.1X auth succeeds */ + u16 WPA_auth; /* WPA: authenticated key management */ + bool wpa2_preauth; /* default is true, wpa_cap sets value */ + bool wsec_portopen; /* indicates keys are plumbed */ + /* global txiv for WPA_NONE, tkip and aes */ + struct wsec_iv wpa_none_txiv; + int wsec_index; /* 0-3: default tx key, -1: not set */ + /* default key storage: */ + struct wsec_key *bss_def_keys[BRCMS_DEFAULT_KEYS]; + + /* TKIP countermeasures */ + bool tkip_countermeasures; /* flags TKIP no-assoc period */ + u32 tk_cm_dt; /* detect timer */ + u32 tk_cm_bt; /* blocking timer */ + u32 tk_cm_bt_tmstmp; /* Timestamp when TKIP BT is activated */ + bool tk_cm_activate; /* activate countermeasures after EAPOL-Key sent */ + + u8 BSSID[ETH_ALEN]; /* BSSID (associated) */ + u8 cur_etheraddr[ETH_ALEN]; /* h/w address */ + u16 bcmc_fid; /* the last BCMC FID queued to TX_BCMC_FIFO */ + u16 bcmc_fid_shm; /* the last BCMC FID written to shared mem */ + + u32 flags; /* BSSCFG flags; see below */ + + u8 *bcn; /* AP beacon */ + uint bcn_len; /* AP beacon length */ + bool ar_disassoc; /* disassociated in associated recreation */ + + int auth_atmptd; /* auth type (open/shared) attempted */ + + pmkid_cand_t pmkid_cand[MAXPMKID]; /* PMKID candidate list */ + uint npmkid_cand; /* num PMKID candidates */ + pmkid_t pmkid[MAXPMKID]; /* PMKID cache */ + uint npmkid; /* num cached PMKIDs */ + + struct brcms_bss_info *current_bss; /* BSS parms in ASSOCIATED state */ + + /* PM states */ + bool PMawakebcn; /* bcn recvd during current waking state */ + bool PMpending; /* waiting for tx status with PM indicated set */ + bool priorPMstate; /* Detecting PM state transitions */ + bool PSpoll; /* whether there is an outstanding PS-Poll frame */ + + /* BSSID entry in RCMTA, use the wsec key management infrastructure to + * manage the RCMTA entries. + */ + struct wsec_key *rcmta; + + /* 'unique' ID of this bsscfg, assigned at bsscfg allocation */ + u16 ID; + + uint txrspecidx; /* index into tx rate circular buffer */ + ratespec_t txrspec[NTXRATE][2]; /* circular buffer of prev MPDUs tx rates */ }; #define CHANNEL_BANDUNIT(wlc, ch) (((ch) <= CH_MAX_2G_CHANNEL) ? BAND_2G_INDEX : BAND_5G_INDEX) @@ -773,7 +868,7 @@ struct antsel_info { #define IS_MBAND_UNLOCKED(wlc) \ ((NBANDS(wlc) > 1) && !(wlc)->bandlocked) -#define WLC_BAND_PI_RADIO_CHANSPEC wlc_phy_chanspec_get(wlc->band->pi) +#define BRCMS_BAND_PI_RADIO_CHANSPEC wlc_phy_chanspec_get(wlc->band->pi) /* sum the individual fifo tx pending packet counts */ #define TXPKTPENDTOT(wlc) ((wlc)->core->txpktpend[0] + (wlc)->core->txpktpend[1] + \ @@ -784,156 +879,147 @@ struct antsel_info { #define TXPKTPENDCLR(wlc, fifo) ((wlc)->core->txpktpend[(fifo)] = 0) #define TXAVAIL(wlc, fifo) (*(wlc)->core->txavail[(fifo)]) #define GETNEXTTXP(wlc, _queue) \ - dma_getnexttxp((wlc)->hw->di[(_queue)], HNDDMA_RANGE_TRANSMITTED) + dma_getnexttxp((wlc)->hw->di[(_queue)], DMA_RANGE_TRANSMITTED) -#define WLC_IS_MATCH_SSID(wlc, ssid1, ssid2, len1, len2) \ +#define BRCMS_IS_MATCH_SSID(wlc, ssid1, ssid2, len1, len2) \ ((len1 == len2) && !memcmp(ssid1, ssid2, len1)) -extern void wlc_fatal_error(struct wlc_info *wlc); -extern void wlc_bmac_rpc_watchdog(struct wlc_info *wlc); -extern void wlc_recv(struct wlc_info *wlc, struct sk_buff *p); -extern bool wlc_dotxstatus(struct wlc_info *wlc, tx_status_t *txs, u32 frm_tx2); -extern void wlc_txfifo(struct wlc_info *wlc, uint fifo, struct sk_buff *p, - bool commit, s8 txpktpend); -extern void wlc_txfifo_complete(struct wlc_info *wlc, uint fifo, s8 txpktpend); -extern void wlc_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, - uint prec); -extern void wlc_info_init(struct wlc_info *wlc, int unit); -extern void wlc_print_txstatus(tx_status_t *txs); -extern int wlc_xmtfifo_sz_get(struct wlc_info *wlc, uint fifo, uint *blocks); -extern void wlc_write_template_ram(struct wlc_info *wlc, int offset, int len, - void *buf); -extern void wlc_write_hw_bcntemplates(struct wlc_info *wlc, void *bcn, int len, - bool both); -extern void wlc_set_cwmin(struct wlc_info *wlc, u16 newmin); -extern void wlc_set_cwmax(struct wlc_info *wlc, u16 newmax); -extern void wlc_pllreq(struct wlc_info *wlc, bool set, mbool req_bit); -extern void wlc_reset_bmac_done(struct wlc_info *wlc); +extern void brcms_c_fatal_error(struct brcms_c_info *wlc); +extern void brcms_b_rpc_watchdog(struct brcms_c_info *wlc); +extern void brcms_c_recv(struct brcms_c_info *wlc, struct sk_buff *p); +extern bool brcms_c_dotxstatus(struct brcms_c_info *wlc, struct tx_status *txs, + u32 frm_tx2); +extern void brcms_c_txfifo(struct brcms_c_info *wlc, uint fifo, + struct sk_buff *p, + bool commit, s8 txpktpend); +extern void brcms_c_txfifo_complete(struct brcms_c_info *wlc, uint fifo, + s8 txpktpend); +extern void brcms_c_txq_enq(void *ctx, struct scb *scb, struct sk_buff *sdu, + uint prec); +extern void brcms_c_info_init(struct brcms_c_info *wlc, int unit); +extern void brcms_c_print_txstatus(struct tx_status *txs); +extern int brcms_c_xmtfifo_sz_get(struct brcms_c_info *wlc, uint fifo, + uint *blocks); +extern void brcms_c_write_template_ram(struct brcms_c_info *wlc, int offset, + int len, void *buf); +extern void brcms_c_write_hw_bcntemplates(struct brcms_c_info *wlc, void *bcn, + int len, bool both); +extern void brcms_c_pllreq(struct brcms_c_info *wlc, bool set, mbool req_bit); +extern void brcms_c_reset_bmac_done(struct brcms_c_info *wlc); #if defined(BCMDBG) -extern void wlc_print_rxh(d11rxhdr_t *rxh); -extern void wlc_print_hdrs(struct wlc_info *wlc, const char *prefix, u8 *frame, - d11txh_t *txh, d11rxhdr_t *rxh, uint len); -extern void wlc_print_txdesc(d11txh_t *txh); +extern void brcms_c_print_rxh(struct d11rxhdr *rxh); +extern void brcms_c_print_txdesc(struct d11txh *txh); #else -#define wlc_print_txdesc(a) -#endif -#if defined(BCMDBG) -extern void wlc_print_dot11_mac_hdr(u8 *buf, int len); +#define brcms_c_print_txdesc(a) #endif -extern void wlc_setxband(struct wlc_hw_info *wlc_hw, uint bandunit); -extern void wlc_coredisable(struct wlc_hw_info *wlc_hw); +extern void brcms_c_setxband(struct brcms_hardware *wlc_hw, uint bandunit); +extern void brcms_c_coredisable(struct brcms_hardware *wlc_hw); -extern bool wlc_valid_rate(struct wlc_info *wlc, ratespec_t rate, int band, - bool verbose); -extern void wlc_ap_upd(struct wlc_info *wlc); +extern bool brcms_c_valid_rate(struct brcms_c_info *wlc, ratespec_t rate, + int band, bool verbose); +extern void brcms_c_ap_upd(struct brcms_c_info *wlc); /* helper functions */ -extern void wlc_shm_ssid_upd(struct wlc_info *wlc, struct wlc_bsscfg *cfg); -extern int wlc_set_gmode(struct wlc_info *wlc, u8 gmode, bool config); - -extern void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc); -extern void wlc_mac_bcn_promisc(struct wlc_info *wlc); -extern void wlc_mac_promisc(struct wlc_info *wlc); -extern void wlc_txflowcontrol(struct wlc_info *wlc, struct wlc_txq_info *qi, - bool on, int prio); -extern void wlc_txflowcontrol_override(struct wlc_info *wlc, - struct wlc_txq_info *qi, +extern void brcms_c_shm_ssid_upd(struct brcms_c_info *wlc, + struct brcms_bss_cfg *cfg); +extern int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config); + +extern void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, + bool promisc); +extern void brcms_c_mac_bcn_promisc(struct brcms_c_info *wlc); +extern void brcms_c_mac_promisc(struct brcms_c_info *wlc); +extern void brcms_c_txflowcontrol(struct brcms_c_info *wlc, + struct brcms_txq_info *qi, + bool on, int prio); +extern void brcms_c_txflowcontrol_override(struct brcms_c_info *wlc, + struct brcms_txq_info *qi, bool on, uint override); -extern bool wlc_txflowcontrol_prio_isset(struct wlc_info *wlc, - struct wlc_txq_info *qi, int prio); -extern void wlc_send_q(struct wlc_info *wlc); -extern int wlc_prep_pdu(struct wlc_info *wlc, struct sk_buff *pdu, uint *fifo); - -extern u16 wlc_calc_lsig_len(struct wlc_info *wlc, ratespec_t ratespec, +extern bool brcms_c_txflowcontrol_prio_isset(struct brcms_c_info *wlc, + struct brcms_txq_info *qi, + int prio); +extern void brcms_c_send_q(struct brcms_c_info *wlc); +extern int brcms_c_prep_pdu(struct brcms_c_info *wlc, struct sk_buff *pdu, + uint *fifo); + +extern u16 brcms_c_calc_lsig_len(struct brcms_c_info *wlc, ratespec_t ratespec, uint mac_len); -extern ratespec_t wlc_rspec_to_rts_rspec(struct wlc_info *wlc, ratespec_t rspec, - bool use_rspec, u16 mimo_ctlchbw); -extern u16 wlc_compute_rtscts_dur(struct wlc_info *wlc, bool cts_only, - ratespec_t rts_rate, ratespec_t frame_rate, - u8 rts_preamble_type, - u8 frame_preamble_type, uint frame_len, - bool ba); - -extern void wlc_tbtt(struct wlc_info *wlc, d11regs_t *regs); -extern void wlc_inval_dma_pkts(struct wlc_hw_info *hw, +extern ratespec_t brcms_c_rspec_to_rts_rspec(struct brcms_c_info *wlc, + ratespec_t rspec, + bool use_rspec, u16 mimo_ctlchbw); +extern u16 brcms_c_compute_rtscts_dur(struct brcms_c_info *wlc, bool cts_only, + ratespec_t rts_rate, + ratespec_t frame_rate, + u8 rts_preamble_type, + u8 frame_preamble_type, uint frame_len, + bool ba); + +extern void brcms_c_tbtt(struct brcms_c_info *wlc); +extern void brcms_c_inval_dma_pkts(struct brcms_hardware *hw, struct ieee80211_sta *sta, void (*dma_callback_fn)); -#if defined(BCMDBG) -extern void wlc_dump_ie(struct wlc_info *wlc, bcm_tlv_t *ie, - struct bcmstrbuf *b); -#endif - -extern void wlc_reprate_init(struct wlc_info *wlc); -extern void wlc_bsscfg_reprate_init(struct wlc_bsscfg *bsscfg); +extern void brcms_c_reprate_init(struct brcms_c_info *wlc); +extern void brcms_c_bsscfg_reprate_init(struct brcms_bss_cfg *bsscfg); /* Shared memory access */ -extern void wlc_write_shm(struct wlc_info *wlc, uint offset, u16 v); -extern u16 wlc_read_shm(struct wlc_info *wlc, uint offset); -extern void wlc_copyto_shm(struct wlc_info *wlc, uint offset, const void *buf, - int len); - -extern void wlc_update_beacon(struct wlc_info *wlc); -extern void wlc_bss_update_beacon(struct wlc_info *wlc, - struct wlc_bsscfg *bsscfg); - -extern void wlc_update_probe_resp(struct wlc_info *wlc, bool suspend); -extern void wlc_bss_update_probe_resp(struct wlc_info *wlc, - struct wlc_bsscfg *cfg, bool suspend); - -extern bool wlc_ismpc(struct wlc_info *wlc); -extern bool wlc_is_non_delay_mpc(struct wlc_info *wlc); -extern void wlc_radio_mpc_upd(struct wlc_info *wlc); -extern bool wlc_prec_enq(struct wlc_info *wlc, struct pktq *q, void *pkt, - int prec); -extern bool wlc_prec_enq_head(struct wlc_info *wlc, struct pktq *q, +extern void brcms_c_write_shm(struct brcms_c_info *wlc, uint offset, u16 v); +extern u16 brcms_c_read_shm(struct brcms_c_info *wlc, uint offset); +extern void brcms_c_copyto_shm(struct brcms_c_info *wlc, uint offset, + const void *buf, int len); + +extern void brcms_c_update_beacon(struct brcms_c_info *wlc); +extern void brcms_c_bss_update_beacon(struct brcms_c_info *wlc, + struct brcms_bss_cfg *bsscfg); + +extern void brcms_c_update_probe_resp(struct brcms_c_info *wlc, bool suspend); +extern void brcms_c_bss_update_probe_resp(struct brcms_c_info *wlc, + struct brcms_bss_cfg *cfg, + bool suspend); +extern bool brcms_c_ismpc(struct brcms_c_info *wlc); +extern bool brcms_c_is_non_delay_mpc(struct brcms_c_info *wlc); +extern void brcms_c_radio_mpc_upd(struct brcms_c_info *wlc); +extern bool brcms_c_prec_enq(struct brcms_c_info *wlc, struct pktq *q, + void *pkt, int prec); +extern bool brcms_c_prec_enq_head(struct brcms_c_info *wlc, struct pktq *q, struct sk_buff *pkt, int prec, bool head); -extern u16 wlc_phytxctl1_calc(struct wlc_info *wlc, ratespec_t rspec); -extern void wlc_compute_plcp(struct wlc_info *wlc, ratespec_t rate, uint length, - u8 *plcp); -extern uint wlc_calc_frame_time(struct wlc_info *wlc, ratespec_t ratespec, - u8 preamble_type, uint mac_len); - -extern void wlc_set_chanspec(struct wlc_info *wlc, chanspec_t chanspec); +extern u16 brcms_c_phytxctl1_calc(struct brcms_c_info *wlc, ratespec_t rspec); +extern void brcms_c_compute_plcp(struct brcms_c_info *wlc, ratespec_t rate, + uint length, u8 *plcp); +extern uint brcms_c_calc_frame_time(struct brcms_c_info *wlc, + ratespec_t ratespec, + u8 preamble_type, uint mac_len); -extern bool wlc_timers_init(struct wlc_info *wlc, int unit); +extern void brcms_c_set_chanspec(struct brcms_c_info *wlc, + chanspec_t chanspec); -extern const bcm_iovar_t wlc_iovars[]; - -extern int wlc_doiovar(void *hdl, const bcm_iovar_t *vi, u32 actionid, - const char *name, void *params, uint p_len, void *arg, - int len, int val_size, struct wlc_if *wlcif); - -#if defined(BCMDBG) -extern void wlc_print_ies(struct wlc_info *wlc, u8 *ies, uint ies_len); -#endif +extern bool brcms_c_timers_init(struct brcms_c_info *wlc, int unit); -extern int wlc_set_nmode(struct wlc_info *wlc, s32 nmode); -extern void wlc_mimops_action_ht_send(struct wlc_info *wlc, - struct wlc_bsscfg *bsscfg, +extern int brcms_c_set_nmode(struct brcms_c_info *wlc, s32 nmode); +extern void brcms_c_mimops_action_ht_send(struct brcms_c_info *wlc, + struct brcms_bss_cfg *bsscfg, u8 mimops_mode); -extern void wlc_switch_shortslot(struct wlc_info *wlc, bool shortslot); -extern void wlc_set_bssid(struct wlc_bsscfg *cfg); -extern void wlc_edcf_setparams(struct wlc_info *wlc, bool suspend); +extern void brcms_c_switch_shortslot(struct brcms_c_info *wlc, bool shortslot); +extern void brcms_c_set_bssid(struct brcms_bss_cfg *cfg); +extern void brcms_c_edcf_setparams(struct brcms_c_info *wlc, bool suspend); -extern void wlc_set_ratetable(struct wlc_info *wlc); -extern int wlc_set_mac(struct wlc_bsscfg *cfg); -extern void wlc_beacon_phytxctl_txant_upd(struct wlc_info *wlc, +extern void brcms_c_set_ratetable(struct brcms_c_info *wlc); +extern int brcms_c_set_mac(struct brcms_bss_cfg *cfg); +extern void brcms_c_beacon_phytxctl_txant_upd(struct brcms_c_info *wlc, ratespec_t bcn_rate); -extern void wlc_mod_prb_rsp_rate_table(struct wlc_info *wlc, uint frame_len); -extern ratespec_t wlc_lowest_basic_rspec(struct wlc_info *wlc, - wlc_rateset_t *rs); -extern void wlc_radio_disable(struct wlc_info *wlc); -extern void wlc_bcn_li_upd(struct wlc_info *wlc); - -extern int wlc_get_revision_info(struct wlc_info *wlc, void *buf, uint len); -extern void wlc_set_home_chanspec(struct wlc_info *wlc, chanspec_t chanspec); -extern void wlc_watchdog_upd(struct wlc_info *wlc, bool tbtt); -extern bool wlc_ps_allowed(struct wlc_info *wlc); -extern bool wlc_stay_awake(struct wlc_info *wlc); -extern void wlc_wme_initparams_sta(struct wlc_info *wlc, wme_param_ie_t *pe); - -#endif /* _wlc_h_ */ +extern void brcms_c_mod_prb_rsp_rate_table(struct brcms_c_info *wlc, + uint frame_len); +extern ratespec_t brcms_c_lowest_basic_rspec(struct brcms_c_info *wlc, + wlc_rateset_t *rs); +extern void brcms_c_radio_disable(struct brcms_c_info *wlc); +extern void brcms_c_bcn_li_upd(struct brcms_c_info *wlc); +extern void brcms_c_set_home_chanspec(struct brcms_c_info *wlc, + chanspec_t chanspec); +extern bool brcms_c_ps_allowed(struct brcms_c_info *wlc); +extern bool brcms_c_stay_awake(struct brcms_c_info *wlc); +extern void brcms_c_wme_initparams_sta(struct brcms_c_info *wlc, + struct wme_param_ie *pe); + +#endif /* _BRCM_MAIN_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.c b/drivers/staging/brcm80211/brcmsmac/nicpci.c index 18b844a8d2f..3d71c590fce 100644 --- a/drivers/staging/brcm80211/brcmsmac/nicpci.c +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.c @@ -14,78 +14,245 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ +#include <linux/slab.h> #include <linux/delay.h> -#include <linux/string.h> #include <linux/pci.h> -#include <bcmdefs.h> -#include <bcmutils.h> -#include <bcmnvram.h> -#include <aiutils.h> -#include <hndsoc.h> -#include <bcmdevs.h> -#include <sbchipc.h> -#include <pci_core.h> -#include <pcie_core.h> -#include <nicpci.h> -#include <pcicfg.h> - -typedef struct { + +#include <defs.h> +#include <soc.h> +#include <chipcommon.h> +#include "aiutils.h" +#include "pub.h" +#include "nicpci.h" + +/* SPROM offsets */ +#define SRSH_ASPM_OFFSET 4 /* word 4 */ +#define SRSH_ASPM_ENB 0x18 /* bit 3, 4 */ +#define SRSH_ASPM_L1_ENB 0x10 /* bit 4 */ +#define SRSH_ASPM_L0s_ENB 0x8 /* bit 3 */ + +#define SRSH_PCIE_MISC_CONFIG 5 /* word 5 */ +#define SRSH_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */ +#define SRSH_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */ +#define SRSH_CLKREQ_ENB 0x0800 /* bit 11 */ +#define SRSH_BD_OFFSET 6 /* word 6 */ + +/* chipcontrol */ +#define CHIPCTRL_4321_PLL_DOWN 0x800000/* serdes PLL down override */ + +/* MDIO control */ +#define MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */ +#define MDIOCTL_DIVISOR_VAL 0x2 +#define MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */ +#define MDIOCTL_ACCESS_DONE 0x100 /* Transaction complete */ + +/* MDIO Data */ +#define MDIODATA_MASK 0x0000ffff /* data 2 bytes */ +#define MDIODATA_TA 0x00020000 /* Turnaround */ + +#define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */ +#define MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */ +#define MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */ +#define MDIODATA_DEVADDR_MASK 0x0f800000 + /* Physmedia devaddr Mask */ + +/* MDIO Data for older revisions < 10 */ +#define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift */ +#define MDIODATA_REGADDR_MASK_OLD 0x003c0000 + /* Regaddr Mask */ +#define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift */ +#define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 + /* Physmedia devaddr Mask */ + +/* Transactions flags */ +#define MDIODATA_WRITE 0x10000000 +#define MDIODATA_READ 0x20000000 +#define MDIODATA_START 0x40000000 + +#define MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */ +#define MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */ + +/* serdes regs (rev < 10) */ +#define MDIODATA_DEV_PLL 0x1d /* SERDES PLL Dev */ +#define MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */ +#define MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */ + +/* SERDES RX registers */ +#define SERDES_RX_CTRL 1 /* Rx cntrl */ +#define SERDES_RX_TIMER1 2 /* Rx Timer1 */ +#define SERDES_RX_CDR 6 /* CDR */ +#define SERDES_RX_CDRBW 7 /* CDR BW */ +/* SERDES RX control register */ +#define SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */ +#define SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */ + +/* SERDES PLL registers */ +#define SERDES_PLL_CTRL 1 /* PLL control reg */ +#define PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */ + +/* Linkcontrol reg offset in PCIE Cap */ +#define PCIE_CAP_LINKCTRL_OFFSET 16 /* offset in pcie cap */ +#define PCIE_CAP_LCREG_ASPML0s 0x01 /* ASPM L0s in linkctrl */ +#define PCIE_CAP_LCREG_ASPML1 0x02 /* ASPM L1 in linkctrl */ +#define PCIE_CLKREQ_ENAB 0x100 /* CLKREQ Enab in linkctrl */ + +#define PCIE_ASPM_ENAB 3 /* ASPM L0s & L1 in linkctrl */ +#define PCIE_ASPM_L1_ENAB 2 /* ASPM L0s & L1 in linkctrl */ +#define PCIE_ASPM_L0s_ENAB 1 /* ASPM L0s & L1 in linkctrl */ +#define PCIE_ASPM_DISAB 0 /* ASPM L0s & L1 in linkctrl */ + +/* Power management threshold */ +#define PCIE_L1THRESHOLDTIME_MASK 0xFF00 /* bits 8 - 15 */ +#define PCIE_L1THRESHOLDTIME_SHIFT 8 /* PCIE_L1THRESHOLDTIME_SHIFT */ +#define PCIE_L1THRESHOLD_WARVAL 0x72 /* WAR value */ +#define PCIE_ASPMTIMER_EXTEND 0x01000000 + /* > rev7: + * enable extend ASPM timer + */ + +/* different register spaces to access thru pcie indirect access */ +#define PCIE_CONFIGREGS 1 /* Access to config space */ +#define PCIE_PCIEREGS 2 /* Access to pcie registers */ + +/* PCIE protocol PHY diagnostic registers */ +#define PCIE_PLP_STATUSREG 0x204 /* Status */ + +/* Status reg PCIE_PLP_STATUSREG */ +#define PCIE_PLP_POLARITYINV_STAT 0x10 + +/* PCIE protocol DLLP diagnostic registers */ +#define PCIE_DLLP_LCREG 0x100 /* Link Control */ +#define PCIE_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */ + +/* PCIE protocol TLP diagnostic registers */ +#define PCIE_TLP_WORKAROUNDSREG 0x004 /* TLP Workarounds */ + +/* Sonics side: PCI core and host control registers */ +struct sbpciregs { + u32 control; /* PCI control */ + u32 PAD[3]; + u32 arbcontrol; /* PCI arbiter control */ + u32 clkrun; /* Clkrun Control (>=rev11) */ + u32 PAD[2]; + u32 intstatus; /* Interrupt status */ + u32 intmask; /* Interrupt mask */ + u32 sbtopcimailbox; /* Sonics to PCI mailbox */ + u32 PAD[9]; + u32 bcastaddr; /* Sonics broadcast address */ + u32 bcastdata; /* Sonics broadcast data */ + u32 PAD[2]; + u32 gpioin; /* ro: gpio input (>=rev2) */ + u32 gpioout; /* rw: gpio output (>=rev2) */ + u32 gpioouten; /* rw: gpio output enable (>= rev2) */ + u32 gpiocontrol; /* rw: gpio control (>= rev2) */ + u32 PAD[36]; + u32 sbtopci0; /* Sonics to PCI translation 0 */ + u32 sbtopci1; /* Sonics to PCI translation 1 */ + u32 sbtopci2; /* Sonics to PCI translation 2 */ + u32 PAD[189]; + u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */ + u16 sprom[36]; /* SPROM shadow Area */ + u32 PAD[46]; +}; + +/* SB side: PCIE core and host control registers */ +struct sbpcieregs { + u32 control; /* host mode only */ + u32 PAD[2]; + u32 biststatus; /* bist Status: 0x00C */ + u32 gpiosel; /* PCIE gpio sel: 0x010 */ + u32 gpioouten; /* PCIE gpio outen: 0x14 */ + u32 PAD[2]; + u32 intstatus; /* Interrupt status: 0x20 */ + u32 intmask; /* Interrupt mask: 0x24 */ + u32 sbtopcimailbox; /* sb to pcie mailbox: 0x028 */ + u32 PAD[53]; + u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */ + u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */ + u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */ + u32 PAD[5]; + + /* pcie core supports in direct access to config space */ + u32 configaddr; /* pcie config space access: Address field: 0x120 */ + u32 configdata; /* pcie config space access: Data field: 0x124 */ + + /* mdio access to serdes */ + u32 mdiocontrol; /* controls the mdio access: 0x128 */ + u32 mdiodata; /* Data to the mdio access: 0x12c */ + + /* pcie protocol phy/dllp/tlp register indirect access mechanism */ + u32 pcieindaddr; /* indirect access to + * the internal register: 0x130 + */ + u32 pcieinddata; /* Data to/from the internal regsiter: 0x134 */ + + u32 clkreqenctrl; /* >= rev 6, Clkreq rdma control : 0x138 */ + u32 PAD[177]; + u32 pciecfg[4][64]; /* 0x400 - 0x7FF, PCIE Cfg Space */ + u16 sprom[64]; /* SPROM shadow Area */ +}; + +struct pcicore_info { union { - sbpcieregs_t *pcieregs; + struct sbpcieregs *pcieregs; struct sbpciregs *pciregs; } regs; /* Memory mapped register to the core */ - si_t *sih; /* System interconnect handle */ + struct si_pub *sih; /* System interconnect handle */ struct pci_dev *dev; - u8 pciecap_lcreg_offset; /* PCIE capability LCreg offset in the config space */ + u8 pciecap_lcreg_offset;/* PCIE capability LCreg offset + * in the config space + */ bool pcie_pr42767; u8 pcie_polarity; u8 pcie_war_aspm_ovr; /* Override ASPM/Clkreq settings */ u8 pmecap_offset; /* PM Capability offset in the config space */ bool pmecap; /* Capable of generating PME */ -} pcicore_info_t; +}; /* debug/trace */ #define PCI_ERROR(args) -#define PCIE_PUB(sih) \ - (((sih)->bustype == PCI_BUS) && ((sih)->buscoretype == PCIE_CORE_ID)) +#define PCIE_PUB(sih) \ + (((sih)->bustype == PCI_BUS) && \ + ((sih)->buscoretype == PCIE_CORE_ID)) /* routines to access mdio slave device registers */ -static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk); -static int pcie_mdioop(pcicore_info_t *pi, uint physmedia, uint regaddr, +static bool pcie_mdiosetblock(struct pcicore_info *pi, uint blk); +static int pcie_mdioop(struct pcicore_info *pi, uint physmedia, uint regaddr, bool write, uint *val); -static int pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint readdr, +static int pcie_mdiowrite(struct pcicore_info *pi, uint physmedia, uint readdr, uint val); -static int pcie_mdioread(pcicore_info_t *pi, uint physmedia, uint readdr, +static int pcie_mdioread(struct pcicore_info *pi, uint physmedia, uint readdr, uint *ret_val); -static void pcie_extendL1timer(pcicore_info_t *pi, bool extend); -static void pcie_clkreq_upd(pcicore_info_t *pi, uint state); - -static void pcie_war_aspm_clkreq(pcicore_info_t *pi); -static void pcie_war_serdes(pcicore_info_t *pi); -static void pcie_war_noplldown(pcicore_info_t *pi); -static void pcie_war_polarity(pcicore_info_t *pi); -static void pcie_war_pci_setup(pcicore_info_t *pi); +static void pcie_extendL1timer(struct pcicore_info *pi, bool extend); +static void pcie_clkreq_upd(struct pcicore_info *pi, uint state); -static bool pcicore_pmecap(pcicore_info_t *pi); +static void pcie_war_aspm_clkreq(struct pcicore_info *pi); +static void pcie_war_serdes(struct pcicore_info *pi); +static void pcie_war_noplldown(struct pcicore_info *pi); +static void pcie_war_polarity(struct pcicore_info *pi); +static void pcie_war_pci_setup(struct pcicore_info *pi); -#define PCIE_ASPM(sih) ((PCIE_PUB(sih)) && (((sih)->buscorerev >= 3) && ((sih)->buscorerev <= 5))) +#define PCIE_ASPM(sih) \ + ((PCIE_PUB(sih)) && \ + (((sih)->buscorerev >= 3) && \ + ((sih)->buscorerev <= 5))) /* delay needed between the mdio control/ mdiodata register data access */ #define PR28829_DELAY() udelay(10) -/* Initialize the PCI core. It's caller's responsibility to make sure that this is done - * only once +/* Initialize the PCI core. + * It's caller's responsibility to make sure that this is done only once */ -void *pcicore_init(si_t *sih, void *pdev, void *regs) +void *pcicore_init(struct si_pub *sih, void *pdev, void *regs) { - pcicore_info_t *pi; + struct pcicore_info *pi; - /* alloc pcicore_info_t */ - pi = kzalloc(sizeof(pcicore_info_t), GFP_ATOMIC); + /* alloc struct pcicore_info */ + pi = kzalloc(sizeof(struct pcicore_info), GFP_ATOMIC); if (pi == NULL) { PCI_ERROR(("pci_attach: malloc failed!\n")); return NULL; @@ -96,23 +263,19 @@ void *pcicore_init(si_t *sih, void *pdev, void *regs) if (sih->buscoretype == PCIE_CORE_ID) { u8 cap_ptr; - pi->regs.pcieregs = (sbpcieregs_t *) regs; + pi->regs.pcieregs = regs; cap_ptr = pcicore_find_pci_capability(pi->dev, PCI_CAP_ID_EXP, NULL, NULL); pi->pciecap_lcreg_offset = cap_ptr + PCIE_CAP_LINKCTRL_OFFSET; } else - pi->regs.pciregs = (struct sbpciregs *) regs; + pi->regs.pciregs = regs; return pi; } void pcicore_deinit(void *pch) { - pcicore_info_t *pi = (pcicore_info_t *) pch; - - if (pi == NULL) - return; - kfree(pi); + kfree(pch); } /* return cap_offset if requested capability exists in the PCI config space */ @@ -141,7 +304,9 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id, if (cap_ptr == 0x00) goto end; - /* loop thr'u the capability list and see if the pcie capabilty exists */ + /* loop thru the capability list + * and see if the pcie capability exists + */ pci_read_config_byte(dev, cap_ptr, &cap_id); @@ -151,18 +316,18 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id, break; pci_read_config_byte(dev, cap_ptr, &cap_id); } - if (cap_id != req_cap_id) { + if (cap_id != req_cap_id) goto end; - } + /* found the caller requested capability */ - if ((buf != NULL) && (buflen != NULL)) { + if (buf != NULL && buflen != NULL) { u8 cap_data; bufsize = *buflen; if (!bufsize) goto end; *buflen = 0; - /* copy the cpability data excluding cap ID and next ptr */ + /* copy the capability data excluding cap ID and next ptr */ cap_data = cap_ptr + 2; if ((bufsize + cap_data) > PCI_SZPCR) bufsize = PCI_SZPCR - cap_data; @@ -173,38 +338,34 @@ pcicore_find_pci_capability(void *dev, u8 req_cap_id, buf++; } } - end: +end: return cap_ptr; } /* ***** Register Access API */ -uint -pcie_readreg(sbpcieregs_t *pcieregs, uint addrtype, - uint offset) +static uint +pcie_readreg(struct sbpcieregs *pcieregs, uint addrtype, uint offset) { uint retval = 0xFFFFFFFF; switch (addrtype) { case PCIE_CONFIGREGS: - W_REG((&pcieregs->configaddr), offset); + W_REG(&pcieregs->configaddr, offset); (void)R_REG((&pcieregs->configaddr)); - retval = R_REG(&(pcieregs->configdata)); + retval = R_REG(&pcieregs->configdata); break; case PCIE_PCIEREGS: - W_REG(&(pcieregs->pcieindaddr), offset); - (void)R_REG((&pcieregs->pcieindaddr)); - retval = R_REG(&(pcieregs->pcieinddata)); - break; - default: + W_REG(&pcieregs->pcieindaddr, offset); + (void)R_REG(&pcieregs->pcieindaddr); + retval = R_REG(&pcieregs->pcieinddata); break; } return retval; } -uint -pcie_writereg(sbpcieregs_t *pcieregs, uint addrtype, - uint offset, uint val) +static uint +pcie_writereg(struct sbpcieregs *pcieregs, uint addrtype, uint offset, uint val) { switch (addrtype) { case PCIE_CONFIGREGS: @@ -221,26 +382,23 @@ pcie_writereg(sbpcieregs_t *pcieregs, uint addrtype, return 0; } -static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk) +static bool pcie_mdiosetblock(struct pcicore_info *pi, uint blk) { - sbpcieregs_t *pcieregs = pi->regs.pcieregs; + struct sbpcieregs *pcieregs = pi->regs.pcieregs; uint mdiodata, i = 0; uint pcie_serdes_spinwait = 200; - mdiodata = - MDIODATA_START | MDIODATA_WRITE | (MDIODATA_DEV_ADDR << - MDIODATA_DEVADDR_SHF) | - (MDIODATA_BLK_ADDR << MDIODATA_REGADDR_SHF) | MDIODATA_TA | (blk << - 4); + mdiodata = (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | + (MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) | + (MDIODATA_BLK_ADDR << MDIODATA_REGADDR_SHF) | + (blk << 4)); W_REG(&pcieregs->mdiodata, mdiodata); PR28829_DELAY(); /* retry till the transaction is complete */ while (i < pcie_serdes_spinwait) { - if (R_REG(&(pcieregs->mdiocontrol)) & - MDIOCTL_ACCESS_DONE) { + if (R_REG(&pcieregs->mdiocontrol) & MDIOCTL_ACCESS_DONE) break; - } udelay(1000); i++; } @@ -254,35 +412,36 @@ static bool pcie_mdiosetblock(pcicore_info_t *pi, uint blk) } static int -pcie_mdioop(pcicore_info_t *pi, uint physmedia, uint regaddr, bool write, +pcie_mdioop(struct pcicore_info *pi, uint physmedia, uint regaddr, bool write, uint *val) { - sbpcieregs_t *pcieregs = pi->regs.pcieregs; + struct sbpcieregs *pcieregs = pi->regs.pcieregs; uint mdiodata; uint i = 0; uint pcie_serdes_spinwait = 10; /* enable mdio access to SERDES */ - W_REG((&pcieregs->mdiocontrol), - MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL); + W_REG(&pcieregs->mdiocontrol, MDIOCTL_PREAM_EN | MDIOCTL_DIVISOR_VAL); if (pi->sih->buscorerev >= 10) { - /* new serdes is slower in rw, using two layers of reg address mapping */ + /* new serdes is slower in rw, + * using two layers of reg address mapping + */ if (!pcie_mdiosetblock(pi, physmedia)) return 1; - mdiodata = (MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) | - (regaddr << MDIODATA_REGADDR_SHF); + mdiodata = ((MDIODATA_DEV_ADDR << MDIODATA_DEVADDR_SHF) | + (regaddr << MDIODATA_REGADDR_SHF)); pcie_serdes_spinwait *= 20; } else { - mdiodata = (physmedia << MDIODATA_DEVADDR_SHF_OLD) | - (regaddr << MDIODATA_REGADDR_SHF_OLD); + mdiodata = ((physmedia << MDIODATA_DEVADDR_SHF_OLD) | + (regaddr << MDIODATA_REGADDR_SHF_OLD)); } if (!write) mdiodata |= (MDIODATA_START | MDIODATA_READ | MDIODATA_TA); else - mdiodata |= - (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | *val); + mdiodata |= (MDIODATA_START | MDIODATA_WRITE | MDIODATA_TA | + *val); W_REG(&pcieregs->mdiodata, mdiodata); @@ -290,16 +449,14 @@ pcie_mdioop(pcicore_info_t *pi, uint physmedia, uint regaddr, bool write, /* retry till the transaction is complete */ while (i < pcie_serdes_spinwait) { - if (R_REG(&(pcieregs->mdiocontrol)) & - MDIOCTL_ACCESS_DONE) { + if (R_REG(&pcieregs->mdiocontrol) & MDIOCTL_ACCESS_DONE) { if (!write) { PR28829_DELAY(); - *val = - (R_REG(&(pcieregs->mdiodata)) & - MDIODATA_MASK); + *val = (R_REG(&pcieregs->mdiodata) & + MDIODATA_MASK); } /* Disable mdio access to SERDES */ - W_REG((&pcieregs->mdiocontrol), 0); + W_REG(&pcieregs->mdiocontrol, 0); return 0; } udelay(1000); @@ -308,28 +465,29 @@ pcie_mdioop(pcicore_info_t *pi, uint physmedia, uint regaddr, bool write, PCI_ERROR(("pcie_mdioop: timed out op: %d\n", write)); /* Disable mdio access to SERDES */ - W_REG((&pcieregs->mdiocontrol), 0); + W_REG(&pcieregs->mdiocontrol, 0); return 1; } /* use the mdio interface to read from mdio slaves */ static int -pcie_mdioread(pcicore_info_t *pi, uint physmedia, uint regaddr, uint *regval) +pcie_mdioread(struct pcicore_info *pi, uint physmedia, uint regaddr, + uint *regval) { return pcie_mdioop(pi, physmedia, regaddr, false, regval); } /* use the mdio interface to write to mdio slaves */ static int -pcie_mdiowrite(pcicore_info_t *pi, uint physmedia, uint regaddr, uint val) +pcie_mdiowrite(struct pcicore_info *pi, uint physmedia, uint regaddr, uint val) { return pcie_mdioop(pi, physmedia, regaddr, true, &val); } /* ***** Support functions ***** */ -u8 pcie_clkreq(void *pch, u32 mask, u32 val) +static u8 pcie_clkreq(void *pch, u32 mask, u32 val) { - pcicore_info_t *pi = (pcicore_info_t *) pch; + struct pcicore_info *pi = pch; u32 reg_val; u8 offset; @@ -353,11 +511,11 @@ u8 pcie_clkreq(void *pch, u32 mask, u32 val) return 0; } -static void pcie_extendL1timer(pcicore_info_t *pi, bool extend) +static void pcie_extendL1timer(struct pcicore_info *pi, bool extend) { u32 w; - si_t *sih = pi->sih; - sbpcieregs_t *pcieregs = pi->regs.pcieregs; + struct si_pub *sih = pi->sih; + struct sbpcieregs *pcieregs = pi->regs.pcieregs; if (!PCIE_PUB(sih) || sih->buscorerev < 7) return; @@ -372,9 +530,9 @@ static void pcie_extendL1timer(pcicore_info_t *pi, bool extend) } /* centralized clkreq control policy */ -static void pcie_clkreq_upd(pcicore_info_t *pi, uint state) +static void pcie_clkreq_upd(struct pcicore_info *pi, uint state) { - si_t *sih = pi->sih; + struct si_pub *sih = pi->sih; switch (state) { case SI_DOATTACH: @@ -384,8 +542,8 @@ static void pcie_clkreq_upd(pcicore_info_t *pi, uint state) case SI_PCIDOWN: if (sih->buscorerev == 6) { /* turn on serdes PLL down */ ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_addr), ~0, - 0); + offsetof(chipcregs_t, chipcontrol_addr), + ~0, 0); ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_data), ~0x40, 0); @@ -396,8 +554,8 @@ static void pcie_clkreq_upd(pcicore_info_t *pi, uint state) case SI_PCIUP: if (sih->buscorerev == 6) { /* turn off serdes PLL down */ ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_addr), ~0, - 0); + offsetof(chipcregs_t, chipcontrol_addr), + ~0, 0); ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_data), ~0x40, 0x40); @@ -405,31 +563,28 @@ static void pcie_clkreq_upd(pcicore_info_t *pi, uint state) pcie_clkreq((void *)pi, 1, 0); } break; - default: - break; } } /* ***** PCI core WARs ***** */ /* Done only once at attach time */ -static void pcie_war_polarity(pcicore_info_t *pi) +static void pcie_war_polarity(struct pcicore_info *pi) { u32 w; if (pi->pcie_polarity != 0) return; - w = pcie_readreg(pi->regs.pcieregs, PCIE_PCIEREGS, - PCIE_PLP_STATUSREG); + w = pcie_readreg(pi->regs.pcieregs, PCIE_PCIEREGS, PCIE_PLP_STATUSREG); /* Detect the current polarity at attach and force that polarity and * disable changing the polarity */ if ((w & PCIE_PLP_POLARITYINV_STAT) == 0) - pi->pcie_polarity = (SERDES_RX_CTRL_FORCE); + pi->pcie_polarity = SERDES_RX_CTRL_FORCE; else - pi->pcie_polarity = - (SERDES_RX_CTRL_FORCE | SERDES_RX_CTRL_POLARITY); + pi->pcie_polarity = (SERDES_RX_CTRL_FORCE | + SERDES_RX_CTRL_POLARITY); } /* enable ASPM and CLKREQ if srom doesn't have it */ @@ -437,10 +592,10 @@ static void pcie_war_polarity(pcicore_info_t *pi) * : Coming out of 'standby'/'hibernate' * : If pcie_war_aspm_ovr state changed */ -static void pcie_war_aspm_clkreq(pcicore_info_t *pi) +static void pcie_war_aspm_clkreq(struct pcicore_info *pi) { - sbpcieregs_t *pcieregs = pi->regs.pcieregs; - si_t *sih = pi->sih; + struct sbpcieregs *pcieregs = pi->regs.pcieregs; + struct si_pub *sih = pi->sih; u16 val16, *reg16; u32 w; @@ -448,28 +603,23 @@ static void pcie_war_aspm_clkreq(pcicore_info_t *pi) return; /* bypass this on QT or VSIM */ - if (!ISSIM_ENAB(sih)) { - - reg16 = &pcieregs->sprom[SRSH_ASPM_OFFSET]; - val16 = R_REG(reg16); + reg16 = &pcieregs->sprom[SRSH_ASPM_OFFSET]; + val16 = R_REG(reg16); - val16 &= ~SRSH_ASPM_ENB; - if (pi->pcie_war_aspm_ovr == PCIE_ASPM_ENAB) - val16 |= SRSH_ASPM_ENB; - else if (pi->pcie_war_aspm_ovr == PCIE_ASPM_L1_ENAB) - val16 |= SRSH_ASPM_L1_ENB; - else if (pi->pcie_war_aspm_ovr == PCIE_ASPM_L0s_ENAB) - val16 |= SRSH_ASPM_L0s_ENB; + val16 &= ~SRSH_ASPM_ENB; + if (pi->pcie_war_aspm_ovr == PCIE_ASPM_ENAB) + val16 |= SRSH_ASPM_ENB; + else if (pi->pcie_war_aspm_ovr == PCIE_ASPM_L1_ENAB) + val16 |= SRSH_ASPM_L1_ENB; + else if (pi->pcie_war_aspm_ovr == PCIE_ASPM_L0s_ENAB) + val16 |= SRSH_ASPM_L0s_ENB; - W_REG(reg16, val16); + W_REG(reg16, val16); - pci_read_config_dword(pi->dev, pi->pciecap_lcreg_offset, - &w); - w &= ~PCIE_ASPM_ENAB; - w |= pi->pcie_war_aspm_ovr; - pci_write_config_dword(pi->dev, - pi->pciecap_lcreg_offset, w); - } + pci_read_config_dword(pi->dev, pi->pciecap_lcreg_offset, &w); + w &= ~PCIE_ASPM_ENAB; + w |= pi->pcie_war_aspm_ovr; + pci_write_config_dword(pi->dev, pi->pciecap_lcreg_offset, w); reg16 = &pcieregs->sprom[SRSH_CLKREQ_OFFSET_REV5]; val16 = R_REG(reg16); @@ -485,7 +635,7 @@ static void pcie_war_aspm_clkreq(pcicore_info_t *pi) /* Apply the polarity determined at the start */ /* Needs to happen when coming out of 'standby'/'hibernate' */ -static void pcie_war_serdes(pcicore_info_t *pi) +static void pcie_war_serdes(struct pcicore_info *pi) { u32 w = 0; @@ -502,9 +652,9 @@ static void pcie_war_serdes(pcicore_info_t *pi) /* Fix MISC config to allow coming out of L2/L3-Ready state w/o PRST */ /* Needs to happen when coming out of 'standby'/'hibernate' */ -static void pcie_misc_config_fixup(pcicore_info_t *pi) +static void pcie_misc_config_fixup(struct pcicore_info *pi) { - sbpcieregs_t *pcieregs = pi->regs.pcieregs; + struct sbpcieregs *pcieregs = pi->regs.pcieregs; u16 val16, *reg16; reg16 = &pcieregs->sprom[SRSH_PCIE_MISC_CONFIG]; @@ -518,28 +668,28 @@ static void pcie_misc_config_fixup(pcicore_info_t *pi) /* quick hack for testing */ /* Needs to happen when coming out of 'standby'/'hibernate' */ -static void pcie_war_noplldown(pcicore_info_t *pi) +static void pcie_war_noplldown(struct pcicore_info *pi) { - sbpcieregs_t *pcieregs = pi->regs.pcieregs; + struct sbpcieregs *pcieregs = pi->regs.pcieregs; u16 *reg16; /* turn off serdes PLL down */ ai_corereg(pi->sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol), CHIPCTRL_4321_PLL_DOWN, CHIPCTRL_4321_PLL_DOWN); - /* clear srom shadow backdoor */ + /* clear srom shadow backdoor */ reg16 = &pcieregs->sprom[SRSH_BD_OFFSET]; W_REG(reg16, 0); } /* Needs to happen when coming out of 'standby'/'hibernate' */ -static void pcie_war_pci_setup(pcicore_info_t *pi) +static void pcie_war_pci_setup(struct pcicore_info *pi) { - si_t *sih = pi->sih; - sbpcieregs_t *pcieregs = pi->regs.pcieregs; + struct si_pub *sih = pi->sih; + struct sbpcieregs *pcieregs = pi->regs.pcieregs; u32 w; - if ((sih->buscorerev == 0) || (sih->buscorerev == 1)) { + if (sih->buscorerev == 0 || sih->buscorerev == 1) { w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_TLP_WORKAROUNDSREG); w |= 0x8; @@ -549,7 +699,7 @@ static void pcie_war_pci_setup(pcicore_info_t *pi) if (sih->buscorerev == 1) { w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG); - w |= (0x40); + w |= 0x40; pcie_writereg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_LCREG, w); } @@ -561,8 +711,8 @@ static void pcie_war_pci_setup(pcicore_info_t *pi) /* Change the L1 threshold for better performance */ w = pcie_readreg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG); - w &= ~(PCIE_L1THRESHOLDTIME_MASK); - w |= (PCIE_L1THRESHOLD_WARVAL << PCIE_L1THRESHOLDTIME_SHIFT); + w &= ~PCIE_L1THRESHOLDTIME_MASK; + w |= PCIE_L1THRESHOLD_WARVAL << PCIE_L1THRESHOLDTIME_SHIFT; pcie_writereg(pcieregs, PCIE_PCIEREGS, PCIE_DLLP_PMTHRESHREG, w); @@ -572,41 +722,25 @@ static void pcie_war_pci_setup(pcicore_info_t *pi) } else if (pi->sih->buscorerev == 7) pcie_war_noplldown(pi); - /* Note that the fix is actually in the SROM, that's why this is open-ended */ + /* Note that the fix is actually in the SROM, + * that's why this is open-ended + */ if (pi->sih->buscorerev >= 6) pcie_misc_config_fixup(pi); } -void pcie_war_ovr_aspm_update(void *pch, u8 aspm) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - - if (!PCIE_ASPM(pi->sih)) - return; - - /* Validate */ - if (aspm > PCIE_ASPM_ENAB) - return; - - pi->pcie_war_aspm_ovr = aspm; - - /* Update the current state */ - pcie_war_aspm_clkreq(pi); -} - /* ***** Functions called during driver state changes ***** */ void pcicore_attach(void *pch, char *pvars, int state) { - pcicore_info_t *pi = (pcicore_info_t *) pch; - si_t *sih = pi->sih; + struct pcicore_info *pi = pch; + struct si_pub *sih = pi->sih; /* Determine if this board needs override */ if (PCIE_ASPM(sih)) { - if ((u32) getintvar(pvars, "boardflags2") & BFL2_PCIEWAR_OVR) { + if ((u32)getintvar(pvars, "boardflags2") & BFL2_PCIEWAR_OVR) pi->pcie_war_aspm_ovr = PCIE_ASPM_DISAB; - } else { + else pi->pcie_war_aspm_ovr = PCIE_ASPM_ENAB; - } } /* These need to happen in this order only */ @@ -622,7 +756,7 @@ void pcicore_attach(void *pch, char *pvars, int state) void pcicore_hwup(void *pch) { - pcicore_info_t *pi = (pcicore_info_t *) pch; + struct pcicore_info *pi = pch; if (!pi || !PCIE_PUB(pi->sih)) return; @@ -632,7 +766,7 @@ void pcicore_hwup(void *pch) void pcicore_up(void *pch, int state) { - pcicore_info_t *pi = (pcicore_info_t *) pch; + struct pcicore_info *pi = pch; if (!pi || !PCIE_PUB(pi->sih)) return; @@ -643,10 +777,12 @@ void pcicore_up(void *pch, int state) pcie_clkreq_upd(pi, state); } -/* When the device is going to enter D3 state (or the system is going to enter S3/S4 states */ +/* When the device is going to enter D3 state + * (or the system is going to enter S3/S4 states) + */ void pcicore_sleep(void *pch) { - pcicore_info_t *pi = (pcicore_info_t *) pch; + struct pcicore_info *pi = pch; u32 w; if (!pi || !PCIE_ASPM(pi->sih)) @@ -661,7 +797,7 @@ void pcicore_sleep(void *pch) void pcicore_down(void *pch, int state) { - pcicore_info_t *pi = (pcicore_info_t *) pch; + struct pcicore_info *pi = pch; if (!pi || !PCIE_PUB(pi->sih)) return; @@ -672,165 +808,43 @@ void pcicore_down(void *pch, int state) pcie_extendL1timer(pi, false); } -/* ***** Wake-on-wireless-LAN (WOWL) support functions ***** */ -/* Just uses PCI config accesses to find out, when needed before sb_attach is done */ -bool pcicore_pmecap_fast(void *pch) +/* precondition: current core is sii->buscoretype */ +void pcicore_fixcfg(void *pch, void *regs) { - pcicore_info_t *pi = (pcicore_info_t *) pch; - u8 cap_ptr; - u32 pmecap; - - cap_ptr = pcicore_find_pci_capability(pi->dev, PCI_CAP_ID_PM, NULL, - NULL); - - if (!cap_ptr) - return false; - - pci_read_config_dword(pi->dev, cap_ptr, &pmecap); + struct pcicore_info *pi = pch; + struct si_info *sii = SI_INFO(pi->sih); + struct sbpciregs *pciregs = regs; + struct sbpcieregs *pcieregs = regs; + u16 val16, *reg16 = NULL; + uint pciidx; - return (pmecap & (PCI_PM_CAP_PME_MASK << 16)) != 0; -} - -/* return true if PM capability exists in the pci config space - * Uses and caches the information using core handle - */ -static bool pcicore_pmecap(pcicore_info_t *pi) -{ - u8 cap_ptr; - u32 pmecap; - - if (!pi->pmecap_offset) { - cap_ptr = pcicore_find_pci_capability(pi->dev, - PCI_CAP_ID_PM, - NULL, NULL); - if (!cap_ptr) - return false; - - pi->pmecap_offset = cap_ptr; - - pci_read_config_dword(pi->dev, pi->pmecap_offset, - &pmecap); - - /* At least one state can generate PME */ - pi->pmecap = (pmecap & (PCI_PM_CAP_PME_MASK << 16)) != 0; + /* check 'pi' is correct and fix it if not */ + if (sii->pub.buscoretype == PCIE_CORE_ID) + reg16 = &pcieregs->sprom[SRSH_PI_OFFSET]; + else if (sii->pub.buscoretype == PCI_CORE_ID) + reg16 = &pciregs->sprom[SRSH_PI_OFFSET]; + pciidx = ai_coreidx(&sii->pub); + val16 = R_REG(reg16); + if (((val16 & SRSH_PI_MASK) >> SRSH_PI_SHIFT) != (u16)pciidx) { + val16 = (u16)(pciidx << SRSH_PI_SHIFT) | + (val16 & ~SRSH_PI_MASK); + W_REG(reg16, val16); } - - return pi->pmecap; } -/* Enable PME generation */ -void pcicore_pmeen(void *pch) +/* precondition: current core is pci core */ +void pcicore_pci_setup(void *pch, void *regs) { - pcicore_info_t *pi = (pcicore_info_t *) pch; + struct pcicore_info *pi = pch; + struct sbpciregs *pciregs = regs; u32 w; - /* if not pmecapable return */ - if (!pcicore_pmecap(pi)) - return; - - pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL, - &w); - w |= (PCI_PM_CTRL_PME_ENABLE); - pci_write_config_dword(pi->dev, - pi->pmecap_offset + PCI_PM_CTRL, w); -} - -/* - * Return true if PME status set - */ -bool pcicore_pmestat(void *pch) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - u32 w; - - if (!pcicore_pmecap(pi)) - return false; - - pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL, - &w); - - return (w & PCI_PM_CTRL_PME_STATUS) == PCI_PM_CTRL_PME_STATUS; -} + OR_REG(&pciregs->sbtopci2, SBTOPCI_PREF | SBTOPCI_BURST); -/* Disable PME generation, clear the PME status bit if set - */ -void pcicore_pmeclr(void *pch) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - u32 w; - - if (!pcicore_pmecap(pi)) - return; - - pci_read_config_dword(pi->dev, pi->pmecap_offset + PCI_PM_CTRL, - &w); - - PCI_ERROR(("pcicore_pci_pmeclr PMECSR : 0x%x\n", w)); - - /* PMESTAT is cleared by writing 1 to it */ - w &= ~(PCI_PM_CTRL_PME_ENABLE); - - pci_write_config_dword(pi->dev, - pi->pmecap_offset + PCI_PM_CTRL, w); -} - -u32 pcie_lcreg(void *pch, u32 mask, u32 val) -{ - pcicore_info_t *pi = (pcicore_info_t *) pch; - u8 offset; - u32 tmpval; - - offset = pi->pciecap_lcreg_offset; - if (!offset) - return 0; - - /* set operation */ - if (mask) - pci_write_config_dword(pi->dev, offset, val); - - pci_read_config_dword(pi->dev, offset, &tmpval); - return tmpval; -} - -u32 -pcicore_pciereg(void *pch, u32 offset, u32 mask, u32 val, uint type) -{ - u32 reg_val = 0; - pcicore_info_t *pi = (pcicore_info_t *) pch; - sbpcieregs_t *pcieregs = pi->regs.pcieregs; - - if (mask) { - PCI_ERROR(("PCIEREG: 0x%x writeval 0x%x\n", offset, val)); - pcie_writereg(pcieregs, type, offset, val); - } - - /* Should not read register 0x154 */ - if (pi->sih->buscorerev <= 5 && offset == PCIE_DLLP_PCIE11 - && type == PCIE_PCIEREGS) - return reg_val; - - reg_val = pcie_readreg(pcieregs, type, offset); - PCI_ERROR(("PCIEREG: 0x%x readval is 0x%x\n", offset, reg_val)); - - return reg_val; -} - -u32 -pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset, u32 mask, - u32 val) -{ - u32 reg_val = 0; - pcicore_info_t *pi = (pcicore_info_t *) pch; - - if (mask) { - PCI_ERROR(("PCIEMDIOREG: 0x%x writeval 0x%x\n", offset, val)); - pcie_mdiowrite(pi, mdioslave, offset, val); + if (SI_INFO(pi->sih)->pub.buscorerev >= 11) { + OR_REG(&pciregs->sbtopci2, SBTOPCI_RC_READMULTI); + w = R_REG(&pciregs->clkrun); + W_REG(&pciregs->clkrun, w | PCI_CLKRUN_DSBL); + w = R_REG(&pciregs->clkrun); } - - if (pcie_mdioread(pi, mdioslave, offset, ®_val)) - reg_val = 0xFFFFFFFF; - PCI_ERROR(("PCIEMDIOREG: dev 0x%x offset 0x%x read 0x%x\n", mdioslave, - offset, reg_val)); - - return reg_val; } diff --git a/drivers/staging/brcm80211/brcmsmac/nicpci.h b/drivers/staging/brcm80211/brcmsmac/nicpci.h new file mode 100644 index 00000000000..f71f842a215 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/nicpci.h @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_NICPCI_H_ +#define _BRCM_NICPCI_H_ + +#include "types.h" + +/* PCI configuration address space size */ +#define PCI_SZPCR 256 + +/* Brcm PCI configuration registers */ +/* backplane address space accessed by BAR0 */ +#define PCI_BAR0_WIN 0x80 +/* sprom property control */ +#define PCI_SPROM_CONTROL 0x88 +/* mask of PCI and other cores interrupts */ +#define PCI_INT_MASK 0x94 +/* backplane core interrupt mask bits offset */ +#define PCI_SBIM_SHIFT 8 +/* backplane address space accessed by second 4KB of BAR0 */ +#define PCI_BAR0_WIN2 0xac +/* pci config space gpio input (>=rev3) */ +#define PCI_GPIO_IN 0xb0 +/* pci config space gpio output (>=rev3) */ +#define PCI_GPIO_OUT 0xb4 +/* pci config space gpio output enable (>=rev3) */ +#define PCI_GPIO_OUTEN 0xb8 + +/* bar0 + 4K accesses external sprom */ +#define PCI_BAR0_SPROM_OFFSET (4 * 1024) +/* bar0 + 6K accesses pci core registers */ +#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) +/* + * pci core SB registers are at the end of the + * 8KB window, so their address is the "regular" + * address plus 4K + */ +#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) +/* bar0 window size Match with corerev 13 */ +#define PCI_BAR0_WINSZ (16 * 1024) +/* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */ +/* bar0 + 8K accesses pci/pcie core registers */ +#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) +/* bar0 + 12K accesses chipc core registers */ +#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) + +#define PCI_CLKRUN_DSBL 0x8000 /* Bit 15 forceClkrun */ + +/* Sonics to PCI translation types */ +#define SBTOPCI_PREF 0x4 /* prefetch enable */ +#define SBTOPCI_BURST 0x8 /* burst enable */ +#define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */ + +/* PCI core index in SROM shadow area */ +#define SRSH_PI_OFFSET 0 /* first word */ +#define SRSH_PI_MASK 0xf000 /* bit 15:12 */ +#define SRSH_PI_SHIFT 12 /* bit 15:12 */ + +extern void *pcicore_init(struct si_pub *sih, void *pdev, void *regs); +extern void pcicore_deinit(void *pch); +extern void pcicore_attach(void *pch, char *pvars, int state); +extern void pcicore_hwup(void *pch); +extern void pcicore_up(void *pch, int state); +extern void pcicore_sleep(void *pch); +extern void pcicore_down(void *pch, int state); +extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, + unsigned char *buf, u32 *buflen); +extern void pcicore_fixcfg(void *pch, void *regs); +extern void pcicore_pci_setup(void *pch, void *regs); + +#endif /* _BRCM_NICPCI_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/nvram.c b/drivers/staging/brcm80211/brcmsmac/nvram.c deleted file mode 100644 index 085ec0b9224..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/nvram.c +++ /dev/null @@ -1,215 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#include <linux/slab.h> -#include <linux/string.h> -#include <bcmdefs.h> -#include <bcmutils.h> -#include <bcmnvram.h> -#include <sbchipc.h> -#include <bcmdevs.h> -#include <hndsoc.h> - -#define NVR_MSG(x) - -typedef struct _vars { - struct _vars *next; - int bufsz; /* allocated size */ - int size; /* actual vars size */ - char *vars; -} vars_t; - -#define VARS_T_OH sizeof(vars_t) - -static vars_t *vars; - -#define NVRAM_FILE 1 - -static char *findvar(char *vars, char *lim, const char *name); - -int nvram_init(void) -{ - - /* Make sure we read nvram in flash just once before freeing the memory */ - if (vars != NULL) { - NVR_MSG(("nvram_init: called again without calling nvram_exit()\n")); - return 0; - } - return 0; -} - -int nvram_append(char *varlst, uint varsz) -{ - uint bufsz = VARS_T_OH; - vars_t *new; - - new = kmalloc(bufsz, GFP_ATOMIC); - if (new == NULL) - return -ENOMEM; - - new->vars = varlst; - new->bufsz = bufsz; - new->size = varsz; - new->next = vars; - vars = new; - - return 0; -} - -void nvram_exit(void) -{ - vars_t *this, *next; - - this = vars; - if (this) - kfree(this->vars); - - while (this) { - next = this->next; - kfree(this); - this = next; - } - vars = NULL; -} - -static char *findvar(char *vars, char *lim, const char *name) -{ - char *s; - int len; - - len = strlen(name); - - for (s = vars; (s < lim) && *s;) { - if ((memcmp(s, name, len) == 0) && (s[len] == '=')) - return &s[len + 1]; - - while (*s++) - ; - } - - return NULL; -} - -/* - * Search the name=value vars for a specific one and return its value. - * Returns NULL if not found. - */ -char *getvar(char *vars, const char *name) -{ - char *s; - int len; - - if (!name) - return NULL; - - len = strlen(name); - if (len == 0) - return NULL; - - /* first look in vars[] */ - for (s = vars; s && *s;) { - if ((memcmp(s, name, len) == 0) && (s[len] == '=')) - return &s[len + 1]; - - while (*s++) - ; - } - /* then query nvram */ - return nvram_get(name); -} - -/* - * Search the vars for a specific one and return its value as - * an integer. Returns 0 if not found. - */ -int getintvar(char *vars, const char *name) -{ - char *val; - - val = getvar(vars, name); - if (val == NULL) - return 0; - - return simple_strtoul(val, NULL, 0); -} - -char *nvram_get(const char *name) -{ - char *v = NULL; - vars_t *cur; - - for (cur = vars; cur; cur = cur->next) { - v = findvar(cur->vars, cur->vars + cur->size, name); - if (v) - break; - } - - return v; -} - -int nvram_set(const char *name, const char *value) -{ - return 0; -} - -int nvram_unset(const char *name) -{ - return 0; -} - -int nvram_reset(void) -{ - return 0; -} - -int nvram_commit(void) -{ - return 0; -} - -int nvram_getall(char *buf, int count) -{ - int len, resid = count; - vars_t *this; - - this = vars; - while (this) { - char *from, *lim, *to; - int acc; - - from = this->vars; - lim = (char *)(this->vars + this->size); - to = buf; - acc = 0; - while ((from < lim) && (*from)) { - len = strlen(from) + 1; - if (resid < (acc + len)) - return -EOVERFLOW; - memcpy(to, from, len); - acc += len; - from += len; - to += len; - } - - resid -= acc; - buf += acc; - this = this->next; - } - if (resid < 1) - return -EOVERFLOW; - *buf = '\0'; - return 0; -} diff --git a/drivers/staging/brcm80211/brcmsmac/otp.c b/drivers/staging/brcm80211/brcmsmac/otp.c new file mode 100644 index 00000000000..34253cf3781 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/otp.c @@ -0,0 +1,544 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <linux/io.h> +#include <linux/errno.h> + +#include <brcm_hw_ids.h> +#include <chipcommon.h> +#include "aiutils.h" +#include "otp.h" + +#define OTPS_GUP_MASK 0x00000f00 +#define OTPS_GUP_SHIFT 8 +#define OTPS_GUP_HW 0x00000100 /* h/w subregion is programmed */ +#define OTPS_GUP_SW 0x00000200 /* s/w subregion is programmed */ +#define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */ +#define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */ + +/* Fields in otpprog in rev >= 21 */ +#define OTPP_COL_MASK 0x000000ff +#define OTPP_COL_SHIFT 0 +#define OTPP_ROW_MASK 0x0000ff00 +#define OTPP_ROW_SHIFT 8 +#define OTPP_OC_MASK 0x0f000000 +#define OTPP_OC_SHIFT 24 +#define OTPP_READERR 0x10000000 +#define OTPP_VALUE_MASK 0x20000000 +#define OTPP_VALUE_SHIFT 29 +#define OTPP_START_BUSY 0x80000000 +#define OTPP_READ 0x40000000 + +/* Opcodes for OTPP_OC field */ +#define OTPPOC_READ 0 +#define OTPPOC_BIT_PROG 1 +#define OTPPOC_VERIFY 3 +#define OTPPOC_INIT 4 +#define OTPPOC_SET 5 +#define OTPPOC_RESET 6 +#define OTPPOC_OCST 7 +#define OTPPOC_ROW_LOCK 8 +#define OTPPOC_PRESCN_TEST 9 + +#define OTPTYPE_IPX(ccrev) ((ccrev) == 21 || (ccrev) >= 23) + +#define OTPP_TRIES 10000000 /* # of tries for OTPP */ + +#define MAXNUMRDES 9 /* Maximum OTP redundancy entries */ + +/* OTP common function type */ +typedef int (*otp_status_t) (void *oh); +typedef int (*otp_size_t) (void *oh); +typedef void *(*otp_init_t) (struct si_pub *sih); +typedef u16(*otp_read_bit_t) (void *oh, chipcregs_t *cc, uint off); +typedef int (*otp_read_region_t) (struct si_pub *sih, int region, u16 *data, + uint *wlen); +typedef int (*otp_nvread_t) (void *oh, char *data, uint *len); + +/* OTP function struct */ +struct otp_fn_s { + otp_size_t size; + otp_read_bit_t read_bit; + otp_init_t init; + otp_read_region_t read_region; + otp_nvread_t nvread; + otp_status_t status; +}; + +struct otpinfo { + uint ccrev; /* chipc revision */ + struct otp_fn_s *fn; /* OTP functions */ + struct si_pub *sih; /* Saved sb handle */ + + /* IPX OTP section */ + u16 wsize; /* Size of otp in words */ + u16 rows; /* Geometry */ + u16 cols; /* Geometry */ + u32 status; /* Flag bits (lock/prog/rv). + * (Reflected only when OTP is power cycled) + */ + u16 hwbase; /* hardware subregion offset */ + u16 hwlim; /* hardware subregion boundary */ + u16 swbase; /* software subregion offset */ + u16 swlim; /* software subregion boundary */ + u16 fbase; /* fuse subregion offset */ + u16 flim; /* fuse subregion boundary */ + int otpgu_base; /* offset to General Use Region */ +}; + +static struct otpinfo otpinfo; + +/* + * IPX OTP Code + * + * Exported functions: + * ipxotp_status() + * ipxotp_size() + * ipxotp_init() + * ipxotp_read_bit() + * ipxotp_read_region() + * ipxotp_nvread() + * + */ + +#define HWSW_RGN(rgn) (((rgn) == OTP_HW_RGN) ? "h/w" : "s/w") + +/* OTP layout */ +/* CC revs 21, 24 and 27 OTP General Use Region word offset */ +#define REVA4_OTPGU_BASE 12 + +/* CC revs 23, 25, 26, 28 and above OTP General Use Region word offset */ +#define REVB8_OTPGU_BASE 20 + +/* CC rev 36 OTP General Use Region word offset */ +#define REV36_OTPGU_BASE 12 + +/* Subregion word offsets in General Use region */ +#define OTPGU_HSB_OFF 0 +#define OTPGU_SFB_OFF 1 +#define OTPGU_CI_OFF 2 +#define OTPGU_P_OFF 3 +#define OTPGU_SROM_OFF 4 + +/* Flag bit offsets in General Use region */ +#define OTPGU_HWP_OFF 60 +#define OTPGU_SWP_OFF 61 +#define OTPGU_CIP_OFF 62 +#define OTPGU_FUSEP_OFF 63 +#define OTPGU_CIP_MSK 0x4000 +#define OTPGU_P_MSK 0xf000 +#define OTPGU_P_SHIFT (OTPGU_HWP_OFF % 16) + +/* OTP Size */ +#define OTP_SZ_FU_324 ((roundup(324, 8))/8) /* 324 bits */ +#define OTP_SZ_FU_288 (288/8) /* 288 bits */ +#define OTP_SZ_FU_216 (216/8) /* 216 bits */ +#define OTP_SZ_FU_72 (72/8) /* 72 bits */ +#define OTP_SZ_CHECKSUM (16/8) /* 16 bits */ +#define OTP4315_SWREG_SZ 178 /* 178 bytes */ +#define OTP_SZ_FU_144 (144/8) /* 144 bits */ + +static int ipxotp_status(void *oh) +{ + struct otpinfo *oi = (struct otpinfo *) oh; + return (int)(oi->status); +} + +/* Return size in bytes */ +static int ipxotp_size(void *oh) +{ + struct otpinfo *oi = (struct otpinfo *) oh; + return (int)oi->wsize * 2; +} + +static u16 ipxotp_otpr(void *oh, chipcregs_t *cc, uint wn) +{ + struct otpinfo *oi; + + oi = (struct otpinfo *) oh; + + return R_REG(&cc->sromotp[wn]); +} + +static u16 ipxotp_read_bit(void *oh, chipcregs_t *cc, uint off) +{ + struct otpinfo *oi = (struct otpinfo *) oh; + uint k, row, col; + u32 otpp, st; + + row = off / oi->cols; + col = off % oi->cols; + + otpp = OTPP_START_BUSY | + ((OTPPOC_READ << OTPP_OC_SHIFT) & OTPP_OC_MASK) | + ((row << OTPP_ROW_SHIFT) & OTPP_ROW_MASK) | + ((col << OTPP_COL_SHIFT) & OTPP_COL_MASK); + W_REG(&cc->otpprog, otpp); + + for (k = 0; + ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY) + && (k < OTPP_TRIES); k++) + ; + if (k >= OTPP_TRIES) { + return 0xffff; + } + if (st & OTPP_READERR) { + return 0xffff; + } + st = (st & OTPP_VALUE_MASK) >> OTPP_VALUE_SHIFT; + + return (int)st; +} + +/* Calculate max HW/SW region byte size by subtracting fuse region and checksum size, + * osizew is oi->wsize (OTP size - GU size) in words + */ +static int ipxotp_max_rgnsz(struct si_pub *sih, int osizew) +{ + int ret = 0; + + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; + break; + case BCM4313_CHIP_ID: + ret = osizew * 2 - OTP_SZ_FU_72 - OTP_SZ_CHECKSUM; + break; + default: + break; /* Don't know about this chip */ + } + + return ret; +} + +static void _ipxotp_init(struct otpinfo *oi, chipcregs_t *cc) +{ + uint k; + u32 otpp, st; + + /* record word offset of General Use Region for various chipcommon revs */ + if (oi->sih->ccrev == 21 || oi->sih->ccrev == 24 + || oi->sih->ccrev == 27) { + oi->otpgu_base = REVA4_OTPGU_BASE; + } else if (oi->sih->ccrev == 36) { + /* OTP size greater than equal to 2KB (128 words), otpgu_base is similar to rev23 */ + if (oi->wsize >= 128) + oi->otpgu_base = REVB8_OTPGU_BASE; + else + oi->otpgu_base = REV36_OTPGU_BASE; + } else if (oi->sih->ccrev == 23 || oi->sih->ccrev >= 25) { + oi->otpgu_base = REVB8_OTPGU_BASE; + } + + /* First issue an init command so the status is up to date */ + otpp = + OTPP_START_BUSY | ((OTPPOC_INIT << OTPP_OC_SHIFT) & OTPP_OC_MASK); + + W_REG(&cc->otpprog, otpp); + for (k = 0; + ((st = R_REG(&cc->otpprog)) & OTPP_START_BUSY) + && (k < OTPP_TRIES); k++) + ; + if (k >= OTPP_TRIES) { + return; + } + + /* Read OTP lock bits and subregion programmed indication bits */ + oi->status = R_REG(&cc->otpstatus); + + if ((oi->sih->chip == BCM43224_CHIP_ID) + || (oi->sih->chip == BCM43225_CHIP_ID)) { + u32 p_bits; + p_bits = + (ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_P_OFF) & + OTPGU_P_MSK) + >> OTPGU_P_SHIFT; + oi->status |= (p_bits << OTPS_GUP_SHIFT); + } + + /* + * h/w region base and fuse region limit are fixed to the top and + * the bottom of the general use region. Everything else can be flexible. + */ + oi->hwbase = oi->otpgu_base + OTPGU_SROM_OFF; + oi->hwlim = oi->wsize; + if (oi->status & OTPS_GUP_HW) { + oi->hwlim = + ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_HSB_OFF) / 16; + oi->swbase = oi->hwlim; + } else + oi->swbase = oi->hwbase; + + /* subtract fuse and checksum from beginning */ + oi->swlim = ipxotp_max_rgnsz(oi->sih, oi->wsize) / 2; + + if (oi->status & OTPS_GUP_SW) { + oi->swlim = + ipxotp_otpr(oi, cc, oi->otpgu_base + OTPGU_SFB_OFF) / 16; + oi->fbase = oi->swlim; + } else + oi->fbase = oi->swbase; + + oi->flim = oi->wsize; +} + +static void *ipxotp_init(struct si_pub *sih) +{ + uint idx; + chipcregs_t *cc; + struct otpinfo *oi; + + /* Make sure we're running IPX OTP */ + if (!OTPTYPE_IPX(sih->ccrev)) + return NULL; + + /* Make sure OTP is not disabled */ + if (ai_is_otp_disabled(sih)) + return NULL; + + /* OTP is always powered */ + oi = &otpinfo; + + /* Check for otp size */ + switch ((sih->cccaps & CC_CAP_OTPSIZE) >> CC_CAP_OTPSIZE_SHIFT) { + case 0: + /* Nothing there */ + return NULL; + case 1: /* 32x64 */ + oi->rows = 32; + oi->cols = 64; + oi->wsize = 128; + break; + case 2: /* 64x64 */ + oi->rows = 64; + oi->cols = 64; + oi->wsize = 256; + break; + case 5: /* 96x64 */ + oi->rows = 96; + oi->cols = 64; + oi->wsize = 384; + break; + case 7: /* 16x64 *//* 1024 bits */ + oi->rows = 16; + oi->cols = 64; + oi->wsize = 64; + break; + default: + /* Don't know the geometry */ + return NULL; + } + + /* Retrieve OTP region info */ + idx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + _ipxotp_init(oi, cc); + + ai_setcoreidx(sih, idx); + + return (void *)oi; +} + +static int ipxotp_read_region(void *oh, int region, u16 *data, uint *wlen) +{ + struct otpinfo *oi = (struct otpinfo *) oh; + uint idx; + chipcregs_t *cc; + uint base, i, sz; + + /* Validate region selection */ + switch (region) { + case OTP_HW_RGN: + sz = (uint) oi->hwlim - oi->hwbase; + if (!(oi->status & OTPS_GUP_HW)) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->hwbase; + break; + case OTP_SW_RGN: + sz = ((uint) oi->swlim - oi->swbase); + if (!(oi->status & OTPS_GUP_SW)) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->swbase; + break; + case OTP_CI_RGN: + sz = OTPGU_CI_SZ; + if (!(oi->status & OTPS_GUP_CI)) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->otpgu_base + OTPGU_CI_OFF; + break; + case OTP_FUSE_RGN: + sz = (uint) oi->flim - oi->fbase; + if (!(oi->status & OTPS_GUP_FUSE)) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->fbase; + break; + case OTP_ALL_RGN: + sz = ((uint) oi->flim - oi->hwbase); + if (!(oi->status & (OTPS_GUP_HW | OTPS_GUP_SW))) { + *wlen = sz; + return -ENODATA; + } + if (*wlen < sz) { + *wlen = sz; + return -EOVERFLOW; + } + base = oi->hwbase; + break; + default: + return -EINVAL; + } + + idx = ai_coreidx(oi->sih); + cc = ai_setcoreidx(oi->sih, SI_CC_IDX); + + /* Read the data */ + for (i = 0; i < sz; i++) + data[i] = ipxotp_otpr(oh, cc, base + i); + + ai_setcoreidx(oi->sih, idx); + *wlen = sz; + return 0; +} + +static int ipxotp_nvread(void *oh, char *data, uint *len) +{ + return -ENOTSUPP; +} + +static struct otp_fn_s ipxotp_fn = { + (otp_size_t) ipxotp_size, + (otp_read_bit_t) ipxotp_read_bit, + + (otp_init_t) ipxotp_init, + (otp_read_region_t) ipxotp_read_region, + (otp_nvread_t) ipxotp_nvread, + + (otp_status_t) ipxotp_status +}; + +/* + * otp_status() + * otp_size() + * otp_read_bit() + * otp_init() + * otp_read_region() + * otp_nvread() + */ + +int otp_status(void *oh) +{ + struct otpinfo *oi = (struct otpinfo *) oh; + + return oi->fn->status(oh); +} + +int otp_size(void *oh) +{ + struct otpinfo *oi = (struct otpinfo *) oh; + + return oi->fn->size(oh); +} + +u16 otp_read_bit(void *oh, uint offset) +{ + struct otpinfo *oi = (struct otpinfo *) oh; + uint idx = ai_coreidx(oi->sih); + chipcregs_t *cc = ai_setcoreidx(oi->sih, SI_CC_IDX); + u16 readBit = (u16) oi->fn->read_bit(oh, cc, offset); + ai_setcoreidx(oi->sih, idx); + return readBit; +} + +void *otp_init(struct si_pub *sih) +{ + struct otpinfo *oi; + void *ret = NULL; + + oi = &otpinfo; + memset(oi, 0, sizeof(struct otpinfo)); + + oi->ccrev = sih->ccrev; + + if (OTPTYPE_IPX(oi->ccrev)) + oi->fn = &ipxotp_fn; + + if (oi->fn == NULL) { + return NULL; + } + + oi->sih = sih; + + ret = (oi->fn->init) (sih); + + return ret; +} + +int +otp_read_region(struct si_pub *sih, int region, u16 *data, + uint *wlen) { + void *oh; + int err = 0; + + if (ai_is_otp_disabled(sih)) { + err = -EPERM; + goto out; + } + + oh = otp_init(sih); + if (oh == NULL) { + err = -EBADE; + goto out; + } + + err = (((struct otpinfo *) oh)->fn->read_region) + (oh, region, data, wlen); + + out: + return err; +} + +int otp_nvread(void *oh, char *data, uint *len) +{ + struct otpinfo *oi = (struct otpinfo *) oh; + + return oi->fn->nvread(oh, data, len); +} diff --git a/drivers/staging/brcm80211/include/bcmotp.h b/drivers/staging/brcm80211/brcmsmac/otp.h index 5803accaa47..f6d3a56acf1 100644 --- a/drivers/staging/brcm80211/include/bcmotp.h +++ b/drivers/staging/brcm80211/brcmsmac/otp.h @@ -14,8 +14,10 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmotp_h_ -#define _bcmotp_h_ +#ifndef _BRCM_OTP_H_ +#define _BRCM_OTP_H_ + +#include "types.h" /* OTP regions */ #define OTP_HW_RGN 1 @@ -37,8 +39,9 @@ extern int otp_status(void *oh); extern int otp_size(void *oh); extern u16 otp_read_bit(void *oh, uint offset); -extern void *otp_init(si_t *sih); -extern int otp_read_region(si_t *sih, int region, u16 *data, uint *wlen); +extern void *otp_init(struct si_pub *sih); +extern int otp_read_region(struct si_pub *sih, int region, u16 *data, + uint *wlen); extern int otp_nvread(void *oh, char *data, uint *len); -#endif /* _bcmotp_h_ */ +#endif /* _BRCM_OTP_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c index 6cba4dfbc3d..17012fbe9c9 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_cmn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_cmn.c @@ -14,35 +14,27 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <wlc_cfg.h> - -#include <linux/kernel.h> -#include <linux/string.h> -#include <linux/bitops.h> #include <linux/delay.h> -#include <linux/module.h> -#include <linux/pci.h> - -#include <bcmdefs.h> -#include <bcmnvram.h> -#include <sbchipc.h> -#include <bcmdevs.h> -#include <sbhnddma.h> -#include <wlc_phy_int.h> -#include <wlc_phyreg_n.h> -#include <wlc_phy_radio.h> -#include <wlc_phy_lcn.h> +#include <brcm_hw_ids.h> +#include <chipcommon.h> +#include <aiutils.h> +#include <d11.h> +#include <phy_shim.h> +#include "phy_hal.h" +#include "phy_int.h" +#include "phy_radio.h" +#include "phy_lcn.h" +#include "phyreg_n.h" u32 phyhal_msg_level = PHYHAL_ERROR; -typedef struct _chan_info_basic { +struct chan_info_basic { u16 chan; u16 freq; -} chan_info_basic_t; - -static chan_info_basic_t chan_info_all[] = { +}; +static struct chan_info_basic chan_info_all[] = { {1, 2412}, {2, 2417}, {3, 2422}, @@ -117,41 +109,43 @@ u16 ltrn_list[PHY_LTRN_LIST_LEN] = { const u8 ofdm_rate_lookup[] = { - WLC_RATE_48M, - WLC_RATE_24M, - WLC_RATE_12M, - WLC_RATE_6M, - WLC_RATE_54M, - WLC_RATE_36M, - WLC_RATE_18M, - WLC_RATE_9M + BRCM_RATE_48M, + BRCM_RATE_24M, + BRCM_RATE_12M, + BRCM_RATE_6M, + BRCM_RATE_54M, + BRCM_RATE_36M, + BRCM_RATE_18M, + BRCM_RATE_9M }; #define PHY_WREG_LIMIT 24 -static void wlc_set_phy_uninitted(phy_info_t *pi); -static u32 wlc_phy_get_radio_ver(phy_info_t *pi); +static void wlc_set_phy_uninitted(struct brcms_phy *pi); +static u32 wlc_phy_get_radio_ver(struct brcms_phy *pi); static void wlc_phy_timercb_phycal(void *arg); -static bool wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, +static bool wlc_phy_noise_calc_phy(struct brcms_phy *pi, u32 *cmplx_pwr, s8 *pwr_ant); -static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay); -static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, s8 noise_dbm); -static void wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, +static void wlc_phy_cal_perical_mphase_schedule(struct brcms_phy *pi, + uint delay); + +static void wlc_phy_noise_cb(struct brcms_phy *pi, u8 channel, s8 noise_dbm); +static void wlc_phy_noise_sample_request(struct brcms_phy_pub *pih, u8 reason, u8 ch); -static void wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, +static void wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi, struct txpwr_limits *tp, chanspec_t); -static bool wlc_phy_cal_txpower_recalc_sw(phy_info_t *pi); +static bool wlc_phy_cal_txpower_recalc_sw(struct brcms_phy *pi); -static s8 wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, +static s8 wlc_user_txpwr_antport_to_rfport(struct brcms_phy *pi, uint chan, u32 band, u8 rate); -static void wlc_phy_upd_env_txpwr_rate_limits(phy_info_t *pi, u32 band); -static s8 wlc_phy_env_measure_vbat(phy_info_t *pi); -static s8 wlc_phy_env_measure_temperature(phy_info_t *pi); +static void wlc_phy_upd_env_txpwr_rate_limits(struct brcms_phy *pi, u32 band); +static s8 wlc_phy_env_measure_vbat(struct brcms_phy *pi); +static s8 wlc_phy_env_measure_temperature(struct brcms_phy *pi); -char *phy_getvar(phy_info_t *pi, const char *name) +char *phy_getvar(struct brcms_phy *pi, const char *name) { char *vars = pi->vars; char *s; @@ -172,10 +166,10 @@ char *phy_getvar(phy_info_t *pi, const char *name) ; } - return nvram_get(name); + return NULL; } -int phy_getintvar(phy_info_t *pi, const char *name) +int phy_getintvar(struct brcms_phy *pi, const char *name) { char *val; @@ -186,29 +180,29 @@ int phy_getintvar(phy_info_t *pi, const char *name) return simple_strtoul(val, NULL, 0); } -void wlc_phyreg_enter(wlc_phy_t *pih) +void wlc_phyreg_enter(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; wlapi_bmac_ucode_wake_override_phyreg_set(pi->sh->physhim); } -void wlc_phyreg_exit(wlc_phy_t *pih) +void wlc_phyreg_exit(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; wlapi_bmac_ucode_wake_override_phyreg_clear(pi->sh->physhim); } -void wlc_radioreg_enter(wlc_phy_t *pih) +void wlc_radioreg_enter(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; wlapi_bmac_mctrl(pi->sh->physhim, MCTL_LOCK_RADIO, MCTL_LOCK_RADIO); udelay(10); } -void wlc_radioreg_exit(wlc_phy_t *pih) +void wlc_radioreg_exit(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; volatile u16 dummy; dummy = R_REG(&pi->regs->phyversion); @@ -216,7 +210,7 @@ void wlc_radioreg_exit(wlc_phy_t *pih) wlapi_bmac_mctrl(pi->sh->physhim, MCTL_LOCK_RADIO, 0); } -u16 read_radio_reg(phy_info_t *pi, u16 addr) +u16 read_radio_reg(struct brcms_phy *pi, u16 addr) { u16 data; @@ -247,16 +241,10 @@ u16 read_radio_reg(phy_info_t *pi, u16 addr) if ((D11REV_GE(pi->sh->corerev, 24)) || (D11REV_IS(pi->sh->corerev, 22) && (pi->pubpi.phy_type != PHY_TYPE_SSN))) { - W_REG(&pi->regs->radioregaddr, addr); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, addr); data = R_REG(&pi->regs->radioregdata); } else { - W_REG(&pi->regs->phy4waddr, addr); -#ifdef __mips__ - (void)R_REG(&pi->regs->phy4waddr); -#endif + W_REG_FLUSH(&pi->regs->phy4waddr, addr); #ifdef __ARM_ARCH_4T__ __asm__(" .align 4 "); @@ -272,7 +260,7 @@ u16 read_radio_reg(phy_info_t *pi, u16 addr) return data; } -void write_radio_reg(phy_info_t *pi, u16 addr, u16 val) +void write_radio_reg(struct brcms_phy *pi, u16 addr, u16 val) { if (NORADIO_ENAB(pi->pubpi)) return; @@ -281,16 +269,10 @@ void write_radio_reg(phy_info_t *pi, u16 addr, u16 val) (D11REV_IS(pi->sh->corerev, 22) && (pi->pubpi.phy_type != PHY_TYPE_SSN))) { - W_REG(&pi->regs->radioregaddr, addr); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, addr); W_REG(&pi->regs->radioregdata, val); } else { - W_REG(&pi->regs->phy4waddr, addr); -#ifdef __mips__ - (void)R_REG(&pi->regs->phy4waddr); -#endif + W_REG_FLUSH(&pi->regs->phy4waddr, addr); W_REG(&pi->regs->phy4wdatalo, val); } @@ -302,7 +284,7 @@ void write_radio_reg(phy_info_t *pi, u16 addr, u16 val) } } -static u32 read_radio_id(phy_info_t *pi) +static u32 read_radio_id(struct brcms_phy *pi) { u32 id; @@ -312,29 +294,17 @@ static u32 read_radio_id(phy_info_t *pi) if (D11REV_GE(pi->sh->corerev, 24)) { u32 b0, b1, b2; - W_REG(&pi->regs->radioregaddr, 0); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, 0); b0 = (u32) R_REG(&pi->regs->radioregdata); - W_REG(&pi->regs->radioregaddr, 1); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, 1); b1 = (u32) R_REG(&pi->regs->radioregdata); - W_REG(&pi->regs->radioregaddr, 2); -#ifdef __mips__ - (void)R_REG(&pi->regs->radioregaddr); -#endif + W_REG_FLUSH(&pi->regs->radioregaddr, 2); b2 = (u32) R_REG(&pi->regs->radioregdata); id = ((b0 & 0xf) << 28) | (((b2 << 8) | b1) << 12) | ((b0 >> 4) & 0xf); } else { - W_REG(&pi->regs->phy4waddr, RADIO_IDCODE); -#ifdef __mips__ - (void)R_REG(&pi->regs->phy4waddr); -#endif + W_REG_FLUSH(&pi->regs->phy4waddr, RADIO_IDCODE); id = (u32) R_REG(&pi->regs->phy4wdatalo); id |= (u32) R_REG(&pi->regs->phy4wdatahi) << 16; } @@ -342,7 +312,7 @@ static u32 read_radio_id(phy_info_t *pi) return id; } -void and_radio_reg(phy_info_t *pi, u16 addr, u16 val) +void and_radio_reg(struct brcms_phy *pi, u16 addr, u16 val) { u16 rval; @@ -353,7 +323,7 @@ void and_radio_reg(phy_info_t *pi, u16 addr, u16 val) write_radio_reg(pi, addr, (rval & val)); } -void or_radio_reg(phy_info_t *pi, u16 addr, u16 val) +void or_radio_reg(struct brcms_phy *pi, u16 addr, u16 val) { u16 rval; @@ -364,7 +334,7 @@ void or_radio_reg(phy_info_t *pi, u16 addr, u16 val) write_radio_reg(pi, addr, (rval | val)); } -void xor_radio_reg(phy_info_t *pi, u16 addr, u16 mask) +void xor_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask) { u16 rval; @@ -375,7 +345,7 @@ void xor_radio_reg(phy_info_t *pi, u16 addr, u16 mask) write_radio_reg(pi, addr, (rval ^ mask)); } -void mod_radio_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val) +void mod_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val) { u16 rval; @@ -386,35 +356,31 @@ void mod_radio_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val) write_radio_reg(pi, addr, (rval & ~mask) | (val & mask)); } -void write_phy_channel_reg(phy_info_t *pi, uint val) +void write_phy_channel_reg(struct brcms_phy *pi, uint val) { W_REG(&pi->regs->phychannel, val); } -u16 read_phy_reg(phy_info_t *pi, u16 addr) +u16 read_phy_reg(struct brcms_phy *pi, u16 addr) { d11regs_t *regs; regs = pi->regs; - W_REG(®s->phyregaddr, addr); -#ifdef __mips__ - (void)R_REG(®s->phyregaddr); -#endif + W_REG_FLUSH(®s->phyregaddr, addr); pi->phy_wreg = 0; return R_REG(®s->phyregdata); } -void write_phy_reg(phy_info_t *pi, u16 addr, u16 val) +void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) { d11regs_t *regs; regs = pi->regs; #ifdef __mips__ - W_REG(®s->phyregaddr, addr); - (void)R_REG(®s->phyregaddr); + W_REG_FLUSH(®s->phyregaddr, addr); W_REG(®s->phyregdata, val); if (addr == 0x72) (void)R_REG(®s->phyregdata); @@ -430,53 +396,44 @@ void write_phy_reg(phy_info_t *pi, u16 addr, u16 val) #endif } -void and_phy_reg(phy_info_t *pi, u16 addr, u16 val) +void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) { d11regs_t *regs; regs = pi->regs; - W_REG(®s->phyregaddr, addr); -#ifdef __mips__ - (void)R_REG(®s->phyregaddr); -#endif + W_REG_FLUSH(®s->phyregaddr, addr); W_REG(®s->phyregdata, (R_REG(®s->phyregdata) & val)); pi->phy_wreg = 0; } -void or_phy_reg(phy_info_t *pi, u16 addr, u16 val) +void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val) { d11regs_t *regs; regs = pi->regs; - W_REG(®s->phyregaddr, addr); -#ifdef __mips__ - (void)R_REG(®s->phyregaddr); -#endif + W_REG_FLUSH(®s->phyregaddr, addr); W_REG(®s->phyregdata, (R_REG(®s->phyregdata) | val)); pi->phy_wreg = 0; } -void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val) +void mod_phy_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val) { d11regs_t *regs; regs = pi->regs; - W_REG(®s->phyregaddr, addr); -#ifdef __mips__ - (void)R_REG(®s->phyregaddr); -#endif + W_REG_FLUSH(®s->phyregaddr, addr); W_REG(®s->phyregdata, ((R_REG(®s->phyregdata) & ~mask) | (val & mask))); pi->phy_wreg = 0; } -static void WLBANDINITFN(wlc_set_phy_uninitted) (phy_info_t *pi) +static void wlc_set_phy_uninitted(struct brcms_phy *pi) { int i, j; @@ -513,11 +470,11 @@ static void WLBANDINITFN(wlc_set_phy_uninitted) (phy_info_t *pi) } } -shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp) +struct shared_phy *wlc_phy_shared_attach(struct shared_phy_params *shp) { - shared_phy_t *sh; + struct shared_phy *sh; - sh = kzalloc(sizeof(shared_phy_t), GFP_ATOMIC); + sh = kzalloc(sizeof(struct shared_phy), GFP_ATOMIC); if (sh == NULL) { return NULL; } @@ -550,19 +507,14 @@ shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp) return sh; } -void wlc_phy_shared_detach(shared_phy_t *phy_sh) +struct brcms_phy_pub * +wlc_phy_attach(struct shared_phy *sh, void *regs, int bandtype, + char *vars, struct wiphy *wiphy) { - if (phy_sh) { - kfree(phy_sh); - } -} - -wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, - char *vars, struct wiphy *wiphy) -{ - phy_info_t *pi; + struct brcms_phy *pi; u32 sflags = 0; uint phyversion; + u32 idcode; int i; if (D11REV_IS(sh->corerev, 4)) @@ -584,7 +536,7 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, return &pi->pubpi_ro; } - pi = kzalloc(sizeof(phy_info_t), GFP_ATOMIC); + pi = kzalloc(sizeof(struct brcms_phy), GFP_ATOMIC); if (pi == NULL) { return NULL; } @@ -633,27 +585,19 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, } } - if (ISSIM_ENAB(pi->sh->sih)) { - pi->pubpi.radioid = NORADIO_ID; - pi->pubpi.radiorev = 5; - } else { - u32 idcode; - - wlc_phy_anacore((wlc_phy_t *) pi, ON); - - idcode = wlc_phy_get_radio_ver(pi); - pi->pubpi.radioid = - (idcode & IDCODE_ID_MASK) >> IDCODE_ID_SHIFT; - pi->pubpi.radiorev = - (idcode & IDCODE_REV_MASK) >> IDCODE_REV_SHIFT; - pi->pubpi.radiover = - (idcode & IDCODE_VER_MASK) >> IDCODE_VER_SHIFT; - if (!VALID_RADIO(pi, pi->pubpi.radioid)) { - goto err; - } + wlc_phy_anacore((struct brcms_phy_pub *) pi, ON); - wlc_phy_switch_radio((wlc_phy_t *) pi, OFF); - } + idcode = wlc_phy_get_radio_ver(pi); + pi->pubpi.radioid = + (idcode & IDCODE_ID_MASK) >> IDCODE_ID_SHIFT; + pi->pubpi.radiorev = + (idcode & IDCODE_REV_MASK) >> IDCODE_REV_SHIFT; + pi->pubpi.radiover = + (idcode & IDCODE_VER_MASK) >> IDCODE_VER_SHIFT; + if (!VALID_RADIO(pi, pi->pubpi.radioid)) + goto err; + + wlc_phy_switch_radio((struct brcms_phy_pub *) pi, OFF); wlc_set_phy_uninitted(pi); @@ -692,9 +636,9 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, pi->phynoise_polling = false; for (i = 0; i < TXP_NUM_RATES; i++) { - pi->txpwr_limit[i] = WLC_TXPWR_MAX; - pi->txpwr_env_limit[i] = WLC_TXPWR_MAX; - pi->tx_user_target[i] = WLC_TXPWR_MAX; + pi->txpwr_limit[i] = BRCMS_TXPWR_MAX; + pi->txpwr_env_limit[i] = BRCMS_TXPWR_MAX; + pi->tx_user_target[i] = BRCMS_TXPWR_MAX; } pi->radiopwr_override = RADIOPWR_OVERRIDE_DEF; @@ -727,7 +671,7 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, pi->vars = (char *)&pi->vars; - memcpy(&pi->pubpi_ro, &pi->pubpi, sizeof(wlc_phy_t)); + memcpy(&pi->pubpi_ro, &pi->pubpi, sizeof(struct brcms_phy_pub)); return &pi->pubpi_ro; @@ -736,9 +680,9 @@ wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, return NULL; } -void wlc_phy_detach(wlc_phy_t *pih) +void wlc_phy_detach(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (pih) { if (--pi->refcnt) { @@ -763,10 +707,10 @@ void wlc_phy_detach(wlc_phy_t *pih) } bool -wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, u16 *phyrev, +wlc_phy_get_phyversion(struct brcms_phy_pub *pih, u16 *phytype, u16 *phyrev, u16 *radioid, u16 *radiover) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; *phytype = (u16) pi->pubpi.phy_type; *phyrev = (u16) pi->pubpi.phy_rev; *radioid = pi->pubpi.radioid; @@ -775,21 +719,21 @@ wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, u16 *phyrev, return true; } -bool wlc_phy_get_encore(wlc_phy_t *pih) +bool wlc_phy_get_encore(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; return pi->pubpi.abgphy_encore; } -u32 wlc_phy_get_coreflags(wlc_phy_t *pih) +u32 wlc_phy_get_coreflags(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; return pi->pubpi.coreflags; } static void wlc_phy_timercb_phycal(void *arg) { - phy_info_t *pi = (phy_info_t *) arg; + struct brcms_phy *pi = (struct brcms_phy *) arg; uint delay = 5; if (PHY_PERICAL_MPHASE_PENDING(pi)) { @@ -810,9 +754,9 @@ static void wlc_phy_timercb_phycal(void *arg) } -void wlc_phy_anacore(wlc_phy_t *pih, bool on) +void wlc_phy_anacore(struct brcms_phy_pub *pih, bool on) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (ISNPHY(pi)) { if (on) { @@ -847,9 +791,9 @@ void wlc_phy_anacore(wlc_phy_t *pih, bool on) } } -u32 wlc_phy_clk_bwbits(wlc_phy_t *pih) +u32 wlc_phy_clk_bwbits(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; u32 phy_bw_clkbits = 0; @@ -872,16 +816,16 @@ u32 wlc_phy_clk_bwbits(wlc_phy_t *pih) return phy_bw_clkbits; } -void WLBANDINITFN(wlc_phy_por_inform) (wlc_phy_t *ppi) +void wlc_phy_por_inform(struct brcms_phy_pub *ppi) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; pi->phy_init_por = true; } -void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock) +void wlc_phy_edcrs_lock(struct brcms_phy_pub *pih, bool lock) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; pi->edcrs_threshold_lock = lock; @@ -891,16 +835,16 @@ void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock) write_phy_reg(pi, 0x22f, 0x3c0); } -void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal) +void wlc_phy_initcal_enable(struct brcms_phy_pub *pih, bool initcal) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; pi->do_initcal = initcal; } -void wlc_phy_hw_clk_state_upd(wlc_phy_t *pih, bool newstate) +void wlc_phy_hw_clk_state_upd(struct brcms_phy_pub *pih, bool newstate) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (!pi || !pi->sh) return; @@ -908,9 +852,9 @@ void wlc_phy_hw_clk_state_upd(wlc_phy_t *pih, bool newstate) pi->sh->clk = newstate; } -void wlc_phy_hw_state_upd(wlc_phy_t *pih, bool newstate) +void wlc_phy_hw_state_upd(struct brcms_phy_pub *pih, bool newstate) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (!pi || !pi->sh) return; @@ -918,11 +862,11 @@ void wlc_phy_hw_state_upd(wlc_phy_t *pih, bool newstate) pi->sh->up = newstate; } -void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec) +void wlc_phy_init(struct brcms_phy_pub *pih, chanspec_t chanspec) { u32 mc; initfn_t phy_init = NULL; - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (pi->init_in_progress) return; @@ -957,7 +901,7 @@ void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec) pi->nphy_gain_boost = true; - wlc_phy_switch_radio((wlc_phy_t *) pi, ON); + wlc_phy_switch_radio((struct brcms_phy_pub *) pi, ON); (*phy_init) (pi); @@ -969,14 +913,14 @@ void WLBANDINITFN(wlc_phy_init) (wlc_phy_t *pih, chanspec_t chanspec) if (!(ISNPHY(pi))) wlc_phy_txpower_update_shm(pi); - wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi, pi->sh->rx_antdiv); + wlc_phy_ant_rxdiv_set((struct brcms_phy_pub *) pi, pi->sh->rx_antdiv); pi->init_in_progress = false; } -void wlc_phy_cal_init(wlc_phy_t *pih) +void wlc_phy_cal_init(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; initfn_t cal_init = NULL; if (WARN((R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC) != 0, @@ -992,9 +936,9 @@ void wlc_phy_cal_init(wlc_phy_t *pih) } } -int wlc_phy_down(wlc_phy_t *pih) +int wlc_phy_down(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; int callbacks = 0; if (pi->phycal_timer @@ -1007,7 +951,7 @@ int wlc_phy_down(wlc_phy_t *pih) return callbacks; } -static u32 wlc_phy_get_radio_ver(phy_info_t *pi) +static u32 wlc_phy_get_radio_ver(struct brcms_phy *pi) { u32 ver; @@ -1017,7 +961,7 @@ static u32 wlc_phy_get_radio_ver(phy_info_t *pi) } void -wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset, +wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id, uint tbl_offset, u16 tblAddr, u16 tblDataHi, u16 tblDataLo) { write_phy_reg(pi, tblAddr, (tbl_id << 10) | tbl_offset); @@ -1025,19 +969,17 @@ wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset, pi->tbl_data_hi = tblDataHi; pi->tbl_data_lo = tblDataLo; - if ((pi->sh->chip == BCM43224_CHIP_ID || - pi->sh->chip == BCM43421_CHIP_ID) && - (pi->sh->chiprev == 1)) { + if (pi->sh->chip == BCM43224_CHIP_ID && + pi->sh->chiprev == 1) { pi->tbl_addr = tblAddr; pi->tbl_save_id = tbl_id; pi->tbl_save_offset = tbl_offset; } } -void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val) +void wlc_phy_table_data_write(struct brcms_phy *pi, uint width, u32 val) { - if ((pi->sh->chip == BCM43224_CHIP_ID || - pi->sh->chip == BCM43421_CHIP_ID) && + if ((pi->sh->chip == BCM43224_CHIP_ID) && (pi->sh->chiprev == 1) && (pi->tbl_save_id == NPHY_TBL_ID_ANTSWCTRLLUT)) { read_phy_reg(pi, pi->tbl_data_lo); @@ -1058,7 +1000,7 @@ void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val) } void -wlc_phy_write_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, +wlc_phy_write_table(struct brcms_phy *pi, const struct phytbl_info *ptbl_info, u16 tblAddr, u16 tblDataHi, u16 tblDataLo) { uint idx; @@ -1073,8 +1015,7 @@ wlc_phy_write_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, for (idx = 0; idx < ptbl_info->tbl_len; idx++) { - if ((pi->sh->chip == BCM43224_CHIP_ID || - pi->sh->chip == BCM43421_CHIP_ID) && + if ((pi->sh->chip == BCM43224_CHIP_ID) && (pi->sh->chiprev == 1) && (tbl_id == NPHY_TBL_ID_ANTSWCTRLLUT)) { read_phy_reg(pi, tblDataLo); @@ -1099,7 +1040,7 @@ wlc_phy_write_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, } void -wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, +wlc_phy_read_table(struct brcms_phy *pi, const struct phytbl_info *ptbl_info, u16 tblAddr, u16 tblDataHi, u16 tblDataLo) { uint idx; @@ -1114,8 +1055,7 @@ wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, for (idx = 0; idx < ptbl_info->tbl_len; idx++) { - if ((pi->sh->chip == BCM43224_CHIP_ID || - pi->sh->chip == BCM43421_CHIP_ID) && + if ((pi->sh->chip == BCM43224_CHIP_ID) && (pi->sh->chiprev == 1)) { (void)read_phy_reg(pi, tblDataLo); @@ -1138,7 +1078,8 @@ wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, } uint -wlc_phy_init_radio_regs_allbands(phy_info_t *pi, radio_20xx_regs_t *radioregs) +wlc_phy_init_radio_regs_allbands(struct brcms_phy *pi, + struct radio_20xx_regs *radioregs) { uint i = 0; @@ -1155,7 +1096,7 @@ wlc_phy_init_radio_regs_allbands(phy_info_t *pi, radio_20xx_regs_t *radioregs) } uint -wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, +wlc_phy_init_radio_regs(struct brcms_phy *pi, struct radio_regs *radioregs, u16 core_offset) { uint i = 0; @@ -1169,7 +1110,7 @@ wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, address | core_offset, (u16) radioregs[i].init_a); if (ISNPHY(pi) && (++count % 4 == 0)) - WLC_PHY_WAR_PR51571(pi); + BRCMS_PHY_WAR_PR51571(pi); } } else { if (radioregs[i].do_init_g) { @@ -1178,7 +1119,7 @@ wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, address | core_offset, (u16) radioregs[i].init_g); if (ISNPHY(pi) && (++count % 4 == 0)) - WLC_PHY_WAR_PR51571(pi); + BRCMS_PHY_WAR_PR51571(pi); } } @@ -1188,7 +1129,7 @@ wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, return i; } -void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on) +void wlc_phy_do_dummy_tx(struct brcms_phy *pi, bool ofdm, bool pa_on) { #define DUMMY_PKT_LEN 20 d11regs_t *regs = pi->regs; @@ -1243,11 +1184,6 @@ void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on) i = 0; count = ofdm ? 30 : 250; - - if (ISSIM_ENAB(pi->sh->sih)) { - count *= 100; - } - while ((i++ < count) && (R_REG(®s->txe_status) & (1 << 7))) { udelay(10); @@ -1271,9 +1207,9 @@ void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on) } } -void wlc_phy_hold_upd(wlc_phy_t *pih, mbool id, bool set) +void wlc_phy_hold_upd(struct brcms_phy_pub *pih, mbool id, bool set) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (set) { mboolset(pi->measure_hold, id); @@ -1284,9 +1220,9 @@ void wlc_phy_hold_upd(wlc_phy_t *pih, mbool id, bool set) return; } -void wlc_phy_mute_upd(wlc_phy_t *pih, bool mute, mbool flags) +void wlc_phy_mute_upd(struct brcms_phy_pub *pih, bool mute, mbool flags) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (mute) { mboolset(pi->measure_hold, PHY_HOLD_FOR_MUTE); @@ -1299,9 +1235,9 @@ void wlc_phy_mute_upd(wlc_phy_t *pih, bool mute, mbool flags) return; } -void wlc_phy_clear_tssi(wlc_phy_t *pih) +void wlc_phy_clear_tssi(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (ISNPHY(pi)) { return; @@ -1313,14 +1249,14 @@ void wlc_phy_clear_tssi(wlc_phy_t *pih) } } -static bool wlc_phy_cal_txpower_recalc_sw(phy_info_t *pi) +static bool wlc_phy_cal_txpower_recalc_sw(struct brcms_phy *pi) { return false; } -void wlc_phy_switch_radio(wlc_phy_t *pih, bool on) +void wlc_phy_switch_radio(struct brcms_phy_pub *pih, bool on) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (NORADIO_ENAB(pi->pubpi)) return; @@ -1361,37 +1297,37 @@ void wlc_phy_switch_radio(wlc_phy_t *pih, bool on) } } -u16 wlc_phy_bw_state_get(wlc_phy_t *ppi) +u16 wlc_phy_bw_state_get(struct brcms_phy_pub *ppi) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; return pi->bw; } -void wlc_phy_bw_state_set(wlc_phy_t *ppi, u16 bw) +void wlc_phy_bw_state_set(struct brcms_phy_pub *ppi, u16 bw) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; pi->bw = bw; } -void wlc_phy_chanspec_radio_set(wlc_phy_t *ppi, chanspec_t newch) +void wlc_phy_chanspec_radio_set(struct brcms_phy_pub *ppi, chanspec_t newch) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; pi->radio_chanspec = newch; } -chanspec_t wlc_phy_chanspec_get(wlc_phy_t *ppi) +chanspec_t wlc_phy_chanspec_get(struct brcms_phy_pub *ppi) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; return pi->radio_chanspec; } -void wlc_phy_chanspec_set(wlc_phy_t *ppi, chanspec_t chanspec) +void wlc_phy_chanspec_set(struct brcms_phy_pub *ppi, chanspec_t chanspec) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; u16 m_cur_channel; chansetfn_t chanspec_set = NULL; @@ -1424,7 +1360,7 @@ int wlc_phy_chanspec_freq2bandrange_lpssn(uint freq) return range; } -int wlc_phy_chanspec_bandrange_get(phy_info_t *pi, chanspec_t chanspec) +int wlc_phy_chanspec_bandrange_get(struct brcms_phy *pi, chanspec_t chanspec) { int range = -1; uint channel = CHSPEC_CHANNEL(chanspec); @@ -1439,9 +1375,10 @@ int wlc_phy_chanspec_bandrange_get(phy_info_t *pi, chanspec_t chanspec) return range; } -void wlc_phy_chanspec_ch14_widefilter_set(wlc_phy_t *ppi, bool wide_filter) +void wlc_phy_chanspec_ch14_widefilter_set(struct brcms_phy_pub *ppi, + bool wide_filter) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; pi->channel_14_wide_filter = wide_filter; @@ -1458,9 +1395,10 @@ int wlc_phy_channel2freq(uint channel) } void -wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, chanvec_t *channels) +wlc_phy_chanspec_band_validch(struct brcms_phy_pub *ppi, uint band, + chanvec_t *channels) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; uint i; uint channel; @@ -1473,15 +1411,15 @@ wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, chanvec_t *channels) && (channel <= LAST_REF5_CHANNUM)) continue; - if (((band == WLC_BAND_2G) && (channel <= CH_MAX_2G_CHANNEL)) || - ((band == WLC_BAND_5G) && (channel > CH_MAX_2G_CHANNEL))) + if ((band == BRCM_BAND_2G && channel <= CH_MAX_2G_CHANNEL) || + (band == BRCM_BAND_5G && channel > CH_MAX_2G_CHANNEL)) setbit(channels->vec, channel); } } -chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band) +chanspec_t wlc_phy_chanspec_band_firstch(struct brcms_phy_pub *ppi, uint band) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; uint i; uint channel; chanspec_t chspec; @@ -1505,7 +1443,7 @@ chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band) chspec = channel | WL_CHANSPEC_BW_40 | WL_CHANSPEC_CTL_SB_LOWER; - if (band == WLC_BAND_2G) + if (band == BRCM_BAND_2G) chspec |= WL_CHANSPEC_BAND_2G; else chspec |= WL_CHANSPEC_BAND_5G; @@ -1516,17 +1454,17 @@ chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band) && (channel <= LAST_REF5_CHANNUM)) continue; - if (((band == WLC_BAND_2G) && (channel <= CH_MAX_2G_CHANNEL)) || - ((band == WLC_BAND_5G) && (channel > CH_MAX_2G_CHANNEL))) + if ((band == BRCM_BAND_2G && channel <= CH_MAX_2G_CHANNEL) || + (band == BRCM_BAND_5G && channel > CH_MAX_2G_CHANNEL)) return chspec; } return (chanspec_t) INVCHANSPEC; } -int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override) +int wlc_phy_txpower_get(struct brcms_phy_pub *ppi, uint *qdbm, bool *override) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; *qdbm = pi->tx_user_target[0]; if (override != NULL) @@ -1534,41 +1472,42 @@ int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override) return 0; } -void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr) +void wlc_phy_txpower_target_set(struct brcms_phy_pub *ppi, + struct txpwr_limits *txpwr) { bool mac_enabled = false; - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; memcpy(&pi->tx_user_target[TXP_FIRST_CCK], - &txpwr->cck[0], WLC_NUM_RATES_CCK); + &txpwr->cck[0], BRCMS_NUM_RATES_CCK); memcpy(&pi->tx_user_target[TXP_FIRST_OFDM], - &txpwr->ofdm[0], WLC_NUM_RATES_OFDM); + &txpwr->ofdm[0], BRCMS_NUM_RATES_OFDM); memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_20_CDD], - &txpwr->ofdm_cdd[0], WLC_NUM_RATES_OFDM); + &txpwr->ofdm_cdd[0], BRCMS_NUM_RATES_OFDM); memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_40_SISO], - &txpwr->ofdm_40_siso[0], WLC_NUM_RATES_OFDM); + &txpwr->ofdm_40_siso[0], BRCMS_NUM_RATES_OFDM); memcpy(&pi->tx_user_target[TXP_FIRST_OFDM_40_CDD], - &txpwr->ofdm_40_cdd[0], WLC_NUM_RATES_OFDM); + &txpwr->ofdm_40_cdd[0], BRCMS_NUM_RATES_OFDM); memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_SISO], - &txpwr->mcs_20_siso[0], WLC_NUM_RATES_MCS_1_STREAM); + &txpwr->mcs_20_siso[0], BRCMS_NUM_RATES_MCS_1_STREAM); memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_CDD], - &txpwr->mcs_20_cdd[0], WLC_NUM_RATES_MCS_1_STREAM); + &txpwr->mcs_20_cdd[0], BRCMS_NUM_RATES_MCS_1_STREAM); memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_STBC], - &txpwr->mcs_20_stbc[0], WLC_NUM_RATES_MCS_1_STREAM); + &txpwr->mcs_20_stbc[0], BRCMS_NUM_RATES_MCS_1_STREAM); memcpy(&pi->tx_user_target[TXP_FIRST_MCS_20_SDM], - &txpwr->mcs_20_mimo[0], WLC_NUM_RATES_MCS_2_STREAM); + &txpwr->mcs_20_mimo[0], BRCMS_NUM_RATES_MCS_2_STREAM); memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_SISO], - &txpwr->mcs_40_siso[0], WLC_NUM_RATES_MCS_1_STREAM); + &txpwr->mcs_40_siso[0], BRCMS_NUM_RATES_MCS_1_STREAM); memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_CDD], - &txpwr->mcs_40_cdd[0], WLC_NUM_RATES_MCS_1_STREAM); + &txpwr->mcs_40_cdd[0], BRCMS_NUM_RATES_MCS_1_STREAM); memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_STBC], - &txpwr->mcs_40_stbc[0], WLC_NUM_RATES_MCS_1_STREAM); + &txpwr->mcs_40_stbc[0], BRCMS_NUM_RATES_MCS_1_STREAM); memcpy(&pi->tx_user_target[TXP_FIRST_MCS_40_SDM], - &txpwr->mcs_40_mimo[0], WLC_NUM_RATES_MCS_2_STREAM); + &txpwr->mcs_40_mimo[0], BRCMS_NUM_RATES_MCS_2_STREAM); if (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC) mac_enabled = true; @@ -1583,9 +1522,9 @@ void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr) wlapi_enable_mac(pi->sh->physhim); } -int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override) +int wlc_phy_txpower_set(struct brcms_phy_pub *ppi, uint qdbm, bool override) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; int i; if (qdbm > 127) @@ -1619,13 +1558,13 @@ int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override) } void -wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, u8 *min_pwr, +wlc_phy_txpower_sromlimit(struct brcms_phy_pub *ppi, uint channel, u8 *min_pwr, u8 *max_pwr, int txp_rate_idx) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; uint i; - *min_pwr = pi->min_txpower * WLC_TXPWR_DB_FACTOR; + *min_pwr = pi->min_txpower * BRCMS_TXPWR_DB_FACTOR; if (ISNPHY(pi)) { if (txp_rate_idx < 0) @@ -1639,7 +1578,7 @@ wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, u8 *min_pwr, *max_pwr = pi->tx_srom_max_rate_2g[txp_rate_idx]; } else { - *max_pwr = WLC_TXPWR_MAX; + *max_pwr = BRCMS_TXPWR_MAX; if (txp_rate_idx < 0) txp_rate_idx = TXP_FIRST_OFDM; @@ -1669,10 +1608,10 @@ wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint channel, u8 *min_pwr, } void -wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, u8 *max_txpwr, - u8 *min_txpwr) +wlc_phy_txpower_sromlimit_max_get(struct brcms_phy_pub *ppi, uint chan, + u8 *max_txpwr, u8 *min_txpwr) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; u8 tx_pwr_max = 0; u8 tx_pwr_min = 255; u8 max_num_rate; @@ -1700,27 +1639,27 @@ wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, u8 *max_txpwr, } void -wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint bandunit, s32 *max_pwr, - s32 *min_pwr, u32 *step_pwr) +wlc_phy_txpower_boardlimit_band(struct brcms_phy_pub *ppi, uint bandunit, + s32 *max_pwr, s32 *min_pwr, u32 *step_pwr) { return; } -u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi) +u8 wlc_phy_txpower_get_target_min(struct brcms_phy_pub *ppi) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; return pi->tx_power_min; } -u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi) +u8 wlc_phy_txpower_get_target_max(struct brcms_phy_pub *ppi) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; return pi->tx_power_max; } -void wlc_phy_txpower_recalc_target(phy_info_t *pi) +void wlc_phy_txpower_recalc_target(struct brcms_phy *pi) { u8 maxtxpwr, mintxpwr, rate, pactrl; uint target_chan; @@ -1731,7 +1670,7 @@ void wlc_phy_txpower_recalc_target(phy_info_t *pi) u8 max_num_rate; u8 start_rate = 0; chanspec_t chspec; - u32 band = CHSPEC2WLC_BAND(pi->radio_chanspec); + u32 band = CHSPEC2BAND(pi->radio_chanspec); initfn_t txpwr_recalc_fn = NULL; chspec = pi->radio_chanspec; @@ -1788,7 +1727,8 @@ void wlc_phy_txpower_recalc_target(phy_info_t *pi) { - wlc_phy_txpower_sromlimit((wlc_phy_t *) pi, target_chan, + wlc_phy_txpower_sromlimit((struct brcms_phy_pub *) pi, + target_chan, &mintxpwr, &maxtxpwr, rate); maxtxpwr = min(maxtxpwr, pi->txpwr_limit[rate]); @@ -1839,10 +1779,10 @@ void wlc_phy_txpower_recalc_target(phy_info_t *pi) } void -wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, +wlc_phy_txpower_reg_limit_calc(struct brcms_phy *pi, struct txpwr_limits *txpwr, chanspec_t chanspec) { - u8 tmp_txpwr_limit[2 * WLC_NUM_RATES_OFDM]; + u8 tmp_txpwr_limit[2 * BRCMS_NUM_RATES_OFDM]; u8 *txpwr_ptr1 = NULL, *txpwr_ptr2 = NULL; int rate_start_index = 0, rate1, rate2, k; @@ -1885,16 +1825,15 @@ wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, break; } - for (rate2 = 0; rate2 < WLC_NUM_RATES_OFDM; rate2++) { + for (rate2 = 0; rate2 < BRCMS_NUM_RATES_OFDM; rate2++) { tmp_txpwr_limit[rate2] = 0; - tmp_txpwr_limit[WLC_NUM_RATES_OFDM + rate2] = + tmp_txpwr_limit[BRCMS_NUM_RATES_OFDM + rate2] = txpwr_ptr1[rate2]; } wlc_phy_mcs_to_ofdm_powers_nphy(tmp_txpwr_limit, 0, - WLC_NUM_RATES_OFDM - 1, - WLC_NUM_RATES_OFDM); + BRCMS_NUM_RATES_OFDM - 1, BRCMS_NUM_RATES_OFDM); for (rate1 = rate_start_index, rate2 = 0; - rate2 < WLC_NUM_RATES_OFDM; rate1++, rate2++) + rate2 < BRCMS_NUM_RATES_OFDM; rate1++, rate2++) pi->txpwr_limit[rate1] = min(txpwr_ptr2[rate2], tmp_txpwr_limit[rate2]); @@ -1927,16 +1866,15 @@ wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, rate_start_index = WL_TX_POWER_MCS40_CDD_FIRST; break; } - for (rate2 = 0; rate2 < WLC_NUM_RATES_OFDM; rate2++) { + for (rate2 = 0; rate2 < BRCMS_NUM_RATES_OFDM; rate2++) { tmp_txpwr_limit[rate2] = 0; - tmp_txpwr_limit[WLC_NUM_RATES_OFDM + rate2] = + tmp_txpwr_limit[BRCMS_NUM_RATES_OFDM + rate2] = txpwr_ptr1[rate2]; } wlc_phy_ofdm_to_mcs_powers_nphy(tmp_txpwr_limit, 0, - WLC_NUM_RATES_OFDM - 1, - WLC_NUM_RATES_OFDM); + BRCMS_NUM_RATES_OFDM - 1, BRCMS_NUM_RATES_OFDM); for (rate1 = rate_start_index, rate2 = 0; - rate2 < WLC_NUM_RATES_MCS_1_STREAM; + rate2 < BRCMS_NUM_RATES_MCS_1_STREAM; rate1++, rate2++) pi->txpwr_limit[rate1] = min(txpwr_ptr2[rate2], @@ -1957,7 +1895,7 @@ wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, break; } for (rate1 = rate_start_index, rate2 = 0; - rate2 < WLC_NUM_RATES_MCS_1_STREAM; + rate2 < BRCMS_NUM_RATES_MCS_1_STREAM; rate1++, rate2++) pi->txpwr_limit[rate1] = txpwr_ptr1[rate2]; } @@ -1976,7 +1914,7 @@ wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, break; } for (rate1 = rate_start_index, rate2 = 0; - rate2 < WLC_NUM_RATES_MCS_2_STREAM; + rate2 < BRCMS_NUM_RATES_MCS_2_STREAM; rate1++, rate2++) pi->txpwr_limit[rate1] = txpwr_ptr1[rate2]; } @@ -1991,23 +1929,23 @@ wlc_phy_txpower_reg_limit_calc(phy_info_t *pi, struct txpwr_limits *txpwr, } } -void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent) +void wlc_phy_txpwr_percent_set(struct brcms_phy_pub *ppi, u8 txpwr_percent) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; pi->txpwr_percent = txpwr_percent; } -void wlc_phy_machwcap_set(wlc_phy_t *ppi, u32 machwcap) +void wlc_phy_machwcap_set(struct brcms_phy_pub *ppi, u32 machwcap) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; pi->sh->machwcap = machwcap; } -void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end) +void wlc_phy_runbist_config(struct brcms_phy_pub *ppi, bool start_end) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; u16 rxc; rxc = 0; @@ -2036,17 +1974,17 @@ void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end) } void -wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr, +wlc_phy_txpower_limit_set(struct brcms_phy_pub *ppi, struct txpwr_limits *txpwr, chanspec_t chanspec) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; wlc_phy_txpower_reg_limit_calc(pi, txpwr, chanspec); if (ISLCNPHY(pi)) { int i, j; for (i = TXP_FIRST_OFDM_20_CDD, j = 0; - j < WLC_NUM_RATES_MCS_1_STREAM; i++, j++) { + j < BRCMS_NUM_RATES_MCS_1_STREAM; i++, j++) { if (txpwr->mcs_20_siso[j]) pi->txpwr_limit[i] = txpwr->mcs_20_siso[j]; else @@ -2061,21 +1999,21 @@ wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *txpwr, wlapi_enable_mac(pi->sh->physhim); } -void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war) +void wlc_phy_ofdm_rateset_war(struct brcms_phy_pub *pih, bool war) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; pi->ofdm_rateset_war = war; } -void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt) +void wlc_phy_bf_preempt_enable(struct brcms_phy_pub *pih, bool bf_preempt) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; pi->bf_preempt_4306 = bf_preempt; } -void wlc_phy_txpower_update_shm(phy_info_t *pi) +void wlc_phy_txpower_update_shm(struct brcms_phy *pi) { int j; if (ISNPHY(pi)) { @@ -2112,7 +2050,7 @@ void wlc_phy_txpower_update_shm(phy_info_t *pi) } wlapi_bmac_mhf(pi->sh->physhim, MHF2, MHF2_HWPWRCTL, - MHF2_HWPWRCTL, WLC_BAND_ALL); + MHF2_HWPWRCTL, BRCM_BAND_ALL); } else { int i; @@ -2126,9 +2064,9 @@ void wlc_phy_txpower_update_shm(phy_info_t *pi) } } -bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi) +bool wlc_phy_txpower_hw_ctrl_get(struct brcms_phy_pub *ppi) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; if (ISNPHY(pi)) { return pi->nphy_txpwrctrl; @@ -2137,9 +2075,9 @@ bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi) } } -void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl) +void wlc_phy_txpower_hw_ctrl_set(struct brcms_phy_pub *ppi, bool hwpwrctrl) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; bool cur_hwpwrctrl = pi->hwpwrctrl; bool suspend; @@ -2175,7 +2113,7 @@ void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl) } } -void wlc_phy_txpower_ipa_upd(phy_info_t *pi) +void wlc_phy_txpower_ipa_upd(struct brcms_phy *pi) { if (NREV_GE(pi->pubpi.phy_rev, 3)) { @@ -2187,9 +2125,9 @@ void wlc_phy_txpower_ipa_upd(phy_info_t *pi) } } -static u32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi); +static u32 wlc_phy_txpower_est_power_nphy(struct brcms_phy *pi); -static u32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi) +static u32 wlc_phy_txpower_est_power_nphy(struct brcms_phy *pi) { s16 tx0_status, tx1_status; u16 estPower1, estPower2; @@ -2239,14 +2177,15 @@ static u32 wlc_phy_txpower_est_power_nphy(phy_info_t *pi) } void -wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) +wlc_phy_txpower_get_current(struct brcms_phy_pub *ppi, struct tx_power *power, + uint channel) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; uint rate, num_rates; u8 min_pwr, max_pwr; #if WL_TX_POWER_RATES != TXP_NUM_RATES -#error "tx_power_t struct out of sync with this fn" +#error "struct tx_power out of sync with this fn" #endif if (ISNPHY(pi)) { @@ -2280,9 +2219,9 @@ wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) u32 est_pout; wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_phyreg_enter((wlc_phy_t *) pi); + wlc_phyreg_enter((struct brcms_phy_pub *) pi); est_pout = wlc_phy_txpower_est_power_nphy(pi); - wlc_phyreg_exit((wlc_phy_t *) pi); + wlc_phyreg_exit((struct brcms_phy_pub *) pi); wlapi_enable_mac(pi->sh->physhim); power->est_Pout[0] = (est_pout >> 8) & 0xff; @@ -2308,8 +2247,7 @@ wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) power->tx_power_max_rate_ind[0] = pi->tx_power_max_rate_ind; power->tx_power_max_rate_ind[1] = pi->tx_power_max_rate_ind; - } else if (!pi->hwpwrctrl) { - } else if (pi->sh->up) { + } else if (pi->hwpwrctrl && pi->sh->up) { wlc_phyreg_enter(ppi); if (ISLCNPHY(pi)) { @@ -2336,44 +2274,23 @@ wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, uint channel) } } -void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type) +void wlc_phy_antsel_type_set(struct brcms_phy_pub *ppi, u8 antsel_type) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; pi->antsel_type = antsel_type; } -bool wlc_phy_test_ison(wlc_phy_t *ppi) +bool wlc_phy_test_ison(struct brcms_phy_pub *ppi) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; return pi->phytest_on; } -bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval) +void wlc_phy_ant_rxdiv_set(struct brcms_phy_pub *ppi, u8 val) { - phy_info_t *pi = (phy_info_t *) ppi; - bool ret = true; - - wlc_phyreg_enter(ppi); - - if (ISNPHY(pi)) { - - ret = false; - } else if (ISLCNPHY(pi)) { - u16 crsctrl = read_phy_reg(pi, 0x410); - u16 div = crsctrl & (0x1 << 1); - *pval = (div | ((crsctrl & (0x1 << 0)) ^ (div >> 1))); - } - - wlc_phyreg_exit(ppi); - - return ret; -} - -void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val) -{ - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; bool suspend; pi->sh->rx_antdiv = val; @@ -2381,10 +2298,10 @@ void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val) if (!(ISNPHY(pi) && D11REV_IS(pi->sh->corerev, 16))) { if (val > ANT_RX_DIV_FORCE_1) wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_ANTDIV, - MHF1_ANTDIV, WLC_BAND_ALL); + MHF1_ANTDIV, BRCM_BAND_ALL); else wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_ANTDIV, 0, - WLC_BAND_ALL); + BRCM_BAND_ALL); } if (ISNPHY(pi)) { @@ -2419,7 +2336,7 @@ void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val) } static bool -wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, s8 *pwr_ant) +wlc_phy_noise_calc_phy(struct brcms_phy *pi, u32 *cmplx_pwr, s8 *pwr_ant) { s8 cmplx_pwr_dbm[PHY_CORE_MAX]; u8 i; @@ -2445,9 +2362,9 @@ wlc_phy_noise_calc_phy(phy_info_t *pi, u32 *cmplx_pwr, s8 *pwr_ant) } static void -wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, u8 ch) +wlc_phy_noise_sample_request(struct brcms_phy_pub *pih, u8 reason, u8 ch) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; bool sampling_in_progress = (pi->phynoise_state != 0); bool wait_for_intr = true; @@ -2528,7 +2445,7 @@ wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, u8 ch) OR_REG(&pi->regs->maccommand, MCMD_BG_NOISE); } else { - phy_iq_est_t est[PHY_CORE_MAX]; + struct phy_iq_est est[PHY_CORE_MAX]; u32 cmplx_pwr[PHY_CORE_MAX]; s8 noise_dbm_ant[PHY_CORE_MAX]; u16 log_num_samps, num_samps, classif_state = 0; @@ -2579,7 +2496,7 @@ wlc_phy_noise_sample_request(wlc_phy_t *pih, u8 reason, u8 ch) } -void wlc_phy_noise_sample_request_external(wlc_phy_t *pih) +void wlc_phy_noise_sample_request_external(struct brcms_phy_pub *pih) { u8 channel; @@ -2588,7 +2505,7 @@ void wlc_phy_noise_sample_request_external(wlc_phy_t *pih) wlc_phy_noise_sample_request(pih, PHY_NOISE_SAMPLE_EXTERNAL, channel); } -static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, s8 noise_dbm) +static void wlc_phy_noise_cb(struct brcms_phy *pi, u8 channel, s8 noise_dbm) { if (!pi->phynoise_state) return; @@ -2609,7 +2526,7 @@ static void wlc_phy_noise_cb(phy_info_t *pi, u8 channel, s8 noise_dbm) } -static s8 wlc_phy_noise_read_shmem(phy_info_t *pi) +static s8 wlc_phy_noise_read_shmem(struct brcms_phy *pi) { u32 cmplx_pwr[PHY_CORE_MAX]; s8 noise_dbm_ant[PHY_CORE_MAX]; @@ -2650,9 +2567,9 @@ static s8 wlc_phy_noise_read_shmem(phy_info_t *pi) } -void wlc_phy_noise_sample_intr(wlc_phy_t *pih) +void wlc_phy_noise_sample_intr(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; u16 jssi_aux; u8 channel = 0; s8 noise_dbm = PHY_NOISE_FIXED_VAL_NPHY; @@ -2761,28 +2678,28 @@ void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_cmplx_pwr_dB, u8 core) } } -void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx) +void wlc_phy_rssi_compute(struct brcms_phy_pub *pih, void *ctx) { - wlc_d11rxhdr_t *wlc_rxhdr = (wlc_d11rxhdr_t *) ctx; - d11rxhdr_t *rxh = &wlc_rxhdr->rxhdr; + struct brcms_d11rxhdr *wlc_rxhdr = (struct brcms_d11rxhdr *) ctx; + struct d11rxhdr *rxh = &wlc_rxhdr->rxhdr; int rssi = le16_to_cpu(rxh->PhyRxStatus_1) & PRXS1_JSSI_MASK; uint radioid = pih->radioid; - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (NORADIO_ENAB(pi->pubpi)) { - rssi = WLC_RSSI_INVALID; + rssi = BRCMS_RSSI_INVALID; goto end; } if ((pi->sh->corerev >= 11) && !(le16_to_cpu(rxh->RxStatus2) & RXS_PHYRXST_VALID)) { - rssi = WLC_RSSI_INVALID; + rssi = BRCMS_RSSI_INVALID; goto end; } if (ISLCNPHY(pi)) { u8 gidx = (le16_to_cpu(rxh->PhyRxStatus_2) & 0xFC00) >> 10; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (rssi > 127) rssi -= 256; @@ -2810,20 +2727,20 @@ void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx) wlc_rxhdr->rssi = (s8) rssi; } -void wlc_phy_freqtrack_start(wlc_phy_t *pih) +void wlc_phy_freqtrack_start(struct brcms_phy_pub *pih) { return; } -void wlc_phy_freqtrack_end(wlc_phy_t *pih) +void wlc_phy_freqtrack_end(struct brcms_phy_pub *pih) { return; } -void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag) +void wlc_phy_set_deaf(struct brcms_phy_pub *ppi, bool user_flag) { - phy_info_t *pi; - pi = (phy_info_t *) ppi; + struct brcms_phy *pi; + pi = (struct brcms_phy *) ppi; if (ISLCNPHY(pi)) wlc_lcnphy_deaf_mode(pi, true); @@ -2831,9 +2748,9 @@ void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag) wlc_nphy_deaf_mode(pi, true); } -void wlc_phy_watchdog(wlc_phy_t *pih) +void wlc_phy_watchdog(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; bool delay_phy_cal = false; pi->sh->now++; @@ -2841,7 +2758,7 @@ void wlc_phy_watchdog(wlc_phy_t *pih) return; if (!(SCAN_RM_IN_PROGRESS(pi) || PLT_INPROG_PHY(pi))) { - wlc_phy_noise_sample_request((wlc_phy_t *) pi, + wlc_phy_noise_sample_request((struct brcms_phy_pub *) pi, PHY_NOISE_SAMPLE_MON, CHSPEC_CHANNEL(pi-> radio_chanspec)); @@ -2872,7 +2789,7 @@ void wlc_phy_watchdog(wlc_phy_t *pih) (pi->nphy_perical != PHY_PERICAL_MANUAL) && ((pi->sh->now - pi->nphy_perical_last) >= pi->sh->glacial_timer)) - wlc_phy_cal_perical((wlc_phy_t *) pi, + wlc_phy_cal_perical((struct brcms_phy_pub *) pi, PHY_PERICAL_WATCHDOG); wlc_phy_txpwr_papd_cal_nphy(pi); @@ -2896,9 +2813,9 @@ void wlc_phy_watchdog(wlc_phy_t *pih) } } -void wlc_phy_BSSinit(wlc_phy_t *pih, bool bonlyap, int rssi) +void wlc_phy_BSSinit(struct brcms_phy_pub *pih, bool bonlyap, int rssi) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; uint i; uint k; @@ -2994,7 +2911,7 @@ void wlc_phy_cordic(fixed theta, cs32 *val) val[0].q = val[0].q * signx; } -void wlc_phy_cal_perical_mphase_reset(phy_info_t *pi) +void wlc_phy_cal_perical_mphase_reset(struct brcms_phy *pi) { wlapi_del_timer(pi->sh->physhim, pi->phycal_timer); @@ -3003,7 +2920,8 @@ void wlc_phy_cal_perical_mphase_reset(phy_info_t *pi) pi->mphase_txcal_cmdidx = 0; } -static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay) +static void +wlc_phy_cal_perical_mphase_schedule(struct brcms_phy *pi, uint delay) { if ((pi->nphy_perical != PHY_PERICAL_MPHASE) && @@ -3016,12 +2934,12 @@ static void wlc_phy_cal_perical_mphase_schedule(phy_info_t *pi, uint delay) wlapi_add_timer(pi->sh->physhim, pi->phycal_timer, delay, 0); } -void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason) +void wlc_phy_cal_perical(struct brcms_phy_pub *pih, u8 reason) { s16 nphy_currtemp = 0; s16 delta_temp = 0; bool do_periodic_cal = true; - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; if (!ISNPHY(pi)) return; @@ -3096,7 +3014,7 @@ void wlc_phy_cal_perical(wlc_phy_t *pih, u8 reason) } } -void wlc_phy_cal_perical_mphase_restart(phy_info_t *pi) +void wlc_phy_cal_perical_mphase_restart(struct brcms_phy *pi) { pi->mphase_cal_phase_id = MPHASE_CAL_STATE_INIT; pi->mphase_txcal_cmdidx = 0; @@ -3114,9 +3032,9 @@ u8 wlc_phy_nbits(s32 value) return nbits; } -void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, u8 rxchain) +void wlc_phy_stf_chain_init(struct brcms_phy_pub *pih, u8 txchain, u8 rxchain) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; pi->sh->hw_phytxchain = txchain; pi->sh->hw_phyrxchain = rxchain; @@ -3125,9 +3043,9 @@ void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, u8 rxchain) pi->pubpi.phy_corenum = (u8) PHY_BITSCNT(pi->sh->phyrxchain); } -void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, u8 rxchain) +void wlc_phy_stf_chain_set(struct brcms_phy_pub *pih, u8 txchain, u8 rxchain) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; pi->sh->phytxchain = txchain; @@ -3137,19 +3055,19 @@ void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, u8 rxchain) pi->pubpi.phy_corenum = (u8) PHY_BITSCNT(pi->sh->phyrxchain); } -void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, u8 *rxchain) +void wlc_phy_stf_chain_get(struct brcms_phy_pub *pih, u8 *txchain, u8 *rxchain) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; *txchain = pi->sh->phytxchain; *rxchain = pi->sh->phyrxchain; } -u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih) +u8 wlc_phy_stf_chain_active_get(struct brcms_phy_pub *pih) { s16 nphy_currtemp; u8 active_bitmap; - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; active_bitmap = (pi->phy_txcore_heatedup) ? 0x31 : 0x33; @@ -3177,9 +3095,9 @@ u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih) return active_bitmap; } -s8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec) +s8 wlc_phy_stf_ssmode_get(struct brcms_phy_pub *pih, chanspec_t chanspec) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; u8 siso_mcs_id, cdd_mcs_id; siso_mcs_id = @@ -3201,7 +3119,7 @@ const u8 *wlc_phy_get_ofdm_rate_lookup(void) return ofdm_rate_lookup; } -void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode) +void wlc_lcnphy_epa_switch(struct brcms_phy *pi, bool mode) { if ((pi->sh->chip == BCM4313_CHIP_ID) && (pi->sh->boardflags & BFL_FEM)) { @@ -3239,7 +3157,7 @@ void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode) } static s8 -wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, u32 band, +wlc_user_txpwr_antport_to_rfport(struct brcms_phy *pi, uint chan, u32 band, u8 rate) { s8 offset = 0; @@ -3249,7 +3167,7 @@ wlc_user_txpwr_antport_to_rfport(phy_info_t *pi, uint chan, u32 band, return offset; } -static s8 wlc_phy_env_measure_vbat(phy_info_t *pi) +static s8 wlc_phy_env_measure_vbat(struct brcms_phy *pi) { if (ISLCNPHY(pi)) return wlc_lcnphy_vbatsense(pi, 0); @@ -3257,7 +3175,7 @@ static s8 wlc_phy_env_measure_vbat(phy_info_t *pi) return 0; } -static s8 wlc_phy_env_measure_temperature(phy_info_t *pi) +static s8 wlc_phy_env_measure_temperature(struct brcms_phy *pi) { if (ISLCNPHY(pi)) return wlc_lcnphy_tempsense_degree(pi, 0); @@ -3265,40 +3183,40 @@ static s8 wlc_phy_env_measure_temperature(phy_info_t *pi) return 0; } -static void wlc_phy_upd_env_txpwr_rate_limits(phy_info_t *pi, u32 band) +static void wlc_phy_upd_env_txpwr_rate_limits(struct brcms_phy *pi, u32 band) { u8 i; s8 temp, vbat; for (i = 0; i < TXP_NUM_RATES; i++) - pi->txpwr_env_limit[i] = WLC_TXPWR_MAX; + pi->txpwr_env_limit[i] = BRCMS_TXPWR_MAX; vbat = wlc_phy_env_measure_vbat(pi); temp = wlc_phy_env_measure_temperature(pi); } -void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool ldpc) +void wlc_phy_ldpc_override_set(struct brcms_phy_pub *ppi, bool ldpc) { return; } void -wlc_phy_get_pwrdet_offsets(phy_info_t *pi, s8 *cckoffset, s8 *ofdmoffset) +wlc_phy_get_pwrdet_offsets(struct brcms_phy *pi, s8 *cckoffset, s8 *ofdmoffset) { *cckoffset = 0; *ofdmoffset = 0; } -s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi, chanspec_t chanspec) +s8 wlc_phy_upd_rssi_offset(struct brcms_phy *pi, s8 rssi, chanspec_t chanspec) { return rssi; } -bool wlc_phy_txpower_ipa_ison(wlc_phy_t *ppi) +bool wlc_phy_txpower_ipa_ison(struct brcms_phy_pub *ppi) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; if (ISNPHY(pi)) return wlc_phy_n_txpower_ipa_ison(pi); diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h new file mode 100644 index 00000000000..e27d9e95a2d --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_hal.h @@ -0,0 +1,294 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * phy_hal.h: functionality exported from the phy to higher layers + */ + +#ifndef _BRCM_PHY_HAL_H_ +#define _BRCM_PHY_HAL_H_ + +#include <brcmu_utils.h> +#include <brcmu_wifi.h> +#include <phy_shim.h> + +#define IDCODE_VER_MASK 0x0000000f +#define IDCODE_VER_SHIFT 0 +#define IDCODE_MFG_MASK 0x00000fff +#define IDCODE_MFG_SHIFT 0 +#define IDCODE_ID_MASK 0x0ffff000 +#define IDCODE_ID_SHIFT 12 +#define IDCODE_REV_MASK 0xf0000000 +#define IDCODE_REV_SHIFT 28 + +#define NORADIO_ID 0xe4f5 +#define NORADIO_IDCODE 0x4e4f5246 + +#define BCM2055_ID 0x2055 +#define BCM2055_IDCODE 0x02055000 +#define BCM2055A0_IDCODE 0x1205517f + +#define BCM2056_ID 0x2056 +#define BCM2056_IDCODE 0x02056000 +#define BCM2056A0_IDCODE 0x1205617f + +#define BCM2057_ID 0x2057 +#define BCM2057_IDCODE 0x02057000 +#define BCM2057A0_IDCODE 0x1205717f + +#define BCM2064_ID 0x2064 +#define BCM2064_IDCODE 0x02064000 +#define BCM2064A0_IDCODE 0x0206417f + +#define PHY_TPC_HW_OFF false +#define PHY_TPC_HW_ON true + +#define PHY_PERICAL_DRIVERUP 1 +#define PHY_PERICAL_WATCHDOG 2 +#define PHY_PERICAL_PHYINIT 3 +#define PHY_PERICAL_JOIN_BSS 4 +#define PHY_PERICAL_START_IBSS 5 +#define PHY_PERICAL_UP_BSS 6 +#define PHY_PERICAL_CHAN 7 +#define PHY_FULLCAL 8 + +#define PHY_PERICAL_DISABLE 0 +#define PHY_PERICAL_SPHASE 1 +#define PHY_PERICAL_MPHASE 2 +#define PHY_PERICAL_MANUAL 3 + +#define PHY_HOLD_FOR_ASSOC 1 +#define PHY_HOLD_FOR_SCAN 2 +#define PHY_HOLD_FOR_RM 4 +#define PHY_HOLD_FOR_PLT 8 +#define PHY_HOLD_FOR_MUTE 16 +#define PHY_HOLD_FOR_NOT_ASSOC 0x20 + +#define PHY_MUTE_FOR_PREISM 1 +#define PHY_MUTE_ALL 0xffffffff + +#define PHY_NOISE_FIXED_VAL (-95) +#define PHY_NOISE_FIXED_VAL_NPHY (-92) +#define PHY_NOISE_FIXED_VAL_LCNPHY (-92) + +#define PHY_MODE_CAL 0x0002 +#define PHY_MODE_NOISEM 0x0004 + +#define BRCMS_TXPWR_DB_FACTOR 4 + +/* a large TX Power as an init value to factor out of min() calculations, + * keep low enough to fit in an s8, units are .25 dBm + */ +#define BRCMS_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ + +#define BRCMS_NUM_RATES_CCK 4 +#define BRCMS_NUM_RATES_OFDM 8 +#define BRCMS_NUM_RATES_MCS_1_STREAM 8 +#define BRCMS_NUM_RATES_MCS_2_STREAM 8 +#define BRCMS_NUM_RATES_MCS_3_STREAM 8 +#define BRCMS_NUM_RATES_MCS_4_STREAM 8 + +#define BRCMS_RSSI_INVALID 0 /* invalid RSSI value */ + +struct txpwr_limits { + u8 cck[BRCMS_NUM_RATES_CCK]; + u8 ofdm[BRCMS_NUM_RATES_OFDM]; + + u8 ofdm_cdd[BRCMS_NUM_RATES_OFDM]; + + u8 ofdm_40_siso[BRCMS_NUM_RATES_OFDM]; + u8 ofdm_40_cdd[BRCMS_NUM_RATES_OFDM]; + + u8 mcs_20_siso[BRCMS_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_cdd[BRCMS_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_stbc[BRCMS_NUM_RATES_MCS_1_STREAM]; + u8 mcs_20_mimo[BRCMS_NUM_RATES_MCS_2_STREAM]; + + u8 mcs_40_siso[BRCMS_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_cdd[BRCMS_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_stbc[BRCMS_NUM_RATES_MCS_1_STREAM]; + u8 mcs_40_mimo[BRCMS_NUM_RATES_MCS_2_STREAM]; + u8 mcs32; +}; + +struct tx_power { + u32 flags; + chanspec_t chanspec; /* txpwr report for this channel */ + chanspec_t local_chanspec; /* channel on which we are associated */ + u8 local_max; /* local max according to the AP */ + u8 local_constraint; /* local constraint according to the AP */ + s8 antgain[2]; /* Ant gain for each band - from SROM */ + u8 rf_cores; /* count of RF Cores being reported */ + u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ + u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain + * without adjustment + */ + u8 est_Pout_cck; /* Latest CCK tx power out estimate */ + u8 tx_power_max[4]; /* Maximum target power among all rates */ + u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ + u8 user_limit[WL_TX_POWER_RATES]; /* User limit */ + u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */ + u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */ + u8 target[WL_TX_POWER_RATES]; /* Latest target power */ +}; + +struct tx_inst_power { + u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ + u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ +}; + +struct chanvec { + u8 vec[MAXCHANNEL / NBBY]; +}; + +struct shared_phy_params { + struct si_pub *sih; + void *physhim; + uint unit; + uint corerev; + uint bustype; + uint buscorerev; + char *vars; + u16 vid; + u16 did; + uint chip; + uint chiprev; + uint chippkg; + uint sromrev; + uint boardtype; + uint boardrev; + uint boardvendor; + u32 boardflags; + u32 boardflags2; +}; + + +extern struct shared_phy *wlc_phy_shared_attach(struct shared_phy_params *shp); +extern struct brcms_phy_pub *wlc_phy_attach(struct shared_phy *sh, void *regs, + int bandtype, char *vars, struct wiphy *wiphy); +extern void wlc_phy_detach(struct brcms_phy_pub *ppi); + +extern bool wlc_phy_get_phyversion(struct brcms_phy_pub *pih, u16 *phytype, + u16 *phyrev, u16 *radioid, + u16 *radiover); +extern bool wlc_phy_get_encore(struct brcms_phy_pub *pih); +extern u32 wlc_phy_get_coreflags(struct brcms_phy_pub *pih); + +extern void wlc_phy_hw_clk_state_upd(struct brcms_phy_pub *ppi, bool newstate); +extern void wlc_phy_hw_state_upd(struct brcms_phy_pub *ppi, bool newstate); +extern void wlc_phy_init(struct brcms_phy_pub *ppi, chanspec_t chanspec); +extern void wlc_phy_watchdog(struct brcms_phy_pub *ppi); +extern int wlc_phy_down(struct brcms_phy_pub *ppi); +extern u32 wlc_phy_clk_bwbits(struct brcms_phy_pub *pih); +extern void wlc_phy_cal_init(struct brcms_phy_pub *ppi); +extern void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init); + +extern void wlc_phy_chanspec_set(struct brcms_phy_pub *ppi, + chanspec_t chanspec); +extern chanspec_t wlc_phy_chanspec_get(struct brcms_phy_pub *ppi); +extern void wlc_phy_chanspec_radio_set(struct brcms_phy_pub *ppi, + chanspec_t newch); +extern u16 wlc_phy_bw_state_get(struct brcms_phy_pub *ppi); +extern void wlc_phy_bw_state_set(struct brcms_phy_pub *ppi, u16 bw); + +extern void wlc_phy_rssi_compute(struct brcms_phy_pub *pih, void *ctx); +extern void wlc_phy_por_inform(struct brcms_phy_pub *ppi); +extern void wlc_phy_noise_sample_intr(struct brcms_phy_pub *ppi); +extern bool wlc_phy_bist_check_phy(struct brcms_phy_pub *ppi); + +extern void wlc_phy_set_deaf(struct brcms_phy_pub *ppi, bool user_flag); + +extern void wlc_phy_switch_radio(struct brcms_phy_pub *ppi, bool on); +extern void wlc_phy_anacore(struct brcms_phy_pub *ppi, bool on); + + +extern void wlc_phy_BSSinit(struct brcms_phy_pub *ppi, bool bonlyap, int rssi); + +extern void wlc_phy_chanspec_ch14_widefilter_set(struct brcms_phy_pub *ppi, + bool wide_filter); +extern void wlc_phy_chanspec_band_validch(struct brcms_phy_pub *ppi, uint band, + chanvec_t *channels); +extern chanspec_t wlc_phy_chanspec_band_firstch(struct brcms_phy_pub *ppi, + uint band); + +extern void wlc_phy_txpower_sromlimit(struct brcms_phy_pub *ppi, uint chan, + u8 *_min_, u8 *_max_, int rate); +extern void wlc_phy_txpower_sromlimit_max_get(struct brcms_phy_pub *ppi, + uint chan, u8 *_max_, u8 *_min_); +extern void wlc_phy_txpower_boardlimit_band(struct brcms_phy_pub *ppi, + uint band, s32 *, s32 *, u32 *); +extern void wlc_phy_txpower_limit_set(struct brcms_phy_pub *ppi, + struct txpwr_limits *, + chanspec_t chanspec); +extern int wlc_phy_txpower_get(struct brcms_phy_pub *ppi, uint *qdbm, + bool *override); +extern int wlc_phy_txpower_set(struct brcms_phy_pub *ppi, uint qdbm, + bool override); +extern void wlc_phy_txpower_target_set(struct brcms_phy_pub *ppi, + struct txpwr_limits *); +extern bool wlc_phy_txpower_hw_ctrl_get(struct brcms_phy_pub *ppi); +extern void wlc_phy_txpower_hw_ctrl_set(struct brcms_phy_pub *ppi, + bool hwpwrctrl); +extern u8 wlc_phy_txpower_get_target_min(struct brcms_phy_pub *ppi); +extern u8 wlc_phy_txpower_get_target_max(struct brcms_phy_pub *ppi); +extern bool wlc_phy_txpower_ipa_ison(struct brcms_phy_pub *pih); + +extern void wlc_phy_stf_chain_init(struct brcms_phy_pub *pih, u8 txchain, + u8 rxchain); +extern void wlc_phy_stf_chain_set(struct brcms_phy_pub *pih, u8 txchain, + u8 rxchain); +extern void wlc_phy_stf_chain_get(struct brcms_phy_pub *pih, u8 *txchain, + u8 *rxchain); +extern u8 wlc_phy_stf_chain_active_get(struct brcms_phy_pub *pih); +extern s8 wlc_phy_stf_ssmode_get(struct brcms_phy_pub *pih, + chanspec_t chanspec); +extern void wlc_phy_ldpc_override_set(struct brcms_phy_pub *ppi, bool val); + +extern void wlc_phy_cal_perical(struct brcms_phy_pub *ppi, u8 reason); +extern void wlc_phy_noise_sample_request_external(struct brcms_phy_pub *ppi); +extern void wlc_phy_edcrs_lock(struct brcms_phy_pub *pih, bool lock); +extern void wlc_phy_cal_papd_recal(struct brcms_phy_pub *ppi); + +extern void wlc_phy_ant_rxdiv_set(struct brcms_phy_pub *ppi, u8 val); +extern void wlc_phy_clear_tssi(struct brcms_phy_pub *ppi); +extern void wlc_phy_hold_upd(struct brcms_phy_pub *ppi, mbool id, bool val); +extern void wlc_phy_mute_upd(struct brcms_phy_pub *ppi, bool val, mbool flags); + +extern void wlc_phy_antsel_type_set(struct brcms_phy_pub *ppi, u8 antsel_type); + +extern void wlc_phy_txpower_get_current(struct brcms_phy_pub *ppi, + struct tx_power *power, uint channel); + +extern void wlc_phy_initcal_enable(struct brcms_phy_pub *pih, bool initcal); +extern bool wlc_phy_test_ison(struct brcms_phy_pub *ppi); +extern void wlc_phy_txpwr_percent_set(struct brcms_phy_pub *ppi, + u8 txpwr_percent); +extern void wlc_phy_ofdm_rateset_war(struct brcms_phy_pub *pih, bool war); +extern void wlc_phy_bf_preempt_enable(struct brcms_phy_pub *pih, + bool bf_preempt); +extern void wlc_phy_machwcap_set(struct brcms_phy_pub *ppi, u32 machwcap); + +extern void wlc_phy_runbist_config(struct brcms_phy_pub *ppi, bool start_end); + +extern void wlc_phy_freqtrack_start(struct brcms_phy_pub *ppi); +extern void wlc_phy_freqtrack_end(struct brcms_phy_pub *ppi); + +extern const u8 *wlc_phy_get_ofdm_rate_lookup(void); + +extern s8 wlc_phy_get_tx_power_offset_by_mcs(struct brcms_phy_pub *ppi, + u8 mcs_offset); +extern s8 wlc_phy_get_tx_power_offset(struct brcms_phy_pub *ppi, u8 tbl_offset); +#endif /* _BRCM_PHY_HAL_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_int.h index 10cbf520474..a01b01ccd9f 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_int.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_int.h @@ -14,15 +14,14 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_phy_int_h_ -#define _wlc_phy_int_h_ +#ifndef _BRCM_PHY_INT_H_ +#define _BRCM_PHY_INT_H_ -#include <linux/kernel.h> -#include <bcmdefs.h> -#include <bcmutils.h> +#include <types.h> +#include <brcmu_utils.h> +#include <brcmu_wifi.h> -#include <bcmsrom_fmt.h> -#include <wlc_phy_hal.h> +#define PHY_VERSION { 1, 82, 8, 0 } #define PHYHAL_ERROR 0x0001 #define PHYHAL_TRACE 0x0002 @@ -42,23 +41,29 @@ extern u32 phyhal_msg_level; #define LCNXN_BASEREV 16 -struct wlc_hw_info; -typedef struct phy_info phy_info_t; -typedef void (*initfn_t) (phy_info_t *); -typedef void (*chansetfn_t) (phy_info_t *, chanspec_t); -typedef int (*longtrnfn_t) (phy_info_t *, int); -typedef void (*txiqccgetfn_t) (phy_info_t *, u16 *, u16 *); -typedef void (*txiqccsetfn_t) (phy_info_t *, u16, u16); -typedef u16(*txloccgetfn_t) (phy_info_t *); -typedef void (*radioloftgetfn_t) (phy_info_t *, u8 *, u8 *, u8 *, +struct brcms_phy_srom_fem { + u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */ + u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */ + u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */ + u8 triso; /* TR switch isolation */ + u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */ +}; + +typedef void (*initfn_t) (struct brcms_phy *); +typedef void (*chansetfn_t) (struct brcms_phy *, chanspec_t); +typedef int (*longtrnfn_t) (struct brcms_phy *, int); +typedef void (*txiqccgetfn_t) (struct brcms_phy *, u16 *, u16 *); +typedef void (*txiqccsetfn_t) (struct brcms_phy *, u16, u16); +typedef u16(*txloccgetfn_t) (struct brcms_phy *); +typedef void (*radioloftgetfn_t) (struct brcms_phy *, u8 *, u8 *, u8 *, u8 *); -typedef s32(*rxsigpwrfn_t) (phy_info_t *, s32); -typedef void (*detachfn_t) (phy_info_t *); +typedef s32(*rxsigpwrfn_t) (struct brcms_phy *, s32); +typedef void (*detachfn_t) (struct brcms_phy *); #undef ISNPHY #undef ISLCNPHY #define ISNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_N) -#define ISLCNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_LCN) +#define ISLCNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_LCN) #define ISPHY_11N_CAP(pi) (ISNPHY(pi) || ISLCNPHY(pi)) @@ -215,7 +220,7 @@ enum { MPHASE_CAL_STATE_IDLETSSI }; -typedef enum { +enum phy_cal_mode { CAL_FULL, CAL_RECAL, CAL_CURRECAL, @@ -223,7 +228,7 @@ typedef enum { CAL_GCTRL, CAL_SOFT, CAL_DIGLO -} phy_cal_mode_t; +}; #define RDR_NTIERS 1 #define RDR_TIER_SIZE 64 @@ -248,7 +253,7 @@ typedef enum { #define PHY_CHAIN_TX_DISABLE_TEMP 115 #define PHY_HYSTERESIS_DELTATEMP 5 -#define PHY_BITSCNT(x) bcm_bitcount((u8 *)&(x), sizeof(u8)) +#define PHY_BITSCNT(x) brcmu_bitcount((u8 *)&(x), sizeof(u8)) #define MOD_PHY_REG(pi, phy_type, reg_name, field, value) \ mod_phy_reg(pi, phy_type##_##reg_name, phy_type##_##reg_name##_##field##_MASK, \ @@ -285,21 +290,21 @@ typedef enum { #define PHY_LTRN_LIST_LEN 64 extern u16 ltrn_list[PHY_LTRN_LIST_LEN]; -typedef struct _phy_table_info { +struct phy_table_info { uint table; int q; uint max; -} phy_table_info_t; +}; -typedef struct phytbl_info { +struct phytbl_info { const void *tbl_ptr; u32 tbl_len; u32 tbl_id; u32 tbl_offset; u32 tbl_width; -} phytbl_info_t; +}; -typedef struct { +struct interference_info { u8 curr_home_channel; u16 crsminpwrthld_40_stored; u16 crsminpwrthld_20L_stored; @@ -369,10 +374,9 @@ typedef struct { u16 radio_2057_core2_rssi_wb2_gc_stored; u16 radio_2057_core1_rssi_nb_gc_stored; u16 radio_2057_core2_rssi_nb_gc_stored; +}; -} interference_info_t; - -typedef struct { +struct aci_save_gphy { u16 rc_cal_ovr; u16 phycrsth1; u16 phycrsth2; @@ -406,21 +410,21 @@ typedef struct { u16 div_srch_gn_back; u16 ant_dwell; u16 ant_wr_settle; -} aci_save_gphy_t; +}; -typedef struct _lo_complex_t { +struct lo_complex_abgphy_info { s8 i; s8 q; -} lo_complex_abgphy_info_t; +}; -typedef struct _nphy_iq_comp { +struct nphy_iq_comp { s16 a0; s16 b0; s16 a1; s16 b1; -} nphy_iq_comp_t; +}; -typedef struct _nphy_txpwrindex { +struct nphy_txpwrindex { s8 index; s8 index_internal; s8 index_internal_save; @@ -431,20 +435,20 @@ typedef struct _nphy_txpwrindex { u16 iqcomp_a; u16 iqcomp_b; u16 locomp; -} phy_txpwrindex_t; +}; -typedef struct { +struct txiqcal_cache { u16 txcal_coeffs_2G[8]; u16 txcal_radio_regs_2G[8]; - nphy_iq_comp_t rxcal_coeffs_2G; + struct nphy_iq_comp rxcal_coeffs_2G; u16 txcal_coeffs_5G[8]; u16 txcal_radio_regs_5G[8]; - nphy_iq_comp_t rxcal_coeffs_5G; -} txiqcal_cache_t; + struct nphy_iq_comp rxcal_coeffs_5G; +}; -typedef struct _nphy_pwrctrl { +struct nphy_pwrctrl { s8 max_pwr_2g; s8 idle_targ_2g; s16 pwrdet_2g_a1; @@ -471,34 +475,34 @@ typedef struct _nphy_pwrctrl { s16 a1; s16 b0; s16 b1; -} phy_pwrctrl_t; +}; -typedef struct _nphy_txgains { +struct nphy_txgains { u16 txlpf[2]; u16 txgm[2]; u16 pga[2]; u16 pad[2]; u16 ipa[2]; -} nphy_txgains_t; +}; #define PHY_NOISEVAR_BUFSIZE 10 -typedef struct _nphy_noisevar_buf { +struct nphy_noisevar_buf { int bufcount; int tone_id[PHY_NOISEVAR_BUFSIZE]; u32 noise_vars[PHY_NOISEVAR_BUFSIZE]; u32 min_noise_vars[PHY_NOISEVAR_BUFSIZE]; -} phy_noisevar_buf_t; +}; -typedef struct { +struct rssical_cache { u16 rssical_radio_regs_2G[2]; u16 rssical_phyregs_2G[12]; u16 rssical_radio_regs_5G[2]; u16 rssical_phyregs_5G[12]; -} rssical_cache_t; +}; -typedef struct { +struct lcnphy_cal_results { u16 txiqlocal_a; u16 txiqlocal_b; @@ -522,12 +526,12 @@ typedef struct { u16 rxiqcal_coeff_a0; u16 rxiqcal_coeff_b0; -} lcnphy_cal_results_t; +}; struct shared_phy { - struct phy_info *phy_head; + struct brcms_phy *phy_head; uint unit; - si_t *sih; + struct si_pub *sih; void *physhim; uint corerev; u32 machwcap; @@ -561,7 +565,7 @@ struct shared_phy { bool _rifs_phy; }; -struct phy_pub { +struct brcms_phy_pub { uint phy_type; uint phy_rev; u8 phy_corenum; @@ -574,12 +578,6 @@ struct phy_pub { bool abgphy_encore; }; -struct phy_info_nphy; -typedef struct phy_info_nphy phy_info_nphy_t; - -struct phy_info_lcnphy; -typedef struct phy_info_lcnphy phy_info_lcnphy_t; - struct phy_func_ptr { initfn_t init; initfn_t calinit; @@ -594,23 +592,22 @@ struct phy_func_ptr { rxsigpwrfn_t rxsigpwr; detachfn_t detach; }; -typedef struct phy_func_ptr phy_func_ptr_t; -struct phy_info { - wlc_phy_t pubpi_ro; - shared_phy_t *sh; - phy_func_ptr_t pi_fptr; +struct brcms_phy { + struct brcms_phy_pub pubpi_ro; + struct shared_phy *sh; + struct phy_func_ptr pi_fptr; void *pi_ptr; union { - phy_info_lcnphy_t *pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcnphy; } u; bool user_txpwr_at_rfport; d11regs_t *regs; - struct phy_info *next; + struct brcms_phy *next; char *vars; - wlc_phy_t pubpi; + struct brcms_phy_pub pubpi; bool do_initcal; bool phytest_on; @@ -653,8 +650,8 @@ struct phy_info { s8 tx_power_offset[TXP_NUM_RATES]; u8 tx_power_target[TXP_NUM_RATES]; - srom_fem_t srom_fem2g; - srom_fem_t srom_fem5g; + struct brcms_phy_srom_fem srom_fem2g; + struct brcms_phy_srom_fem srom_fem5g; u8 tx_power_max; u8 tx_power_max_rate_ind; @@ -725,7 +722,8 @@ struct phy_info { u16 mintxbias; u16 mintxmag; - lo_complex_abgphy_info_t gphy_locomp_iq[STATIC_NUM_RF][STATIC_NUM_BB]; + struct lo_complex_abgphy_info gphy_locomp_iq + [STATIC_NUM_RF][STATIC_NUM_BB]; s8 stats_11b_txpower[STATIC_NUM_RF][STATIC_NUM_BB]; u16 gain_table[TX_GAIN_TABLE_LENGTH]; bool loopback_gain; @@ -783,8 +781,8 @@ struct phy_info { u32 nphy_bb_mult_save; u16 nphy_txiqlocal_bestc[11]; bool nphy_txiqlocal_coeffsvalid; - phy_txpwrindex_t nphy_txpwrindex[PHY_CORE_NUM_2]; - phy_pwrctrl_t nphy_pwrctrl_info[PHY_CORE_NUM_2]; + struct nphy_txpwrindex nphy_txpwrindex[PHY_CORE_NUM_2]; + struct nphy_pwrctrl nphy_pwrctrl_info[PHY_CORE_NUM_2]; u16 cck2gpo; u32 ofdm2gpo; u32 ofdm5gpo; @@ -852,8 +850,8 @@ struct phy_info { bool internal_tx_iqlo_cal_tapoff_intpa_nphy; s16 nphy_lastcal_temp; - txiqcal_cache_t calibration_cache; - rssical_cache_t rssical_cache; + struct txiqcal_cache calibration_cache; + struct rssical_cache rssical_cache; u8 nphy_txpwr_idx[2]; u8 nphy_papd_cal_type; @@ -884,7 +882,7 @@ struct phy_info { u8 nphy_txcal_pwr_idx[2]; u8 nphy_rxcal_pwr_idx[2]; u16 nphy_cal_orig_tx_gain[2]; - nphy_txgains_t nphy_cal_target_gain; + struct nphy_txgains nphy_cal_target_gain; u16 nphy_txcal_bbmult; u16 nphy_gmval; @@ -895,7 +893,7 @@ struct phy_info { bool nphy_aband_spurwar_en; u16 nphy_rccal_value; u16 nphy_crsminpwr[3]; - phy_noisevar_buf_t nphy_saved_noisevars; + struct nphy_noisevar_buf nphy_saved_noisevars; bool nphy_anarxlpf_adjusted; bool nphy_crsminpwr_adjusted; bool nphy_noisevars_adjusted; @@ -939,141 +937,145 @@ struct phy_info { struct wiphy *wiphy; }; -typedef s32 fixed; - -typedef struct _cs32 { +struct _cs32 { fixed q; fixed i; -} cs32; +}; -typedef struct radio_regs { +struct radio_regs { u16 address; u32 init_a; u32 init_g; u8 do_init_a; u8 do_init_g; -} radio_regs_t; +}; -typedef struct radio_20xx_regs { +struct radio_20xx_regs { u16 address; u8 init; u8 do_init; -} radio_20xx_regs_t; +}; -typedef struct lcnphy_radio_regs { +struct lcnphy_radio_regs { u16 address; u8 init_a; u8 init_g; u8 do_init_a; u8 do_init_g; -} lcnphy_radio_regs_t; - -extern lcnphy_radio_regs_t lcnphy_radio_regs_2064[]; -extern lcnphy_radio_regs_t lcnphy_radio_regs_2066[]; -extern radio_regs_t regs_2055[], regs_SYN_2056[], regs_TX_2056[], - regs_RX_2056[]; -extern radio_regs_t regs_SYN_2056_A1[], regs_TX_2056_A1[], regs_RX_2056_A1[]; -extern radio_regs_t regs_SYN_2056_rev5[], regs_TX_2056_rev5[], - regs_RX_2056_rev5[]; -extern radio_regs_t regs_SYN_2056_rev6[], regs_TX_2056_rev6[], - regs_RX_2056_rev6[]; -extern radio_regs_t regs_SYN_2056_rev7[], regs_TX_2056_rev7[], - regs_RX_2056_rev7[]; -extern radio_regs_t regs_SYN_2056_rev8[], regs_TX_2056_rev8[], - regs_RX_2056_rev8[]; -extern radio_20xx_regs_t regs_2057_rev4[], regs_2057_rev5[], regs_2057_rev5v1[]; -extern radio_20xx_regs_t regs_2057_rev7[], regs_2057_rev8[]; - -extern char *phy_getvar(phy_info_t *pi, const char *name); -extern int phy_getintvar(phy_info_t *pi, const char *name); +}; + +extern struct lcnphy_radio_regs lcnphy_radio_regs_2064[]; +extern struct lcnphy_radio_regs lcnphy_radio_regs_2066[]; +extern struct radio_regs regs_2055[], regs_SYN_2056[], regs_TX_2056[], + regs_RX_2056[]; +extern struct radio_regs regs_SYN_2056_A1[], regs_TX_2056_A1[], + regs_RX_2056_A1[]; +extern struct radio_regs regs_SYN_2056_rev5[], regs_TX_2056_rev5[], + regs_RX_2056_rev5[]; +extern struct radio_regs regs_SYN_2056_rev6[], regs_TX_2056_rev6[], + regs_RX_2056_rev6[]; +extern struct radio_regs regs_SYN_2056_rev7[], regs_TX_2056_rev7[], + regs_RX_2056_rev7[]; +extern struct radio_regs regs_SYN_2056_rev8[], regs_TX_2056_rev8[], + regs_RX_2056_rev8[]; +extern struct radio_20xx_regs regs_2057_rev4[], regs_2057_rev5[], + regs_2057_rev5v1[]; +extern struct radio_20xx_regs regs_2057_rev7[], regs_2057_rev8[]; + +extern char *phy_getvar(struct brcms_phy *pi, const char *name); +extern int phy_getintvar(struct brcms_phy *pi, const char *name); #define PHY_GETVAR(pi, name) phy_getvar(pi, name) #define PHY_GETINTVAR(pi, name) phy_getintvar(pi, name) -extern u16 read_phy_reg(phy_info_t *pi, u16 addr); -extern void write_phy_reg(phy_info_t *pi, u16 addr, u16 val); -extern void and_phy_reg(phy_info_t *pi, u16 addr, u16 val); -extern void or_phy_reg(phy_info_t *pi, u16 addr, u16 val); -extern void mod_phy_reg(phy_info_t *pi, u16 addr, u16 mask, u16 val); +extern u16 read_phy_reg(struct brcms_phy *pi, u16 addr); +extern void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val); +extern void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val); +extern void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val); +extern void mod_phy_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val); -extern u16 read_radio_reg(phy_info_t *pi, u16 addr); -extern void or_radio_reg(phy_info_t *pi, u16 addr, u16 val); -extern void and_radio_reg(phy_info_t *pi, u16 addr, u16 val); -extern void mod_radio_reg(phy_info_t *pi, u16 addr, u16 mask, +extern u16 read_radio_reg(struct brcms_phy *pi, u16 addr); +extern void or_radio_reg(struct brcms_phy *pi, u16 addr, u16 val); +extern void and_radio_reg(struct brcms_phy *pi, u16 addr, u16 val); +extern void mod_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val); -extern void xor_radio_reg(phy_info_t *pi, u16 addr, u16 mask); +extern void xor_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask); -extern void write_radio_reg(phy_info_t *pi, u16 addr, u16 val); +extern void write_radio_reg(struct brcms_phy *pi, u16 addr, u16 val); -extern void wlc_phyreg_enter(wlc_phy_t *pih); -extern void wlc_phyreg_exit(wlc_phy_t *pih); -extern void wlc_radioreg_enter(wlc_phy_t *pih); -extern void wlc_radioreg_exit(wlc_phy_t *pih); +extern void wlc_phyreg_enter(struct brcms_phy_pub *pih); +extern void wlc_phyreg_exit(struct brcms_phy_pub *pih); +extern void wlc_radioreg_enter(struct brcms_phy_pub *pih); +extern void wlc_radioreg_exit(struct brcms_phy_pub *pih); -extern void wlc_phy_read_table(phy_info_t *pi, const phytbl_info_t *ptbl_info, +extern void wlc_phy_read_table(struct brcms_phy *pi, + const struct phytbl_info *ptbl_info, u16 tblAddr, u16 tblDataHi, u16 tblDatalo); -extern void wlc_phy_write_table(phy_info_t *pi, - const phytbl_info_t *ptbl_info, u16 tblAddr, - u16 tblDataHi, u16 tblDatalo); -extern void wlc_phy_table_addr(phy_info_t *pi, uint tbl_id, uint tbl_offset, - u16 tblAddr, u16 tblDataHi, +extern void wlc_phy_write_table(struct brcms_phy *pi, + const struct phytbl_info *ptbl_info, + u16 tblAddr, u16 tblDataHi, u16 tblDatalo); +extern void wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id, + uint tbl_offset, u16 tblAddr, u16 tblDataHi, u16 tblDataLo); -extern void wlc_phy_table_data_write(phy_info_t *pi, uint width, u32 val); +extern void wlc_phy_table_data_write(struct brcms_phy *pi, uint width, u32 val); -extern void write_phy_channel_reg(phy_info_t *pi, uint val); -extern void wlc_phy_txpower_update_shm(phy_info_t *pi); +extern void write_phy_channel_reg(struct brcms_phy *pi, uint val); +extern void wlc_phy_txpower_update_shm(struct brcms_phy *pi); extern void wlc_phy_cordic(fixed theta, cs32 *val); extern u8 wlc_phy_nbits(s32 value); extern void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_dB, u8 core); -extern uint wlc_phy_init_radio_regs_allbands(phy_info_t *pi, - radio_20xx_regs_t *radioregs); -extern uint wlc_phy_init_radio_regs(phy_info_t *pi, radio_regs_t *radioregs, +extern uint wlc_phy_init_radio_regs_allbands(struct brcms_phy *pi, + struct radio_20xx_regs *radioregs); +extern uint wlc_phy_init_radio_regs(struct brcms_phy *pi, + struct radio_regs *radioregs, u16 core_offset); -extern void wlc_phy_txpower_ipa_upd(phy_info_t *pi); +extern void wlc_phy_txpower_ipa_upd(struct brcms_phy *pi); -extern void wlc_phy_do_dummy_tx(phy_info_t *pi, bool ofdm, bool pa_on); +extern void wlc_phy_do_dummy_tx(struct brcms_phy *pi, bool ofdm, bool pa_on); extern void wlc_phy_papd_decode_epsilon(u32 epsilon, s32 *eps_real, s32 *eps_imag); -extern void wlc_phy_cal_perical_mphase_reset(phy_info_t *pi); -extern void wlc_phy_cal_perical_mphase_restart(phy_info_t *pi); +extern void wlc_phy_cal_perical_mphase_reset(struct brcms_phy *pi); +extern void wlc_phy_cal_perical_mphase_restart(struct brcms_phy *pi); -extern bool wlc_phy_attach_nphy(phy_info_t *pi); -extern bool wlc_phy_attach_lcnphy(phy_info_t *pi); +extern bool wlc_phy_attach_nphy(struct brcms_phy *pi); +extern bool wlc_phy_attach_lcnphy(struct brcms_phy *pi); -extern void wlc_phy_detach_lcnphy(phy_info_t *pi); +extern void wlc_phy_detach_lcnphy(struct brcms_phy *pi); -extern void wlc_phy_init_nphy(phy_info_t *pi); -extern void wlc_phy_init_lcnphy(phy_info_t *pi); +extern void wlc_phy_init_nphy(struct brcms_phy *pi); +extern void wlc_phy_init_lcnphy(struct brcms_phy *pi); -extern void wlc_phy_cal_init_nphy(phy_info_t *pi); -extern void wlc_phy_cal_init_lcnphy(phy_info_t *pi); +extern void wlc_phy_cal_init_nphy(struct brcms_phy *pi); +extern void wlc_phy_cal_init_lcnphy(struct brcms_phy *pi); -extern void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec); -extern void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec); -extern void wlc_phy_chanspec_set_fixup_lcnphy(phy_info_t *pi, +extern void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi, + chanspec_t chanspec); +extern void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi, + chanspec_t chanspec); +extern void wlc_phy_chanspec_set_fixup_lcnphy(struct brcms_phy *pi, chanspec_t chanspec); extern int wlc_phy_channel2freq(uint channel); extern int wlc_phy_chanspec_freq2bandrange_lpssn(uint); -extern int wlc_phy_chanspec_bandrange_get(phy_info_t *, chanspec_t); +extern int wlc_phy_chanspec_bandrange_get(struct brcms_phy *, chanspec_t); -extern void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode); -extern s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi); +extern void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode); +extern s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi); -extern void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi); -extern void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi); -extern void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi); +extern void wlc_phy_txpower_recalc_target_nphy(struct brcms_phy *pi); +extern void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi); +extern void wlc_phy_txpower_recalc_target_lcnphy(struct brcms_phy *pi); -extern void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index); -extern void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable); -extern void wlc_lcnphy_stop_tx_tone(phy_info_t *pi); -extern void wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, +extern void wlc_lcnphy_set_tx_pwr_by_index(struct brcms_phy *pi, int index); +extern void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable); +extern void wlc_lcnphy_stop_tx_tone(struct brcms_phy *pi); +extern void wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz, u16 max_val, bool iqcalmode); -extern void wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, +extern void wlc_phy_txpower_sromlimit_get_nphy(struct brcms_phy *pi, uint chan, u8 *max_pwr, u8 rate_id); extern void wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start, u8 rate_mcs_end, @@ -1083,21 +1085,21 @@ extern void wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_end, u8 rate_mcs_start); -extern u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode); -extern s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode); -extern s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode); -extern s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode); -extern void wlc_phy_carrier_suppress_lcnphy(phy_info_t *pi); -extern void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel); -extern void wlc_lcnphy_epa_switch(phy_info_t *pi, bool mode); -extern void wlc_2064_vco_cal(phy_info_t *pi); +extern u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode); +extern s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode); +extern s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode); +extern s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode); +extern void wlc_phy_carrier_suppress_lcnphy(struct brcms_phy *pi); +extern void wlc_lcnphy_crsuprs(struct brcms_phy *pi, int channel); +extern void wlc_lcnphy_epa_switch(struct brcms_phy *pi, bool mode); +extern void wlc_2064_vco_cal(struct brcms_phy *pi); -extern void wlc_phy_txpower_recalc_target(phy_info_t *pi); +extern void wlc_phy_txpower_recalc_target(struct brcms_phy *pi); #define LCNPHY_TBL_ID_PAPDCOMPDELTATBL 0x18 #define LCNPHY_TX_POWER_TABLE_SIZE 128 #define LCNPHY_MAX_TX_POWER_INDEX (LCNPHY_TX_POWER_TABLE_SIZE - 1) -#define LCNPHY_TBL_ID_TXPWRCTL 0x07 +#define LCNPHY_TBL_ID_TXPWRCTL 0x07 #define LCNPHY_TX_PWR_CTRL_OFF 0 #define LCNPHY_TX_PWR_CTRL_SW (0x1 << 15) #define LCNPHY_TX_PWR_CTRL_HW ((0x1 << 15) | \ @@ -1106,36 +1108,39 @@ extern void wlc_phy_txpower_recalc_target(phy_info_t *pi); #define LCNPHY_TX_PWR_CTRL_TEMPBASED 0xE001 -extern void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti); -extern void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti); -extern void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b); -extern void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq); -extern void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b); -extern u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi); -extern void wlc_lcnphy_get_radio_loft(phy_info_t *pi, u8 *ei0, +extern void wlc_lcnphy_write_table(struct brcms_phy *pi, + const struct phytbl_info *pti); +extern void wlc_lcnphy_read_table(struct brcms_phy *pi, + struct phytbl_info *pti); +extern void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b); +extern void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq); +extern void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b); +extern u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi); +extern void wlc_lcnphy_get_radio_loft(struct brcms_phy *pi, u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0); -extern void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode); -extern void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode); -extern bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi); -extern void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi); +extern void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode); +extern void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode); +extern bool wlc_phy_tpc_isenabled_lcnphy(struct brcms_phy *pi); +extern void wlc_lcnphy_tx_pwr_update_npt(struct brcms_phy *pi); extern s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1); -extern void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, +extern void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr, s8 *cck_pwr); -extern void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi); +extern void wlc_lcnphy_tx_power_adjustment(struct brcms_phy_pub *ppi); -extern s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index); +extern s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index); #define NPHY_MAX_HPVGA1_INDEX 10 #define NPHY_DEF_HPVGA1_INDEXLIMIT 7 -typedef struct _phy_iq_est { +struct phy_iq_est { s32 iq_prod; u32 i_pwr; u32 q_pwr; -} phy_iq_est_t; +}; -extern void wlc_phy_stay_in_carriersearch_nphy(phy_info_t *pi, bool enable); -extern void wlc_nphy_deaf_mode(phy_info_t *pi, bool mode); +extern void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi, + bool enable); +extern void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode); #define wlc_phy_write_table_nphy(pi, pti) wlc_phy_write_table(pi, pti, 0x72, \ 0x74, 0x73) @@ -1145,82 +1150,86 @@ extern void wlc_nphy_deaf_mode(phy_info_t *pi, bool mode); 0x72, 0x74, 0x73) #define wlc_nphy_table_data_write(pi, w, v) wlc_phy_table_data_write((pi), (w), (v)) -extern void wlc_phy_table_read_nphy(phy_info_t *pi, u32, u32 l, u32 o, +extern void wlc_phy_table_read_nphy(struct brcms_phy *pi, u32, u32 l, u32 o, u32 w, void *d); -extern void wlc_phy_table_write_nphy(phy_info_t *pi, u32, u32, u32, +extern void wlc_phy_table_write_nphy(struct brcms_phy *pi, u32, u32, u32, u32, const void *); #define PHY_IPA(pi) \ ((pi->ipa2g_on && CHSPEC_IS2G(pi->radio_chanspec)) || \ (pi->ipa5g_on && CHSPEC_IS5G(pi->radio_chanspec))) -#define WLC_PHY_WAR_PR51571(pi) \ +#define BRCMS_PHY_WAR_PR51571(pi) \ if (((pi)->sh->bustype == PCI_BUS) && NREV_LT((pi)->pubpi.phy_rev, 3)) \ (void)R_REG(&(pi)->regs->maccontrol) -extern void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype); -extern void wlc_phy_aci_reset_nphy(phy_info_t *pi); -extern void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en); +extern void wlc_phy_cal_perical_nphy_run(struct brcms_phy *pi, u8 caltype); +extern void wlc_phy_aci_reset_nphy(struct brcms_phy *pi); +extern void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en); -extern u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint chan); -extern void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on); +extern u8 wlc_phy_get_chan_freq_range_nphy(struct brcms_phy *pi, uint chan); +extern void wlc_phy_switch_radio_nphy(struct brcms_phy *pi, bool on); -extern void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi); +extern void wlc_phy_stf_chain_upd_nphy(struct brcms_phy *pi); -extern void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd); -extern s16 wlc_phy_tempsense_nphy(phy_info_t *pi); +extern void wlc_phy_force_rfseq_nphy(struct brcms_phy *pi, u8 cmd); +extern s16 wlc_phy_tempsense_nphy(struct brcms_phy *pi); -extern u16 wlc_phy_classifier_nphy(phy_info_t *pi, u16 mask, u16 val); +extern u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val); -extern void wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, +extern void wlc_phy_rx_iq_est_nphy(struct brcms_phy *pi, struct phy_iq_est *est, u16 num_samps, u8 wait_time, u8 wait_for_crs); -extern void wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, - nphy_iq_comp_t *comp); -extern void wlc_phy_aci_and_noise_reduction_nphy(phy_info_t *pi); +extern void wlc_phy_rx_iq_coeffs_nphy(struct brcms_phy *pi, u8 write, + struct nphy_iq_comp *comp); +extern void wlc_phy_aci_and_noise_reduction_nphy(struct brcms_phy *pi); -extern void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask); -extern u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih); +extern void wlc_phy_rxcore_setstate_nphy(struct brcms_phy_pub *pih, + u8 rxcore_bitmask); +extern u8 wlc_phy_rxcore_getstate_nphy(struct brcms_phy_pub *pih); -extern void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type); -extern void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi); -extern void wlc_phy_txpwr_apply_nphy(phy_info_t *pi); -extern void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi); -extern u16 wlc_phy_txpwr_idx_get_nphy(phy_info_t *pi); +extern void wlc_phy_txpwrctrl_enable_nphy(struct brcms_phy *pi, u8 ctrl_type); +extern void wlc_phy_txpwr_fixpower_nphy(struct brcms_phy *pi); +extern void wlc_phy_txpwr_apply_nphy(struct brcms_phy *pi); +extern void wlc_phy_txpwr_papd_cal_nphy(struct brcms_phy *pi); +extern u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi); -extern nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi); -extern int wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, +extern struct nphy_txgains wlc_phy_get_tx_gain_nphy(struct brcms_phy *pi); +extern int wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, + struct nphy_txgains target_gain, bool full, bool m); -extern int wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, +extern int wlc_phy_cal_rxiq_nphy(struct brcms_phy *pi, + struct nphy_txgains target_gain, u8 type, bool d); -extern void wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, +extern void wlc_phy_txpwr_index_nphy(struct brcms_phy *pi, u8 core_mask, s8 txpwrindex, bool res); -extern void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core, u8 rssi_type); -extern int wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, +extern void wlc_phy_rssisel_nphy(struct brcms_phy *pi, u8 core, u8 rssi_type); +extern int wlc_phy_poll_rssi_nphy(struct brcms_phy *pi, u8 rssi_type, s32 *rssi_buf, u8 nsamps); -extern void wlc_phy_rssi_cal_nphy(phy_info_t *pi); -extern int wlc_phy_aci_scan_nphy(phy_info_t *pi); -extern void wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, s32 dBm_targetpower, - bool debug); -extern int wlc_phy_tx_tone_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, +extern void wlc_phy_rssi_cal_nphy(struct brcms_phy *pi); +extern int wlc_phy_aci_scan_nphy(struct brcms_phy *pi); +extern void wlc_phy_cal_txgainctrl_nphy(struct brcms_phy *pi, + s32 dBm_targetpower, bool debug); +extern int wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, u8 mode, u8, bool); -extern void wlc_phy_stopplayback_nphy(phy_info_t *pi); -extern void wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf, +extern void wlc_phy_stopplayback_nphy(struct brcms_phy *pi); +extern void wlc_phy_est_tonepwr_nphy(struct brcms_phy *pi, s32 *qdBm_pwrbuf, u8 num_samps); -extern void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi); +extern void wlc_phy_radio205x_vcocal_nphy(struct brcms_phy *pi); -extern int wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh); +extern int wlc_phy_rssi_compute_nphy(struct brcms_phy *pi, + struct brcms_d11rxhdr *wlc_rxh); #define NPHY_TESTPATTERN_BPHY_EVM 0 #define NPHY_TESTPATTERN_BPHY_RFCS 1 -extern void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs); +extern void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs); -void wlc_phy_get_pwrdet_offsets(phy_info_t *pi, s8 *cckoffset, +void wlc_phy_get_pwrdet_offsets(struct brcms_phy *pi, s8 *cckoffset, s8 *ofdmoffset); -extern s8 wlc_phy_upd_rssi_offset(phy_info_t *pi, s8 rssi, +extern s8 wlc_phy_upd_rssi_offset(struct brcms_phy *pi, s8 rssi, chanspec_t chanspec); -extern bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pih); -#endif /* _wlc_phy_int_h_ */ +extern bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pih); +#endif /* _BRCM_PHY_INT_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c index b8864c5b7a1..6a3fbe67302 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.c @@ -14,28 +14,20 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> -#include <linux/string.h> -#include <linux/bitops.h> #include <linux/delay.h> -#include <wlc_cfg.h> -#include <linux/pci.h> -#include <aiutils.h> -#include <wlc_pmu.h> -#include <bcmnvram.h> -#include <bcmdevs.h> -#include <sbhnddma.h> - -#include "wlc_phy_radio.h" -#include "wlc_phy_int.h" -#include "wlc_phy_qmath.h" -#include "wlc_phy_lcn.h" -#include "wlc_phytbl_lcn.h" +#include <pmu.h> +#include <d11.h> +#include <phy_shim.h> +#include "phy_qmath.h" +#include "phy_hal.h" +#include "phy_radio.h" +#include "phytbl_lcn.h" +#include "phy_lcn.h" #define PLL_2064_NDIV 90 -#define PLL_2064_LOW_END_VCO 3000 -#define PLL_2064_LOW_END_KVCO 27 +#define PLL_2064_LOW_END_VCO 3000 +#define PLL_2064_LOW_END_KVCO 27 #define PLL_2064_HIGH_END_VCO 4200 #define PLL_2064_HIGH_END_KVCO 68 #define PLL_2064_LOOP_BW_DOUBLER 200 @@ -46,7 +38,7 @@ #define PLL_2064_MHZ 1000000 #define PLL_2064_OPEN_LOOP_DELAY 5 -#define TEMPSENSE 1 +#define TEMPSENSE 1 #define VBATSENSE 2 #define NOISE_IF_UPD_CHK_INTERVAL 1 @@ -58,10 +50,10 @@ #define NOISE_IF_CHK 1 #define NOISE_IF_ON 2 -#define PAPD_BLANKING_PROFILE 3 +#define PAPD_BLANKING_PROFILE 3 #define PAPD2LUT 0 -#define PAPD_CORR_NORM 0 -#define PAPD_BLANKING_THRESHOLD 0 +#define PAPD_CORR_NORM 0 +#define PAPD_BLANKING_THRESHOLD 0 #define PAPD_STOP_AFTER_LAST_UPDATE 0 #define LCN_TARGET_PWR 60 @@ -116,9 +108,9 @@ #define LCNPHY_TBL_ID_SAMPLEPLAY 0x15 #define LCNPHY_TBL_ID_SAMPLEPLAY1 0x16 -#define LCNPHY_TX_PWR_CTRL_RATE_OFFSET 832 -#define LCNPHY_TX_PWR_CTRL_MAC_OFFSET 128 -#define LCNPHY_TX_PWR_CTRL_GAIN_OFFSET 192 +#define LCNPHY_TX_PWR_CTRL_RATE_OFFSET 832 +#define LCNPHY_TX_PWR_CTRL_MAC_OFFSET 128 +#define LCNPHY_TX_PWR_CTRL_GAIN_OFFSET 192 #define LCNPHY_TX_PWR_CTRL_IQ_OFFSET 320 #define LCNPHY_TX_PWR_CTRL_LO_OFFSET 448 #define LCNPHY_TX_PWR_CTRL_PWR_OFFSET 576 @@ -144,60 +136,55 @@ (0 != (read_phy_reg((pi), 0x43b) & (0x1 << 6))) #define wlc_lcnphy_total_tx_frames(pi) \ - wlapi_bmac_read_shm((pi)->sh->physhim, M_UCODE_MACSTAT + offsetof(macstat_t, txallfrm)) + wlapi_bmac_read_shm((pi)->sh->physhim, \ + M_UCODE_MACSTAT + offsetof(struct macstat, txallfrm)) -typedef struct { +struct lcnphy_txgains { u16 gm_gain; u16 pga_gain; u16 pad_gain; u16 dac_gain; -} lcnphy_txgains_t; +}; -typedef enum { +enum lcnphy_cal_mode { LCNPHY_CAL_FULL, LCNPHY_CAL_RECAL, LCNPHY_CAL_CURRECAL, LCNPHY_CAL_DIGCAL, LCNPHY_CAL_GCTRL -} lcnphy_cal_mode_t; - -typedef struct { - lcnphy_txgains_t gains; - bool useindex; - u8 index; -} lcnphy_txcalgains_t; +}; -typedef struct { +struct lcnphy_rx_iqcomp { u8 chan; s16 a; s16 b; -} lcnphy_rx_iqcomp_t; +}; -typedef struct { +struct lcnphy_spb_tone { s16 re; s16 im; -} lcnphy_spb_tone_t; +}; -typedef struct { +struct lcnphy_unsign16_struct { u16 re; u16 im; -} lcnphy_unsign16_struct; +}; -typedef struct { +struct lcnphy_iq_est { u32 iq_prod; u32 i_pwr; u32 q_pwr; -} lcnphy_iq_est_t; +}; -typedef struct { +struct lcnphy_sfo_cfg { u16 ptcentreTs20; u16 ptcentreFactor; -} lcnphy_sfo_cfg_t; +}; -typedef enum { +enum lcnphy_papd_cal_type { LCNPHY_PAPD_CAL_CW, LCNPHY_PAPD_CAL_OFDM -} lcnphy_papd_cal_type_t; +}; typedef u16 iqcal_gain_params_lcnphy[9]; @@ -214,7 +201,7 @@ static const u16 iqcal_gainparams_numgains_lcnphy[1] = { sizeof(*tbl_iqcal_gainparams_lcnphy_2G), }; -static const lcnphy_sfo_cfg_t lcnphy_sfo_cfg[] = { +static const struct lcnphy_sfo_cfg lcnphy_sfo_cfg[] = { {965, 1087}, {967, 1085}, {969, 1082}, @@ -280,7 +267,7 @@ u16 lcnphy_iqcal_ir_gainladder[] = { }; static const -lcnphy_spb_tone_t lcnphy_spb_tone_3750[] = { +struct lcnphy_spb_tone lcnphy_spb_tone_3750[] = { {88, 0}, {73, 49}, {34, 81}, @@ -373,7 +360,7 @@ u16 rxiq_cal_rf_reg[11] = { }; static const -lcnphy_rx_iqcomp_t lcnphy_rx_iqcomp_table_rev0[] = { +struct lcnphy_rx_iqcomp lcnphy_rx_iqcomp_table_rev0[] = { {1, 0, 0}, {2, 0, 0}, {3, 0, 0}, @@ -548,13 +535,7 @@ static const s8 lcnphy_gain_index_offset_for_rssi[] = { -2 }; -extern const u8 spur_tbl_rev0[]; -extern const u32 dot11lcnphytbl_rx_gain_info_sz_rev1; -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[]; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250; - -typedef struct _chan_info_2064_lcnphy { +struct chan_info_2064_lcnphy { uint chan; uint freq; u8 logen_buftune; @@ -565,9 +546,9 @@ typedef struct _chan_info_2064_lcnphy { u8 pa_rxrf_lna1_freq_tune; u8 pa_rxrf_lna2_freq_tune; u8 rxrf_rxrf_spare1; -} chan_info_2064_lcnphy_t; +}; -static chan_info_2064_lcnphy_t chan_info_2064_lcnphy[] = { +static struct chan_info_2064_lcnphy chan_info_2064_lcnphy[] = { {1, 2412, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, {2, 2417, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, {3, 2422, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, @@ -584,7 +565,7 @@ static chan_info_2064_lcnphy_t chan_info_2064_lcnphy[] = { {14, 2484, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80}, }; -lcnphy_radio_regs_t lcnphy_radio_regs_2064[] = { +struct lcnphy_radio_regs lcnphy_radio_regs_2064[] = { {0x00, 0, 0, 0, 0}, {0x01, 0x64, 0x64, 0, 0}, {0x02, 0x20, 0x20, 0, 0}, @@ -896,9 +877,8 @@ lcnphy_radio_regs_t lcnphy_radio_regs_2064[] = { #define LCNPHY_NUM_DIG_FILT_COEFFS 16 #define LCNPHY_NUM_TX_DIG_FILTERS_CCK 13 -u16 - LCNPHY_txdigfiltcoeffs_cck[LCNPHY_NUM_TX_DIG_FILTERS_CCK] - [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = { +u16 LCNPHY_txdigfiltcoeffs_cck[LCNPHY_NUM_TX_DIG_FILTERS_CCK] + [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = { {0, 1, 415, 1874, 64, 128, 64, 792, 1656, 64, 128, 64, 778, 1582, 64, 128, 64,}, {1, 1, 402, 1847, 259, 59, 259, 671, 1794, 68, 54, 68, 608, 1863, 93, @@ -928,9 +908,8 @@ u16 }; #define LCNPHY_NUM_TX_DIG_FILTERS_OFDM 3 -u16 - LCNPHY_txdigfiltcoeffs_ofdm[LCNPHY_NUM_TX_DIG_FILTERS_OFDM] - [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = { +u16 LCNPHY_txdigfiltcoeffs_ofdm[LCNPHY_NUM_TX_DIG_FILTERS_OFDM] + [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = { {0, 0, 0xa2, 0x0, 0x100, 0x100, 0x0, 0x0, 0x0, 0x100, 0x0, 0x0, 0x278, 0xfea0, 0x80, 0x100, 0x80,}, {1, 0, 374, 0xFF79, 16, 32, 16, 799, 0xFE74, 50, 32, 50, @@ -982,78 +961,83 @@ u16 static u32 wlc_lcnphy_qdiv_roundup(u32 divident, u32 divisor, u8 precision); -static void wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, +static void wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi, u16 ext_lna, u16 trsw, u16 biq2, u16 biq1, u16 tia, u16 lna2, u16 lna1); -static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi); -static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain); -static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx); -static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0); -static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi); -static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains); -static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable); -static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi); -static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable); -static void wlc_lcnphy_set_tx_gain(phy_info_t *pi, - lcnphy_txgains_t *target_gains); -static bool wlc_lcnphy_rx_iq_est(phy_info_t *pi, u16 num_samps, - u8 wait_time, lcnphy_iq_est_t *iq_est); -static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps); -static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi); -static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode); -extern void wlc_lcnphy_tx_pwr_ctrl_init(wlc_phy_t *ppi); -static void wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, +static void wlc_lcnphy_clear_tx_power_offsets(struct brcms_phy *pi); +static void wlc_lcnphy_set_pa_gain(struct brcms_phy *pi, u16 gain); +static void wlc_lcnphy_set_trsw_override(struct brcms_phy *pi, bool tx, + bool rx); +static void wlc_lcnphy_set_bbmult(struct brcms_phy *pi, u8 m0); +static u8 wlc_lcnphy_get_bbmult(struct brcms_phy *pi); +static void wlc_lcnphy_get_tx_gain(struct brcms_phy *pi, + struct lcnphy_txgains *gains); +static void wlc_lcnphy_set_tx_gain_override(struct brcms_phy *pi, bool bEnable); +static void wlc_lcnphy_toggle_afe_pwdn(struct brcms_phy *pi); +static void wlc_lcnphy_rx_gain_override_enable(struct brcms_phy *pi, + bool enable); +static void wlc_lcnphy_set_tx_gain(struct brcms_phy *pi, + struct lcnphy_txgains *target_gains); +static bool wlc_lcnphy_rx_iq_est(struct brcms_phy *pi, u16 num_samps, + u8 wait_time, struct lcnphy_iq_est *iq_est); +static bool wlc_lcnphy_calc_rx_iq_comp(struct brcms_phy *pi, u16 num_samps); +static u16 wlc_lcnphy_get_pa_gain(struct brcms_phy *pi); +static void wlc_lcnphy_afe_clk_init(struct brcms_phy *pi, u8 mode); +static void wlc_lcnphy_tx_pwr_ctrl_init(struct brcms_phy_pub *ppi); +static void wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi, u8 channel); -static void wlc_lcnphy_load_tx_gain_table(phy_info_t *pi, - const lcnphy_tx_gain_tbl_entry *g); +static void wlc_lcnphy_load_tx_gain_table(struct brcms_phy *pi, + const struct lcnphy_tx_gain_tbl_entry *g); -static void wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, +static void wlc_lcnphy_samp_cap(struct brcms_phy *pi, int clip_detect_algo, u16 thresh, s16 *ptr, int mode); static int wlc_lcnphy_calc_floor(s16 coeff, int type); -static void wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, +static void wlc_lcnphy_tx_iqlo_loopback(struct brcms_phy *pi, u16 *values_to_save); -static void wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, +static void wlc_lcnphy_tx_iqlo_loopback_cleanup(struct brcms_phy *pi, u16 *values_to_save); -static void wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, +static void wlc_lcnphy_set_cc(struct brcms_phy *pi, int cal_type, s16 coeff_x, s16 coeff_y); -static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type); -static void wlc_lcnphy_a1(phy_info_t *pi, int cal_type, +static struct lcnphy_unsign16_struct wlc_lcnphy_get_cc(struct brcms_phy *pi, + int cal_type); +static void wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels, int step_size_lg2); -static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi); +static void wlc_lcnphy_tx_iqlo_soft_cal_full(struct brcms_phy *pi); -static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, +static void wlc_lcnphy_set_chanspec_tweaks(struct brcms_phy *pi, chanspec_t chanspec); -static void wlc_lcnphy_agc_temp_init(phy_info_t *pi); -static void wlc_lcnphy_temp_adj(phy_info_t *pi); -static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi); -static void wlc_lcnphy_baseband_init(phy_info_t *pi); -static void wlc_lcnphy_radio_init(phy_info_t *pi); -static void wlc_lcnphy_rc_cal(phy_info_t *pi); -static void wlc_lcnphy_rcal(phy_info_t *pi); -static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable); -static int wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm, +static void wlc_lcnphy_agc_temp_init(struct brcms_phy *pi); +static void wlc_lcnphy_temp_adj(struct brcms_phy *pi); +static void wlc_lcnphy_clear_papd_comptable(struct brcms_phy *pi); +static void wlc_lcnphy_baseband_init(struct brcms_phy *pi); +static void wlc_lcnphy_radio_init(struct brcms_phy *pi); +static void wlc_lcnphy_rc_cal(struct brcms_phy *pi); +static void wlc_lcnphy_rcal(struct brcms_phy *pi); +static void wlc_lcnphy_txrx_spur_avoidance_mode(struct brcms_phy *pi, + bool enable); +static int wlc_lcnphy_load_tx_iir_filter(struct brcms_phy *pi, bool is_ofdm, s16 filt_type); -static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b); +static void wlc_lcnphy_set_rx_iq_comp(struct brcms_phy *pi, u16 a, u16 b); -void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti) +void wlc_lcnphy_write_table(struct brcms_phy *pi, const struct phytbl_info *pti) { wlc_phy_write_table(pi, pti, 0x455, 0x457, 0x456); } -void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti) +void wlc_lcnphy_read_table(struct brcms_phy *pi, struct phytbl_info *pti) { wlc_phy_read_table(pi, pti, 0x455, 0x457, 0x456); } static void -wlc_lcnphy_common_read_table(phy_info_t *pi, u32 tbl_id, +wlc_lcnphy_common_read_table(struct brcms_phy *pi, u32 tbl_id, const void *tbl_ptr, u32 tbl_len, u32 tbl_width, u32 tbl_offset) { - phytbl_info_t tab; + struct phytbl_info tab; tab.tbl_id = tbl_id; tab.tbl_ptr = tbl_ptr; tab.tbl_len = tbl_len; @@ -1063,12 +1047,12 @@ wlc_lcnphy_common_read_table(phy_info_t *pi, u32 tbl_id, } static void -wlc_lcnphy_common_write_table(phy_info_t *pi, u32 tbl_id, +wlc_lcnphy_common_write_table(struct brcms_phy *pi, u32 tbl_id, const void *tbl_ptr, u32 tbl_len, u32 tbl_width, u32 tbl_offset) { - phytbl_info_t tab; + struct phytbl_info tab; tab.tbl_id = tbl_id; tab.tbl_ptr = tbl_ptr; tab.tbl_len = tbl_len; @@ -1123,10 +1107,10 @@ static int wlc_lcnphy_calc_floor(s16 coeff_x, int type) return k; } -s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi) +s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi) { s8 index; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (txpwrctrl_off(pi)) index = pi_lcn->lcnphy_current_index; @@ -1139,16 +1123,16 @@ s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi) return index; } -static u32 wlc_lcnphy_measure_digital_power(phy_info_t *pi, u16 nsamples) +static u32 wlc_lcnphy_measure_digital_power(struct brcms_phy *pi, u16 nsamples) { - lcnphy_iq_est_t iq_est = { 0, 0, 0 }; + struct lcnphy_iq_est iq_est = { 0, 0, 0 }; if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est)) return 0; return (iq_est.i_pwr + iq_est.q_pwr) / nsamples; } -void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel) +void wlc_lcnphy_crsuprs(struct brcms_phy *pi, int channel) { u16 afectrlovr, afectrlovrval; afectrlovr = read_phy_reg(pi, 0x43b); @@ -1179,7 +1163,7 @@ void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel) } } -static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi) +static void wlc_lcnphy_toggle_afe_pwdn(struct brcms_phy *pi) { u16 save_AfeCtrlOvrVal, save_AfeCtrlOvr; @@ -1196,7 +1180,8 @@ static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi) write_phy_reg(pi, 0x43b, save_AfeCtrlOvr); } -static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable) +static void +wlc_lcnphy_txrx_spur_avoidance_mode(struct brcms_phy *pi, bool enable) { if (enable) { write_phy_reg(pi, 0x942, 0x7); @@ -1215,11 +1200,11 @@ static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable) wlapi_switch_macfreq(pi->sh->physhim, enable); } -void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec) +void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi, chanspec_t chanspec) { u8 channel = CHSPEC_CHANNEL(chanspec); - wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec); + wlc_phy_chanspec_radio_set((struct brcms_phy_pub *) pi, chanspec); wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec); @@ -1252,7 +1237,7 @@ void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec) } -static void wlc_lcnphy_set_dac_gain(phy_info_t *pi, u16 dac_gain) +static void wlc_lcnphy_set_dac_gain(struct brcms_phy *pi, u16 dac_gain) { u16 dac_ctrl; @@ -1263,7 +1248,7 @@ static void wlc_lcnphy_set_dac_gain(phy_info_t *pi, u16 dac_gain) } -static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable) +static void wlc_lcnphy_set_tx_gain_override(struct brcms_phy *pi, bool bEnable) { u16 bit = bEnable ? 1 : 0; @@ -1274,7 +1259,7 @@ static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable) mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6); } -static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi) +static u16 wlc_lcnphy_get_pa_gain(struct brcms_phy *pi) { u16 pa_gain; @@ -1285,8 +1270,8 @@ static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi) return pa_gain; } -static void -wlc_lcnphy_set_tx_gain(phy_info_t *pi, lcnphy_txgains_t *target_gains) +static void wlc_lcnphy_set_tx_gain(struct brcms_phy *pi, + struct lcnphy_txgains *target_gains) { u16 pa_gain = wlc_lcnphy_get_pa_gain(pi); @@ -1311,10 +1296,10 @@ wlc_lcnphy_set_tx_gain(phy_info_t *pi, lcnphy_txgains_t *target_gains) wlc_lcnphy_enable_tx_gain_override(pi); } -static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0) +static void wlc_lcnphy_set_bbmult(struct brcms_phy *pi, u8 m0) { u16 m0m1 = (u16) m0 << 8; - phytbl_info_t tab; + struct phytbl_info tab; tab.tbl_ptr = &m0m1; tab.tbl_len = 1; @@ -1324,10 +1309,10 @@ static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0) wlc_lcnphy_write_table(pi, &tab); } -static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi) +static void wlc_lcnphy_clear_tx_power_offsets(struct brcms_phy *pi) { u32 data_buf[64]; - phytbl_info_t tab; + struct phytbl_info tab; memset(data_buf, 0, sizeof(data_buf)); @@ -1347,13 +1332,14 @@ static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi) wlc_lcnphy_write_table(pi, &tab); } -typedef enum { +enum lcnphy_tssi_mode { LCNPHY_TSSI_PRE_PA, LCNPHY_TSSI_POST_PA, LCNPHY_TSSI_EXT -} lcnphy_tssi_mode_t; +}; -static void wlc_lcnphy_set_tssi_mux(phy_info_t *pi, lcnphy_tssi_mode_t pos) +static void +wlc_lcnphy_set_tssi_mux(struct brcms_phy *pi, enum lcnphy_tssi_mode pos) { mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0); @@ -1392,7 +1378,7 @@ static void wlc_lcnphy_set_tssi_mux(phy_info_t *pi, lcnphy_tssi_mode_t pos) } } -static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(phy_info_t *pi) +static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(struct brcms_phy *pi) { u16 N1, N2, N3, N4, N5, N6, N; N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0)) @@ -1413,10 +1399,10 @@ static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(phy_info_t *pi) return N; } -static void wlc_lcnphy_pwrctrl_rssiparams(phy_info_t *pi) +static void wlc_lcnphy_pwrctrl_rssiparams(struct brcms_phy *pi) { u16 auxpga_vmid, auxpga_vmid_temp, auxpga_gain_temp; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; auxpga_vmid = (2 << 8) | (pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf; @@ -1457,9 +1443,9 @@ static void wlc_lcnphy_pwrctrl_rssiparams(phy_info_t *pi) mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5)); } -static void wlc_lcnphy_tssi_setup(phy_info_t *pi) +static void wlc_lcnphy_tssi_setup(struct brcms_phy *pi) { - phytbl_info_t tab; + struct phytbl_info tab; u32 rfseq, ind; tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL; @@ -1571,10 +1557,10 @@ static void wlc_lcnphy_tssi_setup(phy_info_t *pi) wlc_lcnphy_pwrctrl_rssiparams(pi); } -void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi) +void wlc_lcnphy_tx_pwr_update_npt(struct brcms_phy *pi) { u16 tx_cnt, tx_total, npt; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; tx_total = wlc_lcnphy_total_tx_frames(pi); tx_cnt = tx_total - pi_lcn->lcnphy_tssi_tx_cnt; @@ -1601,9 +1587,9 @@ s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1) return p; } -static void wlc_lcnphy_txpower_reset_npt(phy_info_t *pi) +static void wlc_lcnphy_txpower_reset_npt(struct brcms_phy *pi) { - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) return; @@ -1611,18 +1597,18 @@ static void wlc_lcnphy_txpower_reset_npt(phy_info_t *pi) pi_lcn->lcnphy_tssi_npt = LCNPHY_TX_PWR_CTRL_START_NPT; } -void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi) +void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi) { - phytbl_info_t tab; - u32 rate_table[WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM + - WLC_NUM_RATES_MCS_1_STREAM]; + struct phytbl_info tab; + u32 rate_table[BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM + + BRCMS_NUM_RATES_MCS_1_STREAM]; uint i, j; if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) return; for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) { - if (i == WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM) + if (i == BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM) j = TXP_FIRST_MCS_20_SISO; rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j])); @@ -1642,13 +1628,13 @@ void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi) } } -static void wlc_lcnphy_set_tx_pwr_soft_ctrl(phy_info_t *pi, s8 index) +static void wlc_lcnphy_set_tx_pwr_soft_ctrl(struct brcms_phy *pi, s8 index) { u32 cck_offset[4] = { 22, 22, 22, 22 }; u32 ofdm_offset, reg_offset_cck; int i; u16 index2; - phytbl_info_t tab; + struct phytbl_info tab; if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) return; @@ -1695,13 +1681,13 @@ static void wlc_lcnphy_set_tx_pwr_soft_ctrl(phy_info_t *pi, s8 index) } -static s8 wlc_lcnphy_tempcompensated_txpwrctrl(phy_info_t *pi) +static s8 wlc_lcnphy_tempcompensated_txpwrctrl(struct brcms_phy *pi) { s8 index, delta_brd, delta_temp, new_index, tempcorrx; s16 manp, meas_temp, temp_diff; bool neg = 0; u16 temp; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) return pi_lcn->lcnphy_current_index; @@ -1760,7 +1746,7 @@ static s8 wlc_lcnphy_tempcompensated_txpwrctrl(phy_info_t *pi) return new_index; } -static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(phy_info_t *pi, u16 mode) +static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(struct brcms_phy *pi, u16 mode) { u16 current_mode = mode; @@ -1773,11 +1759,11 @@ static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(phy_info_t *pi, u16 mode) return current_mode; } -void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode) +void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode) { u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi); s8 index; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode); old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode); @@ -1824,7 +1810,7 @@ void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode) } } -static bool wlc_lcnphy_iqcal_wait(phy_info_t *pi) +static bool wlc_lcnphy_iqcal_wait(struct brcms_phy *pi) { uint delay_count = 0; @@ -1840,12 +1826,12 @@ static bool wlc_lcnphy_iqcal_wait(phy_info_t *pi) } static void -wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi, - lcnphy_txgains_t *target_gains, - lcnphy_cal_mode_t cal_mode, bool keep_tone) +wlc_lcnphy_tx_iqlo_cal(struct brcms_phy *pi, + struct lcnphy_txgains *target_gains, + enum lcnphy_cal_mode cal_mode, bool keep_tone) { - lcnphy_txgains_t cal_gains, temp_gains; + struct lcnphy_txgains cal_gains, temp_gains; u16 hash; u8 band_idx; int j; @@ -1871,10 +1857,10 @@ wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi, u16 tx_pwr_ctrl_old, save_txpwrctrlrfctrl2; u16 save_sslpnCalibClkEnCtrl, save_sslpnRxFeClkEnCtrl; bool tx_gain_override_old; - lcnphy_txgains_t old_gains; + struct lcnphy_txgains old_gains; uint i, n_cal_cmds = 0, n_cal_start = 0; u16 *values_to_save; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (NORADIO_ENAB(pi->pubpi)) return; @@ -2075,11 +2061,11 @@ wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi, } -static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi) +static void wlc_lcnphy_idle_tssi_est(struct brcms_phy_pub *ppi) { bool suspend, tx_gain_override_old; - lcnphy_txgains_t old_gains; - phy_info_t *pi = (phy_info_t *) ppi; + struct lcnphy_txgains old_gains; + struct brcms_phy *pi = (struct brcms_phy *) ppi; u16 idleTssi, idleTssi0_2C, idleTssi0_OB, idleTssi0_regvalue_OB, idleTssi0_regvalue_2C; u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); @@ -2091,7 +2077,7 @@ static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi) idleTssi = read_phy_reg(pi, 0x4ab); suspend = (0 == - (R_REG(&((phy_info_t *) pi)->regs->maccontrol) & + (R_REG(&((struct brcms_phy *) pi)->regs->maccontrol) & MCTL_EN_MAC)); if (!suspend) wlapi_suspend_mac_and_wait(pi->sh->physhim); @@ -2141,20 +2127,20 @@ static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi) wlapi_enable_mac(pi->sh->physhim); } -static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode) +static void wlc_lcnphy_vbat_temp_sense_setup(struct brcms_phy *pi, u8 mode) { bool suspend; u16 save_txpwrCtrlEn; u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain; u16 auxpga_vmid; - phytbl_info_t tab; + struct phytbl_info tab; u32 val; u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025, save_reg112; u16 values_to_save[14]; s8 index; int i; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; udelay(999); save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007); @@ -2283,15 +2269,15 @@ static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode) udelay(999); } -void WLBANDINITFN(wlc_lcnphy_tx_pwr_ctrl_init) (wlc_phy_t *ppi) +static void wlc_lcnphy_tx_pwr_ctrl_init(struct brcms_phy_pub *ppi) { - lcnphy_txgains_t tx_gains; + struct lcnphy_txgains tx_gains; u8 bbmult; - phytbl_info_t tab; + struct phytbl_info tab; s32 a1, b0, b1; s32 tssi, pwr, maxtargetpwr, mintargetpwr; bool suspend; - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; suspend = (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); @@ -2361,10 +2347,10 @@ void WLBANDINITFN(wlc_lcnphy_tx_pwr_ctrl_init) (wlc_phy_t *ppi) wlapi_enable_mac(pi->sh->physhim); } -static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi) +static u8 wlc_lcnphy_get_bbmult(struct brcms_phy *pi) { u16 m0m1; - phytbl_info_t tab; + struct phytbl_info tab; tab.tbl_ptr = &m0m1; tab.tbl_len = 1; @@ -2376,7 +2362,7 @@ static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi) return (u8) ((m0m1 & 0xff00) >> 8); } -static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain) +static void wlc_lcnphy_set_pa_gain(struct brcms_phy *pi, u16 gain) { mod_phy_reg(pi, 0x4fb, LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK, @@ -2387,7 +2373,7 @@ static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain) } void -wlc_lcnphy_get_radio_loft(phy_info_t *pi, +wlc_lcnphy_get_radio_loft(struct brcms_phy *pi, u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0) { *ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089)); @@ -2396,7 +2382,8 @@ wlc_lcnphy_get_radio_loft(phy_info_t *pi, *fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C)); } -static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains) +static void +wlc_lcnphy_get_tx_gain(struct brcms_phy *pi, struct lcnphy_txgains *gains) { u16 dac_gain; @@ -2415,9 +2402,9 @@ static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains) } } -void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b) +void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b) { - phytbl_info_t tab; + struct phytbl_info tab; u16 iqcc[2]; iqcc[0] = a; @@ -2431,9 +2418,9 @@ void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b) wlc_lcnphy_write_table(pi, &tab); } -void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq) +void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq) { - phytbl_info_t tab; + struct phytbl_info tab; tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL; tab.tbl_width = 16; @@ -2443,14 +2430,14 @@ void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq) wlc_lcnphy_write_table(pi, &tab); } -void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index) +void wlc_lcnphy_set_tx_pwr_by_index(struct brcms_phy *pi, int index) { - phytbl_info_t tab; + struct phytbl_info tab; u16 a, b; u8 bb_mult; u32 bbmultiqcomp, txgain, locoeffs, rfpower; - lcnphy_txgains_t gains; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct lcnphy_txgains gains; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; pi_lcn->lcnphy_tx_power_idx_override = (s8) index; pi_lcn->lcnphy_current_index = (u8) index; @@ -2502,7 +2489,7 @@ void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index) } } -static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx) +static void wlc_lcnphy_set_trsw_override(struct brcms_phy *pi, bool tx, bool rx) { mod_phy_reg(pi, 0x44d, @@ -2512,10 +2499,10 @@ static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx) or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0)); } -static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi) +static void wlc_lcnphy_clear_papd_comptable(struct brcms_phy *pi) { u32 j; - phytbl_info_t tab; + struct phytbl_info tab; u32 temp_offset[128]; tab.tbl_ptr = temp_offset; tab.tbl_len = 128; @@ -2532,7 +2519,7 @@ static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi) } static void -wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, +wlc_lcnphy_set_rx_gain_by_distribution(struct brcms_phy *pi, u16 trsw, u16 ext_lna, u16 biq2, @@ -2566,7 +2553,8 @@ wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi, } -static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable) +static void +wlc_lcnphy_rx_gain_override_enable(struct brcms_phy *pi, bool enable) { u16 ebit = enable ? 1 : 0; @@ -2591,7 +2579,7 @@ static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable) } } -void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable) +void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable) { if (!bEnable) { @@ -2669,7 +2657,7 @@ void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable) } static void -wlc_lcnphy_run_samples(phy_info_t *pi, +wlc_lcnphy_run_samples(struct brcms_phy *pi, u16 num_samps, u16 num_loops, u16 wait, bool iqcalmode) { @@ -2695,7 +2683,7 @@ wlc_lcnphy_run_samples(phy_info_t *pi, or_radio_reg(pi, RADIO_2064_REG112, 0x6); } -void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode) +void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode) { u8 phybw40; @@ -2720,7 +2708,7 @@ void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode) } void -wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val, +wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz, u16 max_val, bool iqcalmode) { u8 phy_bw; @@ -2730,8 +2718,8 @@ wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val, cs32 tone_samp; u32 data_buf[64]; u16 i_samp, q_samp; - phytbl_info_t tab; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct phytbl_info tab; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; pi->phy_tx_tone_freq = f_kHz; @@ -2783,10 +2771,10 @@ wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val, wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode); } -void wlc_lcnphy_stop_tx_tone(phy_info_t *pi) +void wlc_lcnphy_stop_tx_tone(struct brcms_phy *pi) { s16 playback_status; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; pi->phy_tx_tone_freq = 0; if (pi_lcn->lcnphy_spurmod) { @@ -2814,16 +2802,16 @@ void wlc_lcnphy_stop_tx_tone(phy_info_t *pi) wlc_lcnphy_deaf_mode(pi, false); } -static void wlc_lcnphy_clear_trsw_override(phy_info_t *pi) +static void wlc_lcnphy_clear_trsw_override(struct brcms_phy *pi) { and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0))); } -void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b) +void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b) { u16 iqcc[2]; - phytbl_info_t tab; + struct phytbl_info tab; tab.tbl_ptr = iqcc; tab.tbl_len = 2; @@ -2836,9 +2824,9 @@ void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b) *b = iqcc[1]; } -u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi) +u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi) { - phytbl_info_t tab; + struct phytbl_info tab; u16 didq; tab.tbl_id = 0; @@ -2851,18 +2839,18 @@ u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi) return didq; } -static void wlc_lcnphy_txpwrtbl_iqlo_cal(phy_info_t *pi) +static void wlc_lcnphy_txpwrtbl_iqlo_cal(struct brcms_phy *pi) { - lcnphy_txgains_t target_gains, old_gains; + struct lcnphy_txgains target_gains, old_gains; u8 save_bb_mult; u16 a, b, didq, save_pa_gain = 0; uint idx, SAVE_txpwrindex = 0xFF; u32 val; u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - phytbl_info_t tab; + struct phytbl_info tab; u8 ei0, eq0, fi0, fq0; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; wlc_lcnphy_get_tx_gain(pi, &old_gains); save_pa_gain = wlc_lcnphy_get_pa_gain(pi); @@ -2965,7 +2953,7 @@ static void wlc_lcnphy_txpwrtbl_iqlo_cal(phy_info_t *pi) wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex); } -s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode) +s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode) { u16 tempsenseval1, tempsenseval2; s16 avg = 0; @@ -3010,13 +2998,13 @@ s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode) return avg; } -u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode) +u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode) { u16 tempsenseval1, tempsenseval2; s32 avg = 0; bool suspend = 0; u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (NORADIO_ENAB(pi->pubpi)) return -1; @@ -3071,7 +3059,7 @@ u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode) return (u16) avg; } -s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode) +s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode) { s32 degree = wlc_lcnphy_tempsense_new(pi, mode); degree = @@ -3080,7 +3068,7 @@ s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode) return (s8) degree; } -s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode) +s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode) { u16 vbatsenseval; s32 avg = 0; @@ -3116,7 +3104,7 @@ s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode) return (s8) avg; } -static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode) +static void wlc_lcnphy_afe_clk_init(struct brcms_phy *pi, u8 mode) { u8 phybw40; phybw40 = CHSPEC_IS40(pi->radio_chanspec); @@ -3131,9 +3119,9 @@ static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode) } static bool -wlc_lcnphy_rx_iq_est(phy_info_t *pi, +wlc_lcnphy_rx_iq_est(struct brcms_phy *pi, u16 num_samps, - u8 wait_time, lcnphy_iq_est_t *iq_est) + u8 wait_time, struct lcnphy_iq_est *iq_est) { int wait_count = 0; bool result = true; @@ -3177,17 +3165,17 @@ wlc_lcnphy_rx_iq_est(phy_info_t *pi, return result; } -static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps) +static bool wlc_lcnphy_calc_rx_iq_comp(struct brcms_phy *pi, u16 num_samps) { #define LCNPHY_MIN_RXIQ_PWR 2 bool result; u16 a0_new, b0_new; - lcnphy_iq_est_t iq_est = { 0, 0, 0 }; + struct lcnphy_iq_est iq_est = { 0, 0, 0 }; s32 a, b, temp; s16 iq_nbits, qq_nbits, arsh, brsh; s32 iq; u32 ii, qq; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0); b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0); @@ -3263,11 +3251,12 @@ static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps) } static bool -wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp, +wlc_lcnphy_rx_iq_cal(struct brcms_phy *pi, + const struct lcnphy_rx_iqcomp *iqcomp, int iqcomp_sz, bool tx_switch, bool rx_switch, int module, int tx_gain_idx) { - lcnphy_txgains_t old_gains; + struct lcnphy_txgains old_gains; u16 tx_pwr_ctrl; u8 tx_gain_index_old = 0; bool result = false, tx_gain_override_old = false; @@ -3280,7 +3269,7 @@ wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp, u16 old_sslpnCalibClkEnCtrl, old_sslpnRxFeClkEnCtrl; u16 values_to_save[11]; s16 *ptr; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC); if (NULL == ptr) { @@ -3431,18 +3420,18 @@ wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp, return result; } -static void wlc_lcnphy_temp_adj(phy_info_t *pi) +static void wlc_lcnphy_temp_adj(struct brcms_phy *pi) { if (NORADIO_ENAB(pi->pubpi)) return; } -static void wlc_lcnphy_glacial_timer_based_cal(phy_info_t *pi) +static void wlc_lcnphy_glacial_timer_based_cal(struct brcms_phy *pi) { bool suspend; s8 index; u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; suspend = (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC)); if (!suspend) @@ -3462,17 +3451,17 @@ static void wlc_lcnphy_glacial_timer_based_cal(phy_info_t *pi) } -static void wlc_lcnphy_periodic_cal(phy_info_t *pi) +static void wlc_lcnphy_periodic_cal(struct brcms_phy *pi) { bool suspend, full_cal; - const lcnphy_rx_iqcomp_t *rx_iqcomp; + const struct lcnphy_rx_iqcomp *rx_iqcomp; int rx_iqcomp_sz; u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); s8 index; - phytbl_info_t tab; + struct phytbl_info tab; s32 a1, b0, b1; s32 tssi, pwr, maxtargetpwr, mintargetpwr; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (NORADIO_ENAB(pi->pubpi)) return; @@ -3506,7 +3495,7 @@ static void wlc_lcnphy_periodic_cal(phy_info_t *pi) if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) { - wlc_lcnphy_idle_tssi_est((wlc_phy_t *) pi); + wlc_lcnphy_idle_tssi_est((struct brcms_phy_pub *) pi); b0 = pi->txpa_2g[0]; b1 = pi->txpa_2g[1]; @@ -3534,11 +3523,11 @@ static void wlc_lcnphy_periodic_cal(phy_info_t *pi) wlapi_enable_mac(pi->sh->physhim); } -void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode) +void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode) { u16 temp_new; int temp1, temp2, temp_diff; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; switch (mode) { case PHY_PERICAL_CHAN: @@ -3568,12 +3557,13 @@ void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode) break; case LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL: if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) - wlc_lcnphy_tx_power_adjustment((wlc_phy_t *) pi); + wlc_lcnphy_tx_power_adjustment( + (struct brcms_phy_pub *) pi); break; } } -void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, s8 *cck_pwr) +void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr, s8 *cck_pwr) { s8 cck_offset; u16 status; @@ -3595,16 +3585,17 @@ void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, s8 *cck_pwr) } } -void WLBANDINITFN(wlc_phy_cal_init_lcnphy) (phy_info_t *pi) +void wlc_phy_cal_init_lcnphy(struct brcms_phy *pi) { return; } -static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec) +static void +wlc_lcnphy_set_chanspec_tweaks(struct brcms_phy *pi, chanspec_t chanspec) { u8 channel = CHSPEC_CHANNEL(chanspec); - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (NORADIO_ENAB(pi->pubpi)) return; @@ -3653,12 +3644,12 @@ static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec) write_phy_reg(pi, 0x44a, 0x80); } -void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi) +void wlc_lcnphy_tx_power_adjustment(struct brcms_phy_pub *ppi) { s8 index; u16 index2; - phy_info_t *pi = (phy_info_t *) ppi; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy *pi = (struct brcms_phy *) ppi; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi); if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && SAVE_txpwrctrl) { index = wlc_lcnphy_tempcompensated_txpwrctrl(pi); @@ -3670,7 +3661,7 @@ void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi) } } -static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b) +static void wlc_lcnphy_set_rx_iq_comp(struct brcms_phy *pi, u16 a, u16 b) { mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0); @@ -3686,10 +3677,10 @@ static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b) } -void WLBANDINITFN(wlc_phy_init_lcnphy) (phy_info_t *pi) +void wlc_phy_init_lcnphy(struct brcms_phy *pi) { u8 phybw40; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; phybw40 = CHSPEC_IS40(pi->radio_chanspec); pi_lcn->lcnphy_cal_counter = 0; @@ -3709,9 +3700,9 @@ void WLBANDINITFN(wlc_phy_init_lcnphy) (phy_info_t *pi) wlc_lcnphy_radio_init(pi); if (CHSPEC_IS2G(pi->radio_chanspec)) - wlc_lcnphy_tx_pwr_ctrl_init((wlc_phy_t *) pi); + wlc_lcnphy_tx_pwr_ctrl_init((struct brcms_phy_pub *) pi); - wlc_phy_chanspec_set((wlc_phy_t *) pi, pi->radio_chanspec); + wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); si_pmu_regcontrol(pi->sh->sih, 0, 0xf, 0x9); @@ -3736,7 +3727,7 @@ void WLBANDINITFN(wlc_phy_init_lcnphy) (phy_info_t *pi) } static void -wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, u16 *values_to_save) +wlc_lcnphy_tx_iqlo_loopback(struct brcms_phy *pi, u16 *values_to_save) { u16 vmid; int i; @@ -3829,14 +3820,14 @@ wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, u16 *values_to_save) } static void -wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, u16 thresh, +wlc_lcnphy_samp_cap(struct brcms_phy *pi, int clip_detect_algo, u16 thresh, s16 *ptr, int mode) { u32 curval1, curval2, stpptr, curptr, strptr, val; u16 sslpnCalibClkEnCtrl, timer; u16 old_sslpnCalibClkEnCtrl; s16 imag, real; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; timer = 0; old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da); @@ -3905,9 +3896,9 @@ wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, u16 thresh, W_REG(&pi->regs->psm_corectlsts, curval1); } -static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi) +static void wlc_lcnphy_tx_iqlo_soft_cal_full(struct brcms_phy *pi) { - lcnphy_unsign16_struct iqcc0, locc2, locc3, locc4; + struct lcnphy_unsign16_struct iqcc0, locc2, locc3, locc4; wlc_lcnphy_set_cc(pi, 0, 0, 0); wlc_lcnphy_set_cc(pi, 2, 0, 0); @@ -3928,7 +3919,7 @@ static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi) } static void -wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, s16 coeff_y) +wlc_lcnphy_set_cc(struct brcms_phy *pi, int cal_type, s16 coeff_x, s16 coeff_y) { u16 di0dq0; u16 x, y, data_rf; @@ -3972,11 +3963,12 @@ wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, s16 coeff_y) } } -static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type) +static struct lcnphy_unsign16_struct +wlc_lcnphy_get_cc(struct brcms_phy *pi, int cal_type) { u16 a, b, didq; u8 di0, dq0, ei, eq, fi, fq; - lcnphy_unsign16_struct cc; + struct lcnphy_unsign16_struct cc; cc.re = 0; cc.im = 0; switch (cal_type) { @@ -4007,11 +3999,12 @@ static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type) } static void -wlc_lcnphy_a1(phy_info_t *pi, int cal_type, int num_levels, int step_size_lg2) +wlc_lcnphy_a1(struct brcms_phy *pi, int cal_type, int num_levels, + int step_size_lg2) { - const lcnphy_spb_tone_t *phy_c1; - lcnphy_spb_tone_t phy_c2; - lcnphy_unsign16_struct phy_c3; + const struct lcnphy_spb_tone *phy_c1; + struct lcnphy_spb_tone phy_c2; + struct lcnphy_unsign16_struct phy_c3; int phy_c4, phy_c5, k, l, j, phy_c6; u16 phy_c7, phy_c8, phy_c9; s16 phy_c10, phy_c11, phy_c12, phy_c13, phy_c14, phy_c15, phy_c16; @@ -4205,7 +4198,7 @@ wlc_lcnphy_a1(phy_info_t *pi, int cal_type, int num_levels, int step_size_lg2) } static void -wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, u16 *values_to_save) +wlc_lcnphy_tx_iqlo_loopback_cleanup(struct brcms_phy *pi, u16 *values_to_save) { int i; @@ -4220,11 +4213,10 @@ wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, u16 *values_to_save) } static void -WLBANDINITFN(wlc_lcnphy_load_tx_gain_table) (phy_info_t *pi, - const lcnphy_tx_gain_tbl_entry * - gain_table) { +wlc_lcnphy_load_tx_gain_table(struct brcms_phy *pi, + const struct lcnphy_tx_gain_tbl_entry *gain_table) { u32 j; - phytbl_info_t tab; + struct phytbl_info tab; u32 val; u16 pa_gain; u16 gm_gain; @@ -4256,9 +4248,9 @@ WLBANDINITFN(wlc_lcnphy_load_tx_gain_table) (phy_info_t *pi, } } -static void wlc_lcnphy_load_rfpower(phy_info_t *pi) +static void wlc_lcnphy_load_rfpower(struct brcms_phy *pi) { - phytbl_info_t tab; + struct phytbl_info tab; u32 val, bbmult, rfgain; u8 index; u8 scale_factor = 1; @@ -4305,11 +4297,11 @@ static void wlc_lcnphy_load_rfpower(phy_info_t *pi) } } -static void WLBANDINITFN(wlc_lcnphy_tbl_init) (phy_info_t *pi) +static void wlc_lcnphy_tbl_init(struct brcms_phy *pi) { uint idx; u8 phybw40; - phytbl_info_t tab; + struct phytbl_info tab; u32 val; phybw40 = CHSPEC_IS40(pi->radio_chanspec); @@ -4400,10 +4392,10 @@ static void WLBANDINITFN(wlc_lcnphy_tbl_init) (phy_info_t *pi) wlc_lcnphy_clear_papd_comptable(pi); } -static void WLBANDINITFN(wlc_lcnphy_rev0_baseband_init) (phy_info_t *pi) +static void wlc_lcnphy_rev0_baseband_init(struct brcms_phy *pi) { u16 afectrl1; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; write_radio_reg(pi, RADIO_2064_REG11C, 0x0); @@ -4447,7 +4439,7 @@ static void WLBANDINITFN(wlc_lcnphy_rev0_baseband_init) (phy_info_t *pi) } -static void WLBANDINITFN(wlc_lcnphy_rev2_baseband_init) (phy_info_t *pi) +static void wlc_lcnphy_rev2_baseband_init(struct brcms_phy *pi) { if (CHSPEC_IS5G(pi->radio_chanspec)) { mod_phy_reg(pi, 0x416, (0xff << 0), 80 << 0); @@ -4456,12 +4448,12 @@ static void WLBANDINITFN(wlc_lcnphy_rev2_baseband_init) (phy_info_t *pi) } } -static void wlc_lcnphy_agc_temp_init(phy_info_t *pi) +static void wlc_lcnphy_agc_temp_init(struct brcms_phy *pi) { s16 temp; - phytbl_info_t tab; + struct phytbl_info tab; u32 tableBuffer[2]; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (NORADIO_ENAB(pi->pubpi)) return; @@ -4517,7 +4509,7 @@ static void wlc_lcnphy_agc_temp_init(phy_info_t *pi) } -static void WLBANDINITFN(wlc_lcnphy_bu_tweaks) (phy_info_t *pi) +static void wlc_lcnphy_bu_tweaks(struct brcms_phy *pi) { if (NORADIO_ENAB(pi->pubpi)) return; @@ -4572,7 +4564,7 @@ static void WLBANDINITFN(wlc_lcnphy_bu_tweaks) (phy_info_t *pi) } } -static void WLBANDINITFN(wlc_lcnphy_baseband_init) (phy_info_t *pi) +static void wlc_lcnphy_baseband_init(struct brcms_phy *pi) { wlc_lcnphy_tbl_init(pi); @@ -4582,10 +4574,10 @@ static void WLBANDINITFN(wlc_lcnphy_baseband_init) (phy_info_t *pi) wlc_lcnphy_bu_tweaks(pi); } -static void WLBANDINITFN(wlc_radio_2064_init) (phy_info_t *pi) +static void wlc_radio_2064_init(struct brcms_phy *pi) { u32 i; - lcnphy_radio_regs_t *lcnphyregs = NULL; + struct lcnphy_radio_regs *lcnphyregs = NULL; lcnphyregs = lcnphy_radio_regs_2064; @@ -4643,7 +4635,7 @@ static void WLBANDINITFN(wlc_radio_2064_init) (phy_info_t *pi) wlc_lcnphy_rc_cal(pi); } -static void WLBANDINITFN(wlc_lcnphy_radio_init) (phy_info_t *pi) +static void wlc_lcnphy_radio_init(struct brcms_phy *pi) { if (NORADIO_ENAB(pi->pubpi)) return; @@ -4651,7 +4643,7 @@ static void WLBANDINITFN(wlc_lcnphy_radio_init) (phy_info_t *pi) wlc_radio_2064_init(pi); } -static void wlc_lcnphy_rcal(phy_info_t *pi) +static void wlc_lcnphy_rcal(struct brcms_phy *pi) { u8 rcal_value; @@ -4682,7 +4674,7 @@ static void wlc_lcnphy_rcal(phy_info_t *pi) and_radio_reg(pi, RADIO_2064_REG057, 0xFE); } -static void wlc_lcnphy_rc_cal(phy_info_t *pi) +static void wlc_lcnphy_rc_cal(struct brcms_phy *pi) { u8 dflt_rc_cal_val; u16 flt_val; @@ -4705,11 +4697,11 @@ static void wlc_lcnphy_rc_cal(phy_info_t *pi) return; } -static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi) +static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi) { s8 txpwr = 0; int i; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; if (CHSPEC_IS2G(pi->radio_chanspec)) { u16 cckpo = 0; @@ -4811,7 +4803,7 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi) pi_lcn->lcnphy_freqoffset_corr = (u8) PHY_GETINTVAR(pi, "freqoffset_corr"); if ((u8) getintvar(pi->vars, "aa2g") > 1) - wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi, + wlc_phy_ant_rxdiv_set((struct brcms_phy_pub *) pi, (u8) getintvar(pi->vars, "aa2g")); } @@ -4827,7 +4819,7 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi) return true; } -void wlc_2064_vco_cal(phy_info_t *pi) +void wlc_2064_vco_cal(struct brcms_phy *pi) { u8 calnrst; @@ -4843,10 +4835,10 @@ void wlc_2064_vco_cal(phy_info_t *pi) } static void -wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, u8 channel) +wlc_lcnphy_radio_2064_channel_tune_4313(struct brcms_phy *pi, u8 channel) { uint i; - const chan_info_2064_lcnphy_t *ci; + const struct chan_info_2064_lcnphy *ci; u8 rfpll_doubler = 0; u8 pll_pwrup, pll_pwrup_ovr; fixed qFxtal, qFref, qFvco, qFcal; @@ -5008,7 +5000,7 @@ wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, u8 channel) } } -bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi) +bool wlc_phy_tpc_isenabled_lcnphy(struct brcms_phy *pi) { if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) return 0; @@ -5017,7 +5009,7 @@ bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi) wlc_lcnphy_get_tx_pwr_ctrl((pi))); } -void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi) +void wlc_phy_txpower_recalc_target_lcnphy(struct brcms_phy *pi) { u16 pwr_ctrl; if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) { @@ -5033,16 +5025,16 @@ void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi) return; } -void wlc_phy_detach_lcnphy(phy_info_t *pi) +void wlc_phy_detach_lcnphy(struct brcms_phy *pi) { kfree(pi->u.pi_lcnphy); } -bool wlc_phy_attach_lcnphy(phy_info_t *pi) +bool wlc_phy_attach_lcnphy(struct brcms_phy *pi) { - phy_info_lcnphy_t *pi_lcn; + struct brcms_phy_lcnphy *pi_lcn; - pi->u.pi_lcnphy = kzalloc(sizeof(phy_info_lcnphy_t), GFP_ATOMIC); + pi->u.pi_lcnphy = kzalloc(sizeof(struct brcms_phy_lcnphy), GFP_ATOMIC); if (pi->u.pi_lcnphy == NULL) { return false; } @@ -5085,7 +5077,7 @@ bool wlc_phy_attach_lcnphy(phy_info_t *pi) return true; } -static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain) +static void wlc_lcnphy_set_rx_gain(struct brcms_phy *pi, u32 gain) { u16 trsw, ext_lna, lna1, lna2, tia, biq0, biq1, gain0_15, gain16_19; @@ -5115,12 +5107,12 @@ static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain) wlc_lcnphy_rx_gain_override_enable(pi, true); } -static u32 wlc_lcnphy_get_receive_power(phy_info_t *pi, s32 *gain_index) +static u32 wlc_lcnphy_get_receive_power(struct brcms_phy *pi, s32 *gain_index) { u32 received_power = 0; s32 max_index = 0; u32 gain_code = 0; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; max_index = 36; if (*gain_index >= 0) @@ -5151,7 +5143,7 @@ static u32 wlc_lcnphy_get_receive_power(phy_info_t *pi, s32 *gain_index) return received_power; } -s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index) +s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index) { s32 gain = 0; s32 nominal_power_db; @@ -5159,7 +5151,7 @@ s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index) input_power_db; s32 received_power, temperature; uint freq; - phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy; + struct brcms_phy_lcnphy *pi_lcn = pi->u.pi_lcnphy; received_power = wlc_lcnphy_get_receive_power(pi, &gain_index); @@ -5223,7 +5215,7 @@ s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index) } static int -wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm, s16 filt_type) +wlc_lcnphy_load_tx_iir_filter(struct brcms_phy *pi, bool is_ofdm, s16 filt_type) { s16 filt_index = -1; int j; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.h index b7bfc7230df..f4a8ab09da4 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_lcn.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_lcn.h @@ -14,10 +14,12 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_phy_lcn_h_ -#define _wlc_phy_lcn_h_ +#ifndef _BRCM_PHY_LCN_H_ +#define _BRCM_PHY_LCN_H_ -struct phy_info_lcnphy { +#include <types.h> + +struct brcms_phy_lcnphy { int lcnphy_txrf_sp_9_override; u8 lcnphy_full_cal_channel; u8 lcnphy_cal_counter; @@ -98,7 +100,7 @@ struct phy_info_lcnphy { u16 lcnphy_extstxctrl1; s16 lcnphy_cck_dig_filt_type; s16 lcnphy_ofdm_dig_filt_type; - lcnphy_cal_results_t lcnphy_cal_results; + struct lcnphy_cal_results lcnphy_cal_results; u8 lcnphy_psat_pwr; u8 lcnphy_psat_indx; @@ -116,4 +118,4 @@ struct phy_info_lcnphy { uint lcnphy_aci_start_time; s8 lcnphy_tx_power_offset[TXP_NUM_RATES]; }; -#endif /* _wlc_phy_lcn_h_ */ +#endif /* _BRCM_PHY_LCN_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c index 71275094e81..f8e41923942 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_n.c @@ -14,23 +14,19 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> -#include <linux/string.h> -#include <bcmdefs.h> -#include <wlc_cfg.h> #include <linux/delay.h> -#include <linux/pci.h> -#include <aiutils.h> -#include <sbchipc.h> -#include <wlc_pmu.h> - -#include <bcmdevs.h> -#include <sbhnddma.h> -#include <wlc_phy_radio.h> -#include <wlc_phy_int.h> -#include <wlc_phyreg_n.h> -#include <wlc_phytbl_n.h> +#include <brcm_hw_ids.h> +#include <aiutils.h> +#include <chipcommon.h> +#include <pmu.h> +#include <d11.h> +#include <phy_shim.h> +#include "phy_int.h" +#include "phy_hal.h" +#include "phy_radio.h" +#include "phyreg_n.h" +#include "phytbl_n.h" #define READ_RADIO_REG2(pi, radio_type, jspace, core, reg_name) \ read_radio_reg(pi, radio_type##_##jspace##_##reg_name | \ @@ -141,7 +137,11 @@ #define NPHY_ADJUSTED_MINCRSPOWER 0x1e -typedef struct _nphy_iqcal_params { +/* 5357 Chip specific ChipControl register bits */ +#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ +#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ + +struct nphy_iqcal_params { u16 txlpf; u16 txgm; u16 pga; @@ -149,20 +149,20 @@ typedef struct _nphy_iqcal_params { u16 ipa; u16 cal_gain; u16 ncorr[5]; -} nphy_iqcal_params_t; +}; -typedef struct _nphy_txiqcal_ladder { +struct nphy_txiqcal_ladder { u8 percent; u8 g_env; -} nphy_txiqcal_ladder_t; +}; -typedef struct { - nphy_txgains_t gains; +struct nphy_ipa_txcalgains { + struct nphy_txgains gains; bool useindex; u8 index; -} nphy_ipa_txcalgains_t; +}; -typedef struct nphy_papd_restore_state_t { +struct nphy_papd_restore_state { u16 fbmix[2]; u16 vga_master[2]; u16 intpa_master[2]; @@ -171,20 +171,20 @@ typedef struct nphy_papd_restore_state_t { u16 pwrup[2]; u16 atten[2]; u16 mm; -} nphy_papd_restore_state; +}; -typedef struct _nphy_ipa_txrxgain { +struct nphy_ipa_txrxgain { u16 hpvga; u16 lpf_biq1; u16 lpf_biq0; u16 lna2; u16 lna1; s8 txpwrindex; -} nphy_ipa_txrxgain_t; +}; #define NPHY_IPA_RXCAL_MAXGAININDEX (6 - 1) -nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_5GHz[] = { {0, 0, 0, 0, 0, 100}, +struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz[] = { {0, 0, 0, 0, 0, 100}, {0, 0, 0, 0, 0, 50}, {0, 0, 0, 0, 0, -1}, {0, 0, 0, 3, 0, -1}, @@ -192,7 +192,7 @@ nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_5GHz[] = { {0, 0, 0, 0, 0, 100}, {0, 2, 3, 3, 0, -1} }; -nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_2GHz[] = { {0, 0, 0, 0, 0, 128}, +struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz[] = { {0, 0, 0, 0, 0, 128}, {0, 0, 0, 0, 0, 70}, {0, 0, 0, 0, 0, 20}, {0, 0, 0, 3, 0, 20}, @@ -200,7 +200,8 @@ nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_2GHz[] = { {0, 0, 0, 0, 0, 128}, {0, 2, 3, 3, 0, 20} }; -nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { {0, 0, 0, 0, 0, 100}, +struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { +{0, 0, 0, 0, 0, 100}, {0, 0, 0, 0, 0, 50}, {0, 0, 0, 0, 0, -1}, {0, 0, 0, 3, 0, -1}, @@ -208,7 +209,8 @@ nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_5GHz_rev7[] = { {0, 0, 0, 0, 0, 100}, {0, 0, 5, 3, 0, -1} }; -nphy_ipa_txrxgain_t nphy_ipa_rxcal_gaintbl_2GHz_rev7[] = { {0, 0, 0, 0, 0, 10}, +struct nphy_ipa_txrxgain nphy_ipa_rxcal_gaintbl_2GHz_rev7[] = { +{0, 0, 0, 0, 0, 10}, {0, 0, 0, 1, 0, 10}, {0, 0, 1, 2, 0, 10}, {0, 0, 1, 3, 0, 10}, @@ -255,7 +257,7 @@ u16 NPHY_IPA_REV4_txdigi_filtcoeffs[][NPHY_NUM_DIG_FILT_COEFFS] = { 0x97, 0x12d, 0x97, 0x25a, 0xd10, 0x25a} }; -typedef struct _chan_info_nphy_2055 { +struct chan_info_nphy_2055 { u16 chan; u16 freq; uint unknown; @@ -287,9 +289,9 @@ typedef struct _chan_info_nphy_2055 { u16 PHY_BW4; u16 PHY_BW5; u16 PHY_BW6; -} chan_info_nphy_2055_t; +}; -typedef struct _chan_info_nphy_radio205x { +struct chan_info_nphy_radio205x { u16 chan; u16 freq; u8 RF_SYN_pll_vcocal1; @@ -335,9 +337,9 @@ typedef struct _chan_info_nphy_radio205x { u16 PHY_BW4; u16 PHY_BW5; u16 PHY_BW6; -} chan_info_nphy_radio205x_t; +}; -typedef struct _chan_info_nphy_radio2057 { +struct chan_info_nphy_radio2057 { u16 chan; u16 freq; u8 RF_vcocal_countval0; @@ -374,9 +376,9 @@ typedef struct _chan_info_nphy_radio2057 { u16 PHY_BW4; u16 PHY_BW5; u16 PHY_BW6; -} chan_info_nphy_radio2057_t; +}; -typedef struct _chan_info_nphy_radio2057_rev5 { +struct chan_info_nphy_radio2057_rev5 { u16 chan; u16 freq; u8 RF_vcocal_countval0; @@ -403,18 +405,18 @@ typedef struct _chan_info_nphy_radio2057_rev5 { u16 PHY_BW4; u16 PHY_BW5; u16 PHY_BW6; -} chan_info_nphy_radio2057_rev5_t; +}; -typedef struct nphy_sfo_cfg { +struct nphy_sfo_cfg { u16 PHY_BW1a; u16 PHY_BW2; u16 PHY_BW3; u16 PHY_BW4; u16 PHY_BW5; u16 PHY_BW6; -} nphy_sfo_cfg_t; +}; -static chan_info_nphy_2055_t chan_info_nphy_2055[] = { +static struct chan_info_nphy_2055 chan_info_nphy_2055[] = { { 184, 4920, 3280, 0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x8F, 0xFF, 0x00, 0x0F, @@ -913,7 +915,7 @@ static chan_info_nphy_2055_t chan_info_nphy_2055[] = { 0x01, 0x80, 0x3E6, 0x3E2, 0x3DE, 0x41B, 0x41F, 0x424} }; -static chan_info_nphy_radio205x_t chan_info_nphyrev3_2056[] = { +static struct chan_info_nphy_radio205x chan_info_nphyrev3_2056[] = { { 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x08, 0x00, 0x7f, @@ -1536,7 +1538,7 @@ static chan_info_nphy_radio205x_t chan_info_nphyrev3_2056[] = { 0x0f, 0x00, 0x0d, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio205x_t chan_info_nphyrev4_2056_A1[] = { +static struct chan_info_nphy_radio205x chan_info_nphyrev4_2056_A1[] = { { 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0e, 0x00, 0x7f, @@ -2159,7 +2161,7 @@ static chan_info_nphy_radio205x_t chan_info_nphyrev4_2056_A1[] = { 0x0f, 0x00, 0x0e, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio205x_t chan_info_nphyrev5_2056v5[] = { +static struct chan_info_nphy_radio205x chan_info_nphyrev5_2056v5[] = { { 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, @@ -2782,7 +2784,7 @@ static chan_info_nphy_radio205x_t chan_info_nphyrev5_2056v5[] = { 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v6[] = { +static struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v6[] = { { 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, @@ -3405,7 +3407,7 @@ static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v6[] = { 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio205x_t chan_info_nphyrev5n6_2056v7[] = { +static struct chan_info_nphy_radio205x chan_info_nphyrev5n6_2056v7[] = { { 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xff, 0x00, 0x0b, 0x00, 0x70, @@ -4028,7 +4030,7 @@ static chan_info_nphy_radio205x_t chan_info_nphyrev5n6_2056v7[] = { 0x0d, 0x00, 0x08, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v8[] = { +static struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v8[] = { { 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x04, 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, @@ -4651,7 +4653,7 @@ static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v8[] = { 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v11[] = { +static struct chan_info_nphy_radio205x chan_info_nphyrev6_2056v11[] = { { 184, 4920, 0xff, 0x01, 0x01, 0x01, 0xec, 0x05, 0x05, 0x02, 0x0c, 0x01, 0x00, 0x00, 0x00, 0x8f, 0x0f, 0x00, 0xff, 0xfe, 0x00, 0x09, 0x00, 0x77, @@ -5274,7 +5276,7 @@ static chan_info_nphy_radio205x_t chan_info_nphyrev6_2056v11[] = { 0x09, 0x00, 0x09, 0x03e6, 0x03e2, 0x03de, 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio2057_t chan_info_nphyrev7_2057_rev4[] = { +static struct chan_info_nphy_radio2057 chan_info_nphyrev7_2057_rev4[] = { { 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0x00, 0x0f, 0x0f, 0xf3, 0x00, 0xef, 0x00, @@ -6137,7 +6139,7 @@ static chan_info_nphy_radio2057_t chan_info_nphyrev7_2057_rev4[] = { 0x0424} }; -static chan_info_nphy_radio2057_rev5_t chan_info_nphyrev8_2057_rev5[] = { +static struct chan_info_nphy_radio2057_rev5 chan_info_nphyrev8_2057_rev5[] = { { 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, @@ -6196,7 +6198,7 @@ static chan_info_nphy_radio2057_rev5_t chan_info_nphyrev8_2057_rev5[] = { 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio2057_rev5_t chan_info_nphyrev9_2057_rev5v1[] = { +static struct chan_info_nphy_radio2057_rev5 chan_info_nphyrev9_2057_rev5v1[] = { { 1, 2412, 0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c, 0x09, 0x0d, 0x08, 0x0e, 0x61, 0x03, 0xff, 0x61, 0x03, 0xff, 0x03c9, 0x03c5, 0x03c1, @@ -6255,7 +6257,7 @@ static chan_info_nphy_radio2057_rev5_t chan_info_nphyrev9_2057_rev5v1[] = { 0x041b, 0x041f, 0x0424} }; -static chan_info_nphy_radio2057_t chan_info_nphyrev8_2057_rev7[] = { +static struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev7[] = { { 184, 4920, 0x68, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xec, 0x01, 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, @@ -6996,7 +6998,7 @@ static chan_info_nphy_radio2057_t chan_info_nphyrev8_2057_rev7[] = { 0x0424} }; -static chan_info_nphy_radio2057_t chan_info_nphyrev8_2057_rev8[] = { +static struct chan_info_nphy_radio2057 chan_info_nphyrev8_2057_rev8[] = { { 186, 4930, 0x6b, 0x16, 0x10, 0x0c, 0x0c, 0x0c, 0x30, 0xed, 0x01, 0x0f, 0x00, 0x0f, 0x00, 0xff, 0x00, 0xd3, 0x0f, 0x0f, 0xd3, 0x00, 0xff, 0x00, @@ -7731,7 +7733,7 @@ static chan_info_nphy_radio2057_t chan_info_nphyrev8_2057_rev8[] = { 0x0424} }; -radio_regs_t regs_2055[] = { +struct radio_regs regs_2055[] = { {0x02, 0x80, 0x80, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0x27, 0x27, 0, 0}, @@ -7960,7 +7962,7 @@ radio_regs_t regs_2055[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_SYN_2056[] = { +struct radio_regs regs_SYN_2056[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -8145,7 +8147,7 @@ radio_regs_t regs_SYN_2056[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_TX_2056[] = { +struct radio_regs regs_TX_2056[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -8294,7 +8296,7 @@ radio_regs_t regs_TX_2056[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_RX_2056[] = { +struct radio_regs regs_RX_2056[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -8445,7 +8447,7 @@ radio_regs_t regs_RX_2056[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_SYN_2056_A1[] = { +struct radio_regs regs_SYN_2056_A1[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -8630,7 +8632,7 @@ radio_regs_t regs_SYN_2056_A1[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_TX_2056_A1[] = { +struct radio_regs regs_TX_2056_A1[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -8779,7 +8781,7 @@ radio_regs_t regs_TX_2056_A1[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_RX_2056_A1[] = { +struct radio_regs regs_RX_2056_A1[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -8930,7 +8932,7 @@ radio_regs_t regs_RX_2056_A1[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_SYN_2056_rev5[] = { +struct radio_regs regs_SYN_2056_rev5[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -9115,7 +9117,7 @@ radio_regs_t regs_SYN_2056_rev5[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_TX_2056_rev5[] = { +struct radio_regs regs_TX_2056_rev5[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -9272,7 +9274,7 @@ radio_regs_t regs_TX_2056_rev5[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_RX_2056_rev5[] = { +struct radio_regs regs_RX_2056_rev5[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -9423,7 +9425,7 @@ radio_regs_t regs_RX_2056_rev5[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_SYN_2056_rev6[] = { +struct radio_regs regs_SYN_2056_rev6[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -9608,7 +9610,7 @@ radio_regs_t regs_SYN_2056_rev6[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_TX_2056_rev6[] = { +struct radio_regs regs_TX_2056_rev6[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -9765,7 +9767,7 @@ radio_regs_t regs_TX_2056_rev6[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_RX_2056_rev6[] = { +struct radio_regs regs_RX_2056_rev6[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -9916,7 +9918,7 @@ radio_regs_t regs_RX_2056_rev6[] = { {0xFFFF, 0, 0, 0, 0} }; -radio_regs_t regs_SYN_2056_rev7[] = { +struct radio_regs regs_SYN_2056_rev7[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -10101,7 +10103,7 @@ radio_regs_t regs_SYN_2056_rev7[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_TX_2056_rev7[] = { +struct radio_regs regs_TX_2056_rev7[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -10258,7 +10260,7 @@ radio_regs_t regs_TX_2056_rev7[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_RX_2056_rev7[] = { +struct radio_regs regs_RX_2056_rev7[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -10409,7 +10411,7 @@ radio_regs_t regs_RX_2056_rev7[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_SYN_2056_rev8[] = { +struct radio_regs regs_SYN_2056_rev8[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -10594,7 +10596,7 @@ radio_regs_t regs_SYN_2056_rev8[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_TX_2056_rev8[] = { +struct radio_regs regs_TX_2056_rev8[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -10751,7 +10753,7 @@ radio_regs_t regs_TX_2056_rev8[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_RX_2056_rev8[] = { +struct radio_regs regs_RX_2056_rev8[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -10902,7 +10904,7 @@ radio_regs_t regs_RX_2056_rev8[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_SYN_2056_rev11[] = { +struct radio_regs regs_SYN_2056_rev11[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -11087,7 +11089,7 @@ radio_regs_t regs_SYN_2056_rev11[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_TX_2056_rev11[] = { +struct radio_regs regs_TX_2056_rev11[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -11244,7 +11246,7 @@ radio_regs_t regs_TX_2056_rev11[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_regs_t regs_RX_2056_rev11[] = { +struct radio_regs regs_RX_2056_rev11[] = { {0x02, 0, 0, 0, 0}, {0x03, 0, 0, 0, 0}, {0x04, 0, 0, 0, 0}, @@ -11395,7 +11397,7 @@ radio_regs_t regs_RX_2056_rev11[] = { {0xFFFF, 0, 0, 0, 0}, }; -radio_20xx_regs_t regs_2057_rev4[] = { +struct radio_20xx_regs regs_2057_rev4[] = { {0x00, 0x84, 0}, {0x01, 0, 0}, {0x02, 0x60, 0}, @@ -11785,7 +11787,7 @@ radio_20xx_regs_t regs_2057_rev4[] = { {0xFFFF, 0, 0}, }; -radio_20xx_regs_t regs_2057_rev5[] = { +struct radio_20xx_regs regs_2057_rev5[] = { {0x00, 0, 1}, {0x01, 0x57, 1}, {0x02, 0x20, 1}, @@ -12117,7 +12119,7 @@ radio_20xx_regs_t regs_2057_rev5[] = { {0xFFFF, 0, 0} }; -radio_20xx_regs_t regs_2057_rev5v1[] = { +struct radio_20xx_regs regs_2057_rev5v1[] = { {0x00, 0x15, 1}, {0x01, 0x57, 1}, {0x02, 0x20, 1}, @@ -12449,7 +12451,7 @@ radio_20xx_regs_t regs_2057_rev5v1[] = { {0xFFFF, 0, 0} }; -radio_20xx_regs_t regs_2057_rev7[] = { +struct radio_20xx_regs regs_2057_rev7[] = { {0x00, 0, 1}, {0x01, 0x57, 1}, {0x02, 0x20, 1}, @@ -12865,7 +12867,7 @@ radio_20xx_regs_t regs_2057_rev7[] = { {0xFFFF, 0, 0} }; -radio_20xx_regs_t regs_2057_rev8[] = { +struct radio_20xx_regs regs_2057_rev8[] = { {0x00, 0x8, 1}, {0x01, 0x57, 1}, {0x02, 0x20, 1}, @@ -14083,118 +14085,118 @@ static u8 ant_sw_ctrl_tbl_rev8_2057v7_core0[] = { static u8 ant_sw_ctrl_tbl_rev8_2057v7_core1[] = { 0x09, 0x0a, 0x09, 0x0a, 0x15, 0x16 }; -static bool wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, - chan_info_nphy_radio2057_t **t0, - chan_info_nphy_radio205x_t **t1, - chan_info_nphy_radio2057_rev5_t **t2, - chan_info_nphy_2055_t **t3); -static void wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chans, - const nphy_sfo_cfg_t *c); +static bool wlc_phy_chan2freq_nphy(struct brcms_phy *pi, uint channel, int *f, + struct chan_info_nphy_radio2057 **t0, + struct chan_info_nphy_radio205x **t1, + struct chan_info_nphy_radio2057_rev5 **t2, + struct chan_info_nphy_2055 **t3); +static void wlc_phy_chanspec_nphy_setup(struct brcms_phy *pi, chanspec_t chans, + const struct nphy_sfo_cfg *c); -static void wlc_phy_adjust_rx_analpfbw_nphy(phy_info_t *pi, +static void wlc_phy_adjust_rx_analpfbw_nphy(struct brcms_phy *pi, u16 reduction_factr); -static void wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *, - u32 *buf); -static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr); -static void wlc_phy_txlpfbw_nphy(phy_info_t *pi); -static void wlc_phy_spurwar_nphy(phy_info_t *pi); - -static void wlc_phy_radio_preinit_2055(phy_info_t *pi); -static void wlc_phy_radio_init_2055(phy_info_t *pi); -static void wlc_phy_radio_postinit_2055(phy_info_t *pi); -static void wlc_phy_radio_preinit_205x(phy_info_t *pi); -static void wlc_phy_radio_init_2056(phy_info_t *pi); -static void wlc_phy_radio_postinit_2056(phy_info_t *pi); -static void wlc_phy_radio_init_2057(phy_info_t *pi); -static void wlc_phy_radio_postinit_2057(phy_info_t *pi); -static void wlc_phy_workarounds_nphy(phy_info_t *pi); -static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi); -static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(phy_info_t *pi); -static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(phy_info_t *pi); -static void wlc_phy_adjust_lnagaintbl_nphy(phy_info_t *pi); - -static void wlc_phy_restore_rssical_nphy(phy_info_t *pi); -static void wlc_phy_reapply_txcal_coeffs_nphy(phy_info_t *pi); -static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi); -static int wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t tg, - u8 type, bool d); -static void wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rxcore, +static void wlc_phy_adjust_min_noisevar_nphy(struct brcms_phy *pi, + int ntones, int *, u32 *buf); +static void wlc_phy_adjust_crsminpwr_nphy(struct brcms_phy *pi, u8 minpwr); +static void wlc_phy_txlpfbw_nphy(struct brcms_phy *pi); +static void wlc_phy_spurwar_nphy(struct brcms_phy *pi); + +static void wlc_phy_radio_preinit_2055(struct brcms_phy *pi); +static void wlc_phy_radio_init_2055(struct brcms_phy *pi); +static void wlc_phy_radio_postinit_2055(struct brcms_phy *pi); +static void wlc_phy_radio_preinit_205x(struct brcms_phy *pi); +static void wlc_phy_radio_init_2056(struct brcms_phy *pi); +static void wlc_phy_radio_postinit_2056(struct brcms_phy *pi); +static void wlc_phy_radio_init_2057(struct brcms_phy *pi); +static void wlc_phy_radio_postinit_2057(struct brcms_phy *pi); +static void wlc_phy_workarounds_nphy(struct brcms_phy *pi); +static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi); +static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi); +static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi); +static void wlc_phy_adjust_lnagaintbl_nphy(struct brcms_phy *pi); + +static void wlc_phy_restore_rssical_nphy(struct brcms_phy *pi); +static void wlc_phy_reapply_txcal_coeffs_nphy(struct brcms_phy *pi); +static void wlc_phy_tx_iq_war_nphy(struct brcms_phy *pi); +static int wlc_phy_cal_rxiq_nphy_rev3(struct brcms_phy *pi, + struct nphy_txgains tg, u8 type, bool d); +static void wlc_phy_rxcal_gainctrl_nphy_rev5(struct brcms_phy *pi, u8 rxcore, u16 *rg, u8 type); -static void wlc_phy_update_mimoconfig_nphy(phy_info_t *pi, s32 preamble); -static void wlc_phy_savecal_nphy(phy_info_t *pi); -static void wlc_phy_restorecal_nphy(phy_info_t *pi); -static void wlc_phy_resetcca_nphy(phy_info_t *pi); - -static void wlc_phy_txpwrctrl_config_nphy(phy_info_t *pi); -static void wlc_phy_internal_cal_txgain_nphy(phy_info_t *pi); -static void wlc_phy_precal_txgain_nphy(phy_info_t *pi); -static void wlc_phy_update_txcal_ladder_nphy(phy_info_t *pi, u16 core); - -static void wlc_phy_extpa_set_tx_digi_filts_nphy(phy_info_t *pi); -static void wlc_phy_ipa_set_tx_digi_filts_nphy(phy_info_t *pi); -static void wlc_phy_ipa_restore_tx_digi_filts_nphy(phy_info_t *pi); -static u16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi); -static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1); -static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi); - -static void wlc_phy_a1_nphy(phy_info_t *pi, u8 core, u32 winsz, u32, +static void wlc_phy_update_mimoconfig_nphy(struct brcms_phy *pi, s32 preamble); +static void wlc_phy_savecal_nphy(struct brcms_phy *pi); +static void wlc_phy_restorecal_nphy(struct brcms_phy *pi); +static void wlc_phy_resetcca_nphy(struct brcms_phy *pi); + +static void wlc_phy_txpwrctrl_config_nphy(struct brcms_phy *pi); +static void wlc_phy_internal_cal_txgain_nphy(struct brcms_phy *pi); +static void wlc_phy_precal_txgain_nphy(struct brcms_phy *pi); +static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core); + +static void wlc_phy_extpa_set_tx_digi_filts_nphy(struct brcms_phy *pi); +static void wlc_phy_ipa_set_tx_digi_filts_nphy(struct brcms_phy *pi); +static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi); +static u16 wlc_phy_ipa_get_bbmult_nphy(struct brcms_phy *pi); +static void wlc_phy_ipa_set_bbmult_nphy(struct brcms_phy *pi, u8 m0, u8 m1); +static u32 *wlc_phy_get_ipa_gaintbl_nphy(struct brcms_phy *pi); + +static void wlc_phy_a1_nphy(struct brcms_phy *pi, u8 core, u32 winsz, u32, u32 e); -static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core); -static void wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *, - phy_cal_mode_t, u8); -static void wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, - nphy_papd_restore_state *state); -static void wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, - nphy_papd_restore_state *state, u8); +static u8 wlc_phy_a3_nphy(struct brcms_phy *pi, u8 start_gain, u8 core); +static void wlc_phy_a2_nphy(struct brcms_phy *pi, struct nphy_ipa_txcalgains *, + enum phy_cal_mode, u8); +static void wlc_phy_papd_cal_cleanup_nphy(struct brcms_phy *pi, + struct nphy_papd_restore_state *state); +static void wlc_phy_papd_cal_setup_nphy(struct brcms_phy *pi, + struct nphy_papd_restore_state *state, u8); -static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, u16 *vals); +static void wlc_phy_clip_det_nphy(struct brcms_phy *pi, u8 write, u16 *vals); -static void wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *evts, +static void wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, u8 *evts, u8 *dlys, u8 len); -static u16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, u16 offset); +static u16 wlc_phy_read_lpf_bw_ctl_nphy(struct brcms_phy *pi, u16 offset); static void -wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, u16 field, u16 value, +wlc_phy_rfctrl_override_nphy_rev7(struct brcms_phy *pi, u16 field, u16 value, u8 core_mask, u8 off, u8 override_id); -static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type); -static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi); +static void wlc_phy_rssi_cal_nphy_rev2(struct brcms_phy *pi, u8 rssi_type); +static void wlc_phy_rssi_cal_nphy_rev3(struct brcms_phy *pi); -static bool wlc_phy_txpwr_srom_read_nphy(phy_info_t *pi); +static bool wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi); static void wlc_phy_txpwr_nphy_srom_convert(u8 *srom_max, u16 *pwr_offset, u8 tmp_max_pwr, u8 rate_start, u8 rate_end); -static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi); -static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi); -static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi); -static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi); +static void wlc_phy_txpwr_limit_to_tbl_nphy(struct brcms_phy *pi); +static void wlc_phy_txpwrctrl_coeff_setup_nphy(struct brcms_phy *pi); +static void wlc_phy_txpwrctrl_idle_tssi_nphy(struct brcms_phy *pi); +static void wlc_phy_txpwrctrl_pwr_setup_nphy(struct brcms_phy *pi); -static bool wlc_phy_txpwr_ison_nphy(phy_info_t *pi); -static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core); -static void wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, +static bool wlc_phy_txpwr_ison_nphy(struct brcms_phy *pi); +static u8 wlc_phy_txpwr_idx_cur_get_nphy(struct brcms_phy *pi, u8 core); +static void wlc_phy_txpwr_idx_cur_set_nphy(struct brcms_phy *pi, u8 idx0, u8 idx1); -static void wlc_phy_a4(phy_info_t *pi, bool full_cal); +static void wlc_phy_a4(struct brcms_phy *pi, bool full_cal); -static u16 wlc_phy_radio205x_rcal(phy_info_t *pi); +static u16 wlc_phy_radio205x_rcal(struct brcms_phy *pi); -static u16 wlc_phy_radio2057_rccal(phy_info_t *pi); +static u16 wlc_phy_radio2057_rccal(struct brcms_phy *pi); -static u16 wlc_phy_gen_load_samples_nphy(phy_info_t *pi, u32 f_kHz, +static u16 wlc_phy_gen_load_samples_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, u8 dac_test_mode); -static void wlc_phy_loadsampletable_nphy(phy_info_t *pi, cs32 *tone_buf, +static void wlc_phy_loadsampletable_nphy(struct brcms_phy *pi, cs32 *tone_buf, u16 num_samps); -static void wlc_phy_runsamples_nphy(phy_info_t *pi, u16 n, u16 lps, +static void wlc_phy_runsamples_nphy(struct brcms_phy *pi, u16 n, u16 lps, u16 wait, u8 iq, u8 dac_test_mode, bool modify_bbmult); -bool wlc_phy_bist_check_phy(wlc_phy_t *pih) +bool wlc_phy_bist_check_phy(struct brcms_phy_pub *pih) { - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; u32 phybist0, phybist1, phybist2, phybist3, phybist4; if (NREV_GE(pi->pubpi.phy_rev, 16)) @@ -14214,7 +14216,7 @@ bool wlc_phy_bist_check_phy(wlc_phy_t *pih) return false; } -static void WLBANDINITFN(wlc_phy_bphy_init_nphy) (phy_info_t *pi) +static void wlc_phy_bphy_init_nphy(struct brcms_phy *pi) { u16 addr, val; @@ -14243,10 +14245,10 @@ static void WLBANDINITFN(wlc_phy_bphy_init_nphy) (phy_info_t *pi) } void -wlc_phy_table_write_nphy(phy_info_t *pi, u32 id, u32 len, u32 offset, +wlc_phy_table_write_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, u32 width, const void *data) { - mimophytbl_info_t tbl; + struct phytbl_info tbl; tbl.tbl_id = id; tbl.tbl_len = len; @@ -14257,10 +14259,10 @@ wlc_phy_table_write_nphy(phy_info_t *pi, u32 id, u32 len, u32 offset, } void -wlc_phy_table_read_nphy(phy_info_t *pi, u32 id, u32 len, u32 offset, +wlc_phy_table_read_nphy(struct brcms_phy *pi, u32 id, u32 len, u32 offset, u32 width, void *data) { - mimophytbl_info_t tbl; + struct phytbl_info tbl; tbl.tbl_id = id; tbl.tbl_len = len; @@ -14270,7 +14272,8 @@ wlc_phy_table_read_nphy(phy_info_t *pi, u32 id, u32 len, u32 offset, wlc_phy_read_table_nphy(pi, &tbl); } -static void WLBANDINITFN(wlc_phy_static_table_download_nphy) (phy_info_t *pi) +static void +wlc_phy_static_table_download_nphy(struct brcms_phy *pi) { uint idx; @@ -14293,7 +14296,7 @@ static void WLBANDINITFN(wlc_phy_static_table_download_nphy) (phy_info_t *pi) } } -static void WLBANDINITFN(wlc_phy_tbl_init_nphy) (phy_info_t *pi) +static void wlc_phy_tbl_init_nphy(struct brcms_phy *pi) { uint idx = 0; u8 antswctrllut; @@ -14415,13 +14418,13 @@ static void WLBANDINITFN(wlc_phy_tbl_init_nphy) (phy_info_t *pi) } static void -wlc_phy_write_txmacreg_nphy(phy_info_t *pi, u16 holdoff, u16 delay) +wlc_phy_write_txmacreg_nphy(struct brcms_phy *pi, u16 holdoff, u16 delay) { write_phy_reg(pi, 0x77, holdoff); write_phy_reg(pi, 0xb4, delay); } -void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs) +void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs) { u16 holdoff, delay; @@ -14442,7 +14445,7 @@ void wlc_phy_nphy_tkip_rifs_war(phy_info_t *pi, u8 rifs) } } -bool wlc_phy_attach_nphy(phy_info_t *pi) +bool wlc_phy_attach_nphy(struct brcms_phy *pi) { uint i; @@ -14467,7 +14470,7 @@ bool wlc_phy_attach_nphy(phy_info_t *pi) pi->n_preamble_override = AUTO; if (NREV_IS(pi->pubpi.phy_rev, 3) || NREV_IS(pi->pubpi.phy_rev, 4)) - pi->n_preamble_override = WLC_N_PREAMBLE_MIXEDMODE; + pi->n_preamble_override = BRCMS_N_PREAMBLE_MIXEDMODE; pi->nphy_txrx_chain = AUTO; pi->phy_scraminit = AUTO; @@ -14501,7 +14504,7 @@ bool wlc_phy_attach_nphy(phy_info_t *pi) return true; } -static void wlc_phy_txpwrctrl_config_nphy(phy_info_t *pi) +static void wlc_phy_txpwrctrl_config_nphy(struct brcms_phy *pi) { if (NREV_GE(pi->pubpi.phy_rev, 3)) { @@ -14521,11 +14524,11 @@ static void wlc_phy_txpwrctrl_config_nphy(phy_info_t *pi) pi->phy_5g_pwrgain = true; } -void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) +void wlc_phy_init_nphy(struct brcms_phy *pi) { u16 val; u16 clip1_ths[2]; - nphy_txgains_t target_gain; + struct nphy_txgains target_gain; u8 tx_pwr_ctrl_state; bool do_nphy_cal = false; uint core; @@ -14550,11 +14553,6 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) } } - if ((!PHY_IPA(pi)) && (pi->sh->chip == BCM5357_CHIP_ID)) { - si_pmu_chipcontrol(pi->sh->sih, 1, CCTRL5357_EXTPA, - CCTRL5357_EXTPA); - } - if ((pi->nphy_gband_spurwar2_en) && CHSPEC_IS2G(pi->radio_chanspec) && CHSPEC_IS40(pi->radio_chanspec)) { @@ -14707,12 +14705,10 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) tx_pwrctrl_tbl = wlc_phy_get_ipa_gaintbl_nphy(pi); } else { if (CHSPEC_IS5G(pi->radio_chanspec)) { - if NREV_IS - (pi->pubpi.phy_rev, 3) { + if (NREV_IS(pi->pubpi.phy_rev, 3)) { tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev3; - } else if NREV_IS - (pi->pubpi.phy_rev, 4) { + } else if (NREV_IS(pi->pubpi.phy_rev, 4)) { tx_pwrctrl_tbl = (pi->srom_fem5g.extpagain == 3) ? nphy_tpc_5GHz_txgain_HiPwrEPA : @@ -14834,7 +14830,7 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) } if (pi->sh->phyrxchain != 0x3) { - wlc_phy_rxcore_setstate_nphy((wlc_phy_t *) pi, + wlc_phy_rxcore_setstate_nphy((struct brcms_phy_pub *) pi, pi->sh->phyrxchain); } @@ -14873,7 +14869,8 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) target_gain = wlc_phy_get_tx_gain_nphy(pi); if (pi->antsel_type == ANTSEL_2x3) - wlc_phy_antsel_init((wlc_phy_t *) pi, true); + wlc_phy_antsel_init((struct brcms_phy_pub *) pi, + true); if (pi->nphy_perical != PHY_PERICAL_MPHASE) { wlc_phy_rssi_cal_nphy(pi); @@ -14903,7 +14900,7 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) } else if (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) { - wlc_phy_cal_perical((wlc_phy_t *) pi, + wlc_phy_cal_perical((struct brcms_phy_pub *) pi, PHY_PERICAL_PHYINIT); } } else { @@ -14927,14 +14924,13 @@ void WLBANDINITFN(wlc_phy_init_nphy) (phy_info_t *pi) } -static void wlc_phy_update_mimoconfig_nphy(phy_info_t *pi, s32 preamble) +static void wlc_phy_update_mimoconfig_nphy(struct brcms_phy *pi, s32 preamble) { bool gf_preamble = false; u16 val; - if (preamble == WLC_N_PREAMBLE_GF) { + if (preamble == BRCMS_N_PREAMBLE_GF) gf_preamble = true; - } val = read_phy_reg(pi, 0xed); @@ -14946,7 +14942,7 @@ static void wlc_phy_update_mimoconfig_nphy(phy_info_t *pi, s32 preamble) write_phy_reg(pi, 0xed, val); } -static void wlc_phy_resetcca_nphy(phy_info_t *pi) +static void wlc_phy_resetcca_nphy(struct brcms_phy *pi) { u16 val; @@ -14962,7 +14958,7 @@ static void wlc_phy_resetcca_nphy(phy_info_t *pi) wlc_phy_force_rfseq_nphy(pi, NPHY_RFSEQ_RESET2RX); } -void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en) +void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en) { u16 rfctrlintc_override_val; @@ -14991,21 +14987,21 @@ void wlc_phy_pa_override_nphy(phy_info_t *pi, bool en) } -void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi) +void wlc_phy_stf_chain_upd_nphy(struct brcms_phy *pi) { u16 txrx_chain = (NPHY_RfseqCoreActv_TxRxChain0 | NPHY_RfseqCoreActv_TxRxChain1); bool CoreActv_override = false; - if (pi->nphy_txrx_chain == WLC_N_TXRX_CHAIN0) { + if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN0) { txrx_chain = NPHY_RfseqCoreActv_TxRxChain0; CoreActv_override = true; if (NREV_LE(pi->pubpi.phy_rev, 2)) { and_phy_reg(pi, 0xa0, ~0x20); } - } else if (pi->nphy_txrx_chain == WLC_N_TXRX_CHAIN1) { + } else if (pi->nphy_txrx_chain == BRCMS_N_TXRX_CHAIN1) { txrx_chain = NPHY_RfseqCoreActv_TxRxChain1; CoreActv_override = true; @@ -15026,12 +15022,12 @@ void wlc_phy_stf_chain_upd_nphy(phy_info_t *pi) } } -void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask) +void wlc_phy_rxcore_setstate_nphy(struct brcms_phy_pub *pih, u8 rxcore_bitmask) { u16 regval; u16 tbl_buf[16]; uint i; - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; u16 tbl_opcode; bool suspend; @@ -15107,10 +15103,10 @@ void wlc_phy_rxcore_setstate_nphy(wlc_phy_t *pih, u8 rxcore_bitmask) wlapi_enable_mac(pi->sh->physhim); } -u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih) +u8 wlc_phy_rxcore_getstate_nphy(struct brcms_phy_pub *pih) { u16 regval, rxen_bits; - phy_info_t *pi = (phy_info_t *) pih; + struct brcms_phy *pi = (struct brcms_phy *) pih; regval = read_phy_reg(pi, 0xa2); rxen_bits = (regval >> 4) & 0xf; @@ -15118,12 +15114,12 @@ u8 wlc_phy_rxcore_getstate_nphy(wlc_phy_t *pih) return (u8) rxen_bits; } -bool wlc_phy_n_txpower_ipa_ison(phy_info_t *pi) +bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pi) { return PHY_IPA(pi); } -static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi) +static void wlc_phy_txpwr_limit_to_tbl_nphy(struct brcms_phy *pi) { u8 idx, idx2, i, delta_ind; @@ -15217,11 +15213,12 @@ static void wlc_phy_txpwr_limit_to_tbl_nphy(phy_info_t *pi) } } -void wlc_phy_cal_init_nphy(phy_info_t *pi) +void wlc_phy_cal_init_nphy(struct brcms_phy *pi) { } -static void wlc_phy_war_force_trsw_to_R_cliplo_nphy(phy_info_t *pi, u8 core) +static void +wlc_phy_war_force_trsw_to_R_cliplo_nphy(struct brcms_phy *pi, u8 core) { if (core == PHY_CORE_0) { write_phy_reg(pi, 0x38, 0x4); @@ -15240,7 +15237,7 @@ static void wlc_phy_war_force_trsw_to_R_cliplo_nphy(phy_info_t *pi, u8 core) } } -static void wlc_phy_war_txchain_upd_nphy(phy_info_t *pi, u8 txchain) +static void wlc_phy_war_txchain_upd_nphy(struct brcms_phy *pi, u8 txchain) { u8 txchain0, txchain1; @@ -15255,7 +15252,7 @@ static void wlc_phy_war_txchain_upd_nphy(phy_info_t *pi, u8 txchain) } } -static void wlc_phy_workarounds_nphy(phy_info_t *pi) +static void wlc_phy_workarounds_nphy(struct brcms_phy *pi) { u8 rfseq_rx2tx_events[] = { NPHY_RFSEQ_CMD_NOP, @@ -15374,9 +15371,7 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) if (pi->phyhang_avoid) wlc_phy_stay_in_carriersearch_nphy(pi, true); - if (!ISSIM_ENAB(pi->sh->sih)) { - or_phy_reg(pi, 0xb1, NPHY_IQFlip_ADC1 | NPHY_IQFlip_ADC2); - } + or_phy_reg(pi, 0xb1, NPHY_IQFlip_ADC1 | NPHY_IQFlip_ADC2); if (NREV_GE(pi->pubpi.phy_rev, 7)) { @@ -16219,8 +16214,8 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) if (pi->sh->boardflags2 & BFL2_SINGLEANT_CCK) { wlapi_bmac_mhf(pi->sh->physhim, MHF4, - MHF4_BPHY_TXCORE0, - MHF4_BPHY_TXCORE0, WLC_BAND_ALL); + MHF4_BPHY_TXCORE0, + MHF4_BPHY_TXCORE0, BRCM_BAND_ALL); } } } else { @@ -16288,7 +16283,7 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) wlapi_bmac_mhf(pi->sh->physhim, MHF3, MHF3_NPHY_MLADV_WAR, MHF3_NPHY_MLADV_WAR, - WLC_BAND_ALL); + BRCM_BAND_ALL); } else if (NREV_IS(pi->pubpi.phy_rev, 2)) { write_phy_reg(pi, 0x1e3, 0x0); @@ -16330,7 +16325,7 @@ static void wlc_phy_workarounds_nphy(phy_info_t *pi) wlc_phy_stay_in_carriersearch_nphy(pi, false); } -static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi) +static void wlc_phy_workarounds_nphy_gainctrl(struct brcms_phy *pi) { u16 w1th, hpf_code, currband; int ctr; @@ -16950,7 +16945,7 @@ static void wlc_phy_workarounds_nphy_gainctrl(phy_info_t *pi) } } -static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(phy_info_t *pi) +static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(struct brcms_phy *pi) { s8 lna1_gain_db[] = { 8, 13, 17, 22 }; s8 lna2_gain_db[] = { -2, 7, 11, 15 }; @@ -17005,7 +17000,7 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev5(phy_info_t *pi) } } -static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(phy_info_t *pi) +static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(struct brcms_phy *pi) { u16 currband; s8 lna1G_gain_db_rev7[] = { 9, 14, 19, 24 }; @@ -17211,7 +17206,7 @@ static void wlc_phy_workarounds_nphy_gainctrl_2057_rev6(phy_info_t *pi) } -static void wlc_phy_adjust_lnagaintbl_nphy(phy_info_t *pi) +static void wlc_phy_adjust_lnagaintbl_nphy(struct brcms_phy *pi) { uint core; int ctr; @@ -17274,7 +17269,7 @@ static void wlc_phy_adjust_lnagaintbl_nphy(phy_info_t *pi) wlc_phy_stay_in_carriersearch_nphy(pi, false); } -void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on) +void wlc_phy_switch_radio_nphy(struct brcms_phy *pi, bool on) { if (on) { if (NREV_GE(pi->pubpi.phy_rev, 7)) { @@ -17284,14 +17279,14 @@ void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on) wlc_phy_radio_postinit_2057(pi); } - wlc_phy_chanspec_set((wlc_phy_t *) pi, + wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); } else if (NREV_GE(pi->pubpi.phy_rev, 3)) { wlc_phy_radio_preinit_205x(pi); wlc_phy_radio_init_2056(pi); wlc_phy_radio_postinit_2056(pi); - wlc_phy_chanspec_set((wlc_phy_t *) pi, + wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); } else { wlc_phy_radio_preinit_2055(pi); @@ -17357,7 +17352,7 @@ void wlc_phy_switch_radio_nphy(phy_info_t *pi, bool on) } } -static void wlc_phy_radio_preinit_2055(phy_info_t *pi) +static void wlc_phy_radio_preinit_2055(struct brcms_phy *pi) { and_phy_reg(pi, 0x78, ~RFCC_POR_FORCE); @@ -17366,12 +17361,12 @@ static void wlc_phy_radio_preinit_2055(phy_info_t *pi) or_phy_reg(pi, 0x78, RFCC_POR_FORCE); } -static void wlc_phy_radio_init_2055(phy_info_t *pi) +static void wlc_phy_radio_init_2055(struct brcms_phy *pi) { wlc_phy_init_radio_regs(pi, regs_2055, RADIO_DEFAULT_CORE); } -static void wlc_phy_radio_postinit_2055(phy_info_t *pi) +static void wlc_phy_radio_postinit_2055(struct brcms_phy *pi) { and_radio_reg(pi, RADIO_2055_MASTER_CNTRL1, @@ -17409,7 +17404,7 @@ static void wlc_phy_radio_postinit_2055(phy_info_t *pi) and_radio_reg(pi, RADIO_2055_CAL_LPO_CNTRL, ~(RADIO_2055_CAL_LPO_ENABLE)); - wlc_phy_chanspec_set((wlc_phy_t *) pi, pi->radio_chanspec); + wlc_phy_chanspec_set((struct brcms_phy_pub *) pi, pi->radio_chanspec); write_radio_reg(pi, RADIO_2055_CORE1_RXBB_LPF, 9); write_radio_reg(pi, RADIO_2055_CORE2_RXBB_LPF, 9); @@ -17436,7 +17431,7 @@ static void wlc_phy_radio_postinit_2055(phy_info_t *pi) udelay(2); } -static void wlc_phy_radio_preinit_205x(phy_info_t *pi) +static void wlc_phy_radio_preinit_205x(struct brcms_phy *pi) { and_phy_reg(pi, 0x78, ~RFCC_CHIP0_PU); @@ -17447,11 +17442,11 @@ static void wlc_phy_radio_preinit_205x(phy_info_t *pi) } -static void wlc_phy_radio_init_2056(phy_info_t *pi) +static void wlc_phy_radio_init_2056(struct brcms_phy *pi) { - radio_regs_t *regs_SYN_2056_ptr = NULL; - radio_regs_t *regs_TX_2056_ptr = NULL; - radio_regs_t *regs_RX_2056_ptr = NULL; + struct radio_regs *regs_SYN_2056_ptr = NULL; + struct radio_regs *regs_TX_2056_ptr = NULL; + struct radio_regs *regs_RX_2056_ptr = NULL; if (NREV_IS(pi->pubpi.phy_rev, 3)) { regs_SYN_2056_ptr = regs_SYN_2056; @@ -17510,7 +17505,7 @@ static void wlc_phy_radio_init_2056(phy_info_t *pi) wlc_phy_init_radio_regs(pi, regs_RX_2056_ptr, (u16) RADIO_2056_RX1); } -static void wlc_phy_radio_postinit_2056(phy_info_t *pi) +static void wlc_phy_radio_postinit_2056(struct brcms_phy *pi) { mod_radio_reg(pi, RADIO_2056_SYN_COM_CTRL, 0xb, 0xb); @@ -17535,9 +17530,9 @@ static void wlc_phy_radio_postinit_2056(phy_info_t *pi) } } -static void wlc_phy_radio_init_2057(phy_info_t *pi) +static void wlc_phy_radio_init_2057(struct brcms_phy *pi) { - radio_20xx_regs_t *regs_2057_ptr = NULL; + struct radio_20xx_regs *regs_2057_ptr = NULL; if (NREV_IS(pi->pubpi.phy_rev, 7)) { @@ -17576,16 +17571,11 @@ static void wlc_phy_radio_init_2057(phy_info_t *pi) wlc_phy_init_radio_regs_allbands(pi, regs_2057_ptr); } -static void wlc_phy_radio_postinit_2057(phy_info_t *pi) +static void wlc_phy_radio_postinit_2057(struct brcms_phy *pi) { mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x1, 0x1); - if (pi->sh->chip == !BCM6362_CHIP_ID) { - - mod_radio_reg(pi, RADIO_2057_XTALPUOVR_PINCTRL, 0x2, 0x2); - } - mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_CAL_RESETN, 0x78, 0x78); mod_radio_reg(pi, RADIO_2057_XTAL_CONFIG2, 0x80, 0x80); mdelay(2); @@ -17601,16 +17591,16 @@ static void wlc_phy_radio_postinit_2057(phy_info_t *pi) } static bool -wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, - chan_info_nphy_radio2057_t **t0, - chan_info_nphy_radio205x_t **t1, - chan_info_nphy_radio2057_rev5_t **t2, - chan_info_nphy_2055_t **t3) +wlc_phy_chan2freq_nphy(struct brcms_phy *pi, uint channel, int *f, + struct chan_info_nphy_radio2057 **t0, + struct chan_info_nphy_radio205x **t1, + struct chan_info_nphy_radio2057_rev5 **t2, + struct chan_info_nphy_2055 **t3) { uint i; - chan_info_nphy_radio2057_t *chan_info_tbl_p_0 = NULL; - chan_info_nphy_radio205x_t *chan_info_tbl_p_1 = NULL; - chan_info_nphy_radio2057_rev5_t *chan_info_tbl_p_2 = NULL; + struct chan_info_nphy_radio2057 *chan_info_tbl_p_0 = NULL; + struct chan_info_nphy_radio205x *chan_info_tbl_p_1 = NULL; + struct chan_info_nphy_radio2057_rev5 *chan_info_tbl_p_2 = NULL; u32 tbl_len = 0; int freq = 0; @@ -17769,13 +17759,13 @@ wlc_phy_chan2freq_nphy(phy_info_t *pi, uint channel, int *f, return false; } -u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint channel) +u8 wlc_phy_get_chan_freq_range_nphy(struct brcms_phy *pi, uint channel) { int freq; - chan_info_nphy_radio2057_t *t0 = NULL; - chan_info_nphy_radio205x_t *t1 = NULL; - chan_info_nphy_radio2057_rev5_t *t2 = NULL; - chan_info_nphy_2055_t *t3 = NULL; + struct chan_info_nphy_radio2057 *t0 = NULL; + struct chan_info_nphy_radio205x *t1 = NULL; + struct chan_info_nphy_radio2057_rev5 *t2 = NULL; + struct chan_info_nphy_2055 *t3 = NULL; if (NORADIO_ENAB(pi->pubpi)) return WL_CHAN_FREQ_RANGE_2G; @@ -17798,7 +17788,8 @@ u8 wlc_phy_get_chan_freq_range_nphy(phy_info_t *pi, uint channel) } static void -wlc_phy_chanspec_radio2055_setup(phy_info_t *pi, chan_info_nphy_2055_t *ci) +wlc_phy_chanspec_radio2055_setup(struct brcms_phy *pi, + struct chan_info_nphy_2055 *ci) { write_radio_reg(pi, RADIO_2055_PLL_REF, ci->RF_pll_ref); @@ -17806,21 +17797,21 @@ wlc_phy_chanspec_radio2055_setup(phy_info_t *pi, chan_info_nphy_2055_t *ci) write_radio_reg(pi, RADIO_2055_RF_PLL_MOD1, ci->RF_rf_pll_mod1); write_radio_reg(pi, RADIO_2055_VCO_CAP_TAIL, ci->RF_vco_cap_tail); - WLC_PHY_WAR_PR51571(pi); + BRCMS_PHY_WAR_PR51571(pi); write_radio_reg(pi, RADIO_2055_VCO_CAL1, ci->RF_vco_cal1); write_radio_reg(pi, RADIO_2055_VCO_CAL2, ci->RF_vco_cal2); write_radio_reg(pi, RADIO_2055_PLL_LF_C1, ci->RF_pll_lf_c1); write_radio_reg(pi, RADIO_2055_PLL_LF_R1, ci->RF_pll_lf_r1); - WLC_PHY_WAR_PR51571(pi); + BRCMS_PHY_WAR_PR51571(pi); write_radio_reg(pi, RADIO_2055_PLL_LF_C2, ci->RF_pll_lf_c2); write_radio_reg(pi, RADIO_2055_LGBUF_CEN_BUF, ci->RF_lgbuf_cen_buf); write_radio_reg(pi, RADIO_2055_LGEN_TUNE1, ci->RF_lgen_tune1); write_radio_reg(pi, RADIO_2055_LGEN_TUNE2, ci->RF_lgen_tune2); - WLC_PHY_WAR_PR51571(pi); + BRCMS_PHY_WAR_PR51571(pi); write_radio_reg(pi, RADIO_2055_CORE1_LGBUF_A_TUNE, ci->RF_core1_lgbuf_a_tune); @@ -17830,7 +17821,7 @@ wlc_phy_chanspec_radio2055_setup(phy_info_t *pi, chan_info_nphy_2055_t *ci) write_radio_reg(pi, RADIO_2055_CORE1_TX_PGA_PAD_TN, ci->RF_core1_tx_pga_pad_tn); - WLC_PHY_WAR_PR51571(pi); + BRCMS_PHY_WAR_PR51571(pi); write_radio_reg(pi, RADIO_2055_CORE1_TX_MX_BGTRIM, ci->RF_core1_tx_mx_bgtrim); @@ -17840,7 +17831,7 @@ wlc_phy_chanspec_radio2055_setup(phy_info_t *pi, chan_info_nphy_2055_t *ci) ci->RF_core2_lgbuf_g_tune); write_radio_reg(pi, RADIO_2055_CORE2_RXRF_REG1, ci->RF_core2_rxrf_reg1); - WLC_PHY_WAR_PR51571(pi); + BRCMS_PHY_WAR_PR51571(pi); write_radio_reg(pi, RADIO_2055_CORE2_TX_PGA_PAD_TN, ci->RF_core2_tx_pga_pad_tn); @@ -17852,7 +17843,7 @@ wlc_phy_chanspec_radio2055_setup(phy_info_t *pi, chan_info_nphy_2055_t *ci) write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x05); write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x45); - WLC_PHY_WAR_PR51571(pi); + BRCMS_PHY_WAR_PR51571(pi); write_radio_reg(pi, RADIO_2055_VCO_CAL10, 0x65); @@ -17860,10 +17851,10 @@ wlc_phy_chanspec_radio2055_setup(phy_info_t *pi, chan_info_nphy_2055_t *ci) } static void -wlc_phy_chanspec_radio2056_setup(phy_info_t *pi, - const chan_info_nphy_radio205x_t *ci) +wlc_phy_chanspec_radio2056_setup(struct brcms_phy *pi, + const struct chan_info_nphy_radio205x *ci) { - radio_regs_t *regs_SYN_2056_ptr = NULL; + struct radio_regs *regs_SYN_2056_ptr = NULL; write_radio_reg(pi, RADIO_2056_SYN_PLL_VCOCAL1 | RADIO_2056_SYN, @@ -17986,23 +17977,12 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi, write_radio_reg(pi, RADIO_2056_SYN_PLL_LOOPFILTER2 | RADIO_2056_SYN, 0x1f); - if ((pi->sh->chip == BCM4716_CHIP_ID) || - (pi->sh->chip == BCM47162_CHIP_ID)) { - - write_radio_reg(pi, - RADIO_2056_SYN_PLL_LOOPFILTER4 | - RADIO_2056_SYN, 0x14); - write_radio_reg(pi, - RADIO_2056_SYN_PLL_CP2 | - RADIO_2056_SYN, 0x00); - } else { - write_radio_reg(pi, - RADIO_2056_SYN_PLL_LOOPFILTER4 | - RADIO_2056_SYN, 0xb); - write_radio_reg(pi, - RADIO_2056_SYN_PLL_CP2 | - RADIO_2056_SYN, 0x14); - } + write_radio_reg(pi, + RADIO_2056_SYN_PLL_LOOPFILTER4 | + RADIO_2056_SYN, 0xb); + write_radio_reg(pi, + RADIO_2056_SYN_PLL_CP2 | + RADIO_2056_SYN, 0x14); } } @@ -18049,38 +18029,25 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi, WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, PADG_IDAC, 0xcc); - if ((pi->sh->chip == BCM4716_CHIP_ID) || - (pi->sh->chip == - BCM47162_CHIP_ID)) { - bias = 0x40; - cascbias = 0x45; - pag_boost_tune = 0x5; - pgag_boost_tune = 0x33; - padg_boost_tune = 0x77; - mixg_boost_tune = 0x55; - } else { - bias = 0x25; - cascbias = 0x20; - - if ((pi->sh->chip == - BCM43224_CHIP_ID) - || (pi->sh->chip == - BCM43225_CHIP_ID) - || (pi->sh->chip == - BCM43421_CHIP_ID)) { - if (pi->sh->chippkg == - BCM43224_FAB_SMIC) { - bias = 0x2a; - cascbias = 0x38; - } + bias = 0x25; + cascbias = 0x20; + + if ((pi->sh->chip == + BCM43224_CHIP_ID) + || (pi->sh->chip == + BCM43225_CHIP_ID)) { + if (pi->sh->chippkg == + BCM43224_FAB_SMIC) { + bias = 0x2a; + cascbias = 0x38; } - - pag_boost_tune = 0x4; - pgag_boost_tune = 0x03; - padg_boost_tune = 0x77; - mixg_boost_tune = 0x65; } + pag_boost_tune = 0x4; + pgag_boost_tune = 0x03; + padg_boost_tune = 0x77; + mixg_boost_tune = 0x65; + WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, INTPAG_IMAIN_STAT, bias); WRITE_RADIO_REG2(pi, RADIO_2056, TX, core, @@ -18178,8 +18145,7 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi, cascbias = 0x30; if ((pi->sh->chip == BCM43224_CHIP_ID) || - (pi->sh->chip == BCM43225_CHIP_ID) || - (pi->sh->chip == BCM43421_CHIP_ID)) { + (pi->sh->chip == BCM43225_CHIP_ID)) { if (pi->sh->chippkg == BCM43224_FAB_SMIC) { cascbias = 0x35; } @@ -18201,7 +18167,7 @@ wlc_phy_chanspec_radio2056_setup(phy_info_t *pi, wlc_phy_radio205x_vcocal_nphy(pi); } -void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi) +void wlc_phy_radio205x_vcocal_nphy(struct brcms_phy *pi) { if (NREV_GE(pi->pubpi.phy_rev, 7)) { mod_radio_reg(pi, RADIO_2057_RFPLL_MISC_EN, 0x01, 0x0); @@ -18222,7 +18188,7 @@ void wlc_phy_radio205x_vcocal_nphy(phy_info_t *pi) #define MAX_205x_RCAL_WAITLOOPS 10000 -static u16 wlc_phy_radio205x_rcal(phy_info_t *pi) +static u16 wlc_phy_radio205x_rcal(struct brcms_phy *pi) { u16 rcal_reg = 0; int i; @@ -18328,9 +18294,9 @@ static u16 wlc_phy_radio205x_rcal(phy_info_t *pi) } static void -wlc_phy_chanspec_radio2057_setup(phy_info_t *pi, - const chan_info_nphy_radio2057_t *ci, - const chan_info_nphy_radio2057_rev5_t *ci2) +wlc_phy_chanspec_radio2057_setup(struct brcms_phy *pi, + const struct chan_info_nphy_radio2057 *ci, + const struct chan_info_nphy_radio2057_rev5 *ci2) { int coreNum; u16 txmix2g_tune_boost_pu = 0; @@ -18523,7 +18489,7 @@ wlc_phy_chanspec_radio2057_setup(phy_info_t *pi, wlc_phy_radio205x_vcocal_nphy(pi); } -static u16 wlc_phy_radio2057_rccal(phy_info_t *pi) +static u16 wlc_phy_radio2057_rccal(struct brcms_phy *pi) { u16 rccal_valid; int i; @@ -18607,7 +18573,7 @@ static u16 wlc_phy_radio2057_rccal(phy_info_t *pi) } static void -wlc_phy_adjust_rx_analpfbw_nphy(phy_info_t *pi, u16 reduction_factr) +wlc_phy_adjust_rx_analpfbw_nphy(struct brcms_phy *pi, u16 reduction_factr) { if (NREV_GE(pi->pubpi.phy_rev, 3) && NREV_LT(pi->pubpi.phy_rev, 7)) { if ((CHSPEC_CHANNEL(pi->radio_chanspec) == 11) && @@ -18635,8 +18601,8 @@ wlc_phy_adjust_rx_analpfbw_nphy(phy_info_t *pi, u16 reduction_factr) } static void -wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *tone_id_buf, - u32 *noise_var_buf) +wlc_phy_adjust_min_noisevar_nphy(struct brcms_phy *pi, int ntones, + int *tone_id_buf, u32 *noise_var_buf) { int i; u32 offset; @@ -18684,7 +18650,7 @@ wlc_phy_adjust_min_noisevar_nphy(phy_info_t *pi, int ntones, int *tone_id_buf, } } -static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr) +static void wlc_phy_adjust_crsminpwr_nphy(struct brcms_phy *pi, u8 minpwr) { u16 regval; @@ -18735,7 +18701,7 @@ static void wlc_phy_adjust_crsminpwr_nphy(phy_info_t *pi, u8 minpwr) } } -static void wlc_phy_txlpfbw_nphy(phy_info_t *pi) +static void wlc_phy_txlpfbw_nphy(struct brcms_phy *pi) { u8 tx_lpf_bw = 0; @@ -18774,7 +18740,7 @@ static void wlc_phy_txlpfbw_nphy(phy_info_t *pi) } } -static void wlc_phy_spurwar_nphy(phy_info_t *pi) +static void wlc_phy_spurwar_nphy(struct brcms_phy *pi) { u16 cur_channel = 0; int nphy_adj_tone_id_buf[] = { 57, 58 }; @@ -18907,14 +18873,8 @@ static void wlc_phy_spurwar_nphy(phy_info_t *pi) case 38: case 102: case 118: - if ((pi->sh->chip == BCM4716_CHIP_ID) && - (pi->sh->chippkg == BCM4717_PKG_ID)) { - nphy_adj_tone_id_buf[0] = 32; - nphy_adj_noise_var_buf[0] = 0x21f; - } else { - nphy_adj_tone_id_buf[0] = 0; - nphy_adj_noise_var_buf[0] = 0x0; - } + nphy_adj_tone_id_buf[0] = 0; + nphy_adj_noise_var_buf[0] = 0x0; break; case 134: nphy_adj_tone_id_buf[0] = 32; @@ -18952,8 +18912,8 @@ static void wlc_phy_spurwar_nphy(phy_info_t *pi) } static void -wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec, - const nphy_sfo_cfg_t *ci) +wlc_phy_chanspec_nphy_setup(struct brcms_phy *pi, chanspec_t chanspec, + const struct nphy_sfo_cfg *ci) { u16 val; @@ -19041,34 +19001,20 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec, if (pi->nphy_aband_spurwar_en && ((val == 38) || (val == 102) - || (val == 118))) { - if ((pi->sh->chip == - BCM4716_CHIP_ID) - && (pi->sh->chippkg == - BCM4717_PKG_ID)) { - spuravoid = 0; - } else { - spuravoid = 1; - } - } + || (val == 118))) + spuravoid = 1; } } if (pi->phy_spuravoid == SPURAVOID_FORCEON) spuravoid = 1; - if ((pi->sh->chip == BCM4716_CHIP_ID) || - (pi->sh->chip == BCM47162_CHIP_ID)) { - si_pmu_spuravoid(pi->sh->sih, spuravoid); - } else { - wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); - si_pmu_spuravoid(pi->sh->sih, spuravoid); - wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); - } + wlapi_bmac_core_phypll_ctl(pi->sh->physhim, false); + si_pmu_spuravoid(pi->sh->sih, spuravoid); + wlapi_bmac_core_phypll_ctl(pi->sh->physhim, true); if ((pi->sh->chip == BCM43224_CHIP_ID) || - (pi->sh->chip == BCM43225_CHIP_ID) || - (pi->sh->chip == BCM43421_CHIP_ID)) { + (pi->sh->chip == BCM43225_CHIP_ID)) { if (spuravoid == 1) { @@ -19085,10 +19031,7 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec, } } - if (!((pi->sh->chip == BCM4716_CHIP_ID) || - (pi->sh->chip == BCM47162_CHIP_ID))) { - wlapi_bmac_core_phypll_reset(pi->sh->physhim); - } + wlapi_bmac_core_phypll_reset(pi->sh->physhim); mod_phy_reg(pi, 0x01, (0x1 << 15), ((spuravoid > 0) ? (0x1 << 15) : 0)); @@ -19104,13 +19047,13 @@ wlc_phy_chanspec_nphy_setup(phy_info_t *pi, chanspec_t chanspec, wlc_phy_spurwar_nphy(pi); } -void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec) +void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi, chanspec_t chanspec) { int freq; - chan_info_nphy_radio2057_t *t0 = NULL; - chan_info_nphy_radio205x_t *t1 = NULL; - chan_info_nphy_radio2057_rev5_t *t2 = NULL; - chan_info_nphy_2055_t *t3 = NULL; + struct chan_info_nphy_radio2057 *t0 = NULL; + struct chan_info_nphy_radio205x *t1 = NULL; + struct chan_info_nphy_radio2057_rev5 *t2 = NULL; + struct chan_info_nphy_2055 *t3 = NULL; if (NORADIO_ENAB(pi->pubpi)) { return; @@ -19120,7 +19063,7 @@ void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec) (pi, CHSPEC_CHANNEL(chanspec), &freq, &t0, &t1, &t2, &t3)) return; - wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec); + wlc_phy_chanspec_radio_set((struct brcms_phy_pub *) pi, chanspec); if (CHSPEC_BW(chanspec) != pi->bw) wlapi_bmac_bw_set(pi->sh->physhim, CHSPEC_BW(chanspec)); @@ -19157,12 +19100,9 @@ void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec) wlc_phy_chanspec_radio2057_setup(pi, t0, t2); wlc_phy_chanspec_nphy_setup(pi, chanspec, - (pi->pubpi.radiorev == - 5) ? (const nphy_sfo_cfg_t - *)&(t2-> - PHY_BW1a) - : (const nphy_sfo_cfg_t *) - &(t0->PHY_BW1a)); + (pi->pubpi.radiorev == 5) ? + (const struct nphy_sfo_cfg *)&(t2->PHY_BW1a) : + (const struct nphy_sfo_cfg *)&(t0->PHY_BW1a)); } else { @@ -19173,8 +19113,7 @@ void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec) wlc_phy_chanspec_radio2056_setup(pi, t1); wlc_phy_chanspec_nphy_setup(pi, chanspec, - (const nphy_sfo_cfg_t *) - &(t1->PHY_BW1a)); + (const struct nphy_sfo_cfg *) &(t1->PHY_BW1a)); } } else { @@ -19185,13 +19124,13 @@ void wlc_phy_chanspec_set_nphy(phy_info_t *pi, chanspec_t chanspec) wlc_phy_chanspec_radio2055_setup(pi, t3); wlc_phy_chanspec_nphy_setup(pi, chanspec, - (const nphy_sfo_cfg_t *)&(t3-> + (const struct nphy_sfo_cfg *)&(t3-> PHY_BW1a)); } } -static void wlc_phy_savecal_nphy(phy_info_t *pi) +static void wlc_phy_savecal_nphy(struct brcms_phy *pi) { void *tbl_ptr; int coreNum; @@ -19340,7 +19279,7 @@ static void wlc_phy_savecal_nphy(phy_info_t *pi) wlc_phy_stay_in_carriersearch_nphy(pi, false); } -static void wlc_phy_restorecal_nphy(phy_info_t *pi) +static void wlc_phy_restorecal_nphy(struct brcms_phy *pi) { u16 *loft_comp; u16 txcal_coeffs_bphy[4]; @@ -19539,9 +19478,9 @@ static void wlc_phy_restorecal_nphy(phy_info_t *pi) } } -void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init) +void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init) { - phy_info_t *pi = (phy_info_t *) ppi; + struct brcms_phy *pi = (struct brcms_phy *) ppi; u16 mask = 0xfc00; u32 mc = 0; @@ -19599,7 +19538,7 @@ void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init) } } -u16 wlc_phy_classifier_nphy(phy_info_t *pi, u16 mask, u16 val) +u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val) { u16 curr_ctl, new_ctl; bool suspended = false; @@ -19624,7 +19563,7 @@ u16 wlc_phy_classifier_nphy(phy_info_t *pi, u16 mask, u16 val) return new_ctl; } -static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, u16 *vals) +static void wlc_phy_clip_det_nphy(struct brcms_phy *pi, u8 write, u16 *vals) { if (write == 0) { @@ -19636,7 +19575,7 @@ static void wlc_phy_clip_det_nphy(phy_info_t *pi, u8 write, u16 *vals) } } -void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd) +void wlc_phy_force_rfseq_nphy(struct brcms_phy *pi, u8 cmd) { u16 trigger_mask, status_mask; u16 orig_RfseqCoreActv; @@ -19681,7 +19620,7 @@ void wlc_phy_force_rfseq_nphy(phy_info_t *pi, u8 cmd) } static void -wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *events, u8 *dlys, +wlc_phy_set_rfseq_nphy(struct brcms_phy *pi, u8 cmd, u8 *events, u8 *dlys, u8 len) { u32 t1_offset, t2_offset; @@ -19712,7 +19651,7 @@ wlc_phy_set_rfseq_nphy(phy_info_t *pi, u8 cmd, u8 *events, u8 *dlys, wlc_phy_stay_in_carriersearch_nphy(pi, false); } -static u16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, u16 offset) +static u16 wlc_phy_read_lpf_bw_ctl_nphy(struct brcms_phy *pi, u16 offset) { u16 lpf_bw_ctl_val = 0; u16 rx2tx_lpf_rc_lut_offset = 0; @@ -19736,7 +19675,7 @@ static u16 wlc_phy_read_lpf_bw_ctl_nphy(phy_info_t *pi, u16 offset) } static void -wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, u16 field, u16 value, +wlc_phy_rfctrl_override_nphy_rev7(struct brcms_phy *pi, u16 field, u16 value, u8 core_mask, u8 off, u8 override_id) { u8 core_num; @@ -20006,7 +19945,7 @@ wlc_phy_rfctrl_override_nphy_rev7(phy_info_t *pi, u16 field, u16 value, } static void -wlc_phy_rfctrl_override_nphy(phy_info_t *pi, u16 field, u16 value, +wlc_phy_rfctrl_override_nphy(struct brcms_phy *pi, u16 field, u16 value, u8 core_mask, u8 off) { u8 core_num; @@ -20252,7 +20191,7 @@ wlc_phy_rfctrl_override_nphy(phy_info_t *pi, u16 field, u16 value, } static void -wlc_phy_rfctrl_override_1tomany_nphy(phy_info_t *pi, u16 cmd, u16 value, +wlc_phy_rfctrl_override_1tomany_nphy(struct brcms_phy *pi, u16 cmd, u16 value, u8 core_mask, u8 off) { u16 rfmxgain = 0, lpfgain = 0; @@ -20338,7 +20277,7 @@ wlc_phy_rfctrl_override_1tomany_nphy(phy_info_t *pi, u16 cmd, u16 value, } static void -wlc_phy_scale_offset_rssi_nphy(phy_info_t *pi, u16 scale, s8 offset, +wlc_phy_scale_offset_rssi_nphy(struct brcms_phy *pi, u16 scale, s8 offset, u8 coresel, u8 rail, u8 rssi_type) { u16 valuetostuff; @@ -20478,7 +20417,7 @@ wlc_phy_scale_offset_rssi_nphy(phy_info_t *pi, u16 scale, s8 offset, } } -void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core_code, u8 rssi_type) +void wlc_phy_rssisel_nphy(struct brcms_phy *pi, u8 core_code, u8 rssi_type) { u16 mask, val; u16 afectrlovr_rssi_val, rfctrlcmd_rxen_val, rfctrlcmd_coresel_val, @@ -20782,7 +20721,7 @@ void wlc_phy_rssisel_nphy(phy_info_t *pi, u8 core_code, u8 rssi_type) } int -wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, s32 *rssi_buf, +wlc_phy_poll_rssi_nphy(struct brcms_phy *pi, u8 rssi_type, s32 *rssi_buf, u8 nsamps) { s16 rssi0, rssi1; @@ -20881,7 +20820,7 @@ wlc_phy_poll_rssi_nphy(phy_info_t *pi, u8 rssi_type, s32 *rssi_buf, return rssi_out_val; } -s16 wlc_phy_tempsense_nphy(phy_info_t *pi) +s16 wlc_phy_tempsense_nphy(struct brcms_phy *pi) { u16 core1_txrf_iqcal1_save, core1_txrf_iqcal2_save; u16 core2_txrf_iqcal1_save, core2_txrf_iqcal2_save; @@ -21035,19 +20974,9 @@ s16 wlc_phy_tempsense_nphy(phy_info_t *pi) wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_AFECTRL, 1, 0x03, 16, &auxADC_rssi_ctrlH_save); - if (pi->sh->chip == BCM5357_CHIP_ID) { - radio_temp[0] = (193 * (radio_temp[1] + radio_temp2[1]) - + 88 * (auxADC_Vl) - 27111 + - 128) / 256; - } else if (pi->sh->chip == BCM43236_CHIP_ID) { - radio_temp[0] = (198 * (radio_temp[1] + radio_temp2[1]) - + 91 * (auxADC_Vl) - 27243 + - 128) / 256; - } else { - radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1]) - + 82 * (auxADC_Vl) - 28861 + - 128) / 256; - } + radio_temp[0] = (179 * (radio_temp[1] + radio_temp2[1]) + + 82 * (auxADC_Vl) - 28861 + + 128) / 256; offset = (s16) pi->phy_tempsense_offset; @@ -21064,10 +20993,8 @@ s16 wlc_phy_tempsense_nphy(phy_info_t *pi) write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x01); wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp, 1); - if (NREV_GE(pi->pubpi.phy_rev, 7)) { - } else { + if (NREV_LT(pi->pubpi.phy_rev, 7)) write_radio_reg(pi, RADIO_2056_SYN_TEMPPROCSENSE, 0x05); - } wlc_phy_poll_rssi_nphy(pi, NPHY_RSSI_SEL_IQ, radio_temp2, 1); if (NREV_GE(pi->pubpi.phy_rev, 7)) { @@ -21165,7 +21092,7 @@ s16 wlc_phy_tempsense_nphy(phy_info_t *pi) } static void -wlc_phy_set_rssi_2055_vcm(phy_info_t *pi, u8 rssi_type, u8 *vcm_buf) +wlc_phy_set_rssi_2055_vcm(struct brcms_phy *pi, u8 rssi_type, u8 *vcm_buf) { u8 core; @@ -21219,7 +21146,7 @@ wlc_phy_set_rssi_2055_vcm(phy_info_t *pi, u8 rssi_type, u8 *vcm_buf) } } -void wlc_phy_rssi_cal_nphy(phy_info_t *pi) +void wlc_phy_rssi_cal_nphy(struct brcms_phy *pi) { if (NREV_GE(pi->pubpi.phy_rev, 3)) { @@ -21231,7 +21158,7 @@ void wlc_phy_rssi_cal_nphy(phy_info_t *pi) } } -static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type) +static void wlc_phy_rssi_cal_nphy_rev2(struct brcms_phy *pi, u8 rssi_type) { s32 target_code; u16 classif_state; @@ -21439,9 +21366,9 @@ static void wlc_phy_rssi_cal_nphy_rev2(phy_info_t *pi, u8 rssi_type) } int -wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh) +wlc_phy_rssi_compute_nphy(struct brcms_phy *pi, struct brcms_d11rxhdr *wlc_rxh) { - d11rxhdr_t *rxh = &wlc_rxh->rxhdr; + struct d11rxhdr *rxh = &wlc_rxh->rxhdr; s16 rxpwr, rxpwr0, rxpwr1; s16 phyRx0_l, phyRx2_l; @@ -21479,7 +21406,7 @@ wlc_phy_rssi_compute_nphy(phy_info_t *pi, wlc_d11rxhdr_t *wlc_rxh) } static void -wlc_phy_rfctrlintc_override_nphy(phy_info_t *pi, u8 field, u16 value, +wlc_phy_rfctrlintc_override_nphy(struct brcms_phy *pi, u8 field, u16 value, u8 core_code) { u16 mask; @@ -21714,7 +21641,7 @@ wlc_phy_rfctrlintc_override_nphy(phy_info_t *pi, u8 field, u16 value, } } -static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi) +static void wlc_phy_rssi_cal_nphy_rev3(struct brcms_phy *pi) { u16 classif_state; u16 clip_state[2]; @@ -21853,7 +21780,8 @@ static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi) } } - rxcore_state = wlc_phy_rxcore_getstate_nphy((wlc_phy_t *) pi); + rxcore_state = wlc_phy_rxcore_getstate_nphy( + (struct brcms_phy_pub *) pi); vcm_level_max = 8; @@ -22201,7 +22129,7 @@ static void wlc_phy_rssi_cal_nphy_rev3(phy_info_t *pi) wlc_phy_clip_det_nphy(pi, 1, clip_state); } -static void wlc_phy_restore_rssical_nphy(phy_info_t *pi) +static void wlc_phy_restore_rssical_nphy(struct brcms_phy *pi) { if (CHSPEC_IS2G(pi->radio_chanspec)) { if (pi->nphy_rssical_chanspec_2G == 0) @@ -22308,7 +22236,7 @@ static void wlc_phy_restore_rssical_nphy(phy_info_t *pi) } static u16 -wlc_phy_gen_load_samples_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, +wlc_phy_gen_load_samples_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, u8 dac_test_mode) { u8 phy_bw, is_phybw40; @@ -22357,7 +22285,7 @@ wlc_phy_gen_load_samples_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, } int -wlc_phy_tx_tone_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, +wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val, u8 iqmode, u8 dac_test_mode, bool modify_bbmult) { u16 num_samps; @@ -22377,7 +22305,7 @@ wlc_phy_tx_tone_nphy(phy_info_t *pi, u32 f_kHz, u16 max_val, } static void -wlc_phy_loadsampletable_nphy(phy_info_t *pi, cs32 *tone_buf, +wlc_phy_loadsampletable_nphy(struct brcms_phy *pi, cs32 *tone_buf, u16 num_samps) { u16 t; @@ -22405,7 +22333,7 @@ wlc_phy_loadsampletable_nphy(phy_info_t *pi, cs32 *tone_buf, } static void -wlc_phy_runsamples_nphy(phy_info_t *pi, u16 num_samps, u16 loops, +wlc_phy_runsamples_nphy(struct brcms_phy *pi, u16 num_samps, u16 loops, u16 wait, u8 iqmode, u8 dac_test_mode, bool modify_bbmult) { @@ -22492,7 +22420,7 @@ wlc_phy_runsamples_nphy(phy_info_t *pi, u16 num_samps, u16 loops, write_phy_reg(pi, 0xa1, orig_RfseqCoreActv); } -void wlc_phy_stopplayback_nphy(phy_info_t *pi) +void wlc_phy_stopplayback_nphy(struct brcms_phy *pi) { u16 playback_status; u16 bb_mult; @@ -22534,11 +22462,11 @@ void wlc_phy_stopplayback_nphy(phy_info_t *pi) wlc_phy_stay_in_carriersearch_nphy(pi, false); } -nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) +struct nphy_txgains wlc_phy_get_tx_gain_nphy(struct brcms_phy *pi) { u16 base_idx[2], curr_gain[2]; u8 core_no; - nphy_txgains_t target_gain; + struct nphy_txgains target_gain; u32 *tx_pwrctrl_tbl = NULL; if (pi->nphy_txpwrctrl == PHY_TPC_HW_OFF) { @@ -22584,21 +22512,21 @@ nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) } } } else { + uint phyrev = pi->pubpi.phy_rev; + base_idx[0] = (read_phy_reg(pi, 0x1ed) >> 8) & 0x7f; base_idx[1] = (read_phy_reg(pi, 0x1ee) >> 8) & 0x7f; for (core_no = 0; core_no < 2; core_no++) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (NREV_GE(phyrev, 3)) { if (PHY_IPA(pi)) { tx_pwrctrl_tbl = wlc_phy_get_ipa_gaintbl_nphy(pi); } else { if (CHSPEC_IS5G(pi->radio_chanspec)) { - if NREV_IS - (pi->pubpi.phy_rev, 3) { + if (NREV_IS(phyrev, 3)) { tx_pwrctrl_tbl = nphy_tpc_5GHz_txgain_rev3; - } else if NREV_IS - (pi->pubpi.phy_rev, 4) { + } else if (NREV_IS(phyrev, 4)) { tx_pwrctrl_tbl = (pi->srom_fem5g. extpagain == @@ -22611,8 +22539,7 @@ nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) nphy_tpc_5GHz_txgain_rev5; } } else { - if (NREV_GE - (pi->pubpi.phy_rev, 7)) { + if (NREV_GE(phyrev, 7)) { if (pi->pubpi. radiorev == 3) { tx_pwrctrl_tbl = @@ -22625,9 +22552,7 @@ nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) } } else { - if (NREV_GE - (pi->pubpi.phy_rev, - 5) + if (NREV_GE(phyrev, 5) && (pi->srom_fem2g. extpagain == 3)) { @@ -22640,8 +22565,7 @@ nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) } } } - if NREV_GE - (pi->pubpi.phy_rev, 7) { + if (NREV_GE(phyrev, 7)) { target_gain.ipa[core_no] = (tx_pwrctrl_tbl[base_idx[core_no]] >> 16) & 0x7; @@ -22692,9 +22616,9 @@ nphy_txgains_t wlc_phy_get_tx_gain_nphy(phy_info_t *pi) } static void -wlc_phy_iqcal_gainparams_nphy(phy_info_t *pi, u16 core_no, - nphy_txgains_t target_gain, - nphy_iqcal_params_t *params) +wlc_phy_iqcal_gainparams_nphy(struct brcms_phy *pi, u16 core_no, + struct nphy_txgains target_gain, + struct nphy_iqcal_params *params) { u8 k; int idx; @@ -22755,7 +22679,7 @@ wlc_phy_iqcal_gainparams_nphy(phy_info_t *pi, u16 core_no, } } -static void wlc_phy_txcal_radio_setup_nphy(phy_info_t *pi) +static void wlc_phy_txcal_radio_setup_nphy(struct brcms_phy *pi) { u16 jtag_core, core; @@ -23065,7 +22989,7 @@ static void wlc_phy_txcal_radio_setup_nphy(phy_info_t *pi) } } -static void wlc_phy_txcal_radio_cleanup_nphy(phy_info_t *pi) +static void wlc_phy_txcal_radio_cleanup_nphy(struct brcms_phy *pi) { u16 jtag_core, core; @@ -23203,7 +23127,7 @@ static void wlc_phy_txcal_radio_cleanup_nphy(phy_info_t *pi) } } -static void wlc_phy_txcal_physetup_nphy(phy_info_t *pi) +static void wlc_phy_txcal_physetup_nphy(struct brcms_phy *pi) { u16 val, mask; @@ -23355,7 +23279,7 @@ static void wlc_phy_txcal_physetup_nphy(phy_info_t *pi) } } -static void wlc_phy_txcal_phycleanup_nphy(phy_info_t *pi) +static void wlc_phy_txcal_phycleanup_nphy(struct brcms_phy *pi) { u16 mask; @@ -23437,7 +23361,7 @@ static void wlc_phy_txcal_phycleanup_nphy(phy_info_t *pi) #define NPHY_TEST_TONE_FREQ_20MHz 2500 void -wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf, u8 num_samps) +wlc_phy_est_tonepwr_nphy(struct brcms_phy *pi, s32 *qdBm_pwrbuf, u8 num_samps) { u16 tssi_reg; s32 temp, pwrindex[2]; @@ -23456,7 +23380,7 @@ wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf, u8 num_samps) tssi_type = CHSPEC_IS5G(pi->radio_chanspec) ? - (u8)NPHY_RSSI_SEL_TSSI_5G:(u8)NPHY_RSSI_SEL_TSSI_2G; + (u8)NPHY_RSSI_SEL_TSSI_5G : (u8)NPHY_RSSI_SEL_TSSI_2G; wlc_phy_poll_rssi_nphy(pi, tssi_type, rssi_buf, num_samps); @@ -23484,7 +23408,7 @@ wlc_phy_est_tonepwr_nphy(phy_info_t *pi, s32 *qdBm_pwrbuf, u8 num_samps) (u32) pwrindex[1], 32, &qdBm_pwrbuf[1]); } -static void wlc_phy_internal_cal_txgain_nphy(phy_info_t *pi) +static void wlc_phy_internal_cal_txgain_nphy(struct brcms_phy *pi) { u16 txcal_gain[2]; @@ -23508,7 +23432,7 @@ static void wlc_phy_internal_cal_txgain_nphy(phy_info_t *pi) txcal_gain); } -static void wlc_phy_precal_txgain_nphy(phy_info_t *pi) +static void wlc_phy_precal_txgain_nphy(struct brcms_phy *pi) { bool save_bbmult = false; u8 txcal_index_2057_rev5n7 = 0; @@ -23596,7 +23520,8 @@ static void wlc_phy_precal_txgain_nphy(phy_info_t *pi) } void -wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, s32 dBm_targetpower, bool debug) +wlc_phy_cal_txgainctrl_nphy(struct brcms_phy *pi, s32 dBm_targetpower, + bool debug) { int gainctrl_loopidx; uint core; @@ -23763,20 +23688,20 @@ wlc_phy_cal_txgainctrl_nphy(phy_info_t *pi, s32 dBm_targetpower, bool debug) wlc_phy_stay_in_carriersearch_nphy(pi, false); } -static void wlc_phy_update_txcal_ladder_nphy(phy_info_t *pi, u16 core) +static void wlc_phy_update_txcal_ladder_nphy(struct brcms_phy *pi, u16 core) { int index; u32 bbmult_scale; u16 bbmult; u16 tblentry; - nphy_txiqcal_ladder_t ladder_lo[] = { + struct nphy_txiqcal_ladder ladder_lo[] = { {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, {25, 0}, {25, 1}, {25, 2}, {25, 3}, {25, 4}, {25, 5}, {25, 6}, {25, 7}, {35, 7}, {50, 7}, {71, 7}, {100, 7} }; - nphy_txiqcal_ladder_t ladder_iq[] = { + struct nphy_txiqcal_ladder ladder_iq[] = { {3, 0}, {4, 0}, {6, 0}, {9, 0}, {13, 0}, {18, 0}, {25, 0}, {35, 0}, {50, 0}, {71, 0}, {100, 0}, {100, 1}, {100, 2}, {100, 3}, {100, 4}, {100, 5}, {100, 6}, {100, 7} @@ -23805,9 +23730,9 @@ static void wlc_phy_update_txcal_ladder_nphy(phy_info_t *pi, u16 core) } } -void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype) +void wlc_phy_cal_perical_nphy_run(struct brcms_phy *pi, u8 caltype) { - nphy_txgains_t target_gain; + struct nphy_txgains target_gain; u8 tx_pwr_ctrl_state; bool fullcal = true; bool restore_tx_gain = false; @@ -23842,7 +23767,7 @@ void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype) wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_phyreg_enter((wlc_phy_t *) pi); + wlc_phyreg_enter((struct brcms_phy_pub *) pi); if ((pi->mphase_cal_phase_id == MPHASE_CAL_STATE_IDLE) || (pi->mphase_cal_phase_id == MPHASE_CAL_STATE_INIT)) { @@ -23865,7 +23790,7 @@ void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype) wlc_phy_txpwrctrl_enable_nphy(pi, PHY_TPC_HW_OFF); if (pi->antsel_type == ANTSEL_2x3) - wlc_phy_antsel_init((wlc_phy_t *) pi, true); + wlc_phy_antsel_init((struct brcms_phy_pub *) pi, true); mphase = (pi->mphase_cal_phase_id != MPHASE_CAL_STATE_IDLE); if (!mphase) { @@ -23882,12 +23807,12 @@ void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype) if (PHY_IPA(pi)) wlc_phy_a4(pi, true); - wlc_phyreg_exit((wlc_phy_t *) pi); + wlc_phyreg_exit((struct brcms_phy_pub *) pi); wlapi_enable_mac(pi->sh->physhim); wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000); wlapi_suspend_mac_and_wait(pi->sh->physhim); - wlc_phyreg_enter((wlc_phy_t *) pi); + wlc_phyreg_enter((struct brcms_phy_pub *) pi); if (0 == wlc_phy_cal_rxiq_nphy(pi, target_gain, (pi-> @@ -24052,12 +23977,12 @@ void wlc_phy_cal_perical_nphy_run(phy_info_t *pi, u8 caltype) } wlc_phy_txpwrctrl_enable_nphy(pi, tx_pwr_ctrl_state); - wlc_phyreg_exit((wlc_phy_t *) pi); + wlc_phyreg_exit((struct brcms_phy_pub *) pi); wlapi_enable_mac(pi->sh->physhim); } int -wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, +wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, bool fullcal, bool mphase) { u16 val; @@ -24072,7 +23997,7 @@ wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, u16 tone_freq; u16 gain_save[2]; u16 cal_gain[2]; - nphy_iqcal_params_t cal_params[2]; + struct nphy_iqcal_params cal_params[2]; u32 tbl_len; void *tbl_ptr; bool ladder_updated[2]; @@ -24427,7 +24352,7 @@ wlc_phy_cal_txiqlo_nphy(phy_info_t *pi, nphy_txgains_t target_gain, return bcmerror; } -static void wlc_phy_reapply_txcal_coeffs_nphy(phy_info_t *pi) +static void wlc_phy_reapply_txcal_coeffs_nphy(struct brcms_phy *pi) { u16 tbl_buf[7]; @@ -24462,9 +24387,9 @@ static void wlc_phy_reapply_txcal_coeffs_nphy(phy_info_t *pi) } } -static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi) +static void wlc_phy_tx_iq_war_nphy(struct brcms_phy *pi) { - nphy_iq_comp_t tx_comp; + struct nphy_iq_comp tx_comp; wlc_phy_table_read_nphy(pi, 15, 4, 0x50, 16, (void *)&tx_comp); @@ -24475,7 +24400,8 @@ static void wlc_phy_tx_iq_war_nphy(phy_info_t *pi) } void -wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, nphy_iq_comp_t *pcomp) +wlc_phy_rx_iq_coeffs_nphy(struct brcms_phy *pi, u8 write, + struct nphy_iq_comp *pcomp) { if (write) { write_phy_reg(pi, 0x9a, pcomp->a0); @@ -24491,8 +24417,8 @@ wlc_phy_rx_iq_coeffs_nphy(phy_info_t *pi, u8 write, nphy_iq_comp_t *pcomp) } void -wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, u16 num_samps, - u8 wait_time, u8 wait_for_crs) +wlc_phy_rx_iq_est_nphy(struct brcms_phy *pi, struct phy_iq_est *est, + u16 num_samps, u8 wait_time, u8 wait_for_crs) { u8 core; @@ -24525,11 +24451,11 @@ wlc_phy_rx_iq_est_nphy(phy_info_t *pi, phy_iq_est_t *est, u16 num_samps, } #define CAL_RETRY_CNT 2 -static void wlc_phy_calc_rx_iq_comp_nphy(phy_info_t *pi, u8 core_mask) +static void wlc_phy_calc_rx_iq_comp_nphy(struct brcms_phy *pi, u8 core_mask) { u8 curr_core; - phy_iq_est_t est[PHY_CORE_MAX]; - nphy_iq_comp_t old_comp, new_comp; + struct phy_iq_est est[PHY_CORE_MAX]; + struct nphy_iq_comp old_comp, new_comp; s32 iq = 0; u32 ii = 0, qq = 0; s16 iq_nbits, qq_nbits, brsh, arsh; @@ -24634,7 +24560,8 @@ static void wlc_phy_calc_rx_iq_comp_nphy(phy_info_t *pi, u8 core_mask) } if (bcmerror != 0) { - printk("%s: Failed, cnt = %d\n", __func__, cal_retry); + printk(KERN_DEBUG "%s: Failed, cnt = %d\n", __func__, + cal_retry); if (cal_retry < CAL_RETRY_CNT) { cal_retry++; @@ -24642,13 +24569,12 @@ static void wlc_phy_calc_rx_iq_comp_nphy(phy_info_t *pi, u8 core_mask) } new_comp = old_comp; - } else if (cal_retry > 0) { } wlc_phy_rx_iq_coeffs_nphy(pi, 1, &new_comp); } -static void wlc_phy_rxcal_radio_setup_nphy(phy_info_t *pi, u8 rx_core) +static void wlc_phy_rxcal_radio_setup_nphy(struct brcms_phy *pi, u8 rx_core) { u16 offtune_val; u16 bias_g = 0; @@ -24945,7 +24871,7 @@ static void wlc_phy_rxcal_radio_setup_nphy(phy_info_t *pi, u8 rx_core) } } -static void wlc_phy_rxcal_radio_cleanup_nphy(phy_info_t *pi, u8 rx_core) +static void wlc_phy_rxcal_radio_cleanup_nphy(struct brcms_phy *pi, u8 rx_core) { if (NREV_GE(pi->pubpi.phy_rev, 7)) { if (rx_core == PHY_CORE_0) { @@ -25115,7 +25041,7 @@ static void wlc_phy_rxcal_radio_cleanup_nphy(phy_info_t *pi, u8 rx_core) } } -static void wlc_phy_rxcal_physetup_nphy(phy_info_t *pi, u8 rx_core) +static void wlc_phy_rxcal_physetup_nphy(struct brcms_phy *pi, u8 rx_core) { u8 tx_core; u16 rx_antval, tx_antval; @@ -25242,7 +25168,7 @@ static void wlc_phy_rxcal_physetup_nphy(phy_info_t *pi, u8 rx_core) } } -static void wlc_phy_rxcal_phycleanup_nphy(phy_info_t *pi, u8 rx_core) +static void wlc_phy_rxcal_phycleanup_nphy(struct brcms_phy *pi, u8 rx_core) { write_phy_reg(pi, 0xa2, pi->tx_rx_cal_phy_saveregs[0]); @@ -25269,14 +25195,14 @@ static void wlc_phy_rxcal_phycleanup_nphy(phy_info_t *pi, u8 rx_core) } static void -wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rx_core, +wlc_phy_rxcal_gainctrl_nphy_rev5(struct brcms_phy *pi, u8 rx_core, u16 *rxgain, u8 cal_type) { u16 num_samps; - phy_iq_est_t est[PHY_CORE_MAX]; + struct phy_iq_est est[PHY_CORE_MAX]; u8 tx_core; - nphy_iq_comp_t save_comp, zero_comp; + struct nphy_iq_comp save_comp, zero_comp; u32 i_pwr, q_pwr, curr_pwr, optim_pwr = 0, prev_pwr = 0, thresh_pwr = 10000; s16 desired_log2_pwr, actual_log2_pwr, delta_pwr; @@ -25285,7 +25211,7 @@ wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rx_core, s8 optim_gaintbl_index = 0, prev_gaintbl_index = 0; s8 curr_gaintbl_index = 3; u8 gainctrl_dirn = NPHY_RXCAL_GAIN_INIT; - nphy_ipa_txrxgain_t *nphy_rxcal_gaintbl; + struct nphy_ipa_txrxgain *nphy_rxcal_gaintbl; u16 hpvga, lpf_biq1, lpf_biq0, lna2, lna1; int fine_gain_idx; s8 txpwrindex; @@ -25477,14 +25403,14 @@ wlc_phy_rxcal_gainctrl_nphy_rev5(phy_info_t *pi, u8 rx_core, } static void -wlc_phy_rxcal_gainctrl_nphy(phy_info_t *pi, u8 rx_core, u16 *rxgain, +wlc_phy_rxcal_gainctrl_nphy(struct brcms_phy *pi, u8 rx_core, u16 *rxgain, u8 cal_type) { wlc_phy_rxcal_gainctrl_nphy_rev5(pi, rx_core, rxgain, cal_type); } static u8 -wlc_phy_rc_sweep_nphy(phy_info_t *pi, u8 core_idx, u8 loopback_type) +wlc_phy_rc_sweep_nphy(struct brcms_phy *pi, u8 core_idx, u8 loopback_type) { u32 target_bws[2] = { 9500, 21000 }; u32 ref_tones[2] = { 3000, 6000 }; @@ -25516,7 +25442,7 @@ wlc_phy_rc_sweep_nphy(phy_info_t *pi, u8 core_idx, u8 loopback_type) u16 rccal_val, last_rccal_val = 0, best_rccal_val = 0; u32 ref_iq_vals = 0, target_iq_vals = 0; u16 num_samps, log_num_samps = 10; - phy_iq_est_t est[PHY_CORE_MAX]; + struct phy_iq_est est[PHY_CORE_MAX]; if (NREV_GE(pi->pubpi.phy_rev, 7)) { return 0; @@ -25724,16 +25650,16 @@ wlc_phy_rc_sweep_nphy(phy_info_t *pi, u8 core_idx, u8 loopback_type) } #define WAIT_FOR_SCOPE 4000 -static int -wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t target_gain, - u8 cal_type, bool debug) +static int wlc_phy_cal_rxiq_nphy_rev3(struct brcms_phy *pi, + struct nphy_txgains target_gain, + u8 cal_type, bool debug) { u16 orig_BBConfig; u8 core_no, rx_core; u8 best_rccal[2]; u16 gain_save[2]; u16 cal_gain[2]; - nphy_iqcal_params_t cal_params[2]; + struct nphy_iqcal_params cal_params[2]; u8 rxcore_state; s8 rxlpf_rccal_hpc, txlpf_rccal_lpc; s8 txlpf_idac; @@ -25760,7 +25686,8 @@ wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t target_gain, wlc_phy_table_write_nphy(pi, NPHY_TBL_ID_RFSEQ, 2, 0x110, 16, cal_gain); - rxcore_state = wlc_phy_rxcore_getstate_nphy((wlc_phy_t *) pi); + rxcore_state = wlc_phy_rxcore_getstate_nphy( + (struct brcms_phy_pub *) pi); for (rx_core = 0; rx_core < pi->pubpi.phy_corenum; rx_core++) { @@ -25795,8 +25722,8 @@ wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t target_gain, if (rx_core == PHY_CORE_1) { if (rxcore_state == 1) { - wlc_phy_rxcore_setstate_nphy((wlc_phy_t - *) pi, 3); + wlc_phy_rxcore_setstate_nphy( + (struct brcms_phy_pub *) pi, 3); } wlc_phy_rxcal_gainctrl_nphy(pi, rx_core, NULL, @@ -25807,9 +25734,9 @@ wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t target_gain, pi->nphy_rccal_value = best_rccal[rx_core]; if (rxcore_state == 1) { - wlc_phy_rxcore_setstate_nphy((wlc_phy_t - *) pi, - rxcore_state); + wlc_phy_rxcore_setstate_nphy( + (struct brcms_phy_pub *) pi, + rxcore_state); } } } @@ -25882,10 +25809,10 @@ wlc_phy_cal_rxiq_nphy_rev3(phy_info_t *pi, nphy_txgains_t target_gain, } static int -wlc_phy_cal_rxiq_nphy_rev2(phy_info_t *pi, nphy_txgains_t target_gain, - bool debug) +wlc_phy_cal_rxiq_nphy_rev2(struct brcms_phy *pi, + struct nphy_txgains target_gain, bool debug) { - phy_iq_est_t est[PHY_CORE_MAX]; + struct phy_iq_est est[PHY_CORE_MAX]; u8 core_num, rx_core, tx_core; u16 lna_vals[] = { 0x3, 0x3, 0x1 }; u16 hpf1_vals[] = { 0x7, 0x2, 0x0 }; @@ -25901,7 +25828,7 @@ wlc_phy_cal_rxiq_nphy_rev2(phy_info_t *pi, nphy_txgains_t target_gain, u16 core_no; u16 gain_save[2]; u16 cal_gain[2]; - nphy_iqcal_params_t cal_params[2]; + struct nphy_iqcal_params cal_params[2]; u8 phy_bw; int bcmerror = 0; bool first_playtone = true; @@ -26108,7 +26035,7 @@ wlc_phy_cal_rxiq_nphy_rev2(phy_info_t *pi, nphy_txgains_t target_gain, } int -wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, +wlc_phy_cal_rxiq_nphy(struct brcms_phy *pi, struct nphy_txgains target_gain, u8 cal_type, bool debug) { if (NREV_GE(pi->pubpi.phy_rev, 7)) { @@ -26123,7 +26050,7 @@ wlc_phy_cal_rxiq_nphy(phy_info_t *pi, nphy_txgains_t target_gain, } } -static void wlc_phy_extpa_set_tx_digi_filts_nphy(phy_info_t *pi) +static void wlc_phy_extpa_set_tx_digi_filts_nphy(struct brcms_phy *pi) { int j, type = 2; u16 addr_offset = 0x2c5; @@ -26134,7 +26061,7 @@ static void wlc_phy_extpa_set_tx_digi_filts_nphy(phy_info_t *pi) } } -static void wlc_phy_ipa_set_tx_digi_filts_nphy(phy_info_t *pi) +static void wlc_phy_ipa_set_tx_digi_filts_nphy(struct brcms_phy *pi) { int j, type; u16 addr_offset[] = { 0x186, 0x195, @@ -26172,7 +26099,7 @@ static void wlc_phy_ipa_set_tx_digi_filts_nphy(phy_info_t *pi) } } -static void wlc_phy_ipa_restore_tx_digi_filts_nphy(phy_info_t *pi) +static void wlc_phy_ipa_restore_tx_digi_filts_nphy(struct brcms_phy *pi) { int j; @@ -26189,7 +26116,7 @@ static void wlc_phy_ipa_restore_tx_digi_filts_nphy(phy_info_t *pi) } } -static u16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi) +static u16 wlc_phy_ipa_get_bbmult_nphy(struct brcms_phy *pi) { u16 m0m1; @@ -26198,7 +26125,7 @@ static u16 wlc_phy_ipa_get_bbmult_nphy(phy_info_t *pi) return m0m1; } -static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1) +static void wlc_phy_ipa_set_bbmult_nphy(struct brcms_phy *pi, u8 m0, u8 m1) { u16 m0m1 = (u16) ((m0 << 8) | m1); @@ -26206,7 +26133,7 @@ static void wlc_phy_ipa_set_bbmult_nphy(phy_info_t *pi, u8 m0, u8 m1) wlc_phy_table_write_nphy(pi, 15, 1, 95, 16, &m0m1); } -static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi) +static u32 *wlc_phy_get_ipa_gaintbl_nphy(struct brcms_phy *pi) { u32 *tx_pwrctrl_tbl = NULL; @@ -26237,11 +26164,6 @@ static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi) } else if (NREV_IS(pi->pubpi.phy_rev, 6)) { tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev6; - if (pi->sh->chip == BCM47162_CHIP_ID) { - - tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; - } - } else if (NREV_IS(pi->pubpi.phy_rev, 5)) { tx_pwrctrl_tbl = nphy_tpc_txgain_ipa_rev5; @@ -26274,8 +26196,8 @@ static u32 *wlc_phy_get_ipa_gaintbl_nphy(phy_info_t *pi) } static void -wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, nphy_papd_restore_state *state, - u8 core) +wlc_phy_papd_cal_setup_nphy(struct brcms_phy *pi, + struct nphy_papd_restore_state *state, u8 core) { s32 tone_freq; u8 off_core; @@ -26544,7 +26466,8 @@ wlc_phy_papd_cal_setup_nphy(phy_info_t *pi, nphy_papd_restore_state *state, } static void -wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, nphy_papd_restore_state *state) +wlc_phy_papd_cal_cleanup_nphy(struct brcms_phy *pi, + struct nphy_papd_restore_state *state) { u8 core; @@ -26670,7 +26593,7 @@ wlc_phy_papd_cal_cleanup_nphy(phy_info_t *pi, nphy_papd_restore_state *state) } static void -wlc_phy_a1_nphy(phy_info_t *pi, u8 core, u32 winsz, u32 start, +wlc_phy_a1_nphy(struct brcms_phy *pi, u8 core, u32 winsz, u32 start, u32 end) { u32 *buf, *src, *dst, sz; @@ -26722,15 +26645,15 @@ wlc_phy_a1_nphy(phy_info_t *pi, u8 core, u32 winsz, u32 start, } static void -wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains, - phy_cal_mode_t cal_mode, u8 core) +wlc_phy_a2_nphy(struct brcms_phy *pi, struct nphy_ipa_txcalgains *txgains, + enum phy_cal_mode cal_mode, u8 core) { u16 phy_a1, phy_a2, phy_a3; u16 phy_a4, phy_a5; bool phy_a6; u8 phy_a7, m[2]; u32 phy_a8 = 0; - nphy_txgains_t phy_a9; + struct nphy_txgains phy_a9; if (NREV_LT(pi->pubpi.phy_rev, 3)) return; @@ -26781,11 +26704,8 @@ wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains, phy_a2 = 63; if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (pi->sh->chip == BCM6362_CHIP_ID) { - phy_a1 = 35; - phy_a3 = 35; - } else if ((pi->pubpi.radiorev == 4) - || (pi->pubpi.radiorev == 6)) { + if ((pi->pubpi.radiorev == 4) + || (pi->pubpi.radiorev == 6)) { phy_a1 = 30; phy_a3 = 30; } else { @@ -26891,16 +26811,10 @@ wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains, if (txgains->useindex) { phy_a4 = 15 - ((txgains->index) >> 3); if (CHSPEC_IS2G(pi->radio_chanspec)) { - if (NREV_GE(pi->pubpi.phy_rev, 6)) { + if (NREV_GE(pi->pubpi.phy_rev, 6)) phy_a5 = 0x00f7 | (phy_a4 << 8); - if (pi->sh->chip == - BCM47162_CHIP_ID) { - phy_a5 = - 0x10f7 | (phy_a4 << - 8); - } - } else + else if (NREV_IS(pi->pubpi.phy_rev, 5)) phy_a5 = 0x10f7 | (phy_a4 << 8); else @@ -27020,12 +26934,12 @@ wlc_phy_a2_nphy(phy_info_t *pi, nphy_ipa_txcalgains_t *txgains, } } -static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core) +static u8 wlc_phy_a3_nphy(struct brcms_phy *pi, u8 start_gain, u8 core) { int phy_a1; int phy_a2; bool phy_a3; - nphy_ipa_txcalgains_t phy_a4; + struct nphy_ipa_txcalgains phy_a4; bool phy_a5 = false; bool phy_a6 = true; s32 phy_a7, phy_a8; @@ -27181,10 +27095,10 @@ static u8 wlc_phy_a3_nphy(phy_info_t *pi, u8 start_gain, u8 core) } -static void wlc_phy_a4(phy_info_t *pi, bool full_cal) +static void wlc_phy_a4(struct brcms_phy *pi, bool full_cal) { - nphy_ipa_txcalgains_t phy_b1[2]; - nphy_papd_restore_state phy_b2; + struct nphy_ipa_txcalgains phy_b1[2]; + struct nphy_papd_restore_state phy_b2; bool phy_b3; u8 phy_b4; u8 phy_b5; @@ -27470,7 +27384,7 @@ static void wlc_phy_a4(phy_info_t *pi, bool full_cal) } } -void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi) +void wlc_phy_txpwr_fixpower_nphy(struct brcms_phy *pi) { uint core; u32 txgain; @@ -27528,20 +27442,20 @@ void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi) pi->nphy_txpwrindex[PHY_CORE_1].index_internal_save = txpi[1]; for (core = 0; core < pi->pubpi.phy_corenum; core++) { - if (NREV_GE(pi->pubpi.phy_rev, 3)) { + uint phyrev = pi->pubpi.phy_rev; + + if (NREV_GE(phyrev, 3)) { if (PHY_IPA(pi)) { u32 *tx_gaintbl = wlc_phy_get_ipa_gaintbl_nphy(pi); txgain = tx_gaintbl[txpi[core]]; } else { if (CHSPEC_IS5G(pi->radio_chanspec)) { - if NREV_IS - (pi->pubpi.phy_rev, 3) { + if (NREV_IS(phyrev, 3)) { txgain = nphy_tpc_5GHz_txgain_rev3 [txpi[core]]; - } else if NREV_IS - (pi->pubpi.phy_rev, 4) { + } else if (NREV_IS(phyrev, 4)) { txgain = (pi->srom_fem5g.extpagain == 3) ? @@ -27555,7 +27469,7 @@ void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi) [txpi[core]]; } } else { - if (NREV_GE(pi->pubpi.phy_rev, 5) && + if (NREV_GE(phyrev, 5) && (pi->srom_fem2g.extpagain == 3)) { txgain = nphy_tpc_txgain_HiPwrEPA @@ -27571,20 +27485,19 @@ void wlc_phy_txpwr_fixpower_nphy(phy_info_t *pi) txgain = nphy_tpc_txgain[txpi[core]]; } - if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (NREV_GE(phyrev, 3)) rad_gain = (txgain >> 16) & ((1 << (32 - 16 + 1)) - 1); - } else { + else rad_gain = (txgain >> 16) & ((1 << (28 - 16 + 1)) - 1); - } - if (NREV_GE(pi->pubpi.phy_rev, 7)) { + if (NREV_GE(phyrev, 7)) dac_gain = (txgain >> 8) & ((1 << (10 - 8 + 1)) - 1); - } else { + else dac_gain = (txgain >> 8) & ((1 << (13 - 8 + 1)) - 1); - } + bbmult = (txgain >> 0) & ((1 << (7 - 0 + 1)) - 1); - if (NREV_GE(pi->pubpi.phy_rev, 3)) { + if (NREV_GE(phyrev, 3)) { mod_phy_reg(pi, ((core == PHY_CORE_0) ? 0x8f : 0xa5), (0x1 << 8), (0x1 << 8)); } else { @@ -27682,7 +27595,7 @@ wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power, u8 rate_ofdm_start, } } -void wlc_phy_txpwr_apply_nphy(phy_info_t *pi) +void wlc_phy_txpwr_apply_nphy(struct brcms_phy *pi) { uint rate1, rate2, band_num; u8 tmp_bw40po = 0, tmp_cddpo = 0, tmp_stbcpo = 0; @@ -27880,7 +27793,7 @@ void wlc_phy_txpwr_apply_nphy(phy_info_t *pi) return; } -static void wlc_phy_txpwr_srom_read_ppr_nphy(phy_info_t *pi) +static void wlc_phy_txpwr_srom_read_ppr_nphy(struct brcms_phy *pi) { u16 bw40po, cddpo, stbcpo, bwduppo; uint band_num; @@ -28088,7 +28001,7 @@ static void wlc_phy_txpwr_srom_read_ppr_nphy(phy_info_t *pi) wlc_phy_txpwr_apply_nphy(pi); } -static bool wlc_phy_txpwr_srom_read_nphy(phy_info_t *pi) +static bool wlc_phy_txpwr_srom_read_nphy(struct brcms_phy *pi) { pi->antswitch = (u8) PHY_GETINTVAR(pi, "antswitch"); @@ -28148,7 +28061,7 @@ static bool wlc_phy_txpwr_srom_read_nphy(phy_info_t *pi) return true; } -void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi) +void wlc_phy_txpower_recalc_target_nphy(struct brcms_phy *pi) { u8 tx_pwr_ctrl_state; wlc_phy_txpwr_limit_to_tbl_nphy(pi); @@ -28168,7 +28081,7 @@ void wlc_phy_txpower_recalc_target_nphy(phy_info_t *pi) wlapi_bmac_mctrl(pi->sh->physhim, MCTL_PHYLOCK, 0); } -static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi) +static void wlc_phy_txpwrctrl_coeff_setup_nphy(struct brcms_phy *pi) { u32 idx; u16 iqloCalbuf[7]; @@ -28239,7 +28152,7 @@ static void wlc_phy_txpwrctrl_coeff_setup_nphy(phy_info_t *pi) wlc_phy_stay_in_carriersearch_nphy(pi, false); } -static void wlc_phy_ipa_internal_tssi_setup_nphy(phy_info_t *pi) +static void wlc_phy_ipa_internal_tssi_setup_nphy(struct brcms_phy *pi) { u8 core; @@ -28349,7 +28262,7 @@ static void wlc_phy_ipa_internal_tssi_setup_nphy(phy_info_t *pi) } } -static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi) +static void wlc_phy_txpwrctrl_idle_tssi_nphy(struct brcms_phy *pi) { s32 rssi_buf[4]; s32 int_val; @@ -28415,7 +28328,7 @@ static void wlc_phy_txpwrctrl_idle_tssi_nphy(phy_info_t *pi) } -static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi) +static void wlc_phy_txpwrctrl_pwr_setup_nphy(struct brcms_phy *pi) { u32 idx; s16 a1[2], b0[2], b1[2]; @@ -28652,13 +28565,13 @@ static void wlc_phy_txpwrctrl_pwr_setup_nphy(phy_info_t *pi) wlc_phy_stay_in_carriersearch_nphy(pi, false); } -static bool wlc_phy_txpwr_ison_nphy(phy_info_t *pi) +static bool wlc_phy_txpwr_ison_nphy(struct brcms_phy *pi) { return read_phy_reg((pi), 0x1e7) & ((0x1 << 15) | (0x1 << 14) | (0x1 << 13)); } -static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core) +static u8 wlc_phy_txpwr_idx_cur_get_nphy(struct brcms_phy *pi, u8 core) { u16 tmp; tmp = read_phy_reg(pi, ((core == PHY_CORE_0) ? 0x1ed : 0x1ee)); @@ -28668,7 +28581,7 @@ static u8 wlc_phy_txpwr_idx_cur_get_nphy(phy_info_t *pi, u8 core) } static void -wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, u8 idx1) +wlc_phy_txpwr_idx_cur_set_nphy(struct brcms_phy *pi, u8 idx0, u8 idx1) { mod_phy_reg(pi, 0x1e7, (0x7f << 0), idx0); @@ -28676,7 +28589,7 @@ wlc_phy_txpwr_idx_cur_set_nphy(phy_info_t *pi, u8 idx0, u8 idx1) mod_phy_reg(pi, 0x222, (0xff << 0), idx1); } -u16 wlc_phy_txpwr_idx_get_nphy(phy_info_t *pi) +u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi) { u16 tmp; u16 pwr_idx[2]; @@ -28698,7 +28611,7 @@ u16 wlc_phy_txpwr_idx_get_nphy(phy_info_t *pi) return tmp; } -void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi) +void wlc_phy_txpwr_papd_cal_nphy(struct brcms_phy *pi) { if (PHY_IPA(pi) && (pi->nphy_force_papd_cal @@ -28714,7 +28627,7 @@ void wlc_phy_txpwr_papd_cal_nphy(phy_info_t *pi) } } -void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type) +void wlc_phy_txpwrctrl_enable_nphy(struct brcms_phy *pi, u8 ctrl_type) { u16 mask = 0, val = 0, ishw = 0; u8 ctr; @@ -28783,7 +28696,7 @@ void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type) if (NREV_LT(pi->pubpi.phy_rev, 2) && IS40MHZ(pi)) wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, - MHF1_IQSWAP_WAR, WLC_BAND_ALL); + MHF1_IQSWAP_WAR, BRCM_BAND_ALL); } else { @@ -28842,7 +28755,7 @@ void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type) if (NREV_LT(pi->pubpi.phy_rev, 2) && IS40MHZ(pi)) wlapi_bmac_mhf(pi->sh->physhim, MHF1, MHF1_IQSWAP_WAR, - 0x0, WLC_BAND_ALL); + 0x0, BRCM_BAND_ALL); if (PHY_IPA(pi)) { mod_phy_reg(pi, (0 == PHY_CORE_0) ? 0x297 : @@ -28860,7 +28773,7 @@ void wlc_phy_txpwrctrl_enable_nphy(phy_info_t *pi, u8 ctrl_type) } void -wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, s8 txpwrindex, +wlc_phy_txpwr_index_nphy(struct brcms_phy *pi, u8 core_mask, s8 txpwrindex, bool restore_cals) { u8 core, txpwrctl_tbl; @@ -29099,7 +29012,7 @@ wlc_phy_txpwr_index_nphy(phy_info_t *pi, u8 core_mask, s8 txpwrindex, } void -wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, u8 *max_pwr, +wlc_phy_txpower_sromlimit_get_nphy(struct brcms_phy *pi, uint chan, u8 *max_pwr, u8 txp_rate_idx) { u8 chan_freq_range; @@ -29126,7 +29039,7 @@ wlc_phy_txpower_sromlimit_get_nphy(phy_info_t *pi, uint chan, u8 *max_pwr, return; } -void wlc_phy_stay_in_carriersearch_nphy(phy_info_t *pi, bool enable) +void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi, bool enable) { u16 clip_off[] = { 0xffff, 0xffff }; @@ -29154,7 +29067,7 @@ void wlc_phy_stay_in_carriersearch_nphy(phy_info_t *pi, bool enable) } } -void wlc_nphy_deaf_mode(phy_info_t *pi, bool mode) +void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode) { wlapi_suspend_mac_and_wait(pi->sh->physhim); diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c index c98176fd0aa..01ff0c8eb4b 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.c @@ -14,9 +14,7 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/types.h> - -#include "wlc_phy_qmath.h" +#include "phy_qmath.h" /* Description: This function make 16 bit unsigned multiplication. To fit the output into diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.h index 3dcee1c4aa6..20e3783f921 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_qmath.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_qmath.h @@ -14,8 +14,10 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef __QMATH_H__ -#define __QMATH_H__ +#ifndef _BRCM_QMATH_H_ +#define _BRCM_QMATH_H_ + +#include <types.h> u16 qm_mulu16(u16 op1, u16 op2); @@ -37,4 +39,4 @@ s16 qm_norm32(s32 op); void qm_log10(s32 N, s16 qN, s16 *log10N, s16 *qLog10N); -#endif /* #ifndef __QMATH_H__ */ +#endif /* #ifndef _BRCM_QMATH_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_radio.h index 72176ae2882..c3a675455ff 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_radio.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/phy_radio.h @@ -14,8 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _BCM20XX_H -#define _BCM20XX_H +#ifndef _BRCM_PHY_RADIO_H_ +#define _BRCM_PHY_RADIO_H_ #define RADIO_IDCODE 0x01 @@ -1530,4 +1530,4 @@ #define RADIO_2057_VCM_MASK 0x7 -#endif /* _BCM20XX_H */ +#endif /* _BRCM_PHY_RADIO_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h b/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h deleted file mode 100644 index 51a223880bc..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/phy_version.h +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef phy_version_h_ -#define phy_version_h_ - -#define PHY_MAJOR_VERSION 1 - -#define PHY_MINOR_VERSION 82 - -#define PHY_RC_NUMBER 8 - -#define PHY_INCREMENTAL_NUMBER 0 - -#define PHY_BUILD_NUMBER 0 - -#define PHY_VERSION { 1, 82, 8, 0 } - -#define PHY_VERSION_NUM 0x01520800 - -#define PHY_VERSION_STR "1.82.8.0" - -#endif /* phy_version_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h b/drivers/staging/brcm80211/brcmsmac/phy/phyreg_n.h index 211bc3a842a..a97c3a79947 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phyreg_n.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/phyreg_n.h @@ -123,13 +123,13 @@ #define NPHY_REV3_RFSEQ_CMD_CLR_RXRX_BIAS 0xf #define NPHY_REV3_RFSEQ_CMD_END 0x1f -#define NPHY_RSSI_SEL_W1 0x0 -#define NPHY_RSSI_SEL_W2 0x1 -#define NPHY_RSSI_SEL_NB 0x2 -#define NPHY_RSSI_SEL_IQ 0x3 -#define NPHY_RSSI_SEL_TSSI_2G 0x4 -#define NPHY_RSSI_SEL_TSSI_5G 0x5 -#define NPHY_RSSI_SEL_TBD 0x6 +#define NPHY_RSSI_SEL_W1 0x0 +#define NPHY_RSSI_SEL_W2 0x1 +#define NPHY_RSSI_SEL_NB 0x2 +#define NPHY_RSSI_SEL_IQ 0x3 +#define NPHY_RSSI_SEL_TSSI_2G 0x4 +#define NPHY_RSSI_SEL_TSSI_5G 0x5 +#define NPHY_RSSI_SEL_TBD 0x6 #define NPHY_RAIL_I 0x0 #define NPHY_RAIL_Q 0x1 diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c index 81c59b05482..023d05aa97a 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.c @@ -14,10 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/types.h> -#include <sbhnddma.h> -#include <wlc_phy_int.h> -#include <wlc_phytbl_lcn.h> +#include <types.h> +#include "phytbl_lcn.h" const u32 dot11lcn_gain_tbl_rev0[] = { 0x00000000, @@ -1507,7 +1505,7 @@ const u32 dot11lcn_gain_tbl_5G[] = { 0x00000000 }; -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev0[] = { +const struct phytbl_info dot11lcnphytbl_rx_gain_info_rev0[] = { {&dot11lcn_gain_tbl_rev0, sizeof(dot11lcn_gain_tbl_rev0) / sizeof(dot11lcn_gain_tbl_rev0[0]), 18, 0, 32} @@ -1522,7 +1520,7 @@ const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev0[] = { , }; -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[] = { +const struct phytbl_info dot11lcnphytbl_rx_gain_info_rev1[] = { {&dot11lcn_gain_tbl_rev1, sizeof(dot11lcn_gain_tbl_rev1) / sizeof(dot11lcn_gain_tbl_rev1[0]), 18, 0, 32} @@ -1537,7 +1535,7 @@ const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[] = { , }; -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_2G_rev2[] = { +const struct phytbl_info dot11lcnphytbl_rx_gain_info_2G_rev2[] = { {&dot11lcn_gain_tbl_2G, sizeof(dot11lcn_gain_tbl_2G) / sizeof(dot11lcn_gain_tbl_2G[0]), 18, 0, 32} @@ -1555,7 +1553,7 @@ const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_2G_rev2[] = { 17, 0, 8} }; -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_5G_rev2[] = { +const struct phytbl_info dot11lcnphytbl_rx_gain_info_5G_rev2[] = { {&dot11lcn_gain_tbl_5G, sizeof(dot11lcn_gain_tbl_5G) / sizeof(dot11lcn_gain_tbl_5G[0]), 18, 0, 32} @@ -1573,7 +1571,7 @@ const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_5G_rev2[] = { 17, 0, 8} }; -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[] = { +const struct phytbl_info dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[] = { {&dot11lcn_gain_tbl_extlna_2G, sizeof(dot11lcn_gain_tbl_extlna_2G) / sizeof(dot11lcn_gain_tbl_extlna_2G[0]), 18, 0, 32} @@ -1591,7 +1589,7 @@ const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[] = { sizeof(dot11lcn_gain_val_tbl_extlna_2G[0]), 17, 0, 8} }; -const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[] = { +const struct phytbl_info dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[] = { {&dot11lcn_gain_tbl_5G, sizeof(dot11lcn_gain_tbl_5G) / sizeof(dot11lcn_gain_tbl_5G[0]), 18, 0, 32} @@ -1610,20 +1608,20 @@ const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[] = { }; const u32 dot11lcnphytbl_rx_gain_info_sz_rev0 = - sizeof(dot11lcnphytbl_rx_gain_info_rev0) / - sizeof(dot11lcnphytbl_rx_gain_info_rev0[0]); + sizeof(dot11lcnphytbl_rx_gain_info_rev0) / + sizeof(dot11lcnphytbl_rx_gain_info_rev0[0]); const u32 dot11lcnphytbl_rx_gain_info_sz_rev1 = - sizeof(dot11lcnphytbl_rx_gain_info_rev1) / - sizeof(dot11lcnphytbl_rx_gain_info_rev1[0]); + sizeof(dot11lcnphytbl_rx_gain_info_rev1) / + sizeof(dot11lcnphytbl_rx_gain_info_rev1[0]); const u32 dot11lcnphytbl_rx_gain_info_2G_rev2_sz = - sizeof(dot11lcnphytbl_rx_gain_info_2G_rev2) / - sizeof(dot11lcnphytbl_rx_gain_info_2G_rev2[0]); + sizeof(dot11lcnphytbl_rx_gain_info_2G_rev2) / + sizeof(dot11lcnphytbl_rx_gain_info_2G_rev2[0]); const u32 dot11lcnphytbl_rx_gain_info_5G_rev2_sz = - sizeof(dot11lcnphytbl_rx_gain_info_5G_rev2) / - sizeof(dot11lcnphytbl_rx_gain_info_5G_rev2[0]); + sizeof(dot11lcnphytbl_rx_gain_info_5G_rev2) / + sizeof(dot11lcnphytbl_rx_gain_info_5G_rev2[0]); const u16 dot11lcn_min_sig_sq_tbl_rev0[] = { 0x014d, @@ -2775,7 +2773,7 @@ const u32 dot11lcn_papd_compdelta_tbl_rev0[] = { 0x00080000, }; -const dot11lcnphytbl_info_t dot11lcnphytbl_info_rev0[] = { +const struct phytbl_info dot11lcnphytbl_info_rev0[] = { {&dot11lcn_min_sig_sq_tbl_rev0, sizeof(dot11lcn_min_sig_sq_tbl_rev0) / sizeof(dot11lcn_min_sig_sq_tbl_rev0[0]), 2, 0, 16} @@ -2834,34 +2832,35 @@ const dot11lcnphytbl_info_t dot11lcnphytbl_info_rev0[] = { , }; -const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313 = { +const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313 = { &dot11lcn_sw_ctrl_tbl_4313_rev0, sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0) / sizeof(dot11lcn_sw_ctrl_tbl_4313_rev0[0]), 15, 0, 16 }; -const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa = { +const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_epa = { &dot11lcn_sw_ctrl_tbl_4313_epa_rev0, sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0) / sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0[0]), 15, 0, 16 }; -const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa = { +const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_bt_epa = { &dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo, sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo) / sizeof(dot11lcn_sw_ctrl_tbl_4313_epa_rev0_combo[0]), 15, 0, 16 }; -const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250 = { +const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250 = { &dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0, sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0) / sizeof(dot11lcn_sw_ctrl_tbl_4313_bt_epa_p250_rev0[0]), 15, 0, 16 }; const u32 dot11lcnphytbl_info_sz_rev0 = - sizeof(dot11lcnphytbl_info_rev0) / sizeof(dot11lcnphytbl_info_rev0[0]); + sizeof(dot11lcnphytbl_info_rev0) / sizeof(dot11lcnphytbl_info_rev0[0]); -const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_extPA_gaintable_rev0[128] = { +const struct lcnphy_tx_gain_tbl_entry +dot11lcnphy_2GHz_extPA_gaintable_rev0[128] = { {3, 0, 31, 0, 72,} , {3, 0, 31, 0, 70,} @@ -3120,7 +3119,7 @@ const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_extPA_gaintable_rev0[128] = { , }; -const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[128] = { +const struct lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[128] = { {7, 0, 31, 0, 72,} , {7, 0, 31, 0, 70,} @@ -3379,7 +3378,7 @@ const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[128] = { , }; -const lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[128] = { +const struct lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[128] = { {255, 255, 0xf0, 0, 152,} , {255, 255, 0xf0, 0, 147,} diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.h index 5a64a988d10..5f75e16bf5a 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_lcn.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_lcn.h @@ -14,36 +14,41 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -typedef phytbl_info_t dot11lcnphytbl_info_t; +#include <types.h> +#include "phy_int.h" -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev0[]; +extern const struct phytbl_info dot11lcnphytbl_rx_gain_info_rev0[]; extern const u32 dot11lcnphytbl_rx_gain_info_sz_rev0; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa; -extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_epa_combo; +extern const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313; +extern const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_epa; +extern const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_epa_combo; +extern const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_bt_epa; +extern const struct phytbl_info dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250; -extern const dot11lcnphytbl_info_t dot11lcnphytbl_info_rev0[]; +extern const struct phytbl_info dot11lcnphytbl_info_rev0[]; extern const u32 dot11lcnphytbl_info_sz_rev0; -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_2G_rev2[]; +extern const struct phytbl_info dot11lcnphytbl_rx_gain_info_2G_rev2[]; extern const u32 dot11lcnphytbl_rx_gain_info_2G_rev2_sz; -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_5G_rev2[]; +extern const struct phytbl_info dot11lcnphytbl_rx_gain_info_5G_rev2[]; extern const u32 dot11lcnphytbl_rx_gain_info_5G_rev2_sz; -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[]; +extern const struct phytbl_info dot11lcnphytbl_rx_gain_info_extlna_2G_rev2[]; -extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[]; +extern const struct phytbl_info dot11lcnphytbl_rx_gain_info_extlna_5G_rev2[]; -typedef struct { +struct lcnphy_tx_gain_tbl_entry { unsigned char gm; unsigned char pga; unsigned char pad; unsigned char dac; unsigned char bb_mult; -} lcnphy_tx_gain_tbl_entry; +}; -extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[]; -extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_extPA_gaintable_rev0[]; +extern const struct lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_gaintable_rev0[]; -extern const lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[]; +extern const struct +lcnphy_tx_gain_tbl_entry dot11lcnphy_2GHz_extPA_gaintable_rev0[]; + +extern const struct lcnphy_tx_gain_tbl_entry dot11lcnphy_5GHz_gaintable_rev0[]; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c index 742df997a3b..7f741f4868a 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.c +++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.c @@ -14,11 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> - -#include <sbhnddma.h> -#include <wlc_phy_int.h> -#include <wlc_phytbl_n.h> +#include <types.h> +#include "phytbl_n.h" const u32 frame_struct_rev0[] = { 0x08004a04, @@ -4439,7 +4436,7 @@ const u16 loft_lut_core1_rev0[] = { 0x0103, }; -const mimophytbl_info_t mimophytbl_info_rev0_volatile[] = { +const struct phytbl_info mimophytbl_info_rev0_volatile[] = { {&bdi_tbl_rev0, sizeof(bdi_tbl_rev0) / sizeof(bdi_tbl_rev0[0]), 21, 0, 16} , @@ -4487,7 +4484,7 @@ const mimophytbl_info_t mimophytbl_info_rev0_volatile[] = { , }; -const mimophytbl_info_t mimophytbl_info_rev0[] = { +const struct phytbl_info mimophytbl_info_rev0[] = { {&frame_struct_rev0, sizeof(frame_struct_rev0) / sizeof(frame_struct_rev0[0]), 10, 0, 32} , @@ -4538,10 +4535,10 @@ const mimophytbl_info_t mimophytbl_info_rev0[] = { }; const u32 mimophytbl_info_sz_rev0 = - sizeof(mimophytbl_info_rev0) / sizeof(mimophytbl_info_rev0[0]); + sizeof(mimophytbl_info_rev0) / sizeof(mimophytbl_info_rev0[0]); const u32 mimophytbl_info_sz_rev0_volatile = - sizeof(mimophytbl_info_rev0_volatile) / - sizeof(mimophytbl_info_rev0_volatile[0]); + sizeof(mimophytbl_info_rev0_volatile) / + sizeof(mimophytbl_info_rev0_volatile[0]); const u16 ant_swctrl_tbl_rev3[] = { 0x0082, @@ -9364,34 +9361,34 @@ const u32 papd_cal_scalars_tbl_core1_rev3[] = { 0x002606a4, }; -const mimophytbl_info_t mimophytbl_info_rev3_volatile[] = { +const struct phytbl_info mimophytbl_info_rev3_volatile[] = { {&ant_swctrl_tbl_rev3, sizeof(ant_swctrl_tbl_rev3) / sizeof(ant_swctrl_tbl_rev3[0]), 9, 0, 16} , }; -const mimophytbl_info_t mimophytbl_info_rev3_volatile1[] = { +const struct phytbl_info mimophytbl_info_rev3_volatile1[] = { {&ant_swctrl_tbl_rev3_1, sizeof(ant_swctrl_tbl_rev3_1) / sizeof(ant_swctrl_tbl_rev3_1[0]), 9, 0, 16} , }; -const mimophytbl_info_t mimophytbl_info_rev3_volatile2[] = { +const struct phytbl_info mimophytbl_info_rev3_volatile2[] = { {&ant_swctrl_tbl_rev3_2, sizeof(ant_swctrl_tbl_rev3_2) / sizeof(ant_swctrl_tbl_rev3_2[0]), 9, 0, 16} , }; -const mimophytbl_info_t mimophytbl_info_rev3_volatile3[] = { +const struct phytbl_info mimophytbl_info_rev3_volatile3[] = { {&ant_swctrl_tbl_rev3_3, sizeof(ant_swctrl_tbl_rev3_3) / sizeof(ant_swctrl_tbl_rev3_3[0]), 9, 0, 16} , }; -const mimophytbl_info_t mimophytbl_info_rev3[] = { +const struct phytbl_info mimophytbl_info_rev3[] = { {&frame_struct_rev3, sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32} , @@ -9478,19 +9475,19 @@ const mimophytbl_info_t mimophytbl_info_rev3[] = { }; const u32 mimophytbl_info_sz_rev3 = - sizeof(mimophytbl_info_rev3) / sizeof(mimophytbl_info_rev3[0]); + sizeof(mimophytbl_info_rev3) / sizeof(mimophytbl_info_rev3[0]); const u32 mimophytbl_info_sz_rev3_volatile = - sizeof(mimophytbl_info_rev3_volatile) / - sizeof(mimophytbl_info_rev3_volatile[0]); + sizeof(mimophytbl_info_rev3_volatile) / + sizeof(mimophytbl_info_rev3_volatile[0]); const u32 mimophytbl_info_sz_rev3_volatile1 = - sizeof(mimophytbl_info_rev3_volatile1) / - sizeof(mimophytbl_info_rev3_volatile1[0]); + sizeof(mimophytbl_info_rev3_volatile1) / + sizeof(mimophytbl_info_rev3_volatile1[0]); const u32 mimophytbl_info_sz_rev3_volatile2 = - sizeof(mimophytbl_info_rev3_volatile2) / - sizeof(mimophytbl_info_rev3_volatile2[0]); + sizeof(mimophytbl_info_rev3_volatile2) / + sizeof(mimophytbl_info_rev3_volatile2[0]); const u32 mimophytbl_info_sz_rev3_volatile3 = - sizeof(mimophytbl_info_rev3_volatile3) / - sizeof(mimophytbl_info_rev3_volatile3[0]); + sizeof(mimophytbl_info_rev3_volatile3) / + sizeof(mimophytbl_info_rev3_volatile3[0]); const u32 tmap_tbl_rev7[] = { 0x8a88aa80, @@ -10470,7 +10467,7 @@ const u32 papd_cal_scalars_tbl_core1_rev7[] = { 0x004e068c, }; -const mimophytbl_info_t mimophytbl_info_rev7[] = { +const struct phytbl_info mimophytbl_info_rev7[] = { {&frame_struct_rev3, sizeof(frame_struct_rev3) / sizeof(frame_struct_rev3[0]), 10, 0, 32} , @@ -10582,9 +10579,9 @@ const mimophytbl_info_t mimophytbl_info_rev7[] = { }; const u32 mimophytbl_info_sz_rev7 = - sizeof(mimophytbl_info_rev7) / sizeof(mimophytbl_info_rev7[0]); + sizeof(mimophytbl_info_rev7) / sizeof(mimophytbl_info_rev7[0]); -const mimophytbl_info_t mimophytbl_info_rev16[] = { +const struct phytbl_info mimophytbl_info_rev16[] = { {&noise_var_tbl_rev7, sizeof(noise_var_tbl_rev7) / sizeof(noise_var_tbl_rev7[0]), 16, 0, 32} , @@ -10629,4 +10626,4 @@ const mimophytbl_info_t mimophytbl_info_rev16[] = { }; const u32 mimophytbl_info_sz_rev16 = - sizeof(mimophytbl_info_rev16) / sizeof(mimophytbl_info_rev16[0]); + sizeof(mimophytbl_info_rev16) / sizeof(mimophytbl_info_rev16[0]); diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h index 396122f5e50..c5266cf2372 100644 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phytbl_n.h +++ b/drivers/staging/brcm80211/brcmsmac/phy/phytbl_n.h @@ -16,24 +16,25 @@ #define ANT_SWCTRL_TBL_REV3_IDX (0) -typedef phytbl_info_t mimophytbl_info_t; +#include <types.h> +#include "phy_int.h" -extern const mimophytbl_info_t mimophytbl_info_rev0[], - mimophytbl_info_rev0_volatile[]; +extern const struct phytbl_info mimophytbl_info_rev0[], + mimophytbl_info_rev0_volatile[]; extern const u32 mimophytbl_info_sz_rev0, mimophytbl_info_sz_rev0_volatile; -extern const mimophytbl_info_t mimophytbl_info_rev3[], - mimophytbl_info_rev3_volatile[], mimophytbl_info_rev3_volatile1[], - mimophytbl_info_rev3_volatile2[], mimophytbl_info_rev3_volatile3[]; +extern const struct phytbl_info mimophytbl_info_rev3[], + mimophytbl_info_rev3_volatile[], mimophytbl_info_rev3_volatile1[], + mimophytbl_info_rev3_volatile2[], mimophytbl_info_rev3_volatile3[]; extern const u32 mimophytbl_info_sz_rev3, mimophytbl_info_sz_rev3_volatile, - mimophytbl_info_sz_rev3_volatile1, mimophytbl_info_sz_rev3_volatile2, - mimophytbl_info_sz_rev3_volatile3; + mimophytbl_info_sz_rev3_volatile1, mimophytbl_info_sz_rev3_volatile2, + mimophytbl_info_sz_rev3_volatile3; extern const u32 noise_var_tbl_rev3[]; -extern const mimophytbl_info_t mimophytbl_info_rev7[]; +extern const struct phytbl_info mimophytbl_info_rev7[]; extern const u32 mimophytbl_info_sz_rev7; extern const u32 noise_var_tbl_rev7[]; -extern const mimophytbl_info_t mimophytbl_info_rev16[]; +extern const struct phytbl_info mimophytbl_info_rev16[]; extern const u32 mimophytbl_info_sz_rev16; diff --git a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h b/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h deleted file mode 100644 index 8939153efa5..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/phy/wlc_phy_hal.h +++ /dev/null @@ -1,256 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wlc_phy_h_ -#define _wlc_phy_h_ - -#include <wlioctl.h> -#include <aiutils.h> -#include <d11.h> -#include <wlc_phy_shim.h> -#include <net/mac80211.h> /* struct wiphy */ - -#define IDCODE_VER_MASK 0x0000000f -#define IDCODE_VER_SHIFT 0 -#define IDCODE_MFG_MASK 0x00000fff -#define IDCODE_MFG_SHIFT 0 -#define IDCODE_ID_MASK 0x0ffff000 -#define IDCODE_ID_SHIFT 12 -#define IDCODE_REV_MASK 0xf0000000 -#define IDCODE_REV_SHIFT 28 - -#define NORADIO_ID 0xe4f5 -#define NORADIO_IDCODE 0x4e4f5246 - -#define BCM2055_ID 0x2055 -#define BCM2055_IDCODE 0x02055000 -#define BCM2055A0_IDCODE 0x1205517f - -#define BCM2056_ID 0x2056 -#define BCM2056_IDCODE 0x02056000 -#define BCM2056A0_IDCODE 0x1205617f - -#define BCM2057_ID 0x2057 -#define BCM2057_IDCODE 0x02057000 -#define BCM2057A0_IDCODE 0x1205717f - -#define BCM2064_ID 0x2064 -#define BCM2064_IDCODE 0x02064000 -#define BCM2064A0_IDCODE 0x0206417f - -#define PHY_TPC_HW_OFF false -#define PHY_TPC_HW_ON true - -#define PHY_PERICAL_DRIVERUP 1 -#define PHY_PERICAL_WATCHDOG 2 -#define PHY_PERICAL_PHYINIT 3 -#define PHY_PERICAL_JOIN_BSS 4 -#define PHY_PERICAL_START_IBSS 5 -#define PHY_PERICAL_UP_BSS 6 -#define PHY_PERICAL_CHAN 7 -#define PHY_FULLCAL 8 - -#define PHY_PERICAL_DISABLE 0 -#define PHY_PERICAL_SPHASE 1 -#define PHY_PERICAL_MPHASE 2 -#define PHY_PERICAL_MANUAL 3 - -#define PHY_HOLD_FOR_ASSOC 1 -#define PHY_HOLD_FOR_SCAN 2 -#define PHY_HOLD_FOR_RM 4 -#define PHY_HOLD_FOR_PLT 8 -#define PHY_HOLD_FOR_MUTE 16 -#define PHY_HOLD_FOR_NOT_ASSOC 0x20 - -#define PHY_MUTE_FOR_PREISM 1 -#define PHY_MUTE_ALL 0xffffffff - -#define PHY_NOISE_FIXED_VAL (-95) -#define PHY_NOISE_FIXED_VAL_NPHY (-92) -#define PHY_NOISE_FIXED_VAL_LCNPHY (-92) - -#define PHY_MODE_CAL 0x0002 -#define PHY_MODE_NOISEM 0x0004 - -#define WLC_TXPWR_DB_FACTOR 4 - -#define WLC_NUM_RATES_CCK 4 -#define WLC_NUM_RATES_OFDM 8 -#define WLC_NUM_RATES_MCS_1_STREAM 8 -#define WLC_NUM_RATES_MCS_2_STREAM 8 -#define WLC_NUM_RATES_MCS_3_STREAM 8 -#define WLC_NUM_RATES_MCS_4_STREAM 8 -typedef struct txpwr_limits { - u8 cck[WLC_NUM_RATES_CCK]; - u8 ofdm[WLC_NUM_RATES_OFDM]; - - u8 ofdm_cdd[WLC_NUM_RATES_OFDM]; - - u8 ofdm_40_siso[WLC_NUM_RATES_OFDM]; - u8 ofdm_40_cdd[WLC_NUM_RATES_OFDM]; - - u8 mcs_20_siso[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_20_cdd[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_20_stbc[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_20_mimo[WLC_NUM_RATES_MCS_2_STREAM]; - - u8 mcs_40_siso[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_40_cdd[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_40_stbc[WLC_NUM_RATES_MCS_1_STREAM]; - u8 mcs_40_mimo[WLC_NUM_RATES_MCS_2_STREAM]; - u8 mcs32; -} txpwr_limits_t; - -typedef struct { - u8 vec[MAXCHANNEL / NBBY]; -} chanvec_t; - -struct rpc_info; -typedef struct shared_phy shared_phy_t; - -struct phy_pub; - -typedef struct phy_pub wlc_phy_t; - -typedef struct shared_phy_params { - si_t *sih; - void *physhim; - uint unit; - uint corerev; - uint bustype; - uint buscorerev; - char *vars; - u16 vid; - u16 did; - uint chip; - uint chiprev; - uint chippkg; - uint sromrev; - uint boardtype; - uint boardrev; - uint boardvendor; - u32 boardflags; - u32 boardflags2; -} shared_phy_params_t; - - -extern shared_phy_t *wlc_phy_shared_attach(shared_phy_params_t *shp); -extern void wlc_phy_shared_detach(shared_phy_t *phy_sh); -extern wlc_phy_t *wlc_phy_attach(shared_phy_t *sh, void *regs, int bandtype, - char *vars, struct wiphy *wiphy); -extern void wlc_phy_detach(wlc_phy_t *ppi); - -extern bool wlc_phy_get_phyversion(wlc_phy_t *pih, u16 *phytype, - u16 *phyrev, u16 *radioid, - u16 *radiover); -extern bool wlc_phy_get_encore(wlc_phy_t *pih); -extern u32 wlc_phy_get_coreflags(wlc_phy_t *pih); - -extern void wlc_phy_hw_clk_state_upd(wlc_phy_t *ppi, bool newstate); -extern void wlc_phy_hw_state_upd(wlc_phy_t *ppi, bool newstate); -extern void wlc_phy_init(wlc_phy_t *ppi, chanspec_t chanspec); -extern void wlc_phy_watchdog(wlc_phy_t *ppi); -extern int wlc_phy_down(wlc_phy_t *ppi); -extern u32 wlc_phy_clk_bwbits(wlc_phy_t *pih); -extern void wlc_phy_cal_init(wlc_phy_t *ppi); -extern void wlc_phy_antsel_init(wlc_phy_t *ppi, bool lut_init); - -extern void wlc_phy_chanspec_set(wlc_phy_t *ppi, chanspec_t chanspec); -extern chanspec_t wlc_phy_chanspec_get(wlc_phy_t *ppi); -extern void wlc_phy_chanspec_radio_set(wlc_phy_t *ppi, chanspec_t newch); -extern u16 wlc_phy_bw_state_get(wlc_phy_t *ppi); -extern void wlc_phy_bw_state_set(wlc_phy_t *ppi, u16 bw); - -extern void wlc_phy_rssi_compute(wlc_phy_t *pih, void *ctx); -extern void wlc_phy_por_inform(wlc_phy_t *ppi); -extern void wlc_phy_noise_sample_intr(wlc_phy_t *ppi); -extern bool wlc_phy_bist_check_phy(wlc_phy_t *ppi); - -extern void wlc_phy_set_deaf(wlc_phy_t *ppi, bool user_flag); - -extern void wlc_phy_switch_radio(wlc_phy_t *ppi, bool on); -extern void wlc_phy_anacore(wlc_phy_t *ppi, bool on); - - -extern void wlc_phy_BSSinit(wlc_phy_t *ppi, bool bonlyap, int rssi); - -extern void wlc_phy_chanspec_ch14_widefilter_set(wlc_phy_t *ppi, - bool wide_filter); -extern void wlc_phy_chanspec_band_validch(wlc_phy_t *ppi, uint band, - chanvec_t *channels); -extern chanspec_t wlc_phy_chanspec_band_firstch(wlc_phy_t *ppi, uint band); - -extern void wlc_phy_txpower_sromlimit(wlc_phy_t *ppi, uint chan, - u8 *_min_, u8 *_max_, int rate); -extern void wlc_phy_txpower_sromlimit_max_get(wlc_phy_t *ppi, uint chan, - u8 *_max_, u8 *_min_); -extern void wlc_phy_txpower_boardlimit_band(wlc_phy_t *ppi, uint band, s32 *, - s32 *, u32 *); -extern void wlc_phy_txpower_limit_set(wlc_phy_t *ppi, struct txpwr_limits *, - chanspec_t chanspec); -extern int wlc_phy_txpower_get(wlc_phy_t *ppi, uint *qdbm, bool *override); -extern int wlc_phy_txpower_set(wlc_phy_t *ppi, uint qdbm, bool override); -extern void wlc_phy_txpower_target_set(wlc_phy_t *ppi, struct txpwr_limits *); -extern bool wlc_phy_txpower_hw_ctrl_get(wlc_phy_t *ppi); -extern void wlc_phy_txpower_hw_ctrl_set(wlc_phy_t *ppi, bool hwpwrctrl); -extern u8 wlc_phy_txpower_get_target_min(wlc_phy_t *ppi); -extern u8 wlc_phy_txpower_get_target_max(wlc_phy_t *ppi); -extern bool wlc_phy_txpower_ipa_ison(wlc_phy_t *pih); - -extern void wlc_phy_stf_chain_init(wlc_phy_t *pih, u8 txchain, - u8 rxchain); -extern void wlc_phy_stf_chain_set(wlc_phy_t *pih, u8 txchain, - u8 rxchain); -extern void wlc_phy_stf_chain_get(wlc_phy_t *pih, u8 *txchain, - u8 *rxchain); -extern u8 wlc_phy_stf_chain_active_get(wlc_phy_t *pih); -extern s8 wlc_phy_stf_ssmode_get(wlc_phy_t *pih, chanspec_t chanspec); -extern void wlc_phy_ldpc_override_set(wlc_phy_t *ppi, bool val); - -extern void wlc_phy_cal_perical(wlc_phy_t *ppi, u8 reason); -extern void wlc_phy_noise_sample_request_external(wlc_phy_t *ppi); -extern void wlc_phy_edcrs_lock(wlc_phy_t *pih, bool lock); -extern void wlc_phy_cal_papd_recal(wlc_phy_t *ppi); - -extern void wlc_phy_ant_rxdiv_set(wlc_phy_t *ppi, u8 val); -extern bool wlc_phy_ant_rxdiv_get(wlc_phy_t *ppi, u8 *pval); -extern void wlc_phy_clear_tssi(wlc_phy_t *ppi); -extern void wlc_phy_hold_upd(wlc_phy_t *ppi, mbool id, bool val); -extern void wlc_phy_mute_upd(wlc_phy_t *ppi, bool val, mbool flags); - -extern void wlc_phy_antsel_type_set(wlc_phy_t *ppi, u8 antsel_type); - -extern void wlc_phy_txpower_get_current(wlc_phy_t *ppi, tx_power_t *power, - uint channel); - -extern void wlc_phy_initcal_enable(wlc_phy_t *pih, bool initcal); -extern bool wlc_phy_test_ison(wlc_phy_t *ppi); -extern void wlc_phy_txpwr_percent_set(wlc_phy_t *ppi, u8 txpwr_percent); -extern void wlc_phy_ofdm_rateset_war(wlc_phy_t *pih, bool war); -extern void wlc_phy_bf_preempt_enable(wlc_phy_t *pih, bool bf_preempt); -extern void wlc_phy_machwcap_set(wlc_phy_t *ppi, u32 machwcap); - -extern void wlc_phy_runbist_config(wlc_phy_t *ppi, bool start_end); - -extern void wlc_phy_freqtrack_start(wlc_phy_t *ppi); -extern void wlc_phy_freqtrack_end(wlc_phy_t *ppi); - -extern const u8 *wlc_phy_get_ofdm_rate_lookup(void); - -extern s8 wlc_phy_get_tx_power_offset_by_mcs(wlc_phy_t *ppi, - u8 mcs_offset); -extern s8 wlc_phy_get_tx_power_offset(wlc_phy_t *ppi, u8 tbl_offset); -#endif /* _wlc_phy_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/phy_shim.c b/drivers/staging/brcm80211/brcmsmac/phy_shim.c new file mode 100644 index 00000000000..82ecdcda271 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.c @@ -0,0 +1,218 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer. + * WL driver can optinally call this translation layer to do some preprocessing, then reach PHY. + * On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the + * access to wlc_hw pointer. + */ +#include <linux/slab.h> +#include <net/mac80211.h> + +#include "bmac.h" +#include "main.h" +#include "mac80211_if.h" +#include "phy_shim.h" + +/* PHY SHIM module specific state */ +struct phy_shim_info { + struct brcms_hardware *wlc_hw; /* pointer to main wlc_hw structure */ + void *wlc; /* pointer to main wlc structure */ + void *wl; /* pointer to os-specific private state */ +}; + +struct phy_shim_info *wlc_phy_shim_attach(struct brcms_hardware *wlc_hw, + void *wl, void *wlc) { + struct phy_shim_info *physhim = NULL; + + physhim = kzalloc(sizeof(struct phy_shim_info), GFP_ATOMIC); + if (!physhim) { + wiphy_err(wlc_hw->wlc->wiphy, + "wl%d: wlc_phy_shim_attach: out of mem\n", + wlc_hw->unit); + return NULL; + } + physhim->wlc_hw = wlc_hw; + physhim->wlc = wlc; + physhim->wl = wl; + + return physhim; +} + +void wlc_phy_shim_detach(struct phy_shim_info *physhim) +{ + kfree(physhim); +} + +struct wlapi_timer *wlapi_init_timer(struct phy_shim_info *physhim, + void (*fn) (void *arg), void *arg, + const char *name) +{ + return (struct wlapi_timer *) + brcms_init_timer(physhim->wl, fn, arg, name); +} + +void wlapi_free_timer(struct phy_shim_info *physhim, struct wlapi_timer *t) +{ + brcms_free_timer(physhim->wl, (struct brcms_timer *)t); +} + +void +wlapi_add_timer(struct phy_shim_info *physhim, struct wlapi_timer *t, uint ms, + int periodic) +{ + brcms_add_timer(physhim->wl, (struct brcms_timer *)t, ms, periodic); +} + +bool wlapi_del_timer(struct phy_shim_info *physhim, struct wlapi_timer *t) +{ + return brcms_del_timer(physhim->wl, (struct brcms_timer *)t); +} + +void wlapi_intrson(struct phy_shim_info *physhim) +{ + brcms_intrson(physhim->wl); +} + +u32 wlapi_intrsoff(struct phy_shim_info *physhim) +{ + return brcms_intrsoff(physhim->wl); +} + +void wlapi_intrsrestore(struct phy_shim_info *physhim, u32 macintmask) +{ + brcms_intrsrestore(physhim->wl, macintmask); +} + +void wlapi_bmac_write_shm(struct phy_shim_info *physhim, uint offset, u16 v) +{ + brcms_b_write_shm(physhim->wlc_hw, offset, v); +} + +u16 wlapi_bmac_read_shm(struct phy_shim_info *physhim, uint offset) +{ + return brcms_b_read_shm(physhim->wlc_hw, offset); +} + +void +wlapi_bmac_mhf(struct phy_shim_info *physhim, u8 idx, u16 mask, + u16 val, int bands) +{ + brcms_b_mhf(physhim->wlc_hw, idx, mask, val, bands); +} + +void wlapi_bmac_corereset(struct phy_shim_info *physhim, u32 flags) +{ + brcms_b_corereset(physhim->wlc_hw, flags); +} + +void wlapi_suspend_mac_and_wait(struct phy_shim_info *physhim) +{ + brcms_c_suspend_mac_and_wait(physhim->wlc); +} + +void wlapi_switch_macfreq(struct phy_shim_info *physhim, u8 spurmode) +{ + brcms_b_switch_macfreq(physhim->wlc_hw, spurmode); +} + +void wlapi_enable_mac(struct phy_shim_info *physhim) +{ + brcms_c_enable_mac(physhim->wlc); +} + +void wlapi_bmac_mctrl(struct phy_shim_info *physhim, u32 mask, u32 val) +{ + brcms_b_mctrl(physhim->wlc_hw, mask, val); +} + +void wlapi_bmac_phy_reset(struct phy_shim_info *physhim) +{ + brcms_b_phy_reset(physhim->wlc_hw); +} + +void wlapi_bmac_bw_set(struct phy_shim_info *physhim, u16 bw) +{ + brcms_b_bw_set(physhim->wlc_hw, bw); +} + +u16 wlapi_bmac_get_txant(struct phy_shim_info *physhim) +{ + return brcms_b_get_txant(physhim->wlc_hw); +} + +void wlapi_bmac_phyclk_fgc(struct phy_shim_info *physhim, bool clk) +{ + brcms_b_phyclk_fgc(physhim->wlc_hw, clk); +} + +void wlapi_bmac_macphyclk_set(struct phy_shim_info *physhim, bool clk) +{ + brcms_b_macphyclk_set(physhim->wlc_hw, clk); +} + +void wlapi_bmac_core_phypll_ctl(struct phy_shim_info *physhim, bool on) +{ + brcms_b_core_phypll_ctl(physhim->wlc_hw, on); +} + +void wlapi_bmac_core_phypll_reset(struct phy_shim_info *physhim) +{ + brcms_b_core_phypll_reset(physhim->wlc_hw); +} + +void wlapi_bmac_ucode_wake_override_phyreg_set(struct phy_shim_info *physhim) +{ + brcms_c_ucode_wake_override_set(physhim->wlc_hw, + BRCMS_WAKE_OVERRIDE_PHYREG); +} + +void wlapi_bmac_ucode_wake_override_phyreg_clear(struct phy_shim_info *physhim) +{ + brcms_c_ucode_wake_override_clear(physhim->wlc_hw, + BRCMS_WAKE_OVERRIDE_PHYREG); +} + +void +wlapi_bmac_write_template_ram(struct phy_shim_info *physhim, int offset, + int len, void *buf) +{ + brcms_b_write_template_ram(physhim->wlc_hw, offset, len, buf); +} + +u16 wlapi_bmac_rate_shm_offset(struct phy_shim_info *physhim, u8 rate) +{ + return brcms_b_rate_shm_offset(physhim->wlc_hw, rate); +} + +void wlapi_ucode_sample_init(struct phy_shim_info *physhim) +{ +} + +void +wlapi_copyfrom_objmem(struct phy_shim_info *physhim, uint offset, void *buf, + int len, u32 sel) +{ + brcms_b_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel); +} + +void +wlapi_copyto_objmem(struct phy_shim_info *physhim, uint offset, const void *buf, + int l, u32 sel) +{ + brcms_b_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel); +} diff --git a/drivers/staging/brcm80211/brcmsmac/phy_shim.h b/drivers/staging/brcm80211/brcmsmac/phy_shim.h new file mode 100644 index 00000000000..2d12bb4400f --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/phy_shim.h @@ -0,0 +1,164 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +/* + * phy_shim.h: stuff defined in phy_shim.c and included only by the phy + */ + +#ifndef _BRCM_PHY_SHIM_H_ +#define _BRCM_PHY_SHIM_H_ + +#include "types.h" + +#define RADAR_TYPE_NONE 0 /* Radar type None */ +#define RADAR_TYPE_ETSI_1 1 /* ETSI 1 Radar type */ +#define RADAR_TYPE_ETSI_2 2 /* ETSI 2 Radar type */ +#define RADAR_TYPE_ETSI_3 3 /* ETSI 3 Radar type */ +#define RADAR_TYPE_ITU_E 4 /* ITU E Radar type */ +#define RADAR_TYPE_ITU_K 5 /* ITU K Radar type */ +#define RADAR_TYPE_UNCLASSIFIED 6 /* Unclassified Radar type */ +#define RADAR_TYPE_BIN5 7 /* long pulse radar type */ +#define RADAR_TYPE_STG2 8 /* staggered-2 radar */ +#define RADAR_TYPE_STG3 9 /* staggered-3 radar */ +#define RADAR_TYPE_FRA 10 /* French radar */ + +/* French radar pulse widths */ +#define FRA_T1_20MHZ 52770 +#define FRA_T2_20MHZ 61538 +#define FRA_T3_20MHZ 66002 +#define FRA_T1_40MHZ 105541 +#define FRA_T2_40MHZ 123077 +#define FRA_T3_40MHZ 132004 +#define FRA_ERR_20MHZ 60 +#define FRA_ERR_40MHZ 120 + +#define ANTSEL_NA 0 /* No boardlevel selection available */ +#define ANTSEL_2x4 1 /* 2x4 boardlevel selection available */ +#define ANTSEL_2x3 2 /* 2x3 CB2 boardlevel selection available */ + +/* Rx Antenna diversity control values */ +#define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */ +#define ANT_RX_DIV_FORCE_1 1 /* Use antenna 1 */ +#define ANT_RX_DIV_START_1 2 /* Choose starting with 1 */ +#define ANT_RX_DIV_START_0 3 /* Choose starting with 0 */ +#define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */ +#define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 /* default antdiv setting */ + +#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */ +#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */ +#define WL_ANT_IDX_1 0 /* antenna index 1 */ +#define WL_ANT_IDX_2 1 /* antenna index 2 */ + +/* values for n_preamble_type */ +#define BRCMS_N_PREAMBLE_MIXEDMODE 0 +#define BRCMS_N_PREAMBLE_GF 1 +#define BRCMS_N_PREAMBLE_GF_BRCM 2 + +#define WL_TX_POWER_RATES_LEGACY 45 +#define WL_TX_POWER_MCS20_FIRST 12 +#define WL_TX_POWER_MCS20_NUM 16 +#define WL_TX_POWER_MCS40_FIRST 28 +#define WL_TX_POWER_MCS40_NUM 17 + + +#define WL_TX_POWER_RATES 101 +#define WL_TX_POWER_CCK_FIRST 0 +#define WL_TX_POWER_CCK_NUM 4 +#define WL_TX_POWER_OFDM_FIRST 4 /* Index for first 20MHz OFDM SISO rate */ +#define WL_TX_POWER_OFDM20_CDD_FIRST 12 /* Index for first 20MHz OFDM CDD rate */ +#define WL_TX_POWER_OFDM40_SISO_FIRST 52 /* Index for first 40MHz OFDM SISO rate */ +#define WL_TX_POWER_OFDM40_CDD_FIRST 60 /* Index for first 40MHz OFDM CDD rate */ +#define WL_TX_POWER_OFDM_NUM 8 +#define WL_TX_POWER_MCS20_SISO_FIRST 20 /* Index for first 20MHz MCS SISO rate */ +#define WL_TX_POWER_MCS20_CDD_FIRST 28 /* Index for first 20MHz MCS CDD rate */ +#define WL_TX_POWER_MCS20_STBC_FIRST 36 /* Index for first 20MHz MCS STBC rate */ +#define WL_TX_POWER_MCS20_SDM_FIRST 44 /* Index for first 20MHz MCS SDM rate */ +#define WL_TX_POWER_MCS40_SISO_FIRST 68 /* Index for first 40MHz MCS SISO rate */ +#define WL_TX_POWER_MCS40_CDD_FIRST 76 /* Index for first 40MHz MCS CDD rate */ +#define WL_TX_POWER_MCS40_STBC_FIRST 84 /* Index for first 40MHz MCS STBC rate */ +#define WL_TX_POWER_MCS40_SDM_FIRST 92 /* Index for first 40MHz MCS SDM rate */ +#define WL_TX_POWER_MCS_1_STREAM_NUM 8 +#define WL_TX_POWER_MCS_2_STREAM_NUM 8 +#define WL_TX_POWER_MCS_32 100 /* Index for 40MHz rate MCS 32 */ +#define WL_TX_POWER_MCS_32_NUM 1 + +/* sslpnphy specifics */ +#define WL_TX_POWER_MCS20_SISO_FIRST_SSN 12 /* Index for first 20MHz MCS SISO rate */ + +/* struct tx_power::flags bits */ +#define WL_TX_POWER_F_ENABLED 1 +#define WL_TX_POWER_F_HW 2 +#define WL_TX_POWER_F_MIMO 4 +#define WL_TX_POWER_F_SISO 8 + +/* values to force tx/rx chain */ +#define BRCMS_N_TXRX_CHAIN0 0 +#define BRCMS_N_TXRX_CHAIN1 1 + +extern struct phy_shim_info *wlc_phy_shim_attach(struct brcms_hardware *wlc_hw, + void *wl, void *wlc); +extern void wlc_phy_shim_detach(struct phy_shim_info *physhim); + +/* PHY to WL utility functions */ +extern struct wlapi_timer *wlapi_init_timer(struct phy_shim_info *physhim, + void (*fn) (void *arg), void *arg, + const char *name); +extern void wlapi_free_timer(struct phy_shim_info *physhim, + struct wlapi_timer *t); +extern void wlapi_add_timer(struct phy_shim_info *physhim, + struct wlapi_timer *t, uint ms, int periodic); +extern bool wlapi_del_timer(struct phy_shim_info *physhim, + struct wlapi_timer *t); +extern void wlapi_intrson(struct phy_shim_info *physhim); +extern u32 wlapi_intrsoff(struct phy_shim_info *physhim); +extern void wlapi_intrsrestore(struct phy_shim_info *physhim, + u32 macintmask); + +extern void wlapi_bmac_write_shm(struct phy_shim_info *physhim, uint offset, + u16 v); +extern u16 wlapi_bmac_read_shm(struct phy_shim_info *physhim, uint offset); +extern void wlapi_bmac_mhf(struct phy_shim_info *physhim, u8 idx, + u16 mask, u16 val, int bands); +extern void wlapi_bmac_corereset(struct phy_shim_info *physhim, u32 flags); +extern void wlapi_suspend_mac_and_wait(struct phy_shim_info *physhim); +extern void wlapi_switch_macfreq(struct phy_shim_info *physhim, u8 spurmode); +extern void wlapi_enable_mac(struct phy_shim_info *physhim); +extern void wlapi_bmac_mctrl(struct phy_shim_info *physhim, u32 mask, + u32 val); +extern void wlapi_bmac_phy_reset(struct phy_shim_info *physhim); +extern void wlapi_bmac_bw_set(struct phy_shim_info *physhim, u16 bw); +extern void wlapi_bmac_phyclk_fgc(struct phy_shim_info *physhim, bool clk); +extern void wlapi_bmac_macphyclk_set(struct phy_shim_info *physhim, bool clk); +extern void wlapi_bmac_core_phypll_ctl(struct phy_shim_info *physhim, bool on); +extern void wlapi_bmac_core_phypll_reset(struct phy_shim_info *physhim); +extern void wlapi_bmac_ucode_wake_override_phyreg_set(struct phy_shim_info * + physhim); +extern void wlapi_bmac_ucode_wake_override_phyreg_clear(struct phy_shim_info * + physhim); +extern void wlapi_bmac_write_template_ram(struct phy_shim_info *physhim, int o, + int len, void *buf); +extern u16 wlapi_bmac_rate_shm_offset(struct phy_shim_info *physhim, + u8 rate); +extern void wlapi_ucode_sample_init(struct phy_shim_info *physhim); +extern void wlapi_copyfrom_objmem(struct phy_shim_info *physhim, uint, + void *buf, int, u32 sel); +extern void wlapi_copyto_objmem(struct phy_shim_info *physhim, uint, + const void *buf, int, u32); + +extern void wlapi_high_update_phy_mode(struct phy_shim_info *physhim, + u32 phy_mode); +extern u16 wlapi_bmac_get_txant(struct phy_shim_info *physhim); +#endif /* _BRCM_PHY_SHIM_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/pmu.c b/drivers/staging/brcm80211/brcmsmac/pmu.c new file mode 100644 index 00000000000..e8b2b81d2d0 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/pmu.c @@ -0,0 +1,474 @@ +/* + * Copyright (c) 2011 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#include <linux/delay.h> +#include <linux/io.h> + +#include <brcm_hw_ids.h> +#include <chipcommon.h> +#include <brcmu_utils.h> +#include "pub.h" +#include "aiutils.h" +#include "pmu.h" + +/* + * external LPO crystal frequency + */ +#define EXT_ILP_HZ 32768 + +/* + * Duration for ILP clock frequency measurment in milliseconds + * + * remark: 1000 must be an integer multiple of this duration + */ +#define ILP_CALC_DUR 10 + +/* Fields in pmucontrol */ +#define PCTL_ILP_DIV_MASK 0xffff0000 +#define PCTL_ILP_DIV_SHIFT 16 +#define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */ +#define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */ +#define PCTL_HT_REQ_EN 0x00000100 +#define PCTL_ALP_REQ_EN 0x00000080 +#define PCTL_XTALFREQ_MASK 0x0000007c +#define PCTL_XTALFREQ_SHIFT 2 +#define PCTL_ILP_DIV_EN 0x00000002 +#define PCTL_LPO_SEL 0x00000001 + +/* ILP clock */ +#define ILP_CLOCK 32000 + +/* ALP clock on pre-PMU chips */ +#define ALP_CLOCK 20000000 + +/* pmustatus */ +#define PST_EXTLPOAVAIL 0x0100 +#define PST_WDRESET 0x0080 +#define PST_INTPEND 0x0040 +#define PST_SBCLKST 0x0030 +#define PST_SBCLKST_ILP 0x0010 +#define PST_SBCLKST_ALP 0x0020 +#define PST_SBCLKST_HT 0x0030 +#define PST_ALPAVAIL 0x0008 +#define PST_HTAVAIL 0x0004 +#define PST_RESINIT 0x0003 + +/* PMU resource bit position */ +#define PMURES_BIT(bit) (1 << (bit)) + +/* PMU corerev and chip specific PLL controls. + * PMU<rev>_PLL<num>_XX where <rev> is PMU corerev and <num> is an arbitrary number + * to differentiate different PLLs controlled by the same PMU rev. + */ +/* pllcontrol registers */ +/* ndiv_pwrdn, pwrdn_ch<x>, refcomp_pwrdn, dly_ch<x>, p1div, p2div, _bypass_sdmod */ +#define PMU1_PLL0_PLLCTL0 0 +#define PMU1_PLL0_PLLCTL1 1 +#define PMU1_PLL0_PLLCTL2 2 +#define PMU1_PLL0_PLLCTL3 3 +#define PMU1_PLL0_PLLCTL4 4 +#define PMU1_PLL0_PLLCTL5 5 + +/* pmu XtalFreqRatio */ +#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF +#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000 +#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31 + +/* 4313 resources */ +#define RES4313_BB_PU_RSRC 0 +#define RES4313_ILP_REQ_RSRC 1 +#define RES4313_XTAL_PU_RSRC 2 +#define RES4313_ALP_AVAIL_RSRC 3 +#define RES4313_RADIO_PU_RSRC 4 +#define RES4313_BG_PU_RSRC 5 +#define RES4313_VREG1P4_PU_RSRC 6 +#define RES4313_AFE_PWRSW_RSRC 7 +#define RES4313_RX_PWRSW_RSRC 8 +#define RES4313_TX_PWRSW_RSRC 9 +#define RES4313_BB_PWRSW_RSRC 10 +#define RES4313_SYNTH_PWRSW_RSRC 11 +#define RES4313_MISC_PWRSW_RSRC 12 +#define RES4313_BB_PLL_PWRSW_RSRC 13 +#define RES4313_HT_AVAIL_RSRC 14 +#define RES4313_MACPHY_CLK_AVAIL_RSRC 15 + +/* Determine min/max rsrc masks. Value 0 leaves hardware at default. */ +static void si_pmu_res_masks(struct si_pub *sih, u32 * pmin, u32 * pmax) +{ + u32 min_mask = 0, max_mask = 0; + uint rsrcs; + + /* # resources */ + rsrcs = (sih->pmucaps & PCAP_RC_MASK) >> PCAP_RC_SHIFT; + + /* determine min/max rsrc masks */ + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + /* ??? */ + break; + + case BCM4313_CHIP_ID: + min_mask = PMURES_BIT(RES4313_BB_PU_RSRC) | + PMURES_BIT(RES4313_XTAL_PU_RSRC) | + PMURES_BIT(RES4313_ALP_AVAIL_RSRC) | + PMURES_BIT(RES4313_BB_PLL_PWRSW_RSRC); + max_mask = 0xffff; + break; + default: + break; + } + + *pmin = min_mask; + *pmax = max_mask; +} + +static void +si_pmu_spuravoid_pllupdate(struct si_pub *sih, chipcregs_t *cc, u8 spuravoid) +{ + u32 tmp = 0; + + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + if (spuravoid == 1) { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11500010); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x000C0C06); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x0F600a08); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + W_REG(&cc->pllcontrol_data, 0x00000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x2001E920); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888815); + } else { + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11100010); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x000c0c06); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x03000a08); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + W_REG(&cc->pllcontrol_data, 0x00000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x200005c0); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888815); + } + tmp = 1 << 10; + break; + + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); + W_REG(&cc->pllcontrol_data, 0x11100008); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); + W_REG(&cc->pllcontrol_data, 0x0c000c06); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); + W_REG(&cc->pllcontrol_data, 0x03000a08); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); + W_REG(&cc->pllcontrol_data, 0x00000000); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); + W_REG(&cc->pllcontrol_data, 0x200005c0); + W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); + W_REG(&cc->pllcontrol_data, 0x88888855); + + tmp = 1 << 10; + break; + + default: + /* bail out */ + return; + } + + tmp |= R_REG(&cc->pmucontrol); + W_REG(&cc->pmucontrol, tmp); +} + +u32 si_pmu_ilp_clock(struct si_pub *sih) +{ + static u32 ilpcycles_per_sec; + + if (!PMUCTL_ENAB(sih)) + return ILP_CLOCK; + + if (ilpcycles_per_sec == 0) { + u32 start, end, delta; + u32 origidx = ai_coreidx(sih); + chipcregs_t *cc = ai_setcoreidx(sih, SI_CC_IDX); + start = R_REG(&cc->pmutimer); + mdelay(ILP_CALC_DUR); + end = R_REG(&cc->pmutimer); + delta = end - start; + ilpcycles_per_sec = delta * (1000 / ILP_CALC_DUR); + ai_setcoreidx(sih, origidx); + } + + return ilpcycles_per_sec; +} + +u16 si_pmu_fast_pwrup_delay(struct si_pub *sih) +{ + uint delay = PMU_MAX_TRANSITION_DLY; + + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + case BCM4313_CHIP_ID: + delay = 3700; + break; + default: + break; + } + + return (u16) delay; +} + +void si_pmu_sprom_enable(struct si_pub *sih, bool enable) +{ + chipcregs_t *cc; + uint origidx; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +/* Read/write a chipcontrol reg */ +u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) +{ + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_addr), ~0, + reg); + return ai_corereg(sih, SI_CC_IDX, + offsetof(chipcregs_t, chipcontrol_data), mask, val); +} + +/* Read/write a regcontrol reg */ +u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) +{ + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), ~0, + reg); + return ai_corereg(sih, SI_CC_IDX, + offsetof(chipcregs_t, regcontrol_data), mask, val); +} + +/* Read/write a pllcontrol reg */ +u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val) +{ + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pllcontrol_addr), ~0, + reg); + return ai_corereg(sih, SI_CC_IDX, + offsetof(chipcregs_t, pllcontrol_data), mask, val); +} + +/* PMU PLL update */ +void si_pmu_pllupd(struct si_pub *sih) +{ + ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pmucontrol), + PCTL_PLL_PLLCTL_UPD, PCTL_PLL_PLLCTL_UPD); +} + +/* query alp/xtal clock frequency */ +u32 si_pmu_alp_clock(struct si_pub *sih) +{ + u32 clock = ALP_CLOCK; + + /* bail out with default */ + if (!PMUCTL_ENAB(sih)) + return clock; + + switch (sih->chip) { + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + case BCM4313_CHIP_ID: + /* always 20Mhz */ + clock = 20000 * 1000; + break; + default: + break; + } + + return clock; +} + +void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid) +{ + chipcregs_t *cc; + uint origidx, intr_val; + + /* Remember original core before switch to chipc */ + cc = (chipcregs_t *) ai_switch_core(sih, CC_CORE_ID, &origidx, + &intr_val); + + /* update the pll changes */ + si_pmu_spuravoid_pllupdate(sih, cc, spuravoid); + + /* Return to original core */ + ai_restore_core(sih, origidx, intr_val); +} + +/* initialize PMU */ +void si_pmu_init(struct si_pub *sih) +{ + chipcregs_t *cc; + uint origidx; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + if (sih->pmurev == 1) + AND_REG(&cc->pmucontrol, ~PCTL_NOILP_ON_WAIT); + else if (sih->pmurev >= 2) + OR_REG(&cc->pmucontrol, PCTL_NOILP_ON_WAIT); + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +/* initialize PMU chip controls and other chip level stuff */ +void si_pmu_chip_init(struct si_pub *sih) +{ + uint origidx; + + /* Gate off SPROM clock and chip select signals */ + si_pmu_sprom_enable(sih, false); + + /* Remember original core */ + origidx = ai_coreidx(sih); + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +/* initialize PMU switch/regulators */ +void si_pmu_swreg_init(struct si_pub *sih) +{ +} + +/* initialize PLL */ +void si_pmu_pll_init(struct si_pub *sih, uint xtalfreq) +{ + chipcregs_t *cc; + uint origidx; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + switch (sih->chip) { + case BCM4313_CHIP_ID: + case BCM43224_CHIP_ID: + case BCM43225_CHIP_ID: + /* ??? */ + break; + default: + break; + } + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +/* initialize PMU resources */ +void si_pmu_res_init(struct si_pub *sih) +{ + chipcregs_t *cc; + uint origidx; + u32 min_mask = 0, max_mask = 0; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + /* Determine min/max rsrc masks */ + si_pmu_res_masks(sih, &min_mask, &max_mask); + + /* It is required to program max_mask first and then min_mask */ + + /* Program max resource mask */ + + if (max_mask) + W_REG(&cc->max_res_mask, max_mask); + + /* Program min resource mask */ + + if (min_mask) + W_REG(&cc->min_res_mask, min_mask); + + /* Add some delay; allow resources to come up and settle. */ + mdelay(2); + + /* Return to original core */ + ai_setcoreidx(sih, origidx); +} + +u32 si_pmu_measure_alpclk(struct si_pub *sih) +{ + chipcregs_t *cc; + uint origidx; + u32 alp_khz; + + if (sih->pmurev < 10) + return 0; + + /* Remember original core before switch to chipc */ + origidx = ai_coreidx(sih); + cc = ai_setcoreidx(sih, SI_CC_IDX); + + if (R_REG(&cc->pmustatus) & PST_EXTLPOAVAIL) { + u32 ilp_ctr, alp_hz; + + /* + * Enable the reg to measure the freq, + * in case it was disabled before + */ + W_REG(&cc->pmu_xtalfreq, + 1U << PMU_XTALFREQ_REG_MEASURE_SHIFT); + + /* Delay for well over 4 ILP clocks */ + udelay(1000); + + /* Read the latched number of ALP ticks per 4 ILP ticks */ + ilp_ctr = + R_REG(&cc->pmu_xtalfreq) & PMU_XTALFREQ_REG_ILPCTR_MASK; + + /* + * Turn off the PMU_XTALFREQ_REG_MEASURE_SHIFT + * bit to save power + */ + W_REG(&cc->pmu_xtalfreq, 0); + + /* Calculate ALP frequency */ + alp_hz = (ilp_ctr * EXT_ILP_HZ) / 4; + + /* + * Round to nearest 100KHz, and at + * the same time convert to KHz + */ + alp_khz = (alp_hz + 50000) / 100000 * 100; + } else + alp_khz = 0; + + /* Return to original core */ + ai_setcoreidx(sih, origidx); + + return alp_khz; +} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h b/drivers/staging/brcm80211/brcmsmac/pmu.h index bd5b809b2e3..0c7e48c4bcd 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.h +++ b/drivers/staging/brcm80211/brcmsmac/pmu.h @@ -15,13 +15,10 @@ */ -#ifndef WLC_PMU_H_ -#define WLC_PMU_H_ - -#include <linux/types.h> - -#include <aiutils.h> +#ifndef _BRCM_PMU_H_ +#define _BRCM_PMU_H_ +#include "types.h" /* * LDO selections used in si_pmu_set_ldo_voltage */ @@ -36,23 +33,20 @@ #define SET_LDO_VOLTAGE_LNLDO1 9 #define SET_LDO_VOLTAGE_LNLDO2_SEL 10 -extern void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage); -extern u16 si_pmu_fast_pwrup_delay(si_t *sih); -extern void si_pmu_sprom_enable(si_t *sih, bool enable); -extern u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val); -extern u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val); -extern u32 si_pmu_ilp_clock(si_t *sih); -extern u32 si_pmu_alp_clock(si_t *sih); -extern void si_pmu_pllupd(si_t *sih); -extern void si_pmu_spuravoid(si_t *sih, u8 spuravoid); -extern u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val); -extern void si_pmu_init(si_t *sih); -extern void si_pmu_chip_init(si_t *sih); -extern void si_pmu_pll_init(si_t *sih, u32 xtalfreq); -extern void si_pmu_res_init(si_t *sih); -extern void si_pmu_swreg_init(si_t *sih); -extern u32 si_pmu_measure_alpclk(si_t *sih); -extern bool si_pmu_is_otp_powered(si_t *sih); -extern void si_pmu_otp_power(si_t *sih, bool on); +extern u16 si_pmu_fast_pwrup_delay(struct si_pub *sih); +extern void si_pmu_sprom_enable(struct si_pub *sih, bool enable); +extern u32 si_pmu_chipcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern u32 si_pmu_regcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern u32 si_pmu_ilp_clock(struct si_pub *sih); +extern u32 si_pmu_alp_clock(struct si_pub *sih); +extern void si_pmu_pllupd(struct si_pub *sih); +extern void si_pmu_spuravoid(struct si_pub *sih, u8 spuravoid); +extern u32 si_pmu_pllcontrol(struct si_pub *sih, uint reg, u32 mask, u32 val); +extern void si_pmu_init(struct si_pub *sih); +extern void si_pmu_chip_init(struct si_pub *sih); +extern void si_pmu_pll_init(struct si_pub *sih, u32 xtalfreq); +extern void si_pmu_res_init(struct si_pub *sih); +extern void si_pmu_swreg_init(struct si_pub *sih); +extern u32 si_pmu_measure_alpclk(struct si_pub *sih); -#endif /* WLC_PMU_H_ */ +#endif /* _BRCM_PMU_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h b/drivers/staging/brcm80211/brcmsmac/pub.h index 9334deacda1..01d74609560 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pub.h +++ b/drivers/staging/brcm80211/brcmsmac/pub.h @@ -14,10 +14,14 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_pub_h_ -#define _wlc_pub_h_ +#ifndef _BRCM_PUB_H_ +#define _BRCM_PUB_H_ -#define WLC_NUMRATES 16 /* max # of rates in a rateset */ +#include <brcmu_wifi.h> +#include "types.h" +#include "defs.h" + +#define BRCMS_NUMRATES 16 /* max # of rates in a rateset */ #define MAXMULTILIST 32 /* max # multicast addresses */ #define D11_PHY_HDR_LEN 6 /* Phy header length - 6 bytes */ @@ -32,36 +36,37 @@ #define PHY_TYPE_HT 7 /* Phy type 3-Stream N */ /* bw */ -#define WLC_10_MHZ 10 /* 10Mhz nphy channel bandwidth */ -#define WLC_20_MHZ 20 /* 20Mhz nphy channel bandwidth */ -#define WLC_40_MHZ 40 /* 40Mhz nphy channel bandwidth */ +#define BRCMS_10_MHZ 10 /* 10Mhz nphy channel bandwidth */ +#define BRCMS_20_MHZ 20 /* 20Mhz nphy channel bandwidth */ +#define BRCMS_40_MHZ 40 /* 40Mhz nphy channel bandwidth */ -#define CHSPEC_WLC_BW(chanspec) (CHSPEC_IS40(chanspec) ? WLC_40_MHZ : \ - CHSPEC_IS20(chanspec) ? WLC_20_MHZ : \ - WLC_10_MHZ) +#define CHSPEC_WLC_BW(chanspec) (CHSPEC_IS40(chanspec) ? BRCMS_40_MHZ : \ + CHSPEC_IS20(chanspec) ? BRCMS_20_MHZ : \ + BRCMS_10_MHZ) -#define WLC_RSSI_MINVAL -200 /* Low value, e.g. for forcing roam */ -#define WLC_RSSI_NO_SIGNAL -91 /* NDIS RSSI link quality cutoffs */ -#define WLC_RSSI_VERY_LOW -80 /* Very low quality cutoffs */ -#define WLC_RSSI_LOW -70 /* Low quality cutoffs */ -#define WLC_RSSI_GOOD -68 /* Good quality cutoffs */ -#define WLC_RSSI_VERY_GOOD -58 /* Very good quality cutoffs */ -#define WLC_RSSI_EXCELLENT -57 /* Excellent quality cutoffs */ +#define BRCMS_RSSI_MINVAL -200 /* Low value, e.g. for forcing roam */ +#define BRCMS_RSSI_NO_SIGNAL -91 /* NDIS RSSI link quality cutoffs */ +#define BRCMS_RSSI_VERY_LOW -80 /* Very low quality cutoffs */ +#define BRCMS_RSSI_LOW -70 /* Low quality cutoffs */ +#define BRCMS_RSSI_GOOD -68 /* Good quality cutoffs */ +#define BRCMS_RSSI_VERY_GOOD -58 /* Very good quality cutoffs */ +#define BRCMS_RSSI_EXCELLENT -57 /* Excellent quality cutoffs */ -#define WLC_PHYTYPE(_x) (_x) /* macro to perform WLC PHY -> D11 PHY TYPE, currently 1:1 */ +/* macro to perform PHY -> D11 PHY TYPE, currently 1:1 */ +#define BRCMS_PHYTYPE(_x) (_x) #define MA_WINDOW_SZ 8 /* moving average window size */ -#define WLC_SNR_INVALID 0 /* invalid SNR value */ +#define BRCMS_SNR_INVALID 0 /* invalid SNR value */ /* a large TX Power as an init value to factor out of min() calculations, * keep low enough to fit in an s8, units are .25 dBm */ -#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ +#define BRCMS_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ /* rate related definitions */ -#define WLC_RATE_FLAG 0x80 /* Flag to indicate it is a basic rate */ -#define WLC_RATE_MASK 0x7f /* Rate value mask w/o basic rate flag */ +#define BRCMS_RATE_FLAG 0x80 /* Flag to indicate it is a basic rate */ +#define BRCMS_RATE_MASK 0x7f /* Rate value mask w/o basic rate flag */ /* legacy rx Antenna diversity for SISO rates */ #define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */ @@ -96,9 +101,13 @@ #define AIDMAPSZ (roundup(MAXSCB, NBBY)/NBBY) /* aid bitmap size in bytes */ #endif /* AIDMAPSZ */ -struct ieee80211_tx_queue_params; +#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ + +#define WL_SPURAVOID_OFF 0 +#define WL_SPURAVOID_ON1 1 +#define WL_SPURAVOID_ON2 2 -typedef struct wlc_tunables { +struct brcms_tunables { int ntxd; /* size of tx descriptor table */ int nrxd; /* size of rx descriptor table */ int rxbufsz; /* size of rx buffers to post */ @@ -114,14 +123,15 @@ typedef struct wlc_tunables { int rxbnd; /* max # of rx bufs to process before deferring to dpc */ int txsbnd; /* max # tx status to process in wlc_txstatus() */ int memreserved; /* memory reserved for BMAC's USB dma rx */ -} wlc_tunables_t; +}; -typedef struct wlc_rateset { +struct brcms_rateset { uint count; /* number of rates in rates[] */ - u8 rates[WLC_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ + /* rates in 500kbps units w/hi bit set if basic */ + u8 rates[BRCMS_NUMRATES]; u8 htphy_membership; /* HT PHY Membership */ u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ -} wlc_rateset_t; +}; struct rsn_parms { u8 flags; /* misc booleans (e.g., supported) */ @@ -134,7 +144,6 @@ struct rsn_parms { }; /* - * buffer length needed for wlc_format_ssid * 32 SSID chars, max of 4 chars for each SSID char "\xFF", plus NULL. */ #define SSID_FMT_BUF_LEN ((4 * IEEE80211_MAX_SSID_LEN) + 1) @@ -152,8 +161,8 @@ struct rsn_parms { IEEE80211_HT_CAP_SUP_WIDTH_20_40 | IEEE80211_HT_CAP_GRN_FLD |\ IEEE80211_HT_CAP_MAX_AMSDU | IEEE80211_HT_CAP_DSSSCCK40) -/* wlc internal bss_info, wl external one is in wlioctl.h */ -typedef struct wlc_bss_info { +/* wlc internal bss_info */ +struct brcms_bss_info { u8 BSSID[ETH_ALEN]; /* network BSSID */ u16 flags; /* flags for internal attributes */ u8 SSID_len; /* the length of SSID */ @@ -168,7 +177,7 @@ typedef struct wlc_bss_info { u8 dtim_period; /* DTIM period */ s8 phy_noise; /* noise right after tx (in dBm) */ u16 capability; /* Capability information */ - u8 wme_qosinfo; /* QoS Info from WME IE; valid if WLC_BSS_WME flag set */ + u8 wme_qosinfo; /* QoS Info from WME IE; valid if BSS_WME flag set */ struct rsn_parms wpa; struct rsn_parms wpa2; u16 qbss_load_aac; /* qbss load available admission capacity */ @@ -176,21 +185,7 @@ typedef struct wlc_bss_info { u8 qbss_load_chan_free; /* indicates how free the channel is */ u8 mcipher; /* multicast cipher */ u8 wpacfg; /* wpa config index */ -} wlc_bss_info_t; - -/* forward declarations */ -struct wlc_if; - -/* wlc_ioctl error codes */ -#define WLC_ENOIOCTL 1 /* No such Ioctl */ -#define WLC_EINVAL 2 /* Invalid value */ -#define WLC_ETOOSMALL 3 /* Value too small */ -#define WLC_ETOOBIG 4 /* Value too big */ -#define WLC_ERANGE 5 /* Out of range */ -#define WLC_EDOWN 6 /* Down */ -#define WLC_EUP 7 /* Up */ -#define WLC_ENOMEM 8 /* No Memory */ -#define WLC_EBUSY 9 /* Busy */ +}; /* IOVar flags for common error checks */ #define IOVF_MFG (1<<3) /* flag for mfgtest iovars */ @@ -211,7 +206,7 @@ struct wlc_if; /* watchdog down and dump callback function proto's */ typedef int (*watchdog_fn_t) (void *handle); typedef int (*down_fn_t) (void *handle); -typedef int (*dump_fn_t) (void *handle, struct bcmstrbuf *b); +typedef int (*dump_fn_t) (void *handle, struct brcmu_strbuf *b); /* IOVar handler * @@ -222,14 +217,14 @@ typedef int (*dump_fn_t) (void *handle, struct bcmstrbuf *b); * params/plen - parameters and length for a get, input only. * arg/len - buffer and length for value to be set or retrieved, input or output. * vsize - value size, valid for integer type only. - * wlcif - interface context (wlc_if pointer) + * wlcif - interface context (brcms_c_if pointer) * * All pointers may point into the same buffer. */ -typedef int (*iovar_fn_t) (void *handle, const bcm_iovar_t *vi, +typedef int (*iovar_fn_t) (void *handle, const struct brcmu_iovar *vi, u32 actionid, const char *name, void *params, uint plen, void *arg, int alen, int vsize, - struct wlc_if *wlcif); + struct brcms_c_if *wlcif); #define MAC80211_PROMISC_BCNS (1 << 0) #define MAC80211_SCAN (1 << 1) @@ -238,20 +233,21 @@ typedef int (*iovar_fn_t) (void *handle, const bcm_iovar_t *vi, * Public portion of "common" os-independent state structure. * The wlc handle points at this. */ -struct wlc_pub { +struct brcms_pub { void *wlc; struct ieee80211_hw *ieee_hw; struct scb *global_scb; - scb_ampdu_t *global_ampdu; + struct scb_ampdu *global_ampdu; uint mac80211_state; uint unit; /* device instance number */ uint corerev; /* core revision */ - si_t *sih; /* SB handle (cookie for siutils calls) */ + struct si_pub *sih; /* SI handle (cookie for siutils calls) */ char *vars; /* "environment" name=value */ bool up; /* interface up and running */ bool hw_off; /* HW is off */ - wlc_tunables_t *tunables; /* tunables: ntxd, nrxd, maxscb, etc. */ + /* tunables: ntxd, nrxd, maxscb, etc. */ + struct brcms_tunables *tunables; bool hw_up; /* one time hw up/down(from boot or hibernation) */ bool _piomode; /* true if pio mode *//* BMAC_NOTE: NEED In both */ uint _nbands; /* # bands supported */ @@ -307,13 +303,10 @@ struct wlc_pub { u16 boardrev; /* version # of particular board */ u8 sromrev; /* version # of the srom */ - char srom_ccode[WLC_CNTRY_BUF_SZ]; /* Country Code in SROM */ + char srom_ccode[BRCM_CNTRY_BUF_SZ]; /* Country Code in SROM */ u32 boardflags; /* Board specific flags from srom */ u32 boardflags2; /* More board flags if sromrev >= 4 */ bool tempsense_disable; /* disable periodic tempsense check */ - - bool _lmac; /* lmac module included and enabled */ - bool _lmacproto; /* lmac protocol module included and enabled */ bool phy_11ncapable; /* the PHY/HW is capable of 802.11N */ bool _ampdumac; /* mac assist ampdu enabled or not */ @@ -321,7 +314,7 @@ struct wlc_pub { }; /* wl_monitor rx status per packet */ -typedef struct wl_rxsts { +struct wl_rxsts { uint pkterror; /* error flags per pkt */ uint phytype; /* 802.11 A/B/G ... */ uint channel; /* channel */ @@ -335,8 +328,8 @@ typedef struct wl_rxsts { uint preamble; /* Unknown, short, long */ uint encoding; /* Unknown, CCK, PBCC, OFDM */ uint nfrmtype; /* special 802.11n frames(AMPDU, AMSDU) */ - struct wl_if *wlif; /* wl interface */ -} wl_rxsts_t; + struct brcms_if *wlif; /* wl interface */ +}; /* status per error RX pkt */ #define WL_RXS_CRC_ERROR 0x00000001 /* CRC Error in packet */ @@ -371,13 +364,12 @@ typedef struct wl_rxsts { #define WL_RXS_NFRM_AMSDU_FIRST 0x00000004 /* first MSDU in A-MSDU */ #define WL_RXS_NFRM_AMSDU_SUB 0x00000008 /* subsequent MSDU(s) in A-MSDU */ -/* forward declare and use the struct notation so we don't have to - * have it defined if not necessary. - */ -struct wlc_info; -struct wlc_hw_info; -struct wlc_bsscfg; -struct wlc_if; +enum wlc_par_id { + IOV_MPC = 1, + IOV_RTSTHRESH, + IOV_QTXPOWER, + IOV_BCN_LI_BCN /* Beacon listen interval in # of beacons */ +}; /*********************************************** * Feature-related macros to optimize out code * @@ -426,149 +418,238 @@ struct wlc_if; #define PROMISC_ENAB(wlc) ((wlc)->promisc) -#define WLC_PREC_COUNT 16 /* Max precedence level implemented */ +#define BRCMS_PREC_COUNT 16 /* Max precedence level implemented */ /* pri is priority encoded in the packet. This maps the Packet priority to * enqueue precedence as defined in wlc_prec_map */ extern const u8 wlc_prio2prec_map[]; -#define WLC_PRIO_TO_PREC(pri) wlc_prio2prec_map[(pri) & 7] +#define BRCMS_PRIO_TO_PREC(pri) wlc_prio2prec_map[(pri) & 7] /* This maps priority to one precedence higher - Used by PS-Poll response packets to * simulate enqueue-at-head operation, but still maintain the order on the queue */ -#define WLC_PRIO_TO_HI_PREC(pri) min(WLC_PRIO_TO_PREC(pri) + 1, WLC_PREC_COUNT - 1) +#define BRCMS_PRIO_TO_HI_PREC(pri) min(BRCMS_PRIO_TO_PREC(pri) + 1,\ + BRCMS_PREC_COUNT - 1) extern const u8 wme_fifo2ac[]; #define WME_PRIO2AC(prio) wme_fifo2ac[prio2fifo[(prio)]] /* Mask to describe all precedence levels */ -#define WLC_PREC_BMP_ALL MAXBITVAL(WLC_PREC_COUNT) +#define BRCMS_PREC_BMP_ALL MAXBITVAL(BRCMS_PREC_COUNT) /* Define a bitmap of precedences comprised by each AC */ -#define WLC_PREC_BMP_AC_BE (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_BE)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_BE)) | \ - NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_EE)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_EE))) -#define WLC_PREC_BMP_AC_BK (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_BK)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_BK)) | \ - NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_NONE)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_NONE))) -#define WLC_PREC_BMP_AC_VI (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_CL)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_CL)) | \ - NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_VI)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_VI))) -#define WLC_PREC_BMP_AC_VO (NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_VO)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_VO)) | \ - NBITVAL(WLC_PRIO_TO_PREC(PRIO_8021D_NC)) | \ - NBITVAL(WLC_PRIO_TO_HI_PREC(PRIO_8021D_NC))) +#define BRCMS_PREC_BMP_AC_BE (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_BE)) | \ + NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_BE)) | \ + NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_EE)) | \ + NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_EE))) +#define BRCMS_PREC_BMP_AC_BK (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_BK)) | \ + NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_BK)) | \ + NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_NONE)) | \ + NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_NONE))) +#define BRCMS_PREC_BMP_AC_VI (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_CL)) | \ + NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_CL)) | \ + NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_VI)) | \ + NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_VI))) +#define BRCMS_PREC_BMP_AC_VO (NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_VO)) | \ + NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_VO)) | \ + NBITVAL(BRCMS_PRIO_TO_PREC(PRIO_8021D_NC)) | \ + NBITVAL(BRCMS_PRIO_TO_HI_PREC(PRIO_8021D_NC))) /* WME Support */ #define WME_ENAB(pub) ((pub)->_wme != OFF) #define WME_AUTO(wlc) ((wlc)->pub->_wme == AUTO) -#define WLC_USE_COREFLAGS 0xffffffff /* invalid core flags, use the saved coreflags */ +/* invalid core flags, use the saved coreflags */ +#define BRCMS_USE_COREFLAGS 0xffffffff /* network protection config */ -#define WLC_PROT_G_SPEC 1 /* SPEC g protection */ -#define WLC_PROT_G_OVR 2 /* SPEC g prot override */ -#define WLC_PROT_G_USER 3 /* gmode specified by user */ -#define WLC_PROT_OVERLAP 4 /* overlap */ -#define WLC_PROT_N_USER 10 /* nmode specified by user */ -#define WLC_PROT_N_CFG 11 /* n protection */ -#define WLC_PROT_N_CFG_OVR 12 /* n protection override */ -#define WLC_PROT_N_NONGF 13 /* non-GF protection */ -#define WLC_PROT_N_NONGF_OVR 14 /* non-GF protection override */ -#define WLC_PROT_N_PAM_OVR 15 /* n preamble override */ -#define WLC_PROT_N_OBSS 16 /* non-HT OBSS present */ +#define BRCMS_PROT_G_SPEC 1 /* SPEC g protection */ +#define BRCMS_PROT_G_OVR 2 /* SPEC g prot override */ +#define BRCMS_PROT_G_USER 3 /* gmode specified by user */ +#define BRCMS_PROT_OVERLAP 4 /* overlap */ +#define BRCMS_PROT_N_USER 10 /* nmode specified by user */ +#define BRCMS_PROT_N_CFG 11 /* n protection */ +#define BRCMS_PROT_N_CFG_OVR 12 /* n protection override */ +#define BRCMS_PROT_N_NONGF 13 /* non-GF protection */ +#define BRCMS_PROT_N_NONGF_OVR 14 /* non-GF protection override */ +#define BRCMS_PROT_N_PAM_OVR 15 /* n preamble override */ +#define BRCMS_PROT_N_OBSS 16 /* non-HT OBSS present */ + +/* + * 54g modes (basic bits may still be overridden) + * + * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11 + * Preamble: Long + * Shortslot: Off + * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 + * Extended Rateset: 6, 9, 12, 48 + * Preamble: Long + * Shortslot: Auto + * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 + * Extended Rateset: 6b, 9, 12b, 48 + * Preamble: Short required + * Shortslot: Auto + * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 + * Extended Rateset: 6, 9, 12, 48 + * Preamble: Long + * Shortslot: On + * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 + * Preamble: Short required + * Shortslot: On and required + * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b + * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 + * Preamble: Long + * Shortslot: Auto + */ +#define GMODE_LEGACY_B 0 +#define GMODE_AUTO 1 +#define GMODE_ONLY 2 +#define GMODE_B_DEFERRED 3 +#define GMODE_PERFORMANCE 4 +#define GMODE_LRS 5 +#define GMODE_MAX 6 + +/* values for PLCPHdr_override */ +#define BRCMS_PLCP_AUTO -1 +#define BRCMS_PLCP_SHORT 0 +#define BRCMS_PLCP_LONG 1 + +/* values for g_protection_override and n_protection_override */ +#define BRCMS_PROTECTION_AUTO -1 +#define BRCMS_PROTECTION_OFF 0 +#define BRCMS_PROTECTION_ON 1 +#define BRCMS_PROTECTION_MMHDR_ONLY 2 +#define BRCMS_PROTECTION_CTS_ONLY 3 + +/* values for g_protection_control and n_protection_control */ +#define BRCMS_PROTECTION_CTL_OFF 0 +#define BRCMS_PROTECTION_CTL_LOCAL 1 +#define BRCMS_PROTECTION_CTL_OVERLAP 2 + +/* values for n_protection */ +#define BRCMS_N_PROTECTION_OFF 0 +#define BRCMS_N_PROTECTION_OPTIONAL 1 +#define BRCMS_N_PROTECTION_20IN40 2 +#define BRCMS_N_PROTECTION_MIXEDMODE 3 + +/* values for band specific 40MHz capabilities */ +#define BRCMS_N_BW_20ALL 0 +#define BRCMS_N_BW_40ALL 1 +#define BRCMS_N_BW_20IN2G_40IN5G 2 + +/* bitflags for SGI support (sgi_rx iovar) */ +#define BRCMS_N_SGI_20 0x01 +#define BRCMS_N_SGI_40 0x02 + +/* defines used by the nrate iovar */ +#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ +#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ +#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ +#define NRATE_STF_SHIFT 8 /* stf mode shift */ +#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ +#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ +#define NRATE_SGI_MASK 0x00800000 /* sgi mode */ +#define NRATE_SGI_SHIFT 23 /* sgi mode */ +#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ +#define NRATE_LDPC_SHIFT 22 /* ldpc shift */ + +#define NRATE_STF_SISO 0 /* stf mode SISO */ +#define NRATE_STF_CDD 1 /* stf mode CDD */ +#define NRATE_STF_STBC 2 /* stf mode STBC */ +#define NRATE_STF_SDM 3 /* stf mode SDM */ + +#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */ + +#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */ + +struct brcms_antselcfg { + u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ + u8 num_antcfg; /* number of available antenna configurations */ +}; /* common functions for every port */ -extern void *wlc_attach(struct wl_info *wl, u16 vendor, u16 device, uint unit, - bool piomode, void *regsva, uint bustype, void *btparam, - uint *perr); -extern uint wlc_detach(struct wlc_info *wlc); -extern int wlc_up(struct wlc_info *wlc); -extern uint wlc_down(struct wlc_info *wlc); - -extern int wlc_set(struct wlc_info *wlc, int cmd, int arg); -extern int wlc_get(struct wlc_info *wlc, int cmd, int *arg); -extern int wlc_iovar_getint(struct wlc_info *wlc, const char *name, int *arg); -extern int wlc_iovar_setint(struct wlc_info *wlc, const char *name, int arg); -extern bool wlc_chipmatch(u16 vendor, u16 device); -extern void wlc_init(struct wlc_info *wlc); -extern void wlc_reset(struct wlc_info *wlc); - -extern void wlc_intrson(struct wlc_info *wlc); -extern u32 wlc_intrsoff(struct wlc_info *wlc); -extern void wlc_intrsrestore(struct wlc_info *wlc, u32 macintmask); -extern bool wlc_intrsupd(struct wlc_info *wlc); -extern bool wlc_isr(struct wlc_info *wlc, bool *wantdpc); -extern bool wlc_dpc(struct wlc_info *wlc, bool bounded); -extern bool wlc_sendpkt_mac80211(struct wlc_info *wlc, struct sk_buff *sdu, - struct ieee80211_hw *hw); -extern int wlc_iovar_op(struct wlc_info *wlc, const char *name, void *params, - int p_len, void *arg, int len, bool set, - struct wlc_if *wlcif); -extern int wlc_ioctl(struct wlc_info *wlc, int cmd, void *arg, int len, - struct wlc_if *wlcif); -extern bool wlc_aggregatable(struct wlc_info *wlc, u8 tid); +extern void *brcms_c_attach(struct brcms_info *wl, u16 vendor, u16 device, + uint unit, bool piomode, void *regsva, uint bustype, + void *btparam, uint *perr); +extern uint brcms_c_detach(struct brcms_c_info *wlc); +extern int brcms_c_up(struct brcms_c_info *wlc); +extern uint brcms_c_down(struct brcms_c_info *wlc); + +extern int brcms_c_set(struct brcms_c_info *wlc, int cmd, int arg); +extern int brcms_c_get(struct brcms_c_info *wlc, int cmd, int *arg); +extern bool brcms_c_chipmatch(u16 vendor, u16 device); +extern void brcms_c_init(struct brcms_c_info *wlc); +extern void brcms_c_reset(struct brcms_c_info *wlc); + +extern void brcms_c_intrson(struct brcms_c_info *wlc); +extern u32 brcms_c_intrsoff(struct brcms_c_info *wlc); +extern void brcms_c_intrsrestore(struct brcms_c_info *wlc, u32 macintmask); +extern bool brcms_c_intrsupd(struct brcms_c_info *wlc); +extern bool brcms_c_isr(struct brcms_c_info *wlc, bool *wantdpc); +extern bool brcms_c_dpc(struct brcms_c_info *wlc, bool bounded); +extern bool brcms_c_sendpkt_mac80211(struct brcms_c_info *wlc, + struct sk_buff *sdu, + struct ieee80211_hw *hw); +extern int brcms_c_ioctl(struct brcms_c_info *wlc, int cmd, void *arg, int len, + struct brcms_c_if *wlcif); +extern bool brcms_c_aggregatable(struct brcms_c_info *wlc, u8 tid); /* helper functions */ -extern void wlc_statsupd(struct wlc_info *wlc); -extern void wlc_protection_upd(struct wlc_info *wlc, uint idx, int val); -extern int wlc_get_header_len(void); -extern void wlc_mac_bcn_promisc_change(struct wlc_info *wlc, bool promisc); -extern void wlc_set_addrmatch(struct wlc_info *wlc, int match_reg_offset, - const u8 *addr); -extern void wlc_wme_setparams(struct wlc_info *wlc, u16 aci, +extern void brcms_c_statsupd(struct brcms_c_info *wlc); +extern void brcms_c_protection_upd(struct brcms_c_info *wlc, uint idx, + int val); +extern int brcms_c_get_header_len(void); +extern void brcms_c_mac_bcn_promisc_change(struct brcms_c_info *wlc, + bool promisc); +extern void brcms_c_set_addrmatch(struct brcms_c_info *wlc, + int match_reg_offset, + const u8 *addr); +extern void brcms_c_wme_setparams(struct brcms_c_info *wlc, u16 aci, const struct ieee80211_tx_queue_params *arg, bool suspend); -extern struct wlc_pub *wlc_pub(void *wlc); +extern struct brcms_pub *brcms_c_pub(void *wlc); /* common functions for every port */ -extern void wlc_mhf(struct wlc_info *wlc, u8 idx, u16 mask, u16 val, +extern void brcms_c_mhf(struct brcms_c_info *wlc, u8 idx, u16 mask, u16 val, int bands); -extern void wlc_rate_lookup_init(struct wlc_info *wlc, wlc_rateset_t *rateset); -extern void wlc_default_rateset(struct wlc_info *wlc, wlc_rateset_t *rs); - -struct ieee80211_sta; -extern void wlc_ampdu_flush(struct wlc_info *wlc, struct ieee80211_sta *sta, - u16 tid); +extern void brcms_c_rate_lookup_init(struct brcms_c_info *wlc, + wlc_rateset_t *rateset); +extern void brcms_default_rateset(struct brcms_c_info *wlc, wlc_rateset_t *rs); + +extern void brcms_c_ampdu_flush(struct brcms_c_info *wlc, + struct ieee80211_sta *sta, u16 tid); +extern void brcms_c_ampdu_tx_operational(struct brcms_c_info *wlc, u8 tid, + u8 ba_wsize, uint max_rx_ampdu_bytes); +extern int brcms_c_set_par(struct brcms_c_info *wlc, enum wlc_par_id par_id, + int val); +extern int brcms_c_get_par(struct brcms_c_info *wlc, enum wlc_par_id par_id, + int *ret_int_ptr); +extern char *getvar(char *vars, const char *name); +extern int getintvar(char *vars, const char *name); /* wlc_phy.c helper functions */ -extern void wlc_set_ps_ctrl(struct wlc_info *wlc); -extern void wlc_mctrl(struct wlc_info *wlc, u32 mask, u32 val); +extern void brcms_c_set_ps_ctrl(struct brcms_c_info *wlc); +extern void brcms_c_mctrl(struct brcms_c_info *wlc, u32 mask, u32 val); -/* ioctl */ -extern int wlc_iovar_check(struct wlc_pub *pub, const bcm_iovar_t *vi, - void *arg, - int len, bool set); - -extern int wlc_module_register(struct wlc_pub *pub, const bcm_iovar_t *iovars, - const char *name, void *hdl, iovar_fn_t iovar_fn, +extern int brcms_c_module_register(struct brcms_pub *pub, + const char *name, void *hdl, watchdog_fn_t watchdog_fn, down_fn_t down_fn); -extern int wlc_module_unregister(struct wlc_pub *pub, const char *name, +extern int brcms_c_module_unregister(struct brcms_pub *pub, const char *name, void *hdl); -extern void wlc_suspend_mac_and_wait(struct wlc_info *wlc); -extern void wlc_enable_mac(struct wlc_info *wlc); -extern void wlc_associate_upd(struct wlc_info *wlc, bool state); -extern void wlc_scan_start(struct wlc_info *wlc); -extern void wlc_scan_stop(struct wlc_info *wlc); -extern int wlc_get_curband(struct wlc_info *wlc); -extern void wlc_wait_for_tx_completion(struct wlc_info *wlc, bool drop); - -#if defined(BCMDBG) -extern int wlc_iocregchk(struct wlc_info *wlc, uint band); -#endif +extern void brcms_c_suspend_mac_and_wait(struct brcms_c_info *wlc); +extern void brcms_c_enable_mac(struct brcms_c_info *wlc); +extern void brcms_c_associate_upd(struct brcms_c_info *wlc, bool state); +extern void brcms_c_scan_start(struct brcms_c_info *wlc); +extern void brcms_c_scan_stop(struct brcms_c_info *wlc); +extern int brcms_c_get_curband(struct brcms_c_info *wlc); +extern void brcms_c_wait_for_tx_completion(struct brcms_c_info *wlc, + bool drop); /* helper functions */ -extern bool wlc_check_radio_disabled(struct wlc_info *wlc); -extern bool wlc_radio_monitor_stop(struct wlc_info *wlc); - -#if defined(BCMDBG) -extern int wlc_format_ssid(char *buf, const unsigned char ssid[], uint ssid_len); -#endif +extern bool brcms_c_check_radio_disabled(struct brcms_c_info *wlc); +extern bool brcms_c_radio_monitor_stop(struct brcms_c_info *wlc); #define MAXBANDS 2 /* Maximum #of bands */ /* bandstate array indices */ @@ -579,6 +660,6 @@ extern int wlc_format_ssid(char *buf, const unsigned char ssid[], uint ssid_len) #define BAND_5G_NAME "5G" /* BMAC RPC: 7 u32 params: pkttotlen, fifo, commit, fid, txpktpend, pktflag, rpc_id */ -#define WLC_RPCTX_PARAMS 32 +#define BRCMS_RPCTX_PARAMS 32 -#endif /* _wlc_pub_h_ */ +#endif /* _BRCM_PUB_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c b/drivers/staging/brcm80211/brcmsmac/rate.c index 87b252d6a7f..f0e4b99c256 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.c +++ b/drivers/staging/brcm80211/brcmsmac/rate.c @@ -13,26 +13,16 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> -#include <linux/module.h> -#include <proto/802.11.h> -#include <bcmdefs.h> -#include <bcmutils.h> -#include <aiutils.h> -#include <wlioctl.h> -#include <sbhnddma.h> +#include <brcmu_wifi.h> +#include <brcmu_utils.h> -#include "wlc_types.h" #include "d11.h" -#include "wl_dbg.h" -#include "wlc_cfg.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_rate.h" +#include "pub.h" +#include "rate.h" /* Rate info per rate: It tells whether a rate is ofdm or not and its phy_rate value */ -const u8 rate_info[WLC_MAXRATE + 1] = { +const u8 rate_info[BRCM_MAXRATE + 1] = { /* 0 1 2 3 4 5 6 7 8 9 */ /* 0 */ 0x00, 0x00, 0x0a, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 */ 0x00, 0x37, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x00, @@ -48,134 +38,143 @@ const u8 rate_info[WLC_MAXRATE + 1] = { }; /* rates are in units of Kbps */ -const mcs_info_t mcs_table[MCS_TABLE_SIZE] = { +const struct brcms_mcs_info mcs_table[MCS_TABLE_SIZE] = { /* MCS 0: SS 1, MOD: BPSK, CR 1/2 */ {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00, - WLC_RATE_6M}, + BRCM_RATE_6M}, /* MCS 1: SS 1, MOD: QPSK, CR 1/2 */ {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08, - WLC_RATE_12M}, + BRCM_RATE_12M}, /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */ {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A, - WLC_RATE_18M}, + BRCM_RATE_18M}, /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */ {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10, - WLC_RATE_24M}, + BRCM_RATE_24M}, /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */ {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12, - WLC_RATE_36M}, + BRCM_RATE_36M}, /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */ {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x19, - WLC_RATE_48M}, + BRCM_RATE_48M}, /* MCS 6: SS 1, MOD: 64QAM, CR 3/4 */ {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x1A, - WLC_RATE_54M}, + BRCM_RATE_54M}, /* MCS 7: SS 1, MOD: 64QAM, CR 5/6 */ {65000, 135000, CEIL(65000 * 10, 9), CEIL(135000 * 10, 9), 0x1C, - WLC_RATE_54M}, + BRCM_RATE_54M}, /* MCS 8: SS 2, MOD: BPSK, CR 1/2 */ {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x40, - WLC_RATE_6M}, + BRCM_RATE_6M}, /* MCS 9: SS 2, MOD: QPSK, CR 1/2 */ {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x48, - WLC_RATE_12M}, + BRCM_RATE_12M}, /* MCS 10: SS 2, MOD: QPSK, CR 3/4 */ {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x4A, - WLC_RATE_18M}, + BRCM_RATE_18M}, /* MCS 11: SS 2, MOD: 16QAM, CR 1/2 */ {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x50, - WLC_RATE_24M}, + BRCM_RATE_24M}, /* MCS 12: SS 2, MOD: 16QAM, CR 3/4 */ {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x52, - WLC_RATE_36M}, + BRCM_RATE_36M}, /* MCS 13: SS 2, MOD: 64QAM, CR 2/3 */ {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0x59, - WLC_RATE_48M}, + BRCM_RATE_48M}, /* MCS 14: SS 2, MOD: 64QAM, CR 3/4 */ {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x5A, - WLC_RATE_54M}, + BRCM_RATE_54M}, /* MCS 15: SS 2, MOD: 64QAM, CR 5/6 */ {130000, 270000, CEIL(130000 * 10, 9), CEIL(270000 * 10, 9), 0x5C, - WLC_RATE_54M}, + BRCM_RATE_54M}, /* MCS 16: SS 3, MOD: BPSK, CR 1/2 */ {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x80, - WLC_RATE_6M}, + BRCM_RATE_6M}, /* MCS 17: SS 3, MOD: QPSK, CR 1/2 */ {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x88, - WLC_RATE_12M}, + BRCM_RATE_12M}, /* MCS 18: SS 3, MOD: QPSK, CR 3/4 */ {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x8A, - WLC_RATE_18M}, + BRCM_RATE_18M}, /* MCS 19: SS 3, MOD: 16QAM, CR 1/2 */ {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x90, - WLC_RATE_24M}, + BRCM_RATE_24M}, /* MCS 20: SS 3, MOD: 16QAM, CR 3/4 */ {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x92, - WLC_RATE_36M}, + BRCM_RATE_36M}, /* MCS 21: SS 3, MOD: 64QAM, CR 2/3 */ {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0x99, - WLC_RATE_48M}, + BRCM_RATE_48M}, /* MCS 22: SS 3, MOD: 64QAM, CR 3/4 */ {175500, 364500, CEIL(175500 * 10, 9), CEIL(364500 * 10, 9), 0x9A, - WLC_RATE_54M}, + BRCM_RATE_54M}, /* MCS 23: SS 3, MOD: 64QAM, CR 5/6 */ {195000, 405000, CEIL(195000 * 10, 9), CEIL(405000 * 10, 9), 0x9B, - WLC_RATE_54M}, + BRCM_RATE_54M}, /* MCS 24: SS 4, MOD: BPSK, CR 1/2 */ {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0xC0, - WLC_RATE_6M}, + BRCM_RATE_6M}, /* MCS 25: SS 4, MOD: QPSK, CR 1/2 */ {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0xC8, - WLC_RATE_12M}, + BRCM_RATE_12M}, /* MCS 26: SS 4, MOD: QPSK, CR 3/4 */ {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0xCA, - WLC_RATE_18M}, + BRCM_RATE_18M}, /* MCS 27: SS 4, MOD: 16QAM, CR 1/2 */ {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0xD0, - WLC_RATE_24M}, + BRCM_RATE_24M}, /* MCS 28: SS 4, MOD: 16QAM, CR 3/4 */ {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0xD2, - WLC_RATE_36M}, + BRCM_RATE_36M}, /* MCS 29: SS 4, MOD: 64QAM, CR 2/3 */ {208000, 432000, CEIL(208000 * 10, 9), CEIL(432000 * 10, 9), 0xD9, - WLC_RATE_48M}, + BRCM_RATE_48M}, /* MCS 30: SS 4, MOD: 64QAM, CR 3/4 */ {234000, 486000, CEIL(234000 * 10, 9), CEIL(486000 * 10, 9), 0xDA, - WLC_RATE_54M}, + BRCM_RATE_54M}, /* MCS 31: SS 4, MOD: 64QAM, CR 5/6 */ {260000, 540000, CEIL(260000 * 10, 9), CEIL(540000 * 10, 9), 0xDB, - WLC_RATE_54M}, + BRCM_RATE_54M}, /* MCS 32: SS 1, MOD: BPSK, CR 1/2 */ - {0, 6000, 0, CEIL(6000 * 10, 9), 0x00, WLC_RATE_6M}, + {0, 6000, 0, CEIL(6000 * 10, 9), 0x00, BRCM_RATE_6M}, }; /* phycfg for legacy OFDM frames: code rate, modulation scheme, spatial streams * Number of spatial streams: always 1 * other fields: refer to table 78 of section 17.3.2.2 of the original .11a standard */ -typedef struct legacy_phycfg { +struct legacy_phycfg { u32 rate_ofdm; /* ofdm mac rate */ u8 tx_phy_ctl3; /* phy ctl byte 3, code rate, modulation type, # of streams */ -} legacy_phycfg_t; +}; #define LEGACY_PHYCFG_TABLE_SIZE 12 /* Number of legacy_rate_cfg entries in the table */ /* In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate */ /* Eventually MIMOPHY would also be converted to this format */ /* 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps */ -static const legacy_phycfg_t legacy_phycfg_table[LEGACY_PHYCFG_TABLE_SIZE] = { - {WLC_RATE_1M, 0x00}, /* CCK 1Mbps, data rate 0 */ - {WLC_RATE_2M, 0x08}, /* CCK 2Mbps, data rate 1 */ - {WLC_RATE_5M5, 0x10}, /* CCK 5.5Mbps, data rate 2 */ - {WLC_RATE_11M, 0x18}, /* CCK 11Mbps, data rate 3 */ - {WLC_RATE_6M, 0x00}, /* OFDM 6Mbps, code rate 1/2, BPSK, 1 spatial stream */ - {WLC_RATE_9M, 0x02}, /* OFDM 9Mbps, code rate 3/4, BPSK, 1 spatial stream */ - {WLC_RATE_12M, 0x08}, /* OFDM 12Mbps, code rate 1/2, QPSK, 1 spatial stream */ - {WLC_RATE_18M, 0x0A}, /* OFDM 18Mbps, code rate 3/4, QPSK, 1 spatial stream */ - {WLC_RATE_24M, 0x10}, /* OFDM 24Mbps, code rate 1/2, 16-QAM, 1 spatial stream */ - {WLC_RATE_36M, 0x12}, /* OFDM 36Mbps, code rate 3/4, 16-QAM, 1 spatial stream */ - {WLC_RATE_48M, 0x19}, /* OFDM 48Mbps, code rate 2/3, 64-QAM, 1 spatial stream */ - {WLC_RATE_54M, 0x1A}, /* OFDM 54Mbps, code rate 3/4, 64-QAM, 1 spatial stream */ +static const struct +legacy_phycfg legacy_phycfg_table[LEGACY_PHYCFG_TABLE_SIZE] = { + {BRCM_RATE_1M, 0x00}, /* CCK 1Mbps, data rate 0 */ + {BRCM_RATE_2M, 0x08}, /* CCK 2Mbps, data rate 1 */ + {BRCM_RATE_5M5, 0x10}, /* CCK 5.5Mbps, data rate 2 */ + {BRCM_RATE_11M, 0x18}, /* CCK 11Mbps, data rate 3 */ + /* OFDM 6Mbps, code rate 1/2, BPSK, 1 spatial stream */ + {BRCM_RATE_6M, 0x00}, + /* OFDM 9Mbps, code rate 3/4, BPSK, 1 spatial stream */ + {BRCM_RATE_9M, 0x02}, + /* OFDM 12Mbps, code rate 1/2, QPSK, 1 spatial stream */ + {BRCM_RATE_12M, 0x08}, + /* OFDM 18Mbps, code rate 3/4, QPSK, 1 spatial stream */ + {BRCM_RATE_18M, 0x0A}, + /* OFDM 24Mbps, code rate 1/2, 16-QAM, 1 spatial stream */ + {BRCM_RATE_24M, 0x10}, + /* OFDM 36Mbps, code rate 3/4, 16-QAM, 1 spatial stream */ + {BRCM_RATE_36M, 0x12}, + /* OFDM 48Mbps, code rate 2/3, 64-QAM, 1 spatial stream */ + {BRCM_RATE_48M, 0x19}, + /* OFDM 54Mbps, code rate 3/4, 64-QAM, 1 spatial stream */ + {BRCM_RATE_54M, 0x1A}, }; /* Hardware rates (also encodes default basic rates) */ @@ -256,12 +255,10 @@ const wlc_rateset_t cck_rates = { 0x00, 0x00, 0x00, 0x00} }; -static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate); - /* check if rateset is valid. * if check_brate is true, rateset without a basic rate is considered NOT valid. */ -static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate) +static bool brcms_c_rateset_valid(wlc_rateset_t *rs, bool check_brate) { uint idx; @@ -273,13 +270,13 @@ static bool wlc_rateset_valid(wlc_rateset_t *rs, bool check_brate) /* error if no basic rates */ for (idx = 0; idx < rs->count; idx++) { - if (rs->rates[idx] & WLC_RATE_FLAG) + if (rs->rates[idx] & BRCMS_RATE_FLAG) return true; } return false; } -void wlc_rateset_mcs_upd(wlc_rateset_t *rs, u8 txstreams) +void brcms_c_rateset_mcs_upd(wlc_rateset_t *rs, u8 txstreams) { int i; for (i = txstreams; i < MAX_STREAMS_SUPPORTED; i++) @@ -290,11 +287,11 @@ void wlc_rateset_mcs_upd(wlc_rateset_t *rs, u8 txstreams) * and check if resulting rateset is valid. */ bool -wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs, +brcms_c_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs, const wlc_rateset_t *hw_rs, bool check_brate, u8 txstreams) { - u8 rateset[WLC_MAXRATE + 1]; + u8 rateset[BRCM_MAXRATE + 1]; u8 r; uint count; uint i; @@ -303,18 +300,17 @@ wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs, count = rs->count; for (i = 0; i < count; i++) { - /* mask off "basic rate" bit, WLC_RATE_FLAG */ - r = (int)rs->rates[i] & WLC_RATE_MASK; - if ((r > WLC_MAXRATE) || (rate_info[r] == 0)) { + /* mask off "basic rate" bit, BRCMS_RATE_FLAG */ + r = (int)rs->rates[i] & BRCMS_RATE_MASK; + if ((r > BRCM_MAXRATE) || (rate_info[r] == 0)) continue; - } rateset[r] = rs->rates[i]; /* preserve basic bit! */ } /* fill out the rates in order, looking at only supported rates */ count = 0; for (i = 0; i < hw_rs->count; i++) { - r = hw_rs->rates[i] & WLC_RATE_MASK; + r = hw_rs->rates[i] & BRCMS_RATE_MASK; if (rateset[r]) rs->rates[count++] = rateset[r]; } @@ -325,14 +321,14 @@ wlc_rate_hwrs_filter_sort_validate(wlc_rateset_t *rs, for (i = 0; i < MCSSET_LEN; i++) rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]); - if (wlc_rateset_valid(rs, check_brate)) + if (brcms_c_rateset_valid(rs, check_brate)) return true; else return false; } /* calculate the rate of a rx'd frame and return it as a ratespec */ -ratespec_t wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp) +ratespec_t brcms_c_compute_rspec(struct d11rxhdr *rxh, u8 *plcp) { int phy_type; ratespec_t rspec = PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT; @@ -345,12 +341,13 @@ ratespec_t wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp) switch (rxh->PhyRxStatus_0 & PRXS0_FT_MASK) { case PRXS0_CCK: rspec = - CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal); + CCK_PHY2MAC_RATE( + ((struct cck_phy_hdr *) plcp)->signal); break; case PRXS0_OFDM: rspec = - OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)-> - rlpt[0]); + OFDM_PHY2MAC_RATE( + ((struct ofdm_phy_hdr *) plcp)->rlpt[0]); break; case PRXS0_PREN: rspec = (plcp[0] & MIMO_PLCP_MCS_MASK) | RSPEC_MIMORATE; @@ -370,15 +367,17 @@ ratespec_t wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp) rspec |= RSPEC_SHORT_GI; } else if ((phy_type == PHY_TYPE_A) || (rxh->PhyRxStatus_0 & PRXS0_OFDM)) - rspec = OFDM_PHY2MAC_RATE(((ofdm_phy_hdr_t *) plcp)->rlpt[0]); + rspec = OFDM_PHY2MAC_RATE( + ((struct ofdm_phy_hdr *) plcp)->rlpt[0]); else - rspec = CCK_PHY2MAC_RATE(((cck_phy_hdr_t *) plcp)->signal); + rspec = CCK_PHY2MAC_RATE( + ((struct cck_phy_hdr *) plcp)->signal); return rspec; } /* copy rateset src to dst as-is (no masking or sorting) */ -void wlc_rateset_copy(const wlc_rateset_t *src, wlc_rateset_t *dst) +void brcms_c_rateset_copy(const wlc_rateset_t *src, wlc_rateset_t *dst) { memcpy(dst, src, sizeof(wlc_rateset_t)); } @@ -393,7 +392,7 @@ void wlc_rateset_copy(const wlc_rateset_t *src, wlc_rateset_t *dst) * 'xmask' is the copy mask (typically 0x7f or 0xff). */ void -wlc_rateset_filter(wlc_rateset_t *src, wlc_rateset_t *dst, bool basic_only, +brcms_c_rateset_filter(wlc_rateset_t *src, wlc_rateset_t *dst, bool basic_only, u8 rates, uint xmask, bool mcsallow) { uint i; @@ -403,28 +402,28 @@ wlc_rateset_filter(wlc_rateset_t *src, wlc_rateset_t *dst, bool basic_only, count = 0; for (i = 0; i < src->count; i++) { r = src->rates[i]; - if (basic_only && !(r & WLC_RATE_FLAG)) + if (basic_only && !(r & BRCMS_RATE_FLAG)) continue; - if ((rates == WLC_RATES_CCK) && IS_OFDM((r & WLC_RATE_MASK))) + if (rates == BRCMS_RATES_CCK && IS_OFDM((r & BRCMS_RATE_MASK))) continue; - if ((rates == WLC_RATES_OFDM) && IS_CCK((r & WLC_RATE_MASK))) + if (rates == BRCMS_RATES_OFDM && IS_CCK((r & BRCMS_RATE_MASK))) continue; dst->rates[count++] = r & xmask; } dst->count = count; dst->htphy_membership = src->htphy_membership; - if (mcsallow && rates != WLC_RATES_CCK) + if (mcsallow && rates != BRCMS_RATES_CCK) memcpy(&dst->mcs[0], &src->mcs[0], MCSSET_LEN); else - wlc_rateset_mcs_clear(dst); + brcms_c_rateset_mcs_clear(dst); } /* select rateset for a given phy_type and bandtype and filter it, sort it * and fill rs_tgt with result */ void -wlc_rateset_default(wlc_rateset_t *rs_tgt, const wlc_rateset_t *rs_hw, +brcms_c_rateset_default(wlc_rateset_t *rs_tgt, const wlc_rateset_t *rs_hw, uint phy_type, int bandtype, bool cck_only, uint rate_mask, bool mcsallow, u8 bw, u8 txstreams) { @@ -435,10 +434,10 @@ wlc_rateset_default(wlc_rateset_t *rs_tgt, const wlc_rateset_t *rs_hw, (PHYTYPE_IS(phy_type, PHY_TYPE_LCN)) || (PHYTYPE_IS(phy_type, PHY_TYPE_SSN))) { if (BAND_5G(bandtype)) { - rs_dflt = (bw == WLC_20_MHZ ? + rs_dflt = (bw == BRCMS_20_MHZ ? &ofdm_mimo_rates : &ofdm_40bw_mimo_rates); } else { - rs_dflt = (bw == WLC_20_MHZ ? + rs_dflt = (bw == BRCMS_20_MHZ ? &cck_ofdm_mimo_rates : &cck_ofdm_40bw_mimo_rates); } @@ -457,16 +456,16 @@ wlc_rateset_default(wlc_rateset_t *rs_tgt, const wlc_rateset_t *rs_hw, if (!rs_hw) rs_hw = rs_dflt; - wlc_rateset_copy(rs_dflt, &rs_sel); - wlc_rateset_mcs_upd(&rs_sel, txstreams); - wlc_rateset_filter(&rs_sel, rs_tgt, false, - cck_only ? WLC_RATES_CCK : WLC_RATES_CCK_OFDM, + brcms_c_rateset_copy(rs_dflt, &rs_sel); + brcms_c_rateset_mcs_upd(&rs_sel, txstreams); + brcms_c_rateset_filter(&rs_sel, rs_tgt, false, + cck_only ? BRCMS_RATES_CCK : BRCMS_RATES_CCK_OFDM, rate_mask, mcsallow); - wlc_rate_hwrs_filter_sort_validate(rs_tgt, rs_hw, false, + brcms_c_rate_hwrs_filter_sort_validate(rs_tgt, rs_hw, false, mcsallow ? txstreams : 1); } -s16 wlc_rate_legacy_phyctl(uint rate) +s16 brcms_c_rate_legacy_phyctl(uint rate) { uint i; for (i = 0; i < LEGACY_PHYCFG_TABLE_SIZE; i++) @@ -476,23 +475,23 @@ s16 wlc_rate_legacy_phyctl(uint rate) return -1; } -void wlc_rateset_mcs_clear(wlc_rateset_t *rateset) +void brcms_c_rateset_mcs_clear(wlc_rateset_t *rateset) { uint i; for (i = 0; i < MCSSET_LEN; i++) rateset->mcs[i] = 0; } -void wlc_rateset_mcs_build(wlc_rateset_t *rateset, u8 txstreams) +void brcms_c_rateset_mcs_build(wlc_rateset_t *rateset, u8 txstreams) { memcpy(&rateset->mcs[0], &cck_ofdm_mimo_rates.mcs[0], MCSSET_LEN); - wlc_rateset_mcs_upd(rateset, txstreams); + brcms_c_rateset_mcs_upd(rateset, txstreams); } /* Based on bandwidth passed, allow/disallow MCS 32 in the rateset */ -void wlc_rateset_bw_mcs_filter(wlc_rateset_t *rateset, u8 bw) +void brcms_c_rateset_bw_mcs_filter(wlc_rateset_t *rateset, u8 bw) { - if (bw == WLC_40_MHZ) + if (bw == BRCMS_40_MHZ) setbit(rateset->mcs, 32); else clrbit(rateset->mcs, 32); diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_rate.h b/drivers/staging/brcm80211/brcmsmac/rate.h index 5575e83bdc6..dbfd3e5816d 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_rate.h +++ b/drivers/staging/brcm80211/brcmsmac/rate.h @@ -14,31 +14,33 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _WLC_RATE_H_ -#define _WLC_RATE_H_ +#ifndef _BRCM_RATE_H_ +#define _BRCM_RATE_H_ + +#include "types.h" extern const u8 rate_info[]; -extern const struct wlc_rateset cck_ofdm_mimo_rates; -extern const struct wlc_rateset ofdm_mimo_rates; -extern const struct wlc_rateset cck_ofdm_rates; -extern const struct wlc_rateset ofdm_rates; -extern const struct wlc_rateset cck_rates; -extern const struct wlc_rateset gphy_legacy_rates; -extern const struct wlc_rateset wlc_lrs_rates; -extern const struct wlc_rateset rate_limit_1_2; - -typedef struct mcs_info { +extern const struct brcms_rateset cck_ofdm_mimo_rates; +extern const struct brcms_rateset ofdm_mimo_rates; +extern const struct brcms_rateset cck_ofdm_rates; +extern const struct brcms_rateset ofdm_rates; +extern const struct brcms_rateset cck_rates; +extern const struct brcms_rateset gphy_legacy_rates; +extern const struct brcms_rateset wlc_lrs_rates; +extern const struct brcms_rateset rate_limit_1_2; + +struct brcms_mcs_info { u32 phy_rate_20; /* phy rate in kbps [20Mhz] */ u32 phy_rate_40; /* phy rate in kbps [40Mhz] */ u32 phy_rate_20_sgi; /* phy rate in kbps [20Mhz] with SGI */ u32 phy_rate_40_sgi; /* phy rate in kbps [40Mhz] with SGI */ u8 tx_phy_ctl3; /* phy ctl byte 3, code rate, modulation type, # of streams */ u8 leg_ofdm; /* matching legacy ofdm rate in 500bkps */ -} mcs_info_t; +}; -#define WLC_MAXMCS 32 /* max valid mcs index */ +#define BRCMS_MAXMCS 32 /* max valid mcs index */ #define MCS_TABLE_SIZE 33 /* Number of mcs entries in the table */ -extern const mcs_info_t mcs_table[]; +extern const struct brcms_mcs_info mcs_table[]; #define MCS_INVALID 0xFF #define MCS_CR_MASK 0x07 /* Code Rate bit mask */ @@ -55,14 +57,14 @@ extern const mcs_info_t mcs_table[]; #define VALID_MCS(_mcs) ((_mcs < MCS_TABLE_SIZE)) /* Macro to use the rate_info table */ -#define WLC_RATE_MASK_FULL 0xff /* Rate value mask with basic rate flag */ +#define BRCMS_RATE_MASK_FULL 0xff /* Rate value mask with basic rate flag */ -#define WLC_RATE_500K_TO_BPS(rate) ((rate) * 500000) /* convert 500kbps to bps */ +/* convert 500kbps to bps */ +#define BRCMS_RATE_500K_TO_BPS(rate) ((rate) * 500000) /* rate spec : holds rate and mode specific information required to generate a tx frame. */ /* Legacy CCK and OFDM information is held in the same manner as was done in the past */ /* (in the lower byte) the upper 3 bytes primarily hold MIMO specific information */ -typedef u32 ratespec_t; /* rate spec bit fields */ #define RSPEC_RATE_MASK 0x0000007F /* Either 500Kbps units or MIMO MCS idx */ @@ -80,10 +82,10 @@ typedef u32 ratespec_t; #define RSPEC_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ #define RSPEC_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicates override rate only */ -#define WLC_HTPHY 127 /* HT PHY Membership */ +#define BRCMS_HTPHY 127 /* HT PHY Membership */ #define RSPEC_ACTIVE(rspec) (rspec & (RSPEC_RATE_MASK | RSPEC_MIMORATE)) -#define RSPEC2RATE(rspec) ((rspec & RSPEC_MIMORATE) ? \ +#define RSPEC2RATE(rspec) ((rspec & RSPEC_MIMORATE) ? \ MCS_RATE((rspec & RSPEC_RATE_MASK), RSPEC_IS40MHZ(rspec), RSPEC_ISSGI(rspec)) : \ (rspec & RSPEC_RATE_MASK)) /* return rate in unit of 500Kbps -- for internal use in wlc_rate_sel.c */ @@ -110,13 +112,14 @@ typedef u32 ratespec_t; #define PLCP3_STC_SHIFT 4 /* Rate info table; takes a legacy rate or ratespec_t */ -#define IS_MCS(r) (r & RSPEC_MIMORATE) -#define IS_OFDM(r) (!IS_MCS(r) && (rate_info[(r) & RSPEC_RATE_MASK] & WLC_RATE_FLAG)) +#define IS_MCS(r) (r & RSPEC_MIMORATE) +#define IS_OFDM(r) (!IS_MCS(r) && (rate_info[(r) & RSPEC_RATE_MASK] & \ + BRCMS_RATE_FLAG)) #define IS_CCK(r) (!IS_MCS(r) && ( \ - ((r) & WLC_RATE_MASK) == WLC_RATE_1M || \ - ((r) & WLC_RATE_MASK) == WLC_RATE_2M || \ - ((r) & WLC_RATE_MASK) == WLC_RATE_5M5 || \ - ((r) & WLC_RATE_MASK) == WLC_RATE_11M)) + ((r) & BRCMS_RATE_MASK) == BRCM_RATE_1M || \ + ((r) & BRCMS_RATE_MASK) == BRCM_RATE_2M || \ + ((r) & BRCMS_RATE_MASK) == BRCM_RATE_5M5 || \ + ((r) & BRCMS_RATE_MASK) == BRCM_RATE_11M)) #define IS_SINGLE_STREAM(mcs) (((mcs) <= HIGHEST_SINGLE_STREAM_MCS) || ((mcs) == 32)) #define CCK_RSPEC(cck) ((cck) & RSPEC_RATE_MASK) #define OFDM_RSPEC(ofdm) (((ofdm) & RSPEC_RATE_MASK) |\ @@ -132,38 +135,39 @@ extern const u8 ofdm_rate_lookup[]; #define OFDM_PHY2MAC_RATE(rlpt) (ofdm_rate_lookup[rlpt & 0x7]) #define CCK_PHY2MAC_RATE(signal) (signal/5) -/* Rates specified in wlc_rateset_filter() */ -#define WLC_RATES_CCK_OFDM 0 -#define WLC_RATES_CCK 1 -#define WLC_RATES_OFDM 2 - -/* use the stuct form instead of typedef to fix dependency problems */ -struct wlc_rateset; +/* Rates specified in brcms_c_rateset_filter() */ +#define BRCMS_RATES_CCK_OFDM 0 +#define BRCMS_RATES_CCK 1 +#define BRCMS_RATES_OFDM 2 /* sanitize, and sort a rateset with the basic bit(s) preserved, validate rateset */ -extern bool wlc_rate_hwrs_filter_sort_validate(struct wlc_rateset *rs, - const struct wlc_rateset *hw_rs, - bool check_brate, - u8 txstreams); +extern bool +brcms_c_rate_hwrs_filter_sort_validate(struct brcms_rateset *rs, + const struct brcms_rateset *hw_rs, + bool check_brate, u8 txstreams); /* copy rateset src to dst as-is (no masking or sorting) */ -extern void wlc_rateset_copy(const struct wlc_rateset *src, - struct wlc_rateset *dst); +extern void brcms_c_rateset_copy(const struct brcms_rateset *src, + struct brcms_rateset *dst); /* would be nice to have these documented ... */ -extern ratespec_t wlc_compute_rspec(d11rxhdr_t *rxh, u8 *plcp); - -extern void wlc_rateset_filter(struct wlc_rateset *src, struct wlc_rateset *dst, - bool basic_only, u8 rates, uint xmask, - bool mcsallow); -extern void wlc_rateset_default(struct wlc_rateset *rs_tgt, - const struct wlc_rateset *rs_hw, uint phy_type, - int bandtype, bool cck_only, uint rate_mask, - bool mcsallow, u8 bw, u8 txstreams); -extern s16 wlc_rate_legacy_phyctl(uint rate); - -extern void wlc_rateset_mcs_upd(struct wlc_rateset *rs, u8 txstreams); -extern void wlc_rateset_mcs_clear(struct wlc_rateset *rateset); -extern void wlc_rateset_mcs_build(struct wlc_rateset *rateset, u8 txstreams); -extern void wlc_rateset_bw_mcs_filter(struct wlc_rateset *rateset, u8 bw); - -#endif /* _WLC_RATE_H_ */ +extern ratespec_t brcms_c_compute_rspec(struct d11rxhdr *rxh, u8 *plcp); + +extern void brcms_c_rateset_filter(struct brcms_rateset *src, + struct brcms_rateset *dst, bool basic_only, u8 rates, uint xmask, + bool mcsallow); + +extern void +brcms_c_rateset_default(struct brcms_rateset *rs_tgt, + const struct brcms_rateset *rs_hw, uint phy_type, + int bandtype, bool cck_only, uint rate_mask, + bool mcsallow, u8 bw, u8 txstreams); + +extern s16 brcms_c_rate_legacy_phyctl(uint rate); + +extern void brcms_c_rateset_mcs_upd(struct brcms_rateset *rs, u8 txstreams); +extern void brcms_c_rateset_mcs_clear(struct brcms_rateset *rateset); +extern void brcms_c_rateset_mcs_build(struct brcms_rateset *rateset, + u8 txstreams); +extern void brcms_c_rateset_bw_mcs_filter(struct brcms_rateset *rateset, u8 bw); + +#endif /* _BRCM_RATE_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h b/drivers/staging/brcm80211/brcmsmac/scb.h index f07a891d5d2..d6c8328554d 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_scb.h +++ b/drivers/staging/brcm80211/brcmsmac/scb.h @@ -14,39 +14,44 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _wlc_scb_h_ -#define _wlc_scb_h_ +#ifndef _BRCM_SCB_H_ +#define _BRCM_SCB_H_ + +#include <linux/if_ether.h> +#include <brcmu_utils.h> +#include <defs.h> +#include "types.h" #define AMPDU_TX_BA_MAX_WSIZE 64 /* max Tx ba window size (in pdu) */ /* structure to store per-tid state for the ampdu initiator */ -typedef struct scb_ampdu_tid_ini { - u32 magic; +struct scb_ampdu_tid_ini { u8 tx_in_transit; /* number of pending mpdus in transit in driver */ u8 tid; /* initiator tid for easy lookup */ u8 txretry[AMPDU_TX_BA_MAX_WSIZE]; /* tx retry count; indexed by seq modulo */ struct scb *scb; /* backptr for easy lookup */ -} scb_ampdu_tid_ini_t; + u8 ba_wsize; /* negotiated ba window size (in pdu) */ +}; #define AMPDU_MAX_SCB_TID NUMPRIO -typedef struct scb_ampdu { +struct scb_ampdu { struct scb *scb; /* back pointer for easy reference */ u8 mpdu_density; /* mpdu density */ u8 max_pdu; /* max pdus allowed in ampdu */ u8 release; /* # of mpdus released at a time */ u16 min_len; /* min mpdu len to support the density */ - u32 max_rxlen; /* max ampdu rcv length; 8k, 16k, 32k, 64k */ + u32 max_rx_ampdu_bytes; /* max ampdu rcv length; 8k, 16k, 32k, 64k */ struct pktq txq; /* sdu transmit queue pending aggregation */ /* This could easily be a ini[] pointer and we keep this info in wl itself instead * of having mac80211 hold it for us. Also could be made dynamic per tid instead of * static. */ - scb_ampdu_tid_ini_t ini[AMPDU_MAX_SCB_TID]; /* initiator info - per tid (NUMPRIO) */ -} scb_ampdu_t; + /* initiator info - per tid (NUMPRIO): */ + struct scb_ampdu_tid_ini ini[AMPDU_MAX_SCB_TID]; +}; -#define SCB_MAGIC 0xbeefcafe -#define INI_MAGIC 0xabcd1234 +#define SCB_MAGIC 0xbeefcafe /* station control block - one per remote MAC address */ struct scb { @@ -64,7 +69,7 @@ struct scb { */ u16 seqnum[NUMPRIO]; /* WME: driver maintained sw seqnum per priority */ - scb_ampdu_t scb_ampdu; /* AMPDU state including per tid info */ + struct scb_ampdu scb_ampdu; /* AMPDU state including per tid info */ }; /* scb flags */ @@ -77,4 +82,4 @@ struct scb { #define SCB_PS(a) NULL #define SCB_STBC_CAP(a) ((a)->flags & SCB_STBCCAP) #define SCB_AMPDU(a) true -#endif /* _wlc_scb_h_ */ +#endif /* _BRCM_SCB_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h b/drivers/staging/brcm80211/brcmsmac/srom.c index f4b3e61dc37..f39442ed4ce 100644 --- a/drivers/staging/brcm80211/brcmsmac/bcmsrom_tbl.h +++ b/drivers/staging/brcm80211/brcmsmac/srom.c @@ -14,19 +14,341 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmsrom_tbl_h_ -#define _bcmsrom_tbl_h_ +#include <linux/kernel.h> +#include <linux/string.h> +#include <linux/io.h> +#include <linux/etherdevice.h> +#include <stdarg.h> -#include "wlioctl.h" +#include <chipcommon.h> +#include <brcmu_utils.h> +#include "nicpci.h" +#include "aiutils.h" +#include "otp.h" +#include "srom.h" -typedef struct { - const char *name; - u32 revmask; - u32 flags; - u16 off; - u16 mask; -} sromvar_t; +#define SROM_OFFSET(sih) ((sih->ccrev > 31) ? \ + (((sih->cccaps & CC_CAP_SROM) == 0) ? NULL : \ + ((u8 *)curmap + PCI_16KB0_CCREGS_OFFSET + CC_SROM_OTP)) : \ + ((u8 *)curmap + PCI_BAR0_SPROM_OFFSET)) + +#if defined(BCMDBG) +#define WRITE_ENABLE_DELAY 500 /* 500 ms after write enable/disable toggle */ +#define WRITE_WORD_DELAY 20 /* 20 ms between each word write */ +#endif + +/* Maximum srom: 6 Kilobits == 768 bytes */ +#define SROM_MAX 768 + +/* PCI fields */ +#define PCI_F0DEVID 48 + +#define SROM_WORDS 64 + +#define SROM_SSID 2 + +#define SROM_WL1LHMAXP 29 + +#define SROM_WL1LPAB0 30 +#define SROM_WL1LPAB1 31 +#define SROM_WL1LPAB2 32 + +#define SROM_WL1HPAB0 33 +#define SROM_WL1HPAB1 34 +#define SROM_WL1HPAB2 35 + +#define SROM_MACHI_IL0 36 +#define SROM_MACMID_IL0 37 +#define SROM_MACLO_IL0 38 +#define SROM_MACHI_ET1 42 +#define SROM_MACMID_ET1 43 +#define SROM_MACLO_ET1 44 +#define SROM3_MACHI 37 +#define SROM3_MACMID 38 +#define SROM3_MACLO 39 + +#define SROM_BXARSSI2G 40 +#define SROM_BXARSSI5G 41 + +#define SROM_TRI52G 42 +#define SROM_TRI5GHL 43 + +#define SROM_RXPO52G 45 + +#define SROM_AABREV 46 +/* Fields in AABREV */ +#define SROM_BR_MASK 0x00ff +#define SROM_CC_MASK 0x0f00 +#define SROM_CC_SHIFT 8 +#define SROM_AA0_MASK 0x3000 +#define SROM_AA0_SHIFT 12 +#define SROM_AA1_MASK 0xc000 +#define SROM_AA1_SHIFT 14 + +#define SROM_WL0PAB0 47 +#define SROM_WL0PAB1 48 +#define SROM_WL0PAB2 49 + +#define SROM_LEDBH10 50 +#define SROM_LEDBH32 51 + +#define SROM_WL10MAXP 52 + +#define SROM_WL1PAB0 53 +#define SROM_WL1PAB1 54 +#define SROM_WL1PAB2 55 + +#define SROM_ITT 56 + +#define SROM_BFL 57 +#define SROM_BFL2 28 +#define SROM3_BFL2 61 + +#define SROM_AG10 58 + +#define SROM_CCODE 59 + +#define SROM_OPO 60 + +#define SROM3_LEDDC 62 + +#define SROM_CRCREV 63 + +/* SROM Rev 4: Reallocate the software part of the srom to accommodate + * MIMO features. It assumes up to two PCIE functions and 440 bytes + * of usable srom i.e. the usable storage in chips with OTP that + * implements hardware redundancy. + */ + +#define SROM4_WORDS 220 + +#define SROM4_SIGN 32 +#define SROM4_SIGNATURE 0x5372 + +#define SROM4_BREV 33 + +#define SROM4_BFL0 34 +#define SROM4_BFL1 35 +#define SROM4_BFL2 36 +#define SROM4_BFL3 37 +#define SROM5_BFL0 37 +#define SROM5_BFL1 38 +#define SROM5_BFL2 39 +#define SROM5_BFL3 40 + +#define SROM4_MACHI 38 +#define SROM4_MACMID 39 +#define SROM4_MACLO 40 +#define SROM5_MACHI 41 +#define SROM5_MACMID 42 +#define SROM5_MACLO 43 + +#define SROM4_CCODE 41 +#define SROM4_REGREV 42 +#define SROM5_CCODE 34 +#define SROM5_REGREV 35 + +#define SROM4_LEDBH10 43 +#define SROM4_LEDBH32 44 +#define SROM5_LEDBH10 59 +#define SROM5_LEDBH32 60 + +#define SROM4_LEDDC 45 +#define SROM5_LEDDC 45 + +#define SROM4_AA 46 + +#define SROM4_AG10 47 +#define SROM4_AG32 48 +#define SROM4_TXPID2G 49 +#define SROM4_TXPID5G 51 +#define SROM4_TXPID5GL 53 +#define SROM4_TXPID5GH 55 + +#define SROM4_TXRXC 61 +#define SROM4_TXCHAIN_MASK 0x000f +#define SROM4_TXCHAIN_SHIFT 0 +#define SROM4_RXCHAIN_MASK 0x00f0 +#define SROM4_RXCHAIN_SHIFT 4 +#define SROM4_SWITCH_MASK 0xff00 +#define SROM4_SWITCH_SHIFT 8 + +/* Per-path fields */ +#define MAX_PATH_SROM 4 +#define SROM4_PATH0 64 +#define SROM4_PATH1 87 +#define SROM4_PATH2 110 +#define SROM4_PATH3 133 + +#define SROM4_2G_ITT_MAXP 0 +#define SROM4_2G_PA 1 +#define SROM4_5G_ITT_MAXP 5 +#define SROM4_5GLH_MAXP 6 +#define SROM4_5G_PA 7 +#define SROM4_5GL_PA 11 +#define SROM4_5GH_PA 15 + +/* All the miriad power offsets */ +#define SROM4_2G_CCKPO 156 +#define SROM4_2G_OFDMPO 157 +#define SROM4_5G_OFDMPO 159 +#define SROM4_5GL_OFDMPO 161 +#define SROM4_5GH_OFDMPO 163 +#define SROM4_2G_MCSPO 165 +#define SROM4_5G_MCSPO 173 +#define SROM4_5GL_MCSPO 181 +#define SROM4_5GH_MCSPO 189 +#define SROM4_CDDPO 197 +#define SROM4_STBCPO 198 +#define SROM4_BW40PO 199 +#define SROM4_BWDUPPO 200 + +#define SROM4_CRCREV 219 + +/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6. + * This is acombined srom for both MIMO and SISO boards, usable in + * the .130 4Kilobit OTP with hardware redundancy. + */ +#define SROM8_BREV 65 + +#define SROM8_BFL0 66 +#define SROM8_BFL1 67 +#define SROM8_BFL2 68 +#define SROM8_BFL3 69 + +#define SROM8_MACHI 70 +#define SROM8_MACMID 71 +#define SROM8_MACLO 72 + +#define SROM8_CCODE 73 +#define SROM8_REGREV 74 + +#define SROM8_LEDBH10 75 +#define SROM8_LEDBH32 76 + +#define SROM8_LEDDC 77 + +#define SROM8_AA 78 + +#define SROM8_AG10 79 +#define SROM8_AG32 80 + +#define SROM8_TXRXC 81 + +#define SROM8_BXARSSI2G 82 +#define SROM8_BXARSSI5G 83 +#define SROM8_TRI52G 84 +#define SROM8_TRI5GHL 85 +#define SROM8_RXPO52G 86 + +#define SROM8_FEM2G 87 +#define SROM8_FEM5G 88 +#define SROM8_FEM_ANTSWLUT_MASK 0xf800 +#define SROM8_FEM_ANTSWLUT_SHIFT 11 +#define SROM8_FEM_TR_ISO_MASK 0x0700 +#define SROM8_FEM_TR_ISO_SHIFT 8 +#define SROM8_FEM_PDET_RANGE_MASK 0x00f8 +#define SROM8_FEM_PDET_RANGE_SHIFT 3 +#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006 +#define SROM8_FEM_EXTPA_GAIN_SHIFT 1 +#define SROM8_FEM_TSSIPOS_MASK 0x0001 +#define SROM8_FEM_TSSIPOS_SHIFT 0 + +#define SROM8_THERMAL 89 + +/* Temp sense related entries */ +#define SROM8_MPWR_RAWTS 90 +#define SROM8_TS_SLP_OPT_CORRX 91 +/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ +#define SROM8_FOC_HWIQ_IQSWP 92 + +/* Temperature delta for PHY calibration */ +#define SROM8_PHYCAL_TEMPDELTA 93 + +/* Per-path offsets & fields */ +#define SROM8_PATH0 96 +#define SROM8_PATH1 112 +#define SROM8_PATH2 128 +#define SROM8_PATH3 144 + +#define SROM8_2G_ITT_MAXP 0 +#define SROM8_2G_PA 1 +#define SROM8_5G_ITT_MAXP 4 +#define SROM8_5GLH_MAXP 5 +#define SROM8_5G_PA 6 +#define SROM8_5GL_PA 9 +#define SROM8_5GH_PA 12 + +/* All the miriad power offsets */ +#define SROM8_2G_CCKPO 160 + +#define SROM8_2G_OFDMPO 161 +#define SROM8_5G_OFDMPO 163 +#define SROM8_5GL_OFDMPO 165 +#define SROM8_5GH_OFDMPO 167 + +#define SROM8_2G_MCSPO 169 +#define SROM8_5G_MCSPO 177 +#define SROM8_5GL_MCSPO 185 +#define SROM8_5GH_MCSPO 193 + +#define SROM8_CDDPO 201 +#define SROM8_STBCPO 202 +#define SROM8_BW40PO 203 +#define SROM8_BWDUPPO 204 + +/* SISO PA parameters are in the path0 spaces */ +#define SROM8_SISO 96 + +/* Legacy names for SISO PA paramters */ +#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP) +#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA) +#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1) +#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2) +#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP) +#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP) +#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA) +#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1) +#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2) +#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA) +#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1) +#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2) +#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA) +#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1) +#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2) + +/* SROM REV 9 */ +#define SROM9_2GPO_CCKBW20 160 +#define SROM9_2GPO_CCKBW20UL 161 +#define SROM9_2GPO_LOFDMBW20 162 +#define SROM9_2GPO_LOFDMBW20UL 164 + +#define SROM9_5GLPO_LOFDMBW20 166 +#define SROM9_5GLPO_LOFDMBW20UL 168 +#define SROM9_5GMPO_LOFDMBW20 170 +#define SROM9_5GMPO_LOFDMBW20UL 172 +#define SROM9_5GHPO_LOFDMBW20 174 +#define SROM9_5GHPO_LOFDMBW20UL 176 + +#define SROM9_2GPO_MCSBW20 178 +#define SROM9_2GPO_MCSBW20UL 180 +#define SROM9_2GPO_MCSBW40 182 + +#define SROM9_5GLPO_MCSBW20 184 +#define SROM9_5GLPO_MCSBW20UL 186 +#define SROM9_5GLPO_MCSBW40 188 +#define SROM9_5GMPO_MCSBW20 190 +#define SROM9_5GMPO_MCSBW20UL 192 +#define SROM9_5GMPO_MCSBW40 194 +#define SROM9_5GHPO_MCSBW20 196 +#define SROM9_5GHPO_MCSBW20UL 198 +#define SROM9_5GHPO_MCSBW40 200 + +#define SROM9_PO_MCS32 202 +#define SROM9_PO_LOFDM40DUP 203 + +/* SROM flags (see sromvar_t) */ #define SRFL_MORE 1 /* value continues as described by the next entry */ #define SRFL_NOFFS 2 /* value bits can't be all one's */ #define SRFL_PRHEX 4 /* value is in hexdecimal format */ @@ -36,6 +358,23 @@ typedef struct { #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */ #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */ +/* Max. nvram variable table size */ +#define MAXSZ_NVRAM_VARS 4096 + +struct brcms_sromvar { + const char *name; + u32 revmask; + u32 flags; + u16 off; + u16 mask; +}; + +struct brcms_varbuf { + char *base; /* pointer to buffer base */ + char *buf; /* pointer to current position */ + unsigned int size; /* current (residual) size in bytes */ +}; + /* Assumptions: * - Ethernet address spans across 3 consective words * @@ -48,8 +387,7 @@ typedef struct { * - The last entry's name field must be NULL to indicate the end of the table. Other * entries must have non-NULL name. */ - -static const sromvar_t pci_sromvars[] = { +static const struct brcms_sromvar pci_sromvars[] = { {"devid", 0xffffff00, SRFL_PRHEX | SRFL_NOVAR, PCI_F0DEVID, 0xffff}, {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK}, {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff}, @@ -393,7 +731,7 @@ static const sromvar_t pci_sromvars[] = { {NULL, 0, 0, 0, 0} }; -static const sromvar_t perpath_pci_sromvars[] = { +static const struct brcms_sromvar perpath_pci_sromvars[] = { {"maxp2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0x00ff}, {"itt2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0xff00}, {"itt5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0xff00}, @@ -437,77 +775,463 @@ static const sromvar_t perpath_pci_sromvars[] = { {NULL, 0, 0, 0, 0} }; -#if !(defined(PHY_TYPE_N) && defined(PHY_TYPE_LP)) -#define PHY_TYPE_N 4 /* N-Phy value */ -#define PHY_TYPE_LP 5 /* LP-Phy value */ -#endif /* !(defined(PHY_TYPE_N) && defined(PHY_TYPE_LP)) */ -#if !defined(PHY_TYPE_NULL) -#define PHY_TYPE_NULL 0xf /* Invalid Phy value */ -#endif /* !defined(PHY_TYPE_NULL) */ - -typedef struct { - u16 phy_type; - u16 bandrange; - u16 chain; - const char *vars; -} pavars_t; - -static const pavars_t pavars[] = { - /* NPHY */ - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 0, "pa2gw0a0 pa2gw1a0 pa2gw2a0"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 1, "pa2gw0a1 pa2gw1a1 pa2gw2a1"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 0, - "pa5glw0a0 pa5glw1a0 pa5glw2a0"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 1, - "pa5glw0a1 pa5glw1a1 pa5glw2a1"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 0, "pa5gw0a0 pa5gw1a0 pa5gw2a0"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 1, "pa5gw0a1 pa5gw1a1 pa5gw2a1"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 0, - "pa5ghw0a0 pa5ghw1a0 pa5ghw2a0"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 1, - "pa5ghw0a1 pa5ghw1a1 pa5ghw2a1"}, - /* LPPHY */ - {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_2G, 0, "pa0b0 pa0b1 pa0b2"}, - {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GL, 0, "pa1lob0 pa1lob1 pa1lob2"}, - {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GM, 0, "pa1b0 pa1b1 pa1b2"}, - {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GH, 0, "pa1hib0 pa1hib1 pa1hib2"}, - {PHY_TYPE_NULL, 0, 0, ""} -}; +static void _initvars_srom_pci(u8 sromrev, u16 *srom, uint off, + struct brcms_varbuf *b); +static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, + uint *count); +static int sprom_read_pci(struct si_pub *sih, u16 *sprom, + uint wordoff, u16 *buf, uint nwords, bool check_crc); +#if defined(BCMNVRAMR) +static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz); +#endif -typedef struct { - u16 phy_type; - u16 bandrange; - const char *vars; -} povars_t; - -static const povars_t povars[] = { - /* NPHY */ - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, - "mcs2gpo0 mcs2gpo1 mcs2gpo2 mcs2gpo3 " - "mcs2gpo4 mcs2gpo5 mcs2gpo6 mcs2gpo7"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, - "mcs5glpo0 mcs5glpo1 mcs5glpo2 mcs5glpo3 " - "mcs5glpo4 mcs5glpo5 mcs5glpo6 mcs5glpo7"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, - "mcs5gpo0 mcs5gpo1 mcs5gpo2 mcs5gpo3 " - "mcs5gpo4 mcs5gpo5 mcs5gpo6 mcs5gpo7"}, - {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, - "mcs5ghpo0 mcs5ghpo1 mcs5ghpo2 mcs5ghpo3 " - "mcs5ghpo4 mcs5ghpo5 mcs5ghpo6 mcs5ghpo7"}, - {PHY_TYPE_NULL, 0, ""} -}; +static int initvars_table(char *start, char *end, + char **vars, uint *count); + +/* Initialization of varbuf structure */ +static void varbuf_init(struct brcms_varbuf *b, char *buf, uint size) +{ + b->size = size; + b->base = b->buf = buf; +} + +/* append a null terminated var=value string */ +static int varbuf_append(struct brcms_varbuf *b, const char *fmt, ...) +{ + va_list ap; + int r; + size_t len; + char *s; + + if (b->size < 2) + return 0; + + va_start(ap, fmt); + r = vsnprintf(b->buf, b->size, fmt, ap); + va_end(ap); + + /* C99 snprintf behavior returns r >= size on overflow, + * others return -1 on overflow. + * All return -1 on format error. + * We need to leave room for 2 null terminations, one for the current var + * string, and one for final null of the var table. So check that the + * strlen written, r, leaves room for 2 chars. + */ + if ((r == -1) || (r > (int)(b->size - 2))) { + b->size = 0; + return 0; + } + + /* Remove any earlier occurrence of the same variable */ + s = strchr(b->buf, '='); + if (s != NULL) { + len = (size_t) (s - b->buf); + for (s = b->base; s < b->buf;) { + if ((memcmp(s, b->buf, len) == 0) && s[len] == '=') { + len = strlen(s) + 1; + memmove(s, (s + len), + ((b->buf + r + 1) - (s + len))); + b->buf -= len; + b->size += (unsigned int)len; + break; + } + + while (*s++) + ; + } + } + + /* skip over this string's null termination */ + r++; + b->size -= r; + b->buf += r; + + return r; +} + +/* + * Initialize local vars from the right source for this platform. + * Return 0 on success, nonzero on error. + */ +int srom_var_init(struct si_pub *sih, uint bustype, void *curmap, + char **vars, uint *count) +{ + uint len; + + len = 0; + + if (vars == NULL || count == NULL) + return 0; + + *vars = NULL; + *count = 0; + + if (curmap != NULL && bustype == PCI_BUS) + return initvars_srom_pci(sih, curmap, vars, count); + + return -EINVAL; +} + +static inline void ltoh16_buf(u16 *buf, unsigned int size) +{ + for (size /= 2; size; size--) + *(buf + size) = le16_to_cpu(*(buf + size)); +} + +static inline void htol16_buf(u16 *buf, unsigned int size) +{ + for (size /= 2; size; size--) + *(buf + size) = cpu_to_le16(*(buf + size)); +} + +/* + * Read in and validate sprom. + * Return 0 on success, nonzero on error. + */ +static int +sprom_read_pci(struct si_pub *sih, u16 *sprom, uint wordoff, + u16 *buf, uint nwords, bool check_crc) +{ + int err = 0; + uint i; + + /* read the sprom */ + for (i = 0; i < nwords; i++) + buf[i] = R_REG(&sprom[wordoff + i]); + + if (check_crc) { + + if (buf[0] == 0xffff) { + /* The hardware thinks that an srom that starts with 0xffff + * is blank, regardless of the rest of the content, so declare + * it bad. + */ + return -ENODATA; + } + + /* fixup the endianness so crc8 will pass */ + htol16_buf(buf, nwords * 2); + if (brcmu_crc8((u8 *) buf, nwords * 2, CRC8_INIT_VALUE) != + CRC8_GOOD_VALUE) { + /* DBG only pci always read srom4 first, then srom8/9 */ + err = -EIO; + } + /* now correct the endianness of the byte array */ + ltoh16_buf(buf, nwords * 2); + } + return err; +} + +#if defined(BCMNVRAMR) +static int otp_read_pci(struct si_pub *sih, u16 *buf, uint bufsz) +{ + u8 *otp; + uint sz = OTP_SZ_MAX / 2; /* size in words */ + int err = 0; + + otp = kzalloc(OTP_SZ_MAX, GFP_ATOMIC); + if (otp == NULL) { + return -ENOMEM; + } + + err = otp_read_region(sih, OTP_HW_RGN, (u16 *) otp, &sz); + + memcpy(buf, otp, bufsz); + + kfree(otp); + + /* Check CRC */ + if (buf[0] == 0xffff) { + /* The hardware thinks that an srom that starts with 0xffff + * is blank, regardless of the rest of the content, so declare + * it bad. + */ + return -ENODATA; + } + + /* fixup the endianness so crc8 will pass */ + htol16_buf(buf, bufsz); + if (brcmu_crc8((u8 *) buf, SROM4_WORDS * 2, CRC8_INIT_VALUE) != + CRC8_GOOD_VALUE) { + err = -EIO; + } + /* now correct the endianness of the byte array */ + ltoh16_buf(buf, bufsz); + + return err; +} +#endif /* defined(BCMNVRAMR) */ +/* +* Create variable table from memory. +* Return 0 on success, nonzero on error. +*/ +static int initvars_table(char *start, char *end, + char **vars, uint *count) +{ + int c = (int)(end - start); + + /* do it only when there is more than just the null string */ + if (c > 1) { + char *vp = kmalloc(c, GFP_ATOMIC); + if (!vp) + return -ENOMEM; + memcpy(vp, start, c); + *vars = vp; + *count = c; + } else { + *vars = NULL; + *count = 0; + } + + return 0; +} + +/* Parse SROM and create name=value pairs. 'srom' points to + * the SROM word array. 'off' specifies the offset of the + * first word 'srom' points to, which should be either 0 or + * SROM3_SWRG_OFF (full SROM or software region). + */ + +static uint mask_shift(u16 mask) +{ + uint i; + for (i = 0; i < (sizeof(mask) << 3); i++) { + if (mask & (1 << i)) + return i; + } + return 0; +} + +static uint mask_width(u16 mask) +{ + int i; + for (i = (sizeof(mask) << 3) - 1; i >= 0; i--) { + if (mask & (1 << i)) + return (uint) (i - mask_shift(mask) + 1); + } + return 0; +} + +static void +_initvars_srom_pci(u8 sromrev, u16 *srom, uint off, struct brcms_varbuf *b) +{ + u16 w; + u32 val; + const struct brcms_sromvar *srv; + uint width; + uint flags; + u32 sr = (1 << sromrev); + + varbuf_append(b, "sromrev=%d", sromrev); + + for (srv = pci_sromvars; srv->name != NULL; srv++) { + const char *name; + + if ((srv->revmask & sr) == 0) + continue; + + if (srv->off < off) + continue; + + flags = srv->flags; + name = srv->name; + + /* This entry is for mfgc only. Don't generate param for it, */ + if (flags & SRFL_NOVAR) + continue; + + if (flags & SRFL_ETHADDR) { + u8 ea[ETH_ALEN]; + + ea[0] = (srom[srv->off - off] >> 8) & 0xff; + ea[1] = srom[srv->off - off] & 0xff; + ea[2] = (srom[srv->off + 1 - off] >> 8) & 0xff; + ea[3] = srom[srv->off + 1 - off] & 0xff; + ea[4] = (srom[srv->off + 2 - off] >> 8) & 0xff; + ea[5] = srom[srv->off + 2 - off] & 0xff; + + varbuf_append(b, "%s=%pM", name, ea); + } else { + w = srom[srv->off - off]; + val = (w & srv->mask) >> mask_shift(srv->mask); + width = mask_width(srv->mask); + + while (srv->flags & SRFL_MORE) { + srv++; + if (srv->off == 0 || srv->off < off) + continue; + + w = srom[srv->off - off]; + val += + ((w & srv->mask) >> mask_shift(srv-> + mask)) << + width; + width += mask_width(srv->mask); + } + + if ((flags & SRFL_NOFFS) + && ((int)val == (1 << width) - 1)) + continue; + + if (flags & SRFL_CCODE) { + if (val == 0) + varbuf_append(b, "ccode="); + else + varbuf_append(b, "ccode=%c%c", + (val >> 8), (val & 0xff)); + } + /* LED Powersave duty cycle has to be scaled: + *(oncount >> 24) (offcount >> 8) + */ + else if (flags & SRFL_LEDDC) { + u32 w32 = (((val >> 8) & 0xff) << 24) | /* oncount */ + (((val & 0xff)) << 8); /* offcount */ + varbuf_append(b, "leddc=%d", w32); + } else if (flags & SRFL_PRHEX) + varbuf_append(b, "%s=0x%x", name, val); + else if ((flags & SRFL_PRSIGN) + && (val & (1 << (width - 1)))) + varbuf_append(b, "%s=%d", name, + (int)(val | (~0 << width))); + else + varbuf_append(b, "%s=%u", name, val); + } + } + + if (sromrev >= 4) { + /* Do per-path variables */ + uint p, pb, psz; + + if (sromrev >= 8) { + pb = SROM8_PATH0; + psz = SROM8_PATH1 - SROM8_PATH0; + } else { + pb = SROM4_PATH0; + psz = SROM4_PATH1 - SROM4_PATH0; + } + + for (p = 0; p < MAX_PATH_SROM; p++) { + for (srv = perpath_pci_sromvars; srv->name != NULL; + srv++) { + if ((srv->revmask & sr) == 0) + continue; + + if (pb + srv->off < off) + continue; + + /* This entry is for mfgc only. Don't generate param for it, */ + if (srv->flags & SRFL_NOVAR) + continue; + + w = srom[pb + srv->off - off]; + val = (w & srv->mask) >> mask_shift(srv->mask); + width = mask_width(srv->mask); + + /* Cheating: no per-path var is more than 1 word */ + + if ((srv->flags & SRFL_NOFFS) + && ((int)val == (1 << width) - 1)) + continue; + + if (srv->flags & SRFL_PRHEX) + varbuf_append(b, "%s%d=0x%x", srv->name, + p, val); + else + varbuf_append(b, "%s%d=%d", srv->name, + p, val); + } + pb += psz; + } + } +} + +/* + * Initialize nonvolatile variable table from sprom. + * Return 0 on success, nonzero on error. + */ +static int initvars_srom_pci(struct si_pub *sih, void *curmap, char **vars, + uint *count) +{ + u16 *srom, *sromwindow; + u8 sromrev = 0; + u32 sr; + struct brcms_varbuf b; + char *vp, *base = NULL; + int err = 0; + + /* + * Apply CRC over SROM content regardless SROM is present or not. + */ + srom = kmalloc(SROM_MAX, GFP_ATOMIC); + if (!srom) + return -ENOMEM; + + sromwindow = (u16 *) SROM_OFFSET(sih); + if (ai_is_sprom_available(sih)) { + err = sprom_read_pci(sih, sromwindow, 0, srom, SROM_WORDS, + true); + + if ((srom[SROM4_SIGN] == SROM4_SIGNATURE) || + (((sih->buscoretype == PCIE_CORE_ID) + && (sih->buscorerev >= 6)) + || ((sih->buscoretype == PCI_CORE_ID) + && (sih->buscorerev >= 0xe)))) { + /* sromrev >= 4, read more */ + err = sprom_read_pci(sih, sromwindow, 0, srom, + SROM4_WORDS, true); + sromrev = srom[SROM4_CRCREV] & 0xff; + } else if (err == 0) { + /* srom is good and is rev < 4 */ + /* top word of sprom contains version and crc8 */ + sromrev = srom[SROM_CRCREV] & 0xff; + /* bcm4401 sroms misprogrammed */ + if (sromrev == 0x10) + sromrev = 1; + } + } +#if defined(BCMNVRAMR) + /* Use OTP if SPROM not available */ + else { + err = otp_read_pci(sih, srom, SROM_MAX); + if (err == 0) + /* OTP only contain SROM rev8/rev9 for now */ + sromrev = srom[SROM4_CRCREV] & 0xff; + } +#else + else + err = -ENODEV; +#endif + + if (!err) { + /* Bitmask for the sromrev */ + sr = 1 << sromrev; + + /* srom version check: Current valid versions: 1, 2, 3, 4, 5, 8, 9 */ + if ((sr & 0x33e) == 0) { + err = -EINVAL; + goto errout; + } + + base = kmalloc(MAXSZ_NVRAM_VARS, GFP_ATOMIC); + if (!base) { + err = -ENOMEM; + goto errout; + } + + varbuf_init(&b, base, MAXSZ_NVRAM_VARS); + + /* parse SROM into name=value pairs. */ + _initvars_srom_pci(sromrev, srom, 0, &b); -typedef struct { - u8 tag; /* Broadcom subtag name */ - u8 len; /* Length field of the tuple, note that it includes the - * subtag name (1 byte): 1 + tuple content length - */ - const char *params; -} cis_tuple_t; + /* final nullbyte terminator */ + vp = b.buf; + *vp++ = '\0'; -#define OTP_RAW (0xff - 1) /* Reserved tuple number for wrvar Raw input */ -#define OTP_VERS_1 (0xff - 2) /* CISTPL_VERS_1 */ -#define OTP_MANFID (0xff - 3) /* CISTPL_MANFID */ -#define OTP_RAW1 (0xff - 4) /* Like RAW, but comes first */ + err = initvars_table(base, vp, vars, count); + kfree(base); + } -#endif /* _bcmsrom_tbl_h_ */ +errout: + kfree(srom); + return err; +} diff --git a/drivers/staging/brcm80211/include/bcmsrom.h b/drivers/staging/brcm80211/brcmsmac/srom.h index b2dc8951c5d..efc4d1edd86 100644 --- a/drivers/staging/brcm80211/include/bcmsrom.h +++ b/drivers/staging/brcm80211/brcmsmac/srom.h @@ -14,16 +14,16 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmsrom_h_ -#define _bcmsrom_h_ +#ifndef _BRCM_SROM_H_ +#define _BRCM_SROM_H_ -#include <bcmsrom_fmt.h> +#include "types.h" /* Prototypes */ -extern int srom_var_init(si_t *sih, uint bus, void *curmap, +extern int srom_var_init(struct si_pub *sih, uint bus, void *curmap, char **vars, uint *count); -extern int srom_read(si_t *sih, uint bus, void *curmap, +extern int srom_read(struct si_pub *sih, uint bus, void *curmap, uint byteoff, uint nbytes, u16 *buf, bool check_crc); /* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP @@ -31,4 +31,4 @@ extern int srom_read(si_t *sih, uint bus, void *curmap, */ extern int srom_parsecis(u8 **pcis, uint ciscnt, char **vars, uint *count); -#endif /* _bcmsrom_h_ */ +#endif /* _BRCM_SROM_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c b/drivers/staging/brcm80211/brcmsmac/stf.c index c4f58172182..a55ff010178 100644 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.c +++ b/drivers/staging/brcm80211/brcmsmac/stf.c @@ -14,47 +14,31 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/kernel.h> -#include <linux/module.h> +#include <net/mac80211.h> -#include <proto/802.11.h> - -#include <bcmdefs.h> -#include <bcmutils.h> -#include <aiutils.h> -#include <wlioctl.h> -#include <bcmwifi.h> -#include <bcmnvram.h> -#include <sbhnddma.h> - -#include "wlc_types.h" +#include "types.h" #include "d11.h" -#include "wl_dbg.h" -#include "wlc_cfg.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "wlc_key.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "wlc_main.h" -#include "wl_export.h" -#include "wlc_bmac.h" -#include "wlc_stf.h" +#include "rate.h" +#include "phy/phy_hal.h" +#include "channel.h" +#include "main.h" +#include "bmac.h" +#include "stf.h" #define MIN_SPATIAL_EXPANSION 0 #define MAX_SPATIAL_EXPANSION 1 -#define WLC_STF_SS_STBC_RX(wlc) (WLCISNPHY(wlc->band) && \ +#define BRCMS_STF_SS_STBC_RX(wlc) (BRCMS_ISNPHY(wlc->band) && \ NREV_GT(wlc->band->phyrev, 3) && NREV_LE(wlc->band->phyrev, 6)) -static bool wlc_stf_stbc_tx_set(struct wlc_info *wlc, s32 int_val); -static int wlc_stf_txcore_set(struct wlc_info *wlc, u8 Nsts, u8 val); -static int wlc_stf_spatial_policy_set(struct wlc_info *wlc, int val); -static void wlc_stf_stbc_rx_ht_update(struct wlc_info *wlc, int val); +static bool brcms_c_stf_stbc_tx_set(struct brcms_c_info *wlc, s32 int_val); +static int brcms_c_stf_txcore_set(struct brcms_c_info *wlc, u8 Nsts, u8 val); +static int brcms_c_stf_spatial_policy_set(struct brcms_c_info *wlc, int val); +static void brcms_c_stf_stbc_rx_ht_update(struct brcms_c_info *wlc, int val); -static void _wlc_stf_phy_txant_upd(struct wlc_info *wlc); -static u16 _wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec); +static void _brcms_c_stf_phy_txant_upd(struct brcms_c_info *wlc); +static u16 _brcms_c_stf_phytxchain_sel(struct brcms_c_info *wlc, + ratespec_t rspec); #define NSTS_1 1 #define NSTS_2 2 @@ -68,10 +52,10 @@ const u8 txcore_default[5] = { (0x0f) /* For Nsts = 4, enable all cores */ }; -static void wlc_stf_stbc_rx_ht_update(struct wlc_info *wlc, int val) +static void brcms_c_stf_stbc_rx_ht_update(struct brcms_c_info *wlc, int val) { /* MIMOPHYs rev3-6 cannot receive STBC with only one rx core active */ - if (WLC_STF_SS_STBC_RX(wlc)) { + if (BRCMS_STF_SS_STBC_RX(wlc)) { if ((wlc->stf->rxstreams == 1) && (val != HT_CAP_RX_STBC_NO)) return; } @@ -80,15 +64,15 @@ static void wlc_stf_stbc_rx_ht_update(struct wlc_info *wlc, int val) wlc->ht_cap.cap_info |= (val << IEEE80211_HT_CAP_RX_STBC_SHIFT); if (wlc->pub->up) { - wlc_update_beacon(wlc); - wlc_update_probe_resp(wlc, true); + brcms_c_update_beacon(wlc); + brcms_c_update_probe_resp(wlc, true); } } /* every WLC_TEMPSENSE_PERIOD seconds temperature check to decide whether to turn on/off txchain */ -void wlc_tempsense_upd(struct wlc_info *wlc) +void brcms_c_tempsense_upd(struct brcms_c_info *wlc) { - wlc_phy_t *pi = wlc->band->pi; + struct brcms_phy_pub *pi = wlc->band->pi; uint active_chains, txchain; /* Check if the chip is too hot. Disable one Tx chain, if it is */ @@ -99,21 +83,21 @@ void wlc_tempsense_upd(struct wlc_info *wlc) if (wlc->stf->txchain == wlc->stf->hw_txchain) { if (txchain && (txchain < wlc->stf->hw_txchain)) { /* turn off 1 tx chain */ - wlc_stf_txchain_set(wlc, txchain, true); + brcms_c_stf_txchain_set(wlc, txchain, true); } } else if (wlc->stf->txchain < wlc->stf->hw_txchain) { if (txchain == wlc->stf->hw_txchain) { /* turn back on txchain */ - wlc_stf_txchain_set(wlc, txchain, true); + brcms_c_stf_txchain_set(wlc, txchain, true); } } } void -wlc_stf_ss_algo_channel_get(struct wlc_info *wlc, u16 *ss_algo_channel, +brcms_c_stf_ss_algo_channel_get(struct brcms_c_info *wlc, u16 *ss_algo_channel, chanspec_t chanspec) { - tx_power_t power; + struct tx_power power; u8 siso_mcs_id, cdd_mcs_id, stbc_mcs_id; /* Clear previous settings */ @@ -151,7 +135,7 @@ wlc_stf_ss_algo_channel_get(struct wlc_info *wlc, u16 *ss_algo_channel, setbit(ss_algo_channel, PHY_TXC1_MODE_STBC); } -static bool wlc_stf_stbc_tx_set(struct wlc_info *wlc, s32 int_val) +static bool brcms_c_stf_stbc_tx_set(struct brcms_c_info *wlc, s32 int_val) { if ((int_val != AUTO) && (int_val != OFF) && (int_val != ON)) { return false; @@ -161,7 +145,7 @@ static bool wlc_stf_stbc_tx_set(struct wlc_info *wlc, s32 int_val) return false; if ((int_val == OFF) || (wlc->stf->txstreams == 1) - || !WLC_STBC_CAP_PHY(wlc)) + || !BRCMS_STBC_CAP_PHY(wlc)) wlc->ht_cap.cap_info &= ~IEEE80211_HT_CAP_TX_STBC; else wlc->ht_cap.cap_info |= IEEE80211_HT_CAP_TX_STBC; @@ -172,33 +156,34 @@ static bool wlc_stf_stbc_tx_set(struct wlc_info *wlc, s32 int_val) return true; } -bool wlc_stf_stbc_rx_set(struct wlc_info *wlc, s32 int_val) +bool brcms_c_stf_stbc_rx_set(struct brcms_c_info *wlc, s32 int_val) { if ((int_val != HT_CAP_RX_STBC_NO) && (int_val != HT_CAP_RX_STBC_ONE_STREAM)) { return false; } - if (WLC_STF_SS_STBC_RX(wlc)) { + if (BRCMS_STF_SS_STBC_RX(wlc)) { if ((int_val != HT_CAP_RX_STBC_NO) && (wlc->stf->rxstreams == 1)) return false; } - wlc_stf_stbc_rx_ht_update(wlc, int_val); + brcms_c_stf_stbc_rx_ht_update(wlc, int_val); return true; } -static int wlc_stf_txcore_set(struct wlc_info *wlc, u8 Nsts, u8 core_mask) +static int brcms_c_stf_txcore_set(struct brcms_c_info *wlc, u8 Nsts, + u8 core_mask) { BCMMSG(wlc->wiphy, "wl%d: Nsts %d core_mask %x\n", wlc->pub->unit, Nsts, core_mask); - if (WLC_BITSCNT(core_mask) > wlc->stf->txstreams) { + if (BRCMS_BITSCNT(core_mask) > wlc->stf->txstreams) { core_mask = 0; } - if ((WLC_BITSCNT(core_mask) == wlc->stf->txstreams) && + if ((BRCMS_BITSCNT(core_mask) == wlc->stf->txstreams) && ((core_mask & ~wlc->stf->txchain) || !(core_mask & wlc->stf->txchain))) { core_mask = wlc->stf->txchain; @@ -211,18 +196,18 @@ static int wlc_stf_txcore_set(struct wlc_info *wlc, u8 Nsts, u8 core_mask) * frames when 1 stream core map changed */ wlc->stf->phytxant = core_mask << PHY_TXC_ANT_SHIFT; - wlc_bmac_txant_set(wlc->hw, wlc->stf->phytxant); + brcms_b_txant_set(wlc->hw, wlc->stf->phytxant); if (wlc->clk) { - wlc_suspend_mac_and_wait(wlc); - wlc_beacon_phytxctl_txant_upd(wlc, wlc->bcn_rspec); - wlc_enable_mac(wlc); + brcms_c_suspend_mac_and_wait(wlc); + brcms_c_beacon_phytxctl_txant_upd(wlc, wlc->bcn_rspec); + brcms_c_enable_mac(wlc); } } return 0; } -static int wlc_stf_spatial_policy_set(struct wlc_info *wlc, int val) +static int brcms_c_stf_spatial_policy_set(struct brcms_c_info *wlc, int val) { int i; u8 core_mask = 0; @@ -233,12 +218,12 @@ static int wlc_stf_spatial_policy_set(struct wlc_info *wlc, int val) for (i = 1; i <= MAX_STREAMS_SUPPORTED; i++) { core_mask = (val == MAX_SPATIAL_EXPANSION) ? wlc->stf->txchain : txcore_default[i]; - wlc_stf_txcore_set(wlc, (u8) i, core_mask); + brcms_c_stf_txcore_set(wlc, (u8) i, core_mask); } return 0; } -int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force) +int brcms_c_stf_txchain_set(struct brcms_c_info *wlc, s32 int_val, bool force) { u8 txchain = (u8) int_val; u8 txstreams; @@ -252,7 +237,7 @@ int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force) return -EINVAL; /* if nrate override is configured to be non-SISO STF mode, reject reducing txchain to 1 */ - txstreams = (u8) WLC_BITSCNT(txchain); + txstreams = (u8) BRCMS_BITSCNT(txchain); if (txstreams > MAX_STREAMS_SUPPORTED) return -EINVAL; @@ -288,24 +273,24 @@ int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force) wlc->stf->txchain = txchain; wlc->stf->txstreams = txstreams; - wlc_stf_stbc_tx_set(wlc, wlc->band->band_stf_stbc_tx); - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); + brcms_c_stf_stbc_tx_set(wlc, wlc->band->band_stf_stbc_tx); + brcms_c_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); + brcms_c_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); wlc->stf->txant = (wlc->stf->txstreams == 1) ? ANT_TX_FORCE_0 : ANT_TX_DEF; - _wlc_stf_phy_txant_upd(wlc); + _brcms_c_stf_phy_txant_upd(wlc); wlc_phy_stf_chain_set(wlc->band->pi, wlc->stf->txchain, wlc->stf->rxchain); for (i = 1; i <= MAX_STREAMS_SUPPORTED; i++) - wlc_stf_txcore_set(wlc, (u8) i, txcore_default[i]); + brcms_c_stf_txcore_set(wlc, (u8) i, txcore_default[i]); return 0; } /* update wlc->stf->ss_opmode which represents the operational stf_ss mode we're using */ -int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band) +int brcms_c_stf_ss_update(struct brcms_c_info *wlc, struct brcms_band *band) { int ret_code = 0; u8 prev_stf_ss; @@ -314,7 +299,7 @@ int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band) prev_stf_ss = wlc->stf->ss_opmode; /* NOTE: opmode can only be SISO or CDD as STBC is decided on a per-packet basis */ - if (WLC_STBC_CAP_PHY(wlc) && + if (BRCMS_STBC_CAP_PHY(wlc) && wlc->stf->ss_algosel_auto && (wlc->stf->ss_algo_channel != (u16) -1)) { upd_stf_ss = (wlc->stf->no_cddstbc || (wlc->stf->txstreams == 1) @@ -331,70 +316,37 @@ int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band) } if (prev_stf_ss != upd_stf_ss) { wlc->stf->ss_opmode = upd_stf_ss; - wlc_bmac_band_stf_ss_set(wlc->hw, upd_stf_ss); + brcms_b_band_stf_ss_set(wlc->hw, upd_stf_ss); } return ret_code; } -int wlc_stf_attach(struct wlc_info *wlc) +int brcms_c_stf_attach(struct brcms_c_info *wlc) { wlc->bandstate[BAND_2G_INDEX]->band_stf_ss_mode = PHY_TXC1_MODE_SISO; wlc->bandstate[BAND_5G_INDEX]->band_stf_ss_mode = PHY_TXC1_MODE_CDD; - if (WLCISNPHY(wlc->band) && + if (BRCMS_ISNPHY(wlc->band) && (wlc_phy_txpower_hw_ctrl_get(wlc->band->pi) != PHY_TPC_HW_ON)) wlc->bandstate[BAND_2G_INDEX]->band_stf_ss_mode = PHY_TXC1_MODE_CDD; - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); - wlc_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); + brcms_c_stf_ss_update(wlc, wlc->bandstate[BAND_2G_INDEX]); + brcms_c_stf_ss_update(wlc, wlc->bandstate[BAND_5G_INDEX]); - wlc_stf_stbc_rx_ht_update(wlc, HT_CAP_RX_STBC_NO); + brcms_c_stf_stbc_rx_ht_update(wlc, HT_CAP_RX_STBC_NO); wlc->bandstate[BAND_2G_INDEX]->band_stf_stbc_tx = OFF; wlc->bandstate[BAND_5G_INDEX]->band_stf_stbc_tx = OFF; - if (WLC_STBC_CAP_PHY(wlc)) { + if (BRCMS_STBC_CAP_PHY(wlc)) { wlc->stf->ss_algosel_auto = true; wlc->stf->ss_algo_channel = (u16) -1; /* Init the default value */ } return 0; } -void wlc_stf_detach(struct wlc_info *wlc) -{ -} - -int wlc_stf_ant_txant_validate(struct wlc_info *wlc, s8 val) +void brcms_c_stf_detach(struct brcms_c_info *wlc) { - int bcmerror = 0; - - /* when there is only 1 tx_streams, don't allow to change the txant */ - if (WLCISNPHY(wlc->band) && (wlc->stf->txstreams == 1)) - return ((val == wlc->stf->txant) ? bcmerror : -EINVAL); - - switch (val) { - case -1: - val = ANT_TX_DEF; - break; - case 0: - val = ANT_TX_FORCE_0; - break; - case 1: - val = ANT_TX_FORCE_1; - break; - case 3: - val = ANT_TX_LAST_RX; - break; - default: - bcmerror = -EINVAL; - break; - } - - if (bcmerror == 0) - wlc->stf->txant = (s8) val; - - return bcmerror; - } /* @@ -411,24 +363,25 @@ int wlc_stf_ant_txant_validate(struct wlc_info *wlc, s8 val) * do tx-antenna selection for SISO transmissions * for NREV>=7, bit 6 and bit 7 mean antenna 0 and 1 respectively, nit6+bit7 means both cores active */ -static void _wlc_stf_phy_txant_upd(struct wlc_info *wlc) +static void _brcms_c_stf_phy_txant_upd(struct brcms_c_info *wlc) { s8 txant; txant = (s8) wlc->stf->txant; - if (WLC_PHY_11N_CAP(wlc->band)) { + if (BRCMS_PHY_11N_CAP(wlc->band)) { if (txant == ANT_TX_FORCE_0) { wlc->stf->phytxant = PHY_TXC_ANT_0; } else if (txant == ANT_TX_FORCE_1) { wlc->stf->phytxant = PHY_TXC_ANT_1; - if (WLCISNPHY(wlc->band) && + if (BRCMS_ISNPHY(wlc->band) && NREV_GE(wlc->band->phyrev, 3) && NREV_LT(wlc->band->phyrev, 7)) { wlc->stf->phytxant = PHY_TXC_ANT_2; } } else { - if (WLCISLCNPHY(wlc->band) || WLCISSSLPNPHY(wlc->band)) + if (BRCMS_ISLCNPHY(wlc->band) || + BRCMS_ISSSLPNPHY(wlc->band)) wlc->stf->phytxant = PHY_TXC_LCNPHY_ANT_LAST; else { /* catch out of sync wlc->stf->txcore */ @@ -446,15 +399,15 @@ static void _wlc_stf_phy_txant_upd(struct wlc_info *wlc) wlc->stf->phytxant = PHY_TXC_OLD_ANT_LAST; } - wlc_bmac_txant_set(wlc->hw, wlc->stf->phytxant); + brcms_b_txant_set(wlc->hw, wlc->stf->phytxant); } -void wlc_stf_phy_txant_upd(struct wlc_info *wlc) +void brcms_c_stf_phy_txant_upd(struct brcms_c_info *wlc) { - _wlc_stf_phy_txant_upd(wlc); + _brcms_c_stf_phy_txant_upd(wlc); } -void wlc_stf_phy_chain_calc(struct wlc_info *wlc) +void brcms_c_stf_phy_chain_calc(struct brcms_c_info *wlc) { /* get available rx/tx chains */ wlc->stf->hw_txchain = (u8) getintvar(wlc->pub->vars, "txchain"); @@ -462,7 +415,7 @@ void wlc_stf_phy_chain_calc(struct wlc_info *wlc) /* these parameter are intended to be used for all PHY types */ if (wlc->stf->hw_txchain == 0 || wlc->stf->hw_txchain == 0xf) { - if (WLCISNPHY(wlc->band)) { + if (BRCMS_ISNPHY(wlc->band)) { wlc->stf->hw_txchain = TXCHAIN_DEF_NPHY; } else { wlc->stf->hw_txchain = TXCHAIN_DEF; @@ -470,10 +423,10 @@ void wlc_stf_phy_chain_calc(struct wlc_info *wlc) } wlc->stf->txchain = wlc->stf->hw_txchain; - wlc->stf->txstreams = (u8) WLC_BITSCNT(wlc->stf->hw_txchain); + wlc->stf->txstreams = (u8) BRCMS_BITSCNT(wlc->stf->hw_txchain); if (wlc->stf->hw_rxchain == 0 || wlc->stf->hw_rxchain == 0xf) { - if (WLCISNPHY(wlc->band)) { + if (BRCMS_ISNPHY(wlc->band)) { wlc->stf->hw_rxchain = RXCHAIN_DEF_NPHY; } else { wlc->stf->hw_rxchain = RXCHAIN_DEF; @@ -481,17 +434,18 @@ void wlc_stf_phy_chain_calc(struct wlc_info *wlc) } wlc->stf->rxchain = wlc->stf->hw_rxchain; - wlc->stf->rxstreams = (u8) WLC_BITSCNT(wlc->stf->hw_rxchain); + wlc->stf->rxstreams = (u8) BRCMS_BITSCNT(wlc->stf->hw_rxchain); /* initialize the txcore table */ memcpy(wlc->stf->txcore, txcore_default, sizeof(wlc->stf->txcore)); /* default spatial_policy */ wlc->stf->spatial_policy = MIN_SPATIAL_EXPANSION; - wlc_stf_spatial_policy_set(wlc, MIN_SPATIAL_EXPANSION); + brcms_c_stf_spatial_policy_set(wlc, MIN_SPATIAL_EXPANSION); } -static u16 _wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec) +static u16 _brcms_c_stf_phytxchain_sel(struct brcms_c_info *wlc, + ratespec_t rspec) { u16 phytxant = wlc->stf->phytxant; @@ -503,19 +457,19 @@ static u16 _wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec) return phytxant; } -u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec) +u16 brcms_c_stf_phytxchain_sel(struct brcms_c_info *wlc, ratespec_t rspec) { - return _wlc_stf_phytxchain_sel(wlc, rspec); + return _brcms_c_stf_phytxchain_sel(wlc, rspec); } -u16 wlc_stf_d11hdrs_phyctl_txant(struct wlc_info *wlc, ratespec_t rspec) +u16 brcms_c_stf_d11hdrs_phyctl_txant(struct brcms_c_info *wlc, ratespec_t rspec) { u16 phytxant = wlc->stf->phytxant; u16 mask = PHY_TXC_ANT_MASK; /* for non-siso rates or default setting, use the available chains */ - if (WLCISNPHY(wlc->band)) { - phytxant = _wlc_stf_phytxchain_sel(wlc, rspec); + if (BRCMS_ISNPHY(wlc->band)) { + phytxant = _brcms_c_stf_phytxchain_sel(wlc, rspec); mask = PHY_TXC_HTANT_MASK; } phytxant |= phytxant & mask; diff --git a/drivers/staging/brcm80211/brcmsmac/stf.h b/drivers/staging/brcm80211/brcmsmac/stf.h new file mode 100644 index 00000000000..06c2a399649 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/stf.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_STF_H_ +#define _BRCM_STF_H_ + +#include "types.h" + +extern int brcms_c_stf_attach(struct brcms_c_info *wlc); +extern void brcms_c_stf_detach(struct brcms_c_info *wlc); + +extern void brcms_c_tempsense_upd(struct brcms_c_info *wlc); +extern void brcms_c_stf_ss_algo_channel_get(struct brcms_c_info *wlc, + u16 *ss_algo_channel, + chanspec_t chanspec); +extern int brcms_c_stf_ss_update(struct brcms_c_info *wlc, + struct brcms_band *band); +extern void brcms_c_stf_phy_txant_upd(struct brcms_c_info *wlc); +extern int brcms_c_stf_txchain_set(struct brcms_c_info *wlc, s32 int_val, + bool force); +extern bool brcms_c_stf_stbc_rx_set(struct brcms_c_info *wlc, s32 int_val); +extern void brcms_c_stf_phy_txant_upd(struct brcms_c_info *wlc); +extern void brcms_c_stf_phy_chain_calc(struct brcms_c_info *wlc); +extern u16 brcms_c_stf_phytxchain_sel(struct brcms_c_info *wlc, + ratespec_t rspec); +extern u16 brcms_c_stf_d11hdrs_phyctl_txant(struct brcms_c_info *wlc, + ratespec_t rspec); + +#endif /* _BRCM_STF_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/types.h b/drivers/staging/brcm80211/brcmsmac/types.h new file mode 100644 index 00000000000..bbf21897ae0 --- /dev/null +++ b/drivers/staging/brcm80211/brcmsmac/types.h @@ -0,0 +1,398 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_TYPES_H_ +#define _BRCM_TYPES_H_ + +#include <linux/types.h> + +/* Bus types */ +#define SI_BUS 0 /* SOC Interconnect */ +#define PCI_BUS 1 /* PCI target */ +#define SDIO_BUS 3 /* SDIO target */ +#define JTAG_BUS 4 /* JTAG */ +#define USB_BUS 5 /* USB (does not support R/W REG) */ +#define SPI_BUS 6 /* gSPI target */ +#define RPC_BUS 7 /* RPC target */ + +#define WL_CHAN_FREQ_RANGE_2G 0 +#define WL_CHAN_FREQ_RANGE_5GL 1 +#define WL_CHAN_FREQ_RANGE_5GM 2 +#define WL_CHAN_FREQ_RANGE_5GH 3 + +#define MAX_DMA_SEGS 4 + +/* boardflags */ +#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */ +#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */ +#define BFL_FEM 0x00000800 /* Board supports the Front End Module */ +#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ +#define BFL_NOPA 0x00010000 /* Board has no PA */ +#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */ +#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ +#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ +#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */ +#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ + +/* boardflags2 */ +#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ +#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ +#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */ +#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */ +#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */ +#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */ +#define BFL2_LEGACY 0x00000080 +#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */ +#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */ +#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */ +#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */ +#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */ +#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */ +#define BFL2_IPALVLSHIFT_3P3 0x00020000 +#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */ +#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON" + * Most drivers will turn it off without this flag + * to save power. + */ + +/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ +#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */ +#define BOARD_GPIO_12 0x1000 /* gpio 12 */ +#define BOARD_GPIO_13 0x2000 /* gpio 13 */ + +/* **** Core type/rev defaults **** */ +#define D11CONF 0x0fffffb0 /* Supported D11 revs: 4, 5, 7-27 + * also need to update wlc.h MAXCOREREV + */ + +#define NCONF 0x000001ff /* Supported nphy revs: + * 0 4321a0 + * 1 4321a1 + * 2 4321b0/b1/c0/c1 + * 3 4322a0 + * 4 4322a1 + * 5 4716a0 + * 6 43222a0, 43224a0 + * 7 43226a0 + * 8 5357a0, 43236a0 + */ + +#define LCNCONF 0x00000007 /* Supported lcnphy revs: + * 0 4313a0, 4336a0, 4330a0 + * 1 + * 2 4330a0 + */ + +#define SSLPNCONF 0x0000000f /* Supported sslpnphy revs: + * 0 4329a0/k0 + * 1 4329b0/4329C0 + * 2 4319a0 + * 3 5356a0 + */ + +/******************************************************************** + * Phy/Core Configuration. Defines macros to to check core phy/rev * + * compile-time configuration. Defines default core support. * + * ****************************************************************** + */ + +/* Basic macros to check a configuration bitmask */ + +#define CONF_HAS(config, val) ((config) & (1 << (val))) +#define CONF_MSK(config, mask) ((config) & (mask)) +#define MSK_RANGE(low, hi) ((1 << ((hi)+1)) - (1 << (low))) +#define CONF_RANGE(config, low, hi) (CONF_MSK(config, MSK_RANGE(low, high))) + +#define CONF_IS(config, val) ((config) == (1 << (val))) +#define CONF_GE(config, val) ((config) & (0-(1 << (val)))) +#define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) +#define CONF_LT(config, val) ((config) & ((1 << (val))-1)) +#define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) + +/* Wrappers for some of the above, specific to config constants */ + +#define NCONF_HAS(val) CONF_HAS(NCONF, val) +#define NCONF_MSK(mask) CONF_MSK(NCONF, mask) +#define NCONF_IS(val) CONF_IS(NCONF, val) +#define NCONF_GE(val) CONF_GE(NCONF, val) +#define NCONF_GT(val) CONF_GT(NCONF, val) +#define NCONF_LT(val) CONF_LT(NCONF, val) +#define NCONF_LE(val) CONF_LE(NCONF, val) + +#define LCNCONF_HAS(val) CONF_HAS(LCNCONF, val) +#define LCNCONF_MSK(mask) CONF_MSK(LCNCONF, mask) +#define LCNCONF_IS(val) CONF_IS(LCNCONF, val) +#define LCNCONF_GE(val) CONF_GE(LCNCONF, val) +#define LCNCONF_GT(val) CONF_GT(LCNCONF, val) +#define LCNCONF_LT(val) CONF_LT(LCNCONF, val) +#define LCNCONF_LE(val) CONF_LE(LCNCONF, val) + +#define D11CONF_HAS(val) CONF_HAS(D11CONF, val) +#define D11CONF_MSK(mask) CONF_MSK(D11CONF, mask) +#define D11CONF_IS(val) CONF_IS(D11CONF, val) +#define D11CONF_GE(val) CONF_GE(D11CONF, val) +#define D11CONF_GT(val) CONF_GT(D11CONF, val) +#define D11CONF_LT(val) CONF_LT(D11CONF, val) +#define D11CONF_LE(val) CONF_LE(D11CONF, val) + +#define PHYCONF_HAS(val) CONF_HAS(PHYTYPE, val) +#define PHYCONF_IS(val) CONF_IS(PHYTYPE, val) + +#define NREV_IS(var, val) (NCONF_HAS(val) && (NCONF_IS(val) || ((var) == (val)))) +#define NREV_GE(var, val) (NCONF_GE(val) && (!NCONF_LT(val) || ((var) >= (val)))) +#define NREV_GT(var, val) (NCONF_GT(val) && (!NCONF_LE(val) || ((var) > (val)))) +#define NREV_LT(var, val) (NCONF_LT(val) && (!NCONF_GE(val) || ((var) < (val)))) +#define NREV_LE(var, val) (NCONF_LE(val) && (!NCONF_GT(val) || ((var) <= (val)))) + +#define LCNREV_IS(var, val) (LCNCONF_HAS(val) && (LCNCONF_IS(val) || ((var) == (val)))) +#define LCNREV_GE(var, val) (LCNCONF_GE(val) && (!LCNCONF_LT(val) || ((var) >= (val)))) +#define LCNREV_GT(var, val) (LCNCONF_GT(val) && (!LCNCONF_LE(val) || ((var) > (val)))) +#define LCNREV_LT(var, val) (LCNCONF_LT(val) && (!LCNCONF_GE(val) || ((var) < (val)))) +#define LCNREV_LE(var, val) (LCNCONF_LE(val) && (!LCNCONF_GT(val) || ((var) <= (val)))) + +#define D11REV_IS(var, val) (D11CONF_HAS(val) && (D11CONF_IS(val) || ((var) == (val)))) +#define D11REV_GE(var, val) (D11CONF_GE(val) && (!D11CONF_LT(val) || ((var) >= (val)))) +#define D11REV_GT(var, val) (D11CONF_GT(val) && (!D11CONF_LE(val) || ((var) > (val)))) +#define D11REV_LT(var, val) (D11CONF_LT(val) && (!D11CONF_GE(val) || ((var) < (val)))) +#define D11REV_LE(var, val) (D11CONF_LE(val) && (!D11CONF_GT(val) || ((var) <= (val)))) + +#define PHYTYPE_IS(var, val) (PHYCONF_HAS(val) && (PHYCONF_IS(val) || ((var) == (val)))) + +/* Finally, early-exit from switch case if anyone wants it... */ + +#define CASECHECK(config, val) if (!(CONF_HAS(config, val))) break +#define CASEMSK(config, mask) if (!(CONF_MSK(config, mask))) break + +/* Set up PHYTYPE automatically: (depends on PHY_TYPE_X, from d11.h) */ + +#define _PHYCONF_N (1 << PHY_TYPE_N) +#define _PHYCONF_LCN (1 << PHY_TYPE_LCN) +#define _PHYCONF_SSLPN (1 << PHY_TYPE_SSN) + +#define PHYTYPE (_PHYCONF_N | _PHYCONF_LCN | _PHYCONF_SSLPN) + +/* Utility macro to identify 802.11n (HT) capable PHYs */ +#define PHYTYPE_11N_CAP(phytype) \ + (PHYTYPE_IS(phytype, PHY_TYPE_N) || \ + PHYTYPE_IS(phytype, PHY_TYPE_LCN) || \ + PHYTYPE_IS(phytype, PHY_TYPE_SSN)) + +/* Last but not least: shorter wlc-specific var checks */ +#define BRCMS_ISNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_N) +#define BRCMS_ISLCNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_LCN) +#define BRCMS_ISSSLPNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_SSN) + +#define BRCMS_PHY_11N_CAP(band) PHYTYPE_11N_CAP((band)->phytype) + +/********************************************************************** + * ------------- End of Core phy/rev configuration. ----------------- * + * ******************************************************************** + */ + +/************************************************* + * Defaults for tunables (e.g. sizing constants) + * + * For each new tunable, add a member to the end + * of struct brcms_tunables in brcms_c_pub.h to enable + * runtime checks of tunable values. (Directly + * using the macros in code invalidates ROM code) + * + * *********************************************** + */ +#define NTXD 256 /* Max # of entries in Tx FIFO based on 4kb page size */ +#define NRXD 256 /* Max # of entries in Rx FIFO based on 4kb page size */ +#define NRXBUFPOST 32 /* try to keep this # rbufs posted to the chip */ +#define MAXSCB 32 /* Maximum SCBs in cache for STA */ +#define AMPDU_NUM_MPDU 16 /* max allowed number of mpdus in an ampdu (2 streams) */ + +/* Count of packet callback structures. either of following + * 1. Set to the number of SCBs since a STA + * can queue up a rate callback for each IBSS STA it knows about, and an AP can + * queue up an "are you there?" Null Data callback for each associated STA + * 2. controlled by tunable config file + */ +#define MAXPKTCB MAXSCB /* Max number of packet callbacks */ + +/* NetBSD also needs to keep track of this */ + +/* Number of BSS handled in ucode bcn/prb */ +#define BRCMS_MAX_UCODE_BSS (16) +/* Number of BSS handled in sw bcn/prb */ +#define BRCMS_MAX_UCODE_BSS4 (4) +/* max # BSS configs */ +#define BRCMS_MAXBSSCFG (1) +/* max # available networks */ +#define MAXBSS 64 +/* data msg txq hiwat mark */ +#define BRCMS_DATAHIWAT 50 +#define BRCMS_AMPDUDATAHIWAT 255 + +/* bounded rx loops */ +#define RXBND 8 /* max # frames to process in brcms_c_recv() */ +#define TXSBND 8 /* max # tx status to process in wlc_txstatus() */ + +#define BAND_5G(bt) ((bt) == BRCM_BAND_5G) +#define BAND_2G(bt) ((bt) == BRCM_BAND_2G) + +#define BCMMSG(dev, fmt, args...) \ +do { \ + if (brcm_msg_level & LOG_TRACE_VAL) \ + wiphy_err(dev, "%s: " fmt, __func__, ##args); \ +} while (0) + +#define WL_ERROR_ON() (brcm_msg_level & LOG_ERROR_VAL) + +/* register access macros */ +#ifndef __BIG_ENDIAN +#ifndef __mips__ +#define R_REG(r) \ + ({\ + sizeof(*(r)) == sizeof(u8) ? \ + readb((u8 *)(r)) : \ + sizeof(*(r)) == sizeof(u16) ? readw((u16 *)(r)) : \ + readl((u32 *)(r)); \ + }) +#else /* __mips__ */ +#define R_REG(r) \ + ({ \ + __typeof(*(r)) __osl_v; \ + __asm__ __volatile__("sync"); \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = readb((u8 *)(r)); \ + break; \ + case sizeof(u16): \ + __osl_v = readw((u16 *)(r)); \ + break; \ + case sizeof(u32): \ + __osl_v = \ + readl((u32 *)(r)); \ + break; \ + } \ + __asm__ __volatile__("sync"); \ + __osl_v; \ + }) +#endif /* __mips__ */ + +#define W_REG(r, v) do { \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), (u8 *)(r)); break; \ + case sizeof(u16): \ + writew((u16)(v), (u16 *)(r)); break; \ + case sizeof(u32): \ + writel((u32)(v), (u32 *)(r)); break; \ + }; \ + } while (0) +#else /* __BIG_ENDIAN */ +#define R_REG(r) \ + ({ \ + __typeof(*(r)) __osl_v; \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + __osl_v = \ + readb((u8 *)((r)^3)); \ + break; \ + case sizeof(u16): \ + __osl_v = \ + readw((u16 *)((r)^2)); \ + break; \ + case sizeof(u32): \ + __osl_v = readl((u32 *)(r)); \ + break; \ + } \ + __osl_v; \ + }) + +#define W_REG(r, v) do { \ + switch (sizeof(*(r))) { \ + case sizeof(u8): \ + writeb((u8)(v), \ + (u8 *)((r)^3)); break; \ + case sizeof(u16): \ + writew((u16)(v), \ + (u16 *)((r)^2)); break; \ + case sizeof(u32): \ + writel((u32)(v), \ + (u32 *)(r)); break; \ + } \ + } while (0) +#endif /* __BIG_ENDIAN */ + +#ifdef __mips__ +/* + * bcm4716 (which includes 4717 & 4718), plus 4706 on PCIe can reorder + * transactions. As a fix, a read after write is performed on certain places + * in the code. Older chips and the newer 5357 family don't require this fix. + */ +#define W_REG_FLUSH(r, v) ({ W_REG((r), (v)); (void)R_REG(r); }) +#else +#define W_REG_FLUSH(r, v) W_REG((r), (v)) +#endif /* __mips__ */ + +#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) +#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) + +#define SET_REG(r, mask, val) \ + W_REG((r), ((R_REG(r) & ~(mask)) | (val))) + +/* multi-bool data type: set of bools, mbool is true if any is set */ +typedef u32 mbool; +#define mboolset(mb, bit) ((mb) |= (bit)) /* set one bool */ +#define mboolclr(mb, bit) ((mb) &= ~(bit)) /* clear one bool */ +#define mboolisset(mb, bit) (((mb) & (bit)) != 0) /* true if one bool is set */ +#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val))) + +/* forward declarations */ +struct wiphy; +struct ieee80211_sta; +struct ieee80211_tx_queue_params; +struct brcms_info; +struct brcms_c_info; +struct brcms_hardware; +struct brcms_c_if; +struct brcmu_iovar; +struct brcmu_strbuf; +struct brcms_txq_info; +struct brcms_band; +struct dma_pub; +struct si_pub; +struct tx_status; +struct d11rxhdr; +struct brcms_d11rxhdr; +struct txpwr_limits; +struct brcms_phy; + +typedef volatile struct intctrlregs intctrlregs_t; +typedef volatile struct pio2regs pio2regs_t; +typedef volatile struct pio2regp pio2regp_t; +typedef volatile struct pio4regs pio4regs_t; +typedef volatile struct pio4regp pio4regp_t; +typedef volatile struct fifo64 fifo64_t; +typedef volatile struct d11regs d11regs_t; +typedef volatile struct dma32diag dma32diag_t; +typedef volatile struct dma64regs dma64regs_t; +typedef struct brcms_rateset wlc_rateset_t; +typedef u32 ratespec_t; +typedef struct chanvec chanvec_t; +typedef s32 fixed; +typedef struct _cs32 cs32; +typedef volatile union pmqreg pmqreg_t; + +/* brcm_msg_level is a bit vector with defs in defs.h */ +extern u32 brcm_msg_level; + +#endif /* _BRCM_TYPES_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c b/drivers/staging/brcm80211/brcmsmac/ucode_loader.c index cc00dd19746..bf733fb18ce 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_ucode_loader.c +++ b/drivers/staging/brcm80211/brcmsmac/ucode_loader.c @@ -14,9 +14,9 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/types.h> -#include <bcmdefs.h> -#include <wl_ucode.h> +#include <defs.h> +#include "types.h" +#include <ucode_loader.h> enum { D11UCODE_NAMETAG_START = 0, @@ -53,59 +53,63 @@ u32 bcm43xx_24_lcnsz; u32 *bcm43xx_bommajor; u32 *bcm43xx_bomminor; -int wl_ucode_data_init(struct wl_info *wl) +int brcms_ucode_data_init(struct brcms_info *wl) { int rc; - rc = wl_check_firmwares(wl); + rc = brcms_check_firmwares(wl); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn0bsinitvals24, - D11LCN0BSINITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn0initvals24, + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn0bsinitvals24, + D11LCN0BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn0initvals24, D11LCN0INITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn1bsinitvals24, - D11LCN1BSINITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn1initvals24, + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn1bsinitvals24, + D11LCN1BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn1initvals24, D11LCN1INITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn2bsinitvals24, - D11LCN2BSINITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11lcn2initvals24, + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11lcn2bsinitvals24, + D11LCN2BSINITVALS24); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11lcn2initvals24, D11LCN2INITVALS24); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0absinitvals16, - D11N0ABSINITVALS16); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0bsinitvals16, + rc = rc < 0 ? rc : + brcms_ucode_init_buf(wl, (void **)&d11n0absinitvals16, + D11N0ABSINITVALS16); + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0bsinitvals16, D11N0BSINITVALS16); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&d11n0initvals16, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&d11n0initvals16, D11N0INITVALS16); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_16_mimo, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_16_mimo, D11UCODE_OVERSIGHT16_MIMO); - rc = rc < 0 ? rc : wl_ucode_init_uint(wl, &bcm43xx_16_mimosz, + rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_16_mimosz, D11UCODE_OVERSIGHT16_MIMOSZ); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_24_lcn, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_24_lcn, D11UCODE_OVERSIGHT24_LCN); - rc = rc < 0 ? rc : wl_ucode_init_uint(wl, &bcm43xx_24_lcnsz, + rc = rc < 0 ? rc : brcms_ucode_init_uint(wl, &bcm43xx_24_lcnsz, D11UCODE_OVERSIGHT24_LCNSZ); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_bommajor, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bommajor, D11UCODE_OVERSIGHT_BOMMAJOR); - rc = rc < 0 ? rc : wl_ucode_init_buf(wl, (void **)&bcm43xx_bomminor, + rc = rc < 0 ? rc : brcms_ucode_init_buf(wl, (void **)&bcm43xx_bomminor, D11UCODE_OVERSIGHT_BOMMINOR); return rc; } -void wl_ucode_data_free(void) +void brcms_ucode_data_free(void) { - wl_ucode_free_buf((void *)d11lcn0bsinitvals24); - wl_ucode_free_buf((void *)d11lcn0initvals24); - wl_ucode_free_buf((void *)d11lcn1bsinitvals24); - wl_ucode_free_buf((void *)d11lcn1initvals24); - wl_ucode_free_buf((void *)d11lcn2bsinitvals24); - wl_ucode_free_buf((void *)d11lcn2initvals24); - wl_ucode_free_buf((void *)d11n0absinitvals16); - wl_ucode_free_buf((void *)d11n0bsinitvals16); - wl_ucode_free_buf((void *)d11n0initvals16); - wl_ucode_free_buf((void *)bcm43xx_16_mimo); - wl_ucode_free_buf((void *)bcm43xx_24_lcn); - wl_ucode_free_buf((void *)bcm43xx_bommajor); - wl_ucode_free_buf((void *)bcm43xx_bomminor); + brcms_ucode_free_buf((void *)d11lcn0bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn0initvals24); + brcms_ucode_free_buf((void *)d11lcn1bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn1initvals24); + brcms_ucode_free_buf((void *)d11lcn2bsinitvals24); + brcms_ucode_free_buf((void *)d11lcn2initvals24); + brcms_ucode_free_buf((void *)d11n0absinitvals16); + brcms_ucode_free_buf((void *)d11n0bsinitvals16); + brcms_ucode_free_buf((void *)d11n0initvals16); + brcms_ucode_free_buf((void *)bcm43xx_16_mimo); + brcms_ucode_free_buf((void *)bcm43xx_24_lcn); + brcms_ucode_free_buf((void *)bcm43xx_bommajor); + brcms_ucode_free_buf((void *)bcm43xx_bomminor); return; } diff --git a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h b/drivers/staging/brcm80211/brcmsmac/ucode_loader.h index 6933fda0e6a..ca53deced7b 100644 --- a/drivers/staging/brcm80211/brcmsmac/wl_ucode.h +++ b/drivers/staging/brcm80211/brcmsmac/ucode_loader.h @@ -14,6 +14,8 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ +#include "types.h" /* forward structure declarations */ + #define MIN_FW_SIZE 40000 /* minimum firmware file size in bytes */ #define MAX_FW_SIZE 150000 @@ -39,11 +41,12 @@ extern u32 bcm43xx_16_mimosz; extern u32 *bcm43xx_24_lcn; extern u32 bcm43xx_24_lcnsz; -extern int wl_ucode_data_init(struct wl_info *wl); -extern void wl_ucode_data_free(void); +extern int brcms_ucode_data_init(struct brcms_info *wl); +extern void brcms_ucode_data_free(void); -extern int wl_ucode_init_buf(struct wl_info *wl, void **pbuf, unsigned int idx); -extern int wl_ucode_init_uint(struct wl_info *wl, unsigned *data, +extern int brcms_ucode_init_buf(struct brcms_info *wl, void **pbuf, + unsigned int idx); +extern int brcms_ucode_init_uint(struct brcms_info *wl, unsigned *data, unsigned int idx); -extern void wl_ucode_free_buf(void *); -extern int wl_check_firmwares(struct wl_info *wl); +extern void brcms_ucode_free_buf(void *); +extern int brcms_check_firmwares(struct brcms_info *wl); diff --git a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h b/drivers/staging/brcm80211/brcmsmac/wl_dbg.h deleted file mode 100644 index 5582de3ee72..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wl_dbg.h +++ /dev/null @@ -1,92 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wl_dbg_h_ -#define _wl_dbg_h_ - -#include <linux/device.h> /* dev_err() */ - -/* wl_msg_level is a bit vector with defs in wlioctl.h */ -extern u32 wl_msg_level; - -#define BCMMSG(dev, fmt, args...) \ -do { \ - if (wl_msg_level & WL_TRACE_VAL) \ - wiphy_err(dev, "%s: " fmt, __func__, ##args); \ -} while (0) - -#ifdef BCMDBG - - -/* Extra message control for AMPDU debugging */ -#define WL_AMPDU_UPDN_VAL 0x00000001 /* Config up/down related */ -#define WL_AMPDU_ERR_VAL 0x00000002 /* Calls to beaocn update */ -#define WL_AMPDU_TX_VAL 0x00000004 /* Transmit data path */ -#define WL_AMPDU_RX_VAL 0x00000008 /* Receive data path */ -#define WL_AMPDU_CTL_VAL 0x00000010 /* TSF-related items */ -#define WL_AMPDU_HW_VAL 0x00000020 /* AMPDU_HW */ -#define WL_AMPDU_HWTXS_VAL 0x00000040 /* AMPDU_HWTXS */ -#define WL_AMPDU_HWDBG_VAL 0x00000080 /* AMPDU_DBG */ - -extern u32 wl_ampdu_dbg; - -#define WL_AMPDU_PRINT(level, fmt, args...) \ -do { \ - if (wl_ampdu_dbg & level) { \ - WL_AMPDU(fmt, ##args); \ - } \ -} while (0) - -#define WL_AMPDU_UPDN(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_UPDN_VAL, fmt, ##args) -#define WL_AMPDU_RX(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_RX_VAL, fmt, ##args) -#define WL_AMPDU_ERR(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_ERR_VAL, fmt, ##args) -#define WL_AMPDU_TX(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_TX_VAL, fmt, ##args) -#define WL_AMPDU_CTL(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_CTL_VAL, fmt, ##args) -#define WL_AMPDU_HW(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_HW_VAL, fmt, ##args) -#define WL_AMPDU_HWTXS(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_HWTXS_VAL, fmt, ##args) -#define WL_AMPDU_HWDBG(fmt, args...) \ - WL_AMPDU_PRINT(WL_AMPDU_HWDBG_VAL, fmt, ##args) -#define WL_AMPDU_ERR_ON() (wl_ampdu_dbg & WL_AMPDU_ERR_VAL) -#define WL_AMPDU_HW_ON() (wl_ampdu_dbg & WL_AMPDU_HW_VAL) -#define WL_AMPDU_HWTXS_ON() (wl_ampdu_dbg & WL_AMPDU_HWTXS_VAL) - -#else /* BCMDBG */ - - -#define WL_AMPDU_UPDN(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_RX(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_ERR(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_TX(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_CTL(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_HW(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_HWTXS(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_HWDBG(fmt, args...) no_printk(fmt, ##args) -#define WL_AMPDU_ERR_ON() 0 -#define WL_AMPDU_HW_ON() 0 -#define WL_AMPDU_HWTXS_ON() 0 - -#endif /* BCMDBG */ - -#define WL_ERROR_ON() (wl_msg_level & WL_ERROR_VAL) - -#endif /* _wl_dbg_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wl_export.h b/drivers/staging/brcm80211/brcmsmac/wl_export.h deleted file mode 100644 index 0fe0b24b586..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wl_export.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wl_export_h_ -#define _wl_export_h_ - -/* misc callbacks */ -struct wl_info; -struct wl_if; -struct wlc_if; -extern void wl_init(struct wl_info *wl); -extern uint wl_reset(struct wl_info *wl); -extern void wl_intrson(struct wl_info *wl); -extern u32 wl_intrsoff(struct wl_info *wl); -extern void wl_intrsrestore(struct wl_info *wl, u32 macintmask); -extern int wl_up(struct wl_info *wl); -extern void wl_down(struct wl_info *wl); -extern void wl_txflowcontrol(struct wl_info *wl, struct wl_if *wlif, bool state, - int prio); -extern bool wl_alloc_dma_resources(struct wl_info *wl, uint dmaddrwidth); -extern bool wl_rfkill_set_hw_state(struct wl_info *wl); - -/* timer functions */ -struct wl_timer; -extern struct wl_timer *wl_init_timer(struct wl_info *wl, - void (*fn) (void *arg), void *arg, - const char *name); -extern void wl_free_timer(struct wl_info *wl, struct wl_timer *timer); -extern void wl_add_timer(struct wl_info *wl, struct wl_timer *timer, uint ms, - int periodic); -extern bool wl_del_timer(struct wl_info *wl, struct wl_timer *timer); -extern void wl_msleep(struct wl_info *wl, uint ms); - -#endif /* _wl_export_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h b/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h deleted file mode 100644 index 63d403b036f..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_ampdu.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wlc_ampdu_h_ -#define _wlc_ampdu_h_ - -extern struct ampdu_info *wlc_ampdu_attach(struct wlc_info *wlc); -extern void wlc_ampdu_detach(struct ampdu_info *ampdu); -extern int wlc_sendampdu(struct ampdu_info *ampdu, struct wlc_txq_info *qi, - struct sk_buff **aggp, int prec); -extern void wlc_ampdu_dotxstatus(struct ampdu_info *ampdu, struct scb *scb, - struct sk_buff *p, tx_status_t *txs); -extern void wlc_ampdu_macaddr_upd(struct wlc_info *wlc); -extern void wlc_ampdu_shm_upd(struct ampdu_info *ampdu); - -#endif /* _wlc_ampdu_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h b/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h deleted file mode 100644 index a5dccc273ac..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bmac.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#ifndef _wlc_bmac_h_ -#define _wlc_bmac_h_ - -/* XXXXX this interface is under wlc.c by design - * http://hwnbu-twiki.broadcom.com/bin/view/Mwgroup/WlBmacDesign - * - * high driver files(e.g. wlc_ampdu.c etc) - * wlc.h/wlc.c - * wlc_bmac.h/wlc_bmac.c - * - * So don't include this in files other than wlc.c, wlc_bmac* wl_rte.c(dongle port) and wl_phy.c - * create wrappers in wlc.c if needed - */ - -/* dup state between BMAC(struct wlc_hw_info) and HIGH(struct wlc_info) - driver */ -typedef struct wlc_bmac_state { - u32 machwcap; /* mac hw capibility */ - u32 preamble_ovr; /* preamble override */ -} wlc_bmac_state_t; - -enum { - IOV_BMAC_DIAG, - IOV_BMAC_SBGPIOTIMERVAL, - IOV_BMAC_SBGPIOOUT, - IOV_BMAC_CCGPIOCTRL, /* CC GPIOCTRL REG */ - IOV_BMAC_CCGPIOOUT, /* CC GPIOOUT REG */ - IOV_BMAC_CCGPIOOUTEN, /* CC GPIOOUTEN REG */ - IOV_BMAC_CCGPIOIN, /* CC GPIOIN REG */ - IOV_BMAC_WPSGPIO, /* WPS push button GPIO pin */ - IOV_BMAC_OTPDUMP, - IOV_BMAC_OTPSTAT, - IOV_BMAC_PCIEASPM, /* obfuscation clkreq/aspm control */ - IOV_BMAC_PCIEADVCORRMASK, /* advanced correctable error mask */ - IOV_BMAC_PCIECLKREQ, /* PCIE 1.1 clockreq enab support */ - IOV_BMAC_PCIELCREG, /* PCIE LCREG */ - IOV_BMAC_SBGPIOTIMERMASK, - IOV_BMAC_RFDISABLEDLY, - IOV_BMAC_PCIEREG, /* PCIE REG */ - IOV_BMAC_PCICFGREG, /* PCI Config register */ - IOV_BMAC_PCIESERDESREG, /* PCIE SERDES REG (dev, 0}offset) */ - IOV_BMAC_PCIEGPIOOUT, /* PCIEOUT REG */ - IOV_BMAC_PCIEGPIOOUTEN, /* PCIEOUTEN REG */ - IOV_BMAC_PCIECLKREQENCTRL, /* clkreqenctrl REG (PCIE REV > 6.0 */ - IOV_BMAC_DMALPBK, - IOV_BMAC_CCREG, - IOV_BMAC_COREREG, - IOV_BMAC_SDCIS, - IOV_BMAC_SDIO_DRIVE, - IOV_BMAC_OTPW, - IOV_BMAC_NVOTPW, - IOV_BMAC_SROM, - IOV_BMAC_SRCRC, - IOV_BMAC_CIS_SOURCE, - IOV_BMAC_CISVAR, - IOV_BMAC_OTPLOCK, - IOV_BMAC_OTP_CHIPID, - IOV_BMAC_CUSTOMVAR1, - IOV_BMAC_BOARDFLAGS, - IOV_BMAC_BOARDFLAGS2, - IOV_BMAC_WPSLED, - IOV_BMAC_NVRAM_SOURCE, - IOV_BMAC_OTP_RAW_READ, - IOV_BMAC_LAST -}; - -extern int wlc_bmac_attach(struct wlc_info *wlc, u16 vendor, u16 device, - uint unit, bool piomode, void *regsva, uint bustype, - void *btparam); -extern int wlc_bmac_detach(struct wlc_info *wlc); -extern void wlc_bmac_watchdog(void *arg); - -/* up/down, reset, clk */ -extern void wlc_bmac_copyto_objmem(struct wlc_hw_info *wlc_hw, - uint offset, const void *buf, int len, - u32 sel); -extern void wlc_bmac_copyfrom_objmem(struct wlc_hw_info *wlc_hw, uint offset, - void *buf, int len, u32 sel); -#define wlc_bmac_copyfrom_shm(wlc_hw, offset, buf, len) \ - wlc_bmac_copyfrom_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) -#define wlc_bmac_copyto_shm(wlc_hw, offset, buf, len) \ - wlc_bmac_copyto_objmem(wlc_hw, offset, buf, len, OBJADDR_SHM_SEL) - -extern void wlc_bmac_core_phypll_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_core_phypll_ctl(struct wlc_hw_info *wlc_hw, bool on); -extern void wlc_bmac_phyclk_fgc(struct wlc_hw_info *wlc_hw, bool clk); -extern void wlc_bmac_macphyclk_set(struct wlc_hw_info *wlc_hw, bool clk); -extern void wlc_bmac_phy_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_corereset(struct wlc_hw_info *wlc_hw, u32 flags); -extern void wlc_bmac_reset(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_init(struct wlc_hw_info *wlc_hw, chanspec_t chanspec, - bool mute); -extern int wlc_bmac_up_prep(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_up_finish(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_down_prep(struct wlc_hw_info *wlc_hw); -extern int wlc_bmac_down_finish(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_switch_macfreq(struct wlc_hw_info *wlc_hw, u8 spurmode); - -/* chanspec, ucode interface */ -extern void wlc_bmac_set_chanspec(struct wlc_hw_info *wlc_hw, - chanspec_t chanspec, - bool mute, struct txpwr_limits *txpwr); - -extern int wlc_bmac_xmtfifo_sz_get(struct wlc_hw_info *wlc_hw, uint fifo, - uint *blocks); -extern void wlc_bmac_mhf(struct wlc_hw_info *wlc_hw, u8 idx, u16 mask, - u16 val, int bands); -extern void wlc_bmac_mctrl(struct wlc_hw_info *wlc_hw, u32 mask, u32 val); -extern u16 wlc_bmac_mhf_get(struct wlc_hw_info *wlc_hw, u8 idx, int bands); -extern void wlc_bmac_txant_set(struct wlc_hw_info *wlc_hw, u16 phytxant); -extern u16 wlc_bmac_get_txant(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_antsel_type_set(struct wlc_hw_info *wlc_hw, - u8 antsel_type); -extern int wlc_bmac_state_get(struct wlc_hw_info *wlc_hw, - wlc_bmac_state_t *state); -extern void wlc_bmac_write_shm(struct wlc_hw_info *wlc_hw, uint offset, u16 v); -extern u16 wlc_bmac_read_shm(struct wlc_hw_info *wlc_hw, uint offset); -extern void wlc_bmac_write_template_ram(struct wlc_hw_info *wlc_hw, int offset, - int len, void *buf); -extern void wlc_bmac_copyfrom_vars(struct wlc_hw_info *wlc_hw, char **buf, - uint *len); - -extern void wlc_bmac_hw_etheraddr(struct wlc_hw_info *wlc_hw, - u8 *ea); - -extern bool wlc_bmac_radio_read_hwdisabled(struct wlc_hw_info *wlc_hw); -extern void wlc_bmac_set_shortslot(struct wlc_hw_info *wlc_hw, bool shortslot); -extern void wlc_bmac_band_stf_ss_set(struct wlc_hw_info *wlc_hw, u8 stf_mode); - -extern void wlc_bmac_wait_for_wake(struct wlc_hw_info *wlc_hw); - -extern void wlc_ucode_wake_override_set(struct wlc_hw_info *wlc_hw, - u32 override_bit); -extern void wlc_ucode_wake_override_clear(struct wlc_hw_info *wlc_hw, - u32 override_bit); - -extern void wlc_bmac_set_addrmatch(struct wlc_hw_info *wlc_hw, - int match_reg_offset, - const u8 *addr); -extern void wlc_bmac_write_hw_bcntemplates(struct wlc_hw_info *wlc_hw, - void *bcn, int len, bool both); - -extern void wlc_bmac_read_tsf(struct wlc_hw_info *wlc_hw, u32 *tsf_l_ptr, - u32 *tsf_h_ptr); -extern void wlc_bmac_set_cwmin(struct wlc_hw_info *wlc_hw, u16 newmin); -extern void wlc_bmac_set_cwmax(struct wlc_hw_info *wlc_hw, u16 newmax); - -extern void wlc_bmac_retrylimit_upd(struct wlc_hw_info *wlc_hw, u16 SRL, - u16 LRL); - -extern void wlc_bmac_fifoerrors(struct wlc_hw_info *wlc_hw); - - -/* API for BMAC driver (e.g. wlc_phy.c etc) */ - -extern void wlc_bmac_bw_set(struct wlc_hw_info *wlc_hw, u16 bw); -extern void wlc_bmac_pllreq(struct wlc_hw_info *wlc_hw, bool set, - mbool req_bit); -extern void wlc_bmac_hw_up(struct wlc_hw_info *wlc_hw); -extern u16 wlc_bmac_rate_shm_offset(struct wlc_hw_info *wlc_hw, u8 rate); -extern void wlc_bmac_antsel_set(struct wlc_hw_info *wlc_hw, u32 antsel_avail); - -#endif /* _wlc_bmac_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h b/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h deleted file mode 100644 index 2572541bde9..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_bsscfg.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _WLC_BSSCFG_H_ -#define _WLC_BSSCFG_H_ - -/* Check if a particular BSS config is AP or STA */ -#define BSSCFG_AP(cfg) (0) -#define BSSCFG_STA(cfg) (1) - -#define BSSCFG_IBSS(cfg) (!(cfg)->BSS) - -#define NTXRATE 64 /* # tx MPDUs rate is reported for */ -#define MAXMACLIST 64 /* max # source MAC matches */ -#define BCN_TEMPLATE_COUNT 2 - -/* Iterator for "associated" STA bss configs: - (struct wlc_info *wlc, int idx, struct wlc_bsscfg *cfg) */ -#define FOREACH_AS_STA(wlc, idx, cfg) \ - for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ - if ((cfg = (wlc)->bsscfg[idx]) && BSSCFG_STA(cfg) && cfg->associated) - -/* As above for all non-NULL BSS configs */ -#define FOREACH_BSS(wlc, idx, cfg) \ - for (idx = 0; (int) idx < WLC_MAXBSSCFG; idx++) \ - if ((cfg = (wlc)->bsscfg[idx])) - -/* BSS configuration state */ -struct wlc_bsscfg { - struct wlc_info *wlc; /* wlc to which this bsscfg belongs to. */ - bool up; /* is this configuration up operational */ - bool enable; /* is this configuration enabled */ - bool associated; /* is BSS in ASSOCIATED state */ - bool BSS; /* infraustructure or adhac */ - bool dtim_programmed; - - u8 SSID_len; /* the length of SSID */ - u8 SSID[IEEE80211_MAX_SSID_LEN]; /* SSID string */ - struct scb *bcmc_scb[MAXBANDS]; /* one bcmc_scb per band */ - s8 _idx; /* the index of this bsscfg, - * assigned at wlc_bsscfg_alloc() - */ - /* MAC filter */ - uint nmac; /* # of entries on maclist array */ - int macmode; /* allow/deny stations on maclist array */ - struct ether_addr *maclist; /* list of source MAC addrs to match */ - - /* security */ - u32 wsec; /* wireless security bitvec */ - s16 auth; /* 802.11 authentication: Open, Shared Key, WPA */ - s16 openshared; /* try Open auth first, then Shared Key */ - bool wsec_restrict; /* drop unencrypted packets if wsec is enabled */ - bool eap_restrict; /* restrict data until 802.1X auth succeeds */ - u16 WPA_auth; /* WPA: authenticated key management */ - bool wpa2_preauth; /* default is true, wpa_cap sets value */ - bool wsec_portopen; /* indicates keys are plumbed */ - wsec_iv_t wpa_none_txiv; /* global txiv for WPA_NONE, tkip and aes */ - int wsec_index; /* 0-3: default tx key, -1: not set */ - wsec_key_t *bss_def_keys[WLC_DEFAULT_KEYS]; /* default key storage */ - - /* TKIP countermeasures */ - bool tkip_countermeasures; /* flags TKIP no-assoc period */ - u32 tk_cm_dt; /* detect timer */ - u32 tk_cm_bt; /* blocking timer */ - u32 tk_cm_bt_tmstmp; /* Timestamp when TKIP BT is activated */ - bool tk_cm_activate; /* activate countermeasures after EAPOL-Key sent */ - - u8 BSSID[ETH_ALEN]; /* BSSID (associated) */ - u8 cur_etheraddr[ETH_ALEN]; /* h/w address */ - u16 bcmc_fid; /* the last BCMC FID queued to TX_BCMC_FIFO */ - u16 bcmc_fid_shm; /* the last BCMC FID written to shared mem */ - - u32 flags; /* WLC_BSSCFG flags; see below */ - - u8 *bcn; /* AP beacon */ - uint bcn_len; /* AP beacon length */ - bool ar_disassoc; /* disassociated in associated recreation */ - - int auth_atmptd; /* auth type (open/shared) attempted */ - - pmkid_cand_t pmkid_cand[MAXPMKID]; /* PMKID candidate list */ - uint npmkid_cand; /* num PMKID candidates */ - pmkid_t pmkid[MAXPMKID]; /* PMKID cache */ - uint npmkid; /* num cached PMKIDs */ - - wlc_bss_info_t *current_bss; /* BSS parms in ASSOCIATED state */ - - /* PM states */ - bool PMawakebcn; /* bcn recvd during current waking state */ - bool PMpending; /* waiting for tx status with PM indicated set */ - bool priorPMstate; /* Detecting PM state transitions */ - bool PSpoll; /* whether there is an outstanding PS-Poll frame */ - - /* BSSID entry in RCMTA, use the wsec key management infrastructure to - * manage the RCMTA entries. - */ - wsec_key_t *rcmta; - - /* 'unique' ID of this bsscfg, assigned at bsscfg allocation */ - u16 ID; - - uint txrspecidx; /* index into tx rate circular buffer */ - ratespec_t txrspec[NTXRATE][2]; /* circular buffer of prev MPDUs tx rates */ -}; - -#define WLC_BSSCFG_11N_DISABLE 0x1000 /* Do not advertise .11n IEs for this BSS */ -#define WLC_BSSCFG_HW_BCN 0x20 /* The BSS is generating beacons in HW */ - -#define HWBCN_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_BCN) != 0) -#define HWPRB_ENAB(cfg) (((cfg)->flags & WLC_BSSCFG_HW_PRB) != 0) - -/* Extend N_ENAB to per-BSS */ -#define BSS_N_ENAB(wlc, cfg) \ - (N_ENAB((wlc)->pub) && !((cfg)->flags & WLC_BSSCFG_11N_DISABLE)) - -#define MBSS_BCN_ENAB(cfg) 0 -#define MBSS_PRB_ENAB(cfg) 0 -#define SOFTBCN_ENAB(pub) (0) -#define SOFTPRB_ENAB(pub) (0) -#define wlc_bsscfg_tx_check(a) do { } while (0); - -#endif /* _WLC_BSSCFG_H_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h b/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h deleted file mode 100644 index 85fbd063531..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_cfg.h +++ /dev/null @@ -1,280 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wlc_cfg_h_ -#define _wlc_cfg_h_ - -#define NBANDS(wlc) ((wlc)->pub->_nbands) -#define NBANDS_PUB(pub) ((pub)->_nbands) -#define NBANDS_HW(hw) ((hw)->_nbands) - -#define IS_SINGLEBAND_5G(device) 0 - -/* **** Core type/rev defaults **** */ -#define D11_DEFAULT 0x0fffffb0 /* Supported D11 revs: 4, 5, 7-27 - * also need to update wlc.h MAXCOREREV - */ - -#define NPHY_DEFAULT 0x000001ff /* Supported nphy revs: - * 0 4321a0 - * 1 4321a1 - * 2 4321b0/b1/c0/c1 - * 3 4322a0 - * 4 4322a1 - * 5 4716a0 - * 6 43222a0, 43224a0 - * 7 43226a0 - * 8 5357a0, 43236a0 - */ - -#define LCNPHY_DEFAULT 0x00000007 /* Supported lcnphy revs: - * 0 4313a0, 4336a0, 4330a0 - * 1 - * 2 4330a0 - */ - -#define SSLPNPHY_DEFAULT 0x0000000f /* Supported sslpnphy revs: - * 0 4329a0/k0 - * 1 4329b0/4329C0 - * 2 4319a0 - * 3 5356a0 - */ - - -/* For undefined values, use defaults */ -#ifndef D11CONF -#define D11CONF D11_DEFAULT -#endif -#ifndef NCONF -#define NCONF NPHY_DEFAULT -#endif -#ifndef LCNCONF -#define LCNCONF LCNPHY_DEFAULT -#endif - -#ifndef SSLPNCONF -#define SSLPNCONF SSLPNPHY_DEFAULT -#endif - -/******************************************************************** - * Phy/Core Configuration. Defines macros to to check core phy/rev * - * compile-time configuration. Defines default core support. * - * ****************************************************************** - */ - -/* Basic macros to check a configuration bitmask */ - -#define CONF_HAS(config, val) ((config) & (1 << (val))) -#define CONF_MSK(config, mask) ((config) & (mask)) -#define MSK_RANGE(low, hi) ((1 << ((hi)+1)) - (1 << (low))) -#define CONF_RANGE(config, low, hi) (CONF_MSK(config, MSK_RANGE(low, high))) - -#define CONF_IS(config, val) ((config) == (1 << (val))) -#define CONF_GE(config, val) ((config) & (0-(1 << (val)))) -#define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) -#define CONF_LT(config, val) ((config) & ((1 << (val))-1)) -#define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) - -/* Wrappers for some of the above, specific to config constants */ - -#define NCONF_HAS(val) CONF_HAS(NCONF, val) -#define NCONF_MSK(mask) CONF_MSK(NCONF, mask) -#define NCONF_IS(val) CONF_IS(NCONF, val) -#define NCONF_GE(val) CONF_GE(NCONF, val) -#define NCONF_GT(val) CONF_GT(NCONF, val) -#define NCONF_LT(val) CONF_LT(NCONF, val) -#define NCONF_LE(val) CONF_LE(NCONF, val) - -#define LCNCONF_HAS(val) CONF_HAS(LCNCONF, val) -#define LCNCONF_MSK(mask) CONF_MSK(LCNCONF, mask) -#define LCNCONF_IS(val) CONF_IS(LCNCONF, val) -#define LCNCONF_GE(val) CONF_GE(LCNCONF, val) -#define LCNCONF_GT(val) CONF_GT(LCNCONF, val) -#define LCNCONF_LT(val) CONF_LT(LCNCONF, val) -#define LCNCONF_LE(val) CONF_LE(LCNCONF, val) - -#define D11CONF_HAS(val) CONF_HAS(D11CONF, val) -#define D11CONF_MSK(mask) CONF_MSK(D11CONF, mask) -#define D11CONF_IS(val) CONF_IS(D11CONF, val) -#define D11CONF_GE(val) CONF_GE(D11CONF, val) -#define D11CONF_GT(val) CONF_GT(D11CONF, val) -#define D11CONF_LT(val) CONF_LT(D11CONF, val) -#define D11CONF_LE(val) CONF_LE(D11CONF, val) - -#define PHYCONF_HAS(val) CONF_HAS(PHYTYPE, val) -#define PHYCONF_IS(val) CONF_IS(PHYTYPE, val) - -#define NREV_IS(var, val) (NCONF_HAS(val) && (NCONF_IS(val) || ((var) == (val)))) -#define NREV_GE(var, val) (NCONF_GE(val) && (!NCONF_LT(val) || ((var) >= (val)))) -#define NREV_GT(var, val) (NCONF_GT(val) && (!NCONF_LE(val) || ((var) > (val)))) -#define NREV_LT(var, val) (NCONF_LT(val) && (!NCONF_GE(val) || ((var) < (val)))) -#define NREV_LE(var, val) (NCONF_LE(val) && (!NCONF_GT(val) || ((var) <= (val)))) - -#define LCNREV_IS(var, val) (LCNCONF_HAS(val) && (LCNCONF_IS(val) || ((var) == (val)))) -#define LCNREV_GE(var, val) (LCNCONF_GE(val) && (!LCNCONF_LT(val) || ((var) >= (val)))) -#define LCNREV_GT(var, val) (LCNCONF_GT(val) && (!LCNCONF_LE(val) || ((var) > (val)))) -#define LCNREV_LT(var, val) (LCNCONF_LT(val) && (!LCNCONF_GE(val) || ((var) < (val)))) -#define LCNREV_LE(var, val) (LCNCONF_LE(val) && (!LCNCONF_GT(val) || ((var) <= (val)))) - -#define D11REV_IS(var, val) (D11CONF_HAS(val) && (D11CONF_IS(val) || ((var) == (val)))) -#define D11REV_GE(var, val) (D11CONF_GE(val) && (!D11CONF_LT(val) || ((var) >= (val)))) -#define D11REV_GT(var, val) (D11CONF_GT(val) && (!D11CONF_LE(val) || ((var) > (val)))) -#define D11REV_LT(var, val) (D11CONF_LT(val) && (!D11CONF_GE(val) || ((var) < (val)))) -#define D11REV_LE(var, val) (D11CONF_LE(val) && (!D11CONF_GT(val) || ((var) <= (val)))) - -#define PHYTYPE_IS(var, val) (PHYCONF_HAS(val) && (PHYCONF_IS(val) || ((var) == (val)))) - -/* Finally, early-exit from switch case if anyone wants it... */ - -#define CASECHECK(config, val) if (!(CONF_HAS(config, val))) break -#define CASEMSK(config, mask) if (!(CONF_MSK(config, mask))) break - -#if (D11CONF ^ (D11CONF & D11_DEFAULT)) -#error "Unsupported MAC revision configured" -#endif -#if (NCONF ^ (NCONF & NPHY_DEFAULT)) -#error "Unsupported NPHY revision configured" -#endif -#if (LCNCONF ^ (LCNCONF & LCNPHY_DEFAULT)) -#error "Unsupported LPPHY revision configured" -#endif - -/* *** Consistency checks *** */ -#if !D11CONF -#error "No MAC revisions configured!" -#endif - -#if !NCONF && !LCNCONF && !SSLPNCONF -#error "No PHY configured!" -#endif - -/* Set up PHYTYPE automatically: (depends on PHY_TYPE_X, from d11.h) */ - -#define _PHYCONF_N (1 << PHY_TYPE_N) - -#if LCNCONF -#define _PHYCONF_LCN (1 << PHY_TYPE_LCN) -#else -#define _PHYCONF_LCN 0 -#endif /* LCNCONF */ - -#if SSLPNCONF -#define _PHYCONF_SSLPN (1 << PHY_TYPE_SSN) -#else -#define _PHYCONF_SSLPN 0 -#endif /* SSLPNCONF */ - -#define PHYTYPE (_PHYCONF_N | _PHYCONF_LCN | _PHYCONF_SSLPN) - -/* Utility macro to identify 802.11n (HT) capable PHYs */ -#define PHYTYPE_11N_CAP(phytype) \ - (PHYTYPE_IS(phytype, PHY_TYPE_N) || \ - PHYTYPE_IS(phytype, PHY_TYPE_LCN) || \ - PHYTYPE_IS(phytype, PHY_TYPE_SSN)) - -/* Last but not least: shorter wlc-specific var checks */ -#define WLCISNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_N) -#define WLCISLCNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_LCN) -#define WLCISSSLPNPHY(band) PHYTYPE_IS((band)->phytype, PHY_TYPE_SSN) - -#define WLC_PHY_11N_CAP(band) PHYTYPE_11N_CAP((band)->phytype) - -/********************************************************************** - * ------------- End of Core phy/rev configuration. ----------------- * - * ******************************************************************** - */ - -/************************************************* - * Defaults for tunables (e.g. sizing constants) - * - * For each new tunable, add a member to the end - * of wlc_tunables_t in wlc_pub.h to enable - * runtime checks of tunable values. (Directly - * using the macros in code invalidates ROM code) - * - * *********************************************** - */ -#ifndef NTXD -#define NTXD 256 /* Max # of entries in Tx FIFO based on 4kb page size */ -#endif /* NTXD */ -#ifndef NRXD -#define NRXD 256 /* Max # of entries in Rx FIFO based on 4kb page size */ -#endif /* NRXD */ - -#ifndef NRXBUFPOST -#define NRXBUFPOST 32 /* try to keep this # rbufs posted to the chip */ -#endif /* NRXBUFPOST */ - -#ifndef MAXSCB /* station control blocks in cache */ -#define MAXSCB 32 /* Maximum SCBs in cache for STA */ -#endif /* MAXSCB */ - -#ifndef AMPDU_NUM_MPDU -#define AMPDU_NUM_MPDU 16 /* max allowed number of mpdus in an ampdu (2 streams) */ -#endif /* AMPDU_NUM_MPDU */ - -#ifndef AMPDU_NUM_MPDU_3STREAMS -#define AMPDU_NUM_MPDU_3STREAMS 32 /* max allowed number of mpdus in an ampdu for 3+ streams */ -#endif /* AMPDU_NUM_MPDU_3STREAMS */ - -/* Count of packet callback structures. either of following - * 1. Set to the number of SCBs since a STA - * can queue up a rate callback for each IBSS STA it knows about, and an AP can - * queue up an "are you there?" Null Data callback for each associated STA - * 2. controlled by tunable config file - */ -#ifndef MAXPKTCB -#define MAXPKTCB MAXSCB /* Max number of packet callbacks */ -#endif /* MAXPKTCB */ - -#ifndef CTFPOOLSZ -#define CTFPOOLSZ 128 -#endif /* CTFPOOLSZ */ - -/* NetBSD also needs to keep track of this */ -#define WLC_MAX_UCODE_BSS (16) /* Number of BSS handled in ucode bcn/prb */ -#define WLC_MAX_UCODE_BSS4 (4) /* Number of BSS handled in sw bcn/prb */ -#ifndef WLC_MAXBSSCFG -#define WLC_MAXBSSCFG (1) /* max # BSS configs */ -#endif /* WLC_MAXBSSCFG */ - -#ifndef MAXBSS -#define MAXBSS 64 /* max # available networks */ -#endif /* MAXBSS */ - -#ifndef WLC_DATAHIWAT -#define WLC_DATAHIWAT 50 /* data msg txq hiwat mark */ -#endif /* WLC_DATAHIWAT */ - -#ifndef WLC_AMPDUDATAHIWAT -#define WLC_AMPDUDATAHIWAT 255 -#endif /* WLC_AMPDUDATAHIWAT */ - -/* bounded rx loops */ -#ifndef RXBND -#define RXBND 8 /* max # frames to process in wlc_recv() */ -#endif /* RXBND */ -#ifndef TXSBND -#define TXSBND 8 /* max # tx status to process in wlc_txstatus() */ -#endif /* TXSBND */ - -#define BAND_5G(bt) ((bt) == WLC_BAND_5G) -#define BAND_2G(bt) ((bt) == WLC_BAND_2G) - -#define WLBANDINITDATA(_data) _data -#define WLBANDINITFN(_fn) _fn - -#endif /* _wlc_cfg_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_key.h b/drivers/staging/brcm80211/brcmsmac/wlc_key.h deleted file mode 100644 index cab10c73793..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_key.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wlc_key_h_ -#define _wlc_key_h_ - -struct scb; -struct wlc_info; -struct wlc_bsscfg; -/* Maximum # of keys that wl driver supports in S/W. - * Keys supported in H/W is less than or equal to WSEC_MAX_KEYS. - */ -#define WSEC_MAX_KEYS 54 /* Max # of keys (50 + 4 default keys) */ -#define WLC_DEFAULT_KEYS 4 /* Default # of keys */ - -#define WSEC_MAX_WOWL_KEYS 5 /* Max keys in WOWL mode (1 + 4 default keys) */ - -#define WPA2_GTK_MAX 3 - -/* -* Max # of keys currently supported: -* -* s/w keys if WSEC_SW(wlc->wsec). -* h/w keys otherwise. -*/ -#define WLC_MAX_WSEC_KEYS(wlc) WSEC_MAX_KEYS - -/* number of 802.11 default (non-paired, group keys) */ -#define WSEC_MAX_DEFAULT_KEYS 4 /* # of default keys */ - -/* Max # of hardware keys supported */ -#define WLC_MAX_WSEC_HW_KEYS(wlc) WSEC_MAX_RCMTA_KEYS - -/* Max # of hardware TKIP MIC keys supported */ -#define WLC_MAX_TKMIC_HW_KEYS(wlc) (WSEC_MAX_TKMIC_ENGINE_KEYS) - -#define WSEC_HW_TKMIC_KEY(wlc, key, bsscfg) \ - ((((wlc)->machwcap & MCAP_TKIPMIC)) && \ - (key) && ((key)->algo == CRYPTO_ALGO_TKIP) && \ - !WSEC_SOFTKEY(wlc, key, bsscfg) && \ - WSEC_KEY_INDEX(wlc, key) >= WLC_DEFAULT_KEYS && \ - (WSEC_KEY_INDEX(wlc, key) < WSEC_MAX_TKMIC_ENGINE_KEYS)) - -/* index of key in key table */ -#define WSEC_KEY_INDEX(wlc, key) ((key)->idx) - -#define WSEC_SOFTKEY(wlc, key, bsscfg) (WLC_SW_KEYS(wlc, bsscfg) || \ - WSEC_KEY_INDEX(wlc, key) >= WLC_MAX_WSEC_HW_KEYS(wlc)) - -/* get a key, non-NULL only if key allocated and not clear */ -#define WSEC_KEY(wlc, i) (((wlc)->wsec_keys[i] && (wlc)->wsec_keys[i]->len) ? \ - (wlc)->wsec_keys[i] : NULL) - -#define WSEC_SCB_KEY_VALID(scb) (((scb)->key && (scb)->key->len) ? true : false) - -/* default key */ -#define WSEC_BSS_DEFAULT_KEY(bsscfg) (((bsscfg)->wsec_index == -1) ? \ - (struct wsec_key *)NULL:(bsscfg)->bss_def_keys[(bsscfg)->wsec_index]) - -/* Macros for key management in IBSS mode */ -#define WSEC_IBSS_MAX_PEERS 16 /* Max # of IBSS Peers */ -#define WSEC_IBSS_RCMTA_INDEX(idx) \ - (((idx - WSEC_MAX_DEFAULT_KEYS) % WSEC_IBSS_MAX_PEERS) + WSEC_MAX_DEFAULT_KEYS) - -/* contiguous # key slots for infrastructure mode STA */ -#define WSEC_BSS_STA_KEY_GROUP_SIZE 5 - -typedef struct wsec_iv { - u32 hi; /* upper 32 bits of IV */ - u16 lo; /* lower 16 bits of IV */ -} wsec_iv_t; - -#define WLC_NUMRXIVS 16 /* # rx IVs (one per 802.11e TID) */ - -typedef struct wsec_key { - u8 ea[ETH_ALEN]; /* per station */ - u8 idx; /* key index in wsec_keys array */ - u8 id; /* key ID [0-3] */ - u8 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ - u8 rcmta; /* rcmta entry index, same as idx by default */ - u16 flags; /* misc flags */ - u8 algo_hw; /* cache for hw register */ - u8 aes_mode; /* cache for hw register */ - s8 iv_len; /* IV length */ - s8 icv_len; /* ICV length */ - u32 len; /* key length..don't move this var */ - /* data is 4byte aligned */ - u8 data[WLAN_MAX_KEY_LEN]; /* key data */ - wsec_iv_t rxiv[WLC_NUMRXIVS]; /* Rx IV (one per TID) */ - wsec_iv_t txiv; /* Tx IV */ - -} wsec_key_t; - -#define broken_roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) - -/* For use with wsec_key_t.flags */ - -#define WSEC_BS_UPDATE (1 << 0) /* Indicates hw needs key update on BS switch */ -#define WSEC_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ -#define WSEC_TKIP_ERROR (1 << 2) /* Provoke deliberate MIC error */ -#define WSEC_REPLAY_ERROR (1 << 3) /* Provoke deliberate replay */ -#define WSEC_IBSS_PEER_GROUP_KEY (1 << 7) /* Flag: group key for a IBSS PEER */ -#define WSEC_ICV_ERROR (1 << 8) /* Provoke deliberate ICV error */ - -#define wlc_key_insert(a, b, c, d, e, f, g, h, i, j) (-EBADE) -#define wlc_key_update(a, b, c) do {} while (0) -#define wlc_key_remove(a, b, c) do {} while (0) -#define wlc_key_remove_all(a, b) do {} while (0) -#define wlc_key_delete(a, b, c) do {} while (0) -#define wlc_scb_key_delete(a, b) do {} while (0) -#define wlc_key_lookup(a, b, c, d, e) (NULL) -#define wlc_key_hw_init_all(a) do {} while (0) -#define wlc_key_hw_init(a, b, c) do {} while (0) -#define wlc_key_hw_wowl_init(a, b, c, d) do {} while (0) -#define wlc_key_sw_wowl_update(a, b, c, d, e) do {} while (0) -#define wlc_key_sw_wowl_create(a, b, c) (-EBADE) -#define wlc_key_iv_update(a, b, c, d, e) do {(void)e; } while (0) -#define wlc_key_iv_init(a, b, c) do {} while (0) -#define wlc_key_set_error(a, b, c) (-EBADE) -#define wlc_key_dump_hw(a, b) (-EBADE) -#define wlc_key_dump_sw(a, b) (-EBADE) -#define wlc_key_defkeyflag(a) (0) -#define wlc_rcmta_add_bssid(a, b) do {} while (0) -#define wlc_rcmta_del_bssid(a, b) do {} while (0) -#define wlc_key_scb_delete(a, b) do {} while (0) - -#endif /* _wlc_key_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c deleted file mode 100644 index 16fea021f4a..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.c +++ /dev/null @@ -1,243 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -/* - * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer. - * WL driver can optinally call this translation layer to do some preprocessing, then reach PHY. - * On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the - * access to wlc_hw pointer. - */ - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/pci.h> - -#include <proto/802.11.h> -#include <bcmdefs.h> -#include <bcmutils.h> -#include <bcmwifi.h> -#include <aiutils.h> -#include <wlioctl.h> -#include <sbconfig.h> -#include <sbchipc.h> -#include <pcicfg.h> -#include <sbhnddma.h> -#include <hnddma.h> -#include <wlc_pmu.h> - -#include "wlc_types.h" -#include "wl_dbg.h" -#include "wlc_cfg.h" -#include "d11.h" -#include "wlc_rate.h" -#include "wlc_scb.h" -#include "wlc_pub.h" -#include "phy/wlc_phy_hal.h" -#include "wlc_channel.h" -#include "bcmsrom.h" -#include "wlc_key.h" -#include "wlc_bmac.h" -#include "wlc_phy_hal.h" -#include "wl_export.h" -#include "wlc_main.h" -#include "wlc_phy_shim.h" - -/* PHY SHIM module specific state */ -struct wlc_phy_shim_info { - struct wlc_hw_info *wlc_hw; /* pointer to main wlc_hw structure */ - void *wlc; /* pointer to main wlc structure */ - void *wl; /* pointer to os-specific private state */ -}; - -wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw, - void *wl, void *wlc) { - wlc_phy_shim_info_t *physhim = NULL; - - physhim = kzalloc(sizeof(wlc_phy_shim_info_t), GFP_ATOMIC); - if (!physhim) { - wiphy_err(wlc_hw->wlc->wiphy, - "wl%d: wlc_phy_shim_attach: out of mem\n", - wlc_hw->unit); - return NULL; - } - physhim->wlc_hw = wlc_hw; - physhim->wlc = wlc; - physhim->wl = wl; - - return physhim; -} - -void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim) -{ - kfree(physhim); -} - -struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim, - void (*fn) (void *arg), void *arg, - const char *name) -{ - return (struct wlapi_timer *)wl_init_timer(physhim->wl, fn, arg, name); -} - -void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t) -{ - wl_free_timer(physhim->wl, (struct wl_timer *)t); -} - -void -wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms, - int periodic) -{ - wl_add_timer(physhim->wl, (struct wl_timer *)t, ms, periodic); -} - -bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t) -{ - return wl_del_timer(physhim->wl, (struct wl_timer *)t); -} - -void wlapi_intrson(wlc_phy_shim_info_t *physhim) -{ - wl_intrson(physhim->wl); -} - -u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim) -{ - return wl_intrsoff(physhim->wl); -} - -void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask) -{ - wl_intrsrestore(physhim->wl, macintmask); -} - -void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v) -{ - wlc_bmac_write_shm(physhim->wlc_hw, offset, v); -} - -u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset) -{ - return wlc_bmac_read_shm(physhim->wlc_hw, offset); -} - -void -wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, u16 mask, - u16 val, int bands) -{ - wlc_bmac_mhf(physhim->wlc_hw, idx, mask, val, bands); -} - -void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags) -{ - wlc_bmac_corereset(physhim->wlc_hw, flags); -} - -void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim) -{ - wlc_suspend_mac_and_wait(physhim->wlc); -} - -void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode) -{ - wlc_bmac_switch_macfreq(physhim->wlc_hw, spurmode); -} - -void wlapi_enable_mac(wlc_phy_shim_info_t *physhim) -{ - wlc_enable_mac(physhim->wlc); -} - -void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, u32 val) -{ - wlc_bmac_mctrl(physhim->wlc_hw, mask, val); -} - -void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim) -{ - wlc_bmac_phy_reset(physhim->wlc_hw); -} - -void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw) -{ - wlc_bmac_bw_set(physhim->wlc_hw, bw); -} - -u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim) -{ - return wlc_bmac_get_txant(physhim->wlc_hw); -} - -void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk) -{ - wlc_bmac_phyclk_fgc(physhim->wlc_hw, clk); -} - -void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk) -{ - wlc_bmac_macphyclk_set(physhim->wlc_hw, clk); -} - -void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on) -{ - wlc_bmac_core_phypll_ctl(physhim->wlc_hw, on); -} - -void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim) -{ - wlc_bmac_core_phypll_reset(physhim->wlc_hw); -} - -void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t *physhim) -{ - wlc_ucode_wake_override_set(physhim->wlc_hw, WLC_WAKE_OVERRIDE_PHYREG); -} - -void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t *physhim) -{ - wlc_ucode_wake_override_clear(physhim->wlc_hw, - WLC_WAKE_OVERRIDE_PHYREG); -} - -void -wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int offset, - int len, void *buf) -{ - wlc_bmac_write_template_ram(physhim->wlc_hw, offset, len, buf); -} - -u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, u8 rate) -{ - return wlc_bmac_rate_shm_offset(physhim->wlc_hw, rate); -} - -void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim) -{ -} - -void -wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint offset, void *buf, - int len, u32 sel) -{ - wlc_bmac_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel); -} - -void -wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint offset, const void *buf, - int l, u32 sel) -{ - wlc_bmac_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h b/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h deleted file mode 100644 index c151a5d8c69..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_phy_shim.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wlc_phy_shim_h_ -#define _wlc_phy_shim_h_ - -#define RADAR_TYPE_NONE 0 /* Radar type None */ -#define RADAR_TYPE_ETSI_1 1 /* ETSI 1 Radar type */ -#define RADAR_TYPE_ETSI_2 2 /* ETSI 2 Radar type */ -#define RADAR_TYPE_ETSI_3 3 /* ETSI 3 Radar type */ -#define RADAR_TYPE_ITU_E 4 /* ITU E Radar type */ -#define RADAR_TYPE_ITU_K 5 /* ITU K Radar type */ -#define RADAR_TYPE_UNCLASSIFIED 6 /* Unclassified Radar type */ -#define RADAR_TYPE_BIN5 7 /* long pulse radar type */ -#define RADAR_TYPE_STG2 8 /* staggered-2 radar */ -#define RADAR_TYPE_STG3 9 /* staggered-3 radar */ -#define RADAR_TYPE_FRA 10 /* French radar */ - -/* French radar pulse widths */ -#define FRA_T1_20MHZ 52770 -#define FRA_T2_20MHZ 61538 -#define FRA_T3_20MHZ 66002 -#define FRA_T1_40MHZ 105541 -#define FRA_T2_40MHZ 123077 -#define FRA_T3_40MHZ 132004 -#define FRA_ERR_20MHZ 60 -#define FRA_ERR_40MHZ 120 - -#define ANTSEL_NA 0 /* No boardlevel selection available */ -#define ANTSEL_2x4 1 /* 2x4 boardlevel selection available */ -#define ANTSEL_2x3 2 /* 2x3 CB2 boardlevel selection available */ - -/* Rx Antenna diversity control values */ -#define ANT_RX_DIV_FORCE_0 0 /* Use antenna 0 */ -#define ANT_RX_DIV_FORCE_1 1 /* Use antenna 1 */ -#define ANT_RX_DIV_START_1 2 /* Choose starting with 1 */ -#define ANT_RX_DIV_START_0 3 /* Choose starting with 0 */ -#define ANT_RX_DIV_ENABLE 3 /* APHY bbConfig Enable RX Diversity */ -#define ANT_RX_DIV_DEF ANT_RX_DIV_START_0 /* default antdiv setting */ - -/* Forward declarations */ -struct wlc_hw_info; -typedef struct wlc_phy_shim_info wlc_phy_shim_info_t; - -extern wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw, - void *wl, void *wlc); -extern void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim); - -/* PHY to WL utility functions */ -struct wlapi_timer; -extern struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim, - void (*fn) (void *arg), void *arg, - const char *name); -extern void wlapi_free_timer(wlc_phy_shim_info_t *physhim, - struct wlapi_timer *t); -extern void wlapi_add_timer(wlc_phy_shim_info_t *physhim, - struct wlapi_timer *t, uint ms, int periodic); -extern bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, - struct wlapi_timer *t); -extern void wlapi_intrson(wlc_phy_shim_info_t *physhim); -extern u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim); -extern void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, - u32 macintmask); - -extern void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, - u16 v); -extern u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset); -extern void wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, - u16 mask, u16 val, int bands); -extern void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags); -extern void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim); -extern void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode); -extern void wlapi_enable_mac(wlc_phy_shim_info_t *physhim); -extern void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, - u32 val); -extern void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim); -extern void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw); -extern void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk); -extern void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk); -extern void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on); -extern void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim); -extern void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t * - physhim); -extern void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t * - physhim); -extern void wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int o, - int len, void *buf); -extern u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, - u8 rate); -extern void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim); -extern void wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint, - void *buf, int, u32 sel); -extern void wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint, - const void *buf, int, u32); - -extern void wlapi_high_update_phy_mode(wlc_phy_shim_info_t *physhim, - u32 phy_mode); -extern u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim); -#endif /* _wlc_phy_shim_h_ */ diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c b/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c deleted file mode 100644 index 82986bd1ccf..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_pmu.c +++ /dev/null @@ -1,1929 +0,0 @@ -/* - * Copyright (c) 2011 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/delay.h> -#include <linux/io.h> - -#include <bcmdevs.h> -#include <sbchipc.h> -#include <bcmutils.h> -#include <bcmnvram.h> -#include "wlc_pmu.h" - -/* - * d11 slow to fast clock transition time in slow clock cycles - */ -#define D11SCC_SLOW2FAST_TRANSITION 2 - -/* - * external LPO crystal frequency - */ -#define EXT_ILP_HZ 32768 - -/* - * Duration for ILP clock frequency measurment in milliseconds - * - * remark: 1000 must be an integer multiple of this duration - */ -#define ILP_CALC_DUR 10 - -/* - * FVCO frequency - */ -#define FVCO_880 880000 /* 880MHz */ -#define FVCO_1760 1760000 /* 1760MHz */ -#define FVCO_1440 1440000 /* 1440MHz */ -#define FVCO_960 960000 /* 960MHz */ - -/* - * PMU crystal table indices for 1440MHz fvco - */ -#define PMU1_XTALTAB0_1440_12000K 0 -#define PMU1_XTALTAB0_1440_13000K 1 -#define PMU1_XTALTAB0_1440_14400K 2 -#define PMU1_XTALTAB0_1440_15360K 3 -#define PMU1_XTALTAB0_1440_16200K 4 -#define PMU1_XTALTAB0_1440_16800K 5 -#define PMU1_XTALTAB0_1440_19200K 6 -#define PMU1_XTALTAB0_1440_19800K 7 -#define PMU1_XTALTAB0_1440_20000K 8 -#define PMU1_XTALTAB0_1440_25000K 9 -#define PMU1_XTALTAB0_1440_26000K 10 -#define PMU1_XTALTAB0_1440_30000K 11 -#define PMU1_XTALTAB0_1440_37400K 12 -#define PMU1_XTALTAB0_1440_38400K 13 -#define PMU1_XTALTAB0_1440_40000K 14 -#define PMU1_XTALTAB0_1440_48000K 15 - -/* - * PMU crystal table indices for 960MHz fvco - */ -#define PMU1_XTALTAB0_960_12000K 0 -#define PMU1_XTALTAB0_960_13000K 1 -#define PMU1_XTALTAB0_960_14400K 2 -#define PMU1_XTALTAB0_960_15360K 3 -#define PMU1_XTALTAB0_960_16200K 4 -#define PMU1_XTALTAB0_960_16800K 5 -#define PMU1_XTALTAB0_960_19200K 6 -#define PMU1_XTALTAB0_960_19800K 7 -#define PMU1_XTALTAB0_960_20000K 8 -#define PMU1_XTALTAB0_960_25000K 9 -#define PMU1_XTALTAB0_960_26000K 10 -#define PMU1_XTALTAB0_960_30000K 11 -#define PMU1_XTALTAB0_960_37400K 12 -#define PMU1_XTALTAB0_960_38400K 13 -#define PMU1_XTALTAB0_960_40000K 14 -#define PMU1_XTALTAB0_960_48000K 15 - -/* - * PMU crystal table indices for 880MHz fvco - */ -#define PMU1_XTALTAB0_880_12000K 0 -#define PMU1_XTALTAB0_880_13000K 1 -#define PMU1_XTALTAB0_880_14400K 2 -#define PMU1_XTALTAB0_880_15360K 3 -#define PMU1_XTALTAB0_880_16200K 4 -#define PMU1_XTALTAB0_880_16800K 5 -#define PMU1_XTALTAB0_880_19200K 6 -#define PMU1_XTALTAB0_880_19800K 7 -#define PMU1_XTALTAB0_880_20000K 8 -#define PMU1_XTALTAB0_880_24000K 9 -#define PMU1_XTALTAB0_880_25000K 10 -#define PMU1_XTALTAB0_880_26000K 11 -#define PMU1_XTALTAB0_880_30000K 12 -#define PMU1_XTALTAB0_880_37400K 13 -#define PMU1_XTALTAB0_880_38400K 14 -#define PMU1_XTALTAB0_880_40000K 15 - -/* - * crystal frequency values - */ -#define XTAL_FREQ_24000MHZ 24000 -#define XTAL_FREQ_30000MHZ 30000 -#define XTAL_FREQ_37400MHZ 37400 -#define XTAL_FREQ_48000MHZ 48000 - -/* - * Resource dependancies mask change action - * - * @RES_DEPEND_SET: Override the dependancies mask - * @RES_DEPEND_ADD: Add to the dependancies mask - * @RES_DEPEND_REMOVE: Remove from the dependancies mask - */ -#define RES_DEPEND_SET 0 -#define RES_DEPEND_ADD 1 -#define RES_DEPEND_REMOVE -1 - -/* d11 slow to fast clock transition time in slow clock cycles */ -#define D11SCC_SLOW2FAST_TRANSITION 2 - -/* Setup resource up/down timers */ -typedef struct { - u8 resnum; - u16 updown; -} pmu_res_updown_t; - -/* Change resource dependancies masks */ -typedef struct { - u32 res_mask; /* resources (chip specific) */ - s8 action; /* action */ - u32 depend_mask; /* changes to the dependancies mask */ - bool(*filter) (si_t *sih); /* action is taken when filter is NULL or return true */ -} pmu_res_depend_t; - -/* setup pll and query clock speed */ -typedef struct { - u16 fref; - u8 xf; - u8 p1div; - u8 p2div; - u8 ndiv_int; - u32 ndiv_frac; -} pmu1_xtaltab0_t; - -/* - * prototypes used in resource tables - */ -static bool si_pmu_res_depfltr_bb(si_t *sih); -static bool si_pmu_res_depfltr_ncb(si_t *sih); -static bool si_pmu_res_depfltr_paldo(si_t *sih); -static bool si_pmu_res_depfltr_npaldo(si_t *sih); - -static const pmu_res_updown_t bcm4328a0_res_updown[] = { - { - RES4328_EXT_SWITCHER_PWM, 0x0101}, { - RES4328_BB_SWITCHER_PWM, 0x1f01}, { - RES4328_BB_SWITCHER_BURST, 0x010f}, { - RES4328_BB_EXT_SWITCHER_BURST, 0x0101}, { - RES4328_ILP_REQUEST, 0x0202}, { - RES4328_RADIO_SWITCHER_PWM, 0x0f01}, { - RES4328_RADIO_SWITCHER_BURST, 0x0f01}, { - RES4328_ROM_SWITCH, 0x0101}, { - RES4328_PA_REF_LDO, 0x0f01}, { - RES4328_RADIO_LDO, 0x0f01}, { - RES4328_AFE_LDO, 0x0f01}, { - RES4328_PLL_LDO, 0x0f01}, { - RES4328_BG_FILTBYP, 0x0101}, { - RES4328_TX_FILTBYP, 0x0101}, { - RES4328_RX_FILTBYP, 0x0101}, { - RES4328_XTAL_PU, 0x0101}, { - RES4328_XTAL_EN, 0xa001}, { - RES4328_BB_PLL_FILTBYP, 0x0101}, { - RES4328_RF_PLL_FILTBYP, 0x0101}, { - RES4328_BB_PLL_PU, 0x0701} -}; - -static const pmu_res_depend_t bcm4328a0_res_depend[] = { - /* Adjust ILP request resource not to force ext/BB switchers into burst mode */ - { - PMURES_BIT(RES4328_ILP_REQUEST), - RES_DEPEND_SET, - PMURES_BIT(RES4328_EXT_SWITCHER_PWM) | - PMURES_BIT(RES4328_BB_SWITCHER_PWM), NULL} -}; - -static const pmu_res_updown_t bcm4325a0_res_updown_qt[] = { - { - RES4325_HT_AVAIL, 0x0300}, { - RES4325_BBPLL_PWRSW_PU, 0x0101}, { - RES4325_RFPLL_PWRSW_PU, 0x0101}, { - RES4325_ALP_AVAIL, 0x0100}, { - RES4325_XTAL_PU, 0x1000}, { - RES4325_LNLDO1_PU, 0x0800}, { - RES4325_CLDO_CBUCK_PWM, 0x0101}, { - RES4325_CBUCK_PWM, 0x0803} -}; - -static const pmu_res_updown_t bcm4325a0_res_updown[] = { - { - RES4325_XTAL_PU, 0x1501} -}; - -static const pmu_res_depend_t bcm4325a0_res_depend[] = { - /* Adjust OTP PU resource dependencies - remove BB BURST */ - { - PMURES_BIT(RES4325_OTP_PU), - RES_DEPEND_REMOVE, - PMURES_BIT(RES4325_BUCK_BOOST_BURST), NULL}, - /* Adjust ALP/HT Avail resource dependencies - bring up BB along if it is used. */ - { - PMURES_BIT(RES4325_ALP_AVAIL) | PMURES_BIT(RES4325_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4325_BUCK_BOOST_BURST) | - PMURES_BIT(RES4325_BUCK_BOOST_PWM), si_pmu_res_depfltr_bb}, - /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ - { - PMURES_BIT(RES4325_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4325_RX_PWRSW_PU) | - PMURES_BIT(RES4325_TX_PWRSW_PU) | - PMURES_BIT(RES4325_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4325_AFE_PWRSW_PU), NULL}, - /* Adjust ALL resource dependencies - remove CBUCK dependancies if it is not used. */ - { - PMURES_BIT(RES4325_ILP_REQUEST) | - PMURES_BIT(RES4325_ABUCK_BURST) | - PMURES_BIT(RES4325_ABUCK_PWM) | - PMURES_BIT(RES4325_LNLDO1_PU) | - PMURES_BIT(RES4325C1_LNLDO2_PU) | - PMURES_BIT(RES4325_XTAL_PU) | - PMURES_BIT(RES4325_ALP_AVAIL) | - PMURES_BIT(RES4325_RX_PWRSW_PU) | - PMURES_BIT(RES4325_TX_PWRSW_PU) | - PMURES_BIT(RES4325_RFPLL_PWRSW_PU) | - PMURES_BIT(RES4325_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4325_AFE_PWRSW_PU) | - PMURES_BIT(RES4325_BBPLL_PWRSW_PU) | - PMURES_BIT(RES4325_HT_AVAIL), RES_DEPEND_REMOVE, - PMURES_BIT(RES4325B0_CBUCK_LPOM) | - PMURES_BIT(RES4325B0_CBUCK_BURST) | - PMURES_BIT(RES4325B0_CBUCK_PWM), si_pmu_res_depfltr_ncb} -}; - -static const pmu_res_updown_t bcm4315a0_res_updown_qt[] = { - { - RES4315_HT_AVAIL, 0x0101}, { - RES4315_XTAL_PU, 0x0100}, { - RES4315_LNLDO1_PU, 0x0100}, { - RES4315_PALDO_PU, 0x0100}, { - RES4315_CLDO_PU, 0x0100}, { - RES4315_CBUCK_PWM, 0x0100}, { - RES4315_CBUCK_BURST, 0x0100}, { - RES4315_CBUCK_LPOM, 0x0100} -}; - -static const pmu_res_updown_t bcm4315a0_res_updown[] = { - { - RES4315_XTAL_PU, 0x2501} -}; - -static const pmu_res_depend_t bcm4315a0_res_depend[] = { - /* Adjust OTP PU resource dependencies - not need PALDO unless write */ - { - PMURES_BIT(RES4315_OTP_PU), - RES_DEPEND_REMOVE, - PMURES_BIT(RES4315_PALDO_PU), si_pmu_res_depfltr_npaldo}, - /* Adjust ALP/HT Avail resource dependencies - bring up PALDO along if it is used. */ - { - PMURES_BIT(RES4315_ALP_AVAIL) | PMURES_BIT(RES4315_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4315_PALDO_PU), si_pmu_res_depfltr_paldo}, - /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ - { - PMURES_BIT(RES4315_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4315_RX_PWRSW_PU) | - PMURES_BIT(RES4315_TX_PWRSW_PU) | - PMURES_BIT(RES4315_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4315_AFE_PWRSW_PU), NULL}, - /* Adjust ALL resource dependencies - remove CBUCK dependancies if it is not used. */ - { - PMURES_BIT(RES4315_CLDO_PU) | PMURES_BIT(RES4315_ILP_REQUEST) | - PMURES_BIT(RES4315_LNLDO1_PU) | - PMURES_BIT(RES4315_OTP_PU) | - PMURES_BIT(RES4315_LNLDO2_PU) | - PMURES_BIT(RES4315_XTAL_PU) | - PMURES_BIT(RES4315_ALP_AVAIL) | - PMURES_BIT(RES4315_RX_PWRSW_PU) | - PMURES_BIT(RES4315_TX_PWRSW_PU) | - PMURES_BIT(RES4315_RFPLL_PWRSW_PU) | - PMURES_BIT(RES4315_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4315_AFE_PWRSW_PU) | - PMURES_BIT(RES4315_BBPLL_PWRSW_PU) | - PMURES_BIT(RES4315_HT_AVAIL), RES_DEPEND_REMOVE, - PMURES_BIT(RES4315_CBUCK_LPOM) | - PMURES_BIT(RES4315_CBUCK_BURST) | - PMURES_BIT(RES4315_CBUCK_PWM), si_pmu_res_depfltr_ncb} -}; - - /* 4329 specific. needs to come back this issue later */ -static const pmu_res_updown_t bcm4329_res_updown[] = { - { - RES4329_XTAL_PU, 0x1501} -}; - -static const pmu_res_depend_t bcm4329_res_depend[] = { - /* Adjust HT Avail resource dependencies */ - { - PMURES_BIT(RES4329_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4329_CBUCK_LPOM) | - PMURES_BIT(RES4329_CBUCK_BURST) | - PMURES_BIT(RES4329_CBUCK_PWM) | - PMURES_BIT(RES4329_CLDO_PU) | - PMURES_BIT(RES4329_PALDO_PU) | - PMURES_BIT(RES4329_LNLDO1_PU) | - PMURES_BIT(RES4329_XTAL_PU) | - PMURES_BIT(RES4329_ALP_AVAIL) | - PMURES_BIT(RES4329_RX_PWRSW_PU) | - PMURES_BIT(RES4329_TX_PWRSW_PU) | - PMURES_BIT(RES4329_RFPLL_PWRSW_PU) | - PMURES_BIT(RES4329_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4329_AFE_PWRSW_PU) | - PMURES_BIT(RES4329_BBPLL_PWRSW_PU), NULL} -}; - -static const pmu_res_updown_t bcm4319a0_res_updown_qt[] = { - { - RES4319_HT_AVAIL, 0x0101}, { - RES4319_XTAL_PU, 0x0100}, { - RES4319_LNLDO1_PU, 0x0100}, { - RES4319_PALDO_PU, 0x0100}, { - RES4319_CLDO_PU, 0x0100}, { - RES4319_CBUCK_PWM, 0x0100}, { - RES4319_CBUCK_BURST, 0x0100}, { - RES4319_CBUCK_LPOM, 0x0100} -}; - -static const pmu_res_updown_t bcm4319a0_res_updown[] = { - { - RES4319_XTAL_PU, 0x3f01} -}; - -static const pmu_res_depend_t bcm4319a0_res_depend[] = { - /* Adjust OTP PU resource dependencies - not need PALDO unless write */ - { - PMURES_BIT(RES4319_OTP_PU), - RES_DEPEND_REMOVE, - PMURES_BIT(RES4319_PALDO_PU), si_pmu_res_depfltr_npaldo}, - /* Adjust HT Avail resource dependencies - bring up PALDO along if it is used. */ - { - PMURES_BIT(RES4319_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4319_PALDO_PU), si_pmu_res_depfltr_paldo}, - /* Adjust HT Avail resource dependencies - bring up RF switches along with HT. */ - { - PMURES_BIT(RES4319_HT_AVAIL), - RES_DEPEND_ADD, - PMURES_BIT(RES4319_RX_PWRSW_PU) | - PMURES_BIT(RES4319_TX_PWRSW_PU) | - PMURES_BIT(RES4319_RFPLL_PWRSW_PU) | - PMURES_BIT(RES4319_LOGEN_PWRSW_PU) | - PMURES_BIT(RES4319_AFE_PWRSW_PU), NULL} -}; - -static const pmu_res_updown_t bcm4336a0_res_updown_qt[] = { - { - RES4336_HT_AVAIL, 0x0101}, { - RES4336_XTAL_PU, 0x0100}, { - RES4336_CLDO_PU, 0x0100}, { - RES4336_CBUCK_PWM, 0x0100}, { - RES4336_CBUCK_BURST, 0x0100}, { - RES4336_CBUCK_LPOM, 0x0100} -}; - -static const pmu_res_updown_t bcm4336a0_res_updown[] = { - { - RES4336_HT_AVAIL, 0x0D01} -}; - -static const pmu_res_depend_t bcm4336a0_res_depend[] = { - /* Just a dummy entry for now */ - { - PMURES_BIT(RES4336_RSVD), RES_DEPEND_ADD, 0, NULL} -}; - -static const pmu_res_updown_t bcm4330a0_res_updown_qt[] = { - { - RES4330_HT_AVAIL, 0x0101}, { - RES4330_XTAL_PU, 0x0100}, { - RES4330_CLDO_PU, 0x0100}, { - RES4330_CBUCK_PWM, 0x0100}, { - RES4330_CBUCK_BURST, 0x0100}, { - RES4330_CBUCK_LPOM, 0x0100} -}; - -static const pmu_res_updown_t bcm4330a0_res_updown[] = { - { - RES4330_HT_AVAIL, 0x0e02} -}; - -static const pmu_res_depend_t bcm4330a0_res_depend[] = { - /* Just a dummy entry for now */ - { - PMURES_BIT(RES4330_HT_AVAIL), RES_DEPEND_ADD, 0, NULL} -}; - -/* the following table is based on 1440Mhz fvco */ -static const pmu1_xtaltab0_t pmu1_xtaltab0_1440[] = { - { - 12000, 1, 1, 1, 0x78, 0x0}, { - 13000, 2, 1, 1, 0x6E, 0xC4EC4E}, { - 14400, 3, 1, 1, 0x64, 0x0}, { - 15360, 4, 1, 1, 0x5D, 0xC00000}, { - 16200, 5, 1, 1, 0x58, 0xE38E38}, { - 16800, 6, 1, 1, 0x55, 0xB6DB6D}, { - 19200, 7, 1, 1, 0x4B, 0}, { - 19800, 8, 1, 1, 0x48, 0xBA2E8B}, { - 20000, 9, 1, 1, 0x48, 0x0}, { - 25000, 10, 1, 1, 0x39, 0x999999}, { - 26000, 11, 1, 1, 0x37, 0x627627}, { - 30000, 12, 1, 1, 0x30, 0x0}, { - 37400, 13, 2, 1, 0x4D, 0x15E76}, { - 38400, 13, 2, 1, 0x4B, 0x0}, { - 40000, 14, 2, 1, 0x48, 0x0}, { - 48000, 15, 2, 1, 0x3c, 0x0}, { - 0, 0, 0, 0, 0, 0} -}; - -static const pmu1_xtaltab0_t pmu1_xtaltab0_960[] = { - { - 12000, 1, 1, 1, 0x50, 0x0}, { - 13000, 2, 1, 1, 0x49, 0xD89D89}, { - 14400, 3, 1, 1, 0x42, 0xAAAAAA}, { - 15360, 4, 1, 1, 0x3E, 0x800000}, { - 16200, 5, 1, 1, 0x39, 0x425ED0}, { - 16800, 6, 1, 1, 0x39, 0x249249}, { - 19200, 7, 1, 1, 0x32, 0x0}, { - 19800, 8, 1, 1, 0x30, 0x7C1F07}, { - 20000, 9, 1, 1, 0x30, 0x0}, { - 25000, 10, 1, 1, 0x26, 0x666666}, { - 26000, 11, 1, 1, 0x24, 0xEC4EC4}, { - 30000, 12, 1, 1, 0x20, 0x0}, { - 37400, 13, 2, 1, 0x33, 0x563EF9}, { - 38400, 14, 2, 1, 0x32, 0x0}, { - 40000, 15, 2, 1, 0x30, 0x0}, { - 48000, 16, 2, 1, 0x28, 0x0}, { - 0, 0, 0, 0, 0, 0} -}; - -static const pmu1_xtaltab0_t pmu1_xtaltab0_880_4329[] = { - { - 12000, 1, 3, 22, 0x9, 0xFFFFEF}, { - 13000, 2, 1, 6, 0xb, 0x483483}, { - 14400, 3, 1, 10, 0xa, 0x1C71C7}, { - 15360, 4, 1, 5, 0xb, 0x755555}, { - 16200, 5, 1, 10, 0x5, 0x6E9E06}, { - 16800, 6, 1, 10, 0x5, 0x3Cf3Cf}, { - 19200, 7, 1, 4, 0xb, 0x755555}, { - 19800, 8, 1, 11, 0x4, 0xA57EB}, { - 20000, 9, 1, 11, 0x4, 0x0}, { - 24000, 10, 3, 11, 0xa, 0x0}, { - 25000, 11, 5, 16, 0xb, 0x0}, { - 26000, 12, 1, 1, 0x21, 0xD89D89}, { - 30000, 13, 3, 8, 0xb, 0x0}, { - 37400, 14, 3, 1, 0x46, 0x969696}, { - 38400, 15, 1, 1, 0x16, 0xEAAAAA}, { - 40000, 16, 1, 2, 0xb, 0}, { - 0, 0, 0, 0, 0, 0} -}; - -/* the following table is based on 880Mhz fvco */ -static const pmu1_xtaltab0_t pmu1_xtaltab0_880[] = { - { - 12000, 1, 3, 22, 0x9, 0xFFFFEF}, { - 13000, 2, 1, 6, 0xb, 0x483483}, { - 14400, 3, 1, 10, 0xa, 0x1C71C7}, { - 15360, 4, 1, 5, 0xb, 0x755555}, { - 16200, 5, 1, 10, 0x5, 0x6E9E06}, { - 16800, 6, 1, 10, 0x5, 0x3Cf3Cf}, { - 19200, 7, 1, 4, 0xb, 0x755555}, { - 19800, 8, 1, 11, 0x4, 0xA57EB}, { - 20000, 9, 1, 11, 0x4, 0x0}, { - 24000, 10, 3, 11, 0xa, 0x0}, { - 25000, 11, 5, 16, 0xb, 0x0}, { - 26000, 12, 1, 2, 0x10, 0xEC4EC4}, { - 30000, 13, 3, 8, 0xb, 0x0}, { - 33600, 14, 1, 2, 0xd, 0x186186}, { - 38400, 15, 1, 2, 0xb, 0x755555}, { - 40000, 16, 1, 2, 0xb, 0}, { - 0, 0, 0, 0, 0, 0} -}; - -/* true if the power topology uses the buck boost to provide 3.3V to VDDIO_RF and WLAN PA */ -static bool si_pmu_res_depfltr_bb(si_t *sih) -{ - return (sih->boardflags & BFL_BUCKBOOST) != 0; -} - -/* true if the power topology doesn't use the cbuck. Key on chiprev also if the chip is BCM4325. */ -static bool si_pmu_res_depfltr_ncb(si_t *sih) -{ - - return (sih->boardflags & BFL_NOCBUCK) != 0; -} - -/* true if the power topology uses the PALDO */ -static bool si_pmu_res_depfltr_paldo(si_t *sih) -{ - return (sih->boardflags & BFL_PALDO) != 0; -} - -/* true if the power topology doesn't use the PALDO */ -static bool si_pmu_res_depfltr_npaldo(si_t *sih) -{ - return (sih->boardflags & BFL_PALDO) == 0; -} - -/* Return dependancies (direct or all/indirect) for the given resources */ -static u32 -si_pmu_res_deps(si_t *sih, chipcregs_t *cc, u32 rsrcs, - bool all) -{ - u32 deps = 0; - u32 i; - - for (i = 0; i <= PMURES_MAX_RESNUM; i++) { - if (!(rsrcs & PMURES_BIT(i))) - continue; - W_REG(&cc->res_table_sel, i); - deps |= R_REG(&cc->res_dep_mask); - } - - return !all ? deps : (deps - ? (deps | - si_pmu_res_deps(sih, cc, deps, - true)) : 0); -} - -/* Determine min/max rsrc masks. Value 0 leaves hardware at default. */ -static void si_pmu_res_masks(si_t *sih, u32 * pmin, u32 * pmax) -{ - u32 min_mask = 0, max_mask = 0; - uint rsrcs; - char *val; - - /* # resources */ - rsrcs = (sih->pmucaps & PCAP_RC_MASK) >> PCAP_RC_SHIFT; - - /* determine min/max rsrc masks */ - switch (sih->chip) { - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: - case BCM6362_CHIP_ID: - /* ??? */ - break; - - case BCM4329_CHIP_ID: - /* 4329 spedific issue. Needs to come back this issue later */ - /* Down to save the power. */ - min_mask = - PMURES_BIT(RES4329_CBUCK_LPOM) | - PMURES_BIT(RES4329_CLDO_PU); - /* Allow (but don't require) PLL to turn on */ - max_mask = 0x3ff63e; - break; - case BCM4319_CHIP_ID: - /* We only need a few resources to be kept on all the time */ - min_mask = PMURES_BIT(RES4319_CBUCK_LPOM) | - PMURES_BIT(RES4319_CLDO_PU); - - /* Allow everything else to be turned on upon requests */ - max_mask = ~(~0 << rsrcs); - break; - case BCM4336_CHIP_ID: - /* Down to save the power. */ - min_mask = - PMURES_BIT(RES4336_CBUCK_LPOM) | PMURES_BIT(RES4336_CLDO_PU) - | PMURES_BIT(RES4336_LDO3P3_PU) | PMURES_BIT(RES4336_OTP_PU) - | PMURES_BIT(RES4336_DIS_INT_RESET_PD); - /* Allow (but don't require) PLL to turn on */ - max_mask = 0x1ffffff; - break; - - case BCM4330_CHIP_ID: - /* Down to save the power. */ - min_mask = - PMURES_BIT(RES4330_CBUCK_LPOM) | PMURES_BIT(RES4330_CLDO_PU) - | PMURES_BIT(RES4330_DIS_INT_RESET_PD) | - PMURES_BIT(RES4330_LDO3P3_PU) | PMURES_BIT(RES4330_OTP_PU); - /* Allow (but don't require) PLL to turn on */ - max_mask = 0xfffffff; - break; - - case BCM4313_CHIP_ID: - min_mask = PMURES_BIT(RES4313_BB_PU_RSRC) | - PMURES_BIT(RES4313_XTAL_PU_RSRC) | - PMURES_BIT(RES4313_ALP_AVAIL_RSRC) | - PMURES_BIT(RES4313_BB_PLL_PWRSW_RSRC); - max_mask = 0xffff; - break; - default: - break; - } - - /* Apply nvram override to min mask */ - val = getvar(NULL, "rmin"); - if (val != NULL) { - min_mask = (u32) simple_strtoul(val, NULL, 0); - } - /* Apply nvram override to max mask */ - val = getvar(NULL, "rmax"); - if (val != NULL) { - max_mask = (u32) simple_strtoul(val, NULL, 0); - } - - *pmin = min_mask; - *pmax = max_mask; -} - -/* Return up time in ILP cycles for the given resource. */ -static uint -si_pmu_res_uptime(si_t *sih, chipcregs_t *cc, u8 rsrc) { - u32 deps; - uint up, i, dup, dmax; - u32 min_mask = 0, max_mask = 0; - - /* uptime of resource 'rsrc' */ - W_REG(&cc->res_table_sel, rsrc); - up = (R_REG(&cc->res_updn_timer) >> 8) & 0xff; - - /* direct dependancies of resource 'rsrc' */ - deps = si_pmu_res_deps(sih, cc, PMURES_BIT(rsrc), false); - for (i = 0; i <= PMURES_MAX_RESNUM; i++) { - if (!(deps & PMURES_BIT(i))) - continue; - deps &= ~si_pmu_res_deps(sih, cc, PMURES_BIT(i), true); - } - si_pmu_res_masks(sih, &min_mask, &max_mask); - deps &= ~min_mask; - - /* max uptime of direct dependancies */ - dmax = 0; - for (i = 0; i <= PMURES_MAX_RESNUM; i++) { - if (!(deps & PMURES_BIT(i))) - continue; - dup = si_pmu_res_uptime(sih, cc, (u8) i); - if (dmax < dup) - dmax = dup; - } - - return up + dmax + PMURES_UP_TRANSITION; -} - -static void -si_pmu_spuravoid_pllupdate(si_t *sih, chipcregs_t *cc, u8 spuravoid) -{ - u32 tmp = 0; - u8 phypll_offset = 0; - u8 bcm5357_bcm43236_p1div[] = { 0x1, 0x5, 0x5 }; - u8 bcm5357_bcm43236_ndiv[] = { 0x30, 0xf6, 0xfc }; - - switch (sih->chip) { - case BCM5357_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - - /* - * BCM5357 needs to touch PLL1_PLLCTL[02], - * so offset PLL0_PLLCTL[02] by 6 - */ - phypll_offset = (sih->chip == BCM5357_CHIP_ID) ? 6 : 0; - - /* RMW only the P1 divider */ - W_REG(&cc->pllcontrol_addr, - PMU1_PLL0_PLLCTL0 + phypll_offset); - tmp = R_REG(&cc->pllcontrol_data); - tmp &= (~(PMU1_PLL0_PC0_P1DIV_MASK)); - tmp |= - (bcm5357_bcm43236_p1div[spuravoid] << - PMU1_PLL0_PC0_P1DIV_SHIFT); - W_REG(&cc->pllcontrol_data, tmp); - - /* RMW only the int feedback divider */ - W_REG(&cc->pllcontrol_addr, - PMU1_PLL0_PLLCTL2 + phypll_offset); - tmp = R_REG(&cc->pllcontrol_data); - tmp &= ~(PMU1_PLL0_PC2_NDIV_INT_MASK); - tmp |= - (bcm5357_bcm43236_ndiv[spuravoid]) << - PMU1_PLL0_PC2_NDIV_INT_SHIFT; - W_REG(&cc->pllcontrol_data, tmp); - - tmp = 1 << 10; - break; - - case BCM4331_CHIP_ID: - if (spuravoid == 2) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11500014); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x0FC00a08); - } else if (spuravoid == 1) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11500014); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x0F600a08); - } else { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100014); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x03000a08); - } - tmp = 1 << 10; - break; - - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM6362_CHIP_ID: - if (spuravoid == 1) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11500010); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x000C0C06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x0F600a08); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x2001E920); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888815); - } else { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100010); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x000c0c06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x03000a08); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x200005c0); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888815); - } - tmp = 1 << 10; - break; - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100008); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x0c000c06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x03000a08); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x200005c0); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888855); - - tmp = 1 << 10; - break; - - case BCM4716_CHIP_ID: - case BCM4748_CHIP_ID: - case BCM47162_CHIP_ID: - if (spuravoid == 1) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11500060); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x080C0C06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x0F600000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x2001E924); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888815); - } else { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100060); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x080c0c06); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x03000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - W_REG(&cc->pllcontrol_data, 0x00000000); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x200005c0); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888815); - } - - tmp = 3 << 9; - break; - - case BCM4319_CHIP_ID: - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x11100070); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x1014140a); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888854); - - if (spuravoid == 1) { - /* spur_avoid ON, so enable 41/82/164Mhz clock mode */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x05201828); - } else { - /* enable 40/80/160Mhz clock mode */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x05001828); - } - break; - case BCM4336_CHIP_ID: - /* Looks like these are only for default xtal freq 26MHz */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - W_REG(&cc->pllcontrol_data, 0x02100020); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - W_REG(&cc->pllcontrol_data, 0x0C0C0C0C); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - W_REG(&cc->pllcontrol_data, 0x01240C0C); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - W_REG(&cc->pllcontrol_data, 0x202C2820); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - W_REG(&cc->pllcontrol_data, 0x88888825); - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - if (spuravoid == 1) - W_REG(&cc->pllcontrol_data, 0x00EC4EC4); - else - W_REG(&cc->pllcontrol_data, 0x00762762); - - tmp = PCTL_PLL_PLLCTL_UPD; - break; - - default: - /* bail out */ - return; - } - - tmp |= R_REG(&cc->pmucontrol); - W_REG(&cc->pmucontrol, tmp); -} - -/* select default xtal frequency for each chip */ -static const pmu1_xtaltab0_t *si_pmu1_xtaldef0(si_t *sih) -{ - switch (sih->chip) { - case BCM4329_CHIP_ID: - /* Default to 38400Khz */ - return &pmu1_xtaltab0_880_4329[PMU1_XTALTAB0_880_38400K]; - case BCM4319_CHIP_ID: - /* Default to 30000Khz */ - return &pmu1_xtaltab0_1440[PMU1_XTALTAB0_1440_30000K]; - case BCM4336_CHIP_ID: - /* Default to 26000Khz */ - return &pmu1_xtaltab0_960[PMU1_XTALTAB0_960_26000K]; - case BCM4330_CHIP_ID: - /* Default to 37400Khz */ - if (CST4330_CHIPMODE_SDIOD(sih->chipst)) - return &pmu1_xtaltab0_960[PMU1_XTALTAB0_960_37400K]; - else - return &pmu1_xtaltab0_1440[PMU1_XTALTAB0_1440_37400K]; - default: - break; - } - return NULL; -} - -/* select xtal table for each chip */ -static const pmu1_xtaltab0_t *si_pmu1_xtaltab0(si_t *sih) -{ - switch (sih->chip) { - case BCM4329_CHIP_ID: - return pmu1_xtaltab0_880_4329; - case BCM4319_CHIP_ID: - return pmu1_xtaltab0_1440; - case BCM4336_CHIP_ID: - return pmu1_xtaltab0_960; - case BCM4330_CHIP_ID: - if (CST4330_CHIPMODE_SDIOD(sih->chipst)) - return pmu1_xtaltab0_960; - else - return pmu1_xtaltab0_1440; - default: - break; - } - return NULL; -} - -/* query alp/xtal clock frequency */ -static u32 -si_pmu1_alpclk0(si_t *sih, chipcregs_t *cc) -{ - const pmu1_xtaltab0_t *xt; - u32 xf; - - /* Find the frequency in the table */ - xf = (R_REG(&cc->pmucontrol) & PCTL_XTALFREQ_MASK) >> - PCTL_XTALFREQ_SHIFT; - for (xt = si_pmu1_xtaltab0(sih); xt != NULL && xt->fref != 0; xt++) - if (xt->xf == xf) - break; - /* Could not find it so assign a default value */ - if (xt == NULL || xt->fref == 0) - xt = si_pmu1_xtaldef0(sih); - return xt->fref * 1000; -} - -/* select default pll fvco for each chip */ -static u32 si_pmu1_pllfvco0(si_t *sih) -{ - switch (sih->chip) { - case BCM4329_CHIP_ID: - return FVCO_880; - case BCM4319_CHIP_ID: - return FVCO_1440; - case BCM4336_CHIP_ID: - return FVCO_960; - case BCM4330_CHIP_ID: - if (CST4330_CHIPMODE_SDIOD(sih->chipst)) - return FVCO_960; - else - return FVCO_1440; - default: - break; - } - return 0; -} - -static void si_pmu_set_4330_plldivs(si_t *sih) -{ - u32 FVCO = si_pmu1_pllfvco0(sih) / 1000; - u32 m1div, m2div, m3div, m4div, m5div, m6div; - u32 pllc1, pllc2; - - m2div = m3div = m4div = m6div = FVCO / 80; - m5div = FVCO / 160; - - if (CST4330_CHIPMODE_SDIOD(sih->chipst)) - m1div = FVCO / 80; - else - m1div = FVCO / 90; - pllc1 = - (m1div << PMU1_PLL0_PC1_M1DIV_SHIFT) | (m2div << - PMU1_PLL0_PC1_M2DIV_SHIFT) | - (m3div << PMU1_PLL0_PC1_M3DIV_SHIFT) | (m4div << - PMU1_PLL0_PC1_M4DIV_SHIFT); - si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL1, ~0, pllc1); - - pllc2 = si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL1, 0, 0); - pllc2 &= ~(PMU1_PLL0_PC2_M5DIV_MASK | PMU1_PLL0_PC2_M6DIV_MASK); - pllc2 |= - ((m5div << PMU1_PLL0_PC2_M5DIV_SHIFT) | - (m6div << PMU1_PLL0_PC2_M6DIV_SHIFT)); - si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL2, ~0, pllc2); -} - -/* Set up PLL registers in the PMU as per the crystal speed. - * XtalFreq field in pmucontrol register being 0 indicates the PLL - * is not programmed and the h/w default is assumed to work, in which - * case the xtal frequency is unknown to the s/w so we need to call - * si_pmu1_xtaldef0() wherever it is needed to return a default value. - */ -static void si_pmu1_pllinit0(si_t *sih, chipcregs_t *cc, u32 xtal) -{ - const pmu1_xtaltab0_t *xt; - u32 tmp; - u32 buf_strength = 0; - u8 ndiv_mode = 1; - - /* Use h/w default PLL config */ - if (xtal == 0) { - return; - } - - /* Find the frequency in the table */ - for (xt = si_pmu1_xtaltab0(sih); xt != NULL && xt->fref != 0; xt++) - if (xt->fref == xtal) - break; - - /* Check current PLL state, bail out if it has been programmed or - * we don't know how to program it. - */ - if (xt == NULL || xt->fref == 0) { - return; - } - /* for 4319 bootloader already programs the PLL but bootloader does not - * program the PLL4 and PLL5. So Skip this check for 4319 - */ - if ((((R_REG(&cc->pmucontrol) & PCTL_XTALFREQ_MASK) >> - PCTL_XTALFREQ_SHIFT) == xt->xf) && - !((sih->chip == BCM4319_CHIP_ID) - || (sih->chip == BCM4330_CHIP_ID))) - return; - - switch (sih->chip) { - case BCM4329_CHIP_ID: - /* Change the BBPLL drive strength to 8 for all channels */ - buf_strength = 0x888888; - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4329_BBPLL_PWRSW_PU) | - PMURES_BIT(RES4329_HT_AVAIL))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4329_BBPLL_PWRSW_PU) | - PMURES_BIT(RES4329_HT_AVAIL))); - SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, - PMU_MAX_TRANSITION_DLY); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - if (xt->fref == 38400) - tmp = 0x200024C0; - else if (xt->fref == 37400) - tmp = 0x20004500; - else if (xt->fref == 26000) - tmp = 0x200024C0; - else - tmp = 0x200005C0; /* Chip Dflt Settings */ - W_REG(&cc->pllcontrol_data, tmp); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - tmp = - R_REG(&cc->pllcontrol_data) & PMU1_PLL0_PC5_CLK_DRV_MASK; - if ((xt->fref == 38400) || (xt->fref == 37400) - || (xt->fref == 26000)) - tmp |= 0x15; - else - tmp |= 0x25; /* Chip Dflt Settings */ - W_REG(&cc->pllcontrol_data, tmp); - break; - - case BCM4319_CHIP_ID: - /* Change the BBPLL drive strength to 2 for all channels */ - buf_strength = 0x222222; - - /* Make sure the PLL is off */ - /* WAR65104: Disable the HT_AVAIL resource first and then - * after a delay (more than downtime for HT_AVAIL) remove the - * BBPLL resource; backplane clock moves to ALP from HT. - */ - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4319_HT_AVAIL))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4319_HT_AVAIL))); - - udelay(100); - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4319_BBPLL_PWRSW_PU))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4319_BBPLL_PWRSW_PU))); - - udelay(100); - SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, - PMU_MAX_TRANSITION_DLY); - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL4); - tmp = 0x200005c0; - W_REG(&cc->pllcontrol_data, tmp); - break; - - case BCM4336_CHIP_ID: - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4336_HT_AVAIL) | - PMURES_BIT(RES4336_MACPHY_CLKAVAIL))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4336_HT_AVAIL) | - PMURES_BIT(RES4336_MACPHY_CLKAVAIL))); - udelay(100); - SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, - PMU_MAX_TRANSITION_DLY); - break; - - case BCM4330_CHIP_ID: - AND_REG(&cc->min_res_mask, - ~(PMURES_BIT(RES4330_HT_AVAIL) | - PMURES_BIT(RES4330_MACPHY_CLKAVAIL))); - AND_REG(&cc->max_res_mask, - ~(PMURES_BIT(RES4330_HT_AVAIL) | - PMURES_BIT(RES4330_MACPHY_CLKAVAIL))); - udelay(100); - SPINWAIT(R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL, - PMU_MAX_TRANSITION_DLY); - break; - - default: - break; - } - - /* Write p1div and p2div to pllcontrol[0] */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL0); - tmp = R_REG(&cc->pllcontrol_data) & - ~(PMU1_PLL0_PC0_P1DIV_MASK | PMU1_PLL0_PC0_P2DIV_MASK); - tmp |= - ((xt-> - p1div << PMU1_PLL0_PC0_P1DIV_SHIFT) & PMU1_PLL0_PC0_P1DIV_MASK) | - ((xt-> - p2div << PMU1_PLL0_PC0_P2DIV_SHIFT) & PMU1_PLL0_PC0_P2DIV_MASK); - W_REG(&cc->pllcontrol_data, tmp); - - if ((sih->chip == BCM4330_CHIP_ID)) - si_pmu_set_4330_plldivs(sih); - - if ((sih->chip == BCM4329_CHIP_ID) - && (sih->chiprev == 0)) { - - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL1); - tmp = R_REG(&cc->pllcontrol_data); - tmp = tmp & (~DOT11MAC_880MHZ_CLK_DIVISOR_MASK); - tmp = tmp | DOT11MAC_880MHZ_CLK_DIVISOR_VAL; - W_REG(&cc->pllcontrol_data, tmp); - } - if ((sih->chip == BCM4319_CHIP_ID) || - (sih->chip == BCM4336_CHIP_ID) || - (sih->chip == BCM4330_CHIP_ID)) - ndiv_mode = PMU1_PLL0_PC2_NDIV_MODE_MFB; - else - ndiv_mode = PMU1_PLL0_PC2_NDIV_MODE_MASH; - - /* Write ndiv_int and ndiv_mode to pllcontrol[2] */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL2); - tmp = R_REG(&cc->pllcontrol_data) & - ~(PMU1_PLL0_PC2_NDIV_INT_MASK | PMU1_PLL0_PC2_NDIV_MODE_MASK); - tmp |= - ((xt-> - ndiv_int << PMU1_PLL0_PC2_NDIV_INT_SHIFT) & - PMU1_PLL0_PC2_NDIV_INT_MASK) | ((ndiv_mode << - PMU1_PLL0_PC2_NDIV_MODE_SHIFT) & - PMU1_PLL0_PC2_NDIV_MODE_MASK); - W_REG(&cc->pllcontrol_data, tmp); - - /* Write ndiv_frac to pllcontrol[3] */ - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL3); - tmp = R_REG(&cc->pllcontrol_data) & ~PMU1_PLL0_PC3_NDIV_FRAC_MASK; - tmp |= ((xt->ndiv_frac << PMU1_PLL0_PC3_NDIV_FRAC_SHIFT) & - PMU1_PLL0_PC3_NDIV_FRAC_MASK); - W_REG(&cc->pllcontrol_data, tmp); - - /* Write clock driving strength to pllcontrol[5] */ - if (buf_strength) { - W_REG(&cc->pllcontrol_addr, PMU1_PLL0_PLLCTL5); - tmp = - R_REG(&cc->pllcontrol_data) & ~PMU1_PLL0_PC5_CLK_DRV_MASK; - tmp |= (buf_strength << PMU1_PLL0_PC5_CLK_DRV_SHIFT); - W_REG(&cc->pllcontrol_data, tmp); - } - - /* to operate the 4319 usb in 24MHz/48MHz; chipcontrol[2][84:83] needs - * to be updated. - */ - if ((sih->chip == BCM4319_CHIP_ID) - && (xt->fref != XTAL_FREQ_30000MHZ)) { - W_REG(&cc->chipcontrol_addr, PMU1_PLL0_CHIPCTL2); - tmp = - R_REG(&cc->chipcontrol_data) & ~CCTL_4319USB_XTAL_SEL_MASK; - if (xt->fref == XTAL_FREQ_24000MHZ) { - tmp |= - (CCTL_4319USB_24MHZ_PLL_SEL << - CCTL_4319USB_XTAL_SEL_SHIFT); - } else if (xt->fref == XTAL_FREQ_48000MHZ) { - tmp |= - (CCTL_4319USB_48MHZ_PLL_SEL << - CCTL_4319USB_XTAL_SEL_SHIFT); - } - W_REG(&cc->chipcontrol_data, tmp); - } - - /* Flush deferred pll control registers writes */ - if (sih->pmurev >= 2) - OR_REG(&cc->pmucontrol, PCTL_PLL_PLLCTL_UPD); - - /* Write XtalFreq. Set the divisor also. */ - tmp = R_REG(&cc->pmucontrol) & - ~(PCTL_ILP_DIV_MASK | PCTL_XTALFREQ_MASK); - tmp |= (((((xt->fref + 127) / 128) - 1) << PCTL_ILP_DIV_SHIFT) & - PCTL_ILP_DIV_MASK) | - ((xt->xf << PCTL_XTALFREQ_SHIFT) & PCTL_XTALFREQ_MASK); - - if ((sih->chip == BCM4329_CHIP_ID) - && sih->chiprev == 0) { - /* clear the htstretch before clearing HTReqEn */ - AND_REG(&cc->clkstretch, ~CSTRETCH_HT); - tmp &= ~PCTL_HT_REQ_EN; - } - - W_REG(&cc->pmucontrol, tmp); -} - -u32 si_pmu_ilp_clock(si_t *sih) -{ - static u32 ilpcycles_per_sec; - - if (ISSIM_ENAB(sih) || !PMUCTL_ENAB(sih)) - return ILP_CLOCK; - - if (ilpcycles_per_sec == 0) { - u32 start, end, delta; - u32 origidx = ai_coreidx(sih); - chipcregs_t *cc = ai_setcoreidx(sih, SI_CC_IDX); - start = R_REG(&cc->pmutimer); - mdelay(ILP_CALC_DUR); - end = R_REG(&cc->pmutimer); - delta = end - start; - ilpcycles_per_sec = delta * (1000 / ILP_CALC_DUR); - ai_setcoreidx(sih, origidx); - } - - return ilpcycles_per_sec; -} - -void si_pmu_set_ldo_voltage(si_t *sih, u8 ldo, u8 voltage) -{ - u8 sr_cntl_shift = 0, rc_shift = 0, shift = 0, mask = 0; - u8 addr = 0; - - switch (sih->chip) { - case BCM4336_CHIP_ID: - switch (ldo) { - case SET_LDO_VOLTAGE_CLDO_PWM: - addr = 4; - rc_shift = 1; - mask = 0xf; - break; - case SET_LDO_VOLTAGE_CLDO_BURST: - addr = 4; - rc_shift = 5; - mask = 0xf; - break; - case SET_LDO_VOLTAGE_LNLDO1: - addr = 4; - rc_shift = 17; - mask = 0xf; - break; - default: - return; - } - break; - case BCM4330_CHIP_ID: - switch (ldo) { - case SET_LDO_VOLTAGE_CBUCK_PWM: - addr = 3; - rc_shift = 0; - mask = 0x1f; - break; - default: - return; - } - break; - default: - return; - } - - shift = sr_cntl_shift + rc_shift; - - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), - ~0, addr); - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_data), - mask << shift, (voltage & mask) << shift); -} - -u16 si_pmu_fast_pwrup_delay(si_t *sih) -{ - uint delay = PMU_MAX_TRANSITION_DLY; - chipcregs_t *cc; - uint origidx; -#ifdef BCMDBG - char chn[8]; - chn[0] = 0; /* to suppress compile error */ -#endif - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: - case BCM6362_CHIP_ID: - case BCM4313_CHIP_ID: - delay = ISSIM_ENAB(sih) ? 70 : 3700; - break; - case BCM4329_CHIP_ID: - if (ISSIM_ENAB(sih)) - delay = 70; - else { - u32 ilp = si_pmu_ilp_clock(sih); - delay = - (si_pmu_res_uptime(sih, cc, RES4329_HT_AVAIL) + - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - - 1) / ilp); - delay = (11 * delay) / 10; - } - break; - case BCM4319_CHIP_ID: - delay = ISSIM_ENAB(sih) ? 70 : 3700; - break; - case BCM4336_CHIP_ID: - if (ISSIM_ENAB(sih)) - delay = 70; - else { - u32 ilp = si_pmu_ilp_clock(sih); - delay = - (si_pmu_res_uptime(sih, cc, RES4336_HT_AVAIL) + - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - - 1) / ilp); - delay = (11 * delay) / 10; - } - break; - case BCM4330_CHIP_ID: - if (ISSIM_ENAB(sih)) - delay = 70; - else { - u32 ilp = si_pmu_ilp_clock(sih); - delay = - (si_pmu_res_uptime(sih, cc, RES4330_HT_AVAIL) + - D11SCC_SLOW2FAST_TRANSITION) * ((1000000 + ilp - - 1) / ilp); - delay = (11 * delay) / 10; - } - break; - default: - break; - } - /* Return to original core */ - ai_setcoreidx(sih, origidx); - - return (u16) delay; -} - -void si_pmu_sprom_enable(si_t *sih, bool enable) -{ - chipcregs_t *cc; - uint origidx; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -/* Read/write a chipcontrol reg */ -u32 si_pmu_chipcontrol(si_t *sih, uint reg, u32 mask, u32 val) -{ - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, chipcontrol_addr), ~0, - reg); - return ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, chipcontrol_data), mask, val); -} - -/* Read/write a regcontrol reg */ -u32 si_pmu_regcontrol(si_t *sih, uint reg, u32 mask, u32 val) -{ - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, regcontrol_addr), ~0, - reg); - return ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, regcontrol_data), mask, val); -} - -/* Read/write a pllcontrol reg */ -u32 si_pmu_pllcontrol(si_t *sih, uint reg, u32 mask, u32 val) -{ - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pllcontrol_addr), ~0, - reg); - return ai_corereg(sih, SI_CC_IDX, - offsetof(chipcregs_t, pllcontrol_data), mask, val); -} - -/* PMU PLL update */ -void si_pmu_pllupd(si_t *sih) -{ - ai_corereg(sih, SI_CC_IDX, offsetof(chipcregs_t, pmucontrol), - PCTL_PLL_PLLCTL_UPD, PCTL_PLL_PLLCTL_UPD); -} - -/* query alp/xtal clock frequency */ -u32 si_pmu_alp_clock(si_t *sih) -{ - chipcregs_t *cc; - uint origidx; - u32 clock = ALP_CLOCK; - - /* bail out with default */ - if (!PMUCTL_ENAB(sih)) - return clock; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: - case BCM6362_CHIP_ID: - case BCM4716_CHIP_ID: - case BCM4748_CHIP_ID: - case BCM47162_CHIP_ID: - case BCM4313_CHIP_ID: - case BCM5357_CHIP_ID: - /* always 20Mhz */ - clock = 20000 * 1000; - break; - case BCM4329_CHIP_ID: - case BCM4319_CHIP_ID: - case BCM4336_CHIP_ID: - case BCM4330_CHIP_ID: - - clock = si_pmu1_alpclk0(sih, cc); - break; - case BCM5356_CHIP_ID: - /* always 25Mhz */ - clock = 25000 * 1000; - break; - default: - break; - } - - /* Return to original core */ - ai_setcoreidx(sih, origidx); - return clock; -} - -void si_pmu_spuravoid(si_t *sih, u8 spuravoid) -{ - chipcregs_t *cc; - uint origidx, intr_val; - u32 tmp = 0; - - /* Remember original core before switch to chipc */ - cc = (chipcregs_t *) ai_switch_core(sih, CC_CORE_ID, &origidx, - &intr_val); - - /* force the HT off */ - if (sih->chip == BCM4336_CHIP_ID) { - tmp = R_REG(&cc->max_res_mask); - tmp &= ~RES4336_HT_AVAIL; - W_REG(&cc->max_res_mask, tmp); - /* wait for the ht to really go away */ - SPINWAIT(((R_REG(&cc->clk_ctl_st) & CCS_HTAVAIL) == 0), - 10000); - } - - /* update the pll changes */ - si_pmu_spuravoid_pllupdate(sih, cc, spuravoid); - - /* enable HT back on */ - if (sih->chip == BCM4336_CHIP_ID) { - tmp = R_REG(&cc->max_res_mask); - tmp |= RES4336_HT_AVAIL; - W_REG(&cc->max_res_mask, tmp); - } - - /* Return to original core */ - ai_restore_core(sih, origidx, intr_val); -} - -/* initialize PMU */ -void si_pmu_init(si_t *sih) -{ - chipcregs_t *cc; - uint origidx; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - if (sih->pmurev == 1) - AND_REG(&cc->pmucontrol, ~PCTL_NOILP_ON_WAIT); - else if (sih->pmurev >= 2) - OR_REG(&cc->pmucontrol, PCTL_NOILP_ON_WAIT); - - if ((sih->chip == BCM4329_CHIP_ID) && (sih->chiprev == 2)) { - /* Fix for 4329b0 bad LPOM state. */ - W_REG(&cc->regcontrol_addr, 2); - OR_REG(&cc->regcontrol_data, 0x100); - - W_REG(&cc->regcontrol_addr, 3); - OR_REG(&cc->regcontrol_data, 0x4); - } - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -/* initialize PMU chip controls and other chip level stuff */ -void si_pmu_chip_init(si_t *sih) -{ - uint origidx; - - /* Gate off SPROM clock and chip select signals */ - si_pmu_sprom_enable(sih, false); - - /* Remember original core */ - origidx = ai_coreidx(sih); - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -/* initialize PMU switch/regulators */ -void si_pmu_swreg_init(si_t *sih) -{ - switch (sih->chip) { - case BCM4336_CHIP_ID: - /* Reduce CLDO PWM output voltage to 1.2V */ - si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CLDO_PWM, 0xe); - /* Reduce CLDO BURST output voltage to 1.2V */ - si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CLDO_BURST, - 0xe); - /* Reduce LNLDO1 output voltage to 1.2V */ - si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_LNLDO1, 0xe); - if (sih->chiprev == 0) - si_pmu_regcontrol(sih, 2, 0x400000, 0x400000); - break; - - case BCM4330_CHIP_ID: - /* CBUCK Voltage is 1.8 by default and set that to 1.5 */ - si_pmu_set_ldo_voltage(sih, SET_LDO_VOLTAGE_CBUCK_PWM, 0); - break; - default: - break; - } -} - -/* initialize PLL */ -void si_pmu_pll_init(si_t *sih, uint xtalfreq) -{ - chipcregs_t *cc; - uint origidx; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM4329_CHIP_ID: - if (xtalfreq == 0) - xtalfreq = 38400; - si_pmu1_pllinit0(sih, cc, xtalfreq); - break; - case BCM4313_CHIP_ID: - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43238_CHIP_ID: - case BCM4331_CHIP_ID: - case BCM6362_CHIP_ID: - /* ??? */ - break; - case BCM4319_CHIP_ID: - case BCM4336_CHIP_ID: - case BCM4330_CHIP_ID: - si_pmu1_pllinit0(sih, cc, xtalfreq); - break; - default: - break; - } - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -/* initialize PMU resources */ -void si_pmu_res_init(si_t *sih) -{ - chipcregs_t *cc; - uint origidx; - const pmu_res_updown_t *pmu_res_updown_table = NULL; - uint pmu_res_updown_table_sz = 0; - const pmu_res_depend_t *pmu_res_depend_table = NULL; - uint pmu_res_depend_table_sz = 0; - u32 min_mask = 0, max_mask = 0; - char name[8], *val; - uint i, rsrcs; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM4329_CHIP_ID: - /* Optimize resources up/down timers */ - if (ISSIM_ENAB(sih)) { - pmu_res_updown_table = NULL; - pmu_res_updown_table_sz = 0; - } else { - pmu_res_updown_table = bcm4329_res_updown; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4329_res_updown); - } - /* Optimize resources dependencies */ - pmu_res_depend_table = bcm4329_res_depend; - pmu_res_depend_table_sz = ARRAY_SIZE(bcm4329_res_depend); - break; - - case BCM4319_CHIP_ID: - /* Optimize resources up/down timers */ - if (ISSIM_ENAB(sih)) { - pmu_res_updown_table = bcm4319a0_res_updown_qt; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4319a0_res_updown_qt); - } else { - pmu_res_updown_table = bcm4319a0_res_updown; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4319a0_res_updown); - } - /* Optimize resources dependancies masks */ - pmu_res_depend_table = bcm4319a0_res_depend; - pmu_res_depend_table_sz = ARRAY_SIZE(bcm4319a0_res_depend); - break; - - case BCM4336_CHIP_ID: - /* Optimize resources up/down timers */ - if (ISSIM_ENAB(sih)) { - pmu_res_updown_table = bcm4336a0_res_updown_qt; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4336a0_res_updown_qt); - } else { - pmu_res_updown_table = bcm4336a0_res_updown; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4336a0_res_updown); - } - /* Optimize resources dependancies masks */ - pmu_res_depend_table = bcm4336a0_res_depend; - pmu_res_depend_table_sz = ARRAY_SIZE(bcm4336a0_res_depend); - break; - - case BCM4330_CHIP_ID: - /* Optimize resources up/down timers */ - if (ISSIM_ENAB(sih)) { - pmu_res_updown_table = bcm4330a0_res_updown_qt; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4330a0_res_updown_qt); - } else { - pmu_res_updown_table = bcm4330a0_res_updown; - pmu_res_updown_table_sz = - ARRAY_SIZE(bcm4330a0_res_updown); - } - /* Optimize resources dependancies masks */ - pmu_res_depend_table = bcm4330a0_res_depend; - pmu_res_depend_table_sz = ARRAY_SIZE(bcm4330a0_res_depend); - break; - - default: - break; - } - - /* # resources */ - rsrcs = (sih->pmucaps & PCAP_RC_MASK) >> PCAP_RC_SHIFT; - - /* Program up/down timers */ - while (pmu_res_updown_table_sz--) { - W_REG(&cc->res_table_sel, - pmu_res_updown_table[pmu_res_updown_table_sz].resnum); - W_REG(&cc->res_updn_timer, - pmu_res_updown_table[pmu_res_updown_table_sz].updown); - } - /* Apply nvram overrides to up/down timers */ - for (i = 0; i < rsrcs; i++) { - snprintf(name, sizeof(name), "r%dt", i); - val = getvar(NULL, name); - if (val == NULL) - continue; - W_REG(&cc->res_table_sel, (u32) i); - W_REG(&cc->res_updn_timer, - (u32) simple_strtoul(val, NULL, 0)); - } - - /* Program resource dependencies table */ - while (pmu_res_depend_table_sz--) { - if (pmu_res_depend_table[pmu_res_depend_table_sz].filter != NULL - && !(pmu_res_depend_table[pmu_res_depend_table_sz]. - filter) (sih)) - continue; - for (i = 0; i < rsrcs; i++) { - if ((pmu_res_depend_table[pmu_res_depend_table_sz]. - res_mask & PMURES_BIT(i)) == 0) - continue; - W_REG(&cc->res_table_sel, i); - switch (pmu_res_depend_table[pmu_res_depend_table_sz]. - action) { - case RES_DEPEND_SET: - W_REG(&cc->res_dep_mask, - pmu_res_depend_table - [pmu_res_depend_table_sz].depend_mask); - break; - case RES_DEPEND_ADD: - OR_REG(&cc->res_dep_mask, - pmu_res_depend_table - [pmu_res_depend_table_sz].depend_mask); - break; - case RES_DEPEND_REMOVE: - AND_REG(&cc->res_dep_mask, - ~pmu_res_depend_table - [pmu_res_depend_table_sz].depend_mask); - break; - default: - break; - } - } - } - /* Apply nvram overrides to dependancies masks */ - for (i = 0; i < rsrcs; i++) { - snprintf(name, sizeof(name), "r%dd", i); - val = getvar(NULL, name); - if (val == NULL) - continue; - W_REG(&cc->res_table_sel, (u32) i); - W_REG(&cc->res_dep_mask, - (u32) simple_strtoul(val, NULL, 0)); - } - - /* Determine min/max rsrc masks */ - si_pmu_res_masks(sih, &min_mask, &max_mask); - - /* It is required to program max_mask first and then min_mask */ - - /* Program max resource mask */ - - if (max_mask) - W_REG(&cc->max_res_mask, max_mask); - - /* Program min resource mask */ - - if (min_mask) - W_REG(&cc->min_res_mask, min_mask); - - /* Add some delay; allow resources to come up and settle. */ - mdelay(2); - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} - -u32 si_pmu_measure_alpclk(si_t *sih) -{ - chipcregs_t *cc; - uint origidx; - u32 alp_khz; - - if (sih->pmurev < 10) - return 0; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - if (R_REG(&cc->pmustatus) & PST_EXTLPOAVAIL) { - u32 ilp_ctr, alp_hz; - - /* - * Enable the reg to measure the freq, - * in case it was disabled before - */ - W_REG(&cc->pmu_xtalfreq, - 1U << PMU_XTALFREQ_REG_MEASURE_SHIFT); - - /* Delay for well over 4 ILP clocks */ - udelay(1000); - - /* Read the latched number of ALP ticks per 4 ILP ticks */ - ilp_ctr = - R_REG(&cc->pmu_xtalfreq) & PMU_XTALFREQ_REG_ILPCTR_MASK; - - /* - * Turn off the PMU_XTALFREQ_REG_MEASURE_SHIFT - * bit to save power - */ - W_REG(&cc->pmu_xtalfreq, 0); - - /* Calculate ALP frequency */ - alp_hz = (ilp_ctr * EXT_ILP_HZ) / 4; - - /* - * Round to nearest 100KHz, and at - * the same time convert to KHz - */ - alp_khz = (alp_hz + 50000) / 100000 * 100; - } else - alp_khz = 0; - - /* Return to original core */ - ai_setcoreidx(sih, origidx); - - return alp_khz; -} - -bool si_pmu_is_otp_powered(si_t *sih) -{ - uint idx; - chipcregs_t *cc; - bool st; - - /* Remember original core before switch to chipc */ - idx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM4329_CHIP_ID: - st = (R_REG(&cc->res_state) & PMURES_BIT(RES4329_OTP_PU)) - != 0; - break; - case BCM4319_CHIP_ID: - st = (R_REG(&cc->res_state) & PMURES_BIT(RES4319_OTP_PU)) - != 0; - break; - case BCM4336_CHIP_ID: - st = (R_REG(&cc->res_state) & PMURES_BIT(RES4336_OTP_PU)) - != 0; - break; - case BCM4330_CHIP_ID: - st = (R_REG(&cc->res_state) & PMURES_BIT(RES4330_OTP_PU)) - != 0; - break; - - /* These chip doesn't use PMU bit to power up/down OTP. OTP always on. - * Use OTP_INIT command to reset/refresh state. - */ - case BCM43224_CHIP_ID: - case BCM43225_CHIP_ID: - case BCM43421_CHIP_ID: - case BCM43236_CHIP_ID: - case BCM43235_CHIP_ID: - case BCM43238_CHIP_ID: - st = true; - break; - default: - st = true; - break; - } - - /* Return to original core */ - ai_setcoreidx(sih, idx); - return st; -} - -/* power up/down OTP through PMU resources */ -void si_pmu_otp_power(si_t *sih, bool on) -{ - chipcregs_t *cc; - uint origidx; - u32 rsrcs = 0; /* rsrcs to turn on/off OTP power */ - - /* Don't do anything if OTP is disabled */ - if (ai_is_otp_disabled(sih)) - return; - - /* Remember original core before switch to chipc */ - origidx = ai_coreidx(sih); - cc = ai_setcoreidx(sih, SI_CC_IDX); - - switch (sih->chip) { - case BCM4329_CHIP_ID: - rsrcs = PMURES_BIT(RES4329_OTP_PU); - break; - case BCM4319_CHIP_ID: - rsrcs = PMURES_BIT(RES4319_OTP_PU); - break; - case BCM4336_CHIP_ID: - rsrcs = PMURES_BIT(RES4336_OTP_PU); - break; - case BCM4330_CHIP_ID: - rsrcs = PMURES_BIT(RES4330_OTP_PU); - break; - default: - break; - } - - if (rsrcs != 0) { - u32 otps; - - /* Figure out the dependancies (exclude min_res_mask) */ - u32 deps = si_pmu_res_deps(sih, cc, rsrcs, true); - u32 min_mask = 0, max_mask = 0; - si_pmu_res_masks(sih, &min_mask, &max_mask); - deps &= ~min_mask; - /* Turn on/off the power */ - if (on) { - OR_REG(&cc->min_res_mask, (rsrcs | deps)); - SPINWAIT(!(R_REG(&cc->res_state) & rsrcs), - PMU_MAX_TRANSITION_DLY); - } else { - AND_REG(&cc->min_res_mask, ~(rsrcs | deps)); - } - - SPINWAIT((((otps = R_REG(&cc->otpstatus)) & OTPS_READY) != - (on ? OTPS_READY : 0)), 100); - } - - /* Return to original core */ - ai_setcoreidx(sih, origidx); -} diff --git a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h b/drivers/staging/brcm80211/brcmsmac/wlc_stf.h deleted file mode 100644 index 2b1180b128a..00000000000 --- a/drivers/staging/brcm80211/brcmsmac/wlc_stf.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wlc_stf_h_ -#define _wlc_stf_h_ - -extern int wlc_stf_attach(struct wlc_info *wlc); -extern void wlc_stf_detach(struct wlc_info *wlc); - -extern void wlc_tempsense_upd(struct wlc_info *wlc); -extern void wlc_stf_ss_algo_channel_get(struct wlc_info *wlc, - u16 *ss_algo_channel, - chanspec_t chanspec); -extern int wlc_stf_ss_update(struct wlc_info *wlc, struct wlcband *band); -extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc); -extern int wlc_stf_txchain_set(struct wlc_info *wlc, s32 int_val, bool force); -extern bool wlc_stf_stbc_rx_set(struct wlc_info *wlc, s32 int_val); - -extern int wlc_stf_ant_txant_validate(struct wlc_info *wlc, s8 val); -extern void wlc_stf_phy_txant_upd(struct wlc_info *wlc); -extern void wlc_stf_phy_chain_calc(struct wlc_info *wlc); -extern u16 wlc_stf_phytxchain_sel(struct wlc_info *wlc, ratespec_t rspec); -extern u16 wlc_stf_d11hdrs_phyctl_txant(struct wlc_info *wlc, ratespec_t rspec); - -#endif /* _wlc_stf_h_ */ diff --git a/drivers/staging/brcm80211/util/Makefile b/drivers/staging/brcm80211/brcmutil/Makefile index f9b36cafdc8..6403423c021 100644 --- a/drivers/staging/brcm80211/util/Makefile +++ b/drivers/staging/brcm80211/brcmutil/Makefile @@ -16,12 +16,12 @@ # CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ccflags-y := \ - -Idrivers/staging/brcm80211/util \ + -Idrivers/staging/brcm80211/brcmutil \ -Idrivers/staging/brcm80211/include BRCMUTIL_OFILES := \ - bcmutils.o \ - bcmwifi.o + utils.o \ + wifi.o MODULEPFX := brcmutil diff --git a/drivers/staging/brcm80211/util/bcmutils.c b/drivers/staging/brcm80211/brcmutil/utils.c index 43e5bb3aec0..37b6b779779 100644 --- a/drivers/staging/brcm80211/util/bcmutils.c +++ b/drivers/staging/brcm80211/brcmutil/utils.c @@ -14,27 +14,15 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/ctype.h> -#include <linux/kernel.h> -#include <linux/string.h> -#include <linux/module.h> -#include <linux/pci.h> #include <linux/netdevice.h> -#include <linux/sched.h> -#include <linux/printk.h> -#include <bcmdefs.h> -#include <stdarg.h> -#include <bcmutils.h> -#include <bcmnvram.h> -#include <bcmdevs.h> -#include <proto/802.11.h> +#include <brcmu_utils.h> MODULE_AUTHOR("Broadcom Corporation"); MODULE_DESCRIPTION("Broadcom 802.11n wireless LAN driver utilities."); MODULE_SUPPORTED_DEVICE("Broadcom 802.11n WLAN cards"); MODULE_LICENSE("Dual BSD/GPL"); -struct sk_buff *bcm_pkt_buf_get_skb(uint len) +struct sk_buff *brcmu_pkt_buf_get_skb(uint len) { struct sk_buff *skb; @@ -46,10 +34,10 @@ struct sk_buff *bcm_pkt_buf_get_skb(uint len) return skb; } -EXPORT_SYMBOL(bcm_pkt_buf_get_skb); +EXPORT_SYMBOL(brcmu_pkt_buf_get_skb); /* Free the driver packet. Free the tag if present */ -void bcm_pkt_buf_free_skb(struct sk_buff *skb) +void brcmu_pkt_buf_free_skb(struct sk_buff *skb) { struct sk_buff *nskb; int nest = 0; @@ -74,11 +62,11 @@ void bcm_pkt_buf_free_skb(struct sk_buff *skb) skb = nskb; } } -EXPORT_SYMBOL(bcm_pkt_buf_free_skb); +EXPORT_SYMBOL(brcmu_pkt_buf_free_skb); /* copy a buffer into a pkt buffer chain */ -uint bcm_pktfrombuf(struct sk_buff *p, uint offset, int len, +uint brcmu_pktfrombuf(struct sk_buff *p, uint offset, int len, unsigned char *buf) { uint n, ret = 0; @@ -105,10 +93,10 @@ uint bcm_pktfrombuf(struct sk_buff *p, uint offset, int len, return ret; } -EXPORT_SYMBOL(bcm_pktfrombuf); +EXPORT_SYMBOL(brcmu_pktfrombuf); /* return total length of buffer chain */ -uint bcm_pkttotlen(struct sk_buff *p) +uint brcmu_pkttotlen(struct sk_buff *p) { uint total; @@ -117,13 +105,13 @@ uint bcm_pkttotlen(struct sk_buff *p) total += p->len; return total; } -EXPORT_SYMBOL(bcm_pkttotlen); +EXPORT_SYMBOL(brcmu_pkttotlen); /* * osl multiple-precedence packet queue * hi_prec is always >= the number of the highest non-empty precedence */ -struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec, +struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec, struct sk_buff *p) { struct pktq_prec *q; @@ -148,9 +136,9 @@ struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec, return p; } -EXPORT_SYMBOL(bcm_pktq_penq); +EXPORT_SYMBOL(brcmu_pktq_penq); -struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec, +struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec, struct sk_buff *p) { struct pktq_prec *q; @@ -174,9 +162,9 @@ struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec, return p; } -EXPORT_SYMBOL(bcm_pktq_penq_head); +EXPORT_SYMBOL(brcmu_pktq_penq_head); -struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec) +struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec) { struct pktq_prec *q; struct sk_buff *p; @@ -199,9 +187,9 @@ struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec) return p; } -EXPORT_SYMBOL(bcm_pktq_pdeq); +EXPORT_SYMBOL(brcmu_pktq_pdeq); -struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec) +struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec) { struct pktq_prec *q; struct sk_buff *p, *prev; @@ -227,10 +215,10 @@ struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec) return p; } -EXPORT_SYMBOL(bcm_pktq_pdeq_tail); +EXPORT_SYMBOL(brcmu_pktq_pdeq_tail); void -bcm_pktq_pflush(struct pktq *pq, int prec, bool dir, +brcmu_pktq_pflush(struct pktq *pq, int prec, bool dir, ifpkt_cb_t fn, void *arg) { struct pktq_prec *q; @@ -246,7 +234,7 @@ bcm_pktq_pflush(struct pktq *pq, int prec, bool dir, else prev->prev = p->prev; p->prev = NULL; - bcm_pkt_buf_free_skb(p); + brcmu_pkt_buf_free_skb(p); q->len--; pq->len--; p = (head ? q->head : prev->prev); @@ -260,18 +248,18 @@ bcm_pktq_pflush(struct pktq *pq, int prec, bool dir, q->tail = NULL; } } -EXPORT_SYMBOL(bcm_pktq_pflush); +EXPORT_SYMBOL(brcmu_pktq_pflush); -void bcm_pktq_flush(struct pktq *pq, bool dir, +void brcmu_pktq_flush(struct pktq *pq, bool dir, ifpkt_cb_t fn, void *arg) { int prec; for (prec = 0; prec < pq->num_prec; prec++) - bcm_pktq_pflush(pq, prec, dir, fn, arg); + brcmu_pktq_pflush(pq, prec, dir, fn, arg); } -EXPORT_SYMBOL(bcm_pktq_flush); +EXPORT_SYMBOL(brcmu_pktq_flush); -void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len) +void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len) { int prec; @@ -286,9 +274,9 @@ void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len) for (prec = 0; prec < num_prec; prec++) pq->q[prec].max = pq->max; } -EXPORT_SYMBOL(bcm_pktq_init); +EXPORT_SYMBOL(brcmu_pktq_init); -struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out) +struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out) { int prec; @@ -304,10 +292,10 @@ struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out) return pq->q[prec].tail; } -EXPORT_SYMBOL(bcm_pktq_peek_tail); +EXPORT_SYMBOL(brcmu_pktq_peek_tail); /* Return sum of lengths of a specific set of precedences */ -int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp) +int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp) { int prec, len; @@ -319,10 +307,10 @@ int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp) return len; } -EXPORT_SYMBOL(bcm_pktq_mlen); +EXPORT_SYMBOL(brcmu_pktq_mlen); /* Priority dequeue from a specific set of precedences */ -struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp, +struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out) { struct pktq_prec *q; @@ -360,10 +348,10 @@ struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp, return p; } -EXPORT_SYMBOL(bcm_pktq_mdeq); +EXPORT_SYMBOL(brcmu_pktq_mdeq); /* parse a xx:xx:xx:xx:xx:xx format ethernet address */ -int bcm_ether_atoe(char *p, u8 *ea) +int brcmu_ether_atoe(char *p, u8 *ea) { int i = 0; @@ -375,11 +363,11 @@ int bcm_ether_atoe(char *p, u8 *ea) return i == 6; } -EXPORT_SYMBOL(bcm_ether_atoe); +EXPORT_SYMBOL(brcmu_ether_atoe); #if defined(BCMDBG) /* pretty hex print a pkt buffer chain */ -void bcm_prpkt(const char *msg, struct sk_buff *p0) +void brcmu_prpkt(const char *msg, struct sk_buff *p0) { struct sk_buff *p; @@ -389,13 +377,14 @@ void bcm_prpkt(const char *msg, struct sk_buff *p0) for (p = p0; p; p = p->next) print_hex_dump_bytes("", DUMP_PREFIX_OFFSET, p->data, p->len); } -EXPORT_SYMBOL(bcm_prpkt); +EXPORT_SYMBOL(brcmu_prpkt); #endif /* defined(BCMDBG) */ /* iovar table lookup */ -const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name) +const struct brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table, + const char *name) { - const bcm_iovar_t *vi; + const struct brcmu_iovar *vi; const char *lookup_name; /* skip any ':' delimited option prefixes */ @@ -413,9 +402,10 @@ const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name) return NULL; /* var name not found */ } -EXPORT_SYMBOL(bcm_iovar_lookup); +EXPORT_SYMBOL(brcmu_iovar_lookup); -int bcm_iovar_lencheck(const bcm_iovar_t *vi, void *arg, int len, bool set) +int brcmu_iovar_lencheck(const struct brcmu_iovar *vi, void *arg, int len, + bool set) { int bcmerror = 0; @@ -458,7 +448,7 @@ int bcm_iovar_lencheck(const bcm_iovar_t *vi, void *arg, int len, bool set) return bcmerror; } -EXPORT_SYMBOL(bcm_iovar_lencheck); +EXPORT_SYMBOL(brcmu_iovar_lencheck); /******************************************************************************* * crc8 @@ -517,29 +507,29 @@ static const u8 crc8_table[256] = { 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F }; -u8 bcm_crc8(u8 *pdata, /* pointer to array of data to process */ +u8 brcmu_crc8(u8 *pdata, /* pointer to array of data to process */ uint nbytes, /* number of input data bytes to process */ u8 crc /* either CRC8_INIT_VALUE or previous return value */ - ) { + ) { /* loop over the buffer data */ while (nbytes-- > 0) crc = crc8_table[(crc ^ *pdata++) & 0xff]; return crc; } -EXPORT_SYMBOL(bcm_crc8); +EXPORT_SYMBOL(brcmu_crc8); /* * Traverse a string of 1-byte tag/1-byte length/variable-length value * triples, returning a pointer to the substring whose first element * matches tag */ -bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key) +struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, uint key) { - bcm_tlv_t *elt; + struct brcmu_tlv *elt; int totlen; - elt = (bcm_tlv_t *) buf; + elt = (struct brcmu_tlv *) buf; totlen = buflen; /* find tagged parameter */ @@ -550,18 +540,19 @@ bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, uint key) if ((elt->id == key) && (totlen >= (len + 2))) return elt; - elt = (bcm_tlv_t *) ((u8 *) elt + (len + 2)); + elt = (struct brcmu_tlv *) ((u8 *) elt + (len + 2)); totlen -= (len + 2); } return NULL; } -EXPORT_SYMBOL(bcm_parse_tlvs); +EXPORT_SYMBOL(brcmu_parse_tlvs); #if defined(BCMDBG) int -bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags, char *buf, int len) +brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, char *buf, + int len) { int i; char *p = buf; @@ -612,10 +603,10 @@ bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags, char *buf, int len) return (int)(p - buf); } -EXPORT_SYMBOL(bcm_format_flags); +EXPORT_SYMBOL(brcmu_format_flags); /* print bytes formatted as hex to a string. return the resulting string length */ -int bcm_format_hex(char *str, const void *bytes, int len) +int brcmu_format_hex(char *str, const void *bytes, int len) { int i; char *p = str; @@ -627,10 +618,10 @@ int bcm_format_hex(char *str, const void *bytes, int len) } return (int)(p - str); } -EXPORT_SYMBOL(bcm_format_hex); +EXPORT_SYMBOL(brcmu_format_hex); #endif /* defined(BCMDBG) */ -char *bcm_chipname(uint chipid, char *buf, uint len) +char *brcmu_chipname(uint chipid, char *buf, uint len) { const char *fmt; @@ -638,9 +629,9 @@ char *bcm_chipname(uint chipid, char *buf, uint len) snprintf(buf, len, fmt, chipid); return buf; } -EXPORT_SYMBOL(bcm_chipname); +EXPORT_SYMBOL(brcmu_chipname); -uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) +uint brcmu_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) { uint len; @@ -657,7 +648,7 @@ uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) return len; } -EXPORT_SYMBOL(bcm_mkiovar); +EXPORT_SYMBOL(brcmu_mkiovar); /* Quarter dBm units to mW * Table starts at QDBM_OFFSET, so the first entry is mW for qdBm=153 @@ -681,7 +672,7 @@ EXPORT_SYMBOL(bcm_mkiovar); #define QDBM_TABLE_HIGH_BOUND 64938 /* High bound */ static const u16 nqdBm_to_mW_map[QDBM_TABLE_LEN] = { -/* qdBm: +0 +1 +2 +3 +4 +5 +6 +7 */ +/* qdBm: +0 +1 +2 +3 +4 +5 +6 +7 */ /* 153: */ 6683, 7079, 7499, 7943, 8414, 8913, 9441, 10000, /* 161: */ 10593, 11220, 11885, 12589, 13335, 14125, 14962, 15849, /* 169: */ 16788, 17783, 18836, 19953, 21135, 22387, 23714, 25119, @@ -689,7 +680,7 @@ static const u16 nqdBm_to_mW_map[QDBM_TABLE_LEN] = { /* 185: */ 42170, 44668, 47315, 50119, 53088, 56234, 59566, 63096 }; -u16 bcm_qdbm_to_mw(u8 qdbm) +u16 brcmu_qdbm_to_mw(u8 qdbm) { uint factor = 1; int idx = qdbm - QDBM_OFFSET; @@ -712,9 +703,9 @@ u16 bcm_qdbm_to_mw(u8 qdbm) */ return (nqdBm_to_mW_map[idx] + factor / 2) / factor; } -EXPORT_SYMBOL(bcm_qdbm_to_mw); +EXPORT_SYMBOL(brcmu_qdbm_to_mw); -u8 bcm_mw_to_qdbm(u16 mw) +u8 brcmu_mw_to_qdbm(u16 mw) { u8 qdbm; int offset; @@ -744,9 +735,9 @@ u8 bcm_mw_to_qdbm(u16 mw) return qdbm; } -EXPORT_SYMBOL(bcm_mw_to_qdbm); +EXPORT_SYMBOL(brcmu_mw_to_qdbm); -uint bcm_bitcount(u8 *bitmap, uint length) +uint brcmu_bitcount(u8 *bitmap, uint length) { uint bitcount = 0, i; u8 tmp; @@ -759,18 +750,18 @@ uint bcm_bitcount(u8 *bitmap, uint length) } return bitcount; } -EXPORT_SYMBOL(bcm_bitcount); +EXPORT_SYMBOL(brcmu_bitcount); -/* Initialization of bcmstrbuf structure */ -void bcm_binit(struct bcmstrbuf *b, char *buf, uint size) +/* Initialization of brcmu_strbuf structure */ +void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size) { b->origsize = b->size = size; b->origbuf = b->buf = buf; } -EXPORT_SYMBOL(bcm_binit); +EXPORT_SYMBOL(brcmu_binit); /* Buffer sprintf wrapper to guard against buffer overflow */ -int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...) +int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...) { va_list ap; int r; @@ -780,7 +771,7 @@ int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...) /* Non Ansi C99 compliant returns -1, * Ansi compliant return r >= b->size, - * bcmstdlib returns 0, handle all + * stdlib returns 0, handle all */ if ((r == -1) || (r >= (int)b->size) || (r == 0)) { b->size = 0; @@ -793,4 +784,4 @@ int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...) return r; } -EXPORT_SYMBOL(bcm_bprintf); +EXPORT_SYMBOL(brcmu_bprintf); diff --git a/drivers/staging/brcm80211/util/bcmwifi.c b/drivers/staging/brcm80211/brcmutil/wifi.c index 955a3ab1a82..b9ffe8682a2 100644 --- a/drivers/staging/brcm80211/util/bcmwifi.c +++ b/drivers/staging/brcm80211/brcmutil/wifi.c @@ -13,12 +13,7 @@ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#include <linux/ctype.h> -#include <linux/kernel.h> -#include <linux/module.h> -#include <bcmdefs.h> -#include <bcmutils.h> -#include <bcmwifi.h> +#include <brcmu_wifi.h> /* * Verify the chanspec is using a legal set of parameters, i.e. that the @@ -26,7 +21,7 @@ * combination could be legal given any set of circumstances. * RETURNS: true is the chanspec is malformed, false if it looks good. */ -bool bcm_chspec_malformed(chanspec_t chanspec) +bool brcmu_chspec_malformed(chanspec_t chanspec) { /* must be 2G or 5G band */ if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec)) @@ -46,14 +41,14 @@ bool bcm_chspec_malformed(chanspec_t chanspec) return false; } -EXPORT_SYMBOL(bcm_chspec_malformed); +EXPORT_SYMBOL(brcmu_chspec_malformed); /* * This function returns the channel number that control traffic is being sent on, for legacy * channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ * sideband depending on the chanspec selected */ -u8 bcm_chspec_ctlchan(chanspec_t chspec) +u8 brcmu_chspec_ctlchan(chanspec_t chspec) { u8 ctl_chan; @@ -76,7 +71,7 @@ u8 bcm_chspec_ctlchan(chanspec_t chspec) return ctl_chan; } -EXPORT_SYMBOL(bcm_chspec_ctlchan); +EXPORT_SYMBOL(brcmu_chspec_ctlchan); /* * Return the channel number for a given frequency and base frequency. @@ -97,7 +92,7 @@ EXPORT_SYMBOL(bcm_chspec_ctlchan); * * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 */ -int bcm_mhz2channel(uint freq, uint start_factor) +int brcmu_mhz2channel(uint freq, uint start_factor) { int ch = -1; uint base; @@ -133,5 +128,4 @@ int bcm_mhz2channel(uint freq, uint start_factor) return ch; } -EXPORT_SYMBOL(bcm_mhz2channel); - +EXPORT_SYMBOL(brcmu_mhz2channel); diff --git a/drivers/staging/brcm80211/include/aidmp.h b/drivers/staging/brcm80211/include/aidmp.h deleted file mode 100644 index 7e0ce8f2434..00000000000 --- a/drivers/staging/brcm80211/include/aidmp.h +++ /dev/null @@ -1,374 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _AIDMP_H -#define _AIDMP_H - -/* Manufacturer Ids */ -#define MFGID_ARM 0x43b -#define MFGID_BRCM 0x4bf -#define MFGID_MIPS 0x4a7 - -/* Component Classes */ -#define CC_SIM 0 -#define CC_EROM 1 -#define CC_CORESIGHT 9 -#define CC_VERIF 0xb -#define CC_OPTIMO 0xd -#define CC_GEN 0xe -#define CC_PRIMECELL 0xf - -/* Enumeration ROM registers */ -#define ER_EROMENTRY 0x000 -#define ER_REMAPCONTROL 0xe00 -#define ER_REMAPSELECT 0xe04 -#define ER_MASTERSELECT 0xe10 -#define ER_ITCR 0xf00 -#define ER_ITIP 0xf04 - -/* Erom entries */ -#define ER_TAG 0xe -#define ER_TAG1 0x6 -#define ER_VALID 1 -#define ER_CI 0 -#define ER_MP 2 -#define ER_ADD 4 -#define ER_END 0xe -#define ER_BAD 0xffffffff - -/* EROM CompIdentA */ -#define CIA_MFG_MASK 0xfff00000 -#define CIA_MFG_SHIFT 20 -#define CIA_CID_MASK 0x000fff00 -#define CIA_CID_SHIFT 8 -#define CIA_CCL_MASK 0x000000f0 -#define CIA_CCL_SHIFT 4 - -/* EROM CompIdentB */ -#define CIB_REV_MASK 0xff000000 -#define CIB_REV_SHIFT 24 -#define CIB_NSW_MASK 0x00f80000 -#define CIB_NSW_SHIFT 19 -#define CIB_NMW_MASK 0x0007c000 -#define CIB_NMW_SHIFT 14 -#define CIB_NSP_MASK 0x00003e00 -#define CIB_NSP_SHIFT 9 -#define CIB_NMP_MASK 0x000001f0 -#define CIB_NMP_SHIFT 4 - -/* EROM MasterPortDesc */ -#define MPD_MUI_MASK 0x0000ff00 -#define MPD_MUI_SHIFT 8 -#define MPD_MP_MASK 0x000000f0 -#define MPD_MP_SHIFT 4 - -/* EROM AddrDesc */ -#define AD_ADDR_MASK 0xfffff000 -#define AD_SP_MASK 0x00000f00 -#define AD_SP_SHIFT 8 -#define AD_ST_MASK 0x000000c0 -#define AD_ST_SHIFT 6 -#define AD_ST_SLAVE 0x00000000 -#define AD_ST_BRIDGE 0x00000040 -#define AD_ST_SWRAP 0x00000080 -#define AD_ST_MWRAP 0x000000c0 -#define AD_SZ_MASK 0x00000030 -#define AD_SZ_SHIFT 4 -#define AD_SZ_4K 0x00000000 -#define AD_SZ_8K 0x00000010 -#define AD_SZ_16K 0x00000020 -#define AD_SZ_SZD 0x00000030 -#define AD_AG32 0x00000008 -#define AD_ADDR_ALIGN 0x00000fff -#define AD_SZ_BASE 0x00001000 /* 4KB */ - -/* EROM SizeDesc */ -#define SD_SZ_MASK 0xfffff000 -#define SD_SG32 0x00000008 -#define SD_SZ_ALIGN 0x00000fff - -#ifndef _LANGUAGE_ASSEMBLY - -typedef volatile struct _aidmp { - u32 oobselina30; /* 0x000 */ - u32 oobselina74; /* 0x004 */ - u32 PAD[6]; - u32 oobselinb30; /* 0x020 */ - u32 oobselinb74; /* 0x024 */ - u32 PAD[6]; - u32 oobselinc30; /* 0x040 */ - u32 oobselinc74; /* 0x044 */ - u32 PAD[6]; - u32 oobselind30; /* 0x060 */ - u32 oobselind74; /* 0x064 */ - u32 PAD[38]; - u32 oobselouta30; /* 0x100 */ - u32 oobselouta74; /* 0x104 */ - u32 PAD[6]; - u32 oobseloutb30; /* 0x120 */ - u32 oobseloutb74; /* 0x124 */ - u32 PAD[6]; - u32 oobseloutc30; /* 0x140 */ - u32 oobseloutc74; /* 0x144 */ - u32 PAD[6]; - u32 oobseloutd30; /* 0x160 */ - u32 oobseloutd74; /* 0x164 */ - u32 PAD[38]; - u32 oobsynca; /* 0x200 */ - u32 oobseloutaen; /* 0x204 */ - u32 PAD[6]; - u32 oobsyncb; /* 0x220 */ - u32 oobseloutben; /* 0x224 */ - u32 PAD[6]; - u32 oobsyncc; /* 0x240 */ - u32 oobseloutcen; /* 0x244 */ - u32 PAD[6]; - u32 oobsyncd; /* 0x260 */ - u32 oobseloutden; /* 0x264 */ - u32 PAD[38]; - u32 oobaextwidth; /* 0x300 */ - u32 oobainwidth; /* 0x304 */ - u32 oobaoutwidth; /* 0x308 */ - u32 PAD[5]; - u32 oobbextwidth; /* 0x320 */ - u32 oobbinwidth; /* 0x324 */ - u32 oobboutwidth; /* 0x328 */ - u32 PAD[5]; - u32 oobcextwidth; /* 0x340 */ - u32 oobcinwidth; /* 0x344 */ - u32 oobcoutwidth; /* 0x348 */ - u32 PAD[5]; - u32 oobdextwidth; /* 0x360 */ - u32 oobdinwidth; /* 0x364 */ - u32 oobdoutwidth; /* 0x368 */ - u32 PAD[37]; - u32 ioctrlset; /* 0x400 */ - u32 ioctrlclear; /* 0x404 */ - u32 ioctrl; /* 0x408 */ - u32 PAD[61]; - u32 iostatus; /* 0x500 */ - u32 PAD[127]; - u32 ioctrlwidth; /* 0x700 */ - u32 iostatuswidth; /* 0x704 */ - u32 PAD[62]; - u32 resetctrl; /* 0x800 */ - u32 resetstatus; /* 0x804 */ - u32 resetreadid; /* 0x808 */ - u32 resetwriteid; /* 0x80c */ - u32 PAD[60]; - u32 errlogctrl; /* 0x900 */ - u32 errlogdone; /* 0x904 */ - u32 errlogstatus; /* 0x908 */ - u32 errlogaddrlo; /* 0x90c */ - u32 errlogaddrhi; /* 0x910 */ - u32 errlogid; /* 0x914 */ - u32 errloguser; /* 0x918 */ - u32 errlogflags; /* 0x91c */ - u32 PAD[56]; - u32 intstatus; /* 0xa00 */ - u32 PAD[127]; - u32 config; /* 0xe00 */ - u32 PAD[63]; - u32 itcr; /* 0xf00 */ - u32 PAD[3]; - u32 itipooba; /* 0xf10 */ - u32 itipoobb; /* 0xf14 */ - u32 itipoobc; /* 0xf18 */ - u32 itipoobd; /* 0xf1c */ - u32 PAD[4]; - u32 itipoobaout; /* 0xf30 */ - u32 itipoobbout; /* 0xf34 */ - u32 itipoobcout; /* 0xf38 */ - u32 itipoobdout; /* 0xf3c */ - u32 PAD[4]; - u32 itopooba; /* 0xf50 */ - u32 itopoobb; /* 0xf54 */ - u32 itopoobc; /* 0xf58 */ - u32 itopoobd; /* 0xf5c */ - u32 PAD[4]; - u32 itopoobain; /* 0xf70 */ - u32 itopoobbin; /* 0xf74 */ - u32 itopoobcin; /* 0xf78 */ - u32 itopoobdin; /* 0xf7c */ - u32 PAD[4]; - u32 itopreset; /* 0xf90 */ - u32 PAD[15]; - u32 peripherialid4; /* 0xfd0 */ - u32 peripherialid5; /* 0xfd4 */ - u32 peripherialid6; /* 0xfd8 */ - u32 peripherialid7; /* 0xfdc */ - u32 peripherialid0; /* 0xfe0 */ - u32 peripherialid1; /* 0xfe4 */ - u32 peripherialid2; /* 0xfe8 */ - u32 peripherialid3; /* 0xfec */ - u32 componentid0; /* 0xff0 */ - u32 componentid1; /* 0xff4 */ - u32 componentid2; /* 0xff8 */ - u32 componentid3; /* 0xffc */ -} aidmp_t; - -#endif /* _LANGUAGE_ASSEMBLY */ - -/* Out-of-band Router registers */ -#define OOB_BUSCONFIG 0x020 -#define OOB_STATUSA 0x100 -#define OOB_STATUSB 0x104 -#define OOB_STATUSC 0x108 -#define OOB_STATUSD 0x10c -#define OOB_ENABLEA0 0x200 -#define OOB_ENABLEA1 0x204 -#define OOB_ENABLEA2 0x208 -#define OOB_ENABLEA3 0x20c -#define OOB_ENABLEB0 0x280 -#define OOB_ENABLEB1 0x284 -#define OOB_ENABLEB2 0x288 -#define OOB_ENABLEB3 0x28c -#define OOB_ENABLEC0 0x300 -#define OOB_ENABLEC1 0x304 -#define OOB_ENABLEC2 0x308 -#define OOB_ENABLEC3 0x30c -#define OOB_ENABLED0 0x380 -#define OOB_ENABLED1 0x384 -#define OOB_ENABLED2 0x388 -#define OOB_ENABLED3 0x38c -#define OOB_ITCR 0xf00 -#define OOB_ITIPOOBA 0xf10 -#define OOB_ITIPOOBB 0xf14 -#define OOB_ITIPOOBC 0xf18 -#define OOB_ITIPOOBD 0xf1c -#define OOB_ITOPOOBA 0xf30 -#define OOB_ITOPOOBB 0xf34 -#define OOB_ITOPOOBC 0xf38 -#define OOB_ITOPOOBD 0xf3c - -/* DMP wrapper registers */ -#define AI_OOBSELINA30 0x000 -#define AI_OOBSELINA74 0x004 -#define AI_OOBSELINB30 0x020 -#define AI_OOBSELINB74 0x024 -#define AI_OOBSELINC30 0x040 -#define AI_OOBSELINC74 0x044 -#define AI_OOBSELIND30 0x060 -#define AI_OOBSELIND74 0x064 -#define AI_OOBSELOUTA30 0x100 -#define AI_OOBSELOUTA74 0x104 -#define AI_OOBSELOUTB30 0x120 -#define AI_OOBSELOUTB74 0x124 -#define AI_OOBSELOUTC30 0x140 -#define AI_OOBSELOUTC74 0x144 -#define AI_OOBSELOUTD30 0x160 -#define AI_OOBSELOUTD74 0x164 -#define AI_OOBSYNCA 0x200 -#define AI_OOBSELOUTAEN 0x204 -#define AI_OOBSYNCB 0x220 -#define AI_OOBSELOUTBEN 0x224 -#define AI_OOBSYNCC 0x240 -#define AI_OOBSELOUTCEN 0x244 -#define AI_OOBSYNCD 0x260 -#define AI_OOBSELOUTDEN 0x264 -#define AI_OOBAEXTWIDTH 0x300 -#define AI_OOBAINWIDTH 0x304 -#define AI_OOBAOUTWIDTH 0x308 -#define AI_OOBBEXTWIDTH 0x320 -#define AI_OOBBINWIDTH 0x324 -#define AI_OOBBOUTWIDTH 0x328 -#define AI_OOBCEXTWIDTH 0x340 -#define AI_OOBCINWIDTH 0x344 -#define AI_OOBCOUTWIDTH 0x348 -#define AI_OOBDEXTWIDTH 0x360 -#define AI_OOBDINWIDTH 0x364 -#define AI_OOBDOUTWIDTH 0x368 - -#if defined(__BIG_ENDIAN) && defined(BCMHND74K) -/* Selective swapped defines for those registers we need in - * big-endian code. - */ -#define AI_IOCTRLSET 0x404 -#define AI_IOCTRLCLEAR 0x400 -#define AI_IOCTRL 0x40c -#define AI_IOSTATUS 0x504 -#define AI_RESETCTRL 0x804 -#define AI_RESETSTATUS 0x800 - -#else /* !__BIG_ENDIAN || !BCMHND74K */ - -#define AI_IOCTRLSET 0x400 -#define AI_IOCTRLCLEAR 0x404 -#define AI_IOCTRL 0x408 -#define AI_IOSTATUS 0x500 -#define AI_RESETCTRL 0x800 -#define AI_RESETSTATUS 0x804 - -#endif /* __BIG_ENDIAN && BCMHND74K */ - -#define AI_IOCTRLWIDTH 0x700 -#define AI_IOSTATUSWIDTH 0x704 - -#define AI_RESETREADID 0x808 -#define AI_RESETWRITEID 0x80c -#define AI_ERRLOGCTRL 0xa00 -#define AI_ERRLOGDONE 0xa04 -#define AI_ERRLOGSTATUS 0xa08 -#define AI_ERRLOGADDRLO 0xa0c -#define AI_ERRLOGADDRHI 0xa10 -#define AI_ERRLOGID 0xa14 -#define AI_ERRLOGUSER 0xa18 -#define AI_ERRLOGFLAGS 0xa1c -#define AI_INTSTATUS 0xa00 -#define AI_CONFIG 0xe00 -#define AI_ITCR 0xf00 -#define AI_ITIPOOBA 0xf10 -#define AI_ITIPOOBB 0xf14 -#define AI_ITIPOOBC 0xf18 -#define AI_ITIPOOBD 0xf1c -#define AI_ITIPOOBAOUT 0xf30 -#define AI_ITIPOOBBOUT 0xf34 -#define AI_ITIPOOBCOUT 0xf38 -#define AI_ITIPOOBDOUT 0xf3c -#define AI_ITOPOOBA 0xf50 -#define AI_ITOPOOBB 0xf54 -#define AI_ITOPOOBC 0xf58 -#define AI_ITOPOOBD 0xf5c -#define AI_ITOPOOBAIN 0xf70 -#define AI_ITOPOOBBIN 0xf74 -#define AI_ITOPOOBCIN 0xf78 -#define AI_ITOPOOBDIN 0xf7c -#define AI_ITOPRESET 0xf90 -#define AI_PERIPHERIALID4 0xfd0 -#define AI_PERIPHERIALID5 0xfd4 -#define AI_PERIPHERIALID6 0xfd8 -#define AI_PERIPHERIALID7 0xfdc -#define AI_PERIPHERIALID0 0xfe0 -#define AI_PERIPHERIALID1 0xfe4 -#define AI_PERIPHERIALID2 0xfe8 -#define AI_PERIPHERIALID3 0xfec -#define AI_COMPONENTID0 0xff0 -#define AI_COMPONENTID1 0xff4 -#define AI_COMPONENTID2 0xff8 -#define AI_COMPONENTID3 0xffc - -/* resetctrl */ -#define AIRC_RESET 1 - -/* config */ -#define AICFG_OOB 0x00000020 -#define AICFG_IOS 0x00000010 -#define AICFG_IOC 0x00000008 -#define AICFG_TO 0x00000004 -#define AICFG_ERRL 0x00000002 -#define AICFG_RST 0x00000001 - -#endif /* _AIDMP_H */ diff --git a/drivers/staging/brcm80211/include/bcmdefs.h b/drivers/staging/brcm80211/include/bcmdefs.h deleted file mode 100644 index 55631f36743..00000000000 --- a/drivers/staging/brcm80211/include/bcmdefs.h +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmdefs_h_ -#define _bcmdefs_h_ - -#define SI_BUS 0 -#define PCI_BUS 1 -#define PCMCIA_BUS 2 -#define SDIO_BUS 3 -#define JTAG_BUS 4 -#define USB_BUS 5 -#define SPI_BUS 6 - - -#ifndef OFF -#define OFF 0 -#endif - -#ifndef ON -#define ON 1 /* ON = 1 */ -#endif - -#define AUTO (-1) /* Auto = -1 */ - -/* Bus types */ -#define SI_BUS 0 /* SOC Interconnect */ -#define PCI_BUS 1 /* PCI target */ -#define SDIO_BUS 3 /* SDIO target */ -#define JTAG_BUS 4 /* JTAG */ -#define USB_BUS 5 /* USB (does not support R/W REG) */ -#define SPI_BUS 6 /* gSPI target */ -#define RPC_BUS 7 /* RPC target */ - - -/* Defines for DMA Address Width - Shared between OSL and HNDDMA */ -#define DMADDR_MASK_32 0x0 /* Address mask for 32-bits */ -#define DMADDR_MASK_30 0xc0000000 /* Address mask for 30-bits */ -#define DMADDR_MASK_0 0xffffffff /* Address mask for 0-bits (hi-part) */ - -#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */ -#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */ -#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */ -#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */ - -#ifdef BCMDMA64OSL -typedef struct { - u32 loaddr; - u32 hiaddr; -} dma64addr_t; - -typedef dma64addr_t dmaaddr_t; -#define PHYSADDRHI(_pa) ((_pa).hiaddr) -#define PHYSADDRHISET(_pa, _val) \ - do { \ - (_pa).hiaddr = (_val); \ - } while (0) -#define PHYSADDRLO(_pa) ((_pa).loaddr) -#define PHYSADDRLOSET(_pa, _val) \ - do { \ - (_pa).loaddr = (_val); \ - } while (0) - -#else -typedef unsigned long dmaaddr_t; -#define PHYSADDRHI(_pa) (0) -#define PHYSADDRHISET(_pa, _val) -#define PHYSADDRLO(_pa) ((_pa)) -#define PHYSADDRLOSET(_pa, _val) \ - do { \ - (_pa) = (_val); \ - } while (0) -#endif /* BCMDMA64OSL */ - -/* One physical DMA segment */ -typedef struct { - dmaaddr_t addr; - u32 length; -} hnddma_seg_t; - -#define MAX_DMA_SEGS 4 - -typedef struct { - void *oshdmah; /* Opaque handle for OSL to store its information */ - uint origsize; /* Size of the virtual packet */ - uint nsegs; - hnddma_seg_t segs[MAX_DMA_SEGS]; -} hnddma_seg_map_t; - -/* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF). - * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL. - * There is a compile time check in wlc.c which ensure that this value is at least as big - * as TXOFF. This value is used in dma_rxfill (hnddma.c). - */ - -#define BCMEXTRAHDROOM 172 - -/* Macros for doing definition and get/set of bitfields - * Usage example, e.g. a three-bit field (bits 4-6): - * #define <NAME>_M BITFIELD_MASK(3) - * #define <NAME>_S 4 - * ... - * regval = R_REG(osh, ®s->regfoo); - * field = GFIELD(regval, <NAME>); - * regval = SFIELD(regval, <NAME>, 1); - * W_REG(osh, ®s->regfoo, regval); - */ -#define BITFIELD_MASK(width) \ - (((unsigned)1 << (width)) - 1) -#define GFIELD(val, field) \ - (((val) >> field ## _S) & field ## _M) -#define SFIELD(val, field, bits) \ - (((val) & (~(field ## _M << field ## _S))) | \ - ((unsigned)(bits) << field ## _S)) - -/* - * Priority definitions according 802.1D - */ -#define PRIO_8021D_NONE 2 -#define PRIO_8021D_BK 1 -#define PRIO_8021D_BE 0 -#define PRIO_8021D_EE 3 -#define PRIO_8021D_CL 4 -#define PRIO_8021D_VI 5 -#define PRIO_8021D_VO 6 -#define PRIO_8021D_NC 7 -#define MAXPRIO 7 -#define NUMPRIO (MAXPRIO + 1) - -/* Max. nvram variable table size */ -#define MAXSZ_NVRAM_VARS 4096 - -/* handle forward declaration */ -struct wl_info; -struct wlc_bsscfg; - -#endif /* _bcmdefs_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmdevs.h b/drivers/staging/brcm80211/include/bcmdevs.h deleted file mode 100644 index 26947efa83e..00000000000 --- a/drivers/staging/brcm80211/include/bcmdevs.h +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BCMDEVS_H -#define _BCMDEVS_H - -#define BCM4325_D11DUAL_ID 0x431b -#define BCM4325_D11G_ID 0x431c -#define BCM4325_D11A_ID 0x431d - -#define BCM4329_D11N2G_ID 0x432f /* 4329 802.11n 2.4G device */ -#define BCM4329_D11N5G_ID 0x4330 /* 4329 802.11n 5G device */ -#define BCM4329_D11NDUAL_ID 0x432e - -#define BCM4319_D11N_ID 0x4337 /* 4319 802.11n dualband device */ -#define BCM4319_D11N2G_ID 0x4338 /* 4319 802.11n 2.4G device */ -#define BCM4319_D11N5G_ID 0x4339 /* 4319 802.11n 5G device */ - -#define BCM43224_D11N_ID 0x4353 /* 43224 802.11n dualband device */ - -#define BCM43225_D11N2G_ID 0x4357 /* 43225 802.11n 2.4GHz device */ - -#define BCM43236_D11N_ID 0x4346 /* 43236 802.11n dualband device */ -#define BCM43236_D11N2G_ID 0x4347 /* 43236 802.11n 2.4GHz device */ - -#define BCM4313_D11N2G_ID 0x4727 /* 4313 802.11n 2.4G device */ - -/* Chip IDs */ -#define BCM4313_CHIP_ID 0x4313 /* 4313 chip id */ -#define BCM4319_CHIP_ID 0x4319 /* 4319 chip id */ - -#define BCM43224_CHIP_ID 43224 /* 43224 chipcommon chipid */ -#define BCM43225_CHIP_ID 43225 /* 43225 chipcommon chipid */ -#define BCM43421_CHIP_ID 43421 /* 43421 chipcommon chipid */ -#define BCM43235_CHIP_ID 43235 /* 43235 chipcommon chipid */ -#define BCM43236_CHIP_ID 43236 /* 43236 chipcommon chipid */ -#define BCM43238_CHIP_ID 43238 /* 43238 chipcommon chipid */ -#define BCM4329_CHIP_ID 0x4329 /* 4329 chipcommon chipid */ -#define BCM4325_CHIP_ID 0x4325 /* 4325 chipcommon chipid */ -#define BCM4331_CHIP_ID 0x4331 /* 4331 chipcommon chipid */ -#define BCM4336_CHIP_ID 0x4336 /* 4336 chipcommon chipid */ -#define BCM4330_CHIP_ID 0x4330 /* 4330 chipcommon chipid */ -#define BCM6362_CHIP_ID 0x6362 /* 6362 chipcommon chipid */ - -/* these are router chips */ -#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */ -#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */ -#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */ -#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */ -#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */ - -/* Package IDs */ -#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */ -#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */ -#define BCM4717_PKG_ID 9 /* 4717 package id */ -#define BCM4718_PKG_ID 10 /* 4718 package id */ -#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ -#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ -#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */ - -/* boardflags */ -#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */ -#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */ -#define BFL_FEM 0x00000800 /* Board supports the Front End Module */ -#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ -#define BFL_NOPA 0x00010000 /* Board has no PA */ -#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */ -#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ -#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ -#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */ -#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ - -/* boardflags2 */ -#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ -#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ -#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */ -#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */ -#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */ -#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */ -#define BFL2_LEGACY 0x00000080 -#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */ -#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */ -#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */ -#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */ -#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */ -#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */ -#define BFL2_IPALVLSHIFT_3P3 0x00020000 -#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */ -#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio "ON" - * Most drivers will turn it off without this flag - * to save power. - */ - -/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ -#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */ -#define BOARD_GPIO_12 0x1000 /* gpio 12 */ -#define BOARD_GPIO_13 0x2000 /* gpio 13 */ - -#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */ -#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */ -#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */ - -/* power control defines */ -#define PLL_DELAY 150 /* us pll on delay */ -#define FREF_DELAY 200 /* us fref change delay */ -#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */ - -/* Reference board types */ -#define SPI_BOARD 0x0402 - -#endif /* _BCMDEVS_H */ diff --git a/drivers/staging/brcm80211/include/bcmnvram.h b/drivers/staging/brcm80211/include/bcmnvram.h deleted file mode 100644 index 12645ddf000..00000000000 --- a/drivers/staging/brcm80211/include/bcmnvram.h +++ /dev/null @@ -1,153 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmnvram_h_ -#define _bcmnvram_h_ - -#ifndef _LANGUAGE_ASSEMBLY - -#include <bcmdefs.h> - -struct nvram_header { - u32 magic; - u32 len; - u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */ - u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */ - u32 config_ncdl; /* ncdl values for memc */ -}; - -/* - * Initialize NVRAM access. May be unnecessary or undefined on certain - * platforms. - */ -extern int nvram_init(void); - -/* - * Append a chunk of nvram variables to the global list - */ -extern int nvram_append(char *vars, uint varsz); - -/* - * Check for reset button press for restoring factory defaults. - */ -extern int nvram_reset(void); - -/* - * Disable NVRAM access. May be unnecessary or undefined on certain - * platforms. - */ -extern void nvram_exit(void); - -/* - * Get the value of an NVRAM variable. The pointer returned may be - * invalid after a set. - * @param name name of variable to get - * @return value of variable or NULL if undefined - */ -extern char *nvram_get(const char *name); - -/* - * Get the value of an NVRAM variable. - * @param name name of variable to get - * @return value of variable or NUL if undefined - */ -#define nvram_safe_get(name) (nvram_get(name) ? : "") - -/* - * Match an NVRAM variable. - * @param name name of variable to match - * @param match value to compare against value of variable - * @return true if variable is defined and its value is string equal - * to match or false otherwise - */ -static inline int nvram_match(char *name, char *match) -{ - const char *value = nvram_get(name); - return value && !strcmp(value, match); -} - -/* - * Inversely match an NVRAM variable. - * @param name name of variable to match - * @param match value to compare against value of variable - * @return true if variable is defined and its value is not string - * equal to invmatch or false otherwise - */ -static inline int nvram_invmatch(char *name, char *invmatch) -{ - const char *value = nvram_get(name); - return value && strcmp(value, invmatch); -} - -/* - * Set the value of an NVRAM variable. The name and value strings are - * copied into private storage. Pointers to previously set values - * may become invalid. The new value may be immediately - * retrieved but will not be permanently stored until a commit. - * @param name name of variable to set - * @param value value of variable - * @return 0 on success and errno on failure - */ -extern int nvram_set(const char *name, const char *value); - -/* - * Unset an NVRAM variable. Pointers to previously set values - * remain valid until a set. - * @param name name of variable to unset - * @return 0 on success and errno on failure - * NOTE: use nvram_commit to commit this change to flash. - */ -extern int nvram_unset(const char *name); - -/* - * Commit NVRAM variables to permanent storage. All pointers to values - * may be invalid after a commit. - * NVRAM values are undefined after a commit. - * @return 0 on success and errno on failure - */ -extern int nvram_commit(void); - -/* - * Get all NVRAM variables (format name=value\0 ... \0\0). - * @param buf buffer to store variables - * @param count size of buffer in bytes - * @return 0 on success and errno on failure - */ -extern int nvram_getall(char *nvram_buf, int count); - -#endif /* _LANGUAGE_ASSEMBLY */ - -/* variable access */ -extern char *getvar(char *vars, const char *name); -extern int getintvar(char *vars, const char *name); - -/* The NVRAM version number stored as an NVRAM variable */ -#define NVRAM_SOFTWARE_VERSION "1" - -#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */ -#define NVRAM_CLEAR_MAGIC 0x0 -#define NVRAM_INVALID_MAGIC 0xFFFFFFFF -#define NVRAM_VERSION 1 -#define NVRAM_HEADER_SIZE 20 -#define NVRAM_SPACE 0x8000 - -#define NVRAM_MAX_VALUE_LEN 255 -#define NVRAM_MAX_PARAM_LEN 64 - -#define NVRAM_CRC_START_POSITION 9 /* magic, len, crc8 to be skipped */ -#define NVRAM_CRC_VER_MASK 0xffffff00 /* for crc_ver_init */ - -#endif /* _bcmnvram_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmsdh.h b/drivers/staging/brcm80211/include/bcmsdh.h deleted file mode 100644 index 3b57dc13b1d..00000000000 --- a/drivers/staging/brcm80211/include/bcmsdh.h +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmsdh_h_ -#define _bcmsdh_h_ - -#include <linux/skbuff.h> -#define BCMSDH_ERROR_VAL 0x0001 /* Error */ -#define BCMSDH_INFO_VAL 0x0002 /* Info */ -extern const uint bcmsdh_msglevel; - -#ifdef BCMDBG -#define BCMSDH_ERROR(x) \ - do { \ - if ((bcmsdh_msglevel & BCMSDH_ERROR_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#define BCMSDH_INFO(x) \ - do { \ - if ((bcmsdh_msglevel & BCMSDH_INFO_VAL) && net_ratelimit()) \ - printk x; \ - } while (0) -#else /* BCMDBG */ -#define BCMSDH_ERROR(x) -#define BCMSDH_INFO(x) -#endif /* BCMDBG */ - -/* forward declarations */ -typedef struct bcmsdh_info bcmsdh_info_t; -typedef void (*bcmsdh_cb_fn_t) (void *); - -/* Attach and build an interface to the underlying SD host driver. - * - Allocates resources (structs, arrays, mem, OS handles, etc) needed by bcmsdh. - * - Returns the bcmsdh handle and virtual address base for register access. - * The returned handle should be used in all subsequent calls, but the bcmsh - * implementation may maintain a single "default" handle (e.g. the first or - * most recent one) to enable single-instance implementations to pass NULL. - */ -extern bcmsdh_info_t *bcmsdh_attach(void *cfghdl, void **regsva, uint irq); - -/* Detach - freeup resources allocated in attach */ -extern int bcmsdh_detach(void *sdh); - -/* Query if SD device interrupts are enabled */ -extern bool bcmsdh_intr_query(void *sdh); - -/* Enable/disable SD interrupt */ -extern int bcmsdh_intr_enable(void *sdh); -extern int bcmsdh_intr_disable(void *sdh); - -/* Register/deregister device interrupt handler. */ -extern int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); -extern int bcmsdh_intr_dereg(void *sdh); - -#if defined(DHD_DEBUG) -/* Query pending interrupt status from the host controller */ -extern bool bcmsdh_intr_pending(void *sdh); -#endif -extern int bcmsdh_claim_host_and_lock(void *sdh); -extern int bcmsdh_release_host_and_unlock(void *sdh); - -/* Register a callback to be called if and when bcmsdh detects - * device removal. No-op in the case of non-removable/hardwired devices. - */ -extern int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); - -/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). - * fn: function number - * addr: unmodified SDIO-space address - * data: data byte to write - * err: pointer to error code (or NULL) - */ -extern u8 bcmsdh_cfg_read(void *sdh, uint func, u32 addr, int *err); -extern void bcmsdh_cfg_write(void *sdh, uint func, u32 addr, u8 data, - int *err); - -/* Read/Write 4bytes from/to cfg space */ -extern u32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, u32 addr, - int *err); -extern void bcmsdh_cfg_write_word(void *sdh, uint fnc_num, u32 addr, - u32 data, int *err); - -/* Read CIS content for specified function. - * fn: function whose CIS is being requested (0 is common CIS) - * cis: pointer to memory location to place results - * length: number of bytes to read - * Internally, this routine uses the values from the cis base regs (0x9-0xB) - * to form an SDIO-space address to read the data from. - */ -extern int bcmsdh_cis_read(void *sdh, uint func, u8 *cis, uint length); - -/* Synchronous access to device (client) core registers via CMD53 to F1. - * addr: backplane address (i.e. >= regsva from attach) - * size: register width in bytes (2 or 4) - * data: data for register write - */ -extern u32 bcmsdh_reg_read(void *sdh, u32 addr, uint size); -extern u32 bcmsdh_reg_write(void *sdh, u32 addr, uint size, u32 data); - -/* Indicate if last reg read/write failed */ -extern bool bcmsdh_regfail(void *sdh); - -/* Buffer transfer to/from device (client) core via cmd53. - * fn: function number - * addr: backplane address (i.e. >= regsva from attach) - * flags: backplane width, address increment, sync/async - * buf: pointer to memory data buffer - * nbytes: number of bytes to transfer to/from buf - * pkt: pointer to packet associated with buf (if any) - * complete: callback function for command completion (async only) - * handle: handle for completion callback (first arg in callback) - * Returns 0 or error code. - * NOTE: Async operation is not currently supported. - */ -typedef void (*bcmsdh_cmplt_fn_t) (void *handle, int status, bool sync_waiting); -extern int bcmsdh_send_buf(void *sdh, u32 addr, uint fn, uint flags, - u8 *buf, uint nbytes, void *pkt, - bcmsdh_cmplt_fn_t complete, void *handle); -extern int bcmsdh_recv_buf(void *sdh, u32 addr, uint fn, uint flags, - u8 *buf, uint nbytes, struct sk_buff *pkt, - bcmsdh_cmplt_fn_t complete, void *handle); - -/* Flags bits */ -#define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ -#define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ -#define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ - -/* Pending (non-error) return code */ -#define BCME_PENDING 1 - -/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). - * rw: read or write (0/1) - * addr: direct SDIO address - * buf: pointer to memory data buffer - * nbytes: number of bytes to transfer to/from buf - * Returns 0 or error code. - */ -extern int bcmsdh_rwdata(void *sdh, uint rw, u32 addr, u8 *buf, - uint nbytes); - -/* Issue an abort to the specified function */ -extern int bcmsdh_abort(void *sdh, uint fn); - -/* Start SDIO Host Controller communication */ -extern int bcmsdh_start(void *sdh, int stage); - -/* Stop SDIO Host Controller communication */ -extern int bcmsdh_stop(void *sdh); - -/* Returns the "Device ID" of target device on the SDIO bus. */ -extern int bcmsdh_query_device(void *sdh); - -/* Returns the number of IO functions reported by the device */ -extern uint bcmsdh_query_iofnum(void *sdh); - -/* Miscellaneous knob tweaker. */ -extern int bcmsdh_iovar_op(void *sdh, const char *name, - void *params, int plen, void *arg, int len, - bool set); - -/* Reset and reinitialize the device */ -extern int bcmsdh_reset(bcmsdh_info_t *sdh); - -/* helper functions */ - -extern void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); - -/* callback functions */ -typedef struct { - /* attach to device */ - void *(*attach) (u16 vend_id, u16 dev_id, u16 bus, u16 slot, - u16 func, uint bustype, void *regsva, void *param); - /* detach from device */ - void (*detach) (void *ch); -} bcmsdh_driver_t; - -/* platform specific/high level functions */ -extern int bcmsdh_register(bcmsdh_driver_t *driver); -extern void bcmsdh_unregister(void); -extern bool bcmsdh_chipmatch(u16 vendor, u16 device); -extern void bcmsdh_device_remove(void *sdh); - -/* Function to pass device-status bits to DHD. */ -extern u32 bcmsdh_get_dstatus(void *sdh); - -/* Function to return current window addr */ -extern u32 bcmsdh_cur_sbwad(void *sdh); - -/* Function to pass chipid and rev to lower layers for controlling pr's */ -extern void bcmsdh_chipinfo(void *sdh, u32 chip, u32 chiprev); - -#endif /* _bcmsdh_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmsdpcm.h b/drivers/staging/brcm80211/include/bcmsdpcm.h deleted file mode 100644 index 5175e67a6d2..00000000000 --- a/drivers/staging/brcm80211/include/bcmsdpcm.h +++ /dev/null @@ -1,208 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmsdpcm_h_ -#define _bcmsdpcm_h_ - -/* - * Software allocation of To SB Mailbox resources - */ - -/* intstatus bits */ -#define I_SMB_NAK I_SMB_SW0 /* To SB Mailbox Frame NAK */ -#define I_SMB_INT_ACK I_SMB_SW1 /* To SB Mailbox Host Interrupt ACK */ -#define I_SMB_USE_OOB I_SMB_SW2 /* To SB Mailbox Use OOB Wakeup */ -#define I_SMB_DEV_INT I_SMB_SW3 /* To SB Mailbox Miscellaneous Interrupt */ - -#define I_TOSBMAIL (I_SMB_NAK | I_SMB_INT_ACK | I_SMB_USE_OOB | I_SMB_DEV_INT) - -/* tosbmailbox bits corresponding to intstatus bits */ -#define SMB_NAK (1 << 0) /* To SB Mailbox Frame NAK */ -#define SMB_INT_ACK (1 << 1) /* To SB Mailbox Host Interrupt ACK */ -#define SMB_USE_OOB (1 << 2) /* To SB Mailbox Use OOB Wakeup */ -#define SMB_DEV_INT (1 << 3) /* To SB Mailbox Miscellaneous Interrupt */ -#define SMB_MASK 0x0000000f /* To SB Mailbox Mask */ - -/* tosbmailboxdata */ -#define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */ -#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */ - -/* - * Software allocation of To Host Mailbox resources - */ - -/* intstatus bits */ -#define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */ -#define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */ -#define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */ -#define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */ - -#define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT) - -/* tohostmailbox bits corresponding to intstatus bits */ -#define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */ -#define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */ -#define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */ -#define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */ -#define HMB_MASK 0x0000000f /* To Host Mailbox Mask */ - -/* tohostmailboxdata */ -#define HMB_DATA_NAKHANDLED 1 /* we're ready to retransmit NAK'd frame to host */ -#define HMB_DATA_DEVREADY 2 /* we're ready to to talk to host after enable */ -#define HMB_DATA_FC 4 /* per prio flowcontrol update flag to host */ -#define HMB_DATA_FWREADY 8 /* firmware is ready for protocol activity */ - -#define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */ -#define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */ - -#define HMB_DATA_VERSION_MASK 0x00ff0000 /* device protocol version (with devready) */ -#define HMB_DATA_VERSION_SHIFT 16 /* device protocol version (with devready) */ - -/* - * Software-defined protocol header - */ - -/* Current protocol version */ -#define SDPCM_PROT_VERSION 4 - -/* SW frame header */ -#define SDPCM_SEQUENCE_MASK 0x000000ff /* Sequence Number Mask */ -#define SDPCM_PACKET_SEQUENCE(p) (((u8 *)p)[0] & 0xff) /* p starts w/SW Header */ - -#define SDPCM_CHANNEL_MASK 0x00000f00 /* Channel Number Mask */ -#define SDPCM_CHANNEL_SHIFT 8 /* Channel Number Shift */ -#define SDPCM_PACKET_CHANNEL(p) (((u8 *)p)[1] & 0x0f) /* p starts w/SW Header */ - -#define SDPCM_FLAGS_MASK 0x0000f000 /* Mask of flag bits */ -#define SDPCM_FLAGS_SHIFT 12 /* Flag bits shift */ -#define SDPCM_PACKET_FLAGS(p) ((((u8 *)p)[1] & 0xf0) >> 4) /* p starts w/SW Header */ - -/* Next Read Len: lookahead length of next frame, in 16-byte units (rounded up) */ -#define SDPCM_NEXTLEN_MASK 0x00ff0000 /* Next Read Len Mask */ -#define SDPCM_NEXTLEN_SHIFT 16 /* Next Read Len Shift */ -#define SDPCM_NEXTLEN_VALUE(p) ((((u8 *)p)[2] & 0xff) << 4) /* p starts w/SW Header */ -#define SDPCM_NEXTLEN_OFFSET 2 - -/* Data Offset from SOF (HW Tag, SW Tag, Pad) */ -#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ -#define SDPCM_DOFFSET_VALUE(p) (((u8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) -#define SDPCM_DOFFSET_MASK 0xff000000 -#define SDPCM_DOFFSET_SHIFT 24 - -#define SDPCM_FCMASK_OFFSET 4 /* Flow control */ -#define SDPCM_FCMASK_VALUE(p) (((u8 *)p)[SDPCM_FCMASK_OFFSET] & 0xff) -#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ -#define SDPCM_WINDOW_VALUE(p) (((u8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) -#define SDPCM_VERSION_OFFSET 6 /* Version # */ -#define SDPCM_VERSION_VALUE(p) (((u8 *)p)[SDPCM_VERSION_OFFSET] & 0xff) -#define SDPCM_UNUSED_OFFSET 7 /* Spare */ -#define SDPCM_UNUSED_VALUE(p) (((u8 *)p)[SDPCM_UNUSED_OFFSET] & 0xff) - -#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ - -/* logical channel numbers */ -#define SDPCM_CONTROL_CHANNEL 0 /* Control Request/Response Channel Id */ -#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ -#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ -#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets (superframes) */ -#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ -#define SDPCM_MAX_CHANNEL 15 - -#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for eight-bit frame seq number */ - -#define SDPCM_FLAG_RESVD0 0x01 -#define SDPCM_FLAG_RESVD1 0x02 -#define SDPCM_FLAG_GSPI_TXENAB 0x04 -#define SDPCM_FLAG_GLOMDESC 0x08 /* Superframe descriptor mask */ - -/* For GLOM_CHANNEL frames, use a flag to indicate descriptor frame */ -#define SDPCM_GLOMDESC_FLAG (SDPCM_FLAG_GLOMDESC << SDPCM_FLAGS_SHIFT) - -#define SDPCM_GLOMDESC(p) (((u8 *)p)[1] & 0x80) - -/* For TEST_CHANNEL packets, define another 4-byte header */ -#define SDPCM_TEST_HDRLEN 4 /* Generally: Cmd(1), Ext(1), Len(2); - * Semantics of Ext byte depend on command. - * Len is current or requested frame length, not - * including test header; sent little-endian. - */ -#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext is a pattern id. */ -#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext is a pattern id. */ -#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext is a pattern id. */ -#define SDPCM_TEST_BURST 0x04 /* Receiver to send a burst. Ext is a frame count */ -#define SDPCM_TEST_SEND 0x05 /* Receiver sets send mode. Ext is boolean on/off */ - -/* Handy macro for filling in datagen packets with a pattern */ -#define SDPCM_TEST_FILL(byteno, id) ((u8)(id + byteno)) - -/* - * Software counters (first part matches hardware counters) - */ - -typedef volatile struct { - u32 cmd52rd; /* Cmd52RdCount, SDIO: cmd52 reads */ - u32 cmd52wr; /* Cmd52WrCount, SDIO: cmd52 writes */ - u32 cmd53rd; /* Cmd53RdCount, SDIO: cmd53 reads */ - u32 cmd53wr; /* Cmd53WrCount, SDIO: cmd53 writes */ - u32 abort; /* AbortCount, SDIO: aborts */ - u32 datacrcerror; /* DataCrcErrorCount, SDIO: frames w/CRC error */ - u32 rdoutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Rd Frm out of sync */ - u32 wroutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Wr Frm out of sync */ - u32 writebusy; /* WriteBusyCount, SDIO: device asserted "busy" */ - u32 readwait; /* ReadWaitCount, SDIO: no data ready for a read cmd */ - u32 readterm; /* ReadTermCount, SDIO: read frame termination cmds */ - u32 writeterm; /* WriteTermCount, SDIO: write frames termination cmds */ - u32 rxdescuflo; /* receive descriptor underflows */ - u32 rxfifooflo; /* receive fifo overflows */ - u32 txfifouflo; /* transmit fifo underflows */ - u32 runt; /* runt (too short) frames recv'd from bus */ - u32 badlen; /* frame's rxh len does not match its hw tag len */ - u32 badcksum; /* frame's hw tag chksum doesn't agree with len value */ - u32 seqbreak; /* break in sequence # space from one rx frame to the next */ - u32 rxfcrc; /* frame rx header indicates crc error */ - u32 rxfwoos; /* frame rx header indicates write out of sync */ - u32 rxfwft; /* frame rx header indicates write frame termination */ - u32 rxfabort; /* frame rx header indicates frame aborted */ - u32 woosint; /* write out of sync interrupt */ - u32 roosint; /* read out of sync interrupt */ - u32 rftermint; /* read frame terminate interrupt */ - u32 wftermint; /* write frame terminate interrupt */ -} sdpcmd_cnt_t; - -/* - * Shared structure between dongle and the host. - * The structure contains pointers to trap or assert information. - */ -#define SDPCM_SHARED_VERSION 0x0002 -#define SDPCM_SHARED_VERSION_MASK 0x00FF -#define SDPCM_SHARED_ASSERT_BUILT 0x0100 -#define SDPCM_SHARED_ASSERT 0x0200 -#define SDPCM_SHARED_TRAP 0x0400 - -typedef struct { - u32 flags; - u32 trap_addr; - u32 assert_exp_addr; - u32 assert_file_addr; - u32 assert_line; - u32 console_addr; /* Address of hndrte_cons_t */ - u32 msgtrace_addr; - u8 tag[32]; -} sdpcm_shared_t; - -extern sdpcm_shared_t sdpcm_shared; - -#endif /* _bcmsdpcm_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmsrom_fmt.h b/drivers/staging/brcm80211/include/bcmsrom_fmt.h deleted file mode 100644 index 4666afd883a..00000000000 --- a/drivers/staging/brcm80211/include/bcmsrom_fmt.h +++ /dev/null @@ -1,367 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmsrom_fmt_h_ -#define _bcmsrom_fmt_h_ - -/* Maximum srom: 6 Kilobits == 768 bytes */ -#define SROM_MAX 768 -#define SROM_MAXW 384 -#define VARS_MAX 4096 - -/* PCI fields */ -#define PCI_F0DEVID 48 - -#define SROM_WORDS 64 - -#define SROM3_SWRGN_OFF 28 /* s/w region offset in words */ - -#define SROM_SSID 2 - -#define SROM_WL1LHMAXP 29 - -#define SROM_WL1LPAB0 30 -#define SROM_WL1LPAB1 31 -#define SROM_WL1LPAB2 32 - -#define SROM_WL1HPAB0 33 -#define SROM_WL1HPAB1 34 -#define SROM_WL1HPAB2 35 - -#define SROM_MACHI_IL0 36 -#define SROM_MACMID_IL0 37 -#define SROM_MACLO_IL0 38 -#define SROM_MACHI_ET0 39 -#define SROM_MACMID_ET0 40 -#define SROM_MACLO_ET0 41 -#define SROM_MACHI_ET1 42 -#define SROM_MACMID_ET1 43 -#define SROM_MACLO_ET1 44 -#define SROM3_MACHI 37 -#define SROM3_MACMID 38 -#define SROM3_MACLO 39 - -#define SROM_BXARSSI2G 40 -#define SROM_BXARSSI5G 41 - -#define SROM_TRI52G 42 -#define SROM_TRI5GHL 43 - -#define SROM_RXPO52G 45 - -#define SROM2_ENETPHY 45 - -#define SROM_AABREV 46 -/* Fields in AABREV */ -#define SROM_BR_MASK 0x00ff -#define SROM_CC_MASK 0x0f00 -#define SROM_CC_SHIFT 8 -#define SROM_AA0_MASK 0x3000 -#define SROM_AA0_SHIFT 12 -#define SROM_AA1_MASK 0xc000 -#define SROM_AA1_SHIFT 14 - -#define SROM_WL0PAB0 47 -#define SROM_WL0PAB1 48 -#define SROM_WL0PAB2 49 - -#define SROM_LEDBH10 50 -#define SROM_LEDBH32 51 - -#define SROM_WL10MAXP 52 - -#define SROM_WL1PAB0 53 -#define SROM_WL1PAB1 54 -#define SROM_WL1PAB2 55 - -#define SROM_ITT 56 - -#define SROM_BFL 57 -#define SROM_BFL2 28 -#define SROM3_BFL2 61 - -#define SROM_AG10 58 - -#define SROM_CCODE 59 - -#define SROM_OPO 60 - -#define SROM3_LEDDC 62 - -#define SROM_CRCREV 63 - -/* SROM Rev 4: Reallocate the software part of the srom to accommodate - * MIMO features. It assumes up to two PCIE functions and 440 bytes - * of usable srom i.e. the usable storage in chips with OTP that - * implements hardware redundancy. - */ - -#define SROM4_WORDS 220 - -#define SROM4_SIGN 32 -#define SROM4_SIGNATURE 0x5372 - -#define SROM4_BREV 33 - -#define SROM4_BFL0 34 -#define SROM4_BFL1 35 -#define SROM4_BFL2 36 -#define SROM4_BFL3 37 -#define SROM5_BFL0 37 -#define SROM5_BFL1 38 -#define SROM5_BFL2 39 -#define SROM5_BFL3 40 - -#define SROM4_MACHI 38 -#define SROM4_MACMID 39 -#define SROM4_MACLO 40 -#define SROM5_MACHI 41 -#define SROM5_MACMID 42 -#define SROM5_MACLO 43 - -#define SROM4_CCODE 41 -#define SROM4_REGREV 42 -#define SROM5_CCODE 34 -#define SROM5_REGREV 35 - -#define SROM4_LEDBH10 43 -#define SROM4_LEDBH32 44 -#define SROM5_LEDBH10 59 -#define SROM5_LEDBH32 60 - -#define SROM4_LEDDC 45 -#define SROM5_LEDDC 45 - -#define SROM4_AA 46 -#define SROM4_AA2G_MASK 0x00ff -#define SROM4_AA2G_SHIFT 0 -#define SROM4_AA5G_MASK 0xff00 -#define SROM4_AA5G_SHIFT 8 - -#define SROM4_AG10 47 -#define SROM4_AG32 48 - -#define SROM4_TXPID2G 49 -#define SROM4_TXPID5G 51 -#define SROM4_TXPID5GL 53 -#define SROM4_TXPID5GH 55 - -#define SROM4_TXRXC 61 -#define SROM4_TXCHAIN_MASK 0x000f -#define SROM4_TXCHAIN_SHIFT 0 -#define SROM4_RXCHAIN_MASK 0x00f0 -#define SROM4_RXCHAIN_SHIFT 4 -#define SROM4_SWITCH_MASK 0xff00 -#define SROM4_SWITCH_SHIFT 8 - -/* Per-path fields */ -#define MAX_PATH_SROM 4 -#define SROM4_PATH0 64 -#define SROM4_PATH1 87 -#define SROM4_PATH2 110 -#define SROM4_PATH3 133 - -#define SROM4_2G_ITT_MAXP 0 -#define SROM4_2G_PA 1 -#define SROM4_5G_ITT_MAXP 5 -#define SROM4_5GLH_MAXP 6 -#define SROM4_5G_PA 7 -#define SROM4_5GL_PA 11 -#define SROM4_5GH_PA 15 - -/* Fields in the ITT_MAXP and 5GLH_MAXP words */ -#define B2G_MAXP_MASK 0xff -#define B2G_ITT_SHIFT 8 -#define B5G_MAXP_MASK 0xff -#define B5G_ITT_SHIFT 8 -#define B5GH_MAXP_MASK 0xff -#define B5GL_MAXP_SHIFT 8 - -/* All the miriad power offsets */ -#define SROM4_2G_CCKPO 156 -#define SROM4_2G_OFDMPO 157 -#define SROM4_5G_OFDMPO 159 -#define SROM4_5GL_OFDMPO 161 -#define SROM4_5GH_OFDMPO 163 -#define SROM4_2G_MCSPO 165 -#define SROM4_5G_MCSPO 173 -#define SROM4_5GL_MCSPO 181 -#define SROM4_5GH_MCSPO 189 -#define SROM4_CDDPO 197 -#define SROM4_STBCPO 198 -#define SROM4_BW40PO 199 -#define SROM4_BWDUPPO 200 - -#define SROM4_CRCREV 219 - -/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6. - * This is acombined srom for both MIMO and SISO boards, usable in - * the .130 4Kilobit OTP with hardware redundancy. - */ - -#define SROM8_SIGN 64 - -#define SROM8_BREV 65 - -#define SROM8_BFL0 66 -#define SROM8_BFL1 67 -#define SROM8_BFL2 68 -#define SROM8_BFL3 69 - -#define SROM8_MACHI 70 -#define SROM8_MACMID 71 -#define SROM8_MACLO 72 - -#define SROM8_CCODE 73 -#define SROM8_REGREV 74 - -#define SROM8_LEDBH10 75 -#define SROM8_LEDBH32 76 - -#define SROM8_LEDDC 77 - -#define SROM8_AA 78 - -#define SROM8_AG10 79 -#define SROM8_AG32 80 - -#define SROM8_TXRXC 81 - -#define SROM8_BXARSSI2G 82 -#define SROM8_BXARSSI5G 83 -#define SROM8_TRI52G 84 -#define SROM8_TRI5GHL 85 -#define SROM8_RXPO52G 86 - -#define SROM8_FEM2G 87 -#define SROM8_FEM5G 88 -#define SROM8_FEM_ANTSWLUT_MASK 0xf800 -#define SROM8_FEM_ANTSWLUT_SHIFT 11 -#define SROM8_FEM_TR_ISO_MASK 0x0700 -#define SROM8_FEM_TR_ISO_SHIFT 8 -#define SROM8_FEM_PDET_RANGE_MASK 0x00f8 -#define SROM8_FEM_PDET_RANGE_SHIFT 3 -#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006 -#define SROM8_FEM_EXTPA_GAIN_SHIFT 1 -#define SROM8_FEM_TSSIPOS_MASK 0x0001 -#define SROM8_FEM_TSSIPOS_SHIFT 0 - -#define SROM8_THERMAL 89 - -/* Temp sense related entries */ -#define SROM8_MPWR_RAWTS 90 -#define SROM8_TS_SLP_OPT_CORRX 91 -/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ -#define SROM8_FOC_HWIQ_IQSWP 92 - -/* Temperature delta for PHY calibration */ -#define SROM8_PHYCAL_TEMPDELTA 93 - -/* Per-path offsets & fields */ -#define SROM8_PATH0 96 -#define SROM8_PATH1 112 -#define SROM8_PATH2 128 -#define SROM8_PATH3 144 - -#define SROM8_2G_ITT_MAXP 0 -#define SROM8_2G_PA 1 -#define SROM8_5G_ITT_MAXP 4 -#define SROM8_5GLH_MAXP 5 -#define SROM8_5G_PA 6 -#define SROM8_5GL_PA 9 -#define SROM8_5GH_PA 12 - -/* All the miriad power offsets */ -#define SROM8_2G_CCKPO 160 - -#define SROM8_2G_OFDMPO 161 -#define SROM8_5G_OFDMPO 163 -#define SROM8_5GL_OFDMPO 165 -#define SROM8_5GH_OFDMPO 167 - -#define SROM8_2G_MCSPO 169 -#define SROM8_5G_MCSPO 177 -#define SROM8_5GL_MCSPO 185 -#define SROM8_5GH_MCSPO 193 - -#define SROM8_CDDPO 201 -#define SROM8_STBCPO 202 -#define SROM8_BW40PO 203 -#define SROM8_BWDUPPO 204 - -/* SISO PA parameters are in the path0 spaces */ -#define SROM8_SISO 96 - -/* Legacy names for SISO PA paramters */ -#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP) -#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA) -#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1) -#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2) -#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP) -#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP) -#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA) -#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1) -#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2) -#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA) -#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1) -#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2) -#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA) -#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1) -#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2) - -#define SROM8_CRCREV 219 - -/* SROM REV 9 */ -#define SROM9_2GPO_CCKBW20 160 -#define SROM9_2GPO_CCKBW20UL 161 -#define SROM9_2GPO_LOFDMBW20 162 -#define SROM9_2GPO_LOFDMBW20UL 164 - -#define SROM9_5GLPO_LOFDMBW20 166 -#define SROM9_5GLPO_LOFDMBW20UL 168 -#define SROM9_5GMPO_LOFDMBW20 170 -#define SROM9_5GMPO_LOFDMBW20UL 172 -#define SROM9_5GHPO_LOFDMBW20 174 -#define SROM9_5GHPO_LOFDMBW20UL 176 - -#define SROM9_2GPO_MCSBW20 178 -#define SROM9_2GPO_MCSBW20UL 180 -#define SROM9_2GPO_MCSBW40 182 - -#define SROM9_5GLPO_MCSBW20 184 -#define SROM9_5GLPO_MCSBW20UL 186 -#define SROM9_5GLPO_MCSBW40 188 -#define SROM9_5GMPO_MCSBW20 190 -#define SROM9_5GMPO_MCSBW20UL 192 -#define SROM9_5GMPO_MCSBW40 194 -#define SROM9_5GHPO_MCSBW20 196 -#define SROM9_5GHPO_MCSBW20UL 198 -#define SROM9_5GHPO_MCSBW40 200 - -#define SROM9_PO_MCS32 202 -#define SROM9_PO_LOFDM40DUP 203 - -#define SROM9_REV_CRC 219 - -typedef struct { - u8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */ - u8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */ - u8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */ - u8 triso; /* TR switch isolation */ - u8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */ -} srom_fem_t; - -#endif /* _bcmsrom_fmt_h_ */ diff --git a/drivers/staging/brcm80211/include/bcmutils.h b/drivers/staging/brcm80211/include/bcmutils.h deleted file mode 100644 index 17683f2f785..00000000000 --- a/drivers/staging/brcm80211/include/bcmutils.h +++ /dev/null @@ -1,500 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _bcmutils_h_ -#define _bcmutils_h_ - -/* Buffer structure for collecting string-formatted data -* using bcm_bprintf() API. -* Use bcm_binit() to initialize before use -*/ - - struct bcmstrbuf { - char *buf; /* pointer to current position in origbuf */ - unsigned int size; /* current (residual) size in bytes */ - char *origbuf; /* unmodified pointer to orignal buffer */ - unsigned int origsize; /* unmodified orignal buffer size in bytes */ - }; - -/* ** driver-only section ** */ - -#define GPIO_PIN_NOTDEFINED 0x20 /* Pin not defined */ - -/* - * Spin at most 'us' microseconds while 'exp' is true. - * Caller should explicitly test 'exp' when this completes - * and take appropriate error action if 'exp' is still true. - */ -#define SPINWAIT(exp, us) { \ - uint countdown = (us) + 9; \ - while ((exp) && (countdown >= 10)) {\ - udelay(10); \ - countdown -= 10; \ - } \ -} - -/* osl multi-precedence packet queue */ -#ifndef PKTQ_LEN_DEFAULT -#define PKTQ_LEN_DEFAULT 128 /* Max 128 packets */ -#endif -#ifndef PKTQ_MAX_PREC -#define PKTQ_MAX_PREC 16 /* Maximum precedence levels */ -#endif - - struct pktq_prec { - struct sk_buff *head; /* first packet to dequeue */ - struct sk_buff *tail; /* last packet to dequeue */ - u16 len; /* number of queued packets */ - u16 max; /* maximum number of queued packets */ - }; - -/* multi-priority pkt queue */ - struct pktq { - u16 num_prec; /* number of precedences in use */ - u16 hi_prec; /* rapid dequeue hint (>= highest non-empty prec) */ - u16 max; /* total max packets */ - u16 len; /* total number of packets */ - /* q array must be last since # of elements can be either PKTQ_MAX_PREC or 1 */ - struct pktq_prec q[PKTQ_MAX_PREC]; - }; - -#define PKTQ_PREC_ITER(pq, prec) for (prec = (pq)->num_prec - 1; prec >= 0; prec--) - -/* fn(pkt, arg). return true if pkt belongs to if */ -typedef bool(*ifpkt_cb_t) (struct sk_buff *, void *); - -/* operations on a specific precedence in packet queue */ - -#define pktq_psetmax(pq, prec, _max) ((pq)->q[prec].max = (_max)) -#define pktq_plen(pq, prec) ((pq)->q[prec].len) -#define pktq_pavail(pq, prec) ((pq)->q[prec].max - (pq)->q[prec].len) -#define pktq_pfull(pq, prec) ((pq)->q[prec].len >= (pq)->q[prec].max) -#define pktq_pempty(pq, prec) ((pq)->q[prec].len == 0) - -#define pktq_ppeek(pq, prec) ((pq)->q[prec].head) -#define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail) - -extern struct sk_buff *bcm_pktq_penq(struct pktq *pq, int prec, - struct sk_buff *p); -extern struct sk_buff *bcm_pktq_penq_head(struct pktq *pq, int prec, - struct sk_buff *p); -extern struct sk_buff *bcm_pktq_pdeq(struct pktq *pq, int prec); -extern struct sk_buff *bcm_pktq_pdeq_tail(struct pktq *pq, int prec); - -/* packet primitives */ -extern struct sk_buff *bcm_pkt_buf_get_skb(uint len); -extern void bcm_pkt_buf_free_skb(struct sk_buff *skb); - -/* Empty the queue at particular precedence level */ -extern void bcm_pktq_pflush(struct pktq *pq, int prec, - bool dir, ifpkt_cb_t fn, void *arg); - -/* operations on a set of precedences in packet queue */ - -extern int bcm_pktq_mlen(struct pktq *pq, uint prec_bmp); -extern struct sk_buff *bcm_pktq_mdeq(struct pktq *pq, uint prec_bmp, - int *prec_out); - -/* operations on packet queue as a whole */ - -#define pktq_len(pq) ((int)(pq)->len) -#define pktq_max(pq) ((int)(pq)->max) -#define pktq_avail(pq) ((int)((pq)->max - (pq)->len)) -#define pktq_full(pq) ((pq)->len >= (pq)->max) -#define pktq_empty(pq) ((pq)->len == 0) - -/* operations for single precedence queues */ -#define pktenq(pq, p) bcm_pktq_penq(((struct pktq *)pq), 0, (p)) -#define pktenq_head(pq, p) bcm_pktq_penq_head(((struct pktq *)pq), 0, (p)) -#define pktdeq(pq) bcm_pktq_pdeq(((struct pktq *)pq), 0) -#define pktdeq_tail(pq) bcm_pktq_pdeq_tail(((struct pktq *)pq), 0) -#define pktqinit(pq, len) bcm_pktq_init(((struct pktq *)pq), 1, len) - -extern void bcm_pktq_init(struct pktq *pq, int num_prec, int max_len); -/* prec_out may be NULL if caller is not interested in return value */ -extern struct sk_buff *bcm_pktq_peek_tail(struct pktq *pq, int *prec_out); -extern void bcm_pktq_flush(struct pktq *pq, bool dir, - ifpkt_cb_t fn, void *arg); - -/* externs */ -/* packet */ -extern uint bcm_pktfrombuf(struct sk_buff *p, - uint offset, int len, unsigned char *buf); -extern uint bcm_pkttotlen(struct sk_buff *p); - -/* ethernet address */ -extern int bcm_ether_atoe(char *p, u8 *ea); - -/* ip address */ - struct ipv4_addr; - extern char *bcm_ip_ntoa(struct ipv4_addr *ia, char *buf); - -#ifdef BCMDBG -extern void bcm_prpkt(const char *msg, struct sk_buff *p0); -#else -#define bcm_prpkt(a, b) -#endif /* BCMDBG */ - -#define bcm_perf_enable() -#define bcmlog(fmt, a1, a2) -#define bcmdumplog(buf, size) (*buf = '\0') -#define bcmdumplogent(buf, idx) -1 - -#define bcmtslog(tstamp, fmt, a1, a2) -#define bcmprinttslogs() -#define bcmprinttstamp(us) - -/* Support for sharing code across in-driver iovar implementations. - * The intent is that a driver use this structure to map iovar names - * to its (private) iovar identifiers, and the lookup function to - * find the entry. Macros are provided to map ids and get/set actions - * into a single number space for a switch statement. - */ - -/* iovar structure */ - typedef struct bcm_iovar { - const char *name; /* name for lookup and display */ - u16 varid; /* id for switch */ - u16 flags; /* driver-specific flag bits */ - u16 type; /* base type of argument */ - u16 minlen; /* min length for buffer vars */ - } bcm_iovar_t; - -/* varid definitions are per-driver, may use these get/set bits */ - -/* IOVar action bits for id mapping */ -#define IOV_GET 0 /* Get an iovar */ -#define IOV_SET 1 /* Set an iovar */ - -/* Varid to actionid mapping */ -#define IOV_GVAL(id) ((id)*2) -#define IOV_SVAL(id) (((id)*2)+IOV_SET) -#define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET) -#define IOV_ID(actionid) (actionid >> 1) - -/* flags are per-driver based on driver attributes */ - - extern const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, - const char *name); - extern int bcm_iovar_lencheck(const bcm_iovar_t *table, void *arg, - int len, bool set); - -/* Base type definitions */ -#define IOVT_VOID 0 /* no value (implictly set only) */ -#define IOVT_BOOL 1 /* any value ok (zero/nonzero) */ -#define IOVT_INT8 2 /* integer values are range-checked */ -#define IOVT_UINT8 3 /* unsigned int 8 bits */ -#define IOVT_INT16 4 /* int 16 bits */ -#define IOVT_UINT16 5 /* unsigned int 16 bits */ -#define IOVT_INT32 6 /* int 32 bits */ -#define IOVT_UINT32 7 /* unsigned int 32 bits */ -#define IOVT_BUFFER 8 /* buffer is size-checked as per minlen */ -#define BCM_IOVT_VALID(type) (((unsigned int)(type)) <= IOVT_BUFFER) - -/* Initializer for IOV type strings */ -#define BCM_IOV_TYPE_INIT { \ - "void", \ - "bool", \ - "s8", \ - "u8", \ - "s16", \ - "u16", \ - "s32", \ - "u32", \ - "buffer", \ - "" } - -#define BCM_IOVT_IS_INT(type) (\ - (type == IOVT_BOOL) || \ - (type == IOVT_INT8) || \ - (type == IOVT_UINT8) || \ - (type == IOVT_INT16) || \ - (type == IOVT_UINT16) || \ - (type == IOVT_INT32) || \ - (type == IOVT_UINT32)) - -/* ** driver/apps-shared section ** */ - -#define BCME_STRLEN 64 /* Max string length for BCM errors */ - -#ifndef ABS -#define ABS(a) (((a) < 0) ? -(a) : (a)) -#endif /* ABS */ - -#define CEIL(x, y) (((x) + ((y)-1)) / (y)) -#define ISPOWEROF2(x) ((((x)-1)&(x)) == 0) - -/* map physical to virtual I/O */ -#if !defined(CONFIG_MMC_MSM7X00A) -#define REG_MAP(pa, size) ioremap_nocache((unsigned long)(pa), \ - (unsigned long)(size)) -#else -#define REG_MAP(pa, size) (void *)(0) -#endif - -/* register access macros */ -#if defined(BCMSDIO) -#ifdef BRCM_FULLMAC -#include <bcmsdh.h> -#endif -#define OSL_WRITE_REG(r, v) \ - (bcmsdh_reg_write(NULL, (unsigned long)(r), sizeof(*(r)), (v))) -#define OSL_READ_REG(r) \ - (bcmsdh_reg_read(NULL, (unsigned long)(r), sizeof(*(r)))) -#endif - -#if defined(BCMSDIO) -#define SELECT_BUS_WRITE(mmap_op, bus_op) bus_op -#define SELECT_BUS_READ(mmap_op, bus_op) bus_op -#else -#define SELECT_BUS_WRITE(mmap_op, bus_op) mmap_op -#define SELECT_BUS_READ(mmap_op, bus_op) mmap_op -#endif - -/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */ -#define PKTBUFSZ 2048 - -#define OSL_SYSUPTIME() ((u32)jiffies * (1000 / HZ)) -#ifdef BRCM_FULLMAC -#include <linux/kernel.h> /* for vsn/printf's */ -#include <linux/string.h> /* for mem*, str* */ -#endif -/* bcopy's: Linux kernel doesn't provide these (anymore) */ -#define bcopy(src, dst, len) memcpy((dst), (src), (len)) - -/* register access macros */ -#ifndef __BIG_ENDIAN -#ifndef __mips__ -#define R_REG(r) (\ - SELECT_BUS_READ(sizeof(*(r)) == sizeof(u8) ? \ - readb((volatile u8*)(r)) : \ - sizeof(*(r)) == sizeof(u16) ? readw((volatile u16*)(r)) : \ - readl((volatile u32*)(r)), OSL_READ_REG(r)) \ -) -#else /* __mips__ */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = readb((volatile u8*)(r)); \ - break; \ - case sizeof(u16): \ - __osl_v = readw((volatile u16*)(r)); \ - break; \ - case sizeof(u32): \ - __osl_v = \ - readl((volatile u32*)(r)); \ - break; \ - } \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - }), \ - ({ \ - __typeof(*(r)) __osl_v; \ - __asm__ __volatile__("sync"); \ - __osl_v = OSL_READ_REG(r); \ - __asm__ __volatile__("sync"); \ - __osl_v; \ - })) \ -) -#endif /* __mips__ */ - -#define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), (volatile u8*)(r)); break; \ - case sizeof(u16): \ - writew((u16)(v), (volatile u16*)(r)); break; \ - case sizeof(u32): \ - writel((u32)(v), (volatile u32*)(r)); break; \ - }, \ - (OSL_WRITE_REG(r, v))); \ - } while (0) -#else /* __BIG_ENDIAN */ -#define R_REG(r) (\ - SELECT_BUS_READ( \ - ({ \ - __typeof(*(r)) __osl_v; \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - __osl_v = \ - readb((volatile u8*)((r)^3)); \ - break; \ - case sizeof(u16): \ - __osl_v = \ - readw((volatile u16*)((r)^2)); \ - break; \ - case sizeof(u32): \ - __osl_v = readl((volatile u32*)(r)); \ - break; \ - } \ - __osl_v; \ - }), \ - OSL_READ_REG(r)) \ -) -#define W_REG(r, v) do { \ - SELECT_BUS_WRITE( \ - switch (sizeof(*(r))) { \ - case sizeof(u8): \ - writeb((u8)(v), \ - (volatile u8*)((r)^3)); break; \ - case sizeof(u16): \ - writew((u16)(v), \ - (volatile u16*)((r)^2)); break; \ - case sizeof(u32): \ - writel((u32)(v), \ - (volatile u32*)(r)); break; \ - }, \ - (OSL_WRITE_REG(r, v))); \ - } while (0) -#endif /* __BIG_ENDIAN */ - -#define AND_REG(r, v) W_REG((r), R_REG(r) & (v)) -#define OR_REG(r, v) W_REG((r), R_REG(r) | (v)) - -#define SET_REG(r, mask, val) \ - W_REG((r), ((R_REG(r) & ~(mask)) | (val))) - -#ifndef setbit -#ifndef NBBY /* the BSD family defines NBBY */ -#define NBBY 8 /* 8 bits per byte */ -#endif /* #ifndef NBBY */ -#define setbit(a, i) (((u8 *)a)[(i)/NBBY] |= 1<<((i)%NBBY)) -#define clrbit(a, i) (((u8 *)a)[(i)/NBBY] &= ~(1<<((i)%NBBY))) -#define isset(a, i) (((const u8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) -#define isclr(a, i) ((((const u8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) == 0) -#endif /* setbit */ - -#define NBITS(type) (sizeof(type) * 8) -#define NBITVAL(nbits) (1 << (nbits)) -#define MAXBITVAL(nbits) ((1 << (nbits)) - 1) -#define NBITMASK(nbits) MAXBITVAL(nbits) -#define MAXNBVAL(nbyte) MAXBITVAL((nbyte) * 8) - -/* basic mux operation - can be optimized on several architectures */ -#define MUX(pred, true, false) ((pred) ? (true) : (false)) - -/* modulo inc/dec - assumes x E [0, bound - 1] */ -#define MODDEC(x, bound) MUX((x) == 0, (bound) - 1, (x) - 1) -#define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1) - -/* modulo inc/dec, bound = 2^k */ -#define MODDEC_POW2(x, bound) (((x) - 1) & ((bound) - 1)) -#define MODINC_POW2(x, bound) (((x) + 1) & ((bound) - 1)) - -/* modulo add/sub - assumes x, y E [0, bound - 1] */ -#define MODADD(x, y, bound) \ - MUX((x) + (y) >= (bound), (x) + (y) - (bound), (x) + (y)) -#define MODSUB(x, y, bound) \ - MUX(((int)(x)) - ((int)(y)) < 0, (x) - (y) + (bound), (x) - (y)) - -/* module add/sub, bound = 2^k */ -#define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1)) -#define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1)) - -/* crc defines */ -#define CRC8_INIT_VALUE 0xff /* Initial CRC8 checksum value */ -#define CRC8_GOOD_VALUE 0x9f /* Good final CRC8 checksum value */ -#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */ -#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */ - -/* bcm_format_flags() bit description structure */ - typedef struct bcm_bit_desc { - u32 bit; - const char *name; - } bcm_bit_desc_t; - -/* tag_ID/length/value_buffer tuple */ - typedef struct bcm_tlv { - u8 id; - u8 len; - u8 data[1]; - } bcm_tlv_t; - -/* Check that bcm_tlv_t fits into the given buflen */ -#define bcm_valid_tlv(elt, buflen) ((buflen) >= 2 && (int)(buflen) >= (int)(2 + (elt)->len)) - -#define ETHER_ADDR_STR_LEN 18 /* 18-bytes of Ethernet address buffer length */ - -/* crypto utility function */ -/* 128-bit xor: *dst = *src1 xor *src2. dst1, src1 and src2 may have any alignment */ - static inline void - xor_128bit_block(const u8 *src1, const u8 *src2, u8 *dst) { - if ( -#ifdef __i386__ - 1 || -#endif - (((unsigned long) src1 | (unsigned long) src2 | (unsigned long) dst) & - 3) == 0) { - /* ARM CM3 rel time: 1229 (727 if alignment check could be omitted) */ - /* x86 supports unaligned. This version runs 6x-9x faster on x86. */ - ((u32 *) dst)[0] = - ((const u32 *)src1)[0] ^ ((const u32 *) - src2)[0]; - ((u32 *) dst)[1] = - ((const u32 *)src1)[1] ^ ((const u32 *) - src2)[1]; - ((u32 *) dst)[2] = - ((const u32 *)src1)[2] ^ ((const u32 *) - src2)[2]; - ((u32 *) dst)[3] = - ((const u32 *)src1)[3] ^ ((const u32 *) - src2)[3]; - } else { - /* ARM CM3 rel time: 4668 (4191 if alignment check could be omitted) */ - int k; - for (k = 0; k < 16; k++) - dst[k] = src1[k] ^ src2[k]; - } - } - -/* externs */ -/* crc */ -extern u8 bcm_crc8(u8 *p, uint nbytes, u8 crc); -/* format/print */ -#if defined(BCMDBG) - extern int bcm_format_flags(const bcm_bit_desc_t *bd, u32 flags, - char *buf, int len); - extern int bcm_format_hex(char *str, const void *bytes, int len); -#endif - extern char *bcm_chipname(uint chipid, char *buf, uint len); - - extern bcm_tlv_t *bcm_parse_tlvs(void *buf, int buflen, - uint key); - -/* multi-bool data type: set of bools, mbool is true if any is set */ - typedef u32 mbool; -#define mboolset(mb, bit) ((mb) |= (bit)) /* set one bool */ -#define mboolclr(mb, bit) ((mb) &= ~(bit)) /* clear one bool */ -#define mboolisset(mb, bit) (((mb) & (bit)) != 0) /* true if one bool is set */ -#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val))) - -/* power conversion */ - extern u16 bcm_qdbm_to_mw(u8 qdbm); - extern u8 bcm_mw_to_qdbm(u16 mw); - - extern void bcm_binit(struct bcmstrbuf *b, char *buf, uint size); - extern int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...); - - extern uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, - uint len); - extern uint bcm_bitcount(u8 *bitmap, uint bytelength); - -#endif /* _bcmutils_h_ */ diff --git a/drivers/staging/brcm80211/include/brcm_hw_ids.h b/drivers/staging/brcm80211/include/brcm_hw_ids.h new file mode 100644 index 00000000000..5fb17d53c9b --- /dev/null +++ b/drivers/staging/brcm80211/include/brcm_hw_ids.h @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_HW_IDS_H_ +#define _BRCM_HW_IDS_H_ + +#define BCM4325_D11DUAL_ID 0x431b +#define BCM4325_D11G_ID 0x431c +#define BCM4325_D11A_ID 0x431d + +#define BCM4329_D11N2G_ID 0x432f /* 4329 802.11n 2.4G device */ +#define BCM4329_D11N5G_ID 0x4330 /* 4329 802.11n 5G device */ +#define BCM4329_D11NDUAL_ID 0x432e + +#define BCM4319_D11N_ID 0x4337 /* 4319 802.11n dualband device */ +#define BCM4319_D11N2G_ID 0x4338 /* 4319 802.11n 2.4G device */ +#define BCM4319_D11N5G_ID 0x4339 /* 4319 802.11n 5G device */ + +#define BCM43224_D11N_ID 0x4353 /* 43224 802.11n dualband device */ +#define BCM43224_D11N_ID_VEN1 0x0576 /* Vendor specific 43224 802.11n db */ + +#define BCM43225_D11N2G_ID 0x4357 /* 43225 802.11n 2.4GHz device */ + +#define BCM43236_D11N_ID 0x4346 /* 43236 802.11n dualband device */ +#define BCM43236_D11N2G_ID 0x4347 /* 43236 802.11n 2.4GHz device */ + +#define BCM4313_D11N2G_ID 0x4727 /* 4313 802.11n 2.4G device */ + +/* Chip IDs */ +#define BCM4313_CHIP_ID 0x4313 /* 4313 chip id */ +#define BCM4319_CHIP_ID 0x4319 /* 4319 chip id */ + +#define BCM43224_CHIP_ID 43224 /* 43224 chipcommon chipid */ +#define BCM43225_CHIP_ID 43225 /* 43225 chipcommon chipid */ +#define BCM43421_CHIP_ID 43421 /* 43421 chipcommon chipid */ +#define BCM43235_CHIP_ID 43235 /* 43235 chipcommon chipid */ +#define BCM43236_CHIP_ID 43236 /* 43236 chipcommon chipid */ +#define BCM43238_CHIP_ID 43238 /* 43238 chipcommon chipid */ +#define BCM4329_CHIP_ID 0x4329 /* 4329 chipcommon chipid */ +#define BCM4325_CHIP_ID 0x4325 /* 4325 chipcommon chipid */ +#define BCM4331_CHIP_ID 0x4331 /* 4331 chipcommon chipid */ +#define BCM4336_CHIP_ID 0x4336 /* 4336 chipcommon chipid */ +#define BCM4330_CHIP_ID 0x4330 /* 4330 chipcommon chipid */ +#define BCM6362_CHIP_ID 0x6362 /* 6362 chipcommon chipid */ + +#endif /* _BRCM_HW_IDS_H_ */ diff --git a/drivers/staging/brcm80211/include/brcmu_utils.h b/drivers/staging/brcm80211/include/brcmu_utils.h new file mode 100644 index 00000000000..2d54cc5f4b1 --- /dev/null +++ b/drivers/staging/brcm80211/include/brcmu_utils.h @@ -0,0 +1,301 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCMU_UTILS_H_ +#define _BRCMU_UTILS_H_ + +#include <linux/skbuff.h> + +/* Buffer structure for collecting string-formatted data +* using brcmu_bprintf() API. +* Use brcmu_binit() to initialize before use +*/ + +struct brcmu_strbuf { + char *buf; /* pointer to current position in origbuf */ + unsigned int size; /* current (residual) size in bytes */ + char *origbuf; /* unmodified pointer to orignal buffer */ + unsigned int origsize; /* unmodified orignal buffer size in bytes */ +}; + +/* + * Spin at most 'us' microseconds while 'exp' is true. + * Caller should explicitly test 'exp' when this completes + * and take appropriate error action if 'exp' is still true. + */ +#define SPINWAIT(exp, us) { \ + uint countdown = (us) + 9; \ + while ((exp) && (countdown >= 10)) {\ + udelay(10); \ + countdown -= 10; \ + } \ +} + +/* osl multi-precedence packet queue */ +#ifndef PKTQ_LEN_DEFAULT +#define PKTQ_LEN_DEFAULT 128 /* Max 128 packets */ +#endif +#ifndef PKTQ_MAX_PREC +#define PKTQ_MAX_PREC 16 /* Maximum precedence levels */ +#endif + +struct pktq_prec { + struct sk_buff *head; /* first packet to dequeue */ + struct sk_buff *tail; /* last packet to dequeue */ + u16 len; /* number of queued packets */ + u16 max; /* maximum number of queued packets */ +}; + +/* multi-priority pkt queue */ +struct pktq { + u16 num_prec; /* number of precedences in use */ + u16 hi_prec; /* rapid dequeue hint (>= highest non-empty prec) */ + u16 max; /* total max packets */ + u16 len; /* total number of packets */ + /* + * q array must be last since # of elements can be either + * PKTQ_MAX_PREC or 1 + */ + struct pktq_prec q[PKTQ_MAX_PREC]; +}; + +/* fn(pkt, arg). return true if pkt belongs to if */ +typedef bool(*ifpkt_cb_t) (struct sk_buff *, void *); + +/* operations on a specific precedence in packet queue */ + +#define pktq_psetmax(pq, prec, _max) ((pq)->q[prec].max = (_max)) +#define pktq_plen(pq, prec) ((pq)->q[prec].len) +#define pktq_pavail(pq, prec) ((pq)->q[prec].max - (pq)->q[prec].len) +#define pktq_pfull(pq, prec) ((pq)->q[prec].len >= (pq)->q[prec].max) +#define pktq_pempty(pq, prec) ((pq)->q[prec].len == 0) + +#define pktq_ppeek(pq, prec) ((pq)->q[prec].head) +#define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail) + +extern struct sk_buff *brcmu_pktq_penq(struct pktq *pq, int prec, + struct sk_buff *p); +extern struct sk_buff *brcmu_pktq_penq_head(struct pktq *pq, int prec, + struct sk_buff *p); +extern struct sk_buff *brcmu_pktq_pdeq(struct pktq *pq, int prec); +extern struct sk_buff *brcmu_pktq_pdeq_tail(struct pktq *pq, int prec); + +/* packet primitives */ +extern struct sk_buff *brcmu_pkt_buf_get_skb(uint len); +extern void brcmu_pkt_buf_free_skb(struct sk_buff *skb); + +/* Empty the queue at particular precedence level */ +extern void brcmu_pktq_pflush(struct pktq *pq, int prec, + bool dir, ifpkt_cb_t fn, void *arg); + +/* operations on a set of precedences in packet queue */ + +extern int brcmu_pktq_mlen(struct pktq *pq, uint prec_bmp); +extern struct sk_buff *brcmu_pktq_mdeq(struct pktq *pq, uint prec_bmp, + int *prec_out); + +/* operations on packet queue as a whole */ + +#define pktq_len(pq) ((int)(pq)->len) +#define pktq_max(pq) ((int)(pq)->max) +#define pktq_avail(pq) ((int)((pq)->max - (pq)->len)) +#define pktq_full(pq) ((pq)->len >= (pq)->max) +#define pktq_empty(pq) ((pq)->len == 0) + +/* operations for single precedence queues */ +#define pktenq(pq, p) brcmu_pktq_penq(((struct pktq *)pq), 0, (p)) +#define pktenq_head(pq, p)\ + brcmu_pktq_penq_head(((struct pktq *)pq), 0, (p)) +#define pktdeq(pq) brcmu_pktq_pdeq(((struct pktq *)pq), 0) +#define pktdeq_tail(pq) brcmu_pktq_pdeq_tail(((struct pktq *)pq), 0) +#define pktqinit(pq, len) brcmu_pktq_init(((struct pktq *)pq), 1, len) + +extern void brcmu_pktq_init(struct pktq *pq, int num_prec, int max_len); +/* prec_out may be NULL if caller is not interested in return value */ +extern struct sk_buff *brcmu_pktq_peek_tail(struct pktq *pq, int *prec_out); +extern void brcmu_pktq_flush(struct pktq *pq, bool dir, + ifpkt_cb_t fn, void *arg); + +/* externs */ +/* packet */ +extern uint brcmu_pktfrombuf(struct sk_buff *p, + uint offset, int len, unsigned char *buf); +extern uint brcmu_pkttotlen(struct sk_buff *p); + +/* ethernet address */ +extern int brcmu_ether_atoe(char *p, u8 *ea); + +/* ip address */ +struct ipv4_addr; + +#ifdef BCMDBG +extern void brcmu_prpkt(const char *msg, struct sk_buff *p0); +#else +#define brcmu_prpkt(a, b) +#endif /* BCMDBG */ + +/* Support for sharing code across in-driver iovar implementations. + * The intent is that a driver use this structure to map iovar names + * to its (private) iovar identifiers, and the lookup function to + * find the entry. Macros are provided to map ids and get/set actions + * into a single number space for a switch statement. + */ + +/* iovar structure */ +struct brcmu_iovar { + const char *name; /* name for lookup and display */ + u16 varid; /* id for switch */ + u16 flags; /* driver-specific flag bits */ + u16 type; /* base type of argument */ + u16 minlen; /* min length for buffer vars */ +}; + +/* varid definitions are per-driver, may use these get/set bits */ + +/* IOVar action bits for id mapping */ +#define IOV_GET 0 /* Get an iovar */ +#define IOV_SET 1 /* Set an iovar */ + +/* Varid to actionid mapping */ +#define IOV_GVAL(id) ((id)*2) +#define IOV_SVAL(id) (((id)*2)+IOV_SET) +#define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET) +#define IOV_ID(actionid) (actionid >> 1) + +extern const struct +brcmu_iovar *brcmu_iovar_lookup(const struct brcmu_iovar *table, + const char *name); +extern int brcmu_iovar_lencheck(const struct brcmu_iovar *table, void *arg, + int len, bool set); + +/* Base type definitions */ +#define IOVT_VOID 0 /* no value (implictly set only) */ +#define IOVT_BOOL 1 /* any value ok (zero/nonzero) */ +#define IOVT_INT8 2 /* integer values are range-checked */ +#define IOVT_UINT8 3 /* unsigned int 8 bits */ +#define IOVT_INT16 4 /* int 16 bits */ +#define IOVT_UINT16 5 /* unsigned int 16 bits */ +#define IOVT_INT32 6 /* int 32 bits */ +#define IOVT_UINT32 7 /* unsigned int 32 bits */ +#define IOVT_BUFFER 8 /* buffer is size-checked as per minlen */ +#define BCM_IOVT_VALID(type) (((unsigned int)(type)) <= IOVT_BUFFER) + +/* ** driver/apps-shared section ** */ + +#define BCME_STRLEN 64 /* Max string length for BCM errors */ + +#ifndef ABS +#define ABS(a) (((a) < 0) ? -(a) : (a)) +#endif /* ABS */ + +#define CEIL(x, y) (((x) + ((y)-1)) / (y)) +#define ISPOWEROF2(x) ((((x)-1)&(x)) == 0) + +/* map physical to virtual I/O */ +#define REG_MAP(pa, size) ioremap_nocache((unsigned long)(pa), \ + (unsigned long)(size)) + +/* the largest reasonable packet buffer driver uses for ethernet MTU in bytes */ +#define PKTBUFSZ 2048 + +#define OSL_SYSUPTIME() ((u32)jiffies * (1000 / HZ)) + +#ifndef setbit +#ifndef NBBY /* the BSD family defines NBBY */ +#define NBBY 8 /* 8 bits per byte */ +#endif /* #ifndef NBBY */ +#define setbit(a, i) (((u8 *)a)[(i)/NBBY] |= 1<<((i)%NBBY)) +#define clrbit(a, i) (((u8 *)a)[(i)/NBBY] &= ~(1<<((i)%NBBY))) +#define isset(a, i) (((const u8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) +#define isclr(a, i) ((((const u8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) == 0) +#endif /* setbit */ + +#define NBITS(type) (sizeof(type) * 8) +#define NBITVAL(nbits) (1 << (nbits)) +#define MAXBITVAL(nbits) ((1 << (nbits)) - 1) +#define NBITMASK(nbits) MAXBITVAL(nbits) +#define MAXNBVAL(nbyte) MAXBITVAL((nbyte) * 8) + +/* basic mux operation - can be optimized on several architectures */ +#define MUX(pred, true, false) ((pred) ? (true) : (false)) + +/* modulo inc/dec - assumes x E [0, bound - 1] */ +#define MODDEC(x, bound) MUX((x) == 0, (bound) - 1, (x) - 1) +#define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1) + +/* modulo inc/dec, bound = 2^k */ +#define MODDEC_POW2(x, bound) (((x) - 1) & ((bound) - 1)) +#define MODINC_POW2(x, bound) (((x) + 1) & ((bound) - 1)) + +/* modulo add/sub - assumes x, y E [0, bound - 1] */ +#define MODADD(x, y, bound) \ + MUX((x) + (y) >= (bound), (x) + (y) - (bound), (x) + (y)) +#define MODSUB(x, y, bound) \ + MUX(((int)(x)) - ((int)(y)) < 0, (x) - (y) + (bound), (x) - (y)) + +/* module add/sub, bound = 2^k */ +#define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1)) +#define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1)) + +/* crc defines */ +#define CRC8_INIT_VALUE 0xff /* Initial CRC8 checksum value */ +#define CRC8_GOOD_VALUE 0x9f /* Good final CRC8 checksum value */ +#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */ +#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */ + +/* brcmu_format_flags() bit description structure */ +struct brcmu_bit_desc { + u32 bit; + const char *name; +}; + +/* tag_ID/length/value_buffer tuple */ +struct brcmu_tlv { + u8 id; + u8 len; + u8 data[1]; +}; + +#define ETHER_ADDR_STR_LEN 18 /* 18-bytes of Ethernet address buffer length */ + +/* externs */ +/* crc */ +extern u8 brcmu_crc8(u8 *p, uint nbytes, u8 crc); + +/* format/print */ +#if defined(BCMDBG) +extern int brcmu_format_flags(const struct brcmu_bit_desc *bd, u32 flags, + char *buf, int len); +extern int brcmu_format_hex(char *str, const void *bytes, int len); +#endif + +extern char *brcmu_chipname(uint chipid, char *buf, uint len); + +extern struct brcmu_tlv *brcmu_parse_tlvs(void *buf, int buflen, + uint key); + +/* power conversion */ +extern u16 brcmu_qdbm_to_mw(u8 qdbm); +extern u8 brcmu_mw_to_qdbm(u16 mw); + +extern void brcmu_binit(struct brcmu_strbuf *b, char *buf, uint size); +extern int brcmu_bprintf(struct brcmu_strbuf *b, const char *fmt, ...); + +extern uint brcmu_mkiovar(char *name, char *data, uint datalen, + char *buf, uint len); +extern uint brcmu_bitcount(u8 *bitmap, uint bytelength); + +#endif /* _BRCMU_UTILS_H_ */ diff --git a/drivers/staging/brcm80211/include/bcmwifi.h b/drivers/staging/brcm80211/include/brcmu_wifi.h index a573ebff768..fde592bd917 100644 --- a/drivers/staging/brcm80211/include/bcmwifi.h +++ b/drivers/staging/brcm80211/include/brcmu_wifi.h @@ -14,8 +14,11 @@ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ -#ifndef _bcmwifi_h_ -#define _bcmwifi_h_ +#ifndef _BRCMU_WIFI_H_ +#define _BRCMU_WIFI_H_ + +#include <linux/if_ether.h> /* for ETH_ALEN */ +#include <linux/ieee80211.h> /* for WLAN_PMKID_LEN */ /* A chanspec holds the channel number, band, bandwidth and control sideband */ typedef u16 chanspec_t; @@ -28,7 +31,7 @@ typedef u16 chanspec_t; #define CH_10MHZ_APART 2 #define CH_5MHZ_APART 1 /* 2G band channels are 5 Mhz apart */ #define CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ -#define WLC_MAX_2G_CHANNEL CH_MAX_2G_CHANNEL /* legacy define */ +#define BRCM_MAX_2G_CHANNEL CH_MAX_2G_CHANNEL /* legacy define */ #define MAXCHANNEL 224 /* max # supported channels. The max channel no is 216, * this is that + 1 rounded up to a multiple of NBBY (8). * DO NOT MAKE it > 255: channels are u8's all over @@ -64,7 +67,8 @@ typedef u16 chanspec_t; #define LOWER_20_SB(channel) (((channel) > CH_10MHZ_APART) ? ((channel) - CH_10MHZ_APART) : 0) #define UPPER_20_SB(channel) (((channel) < (MAXCHANNEL - CH_10MHZ_APART)) ? \ ((channel) + CH_10MHZ_APART) : 0) -#define CHSPEC_WLCBANDUNIT(chspec) (CHSPEC_IS5G(chspec) ? BAND_5G_INDEX : BAND_2G_INDEX) +#define CHSPEC_BANDUNIT(chspec) (CHSPEC_IS5G(chspec) ? BAND_5G_INDEX : \ + BAND_2G_INDEX) #define CH20MHZ_CHSPEC(channel) (chanspec_t)((chanspec_t)(channel) | WL_CHANSPEC_BW_20 | \ WL_CHANSPEC_CTL_SB_NONE | (((channel) <= CH_MAX_2G_CHANNEL) ? \ WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G)) @@ -107,26 +111,30 @@ typedef u16 chanspec_t; #define CHSPEC_CTL_CHAN(chspec) ((CHSPEC_SB_LOWER(chspec)) ? \ (LOWER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK))) : \ (UPPER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK)))) -#define CHSPEC2WLC_BAND(chspec) (CHSPEC_IS5G(chspec) ? WLC_BAND_5G : WLC_BAND_2G) +#define CHSPEC2BAND(chspec) (CHSPEC_IS5G(chspec) ? BRCM_BAND_5G : BRCM_BAND_2G) #define CHANSPEC_STR_LEN 8 /* defined rate in 500kbps */ -#define WLC_MAXRATE 108 /* in 500kbps units */ -#define WLC_RATE_1M 2 /* in 500kbps units */ -#define WLC_RATE_2M 4 /* in 500kbps units */ -#define WLC_RATE_5M5 11 /* in 500kbps units */ -#define WLC_RATE_11M 22 /* in 500kbps units */ -#define WLC_RATE_6M 12 /* in 500kbps units */ -#define WLC_RATE_9M 18 /* in 500kbps units */ -#define WLC_RATE_12M 24 /* in 500kbps units */ -#define WLC_RATE_18M 36 /* in 500kbps units */ -#define WLC_RATE_24M 48 /* in 500kbps units */ -#define WLC_RATE_36M 72 /* in 500kbps units */ -#define WLC_RATE_48M 96 /* in 500kbps units */ -#define WLC_RATE_54M 108 /* in 500kbps units */ - -#define WLC_2G_25MHZ_OFFSET 5 /* 2.4GHz band channel offset */ +#define BRCM_MAXRATE 108 /* in 500kbps units */ +#define BRCM_RATE_1M 2 /* in 500kbps units */ +#define BRCM_RATE_2M 4 /* in 500kbps units */ +#define BRCM_RATE_5M5 11 /* in 500kbps units */ +#define BRCM_RATE_11M 22 /* in 500kbps units */ +#define BRCM_RATE_6M 12 /* in 500kbps units */ +#define BRCM_RATE_9M 18 /* in 500kbps units */ +#define BRCM_RATE_12M 24 /* in 500kbps units */ +#define BRCM_RATE_18M 36 /* in 500kbps units */ +#define BRCM_RATE_24M 48 /* in 500kbps units */ +#define BRCM_RATE_36M 72 /* in 500kbps units */ +#define BRCM_RATE_48M 96 /* in 500kbps units */ +#define BRCM_RATE_54M 108 /* in 500kbps units */ + +#define BRCM_2G_25MHZ_OFFSET 5 /* 2.4GHz band channel offset */ + +#define MCSSET_LEN 16 + +#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) /* * Verify the chanspec is using a legal set of parameters, i.e. that the @@ -134,14 +142,14 @@ typedef u16 chanspec_t; * combination could be legal given any set of circumstances. * RETURNS: true is the chanspec is malformed, false if it looks good. */ -extern bool bcm_chspec_malformed(chanspec_t chanspec); +extern bool brcmu_chspec_malformed(chanspec_t chanspec); /* * This function returns the channel number that control traffic is being sent on, for legacy * channels this is just the channel number, for 40MHZ channels it is the upper or lowre 20MHZ * sideband depending on the chanspec selected */ -extern u8 bcm_chspec_ctlchan(chanspec_t chspec); +extern u8 brcmu_chspec_ctlchan(chanspec_t chspec); /* * Return the channel number for a given frequency and base frequency. @@ -162,6 +170,74 @@ extern u8 bcm_chspec_ctlchan(chanspec_t chspec); * * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 */ -extern int bcm_mhz2channel(uint freq, uint start_factor); - -#endif /* _bcmwifi_h_ */ +extern int brcmu_mhz2channel(uint freq, uint start_factor); + +/* Enumerate crypto algorithms */ +#define CRYPTO_ALGO_OFF 0 +#define CRYPTO_ALGO_WEP1 1 +#define CRYPTO_ALGO_TKIP 2 +#define CRYPTO_ALGO_WEP128 3 +#define CRYPTO_ALGO_AES_CCM 4 +#define CRYPTO_ALGO_AES_RESERVED1 5 +#define CRYPTO_ALGO_AES_RESERVED2 6 +#define CRYPTO_ALGO_NALG 7 + +/* wireless security bitvec */ +#define WEP_ENABLED 0x0001 +#define TKIP_ENABLED 0x0002 +#define AES_ENABLED 0x0004 +#define WSEC_SWFLAG 0x0008 +#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */ + +/* WPA authentication mode bitvec */ +#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */ +#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */ +#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */ +#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */ +#define WPA_AUTH_RESERVED1 0x0008 +#define WPA_AUTH_RESERVED2 0x0010 + /* #define WPA_AUTH_8021X 0x0020 *//* 802.1x, reserved */ +#define WPA2_AUTH_RESERVED1 0x0020 +#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */ +#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */ +#define WPA2_AUTH_RESERVED3 0x0200 +#define WPA2_AUTH_RESERVED4 0x0400 +#define WPA2_AUTH_RESERVED5 0x0800 + +/* pmkid */ +#define MAXPMKID 16 + +#define DOT11_DEFAULT_RTS_LEN 2347 +#define DOT11_DEFAULT_FRAG_LEN 2346 + +#define DOT11_ICV_AES_LEN 8 +#define DOT11_QOS_LEN 2 +#define DOT11_IV_MAX_LEN 8 +#define DOT11_A4_HDR_LEN 30 + +#define HT_CAP_RX_STBC_NO 0x0 +#define HT_CAP_RX_STBC_ONE_STREAM 0x1 + +typedef struct _pmkid { + u8 BSSID[ETH_ALEN]; + u8 PMKID[WLAN_PMKID_LEN]; +} pmkid_t; + +typedef struct _pmkid_list { + u32 npmkid; + pmkid_t pmkid[1]; +} pmkid_list_t; + +typedef struct _pmkid_cand { + u8 BSSID[ETH_ALEN]; + u8 preauth; +} pmkid_cand_t; + +typedef struct _pmkid_cand_list { + u32 npmkid_cand; + pmkid_cand_t pmkid_cand[1]; +} pmkid_cand_list_t; + +typedef u8 ac_bitmap_t; + +#endif /* _BRCMU_WIFI_H_ */ diff --git a/drivers/staging/brcm80211/include/chipcommon.h b/drivers/staging/brcm80211/include/chipcommon.h new file mode 100644 index 00000000000..296582aced6 --- /dev/null +++ b/drivers/staging/brcm80211/include/chipcommon.h @@ -0,0 +1,281 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _SBCHIPC_H +#define _SBCHIPC_H + +#include "defs.h" /* for PAD macro */ + +typedef volatile struct { + u32 chipid; /* 0x0 */ + u32 capabilities; + u32 corecontrol; /* corerev >= 1 */ + u32 bist; + + /* OTP */ + u32 otpstatus; /* 0x10, corerev >= 10 */ + u32 otpcontrol; + u32 otpprog; + u32 otplayout; /* corerev >= 23 */ + + /* Interrupt control */ + u32 intstatus; /* 0x20 */ + u32 intmask; + + /* Chip specific regs */ + u32 chipcontrol; /* 0x28, rev >= 11 */ + u32 chipstatus; /* 0x2c, rev >= 11 */ + + /* Jtag Master */ + u32 jtagcmd; /* 0x30, rev >= 10 */ + u32 jtagir; + u32 jtagdr; + u32 jtagctrl; + + /* serial flash interface registers */ + u32 flashcontrol; /* 0x40 */ + u32 flashaddress; + u32 flashdata; + u32 PAD[1]; + + /* Silicon backplane configuration broadcast control */ + u32 broadcastaddress; /* 0x50 */ + u32 broadcastdata; + + /* gpio - cleared only by power-on-reset */ + u32 gpiopullup; /* 0x58, corerev >= 20 */ + u32 gpiopulldown; /* 0x5c, corerev >= 20 */ + u32 gpioin; /* 0x60 */ + u32 gpioout; /* 0x64 */ + u32 gpioouten; /* 0x68 */ + u32 gpiocontrol; /* 0x6C */ + u32 gpiointpolarity; /* 0x70 */ + u32 gpiointmask; /* 0x74 */ + + /* GPIO events corerev >= 11 */ + u32 gpioevent; + u32 gpioeventintmask; + + /* Watchdog timer */ + u32 watchdog; /* 0x80 */ + + /* GPIO events corerev >= 11 */ + u32 gpioeventintpolarity; + + /* GPIO based LED powersave registers corerev >= 16 */ + u32 gpiotimerval; /* 0x88 */ + u32 gpiotimeroutmask; + + /* clock control */ + u32 clockcontrol_n; /* 0x90 */ + u32 clockcontrol_sb; /* aka m0 */ + u32 clockcontrol_pci; /* aka m1 */ + u32 clockcontrol_m2; /* mii/uart/mipsref */ + u32 clockcontrol_m3; /* cpu */ + u32 clkdiv; /* corerev >= 3 */ + u32 gpiodebugsel; /* corerev >= 28 */ + u32 capabilities_ext; /* 0xac */ + + /* pll delay registers (corerev >= 4) */ + u32 pll_on_delay; /* 0xb0 */ + u32 fref_sel_delay; + u32 slow_clk_ctl; /* 5 < corerev < 10 */ + u32 PAD; + + /* Instaclock registers (corerev >= 10) */ + u32 system_clk_ctl; /* 0xc0 */ + u32 clkstatestretch; + u32 PAD[2]; + + /* Indirect backplane access (corerev >= 22) */ + u32 bp_addrlow; /* 0xd0 */ + u32 bp_addrhigh; + u32 bp_data; + u32 PAD; + u32 bp_indaccess; + u32 PAD[3]; + + /* More clock dividers (corerev >= 32) */ + u32 clkdiv2; + u32 PAD[2]; + + /* In AI chips, pointer to erom */ + u32 eromptr; /* 0xfc */ + + /* ExtBus control registers (corerev >= 3) */ + u32 pcmcia_config; /* 0x100 */ + u32 pcmcia_memwait; + u32 pcmcia_attrwait; + u32 pcmcia_iowait; + u32 ide_config; + u32 ide_memwait; + u32 ide_attrwait; + u32 ide_iowait; + u32 prog_config; + u32 prog_waitcount; + u32 flash_config; + u32 flash_waitcount; + u32 SECI_config; /* 0x130 SECI configuration */ + u32 PAD[3]; + + /* Enhanced Coexistence Interface (ECI) registers (corerev >= 21) */ + u32 eci_output; /* 0x140 */ + u32 eci_control; + u32 eci_inputlo; + u32 eci_inputmi; + u32 eci_inputhi; + u32 eci_inputintpolaritylo; + u32 eci_inputintpolaritymi; + u32 eci_inputintpolarityhi; + u32 eci_intmasklo; + u32 eci_intmaskmi; + u32 eci_intmaskhi; + u32 eci_eventlo; + u32 eci_eventmi; + u32 eci_eventhi; + u32 eci_eventmasklo; + u32 eci_eventmaskmi; + u32 eci_eventmaskhi; + u32 PAD[3]; + + /* SROM interface (corerev >= 32) */ + u32 sromcontrol; /* 0x190 */ + u32 sromaddress; + u32 sromdata; + u32 PAD[17]; + + /* Clock control and hardware workarounds (corerev >= 20) */ + u32 clk_ctl_st; /* 0x1e0 */ + u32 hw_war; + u32 PAD[70]; + + /* UARTs */ + u8 uart0data; /* 0x300 */ + u8 uart0imr; + u8 uart0fcr; + u8 uart0lcr; + u8 uart0mcr; + u8 uart0lsr; + u8 uart0msr; + u8 uart0scratch; + u8 PAD[248]; /* corerev >= 1 */ + + u8 uart1data; /* 0x400 */ + u8 uart1imr; + u8 uart1fcr; + u8 uart1lcr; + u8 uart1mcr; + u8 uart1lsr; + u8 uart1msr; + u8 uart1scratch; + u32 PAD[126]; + + /* PMU registers (corerev >= 20) */ + u32 pmucontrol; /* 0x600 */ + u32 pmucapabilities; + u32 pmustatus; + u32 res_state; + u32 res_pending; + u32 pmutimer; + u32 min_res_mask; + u32 max_res_mask; + u32 res_table_sel; + u32 res_dep_mask; + u32 res_updn_timer; + u32 res_timer; + u32 clkstretch; + u32 pmuwatchdog; + u32 gpiosel; /* 0x638, rev >= 1 */ + u32 gpioenable; /* 0x63c, rev >= 1 */ + u32 res_req_timer_sel; + u32 res_req_timer; + u32 res_req_mask; + u32 PAD; + u32 chipcontrol_addr; /* 0x650 */ + u32 chipcontrol_data; /* 0x654 */ + u32 regcontrol_addr; + u32 regcontrol_data; + u32 pllcontrol_addr; + u32 pllcontrol_data; + u32 pmustrapopt; /* 0x668, corerev >= 28 */ + u32 pmu_xtalfreq; /* 0x66C, pmurev >= 10 */ + u32 PAD[100]; + u16 sromotp[768]; +} chipcregs_t; + +/* chipid */ +#define CID_ID_MASK 0x0000ffff /* Chip Id mask */ +#define CID_REV_MASK 0x000f0000 /* Chip Revision mask */ +#define CID_REV_SHIFT 16 /* Chip Revision shift */ +#define CID_PKG_MASK 0x00f00000 /* Package Option mask */ +#define CID_PKG_SHIFT 20 /* Package Option shift */ +#define CID_CC_MASK 0x0f000000 /* CoreCount (corerev >= 4) */ +#define CID_CC_SHIFT 24 +#define CID_TYPE_MASK 0xf0000000 /* Chip Type */ +#define CID_TYPE_SHIFT 28 + +/* capabilities */ +#define CC_CAP_UARTS_MASK 0x00000003 /* Number of UARTs */ +#define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */ +#define CC_CAP_UCLKSEL 0x00000018 /* UARTs clock select */ +#define CC_CAP_UINTCLK 0x00000008 /* UARTs are driven by internal divided clock */ +#define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */ +#define CC_CAP_EXTBUS_MASK 0x000000c0 /* External bus mask */ +#define CC_CAP_EXTBUS_NONE 0x00000000 /* No ExtBus present */ +#define CC_CAP_EXTBUS_FULL 0x00000040 /* ExtBus: PCMCIA, IDE & Prog */ +#define CC_CAP_EXTBUS_PROG 0x00000080 /* ExtBus: ProgIf only */ +#define CC_CAP_FLASH_MASK 0x00000700 /* Type of flash */ +#define CC_CAP_PLL_MASK 0x00038000 /* Type of PLL */ +#define CC_CAP_PWR_CTL 0x00040000 /* Power control */ +#define CC_CAP_OTPSIZE 0x00380000 /* OTP Size (0 = none) */ +#define CC_CAP_OTPSIZE_SHIFT 19 /* OTP Size shift */ +#define CC_CAP_OTPSIZE_BASE 5 /* OTP Size base */ +#define CC_CAP_JTAGP 0x00400000 /* JTAG Master Present */ +#define CC_CAP_ROM 0x00800000 /* Internal boot rom active */ +#define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */ +#define CC_CAP_PMU 0x10000000 /* PMU Present, rev >= 20 */ +#define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */ +#define CC_CAP_NFLASH 0x80000000 /* Nand flash present, rev >= 35 */ + +#define CC_CAP2_SECI 0x00000001 /* SECI Present, rev >= 36 */ +#define CC_CAP2_GSIO 0x00000002 /* GSIO (spi/i2c) present, rev >= 37 */ + +/* pmucapabilities */ +#define PCAP_REV_MASK 0x000000ff +#define PCAP_RC_MASK 0x00001f00 +#define PCAP_RC_SHIFT 8 +#define PCAP_TC_MASK 0x0001e000 +#define PCAP_TC_SHIFT 13 +#define PCAP_PC_MASK 0x001e0000 +#define PCAP_PC_SHIFT 17 +#define PCAP_VC_MASK 0x01e00000 +#define PCAP_VC_SHIFT 21 +#define PCAP_CC_MASK 0x1e000000 +#define PCAP_CC_SHIFT 25 +#define PCAP5_PC_MASK 0x003e0000 /* PMU corerev >= 5 */ +#define PCAP5_PC_SHIFT 17 +#define PCAP5_VC_MASK 0x07c00000 +#define PCAP5_VC_SHIFT 22 +#define PCAP5_CC_MASK 0xf8000000 +#define PCAP5_CC_SHIFT 27 + +/* +* Maximum delay for the PMU state transition in us. +* This is an upper bound intended for spinwaits etc. +*/ +#define PMU_MAX_TRANSITION_DLY 15000 + +#endif /* _SBCHIPC_H */ diff --git a/drivers/staging/brcm80211/include/defs.h b/drivers/staging/brcm80211/include/defs.h new file mode 100644 index 00000000000..8b3e17dec15 --- /dev/null +++ b/drivers/staging/brcm80211/include/defs.h @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_DEFS_H_ +#define _BRCM_DEFS_H_ + +#include <linux/types.h> + +#define SI_BUS 0 +#define PCI_BUS 1 +#define PCMCIA_BUS 2 +#define SDIO_BUS 3 +#define JTAG_BUS 4 +#define USB_BUS 5 +#define SPI_BUS 6 + +#ifndef OFF +#define OFF 0 +#endif + +#ifndef ON +#define ON 1 /* ON = 1 */ +#endif + +#define AUTO (-1) /* Auto = -1 */ + +/* + * Priority definitions according 802.1D + */ +#define PRIO_8021D_NONE 2 +#define PRIO_8021D_BK 1 +#define PRIO_8021D_BE 0 +#define PRIO_8021D_EE 3 +#define PRIO_8021D_CL 4 +#define PRIO_8021D_VI 5 +#define PRIO_8021D_VO 6 +#define PRIO_8021D_NC 7 + +#define MAXPRIO 7 +#define NUMPRIO (MAXPRIO + 1) + +#define WL_NUMRATES 16 /* max # of rates in a rateset */ + +typedef struct wl_rateset { + u32 count; /* # rates in this set */ + u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ +} wl_rateset_t; + +#define BRCM_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ + +#define BRCM_SET_CHANNEL 30 +#define BRCM_SET_SRL 32 +#define BRCM_SET_LRL 34 + +#define BRCM_SET_RATESET 72 +#define BRCM_SET_BCNPRD 76 +#define BRCM_GET_CURR_RATESET 114 /* current rateset */ +#define BRCM_GET_PHYLIST 180 + +/* Bit masks for radio disabled status - returned by WL_GET_RADIO */ +#define WL_RADIO_SW_DISABLE (1<<0) +#define WL_RADIO_HW_DISABLE (1<<1) +#define WL_RADIO_MPC_DISABLE (1<<2) +#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */ + +/* Override bit for SET_TXPWR. if set, ignore other level limits */ +#define WL_TXPWR_OVERRIDE (1U<<31) + +/* band types */ +#define BRCM_BAND_AUTO 0 /* auto-select */ +#define BRCM_BAND_5G 1 /* 5 Ghz */ +#define BRCM_BAND_2G 2 /* 2.4 Ghz */ +#define BRCM_BAND_ALL 3 /* all bands */ + +/* Values for PM */ +#define PM_OFF 0 +#define PM_MAX 1 + +/* Message levels */ +#define LOG_ERROR_VAL 0x00000001 +#define LOG_TRACE_VAL 0x00000002 + +#define PM_OFF 0 +#define PM_MAX 1 +#define PM_FAST 2 + +/* + * Sonics Configuration Space Registers. + */ +#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */ + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif + +#endif /* _BRCM_DEFS_H_ */ diff --git a/drivers/staging/brcm80211/include/hndsoc.h b/drivers/staging/brcm80211/include/hndsoc.h deleted file mode 100644 index 6435686b329..00000000000 --- a/drivers/staging/brcm80211/include/hndsoc.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _HNDSOC_H -#define _HNDSOC_H - -/* Include the soci specific files */ -#include <sbconfig.h> -#include <aidmp.h> - -/* - * SOC Interconnect Address Map. - * All regions may not exist on all chips. - */ -#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */ -#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */ -#define SI_PCI_MEM_SZ (64 * 1024 * 1024) -#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */ -#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ -#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */ - -#ifdef SI_ENUM_BASE_VARIABLE -#define SI_ENUM_BASE (sii->pub.si_enum_base) -#else -#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ -#endif /* SI_ENUM_BASE_VARIABLE */ - -#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */ -#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ -#define SI_MAXCORES 16 /* Max cores (this is arbitrary, for software - * convenience and could be changed if we - * make any larger chips - */ - -#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */ -#define SI_FASTRAM_SWAPPED 0x19800000 - -#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */ -#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */ -#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */ -#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */ -#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */ -#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */ -#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */ -#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */ -#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */ -#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */ - -#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */ -#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ -#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), low 32 bits - */ -#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 - * (2 ZettaBytes), high 32 bits - */ - -/* core codes */ -#define NODEV_CORE_ID 0x700 /* Invalid coreid */ -#define CC_CORE_ID 0x800 /* chipcommon core */ -#define ILINE20_CORE_ID 0x801 /* iline20 core */ -#define SRAM_CORE_ID 0x802 /* sram core */ -#define SDRAM_CORE_ID 0x803 /* sdram core */ -#define PCI_CORE_ID 0x804 /* pci core */ -#define MIPS_CORE_ID 0x805 /* mips core */ -#define ENET_CORE_ID 0x806 /* enet mac core */ -#define CODEC_CORE_ID 0x807 /* v90 codec core */ -#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */ -#define ADSL_CORE_ID 0x809 /* ADSL core */ -#define ILINE100_CORE_ID 0x80a /* iline100 core */ -#define IPSEC_CORE_ID 0x80b /* ipsec core */ -#define UTOPIA_CORE_ID 0x80c /* utopia core */ -#define PCMCIA_CORE_ID 0x80d /* pcmcia core */ -#define SOCRAM_CORE_ID 0x80e /* internal memory core */ -#define MEMC_CORE_ID 0x80f /* memc sdram core */ -#define OFDM_CORE_ID 0x810 /* OFDM phy core */ -#define EXTIF_CORE_ID 0x811 /* external interface core */ -#define D11_CORE_ID 0x812 /* 802.11 MAC core */ -#define APHY_CORE_ID 0x813 /* 802.11a phy core */ -#define BPHY_CORE_ID 0x814 /* 802.11b phy core */ -#define GPHY_CORE_ID 0x815 /* 802.11g phy core */ -#define MIPS33_CORE_ID 0x816 /* mips3302 core */ -#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */ -#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */ -#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */ -#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */ -#define SDIOH_CORE_ID 0x81b /* sdio host core */ -#define ROBO_CORE_ID 0x81c /* roboswitch core */ -#define ATA100_CORE_ID 0x81d /* parallel ATA core */ -#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */ -#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */ -#define PCIE_CORE_ID 0x820 /* pci express core */ -#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */ -#define SRAMC_CORE_ID 0x822 /* SRAM controller core */ -#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */ -#define ARM11_CORE_ID 0x824 /* ARM 1176 core */ -#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */ -#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */ -#define PMU_CORE_ID 0x827 /* PMU core */ -#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */ -#define SDIOD_CORE_ID 0x829 /* SDIO device core */ -#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */ -#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */ -#define MIPS74K_CORE_ID 0x82c /* mips 74k core */ -#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */ -#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */ -#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */ -#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */ -#define SC_CORE_ID 0x831 /* shared common core */ -#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */ -#define SPIH_CORE_ID 0x833 /* SPI host core */ -#define I2S_CORE_ID 0x834 /* I2S core */ -#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */ -#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */ -#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */ -#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all - * unused address ranges - */ - -/* There are TWO constants on all HND chips: SI_ENUM_BASE above, - * and chipcommon being the first core: - */ -#define SI_CC_IDX 0 - -/* SOC Interconnect types (aka chip types) */ -#define SOCI_AI 1 - -/* Common core control flags */ -#define SICF_BIST_EN 0x8000 -#define SICF_PME_EN 0x4000 -#define SICF_CORE_BITS 0x3ffc -#define SICF_FGC 0x0002 -#define SICF_CLOCK_EN 0x0001 - -/* Common core status flags */ -#define SISF_BIST_DONE 0x8000 -#define SISF_BIST_ERROR 0x4000 -#define SISF_GATED_CLK 0x2000 -#define SISF_DMA64 0x1000 -#define SISF_CORE_BITS 0x0fff - -/* A register that is common to all cores to - * communicate w/PMU regarding clock control. - */ -#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ - -/* clk_ctl_st register */ -#define CCS_FORCEALP 0x00000001 /* force ALP request */ -#define CCS_FORCEHT 0x00000002 /* force HT request */ -#define CCS_FORCEILP 0x00000004 /* force ILP request */ -#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ -#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ -#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ -#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ -#define CCS_ERSRC_REQ_SHIFT 8 -#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ -#define CCS_HTAVAIL 0x00020000 /* HT is available */ -#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */ -#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */ -#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ -#define CCS_ERSRC_STS_SHIFT 24 - -#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */ -#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */ - -/* Not really related to SOC Interconnect, but a couple of software - * conventions for the use the flash space: - */ - -/* Minimum amount of flash we support */ -#define FLASH_MIN 0x00020000 /* Minimum flash size */ - -/* A boot/binary may have an embedded block that describes its size */ -#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */ -#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */ -#define BISZ_MAGIC_IDX 0 /* Word 0: magic */ -#define BISZ_TXTST_IDX 1 /* 1: text start */ -#define BISZ_TXTEND_IDX 2 /* 2: text end */ -#define BISZ_DATAST_IDX 3 /* 3: data start */ -#define BISZ_DATAEND_IDX 4 /* 4: data end */ -#define BISZ_BSSST_IDX 5 /* 5: bss start */ -#define BISZ_BSSEND_IDX 6 /* 6: bss end */ -#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ - -#endif /* _HNDSOC_H */ diff --git a/drivers/staging/brcm80211/include/nicpci.h b/drivers/staging/brcm80211/include/nicpci.h deleted file mode 100644 index 30321eb0477..00000000000 --- a/drivers/staging/brcm80211/include/nicpci.h +++ /dev/null @@ -1,79 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _NICPCI_H -#define _NICPCI_H - -#if defined(BCMSDIO) || (defined(BCMBUSTYPE) && (BCMBUSTYPE == SI_BUS)) -#define pcicore_find_pci_capability(a, b, c, d) (0) -#define pcie_readreg(a, b, c, d) (0) -#define pcie_writereg(a, b, c, d, e) (0) - -#define pcie_clkreq(a, b, c) (0) -#define pcie_lcreg(a, b, c) (0) - -#define pcicore_init(a, b, c) (0x0dadbeef) -#define pcicore_deinit(a) do { } while (0) -#define pcicore_attach(a, b, c) do { } while (0) -#define pcicore_hwup(a) do { } while (0) -#define pcicore_up(a, b) do { } while (0) -#define pcicore_sleep(a) do { } while (0) -#define pcicore_down(a, b) do { } while (0) - -#define pcie_war_ovr_aspm_update(a, b) do { } while (0) - -#define pcicore_pcieserdesreg(a, b, c, d, e) (0) -#define pcicore_pciereg(a, b, c, d, e) (0) - -#define pcicore_pmecap_fast(a) (false) -#define pcicore_pmeen(a) do { } while (0) -#define pcicore_pmeclr(a) do { } while (0) -#define pcicore_pmestat(a) (false) -#else -struct sbpcieregs; - -extern u8 pcicore_find_pci_capability(void *dev, u8 req_cap_id, - unsigned char *buf, u32 *buflen); -extern uint pcie_readreg(struct sbpcieregs *pcieregs, - uint addrtype, uint offset); -extern uint pcie_writereg(struct sbpcieregs *pcieregs, - uint addrtype, uint offset, uint val); - -extern u8 pcie_clkreq(void *pch, u32 mask, u32 val); -extern u32 pcie_lcreg(void *pch, u32 mask, u32 val); - -extern void *pcicore_init(si_t *sih, void *pdev, void *regs); -extern void pcicore_deinit(void *pch); -extern void pcicore_attach(void *pch, char *pvars, int state); -extern void pcicore_hwup(void *pch); -extern void pcicore_up(void *pch, int state); -extern void pcicore_sleep(void *pch); -extern void pcicore_down(void *pch, int state); - -extern void pcie_war_ovr_aspm_update(void *pch, u8 aspm); -extern u32 pcicore_pcieserdesreg(void *pch, u32 mdioslave, u32 offset, - u32 mask, u32 val); - -extern u32 pcicore_pciereg(void *pch, u32 offset, u32 mask, - u32 val, uint type); - -extern bool pcicore_pmecap_fast(void *pch); -extern void pcicore_pmeen(void *pch); -extern void pcicore_pmeclr(void *pch); -extern bool pcicore_pmestat(void *pch); -#endif /* defined(BCMSDIO)||(defined(BCMBUSTYPE) && (BCMBUSTYPE==SI_BUS)) */ - -#endif /* _NICPCI_H */ diff --git a/drivers/staging/brcm80211/include/pci_core.h b/drivers/staging/brcm80211/include/pci_core.h deleted file mode 100644 index 9153dcb8160..00000000000 --- a/drivers/staging/brcm80211/include/pci_core.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _PCI_CORE_H_ -#define _PCI_CORE_H_ - -#ifndef _LANGUAGE_ASSEMBLY - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -/* Sonics side: PCI core and host control registers */ -struct sbpciregs { - u32 control; /* PCI control */ - u32 PAD[3]; - u32 arbcontrol; /* PCI arbiter control */ - u32 clkrun; /* Clkrun Control (>=rev11) */ - u32 PAD[2]; - u32 intstatus; /* Interrupt status */ - u32 intmask; /* Interrupt mask */ - u32 sbtopcimailbox; /* Sonics to PCI mailbox */ - u32 PAD[9]; - u32 bcastaddr; /* Sonics broadcast address */ - u32 bcastdata; /* Sonics broadcast data */ - u32 PAD[2]; - u32 gpioin; /* ro: gpio input (>=rev2) */ - u32 gpioout; /* rw: gpio output (>=rev2) */ - u32 gpioouten; /* rw: gpio output enable (>= rev2) */ - u32 gpiocontrol; /* rw: gpio control (>= rev2) */ - u32 PAD[36]; - u32 sbtopci0; /* Sonics to PCI translation 0 */ - u32 sbtopci1; /* Sonics to PCI translation 1 */ - u32 sbtopci2; /* Sonics to PCI translation 2 */ - u32 PAD[189]; - u32 pcicfg[4][64]; /* 0x400 - 0x7FF, PCI Cfg Space (>=rev8) */ - u16 sprom[36]; /* SPROM shadow Area */ - u32 PAD[46]; -}; - -#endif /* _LANGUAGE_ASSEMBLY */ - -/* PCI control */ -#define PCI_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */ -#define PCI_RST 0x02 /* Value driven out to pin */ -#define PCI_CLK_OE 0x04 /* When set, drives clock as gated by PCI_CLK out to pin */ -#define PCI_CLK 0x08 /* Gate for clock driven out to pin */ - -/* PCI arbiter control */ -#define PCI_INT_ARB 0x01 /* When set, use an internal arbiter */ -#define PCI_EXT_ARB 0x02 /* When set, use an external arbiter */ -/* ParkID - for PCI corerev >= 8 */ -#define PCI_PARKID_MASK 0x1c /* Selects which agent is parked on an idle bus */ -#define PCI_PARKID_SHIFT 2 -#define PCI_PARKID_EXT0 0 /* External master 0 */ -#define PCI_PARKID_EXT1 1 /* External master 1 */ -#define PCI_PARKID_EXT2 2 /* External master 2 */ -#define PCI_PARKID_EXT3 3 /* External master 3 (rev >= 11) */ -#define PCI_PARKID_INT 3 /* Internal master (rev < 11) */ -#define PCI11_PARKID_INT 4 /* Internal master (rev >= 11) */ -#define PCI_PARKID_LAST 4 /* Last active master (rev < 11) */ -#define PCI11_PARKID_LAST 5 /* Last active master (rev >= 11) */ - -#define PCI_CLKRUN_DSBL 0x8000 /* Bit 15 forceClkrun */ - -/* Interrupt status/mask */ -#define PCI_INTA 0x01 /* PCI INTA# is asserted */ -#define PCI_INTB 0x02 /* PCI INTB# is asserted */ -#define PCI_SERR 0x04 /* PCI SERR# has been asserted (write one to clear) */ -#define PCI_PERR 0x08 /* PCI PERR# has been asserted (write one to clear) */ -#define PCI_PME 0x10 /* PCI PME# is asserted */ - -/* (General) PCI/SB mailbox interrupts, two bits per pci function */ -#define MAILBOX_F0_0 0x100 /* function 0, int 0 */ -#define MAILBOX_F0_1 0x200 /* function 0, int 1 */ -#define MAILBOX_F1_0 0x400 /* function 1, int 0 */ -#define MAILBOX_F1_1 0x800 /* function 1, int 1 */ -#define MAILBOX_F2_0 0x1000 /* function 2, int 0 */ -#define MAILBOX_F2_1 0x2000 /* function 2, int 1 */ -#define MAILBOX_F3_0 0x4000 /* function 3, int 0 */ -#define MAILBOX_F3_1 0x8000 /* function 3, int 1 */ - -/* Sonics broadcast address */ -#define BCAST_ADDR_MASK 0xff /* Broadcast register address */ - -/* Sonics to PCI translation types */ -#define SBTOPCI0_MASK 0xfc000000 -#define SBTOPCI1_MASK 0xfc000000 -#define SBTOPCI2_MASK 0xc0000000 -#define SBTOPCI_MEM 0 -#define SBTOPCI_IO 1 -#define SBTOPCI_CFG0 2 -#define SBTOPCI_CFG1 3 -#define SBTOPCI_PREF 0x4 /* prefetch enable */ -#define SBTOPCI_BURST 0x8 /* burst enable */ -#define SBTOPCI_RC_MASK 0x30 /* read command (>= rev11) */ -#define SBTOPCI_RC_READ 0x00 /* memory read */ -#define SBTOPCI_RC_READLINE 0x10 /* memory read line */ -#define SBTOPCI_RC_READMULTI 0x20 /* memory read multiple */ - -/* PCI core index in SROM shadow area */ -#define SRSH_PI_OFFSET 0 /* first word */ -#define SRSH_PI_MASK 0xf000 /* bit 15:12 */ -#define SRSH_PI_SHIFT 12 /* bit 15:12 */ - -#endif /* _PCI_CORE_H_ */ diff --git a/drivers/staging/brcm80211/include/pcicfg.h b/drivers/staging/brcm80211/include/pcicfg.h deleted file mode 100644 index d0c617a63c4..00000000000 --- a/drivers/staging/brcm80211/include/pcicfg.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _h_pcicfg_ -#define _h_pcicfg_ - -#include <linux/pci_regs.h> - -/* PCI configuration address space size */ -#define PCI_SZPCR 256 - -/* Everything below is BRCM HND proprietary */ - -/* Brcm PCI configuration registers */ -#define PCI_BAR0_WIN 0x80 /* backplane address space accessed by BAR0 */ -#define PCI_SPROM_CONTROL 0x88 /* sprom property control */ -#define PCI_INT_MASK 0x94 /* mask of PCI and other cores interrupts */ -#define PCI_SBIM_SHIFT 8 /* backplane core interrupt mask bits offset */ -#define PCI_BAR0_WIN2 0xac /* backplane address space accessed by second 4KB of BAR0 */ -#define PCI_GPIO_IN 0xb0 /* pci config space gpio input (>=rev3) */ -#define PCI_GPIO_OUT 0xb4 /* pci config space gpio output (>=rev3) */ -#define PCI_GPIO_OUTEN 0xb8 /* pci config space gpio output enable (>=rev3) */ - -#define PCI_BAR0_SPROM_OFFSET (4 * 1024) /* bar0 + 4K accesses external sprom */ -#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) /* bar0 + 6K accesses pci core registers */ -#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) /* pci core SB registers are at the end of the - * 8KB window, so their address is the "regular" - * address plus 4K - */ -#define PCI_BAR0_WINSZ (16 * 1024) /* bar0 window size Match with corerev 13 */ -/* On pci corerev >= 13 and all pcie, the bar0 is now 16KB and it maps: */ -#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) /* bar0 + 8K accesses pci/pcie core registers */ -#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) /* bar0 + 12K accesses chipc core registers */ - -#define PCI_SBIM_STATUS_SERR 0x4 /* backplane SBErr interrupt status */ - -#endif /* _h_pcicfg_ */ diff --git a/drivers/staging/brcm80211/include/pcie_core.h b/drivers/staging/brcm80211/include/pcie_core.h deleted file mode 100644 index cd54ddcf459..00000000000 --- a/drivers/staging/brcm80211/include/pcie_core.h +++ /dev/null @@ -1,299 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _PCIE_CORE_H -#define _PCIE_CORE_H - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -/* PCIE Enumeration space offsets */ -#define PCIE_CORE_CONFIG_OFFSET 0x0 -#define PCIE_FUNC0_CONFIG_OFFSET 0x400 -#define PCIE_FUNC1_CONFIG_OFFSET 0x500 -#define PCIE_FUNC2_CONFIG_OFFSET 0x600 -#define PCIE_FUNC3_CONFIG_OFFSET 0x700 -#define PCIE_SPROM_SHADOW_OFFSET 0x800 -#define PCIE_SBCONFIG_OFFSET 0xE00 - -/* PCIE Bar0 Address Mapping. Each function maps 16KB config space */ -#define PCIE_DEV_BAR0_SIZE 0x4000 -#define PCIE_BAR0_WINMAPCORE_OFFSET 0x0 -#define PCIE_BAR0_EXTSPROM_OFFSET 0x1000 -#define PCIE_BAR0_PCIECORE_OFFSET 0x2000 -#define PCIE_BAR0_CCCOREREG_OFFSET 0x3000 - -/* different register spaces to access thr'u pcie indirect access */ -#define PCIE_CONFIGREGS 1 /* Access to config space */ -#define PCIE_PCIEREGS 2 /* Access to pcie registers */ - -/* SB side: PCIE core and host control registers */ -typedef struct sbpcieregs { - u32 control; /* host mode only */ - u32 PAD[2]; - u32 biststatus; /* bist Status: 0x00C */ - u32 gpiosel; /* PCIE gpio sel: 0x010 */ - u32 gpioouten; /* PCIE gpio outen: 0x14 */ - u32 PAD[2]; - u32 intstatus; /* Interrupt status: 0x20 */ - u32 intmask; /* Interrupt mask: 0x24 */ - u32 sbtopcimailbox; /* sb to pcie mailbox: 0x028 */ - u32 PAD[53]; - u32 sbtopcie0; /* sb to pcie translation 0: 0x100 */ - u32 sbtopcie1; /* sb to pcie translation 1: 0x104 */ - u32 sbtopcie2; /* sb to pcie translation 2: 0x108 */ - u32 PAD[5]; - - /* pcie core supports in direct access to config space */ - u32 configaddr; /* pcie config space access: Address field: 0x120 */ - u32 configdata; /* pcie config space access: Data field: 0x124 */ - - /* mdio access to serdes */ - u32 mdiocontrol; /* controls the mdio access: 0x128 */ - u32 mdiodata; /* Data to the mdio access: 0x12c */ - - /* pcie protocol phy/dllp/tlp register indirect access mechanism */ - u32 pcieindaddr; /* indirect access to the internal register: 0x130 */ - u32 pcieinddata; /* Data to/from the internal regsiter: 0x134 */ - - u32 clkreqenctrl; /* >= rev 6, Clkreq rdma control : 0x138 */ - u32 PAD[177]; - u32 pciecfg[4][64]; /* 0x400 - 0x7FF, PCIE Cfg Space */ - u16 sprom[64]; /* SPROM shadow Area */ -} sbpcieregs_t; - -/* PCI control */ -#define PCIE_RST_OE 0x01 /* When set, drives PCI_RESET out to pin */ -#define PCIE_RST 0x02 /* Value driven out to pin */ - -#define PCIE_CFGADDR 0x120 /* offsetof(configaddr) */ -#define PCIE_CFGDATA 0x124 /* offsetof(configdata) */ - -/* Interrupt status/mask */ -#define PCIE_INTA 0x01 /* PCIE INTA message is received */ -#define PCIE_INTB 0x02 /* PCIE INTB message is received */ -#define PCIE_INTFATAL 0x04 /* PCIE INTFATAL message is received */ -#define PCIE_INTNFATAL 0x08 /* PCIE INTNONFATAL message is received */ -#define PCIE_INTCORR 0x10 /* PCIE INTCORR message is received */ -#define PCIE_INTPME 0x20 /* PCIE INTPME message is received */ - -/* SB to PCIE translation masks */ -#define SBTOPCIE0_MASK 0xfc000000 -#define SBTOPCIE1_MASK 0xfc000000 -#define SBTOPCIE2_MASK 0xc0000000 - -/* Access type bits (0:1) */ -#define SBTOPCIE_MEM 0 -#define SBTOPCIE_IO 1 -#define SBTOPCIE_CFG0 2 -#define SBTOPCIE_CFG1 3 - -/* Prefetch enable bit 2 */ -#define SBTOPCIE_PF 4 - -/* Write Burst enable for memory write bit 3 */ -#define SBTOPCIE_WR_BURST 8 - -/* config access */ -#define CONFIGADDR_FUNC_MASK 0x7000 -#define CONFIGADDR_FUNC_SHF 12 -#define CONFIGADDR_REG_MASK 0x0FFF -#define CONFIGADDR_REG_SHF 0 - -#define PCIE_CONFIG_INDADDR(f, r) \ - ((((f) & CONFIGADDR_FUNC_MASK) << CONFIGADDR_FUNC_SHF) | \ - (((r) & CONFIGADDR_REG_MASK) << CONFIGADDR_REG_SHF)) - -/* PCIE protocol regs Indirect Address */ -#define PCIEADDR_PROT_MASK 0x300 -#define PCIEADDR_PROT_SHF 8 -#define PCIEADDR_PL_TLP 0 -#define PCIEADDR_PL_DLLP 1 -#define PCIEADDR_PL_PLP 2 - -/* PCIE protocol PHY diagnostic registers */ -#define PCIE_PLP_MODEREG 0x200 /* Mode */ -#define PCIE_PLP_STATUSREG 0x204 /* Status */ -#define PCIE_PLP_LTSSMCTRLREG 0x208 /* LTSSM control */ -#define PCIE_PLP_LTLINKNUMREG 0x20c /* Link Training Link number */ -#define PCIE_PLP_LTLANENUMREG 0x210 /* Link Training Lane number */ -#define PCIE_PLP_LTNFTSREG 0x214 /* Link Training N_FTS */ -#define PCIE_PLP_ATTNREG 0x218 /* Attention */ -#define PCIE_PLP_ATTNMASKREG 0x21C /* Attention Mask */ -#define PCIE_PLP_RXERRCTR 0x220 /* Rx Error */ -#define PCIE_PLP_RXFRMERRCTR 0x224 /* Rx Framing Error */ -#define PCIE_PLP_RXERRTHRESHREG 0x228 /* Rx Error threshold */ -#define PCIE_PLP_TESTCTRLREG 0x22C /* Test Control reg */ -#define PCIE_PLP_SERDESCTRLOVRDREG 0x230 /* SERDES Control Override */ -#define PCIE_PLP_TIMINGOVRDREG 0x234 /* Timing param override */ -#define PCIE_PLP_RXTXSMDIAGREG 0x238 /* RXTX State Machine Diag */ -#define PCIE_PLP_LTSSMDIAGREG 0x23C /* LTSSM State Machine Diag */ - -/* PCIE protocol DLLP diagnostic registers */ -#define PCIE_DLLP_LCREG 0x100 /* Link Control */ -#define PCIE_DLLP_LSREG 0x104 /* Link Status */ -#define PCIE_DLLP_LAREG 0x108 /* Link Attention */ -#define PCIE_DLLP_LAMASKREG 0x10C /* Link Attention Mask */ -#define PCIE_DLLP_NEXTTXSEQNUMREG 0x110 /* Next Tx Seq Num */ -#define PCIE_DLLP_ACKEDTXSEQNUMREG 0x114 /* Acked Tx Seq Num */ -#define PCIE_DLLP_PURGEDTXSEQNUMREG 0x118 /* Purged Tx Seq Num */ -#define PCIE_DLLP_RXSEQNUMREG 0x11C /* Rx Sequence Number */ -#define PCIE_DLLP_LRREG 0x120 /* Link Replay */ -#define PCIE_DLLP_LACKTOREG 0x124 /* Link Ack Timeout */ -#define PCIE_DLLP_PMTHRESHREG 0x128 /* Power Management Threshold */ -#define PCIE_DLLP_RTRYWPREG 0x12C /* Retry buffer write ptr */ -#define PCIE_DLLP_RTRYRPREG 0x130 /* Retry buffer Read ptr */ -#define PCIE_DLLP_RTRYPPREG 0x134 /* Retry buffer Purged ptr */ -#define PCIE_DLLP_RTRRWREG 0x138 /* Retry buffer Read/Write */ -#define PCIE_DLLP_ECTHRESHREG 0x13C /* Error Count Threshold */ -#define PCIE_DLLP_TLPERRCTRREG 0x140 /* TLP Error Counter */ -#define PCIE_DLLP_ERRCTRREG 0x144 /* Error Counter */ -#define PCIE_DLLP_NAKRXCTRREG 0x148 /* NAK Received Counter */ -#define PCIE_DLLP_TESTREG 0x14C /* Test */ -#define PCIE_DLLP_PKTBIST 0x150 /* Packet BIST */ -#define PCIE_DLLP_PCIE11 0x154 /* DLLP PCIE 1.1 reg */ - -#define PCIE_DLLP_LSREG_LINKUP (1 << 16) - -/* PCIE protocol TLP diagnostic registers */ -#define PCIE_TLP_CONFIGREG 0x000 /* Configuration */ -#define PCIE_TLP_WORKAROUNDSREG 0x004 /* TLP Workarounds */ -#define PCIE_TLP_WRDMAUPPER 0x010 /* Write DMA Upper Address */ -#define PCIE_TLP_WRDMALOWER 0x014 /* Write DMA Lower Address */ -#define PCIE_TLP_WRDMAREQ_LBEREG 0x018 /* Write DMA Len/ByteEn Req */ -#define PCIE_TLP_RDDMAUPPER 0x01C /* Read DMA Upper Address */ -#define PCIE_TLP_RDDMALOWER 0x020 /* Read DMA Lower Address */ -#define PCIE_TLP_RDDMALENREG 0x024 /* Read DMA Len Req */ -#define PCIE_TLP_MSIDMAUPPER 0x028 /* MSI DMA Upper Address */ -#define PCIE_TLP_MSIDMALOWER 0x02C /* MSI DMA Lower Address */ -#define PCIE_TLP_MSIDMALENREG 0x030 /* MSI DMA Len Req */ -#define PCIE_TLP_SLVREQLENREG 0x034 /* Slave Request Len */ -#define PCIE_TLP_FCINPUTSREQ 0x038 /* Flow Control Inputs */ -#define PCIE_TLP_TXSMGRSREQ 0x03C /* Tx StateMachine and Gated Req */ -#define PCIE_TLP_ADRACKCNTARBLEN 0x040 /* Address Ack XferCnt and ARB Len */ -#define PCIE_TLP_DMACPLHDR0 0x044 /* DMA Completion Hdr 0 */ -#define PCIE_TLP_DMACPLHDR1 0x048 /* DMA Completion Hdr 1 */ -#define PCIE_TLP_DMACPLHDR2 0x04C /* DMA Completion Hdr 2 */ -#define PCIE_TLP_DMACPLMISC0 0x050 /* DMA Completion Misc0 */ -#define PCIE_TLP_DMACPLMISC1 0x054 /* DMA Completion Misc1 */ -#define PCIE_TLP_DMACPLMISC2 0x058 /* DMA Completion Misc2 */ -#define PCIE_TLP_SPTCTRLLEN 0x05C /* Split Controller Req len */ -#define PCIE_TLP_SPTCTRLMSIC0 0x060 /* Split Controller Misc 0 */ -#define PCIE_TLP_SPTCTRLMSIC1 0x064 /* Split Controller Misc 1 */ -#define PCIE_TLP_BUSDEVFUNC 0x068 /* Bus/Device/Func */ -#define PCIE_TLP_RESETCTR 0x06C /* Reset Counter */ -#define PCIE_TLP_RTRYBUF 0x070 /* Retry Buffer value */ -#define PCIE_TLP_TGTDEBUG1 0x074 /* Target Debug Reg1 */ -#define PCIE_TLP_TGTDEBUG2 0x078 /* Target Debug Reg2 */ -#define PCIE_TLP_TGTDEBUG3 0x07C /* Target Debug Reg3 */ -#define PCIE_TLP_TGTDEBUG4 0x080 /* Target Debug Reg4 */ - -/* MDIO control */ -#define MDIOCTL_DIVISOR_MASK 0x7f /* clock to be used on MDIO */ -#define MDIOCTL_DIVISOR_VAL 0x2 -#define MDIOCTL_PREAM_EN 0x80 /* Enable preamble sequnce */ -#define MDIOCTL_ACCESS_DONE 0x100 /* Tranaction complete */ - -/* MDIO Data */ -#define MDIODATA_MASK 0x0000ffff /* data 2 bytes */ -#define MDIODATA_TA 0x00020000 /* Turnaround */ -#define MDIODATA_REGADDR_SHF_OLD 18 /* Regaddr shift (rev < 10) */ -#define MDIODATA_REGADDR_MASK_OLD 0x003c0000 /* Regaddr Mask (rev < 10) */ -#define MDIODATA_DEVADDR_SHF_OLD 22 /* Physmedia devaddr shift (rev < 10) */ -#define MDIODATA_DEVADDR_MASK_OLD 0x0fc00000 /* Physmedia devaddr Mask (rev < 10) */ -#define MDIODATA_REGADDR_SHF 18 /* Regaddr shift */ -#define MDIODATA_REGADDR_MASK 0x007c0000 /* Regaddr Mask */ -#define MDIODATA_DEVADDR_SHF 23 /* Physmedia devaddr shift */ -#define MDIODATA_DEVADDR_MASK 0x0f800000 /* Physmedia devaddr Mask */ -#define MDIODATA_WRITE 0x10000000 /* write Transaction */ -#define MDIODATA_READ 0x20000000 /* Read Transaction */ -#define MDIODATA_START 0x40000000 /* start of Transaction */ - -#define MDIODATA_DEV_ADDR 0x0 /* dev address for serdes */ -#define MDIODATA_BLK_ADDR 0x1F /* blk address for serdes */ - -/* MDIO devices (SERDES modules) - * unlike old pcie cores (rev < 10), rev10 pcie serde organizes registers into a few blocks. - * two layers mapping (blockidx, register offset) is required - */ -#define MDIO_DEV_IEEE0 0x000 -#define MDIO_DEV_IEEE1 0x001 -#define MDIO_DEV_BLK0 0x800 -#define MDIO_DEV_BLK1 0x801 -#define MDIO_DEV_BLK2 0x802 -#define MDIO_DEV_BLK3 0x803 -#define MDIO_DEV_BLK4 0x804 -#define MDIO_DEV_TXPLL 0x808 /* TXPLL register block idx */ -#define MDIO_DEV_TXCTRL0 0x820 -#define MDIO_DEV_SERDESID 0x831 -#define MDIO_DEV_RXCTRL0 0x840 - -/* serdes regs (rev < 10) */ -#define MDIODATA_DEV_PLL 0x1d /* SERDES PLL Dev */ -#define MDIODATA_DEV_TX 0x1e /* SERDES TX Dev */ -#define MDIODATA_DEV_RX 0x1f /* SERDES RX Dev */ - /* SERDES RX registers */ -#define SERDES_RX_CTRL 1 /* Rx cntrl */ -#define SERDES_RX_TIMER1 2 /* Rx Timer1 */ -#define SERDES_RX_CDR 6 /* CDR */ -#define SERDES_RX_CDRBW 7 /* CDR BW */ - - /* SERDES RX control register */ -#define SERDES_RX_CTRL_FORCE 0x80 /* rxpolarity_force */ -#define SERDES_RX_CTRL_POLARITY 0x40 /* rxpolarity_value */ - - /* SERDES PLL registers */ -#define SERDES_PLL_CTRL 1 /* PLL control reg */ -#define PLL_CTRL_FREQDET_EN 0x4000 /* bit 14 is FREQDET on */ - -/* Power management threshold */ -#define PCIE_L0THRESHOLDTIME_MASK 0xFF00 /* bits 0 - 7 */ -#define PCIE_L1THRESHOLDTIME_MASK 0xFF00 /* bits 8 - 15 */ -#define PCIE_L1THRESHOLDTIME_SHIFT 8 /* PCIE_L1THRESHOLDTIME_SHIFT */ -#define PCIE_L1THRESHOLD_WARVAL 0x72 /* WAR value */ -#define PCIE_ASPMTIMER_EXTEND 0x01000000 /* > rev7: enable extend ASPM timer */ - -/* SPROM offsets */ -#define SRSH_ASPM_OFFSET 4 /* word 4 */ -#define SRSH_ASPM_ENB 0x18 /* bit 3, 4 */ -#define SRSH_ASPM_L1_ENB 0x10 /* bit 4 */ -#define SRSH_ASPM_L0s_ENB 0x8 /* bit 3 */ -#define SRSH_PCIE_MISC_CONFIG 5 /* word 5 */ -#define SRSH_L23READY_EXIT_NOPERST 0x8000 /* bit 15 */ -#define SRSH_CLKREQ_OFFSET_REV5 20 /* word 20 for srom rev <= 5 */ -#define SRSH_CLKREQ_OFFSET_REV8 52 /* word 52 for srom rev 8 */ -#define SRSH_CLKREQ_ENB 0x0800 /* bit 11 */ -#define SRSH_BD_OFFSET 6 /* word 6 */ -#define SRSH_AUTOINIT_OFFSET 18 /* auto initialization enable */ - -/* Linkcontrol reg offset in PCIE Cap */ -#define PCIE_CAP_LINKCTRL_OFFSET 16 /* linkctrl offset in pcie cap */ -#define PCIE_CAP_LCREG_ASPML0s 0x01 /* ASPM L0s in linkctrl */ -#define PCIE_CAP_LCREG_ASPML1 0x02 /* ASPM L1 in linkctrl */ -#define PCIE_CLKREQ_ENAB 0x100 /* CLKREQ Enab in linkctrl */ - -#define PCIE_ASPM_ENAB 3 /* ASPM L0s & L1 in linkctrl */ -#define PCIE_ASPM_L1_ENAB 2 /* ASPM L0s & L1 in linkctrl */ -#define PCIE_ASPM_L0s_ENAB 1 /* ASPM L0s & L1 in linkctrl */ -#define PCIE_ASPM_DISAB 0 /* ASPM L0s & L1 in linkctrl */ - -/* Status reg PCIE_PLP_STATUSREG */ -#define PCIE_PLP_POLARITYINV_STAT 0x10 -#endif /* _PCIE_CORE_H */ diff --git a/drivers/staging/brcm80211/include/proto/802.11.h b/drivers/staging/brcm80211/include/proto/802.11.h deleted file mode 100644 index 374125d770b..00000000000 --- a/drivers/staging/brcm80211/include/proto/802.11.h +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _802_11_H_ -#define _802_11_H_ - -#include <linux/if_ether.h> - -#define DOT11_A3_HDR_LEN 24 -#define DOT11_A4_HDR_LEN 30 -#define DOT11_MAC_HDR_LEN DOT11_A3_HDR_LEN -#define DOT11_ICV_AES_LEN 8 -#define DOT11_QOS_LEN 2 - -#define DOT11_IV_MAX_LEN 8 - -#define DOT11_DEFAULT_RTS_LEN 2347 - -#define DOT11_MIN_FRAG_LEN 256 -#define DOT11_MAX_FRAG_LEN 2346 -#define DOT11_DEFAULT_FRAG_LEN 2346 - -#define DOT11_MIN_BEACON_PERIOD 1 -#define DOT11_MAX_BEACON_PERIOD 0xFFFF - -#define DOT11_MIN_DTIM_PERIOD 1 -#define DOT11_MAX_DTIM_PERIOD 0xFF - -#define DOT11_OUI_LEN 3 - -#define DOT11_RTS_LEN 16 -#define DOT11_CTS_LEN 10 -#define DOT11_ACK_LEN 10 - -#define DOT11_BA_BITMAP_LEN 128 -#define DOT11_BA_LEN 4 - -#define WME_OUI "\x00\x50\xf2" -#define WME_VER 1 -#define WME_TYPE 2 -#define WME_SUBTYPE_PARAM_IE 1 - -#define AC_BE 0 -#define AC_BK 1 -#define AC_VI 2 -#define AC_VO 3 -#define AC_COUNT 4 - -typedef u8 ac_bitmap_t; - -#define AC_BITMAP_ALL 0xf -#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) - -struct edcf_acparam { - u8 ACI; - u8 ECW; - u16 TXOP; -} __attribute__((packed)); -typedef struct edcf_acparam edcf_acparam_t; - -struct wme_param_ie { - u8 oui[3]; - u8 type; - u8 subtype; - u8 version; - u8 qosinfo; - u8 rsvd; - edcf_acparam_t acparam[AC_COUNT]; -} __attribute__((packed)); -typedef struct wme_param_ie wme_param_ie_t; -#define WME_PARAM_IE_LEN 24 - -#define EDCF_AIFSN_MIN 1 -#define EDCF_AIFSN_MAX 15 -#define EDCF_AIFSN_MASK 0x0f -#define EDCF_ACM_MASK 0x10 -#define EDCF_ACI_MASK 0x60 -#define EDCF_ACI_SHIFT 5 - -#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) -#define EDCF_ECWMIN_MASK 0x0f -#define EDCF_ECWMAX_MASK 0xf0 -#define EDCF_ECWMAX_SHIFT 4 - -#define EDCF_TXOP2USEC(txop) ((txop) << 5) - -#define EDCF_AC_BE_ACI_STA 0x03 -#define EDCF_AC_BE_ECW_STA 0xA4 -#define EDCF_AC_BE_TXOP_STA 0x0000 -#define EDCF_AC_BK_ACI_STA 0x27 -#define EDCF_AC_BK_ECW_STA 0xA4 -#define EDCF_AC_BK_TXOP_STA 0x0000 -#define EDCF_AC_VI_ACI_STA 0x42 -#define EDCF_AC_VI_ECW_STA 0x43 -#define EDCF_AC_VI_TXOP_STA 0x005e -#define EDCF_AC_VO_ACI_STA 0x62 -#define EDCF_AC_VO_ECW_STA 0x32 -#define EDCF_AC_VO_TXOP_STA 0x002f - -#define EDCF_AC_VO_TXOP_AP 0x002f - -#define SEQNUM_SHIFT 4 -#define SEQNUM_MAX 0x1000 -#define FRAGNUM_MASK 0xF - -#define DOT11_MNG_RSN_ID 48 -#define DOT11_MNG_WPA_ID 221 -#define DOT11_MNG_VS_ID 221 - -#define DOT11_BSSTYPE_INFRASTRUCTURE 0 -#define DOT11_BSSTYPE_ANY 2 -#define DOT11_SCANTYPE_ACTIVE 0 - -#define PREN_PREAMBLE 24 -#define PREN_MM_EXT 12 -#define PREN_PREAMBLE_EXT 4 - -#define RIFS_11N_TIME 2 - -#define APHY_SLOT_TIME 9 -#define APHY_SIFS_TIME 16 -#define APHY_PREAMBLE_TIME 16 -#define APHY_SIGNAL_TIME 4 -#define APHY_SYMBOL_TIME 4 -#define APHY_SERVICE_NBITS 16 -#define APHY_TAIL_NBITS 6 -#define APHY_CWMIN 15 - -#define BPHY_SLOT_TIME 20 -#define BPHY_SIFS_TIME 10 -#define BPHY_PLCP_TIME 192 -#define BPHY_PLCP_SHORT_TIME 96 - -#define DOT11_OFDM_SIGNAL_EXTENSION 6 - -#define PHY_CWMAX 1023 - -#define DOT11_MAXNUMFRAGS 16 - -typedef struct d11cnt { - u32 txfrag; - u32 txmulti; - u32 txfail; - u32 txretry; - u32 txretrie; - u32 rxdup; - u32 txrts; - u32 txnocts; - u32 txnoack; - u32 rxfrag; - u32 rxmulti; - u32 rxcrc; - u32 txfrmsnt; - u32 rxundec; -} d11cnt_t; - -#define MCSSET_LEN 16 - -#define HT_CAP_IE_LEN 26 - -#define HT_CAP_RX_STBC_NO 0x0 -#define HT_CAP_RX_STBC_ONE_STREAM 0x1 - -#define AMPDU_MAX_MPDU_DENSITY IEEE80211_HT_MPDU_DENSITY_16 - -#define AMPDU_DELIMITER_LEN 4 - -#define DOT11N_TXBURST 0x0008 - -#define WPA_VERSION 1 -#define WPA_OUI "\x00\x50\xF2" - -#define WFA_OUI "\x00\x50\xF2" -#define WFA_OUI_LEN 3 - -#define WFA_OUI_TYPE_WPA 1 - -#define RSN_AKM_NONE 0 -#define RSN_AKM_UNSPECIFIED 1 -#define RSN_AKM_PSK 2 - -#define DOT11_MAX_DEFAULT_KEYS 4 -#define DOT11_WPA_KEY_RSC_LEN 8 - -#define BRCM_OUI "\x00\x10\x18" - -#endif /* _802_11_H_ */ diff --git a/drivers/staging/brcm80211/include/proto/bcmeth.h b/drivers/staging/brcm80211/include/proto/bcmeth.h deleted file mode 100644 index e98ee654458..00000000000 --- a/drivers/staging/brcm80211/include/proto/bcmeth.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BCMETH_H_ -#define _BCMETH_H_ - -#define BCMILCP_SUBTYPE_RATE 1 -#define BCMILCP_SUBTYPE_LINK 2 -#define BCMILCP_SUBTYPE_CSA 3 -#define BCMILCP_SUBTYPE_LARQ 4 -#define BCMILCP_SUBTYPE_VENDOR 5 -#define BCMILCP_SUBTYPE_FLH 17 -#define BCMILCP_SUBTYPE_VENDOR_LONG 32769 -#define BCMILCP_SUBTYPE_CERT 32770 -#define BCMILCP_SUBTYPE_SES 32771 -#define BCMILCP_BCM_SUBTYPE_RESERVED 0 -#define BCMILCP_BCM_SUBTYPE_EVENT 1 -#define BCMILCP_BCM_SUBTYPE_SES 2 -#define BCMILCP_BCM_SUBTYPE_DPT 4 -#define BCMILCP_BCM_SUBTYPEHDR_MINLENGTH 8 -#define BCMILCP_BCM_SUBTYPEHDR_VERSION 0 - -typedef struct bcmeth_hdr { - u16 subtype; - u16 length; - u8 version; - u8 oui[3]; - u16 usr_subtype; -} __attribute__((packed)) bcmeth_hdr_t; - -#endif /* _BCMETH_H_ */ diff --git a/drivers/staging/brcm80211/include/proto/bcmevent.h b/drivers/staging/brcm80211/include/proto/bcmevent.h deleted file mode 100644 index 1b60789aef0..00000000000 --- a/drivers/staging/brcm80211/include/proto/bcmevent.h +++ /dev/null @@ -1,207 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _BCMEVENT_H_ -#define _BCMEVENT_H_ - -#include <linux/if_ether.h> - -#define BCM_EVENT_MSG_VERSION 1 -#define BCM_MSG_IFNAME_MAX 16 - -#define WLC_EVENT_MSG_LINK 0x01 -#define WLC_EVENT_MSG_FLUSHTXQ 0x02 -#define WLC_EVENT_MSG_GROUP 0x04 - -typedef struct { - u16 version; - u16 flags; - u32 event_type; - u32 status; - u32 reason; - u32 auth_type; - u32 datalen; - u8 addr[ETH_ALEN]; - char ifname[BCM_MSG_IFNAME_MAX]; -} __attribute__((packed)) wl_event_msg_t; - -#ifdef BRCM_FULLMAC -typedef struct bcm_event { - struct ethhdr eth; - bcmeth_hdr_t bcm_hdr; - wl_event_msg_t event; -} __attribute__((packed)) bcm_event_t; -#endif -#define BCM_MSG_LEN (sizeof(bcm_event_t) - sizeof(bcmeth_hdr_t) - \ - sizeof(struct ether_header)) - -#define WLC_E_SET_SSID 0 -#define WLC_E_JOIN 1 -#define WLC_E_START 2 -#define WLC_E_AUTH 3 -#define WLC_E_AUTH_IND 4 -#define WLC_E_DEAUTH 5 -#define WLC_E_DEAUTH_IND 6 -#define WLC_E_ASSOC 7 -#define WLC_E_ASSOC_IND 8 -#define WLC_E_REASSOC 9 -#define WLC_E_REASSOC_IND 10 -#define WLC_E_DISASSOC 11 -#define WLC_E_DISASSOC_IND 12 -#define WLC_E_QUIET_START 13 -#define WLC_E_QUIET_END 14 -#define WLC_E_BEACON_RX 15 -#define WLC_E_LINK 16 -#define WLC_E_MIC_ERROR 17 -#define WLC_E_NDIS_LINK 18 -#define WLC_E_ROAM 19 -#define WLC_E_TXFAIL 20 -#define WLC_E_PMKID_CACHE 21 -#define WLC_E_RETROGRADE_TSF 22 -#define WLC_E_PRUNE 23 -#define WLC_E_AUTOAUTH 24 -#define WLC_E_EAPOL_MSG 25 -#define WLC_E_SCAN_COMPLETE 26 -#define WLC_E_ADDTS_IND 27 -#define WLC_E_DELTS_IND 28 -#define WLC_E_BCNSENT_IND 29 -#define WLC_E_BCNRX_MSG 30 -#define WLC_E_BCNLOST_MSG 31 -#define WLC_E_ROAM_PREP 32 -#define WLC_E_PFN_NET_FOUND 33 -#define WLC_E_PFN_NET_LOST 34 -#define WLC_E_RESET_COMPLETE 35 -#define WLC_E_JOIN_START 36 -#define WLC_E_ROAM_START 37 -#define WLC_E_ASSOC_START 38 -#define WLC_E_IBSS_ASSOC 39 -#define WLC_E_RADIO 40 -#define WLC_E_PSM_WATCHDOG 41 -#define WLC_E_PROBREQ_MSG 44 -#define WLC_E_SCAN_CONFIRM_IND 45 -#define WLC_E_PSK_SUP 46 -#define WLC_E_COUNTRY_CODE_CHANGED 47 -#define WLC_E_EXCEEDED_MEDIUM_TIME 48 -#define WLC_E_ICV_ERROR 49 -#define WLC_E_UNICAST_DECODE_ERROR 50 -#define WLC_E_MULTICAST_DECODE_ERROR 51 -#define WLC_E_TRACE 52 -#define WLC_E_IF 54 -#define WLC_E_RSSI 56 -#define WLC_E_PFN_SCAN_COMPLETE 57 -#define WLC_E_EXTLOG_MSG 58 -#define WLC_E_ACTION_FRAME 59 -#define WLC_E_ACTION_FRAME_COMPLETE 60 -#define WLC_E_PRE_ASSOC_IND 61 -#define WLC_E_PRE_REASSOC_IND 62 -#define WLC_E_CHANNEL_ADOPTED 63 -#define WLC_E_AP_STARTED 64 -#define WLC_E_DFS_AP_STOP 65 -#define WLC_E_DFS_AP_RESUME 66 -#define WLC_E_RESERVED1 67 -#define WLC_E_RESERVED2 68 -#define WLC_E_ESCAN_RESULT 69 -#define WLC_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70 -#define WLC_E_DCS_REQUEST 73 - -#define WLC_E_FIFO_CREDIT_MAP 74 - -#define WLC_E_LAST 75 - -typedef struct { - uint event; - const char *name; -} bcmevent_name_t; - -extern const bcmevent_name_t bcmevent_names[]; -extern const int bcmevent_names_size; - -#define WLC_E_STATUS_SUCCESS 0 -#define WLC_E_STATUS_FAIL 1 -#define WLC_E_STATUS_TIMEOUT 2 -#define WLC_E_STATUS_NO_NETWORKS 3 -#define WLC_E_STATUS_ABORT 4 -#define WLC_E_STATUS_NO_ACK 5 -#define WLC_E_STATUS_UNSOLICITED 6 -#define WLC_E_STATUS_ATTEMPT 7 -#define WLC_E_STATUS_PARTIAL 8 -#define WLC_E_STATUS_NEWSCAN 9 -#define WLC_E_STATUS_NEWASSOC 10 -#define WLC_E_STATUS_11HQUIET 11 -#define WLC_E_STATUS_SUPPRESS 12 -#define WLC_E_STATUS_NOCHANS 13 -#define WLC_E_STATUS_CS_ABORT 15 -#define WLC_E_STATUS_ERROR 16 - -#define WLC_E_REASON_INITIAL_ASSOC 0 -#define WLC_E_REASON_LOW_RSSI 1 -#define WLC_E_REASON_DEAUTH 2 -#define WLC_E_REASON_DISASSOC 3 -#define WLC_E_REASON_BCNS_LOST 4 -#define WLC_E_REASON_MINTXRATE 9 -#define WLC_E_REASON_TXFAIL 10 - -#define WLC_E_REASON_FAST_ROAM_FAILED 5 -#define WLC_E_REASON_DIRECTED_ROAM 6 -#define WLC_E_REASON_TSPEC_REJECTED 7 -#define WLC_E_REASON_BETTER_AP 8 - -#define WLC_E_PRUNE_ENCR_MISMATCH 1 -#define WLC_E_PRUNE_BCAST_BSSID 2 -#define WLC_E_PRUNE_MAC_DENY 3 -#define WLC_E_PRUNE_MAC_NA 4 -#define WLC_E_PRUNE_REG_PASSV 5 -#define WLC_E_PRUNE_SPCT_MGMT 6 -#define WLC_E_PRUNE_RADAR 7 -#define WLC_E_RSN_MISMATCH 8 -#define WLC_E_PRUNE_NO_COMMON_RATES 9 -#define WLC_E_PRUNE_BASIC_RATES 10 -#define WLC_E_PRUNE_CIPHER_NA 12 -#define WLC_E_PRUNE_KNOWN_STA 13 -#define WLC_E_PRUNE_WDS_PEER 15 -#define WLC_E_PRUNE_QBSS_LOAD 16 -#define WLC_E_PRUNE_HOME_AP 17 - -#define WLC_E_SUP_OTHER 0 -#define WLC_E_SUP_DECRYPT_KEY_DATA 1 -#define WLC_E_SUP_BAD_UCAST_WEP128 2 -#define WLC_E_SUP_BAD_UCAST_WEP40 3 -#define WLC_E_SUP_UNSUP_KEY_LEN 4 -#define WLC_E_SUP_PW_KEY_CIPHER 5 -#define WLC_E_SUP_MSG3_TOO_MANY_IE 6 -#define WLC_E_SUP_MSG3_IE_MISMATCH 7 -#define WLC_E_SUP_NO_INSTALL_FLAG 8 -#define WLC_E_SUP_MSG3_NO_GTK 9 -#define WLC_E_SUP_GRP_KEY_CIPHER 10 -#define WLC_E_SUP_GRP_MSG1_NO_GTK 11 -#define WLC_E_SUP_GTK_DECRYPT_FAIL 12 -#define WLC_E_SUP_SEND_FAIL 13 -#define WLC_E_SUP_DEAUTH 14 - -#define WLC_E_IF_ADD 1 -#define WLC_E_IF_DEL 2 -#define WLC_E_IF_CHANGE 3 - -#define WLC_E_IF_ROLE_STA 0 -#define WLC_E_IF_ROLE_AP 1 -#define WLC_E_IF_ROLE_WDS 2 - -#define WLC_E_LINK_BCN_LOSS 1 -#define WLC_E_LINK_DISASSOC 2 -#define WLC_E_LINK_ASSOC_REC 3 -#define WLC_E_LINK_BSSCFG_DIS 4 - -#endif /* _BCMEVENT_H_ */ diff --git a/drivers/staging/brcm80211/include/sbchipc.h b/drivers/staging/brcm80211/include/sbchipc.h deleted file mode 100644 index 8c01c638ab8..00000000000 --- a/drivers/staging/brcm80211/include/sbchipc.h +++ /dev/null @@ -1,1588 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SBCHIPC_H -#define _SBCHIPC_H - -#ifndef _LANGUAGE_ASSEMBLY - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -typedef volatile struct { - u32 chipid; /* 0x0 */ - u32 capabilities; - u32 corecontrol; /* corerev >= 1 */ - u32 bist; - - /* OTP */ - u32 otpstatus; /* 0x10, corerev >= 10 */ - u32 otpcontrol; - u32 otpprog; - u32 otplayout; /* corerev >= 23 */ - - /* Interrupt control */ - u32 intstatus; /* 0x20 */ - u32 intmask; - - /* Chip specific regs */ - u32 chipcontrol; /* 0x28, rev >= 11 */ - u32 chipstatus; /* 0x2c, rev >= 11 */ - - /* Jtag Master */ - u32 jtagcmd; /* 0x30, rev >= 10 */ - u32 jtagir; - u32 jtagdr; - u32 jtagctrl; - - /* serial flash interface registers */ - u32 flashcontrol; /* 0x40 */ - u32 flashaddress; - u32 flashdata; - u32 PAD[1]; - - /* Silicon backplane configuration broadcast control */ - u32 broadcastaddress; /* 0x50 */ - u32 broadcastdata; - - /* gpio - cleared only by power-on-reset */ - u32 gpiopullup; /* 0x58, corerev >= 20 */ - u32 gpiopulldown; /* 0x5c, corerev >= 20 */ - u32 gpioin; /* 0x60 */ - u32 gpioout; /* 0x64 */ - u32 gpioouten; /* 0x68 */ - u32 gpiocontrol; /* 0x6C */ - u32 gpiointpolarity; /* 0x70 */ - u32 gpiointmask; /* 0x74 */ - - /* GPIO events corerev >= 11 */ - u32 gpioevent; - u32 gpioeventintmask; - - /* Watchdog timer */ - u32 watchdog; /* 0x80 */ - - /* GPIO events corerev >= 11 */ - u32 gpioeventintpolarity; - - /* GPIO based LED powersave registers corerev >= 16 */ - u32 gpiotimerval; /* 0x88 */ - u32 gpiotimeroutmask; - - /* clock control */ - u32 clockcontrol_n; /* 0x90 */ - u32 clockcontrol_sb; /* aka m0 */ - u32 clockcontrol_pci; /* aka m1 */ - u32 clockcontrol_m2; /* mii/uart/mipsref */ - u32 clockcontrol_m3; /* cpu */ - u32 clkdiv; /* corerev >= 3 */ - u32 gpiodebugsel; /* corerev >= 28 */ - u32 capabilities_ext; /* 0xac */ - - /* pll delay registers (corerev >= 4) */ - u32 pll_on_delay; /* 0xb0 */ - u32 fref_sel_delay; - u32 slow_clk_ctl; /* 5 < corerev < 10 */ - u32 PAD; - - /* Instaclock registers (corerev >= 10) */ - u32 system_clk_ctl; /* 0xc0 */ - u32 clkstatestretch; - u32 PAD[2]; - - /* Indirect backplane access (corerev >= 22) */ - u32 bp_addrlow; /* 0xd0 */ - u32 bp_addrhigh; - u32 bp_data; - u32 PAD; - u32 bp_indaccess; - u32 PAD[3]; - - /* More clock dividers (corerev >= 32) */ - u32 clkdiv2; - u32 PAD[2]; - - /* In AI chips, pointer to erom */ - u32 eromptr; /* 0xfc */ - - /* ExtBus control registers (corerev >= 3) */ - u32 pcmcia_config; /* 0x100 */ - u32 pcmcia_memwait; - u32 pcmcia_attrwait; - u32 pcmcia_iowait; - u32 ide_config; - u32 ide_memwait; - u32 ide_attrwait; - u32 ide_iowait; - u32 prog_config; - u32 prog_waitcount; - u32 flash_config; - u32 flash_waitcount; - u32 SECI_config; /* 0x130 SECI configuration */ - u32 PAD[3]; - - /* Enhanced Coexistence Interface (ECI) registers (corerev >= 21) */ - u32 eci_output; /* 0x140 */ - u32 eci_control; - u32 eci_inputlo; - u32 eci_inputmi; - u32 eci_inputhi; - u32 eci_inputintpolaritylo; - u32 eci_inputintpolaritymi; - u32 eci_inputintpolarityhi; - u32 eci_intmasklo; - u32 eci_intmaskmi; - u32 eci_intmaskhi; - u32 eci_eventlo; - u32 eci_eventmi; - u32 eci_eventhi; - u32 eci_eventmasklo; - u32 eci_eventmaskmi; - u32 eci_eventmaskhi; - u32 PAD[3]; - - /* SROM interface (corerev >= 32) */ - u32 sromcontrol; /* 0x190 */ - u32 sromaddress; - u32 sromdata; - u32 PAD[17]; - - /* Clock control and hardware workarounds (corerev >= 20) */ - u32 clk_ctl_st; /* 0x1e0 */ - u32 hw_war; - u32 PAD[70]; - - /* UARTs */ - u8 uart0data; /* 0x300 */ - u8 uart0imr; - u8 uart0fcr; - u8 uart0lcr; - u8 uart0mcr; - u8 uart0lsr; - u8 uart0msr; - u8 uart0scratch; - u8 PAD[248]; /* corerev >= 1 */ - - u8 uart1data; /* 0x400 */ - u8 uart1imr; - u8 uart1fcr; - u8 uart1lcr; - u8 uart1mcr; - u8 uart1lsr; - u8 uart1msr; - u8 uart1scratch; - u32 PAD[126]; - - /* PMU registers (corerev >= 20) */ - u32 pmucontrol; /* 0x600 */ - u32 pmucapabilities; - u32 pmustatus; - u32 res_state; - u32 res_pending; - u32 pmutimer; - u32 min_res_mask; - u32 max_res_mask; - u32 res_table_sel; - u32 res_dep_mask; - u32 res_updn_timer; - u32 res_timer; - u32 clkstretch; - u32 pmuwatchdog; - u32 gpiosel; /* 0x638, rev >= 1 */ - u32 gpioenable; /* 0x63c, rev >= 1 */ - u32 res_req_timer_sel; - u32 res_req_timer; - u32 res_req_mask; - u32 PAD; - u32 chipcontrol_addr; /* 0x650 */ - u32 chipcontrol_data; /* 0x654 */ - u32 regcontrol_addr; - u32 regcontrol_data; - u32 pllcontrol_addr; - u32 pllcontrol_data; - u32 pmustrapopt; /* 0x668, corerev >= 28 */ - u32 pmu_xtalfreq; /* 0x66C, pmurev >= 10 */ - u32 PAD[100]; - u16 sromotp[768]; -} chipcregs_t; - -#endif /* _LANGUAGE_ASSEMBLY */ - -#if defined(__BIG_ENDIAN) && defined(BCMHND74K) -/* Selective swapped defines for those registers we need in - * big-endian code. - */ -#define CC_CHIPID 4 -#define CC_CAPABILITIES 0 -#define CC_CHIPST 0x28 -#define CC_EROMPTR 0xf8 - -#else /* !__BIG_ENDIAN || !BCMHND74K */ - -#define CC_CHIPID 0 -#define CC_CAPABILITIES 4 -#define CC_CHIPST 0x2c -#define CC_EROMPTR 0xfc - -#endif /* __BIG_ENDIAN && BCMHND74K */ - -#define CC_OTPST 0x10 -#define CC_JTAGCMD 0x30 -#define CC_JTAGIR 0x34 -#define CC_JTAGDR 0x38 -#define CC_JTAGCTRL 0x3c -#define CC_GPIOPU 0x58 -#define CC_GPIOPD 0x5c -#define CC_GPIOIN 0x60 -#define CC_GPIOOUT 0x64 -#define CC_GPIOOUTEN 0x68 -#define CC_GPIOCTRL 0x6c -#define CC_GPIOPOL 0x70 -#define CC_GPIOINTM 0x74 -#define CC_WATCHDOG 0x80 -#define CC_CLKC_N 0x90 -#define CC_CLKC_M0 0x94 -#define CC_CLKC_M1 0x98 -#define CC_CLKC_M2 0x9c -#define CC_CLKC_M3 0xa0 -#define CC_CLKDIV 0xa4 -#define CC_SYS_CLK_CTL 0xc0 -#define CC_CLK_CTL_ST SI_CLK_CTL_ST -#define PMU_CTL 0x600 -#define PMU_CAP 0x604 -#define PMU_ST 0x608 -#define PMU_RES_STATE 0x60c -#define PMU_TIMER 0x614 -#define PMU_MIN_RES_MASK 0x618 -#define PMU_MAX_RES_MASK 0x61c -#define CC_CHIPCTL_ADDR 0x650 -#define CC_CHIPCTL_DATA 0x654 -#define PMU_REG_CONTROL_ADDR 0x658 -#define PMU_REG_CONTROL_DATA 0x65C -#define PMU_PLL_CONTROL_ADDR 0x660 -#define PMU_PLL_CONTROL_DATA 0x664 -#define CC_SROM_OTP 0x800 /* SROM/OTP address space */ - -/* chipid */ -#define CID_ID_MASK 0x0000ffff /* Chip Id mask */ -#define CID_REV_MASK 0x000f0000 /* Chip Revision mask */ -#define CID_REV_SHIFT 16 /* Chip Revision shift */ -#define CID_PKG_MASK 0x00f00000 /* Package Option mask */ -#define CID_PKG_SHIFT 20 /* Package Option shift */ -#define CID_CC_MASK 0x0f000000 /* CoreCount (corerev >= 4) */ -#define CID_CC_SHIFT 24 -#define CID_TYPE_MASK 0xf0000000 /* Chip Type */ -#define CID_TYPE_SHIFT 28 - -/* capabilities */ -#define CC_CAP_UARTS_MASK 0x00000003 /* Number of UARTs */ -#define CC_CAP_MIPSEB 0x00000004 /* MIPS is in big-endian mode */ -#define CC_CAP_UCLKSEL 0x00000018 /* UARTs clock select */ -#define CC_CAP_UINTCLK 0x00000008 /* UARTs are driven by internal divided clock */ -#define CC_CAP_UARTGPIO 0x00000020 /* UARTs own GPIOs 15:12 */ -#define CC_CAP_EXTBUS_MASK 0x000000c0 /* External bus mask */ -#define CC_CAP_EXTBUS_NONE 0x00000000 /* No ExtBus present */ -#define CC_CAP_EXTBUS_FULL 0x00000040 /* ExtBus: PCMCIA, IDE & Prog */ -#define CC_CAP_EXTBUS_PROG 0x00000080 /* ExtBus: ProgIf only */ -#define CC_CAP_FLASH_MASK 0x00000700 /* Type of flash */ -#define CC_CAP_PLL_MASK 0x00038000 /* Type of PLL */ -#define CC_CAP_PWR_CTL 0x00040000 /* Power control */ -#define CC_CAP_OTPSIZE 0x00380000 /* OTP Size (0 = none) */ -#define CC_CAP_OTPSIZE_SHIFT 19 /* OTP Size shift */ -#define CC_CAP_OTPSIZE_BASE 5 /* OTP Size base */ -#define CC_CAP_JTAGP 0x00400000 /* JTAG Master Present */ -#define CC_CAP_ROM 0x00800000 /* Internal boot rom active */ -#define CC_CAP_BKPLN64 0x08000000 /* 64-bit backplane */ -#define CC_CAP_PMU 0x10000000 /* PMU Present, rev >= 20 */ -#define CC_CAP_SROM 0x40000000 /* Srom Present, rev >= 32 */ -#define CC_CAP_NFLASH 0x80000000 /* Nand flash present, rev >= 35 */ - -#define CC_CAP2_SECI 0x00000001 /* SECI Present, rev >= 36 */ -#define CC_CAP2_GSIO 0x00000002 /* GSIO (spi/i2c) present, rev >= 37 */ - -/* PLL type */ -#define PLL_NONE 0x00000000 -#define PLL_TYPE1 0x00010000 /* 48MHz base, 3 dividers */ -#define PLL_TYPE2 0x00020000 /* 48MHz, 4 dividers */ -#define PLL_TYPE3 0x00030000 /* 25MHz, 2 dividers */ -#define PLL_TYPE4 0x00008000 /* 48MHz, 4 dividers */ -#define PLL_TYPE5 0x00018000 /* 25MHz, 4 dividers */ -#define PLL_TYPE6 0x00028000 /* 100/200 or 120/240 only */ -#define PLL_TYPE7 0x00038000 /* 25MHz, 4 dividers */ - -/* ILP clock */ -#define ILP_CLOCK 32000 - -/* ALP clock on pre-PMU chips */ -#define ALP_CLOCK 20000000 - -/* HT clock */ -#define HT_CLOCK 80000000 - -/* corecontrol */ -#define CC_UARTCLKO 0x00000001 /* Drive UART with internal clock */ -#define CC_SE 0x00000002 /* sync clk out enable (corerev >= 3) */ -#define CC_UARTCLKEN 0x00000008 /* enable UART Clock (corerev > = 21 */ - -/* chipcontrol */ -#define CHIPCTRL_4321A0_DEFAULT 0x3a4 -#define CHIPCTRL_4321A1_DEFAULT 0x0a4 -#define CHIPCTRL_4321_PLL_DOWN 0x800000 /* serdes PLL down override */ - -/* Fields in the otpstatus register in rev >= 21 */ -#define OTPS_OL_MASK 0x000000ff -#define OTPS_OL_MFG 0x00000001 /* manuf row is locked */ -#define OTPS_OL_OR1 0x00000002 /* otp redundancy row 1 is locked */ -#define OTPS_OL_OR2 0x00000004 /* otp redundancy row 2 is locked */ -#define OTPS_OL_GU 0x00000008 /* general use region is locked */ -#define OTPS_GUP_MASK 0x00000f00 -#define OTPS_GUP_SHIFT 8 -#define OTPS_GUP_HW 0x00000100 /* h/w subregion is programmed */ -#define OTPS_GUP_SW 0x00000200 /* s/w subregion is programmed */ -#define OTPS_GUP_CI 0x00000400 /* chipid/pkgopt subregion is programmed */ -#define OTPS_GUP_FUSE 0x00000800 /* fuse subregion is programmed */ -#define OTPS_READY 0x00001000 -#define OTPS_RV(x) (1 << (16 + (x))) /* redundancy entry valid */ -#define OTPS_RV_MASK 0x0fff0000 - -/* Fields in the otpcontrol register in rev >= 21 */ -#define OTPC_PROGSEL 0x00000001 -#define OTPC_PCOUNT_MASK 0x0000000e -#define OTPC_PCOUNT_SHIFT 1 -#define OTPC_VSEL_MASK 0x000000f0 -#define OTPC_VSEL_SHIFT 4 -#define OTPC_TMM_MASK 0x00000700 -#define OTPC_TMM_SHIFT 8 -#define OTPC_ODM 0x00000800 -#define OTPC_PROGEN 0x80000000 - -/* Fields in otpprog in rev >= 21 and HND OTP */ -#define OTPP_COL_MASK 0x000000ff -#define OTPP_COL_SHIFT 0 -#define OTPP_ROW_MASK 0x0000ff00 -#define OTPP_ROW_SHIFT 8 -#define OTPP_OC_MASK 0x0f000000 -#define OTPP_OC_SHIFT 24 -#define OTPP_READERR 0x10000000 -#define OTPP_VALUE_MASK 0x20000000 -#define OTPP_VALUE_SHIFT 29 -#define OTPP_START_BUSY 0x80000000 -#define OTPP_READ 0x40000000 /* HND OTP */ - -/* otplayout reg corerev >= 36 */ -#define OTP_CISFORMAT_NEW 0x80000000 - -/* Opcodes for OTPP_OC field */ -#define OTPPOC_READ 0 -#define OTPPOC_BIT_PROG 1 -#define OTPPOC_VERIFY 3 -#define OTPPOC_INIT 4 -#define OTPPOC_SET 5 -#define OTPPOC_RESET 6 -#define OTPPOC_OCST 7 -#define OTPPOC_ROW_LOCK 8 -#define OTPPOC_PRESCN_TEST 9 - -/* Jtagm characteristics that appeared at a given corerev */ -#define JTAGM_CREV_OLD 10 /* Old command set, 16bit max IR */ -#define JTAGM_CREV_IRP 22 /* Able to do pause-ir */ -#define JTAGM_CREV_RTI 28 /* Able to do return-to-idle */ - -/* jtagcmd */ -#define JCMD_START 0x80000000 -#define JCMD_BUSY 0x80000000 -#define JCMD_STATE_MASK 0x60000000 -#define JCMD_STATE_TLR 0x00000000 /* Test-logic-reset */ -#define JCMD_STATE_PIR 0x20000000 /* Pause IR */ -#define JCMD_STATE_PDR 0x40000000 /* Pause DR */ -#define JCMD_STATE_RTI 0x60000000 /* Run-test-idle */ -#define JCMD0_ACC_MASK 0x0000f000 -#define JCMD0_ACC_IRDR 0x00000000 -#define JCMD0_ACC_DR 0x00001000 -#define JCMD0_ACC_IR 0x00002000 -#define JCMD0_ACC_RESET 0x00003000 -#define JCMD0_ACC_IRPDR 0x00004000 -#define JCMD0_ACC_PDR 0x00005000 -#define JCMD0_IRW_MASK 0x00000f00 -#define JCMD_ACC_MASK 0x000f0000 /* Changes for corerev 11 */ -#define JCMD_ACC_IRDR 0x00000000 -#define JCMD_ACC_DR 0x00010000 -#define JCMD_ACC_IR 0x00020000 -#define JCMD_ACC_RESET 0x00030000 -#define JCMD_ACC_IRPDR 0x00040000 -#define JCMD_ACC_PDR 0x00050000 -#define JCMD_ACC_PIR 0x00060000 -#define JCMD_ACC_IRDR_I 0x00070000 /* rev 28: return to run-test-idle */ -#define JCMD_ACC_DR_I 0x00080000 /* rev 28: return to run-test-idle */ -#define JCMD_IRW_MASK 0x00001f00 -#define JCMD_IRW_SHIFT 8 -#define JCMD_DRW_MASK 0x0000003f - -/* jtagctrl */ -#define JCTRL_FORCE_CLK 4 /* Force clock */ -#define JCTRL_EXT_EN 2 /* Enable external targets */ -#define JCTRL_EN 1 /* Enable Jtag master */ - -/* Fields in clkdiv */ -#define CLKD_SFLASH 0x0f000000 -#define CLKD_SFLASH_SHIFT 24 -#define CLKD_OTP 0x000f0000 -#define CLKD_OTP_SHIFT 16 -#define CLKD_JTAG 0x00000f00 -#define CLKD_JTAG_SHIFT 8 -#define CLKD_UART 0x000000ff - -#define CLKD2_SROM 0x00000003 - -/* intstatus/intmask */ -#define CI_GPIO 0x00000001 /* gpio intr */ -#define CI_EI 0x00000002 /* extif intr (corerev >= 3) */ -#define CI_TEMP 0x00000004 /* temp. ctrl intr (corerev >= 15) */ -#define CI_SIRQ 0x00000008 /* serial IRQ intr (corerev >= 15) */ -#define CI_PMU 0x00000020 /* pmu intr (corerev >= 21) */ -#define CI_UART 0x00000040 /* uart intr (corerev >= 21) */ -#define CI_WDRESET 0x80000000 /* watchdog reset occurred */ - -/* slow_clk_ctl */ -#define SCC_SS_MASK 0x00000007 /* slow clock source mask */ -#define SCC_SS_LPO 0x00000000 /* source of slow clock is LPO */ -#define SCC_SS_XTAL 0x00000001 /* source of slow clock is crystal */ -#define SCC_SS_PCI 0x00000002 /* source of slow clock is PCI */ -#define SCC_LF 0x00000200 /* LPOFreqSel, 1: 160Khz, 0: 32KHz */ -#define SCC_LP 0x00000400 /* LPOPowerDown, 1: LPO is disabled, - * 0: LPO is enabled - */ -#define SCC_FS 0x00000800 /* ForceSlowClk, 1: sb/cores running on slow clock, - * 0: power logic control - */ -#define SCC_IP 0x00001000 /* IgnorePllOffReq, 1/0: power logic ignores/honors - * PLL clock disable requests from core - */ -#define SCC_XC 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't - * disable crystal when appropriate - */ -#define SCC_XP 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */ -#define SCC_CD_MASK 0xffff0000 /* ClockDivider (SlowClk = 1/(4+divisor)) */ -#define SCC_CD_SHIFT 16 - -/* system_clk_ctl */ -#define SYCC_IE 0x00000001 /* ILPen: Enable Idle Low Power */ -#define SYCC_AE 0x00000002 /* ALPen: Enable Active Low Power */ -#define SYCC_FP 0x00000004 /* ForcePLLOn */ -#define SYCC_AR 0x00000008 /* Force ALP (or HT if ALPen is not set */ -#define SYCC_HR 0x00000010 /* Force HT */ -#define SYCC_CD_MASK 0xffff0000 /* ClkDiv (ILP = 1/(4 * (divisor + 1)) */ -#define SYCC_CD_SHIFT 16 - -/* Indirect backplane access */ -#define BPIA_BYTEEN 0x0000000f -#define BPIA_SZ1 0x00000001 -#define BPIA_SZ2 0x00000003 -#define BPIA_SZ4 0x00000007 -#define BPIA_SZ8 0x0000000f -#define BPIA_WRITE 0x00000100 -#define BPIA_START 0x00000200 -#define BPIA_BUSY 0x00000200 -#define BPIA_ERROR 0x00000400 - -/* pcmcia/prog/flash_config */ -#define CF_EN 0x00000001 /* enable */ -#define CF_EM_MASK 0x0000000e /* mode */ -#define CF_EM_SHIFT 1 -#define CF_EM_FLASH 0 /* flash/asynchronous mode */ -#define CF_EM_SYNC 2 /* synchronous mode */ -#define CF_EM_PCMCIA 4 /* pcmcia mode */ -#define CF_DS 0x00000010 /* destsize: 0=8bit, 1=16bit */ -#define CF_BS 0x00000020 /* byteswap */ -#define CF_CD_MASK 0x000000c0 /* clock divider */ -#define CF_CD_SHIFT 6 -#define CF_CD_DIV2 0x00000000 /* backplane/2 */ -#define CF_CD_DIV3 0x00000040 /* backplane/3 */ -#define CF_CD_DIV4 0x00000080 /* backplane/4 */ -#define CF_CE 0x00000100 /* clock enable */ -#define CF_SB 0x00000200 /* size/bytestrobe (synch only) */ - -/* pcmcia_memwait */ -#define PM_W0_MASK 0x0000003f /* waitcount0 */ -#define PM_W1_MASK 0x00001f00 /* waitcount1 */ -#define PM_W1_SHIFT 8 -#define PM_W2_MASK 0x001f0000 /* waitcount2 */ -#define PM_W2_SHIFT 16 -#define PM_W3_MASK 0x1f000000 /* waitcount3 */ -#define PM_W3_SHIFT 24 - -/* pcmcia_attrwait */ -#define PA_W0_MASK 0x0000003f /* waitcount0 */ -#define PA_W1_MASK 0x00001f00 /* waitcount1 */ -#define PA_W1_SHIFT 8 -#define PA_W2_MASK 0x001f0000 /* waitcount2 */ -#define PA_W2_SHIFT 16 -#define PA_W3_MASK 0x1f000000 /* waitcount3 */ -#define PA_W3_SHIFT 24 - -/* pcmcia_iowait */ -#define PI_W0_MASK 0x0000003f /* waitcount0 */ -#define PI_W1_MASK 0x00001f00 /* waitcount1 */ -#define PI_W1_SHIFT 8 -#define PI_W2_MASK 0x001f0000 /* waitcount2 */ -#define PI_W2_SHIFT 16 -#define PI_W3_MASK 0x1f000000 /* waitcount3 */ -#define PI_W3_SHIFT 24 - -/* prog_waitcount */ -#define PW_W0_MASK 0x0000001f /* waitcount0 */ -#define PW_W1_MASK 0x00001f00 /* waitcount1 */ -#define PW_W1_SHIFT 8 -#define PW_W2_MASK 0x001f0000 /* waitcount2 */ -#define PW_W2_SHIFT 16 -#define PW_W3_MASK 0x1f000000 /* waitcount3 */ -#define PW_W3_SHIFT 24 - -#define PW_W0 0x0000000c -#define PW_W1 0x00000a00 -#define PW_W2 0x00020000 -#define PW_W3 0x01000000 - -/* flash_waitcount */ -#define FW_W0_MASK 0x0000003f /* waitcount0 */ -#define FW_W1_MASK 0x00001f00 /* waitcount1 */ -#define FW_W1_SHIFT 8 -#define FW_W2_MASK 0x001f0000 /* waitcount2 */ -#define FW_W2_SHIFT 16 -#define FW_W3_MASK 0x1f000000 /* waitcount3 */ -#define FW_W3_SHIFT 24 - -/* When Srom support present, fields in sromcontrol */ -#define SRC_START 0x80000000 -#define SRC_BUSY 0x80000000 -#define SRC_OPCODE 0x60000000 -#define SRC_OP_READ 0x00000000 -#define SRC_OP_WRITE 0x20000000 -#define SRC_OP_WRDIS 0x40000000 -#define SRC_OP_WREN 0x60000000 -#define SRC_OTPSEL 0x00000010 -#define SRC_LOCK 0x00000008 -#define SRC_SIZE_MASK 0x00000006 -#define SRC_SIZE_1K 0x00000000 -#define SRC_SIZE_4K 0x00000002 -#define SRC_SIZE_16K 0x00000004 -#define SRC_SIZE_SHIFT 1 -#define SRC_PRESENT 0x00000001 - -/* Fields in pmucontrol */ -#define PCTL_ILP_DIV_MASK 0xffff0000 -#define PCTL_ILP_DIV_SHIFT 16 -#define PCTL_PLL_PLLCTL_UPD 0x00000400 /* rev 2 */ -#define PCTL_NOILP_ON_WAIT 0x00000200 /* rev 1 */ -#define PCTL_HT_REQ_EN 0x00000100 -#define PCTL_ALP_REQ_EN 0x00000080 -#define PCTL_XTALFREQ_MASK 0x0000007c -#define PCTL_XTALFREQ_SHIFT 2 -#define PCTL_ILP_DIV_EN 0x00000002 -#define PCTL_LPO_SEL 0x00000001 - -/* Fields in clkstretch */ -#define CSTRETCH_HT 0xffff0000 -#define CSTRETCH_ALP 0x0000ffff - -/* gpiotimerval */ -#define GPIO_ONTIME_SHIFT 16 - -/* clockcontrol_n */ -#define CN_N1_MASK 0x3f /* n1 control */ -#define CN_N2_MASK 0x3f00 /* n2 control */ -#define CN_N2_SHIFT 8 -#define CN_PLLC_MASK 0xf0000 /* pll control */ -#define CN_PLLC_SHIFT 16 - -/* clockcontrol_sb/pci/uart */ -#define CC_M1_MASK 0x3f /* m1 control */ -#define CC_M2_MASK 0x3f00 /* m2 control */ -#define CC_M2_SHIFT 8 -#define CC_M3_MASK 0x3f0000 /* m3 control */ -#define CC_M3_SHIFT 16 -#define CC_MC_MASK 0x1f000000 /* mux control */ -#define CC_MC_SHIFT 24 - -/* N3M Clock control magic field values */ -#define CC_F6_2 0x02 /* A factor of 2 in */ -#define CC_F6_3 0x03 /* 6-bit fields like */ -#define CC_F6_4 0x05 /* N1, M1 or M3 */ -#define CC_F6_5 0x09 -#define CC_F6_6 0x11 -#define CC_F6_7 0x21 - -#define CC_F5_BIAS 5 /* 5-bit fields get this added */ - -#define CC_MC_BYPASS 0x08 -#define CC_MC_M1 0x04 -#define CC_MC_M1M2 0x02 -#define CC_MC_M1M2M3 0x01 -#define CC_MC_M1M3 0x11 - -/* Type 2 Clock control magic field values */ -#define CC_T2_BIAS 2 /* n1, n2, m1 & m3 bias */ -#define CC_T2M2_BIAS 3 /* m2 bias */ - -#define CC_T2MC_M1BYP 1 -#define CC_T2MC_M2BYP 2 -#define CC_T2MC_M3BYP 4 - -/* Type 6 Clock control magic field values */ -#define CC_T6_MMASK 1 /* bits of interest in m */ -#define CC_T6_M0 120000000 /* sb clock for m = 0 */ -#define CC_T6_M1 100000000 /* sb clock for m = 1 */ -#define SB2MIPS_T6(sb) (2 * (sb)) - -/* Common clock base */ -#define CC_CLOCK_BASE1 24000000 /* Half the clock freq */ -#define CC_CLOCK_BASE2 12500000 /* Alternate crystal on some PLLs */ - -/* Clock control values for 200MHz in 5350 */ -#define CLKC_5350_N 0x0311 -#define CLKC_5350_M 0x04020009 - -/* Flash types in the chipcommon capabilities register */ -#define FLASH_NONE 0x000 /* No flash */ -#define SFLASH_ST 0x100 /* ST serial flash */ -#define SFLASH_AT 0x200 /* Atmel serial flash */ -#define PFLASH 0x700 /* Parallel flash */ - -/* Bits in the ExtBus config registers */ -#define CC_CFG_EN 0x0001 /* Enable */ -#define CC_CFG_EM_MASK 0x000e /* Extif Mode */ -#define CC_CFG_EM_ASYNC 0x0000 /* Async/Parallel flash */ -#define CC_CFG_EM_SYNC 0x0002 /* Synchronous */ -#define CC_CFG_EM_PCMCIA 0x0004 /* PCMCIA */ -#define CC_CFG_EM_IDE 0x0006 /* IDE */ -#define CC_CFG_DS 0x0010 /* Data size, 0=8bit, 1=16bit */ -#define CC_CFG_CD_MASK 0x00e0 /* Sync: Clock divisor, rev >= 20 */ -#define CC_CFG_CE 0x0100 /* Sync: Clock enable, rev >= 20 */ -#define CC_CFG_SB 0x0200 /* Sync: Size/Bytestrobe, rev >= 20 */ -#define CC_CFG_IS 0x0400 /* Extif Sync Clk Select, rev >= 20 */ - -/* ExtBus address space */ -#define CC_EB_BASE 0x1a000000 /* Chipc ExtBus base address */ -#define CC_EB_PCMCIA_MEM 0x1a000000 /* PCMCIA 0 memory base address */ -#define CC_EB_PCMCIA_IO 0x1a200000 /* PCMCIA 0 I/O base address */ -#define CC_EB_PCMCIA_CFG 0x1a400000 /* PCMCIA 0 config base address */ -#define CC_EB_IDE 0x1a800000 /* IDE memory base */ -#define CC_EB_PCMCIA1_MEM 0x1a800000 /* PCMCIA 1 memory base address */ -#define CC_EB_PCMCIA1_IO 0x1aa00000 /* PCMCIA 1 I/O base address */ -#define CC_EB_PCMCIA1_CFG 0x1ac00000 /* PCMCIA 1 config base address */ -#define CC_EB_PROGIF 0x1b000000 /* ProgIF Async/Sync base address */ - -/* Start/busy bit in flashcontrol */ -#define SFLASH_OPCODE 0x000000ff -#define SFLASH_ACTION 0x00000700 -#define SFLASH_CS_ACTIVE 0x00001000 /* Chip Select Active, rev >= 20 */ -#define SFLASH_START 0x80000000 -#define SFLASH_BUSY SFLASH_START - -/* flashcontrol action codes */ -#define SFLASH_ACT_OPONLY 0x0000 /* Issue opcode only */ -#define SFLASH_ACT_OP1D 0x0100 /* opcode + 1 data byte */ -#define SFLASH_ACT_OP3A 0x0200 /* opcode + 3 addr bytes */ -#define SFLASH_ACT_OP3A1D 0x0300 /* opcode + 3 addr & 1 data bytes */ -#define SFLASH_ACT_OP3A4D 0x0400 /* opcode + 3 addr & 4 data bytes */ -#define SFLASH_ACT_OP3A4X4D 0x0500 /* opcode + 3 addr, 4 don't care & 4 data bytes */ -#define SFLASH_ACT_OP3A1X4D 0x0700 /* opcode + 3 addr, 1 don't care & 4 data bytes */ - -/* flashcontrol action+opcodes for ST flashes */ -#define SFLASH_ST_WREN 0x0006 /* Write Enable */ -#define SFLASH_ST_WRDIS 0x0004 /* Write Disable */ -#define SFLASH_ST_RDSR 0x0105 /* Read Status Register */ -#define SFLASH_ST_WRSR 0x0101 /* Write Status Register */ -#define SFLASH_ST_READ 0x0303 /* Read Data Bytes */ -#define SFLASH_ST_PP 0x0302 /* Page Program */ -#define SFLASH_ST_SE 0x02d8 /* Sector Erase */ -#define SFLASH_ST_BE 0x00c7 /* Bulk Erase */ -#define SFLASH_ST_DP 0x00b9 /* Deep Power-down */ -#define SFLASH_ST_RES 0x03ab /* Read Electronic Signature */ -#define SFLASH_ST_CSA 0x1000 /* Keep chip select asserted */ -#define SFLASH_ST_SSE 0x0220 /* Sub-sector Erase */ - -/* Status register bits for ST flashes */ -#define SFLASH_ST_WIP 0x01 /* Write In Progress */ -#define SFLASH_ST_WEL 0x02 /* Write Enable Latch */ -#define SFLASH_ST_BP_MASK 0x1c /* Block Protect */ -#define SFLASH_ST_BP_SHIFT 2 -#define SFLASH_ST_SRWD 0x80 /* Status Register Write Disable */ - -/* flashcontrol action+opcodes for Atmel flashes */ -#define SFLASH_AT_READ 0x07e8 -#define SFLASH_AT_PAGE_READ 0x07d2 -#define SFLASH_AT_BUF1_READ -#define SFLASH_AT_BUF2_READ -#define SFLASH_AT_STATUS 0x01d7 -#define SFLASH_AT_BUF1_WRITE 0x0384 -#define SFLASH_AT_BUF2_WRITE 0x0387 -#define SFLASH_AT_BUF1_ERASE_PROGRAM 0x0283 -#define SFLASH_AT_BUF2_ERASE_PROGRAM 0x0286 -#define SFLASH_AT_BUF1_PROGRAM 0x0288 -#define SFLASH_AT_BUF2_PROGRAM 0x0289 -#define SFLASH_AT_PAGE_ERASE 0x0281 -#define SFLASH_AT_BLOCK_ERASE 0x0250 -#define SFLASH_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382 -#define SFLASH_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385 -#define SFLASH_AT_BUF1_LOAD 0x0253 -#define SFLASH_AT_BUF2_LOAD 0x0255 -#define SFLASH_AT_BUF1_COMPARE 0x0260 -#define SFLASH_AT_BUF2_COMPARE 0x0261 -#define SFLASH_AT_BUF1_REPROGRAM 0x0258 -#define SFLASH_AT_BUF2_REPROGRAM 0x0259 - -/* Status register bits for Atmel flashes */ -#define SFLASH_AT_READY 0x80 -#define SFLASH_AT_MISMATCH 0x40 -#define SFLASH_AT_ID_MASK 0x38 -#define SFLASH_AT_ID_SHIFT 3 - -/* - * These are the UART port assignments, expressed as offsets from the base - * register. These assignments should hold for any serial port based on - * a 8250, 16450, or 16550(A). - */ - -#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ -#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ -#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ -#define UART_IER 1 /* In/Out: Interrupt Enable Register (DLAB=0) */ -#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */ -#define UART_IIR 2 /* In: Interrupt Identity Register */ -#define UART_FCR 2 /* Out: FIFO Control Register */ -#define UART_LCR 3 /* Out: Line Control Register */ -#define UART_MCR 4 /* Out: Modem Control Register */ -#define UART_LSR 5 /* In: Line Status Register */ -#define UART_MSR 6 /* In: Modem Status Register */ -#define UART_SCR 7 /* I/O: Scratch Register */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ -#define UART_LCR_WLEN8 0x03 /* Word length: 8 bits */ -#define UART_MCR_OUT2 0x08 /* MCR GPIO out 2 */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ -#define UART_LSR_RX_FIFO 0x80 /* Receive FIFO error */ -#define UART_LSR_TDHR 0x40 /* Data-hold-register empty */ -#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ -#define UART_LSR_BREAK 0x10 /* Break interrupt */ -#define UART_LSR_FRAMING 0x08 /* Framing error */ -#define UART_LSR_PARITY 0x04 /* Parity error */ -#define UART_LSR_OVERRUN 0x02 /* Overrun error */ -#define UART_LSR_RXRDY 0x01 /* Receiver ready */ -#define UART_FCR_FIFO_ENABLE 1 /* FIFO control register bit controlling FIFO enable/disable */ - -/* Interrupt Identity Register (IIR) bits */ -#define UART_IIR_FIFO_MASK 0xc0 /* IIR FIFO disable/enabled mask */ -#define UART_IIR_INT_MASK 0xf /* IIR interrupt ID source */ -#define UART_IIR_MDM_CHG 0x0 /* Modem status changed */ -#define UART_IIR_NOINT 0x1 /* No interrupt pending */ -#define UART_IIR_THRE 0x2 /* THR empty */ -#define UART_IIR_RCVD_DATA 0x4 /* Received data available */ -#define UART_IIR_RCVR_STATUS 0x6 /* Receiver status */ -#define UART_IIR_CHAR_TIME 0xc /* Character time */ - -/* Interrupt Enable Register (IER) bits */ -#define UART_IER_EDSSI 8 /* enable modem status interrupt */ -#define UART_IER_ELSI 4 /* enable receiver line status interrupt */ -#define UART_IER_ETBEI 2 /* enable transmitter holding register empty interrupt */ -#define UART_IER_ERBFI 1 /* enable data available interrupt */ - -/* pmustatus */ -#define PST_EXTLPOAVAIL 0x0100 -#define PST_WDRESET 0x0080 -#define PST_INTPEND 0x0040 -#define PST_SBCLKST 0x0030 -#define PST_SBCLKST_ILP 0x0010 -#define PST_SBCLKST_ALP 0x0020 -#define PST_SBCLKST_HT 0x0030 -#define PST_ALPAVAIL 0x0008 -#define PST_HTAVAIL 0x0004 -#define PST_RESINIT 0x0003 - -/* pmucapabilities */ -#define PCAP_REV_MASK 0x000000ff -#define PCAP_RC_MASK 0x00001f00 -#define PCAP_RC_SHIFT 8 -#define PCAP_TC_MASK 0x0001e000 -#define PCAP_TC_SHIFT 13 -#define PCAP_PC_MASK 0x001e0000 -#define PCAP_PC_SHIFT 17 -#define PCAP_VC_MASK 0x01e00000 -#define PCAP_VC_SHIFT 21 -#define PCAP_CC_MASK 0x1e000000 -#define PCAP_CC_SHIFT 25 -#define PCAP5_PC_MASK 0x003e0000 /* PMU corerev >= 5 */ -#define PCAP5_PC_SHIFT 17 -#define PCAP5_VC_MASK 0x07c00000 -#define PCAP5_VC_SHIFT 22 -#define PCAP5_CC_MASK 0xf8000000 -#define PCAP5_CC_SHIFT 27 - -/* PMU Resource Request Timer registers */ -/* This is based on PmuRev0 */ -#define PRRT_TIME_MASK 0x03ff -#define PRRT_INTEN 0x0400 -#define PRRT_REQ_ACTIVE 0x0800 -#define PRRT_ALP_REQ 0x1000 -#define PRRT_HT_REQ 0x2000 - -/* PMU resource bit position */ -#define PMURES_BIT(bit) (1 << (bit)) - -/* PMU resource number limit */ -#define PMURES_MAX_RESNUM 30 - -/* PMU chip control0 register */ -#define PMU_CHIPCTL0 0 - -/* PMU chip control1 register */ -#define PMU_CHIPCTL1 1 -#define PMU_CC1_RXC_DLL_BYPASS 0x00010000 - -#define PMU_CC1_IF_TYPE_MASK 0x00000030 -#define PMU_CC1_IF_TYPE_RMII 0x00000000 -#define PMU_CC1_IF_TYPE_MII 0x00000010 -#define PMU_CC1_IF_TYPE_RGMII 0x00000020 - -#define PMU_CC1_SW_TYPE_MASK 0x000000c0 -#define PMU_CC1_SW_TYPE_EPHY 0x00000000 -#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040 -#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080 -#define PMU_CC1_SW_TYPE_RGMII 0x000000c0 - -/* PMU corerev and chip specific PLL controls. - * PMU<rev>_PLL<num>_XX where <rev> is PMU corerev and <num> is an arbitrary number - * to differentiate different PLLs controlled by the same PMU rev. - */ -/* pllcontrol registers */ -/* PDIV, div_phy, div_arm, div_adc, dith_sel, ioff, kpd_scale, lsb_sel, mash_sel, lf_c & lf_r */ -#define PMU0_PLL0_PLLCTL0 0 -#define PMU0_PLL0_PC0_PDIV_MASK 1 -#define PMU0_PLL0_PC0_PDIV_FREQ 25000 -#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038 -#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3 -#define PMU0_PLL0_PC0_DIV_ARM_BASE 8 - -/* PC0_DIV_ARM for PLLOUT_ARM */ -#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0 -#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1 -#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2 -#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 /* Default */ -#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4 -#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5 -#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6 -#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7 - -/* Wildcard base, stop_mod, en_lf_tp, en_cal & lf_r2 */ -#define PMU0_PLL0_PLLCTL1 1 -#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000 -#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28 -#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00 -#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8 -#define PMU0_PLL0_PC1_STOP_MOD 0x00000040 - -/* Wildcard base, vco_calvar, vco_swc, vco_var_selref, vso_ical & vco_sel_avdd */ -#define PMU0_PLL0_PLLCTL2 2 -#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf -#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4 - -/* pllcontrol registers */ -/* ndiv_pwrdn, pwrdn_ch<x>, refcomp_pwrdn, dly_ch<x>, p1div, p2div, _bypass_sdmod */ -#define PMU1_PLL0_PLLCTL0 0 -#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000 -#define PMU1_PLL0_PC0_P1DIV_SHIFT 20 -#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000 -#define PMU1_PLL0_PC0_P2DIV_SHIFT 24 - -/* m<x>div */ -#define PMU1_PLL0_PLLCTL1 1 -#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff -#define PMU1_PLL0_PC1_M1DIV_SHIFT 0 -#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00 -#define PMU1_PLL0_PC1_M2DIV_SHIFT 8 -#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000 -#define PMU1_PLL0_PC1_M3DIV_SHIFT 16 -#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 -#define PMU1_PLL0_PC1_M4DIV_SHIFT 24 - -#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8 -#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) -#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) - -/* m<x>div, ndiv_dither_mfb, ndiv_mode, ndiv_int */ -#define PMU1_PLL0_PLLCTL2 2 -#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff -#define PMU1_PLL0_PC2_M5DIV_SHIFT 0 -#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00 -#define PMU1_PLL0_PC2_M6DIV_SHIFT 8 -#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000 -#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17 -#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1 -#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 /* recommended for 4319 */ -#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000 -#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20 - -/* ndiv_frac */ -#define PMU1_PLL0_PLLCTL3 3 -#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff -#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0 - -/* pll_ctrl */ -#define PMU1_PLL0_PLLCTL4 4 - -/* pll_ctrl, vco_rng, clkdrive_ch<x> */ -#define PMU1_PLL0_PLLCTL5 5 -#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00 -#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8 - -/* PMU rev 2 control words */ -#define PMU2_PHY_PLL_PLLCTL 4 -#define PMU2_SI_PLL_PLLCTL 10 - -/* PMU rev 2 */ -/* pllcontrol registers */ -/* ndiv_pwrdn, pwrdn_ch<x>, refcomp_pwrdn, dly_ch<x>, p1div, p2div, _bypass_sdmod */ -#define PMU2_PLL_PLLCTL0 0 -#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000 -#define PMU2_PLL_PC0_P1DIV_SHIFT 20 -#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000 -#define PMU2_PLL_PC0_P2DIV_SHIFT 24 - -/* m<x>div */ -#define PMU2_PLL_PLLCTL1 1 -#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff -#define PMU2_PLL_PC1_M1DIV_SHIFT 0 -#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00 -#define PMU2_PLL_PC1_M2DIV_SHIFT 8 -#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000 -#define PMU2_PLL_PC1_M3DIV_SHIFT 16 -#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000 -#define PMU2_PLL_PC1_M4DIV_SHIFT 24 - -/* m<x>div, ndiv_dither_mfb, ndiv_mode, ndiv_int */ -#define PMU2_PLL_PLLCTL2 2 -#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff -#define PMU2_PLL_PC2_M5DIV_SHIFT 0 -#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00 -#define PMU2_PLL_PC2_M6DIV_SHIFT 8 -#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000 -#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17 -#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000 -#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20 - -/* ndiv_frac */ -#define PMU2_PLL_PLLCTL3 3 -#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff -#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0 - -/* pll_ctrl */ -#define PMU2_PLL_PLLCTL4 4 - -/* pll_ctrl, vco_rng, clkdrive_ch<x> */ -#define PMU2_PLL_PLLCTL5 5 -#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00 -#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8 -#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000 -#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12 -#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000 -#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16 -#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000 -#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20 -#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000 -#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24 -#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000 -#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28 - -/* PMU rev 5 (& 6) */ -#define PMU5_PLL_P1P2_OFF 0 -#define PMU5_PLL_P1_MASK 0x0f000000 -#define PMU5_PLL_P1_SHIFT 24 -#define PMU5_PLL_P2_MASK 0x00f00000 -#define PMU5_PLL_P2_SHIFT 20 -#define PMU5_PLL_M14_OFF 1 -#define PMU5_PLL_MDIV_MASK 0x000000ff -#define PMU5_PLL_MDIV_WIDTH 8 -#define PMU5_PLL_NM5_OFF 2 -#define PMU5_PLL_NDIV_MASK 0xfff00000 -#define PMU5_PLL_NDIV_SHIFT 20 -#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000 -#define PMU5_PLL_NDIV_MODE_SHIFT 17 -#define PMU5_PLL_FMAB_OFF 3 -#define PMU5_PLL_MRAT_MASK 0xf0000000 -#define PMU5_PLL_MRAT_SHIFT 28 -#define PMU5_PLL_ABRAT_MASK 0x08000000 -#define PMU5_PLL_ABRAT_SHIFT 27 -#define PMU5_PLL_FDIV_MASK 0x07ffffff -#define PMU5_PLL_PLLCTL_OFF 4 -#define PMU5_PLL_PCHI_OFF 5 -#define PMU5_PLL_PCHI_MASK 0x0000003f - -/* pmu XtalFreqRatio */ -#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF -#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000 -#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31 - -/* Divider allocation in 4716/47162/5356/5357 */ -#define PMU5_MAINPLL_CPU 1 -#define PMU5_MAINPLL_MEM 2 -#define PMU5_MAINPLL_SI 3 - -#define PMU7_PLL_PLLCTL7 7 -#define PMU7_PLL_PLLCTL8 8 -#define PMU7_PLL_PLLCTL11 11 - -/* PLL usage in 4716/47162 */ -#define PMU4716_MAINPLL_PLL0 12 - -/* PLL usage in 5356/5357 */ -#define PMU5356_MAINPLL_PLL0 0 -#define PMU5357_MAINPLL_PLL0 0 - -/* 4716/47162 resources */ -#define RES4716_PROC_PLL_ON 0x00000040 -#define RES4716_PROC_HT_AVAIL 0x00000080 - -/* 4716/4717/4718 Chip specific ChipControl register bits */ -#define CCTRL471X_I2S_PINS_ENABLE 0x0080 /* I2S pins off by default, shared with pflash */ - -/* 5354 resources */ -#define RES5354_EXT_SWITCHER_PWM 0 /* 0x00001 */ -#define RES5354_BB_SWITCHER_PWM 1 /* 0x00002 */ -#define RES5354_BB_SWITCHER_BURST 2 /* 0x00004 */ -#define RES5354_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */ -#define RES5354_ILP_REQUEST 4 /* 0x00010 */ -#define RES5354_RADIO_SWITCHER_PWM 5 /* 0x00020 */ -#define RES5354_RADIO_SWITCHER_BURST 6 /* 0x00040 */ -#define RES5354_ROM_SWITCH 7 /* 0x00080 */ -#define RES5354_PA_REF_LDO 8 /* 0x00100 */ -#define RES5354_RADIO_LDO 9 /* 0x00200 */ -#define RES5354_AFE_LDO 10 /* 0x00400 */ -#define RES5354_PLL_LDO 11 /* 0x00800 */ -#define RES5354_BG_FILTBYP 12 /* 0x01000 */ -#define RES5354_TX_FILTBYP 13 /* 0x02000 */ -#define RES5354_RX_FILTBYP 14 /* 0x04000 */ -#define RES5354_XTAL_PU 15 /* 0x08000 */ -#define RES5354_XTAL_EN 16 /* 0x10000 */ -#define RES5354_BB_PLL_FILTBYP 17 /* 0x20000 */ -#define RES5354_RF_PLL_FILTBYP 18 /* 0x40000 */ -#define RES5354_BB_PLL_PU 19 /* 0x80000 */ - -/* 5357 Chip specific ChipControl register bits */ -#define CCTRL5357_EXTPA (1<<14) /* extPA in ChipControl 1, bit 14 */ -#define CCTRL5357_ANT_MUX_2o3 (1<<15) /* 2o3 in ChipControl 1, bit 15 */ - -/* 4328 resources */ -#define RES4328_EXT_SWITCHER_PWM 0 /* 0x00001 */ -#define RES4328_BB_SWITCHER_PWM 1 /* 0x00002 */ -#define RES4328_BB_SWITCHER_BURST 2 /* 0x00004 */ -#define RES4328_BB_EXT_SWITCHER_BURST 3 /* 0x00008 */ -#define RES4328_ILP_REQUEST 4 /* 0x00010 */ -#define RES4328_RADIO_SWITCHER_PWM 5 /* 0x00020 */ -#define RES4328_RADIO_SWITCHER_BURST 6 /* 0x00040 */ -#define RES4328_ROM_SWITCH 7 /* 0x00080 */ -#define RES4328_PA_REF_LDO 8 /* 0x00100 */ -#define RES4328_RADIO_LDO 9 /* 0x00200 */ -#define RES4328_AFE_LDO 10 /* 0x00400 */ -#define RES4328_PLL_LDO 11 /* 0x00800 */ -#define RES4328_BG_FILTBYP 12 /* 0x01000 */ -#define RES4328_TX_FILTBYP 13 /* 0x02000 */ -#define RES4328_RX_FILTBYP 14 /* 0x04000 */ -#define RES4328_XTAL_PU 15 /* 0x08000 */ -#define RES4328_XTAL_EN 16 /* 0x10000 */ -#define RES4328_BB_PLL_FILTBYP 17 /* 0x20000 */ -#define RES4328_RF_PLL_FILTBYP 18 /* 0x40000 */ -#define RES4328_BB_PLL_PU 19 /* 0x80000 */ - -/* 4325 A0/A1 resources */ -#define RES4325_BUCK_BOOST_BURST 0 /* 0x00000001 */ -#define RES4325_CBUCK_BURST 1 /* 0x00000002 */ -#define RES4325_CBUCK_PWM 2 /* 0x00000004 */ -#define RES4325_CLDO_CBUCK_BURST 3 /* 0x00000008 */ -#define RES4325_CLDO_CBUCK_PWM 4 /* 0x00000010 */ -#define RES4325_BUCK_BOOST_PWM 5 /* 0x00000020 */ -#define RES4325_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4325_ABUCK_BURST 7 /* 0x00000080 */ -#define RES4325_ABUCK_PWM 8 /* 0x00000100 */ -#define RES4325_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4325_OTP_PU 10 /* 0x00000400 */ -#define RES4325_LNLDO3_PU 11 /* 0x00000800 */ -#define RES4325_LNLDO4_PU 12 /* 0x00001000 */ -#define RES4325_XTAL_PU 13 /* 0x00002000 */ -#define RES4325_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4325_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4325_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4325_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4325_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4325_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4325_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4325_HT_AVAIL 21 /* 0x00200000 */ - -/* 4325 B0/C0 resources */ -#define RES4325B0_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4325B0_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4325B0_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4325B0_CLDO_PU 4 /* 0x00000010 */ - -/* 4325 C1 resources */ -#define RES4325C1_LNLDO2_PU 12 /* 0x00001000 */ - -/* 4325 chip-specific ChipStatus register bits */ -#define CST4325_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4325_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ -#define CST4325_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ -#define CST4325_OTP_SEL 2 /* OTP is powered up, no SPROM */ -#define CST4325_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */ -#define CST4325_SDIO_USB_MODE_MASK 0x00000004 -#define CST4325_SDIO_USB_MODE_SHIFT 2 -#define CST4325_RCAL_VALID_MASK 0x00000008 -#define CST4325_RCAL_VALID_SHIFT 3 -#define CST4325_RCAL_VALUE_MASK 0x000001f0 -#define CST4325_RCAL_VALUE_SHIFT 4 -#define CST4325_PMUTOP_2B_MASK 0x00000200 /* 1 for 2b, 0 for to 2a */ -#define CST4325_PMUTOP_2B_SHIFT 9 - -#define RES4329_RESERVED0 0 /* 0x00000001 */ -#define RES4329_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4329_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4329_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4329_CLDO_PU 4 /* 0x00000010 */ -#define RES4329_PALDO_PU 5 /* 0x00000020 */ -#define RES4329_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4329_RESERVED7 7 /* 0x00000080 */ -#define RES4329_RESERVED8 8 /* 0x00000100 */ -#define RES4329_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4329_OTP_PU 10 /* 0x00000400 */ -#define RES4329_RESERVED11 11 /* 0x00000800 */ -#define RES4329_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4329_XTAL_PU 13 /* 0x00002000 */ -#define RES4329_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4329_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4329_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4329_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4329_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4329_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4329_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4329_HT_AVAIL 21 /* 0x00200000 */ - -#define CST4329_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4329_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ -#define CST4329_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ -#define CST4329_OTP_SEL 2 /* OTP is powered up, no SPROM */ -#define CST4329_OTP_PWRDN 3 /* OTP is powered down, SPROM is present */ -#define CST4329_SPI_SDIO_MODE_MASK 0x00000004 -#define CST4329_SPI_SDIO_MODE_SHIFT 2 - -/* 4312 chip-specific ChipStatus register bits */ -#define CST4312_SPROM_OTP_SEL_MASK 0x00000003 -#define CST4312_DEFCIS_SEL 0 /* OTP is powered up, use def. CIS, no SPROM */ -#define CST4312_SPROM_SEL 1 /* OTP is powered up, SPROM is present */ -#define CST4312_OTP_SEL 2 /* OTP is powered up, no SPROM */ -#define CST4312_OTP_BAD 3 /* OTP is broken, SPROM is present */ - -/* 4312 resources (all PMU chips with little memory constraint) */ -#define RES4312_SWITCHER_BURST 0 /* 0x00000001 */ -#define RES4312_SWITCHER_PWM 1 /* 0x00000002 */ -#define RES4312_PA_REF_LDO 2 /* 0x00000004 */ -#define RES4312_CORE_LDO_BURST 3 /* 0x00000008 */ -#define RES4312_CORE_LDO_PWM 4 /* 0x00000010 */ -#define RES4312_RADIO_LDO 5 /* 0x00000020 */ -#define RES4312_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4312_BG_FILTBYP 7 /* 0x00000080 */ -#define RES4312_TX_FILTBYP 8 /* 0x00000100 */ -#define RES4312_RX_FILTBYP 9 /* 0x00000200 */ -#define RES4312_XTAL_PU 10 /* 0x00000400 */ -#define RES4312_ALP_AVAIL 11 /* 0x00000800 */ -#define RES4312_BB_PLL_FILTBYP 12 /* 0x00001000 */ -#define RES4312_RF_PLL_FILTBYP 13 /* 0x00002000 */ -#define RES4312_HT_AVAIL 14 /* 0x00004000 */ - -/* 4322 resources */ -#define RES4322_RF_LDO 0 -#define RES4322_ILP_REQUEST 1 -#define RES4322_XTAL_PU 2 -#define RES4322_ALP_AVAIL 3 -#define RES4322_SI_PLL_ON 4 -#define RES4322_HT_SI_AVAIL 5 -#define RES4322_PHY_PLL_ON 6 -#define RES4322_HT_PHY_AVAIL 7 -#define RES4322_OTP_PU 8 - -/* 4322 chip-specific ChipStatus register bits */ -#define CST4322_XTAL_FREQ_20_40MHZ 0x00000020 -#define CST4322_SPROM_OTP_SEL_MASK 0x000000c0 -#define CST4322_SPROM_OTP_SEL_SHIFT 6 -#define CST4322_NO_SPROM_OTP 0 /* no OTP, no SPROM */ -#define CST4322_SPROM_PRESENT 1 /* SPROM is present */ -#define CST4322_OTP_PRESENT 2 /* OTP is present */ -#define CST4322_PCI_OR_USB 0x00000100 -#define CST4322_BOOT_MASK 0x00000600 -#define CST4322_BOOT_SHIFT 9 -#define CST4322_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */ -#define CST4322_BOOT_FROM_ROM 1 /* boot from ROM */ -#define CST4322_BOOT_FROM_FLASH 2 /* boot from FLASH */ -#define CST4322_BOOT_FROM_INVALID 3 -#define CST4322_ILP_DIV_EN 0x00000800 -#define CST4322_FLASH_TYPE_MASK 0x00001000 -#define CST4322_FLASH_TYPE_SHIFT 12 -#define CST4322_FLASH_TYPE_SHIFT_ST 0 /* ST serial FLASH */ -#define CST4322_FLASH_TYPE_SHIFT_ATMEL 1 /* ATMEL flash */ -#define CST4322_ARM_TAP_SEL 0x00002000 -#define CST4322_RES_INIT_MODE_MASK 0x0000c000 -#define CST4322_RES_INIT_MODE_SHIFT 14 -#define CST4322_RES_INIT_MODE_ILPAVAIL 0 /* resinitmode: ILP available */ -#define CST4322_RES_INIT_MODE_ILPREQ 1 /* resinitmode: ILP request */ -#define CST4322_RES_INIT_MODE_ALPAVAIL 2 /* resinitmode: ALP available */ -#define CST4322_RES_INIT_MODE_HTAVAIL 3 /* resinitmode: HT available */ -#define CST4322_PCIPLLCLK_GATING 0x00010000 -#define CST4322_CLK_SWITCH_PCI_TO_ALP 0x00020000 -#define CST4322_PCI_CARDBUS_MODE 0x00040000 - -/* 43224 chip-specific ChipControl register bits */ -#define CCTRL43224_GPIO_TOGGLE 0x8000 -#define CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */ -#define CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */ - -/* 43236 resources */ -#define RES43236_REGULATOR 0 -#define RES43236_ILP_REQUEST 1 -#define RES43236_XTAL_PU 2 -#define RES43236_ALP_AVAIL 3 -#define RES43236_SI_PLL_ON 4 -#define RES43236_HT_SI_AVAIL 5 - -/* 43236 chip-specific ChipControl register bits */ -#define CCTRL43236_BT_COEXIST (1<<0) /* 0 disable */ -#define CCTRL43236_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */ -#define CCTRL43236_EXT_LNA (1<<2) /* 0 disable */ -#define CCTRL43236_ANT_MUX_2o3 (1<<3) /* 2o3 mux, chipcontrol bit 3 */ -#define CCTRL43236_GSIO (1<<4) /* 0 disable */ - -/* 43236 Chip specific ChipStatus register bits */ -#define CST43236_SFLASH_MASK 0x00000040 -#define CST43236_OTP_MASK 0x00000080 -#define CST43236_HSIC_MASK 0x00000100 /* USB/HSIC */ -#define CST43236_BP_CLK 0x00000200 /* 120/96Mbps */ -#define CST43236_BOOT_MASK 0x00001800 -#define CST43236_BOOT_SHIFT 11 -#define CST43236_BOOT_FROM_SRAM 0 /* boot from SRAM, ARM in reset */ -#define CST43236_BOOT_FROM_ROM 1 /* boot from ROM */ -#define CST43236_BOOT_FROM_FLASH 2 /* boot from FLASH */ -#define CST43236_BOOT_FROM_INVALID 3 - -/* 4331 resources */ -#define RES4331_REGULATOR 0 -#define RES4331_ILP_REQUEST 1 -#define RES4331_XTAL_PU 2 -#define RES4331_ALP_AVAIL 3 -#define RES4331_SI_PLL_ON 4 -#define RES4331_HT_SI_AVAIL 5 - -/* 4331 chip-specific ChipControl register bits */ -#define CCTRL4331_BT_COEXIST (1<<0) /* 0 disable */ -#define CCTRL4331_SECI (1<<1) /* 0 SECI is disabled (JATG functional) */ -#define CCTRL4331_EXT_LNA (1<<2) /* 0 disable */ -#define CCTRL4331_SPROM_GPIO13_15 (1<<3) /* sprom/gpio13-15 mux */ -#define CCTRL4331_EXTPA_EN (1<<4) /* 0 ext pa disable, 1 ext pa enabled */ -#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) /* set drive out GPIO_CLK on sprom_cs pin */ -#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) /* use sprom_cs pin as PCIE mdio interface */ -#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) /* aband extpa will be at gpio2/5 and sprom_dout */ -#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) /* override core control on pipe_AuxClkEnable */ -#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) /* override core control on pipe_AuxPowerDown */ -#define CCTRL4331_PCIE_AUXCLKEN (1<<10) /* pcie_auxclkenable */ -#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) /* pcie_pipe_pllpowerdown */ -#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) /* enable bt_shd0 at gpio4 */ -#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) /* enable bt_shd1 at gpio5 */ - -/* 4331 Chip specific ChipStatus register bits */ -#define CST4331_XTAL_FREQ 0x00000001 /* crystal frequency 20/40Mhz */ -#define CST4331_SPROM_PRESENT 0x00000002 -#define CST4331_OTP_PRESENT 0x00000004 -#define CST4331_LDO_RF 0x00000008 -#define CST4331_LDO_PAR 0x00000010 - -/* 4315 resources */ -#define RES4315_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4315_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4315_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4315_CLDO_PU 4 /* 0x00000010 */ -#define RES4315_PALDO_PU 5 /* 0x00000020 */ -#define RES4315_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4315_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4315_OTP_PU 10 /* 0x00000400 */ -#define RES4315_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4315_XTAL_PU 13 /* 0x00002000 */ -#define RES4315_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4315_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4315_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4315_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4315_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4315_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4315_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4315_HT_AVAIL 21 /* 0x00200000 */ - -/* 4315 chip-specific ChipStatus register bits */ -#define CST4315_SPROM_OTP_SEL_MASK 0x00000003 /* gpio [7:6], SDIO CIS selection */ -#define CST4315_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */ -#define CST4315_SPROM_SEL 0x00000001 /* use SPROM, OTP is powered up */ -#define CST4315_OTP_SEL 0x00000002 /* use OTP, OTP is powered up */ -#define CST4315_OTP_PWRDN 0x00000003 /* use SPROM, OTP is powered down */ -#define CST4315_SDIO_MODE 0x00000004 /* gpio [8], sdio/usb mode */ -#define CST4315_RCAL_VALID 0x00000008 -#define CST4315_RCAL_VALUE_MASK 0x000001f0 -#define CST4315_RCAL_VALUE_SHIFT 4 -#define CST4315_PALDO_EXTPNP 0x00000200 /* PALDO is configured with external PNP */ -#define CST4315_CBUCK_MODE_MASK 0x00000c00 -#define CST4315_CBUCK_MODE_BURST 0x00000400 -#define CST4315_CBUCK_MODE_LPBURST 0x00000c00 - -/* 4319 resources */ -#define RES4319_CBUCK_LPOM 1 /* 0x00000002 */ -#define RES4319_CBUCK_BURST 2 /* 0x00000004 */ -#define RES4319_CBUCK_PWM 3 /* 0x00000008 */ -#define RES4319_CLDO_PU 4 /* 0x00000010 */ -#define RES4319_PALDO_PU 5 /* 0x00000020 */ -#define RES4319_ILP_REQUEST 6 /* 0x00000040 */ -#define RES4319_LNLDO1_PU 9 /* 0x00000200 */ -#define RES4319_OTP_PU 10 /* 0x00000400 */ -#define RES4319_LNLDO2_PU 12 /* 0x00001000 */ -#define RES4319_XTAL_PU 13 /* 0x00002000 */ -#define RES4319_ALP_AVAIL 14 /* 0x00004000 */ -#define RES4319_RX_PWRSW_PU 15 /* 0x00008000 */ -#define RES4319_TX_PWRSW_PU 16 /* 0x00010000 */ -#define RES4319_RFPLL_PWRSW_PU 17 /* 0x00020000 */ -#define RES4319_LOGEN_PWRSW_PU 18 /* 0x00040000 */ -#define RES4319_AFE_PWRSW_PU 19 /* 0x00080000 */ -#define RES4319_BBPLL_PWRSW_PU 20 /* 0x00100000 */ -#define RES4319_HT_AVAIL 21 /* 0x00200000 */ - -/* 4319 chip-specific ChipStatus register bits */ -#define CST4319_SPI_CPULESSUSB 0x00000001 -#define CST4319_SPI_CLK_POL 0x00000002 -#define CST4319_SPI_CLK_PH 0x00000008 -#define CST4319_SPROM_OTP_SEL_MASK 0x000000c0 /* gpio [7:6], SDIO CIS selection */ -#define CST4319_SPROM_OTP_SEL_SHIFT 6 -#define CST4319_DEFCIS_SEL 0x00000000 /* use default CIS, OTP is powered up */ -#define CST4319_SPROM_SEL 0x00000040 /* use SPROM, OTP is powered up */ -#define CST4319_OTP_SEL 0x00000080 /* use OTP, OTP is powered up */ -#define CST4319_OTP_PWRDN 0x000000c0 /* use SPROM, OTP is powered down */ -#define CST4319_SDIO_USB_MODE 0x00000100 /* gpio [8], sdio/usb mode */ -#define CST4319_REMAP_SEL_MASK 0x00000600 -#define CST4319_ILPDIV_EN 0x00000800 -#define CST4319_XTAL_PD_POL 0x00001000 -#define CST4319_LPO_SEL 0x00002000 -#define CST4319_RES_INIT_MODE 0x0000c000 -#define CST4319_PALDO_EXTPNP 0x00010000 /* PALDO is configured with external PNP */ -#define CST4319_CBUCK_MODE_MASK 0x00060000 -#define CST4319_CBUCK_MODE_BURST 0x00020000 -#define CST4319_CBUCK_MODE_LPBURST 0x00060000 -#define CST4319_RCAL_VALID 0x01000000 -#define CST4319_RCAL_VALUE_MASK 0x3e000000 -#define CST4319_RCAL_VALUE_SHIFT 25 - -#define PMU1_PLL0_CHIPCTL0 0 -#define PMU1_PLL0_CHIPCTL1 1 -#define PMU1_PLL0_CHIPCTL2 2 -#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000 -#define CCTL_4319USB_XTAL_SEL_SHIFT 19 -#define CCTL_4319USB_48MHZ_PLL_SEL 1 -#define CCTL_4319USB_24MHZ_PLL_SEL 2 - -/* PMU resources for 4336 */ -#define RES4336_CBUCK_LPOM 0 -#define RES4336_CBUCK_BURST 1 -#define RES4336_CBUCK_LP_PWM 2 -#define RES4336_CBUCK_PWM 3 -#define RES4336_CLDO_PU 4 -#define RES4336_DIS_INT_RESET_PD 5 -#define RES4336_ILP_REQUEST 6 -#define RES4336_LNLDO_PU 7 -#define RES4336_LDO3P3_PU 8 -#define RES4336_OTP_PU 9 -#define RES4336_XTAL_PU 10 -#define RES4336_ALP_AVAIL 11 -#define RES4336_RADIO_PU 12 -#define RES4336_BG_PU 13 -#define RES4336_VREG1p4_PU_PU 14 -#define RES4336_AFE_PWRSW_PU 15 -#define RES4336_RX_PWRSW_PU 16 -#define RES4336_TX_PWRSW_PU 17 -#define RES4336_BB_PWRSW_PU 18 -#define RES4336_SYNTH_PWRSW_PU 19 -#define RES4336_MISC_PWRSW_PU 20 -#define RES4336_LOGEN_PWRSW_PU 21 -#define RES4336_BBPLL_PWRSW_PU 22 -#define RES4336_MACPHY_CLKAVAIL 23 -#define RES4336_HT_AVAIL 24 -#define RES4336_RSVD 25 - -/* 4336 chip-specific ChipStatus register bits */ -#define CST4336_SPI_MODE_MASK 0x00000001 -#define CST4336_SPROM_PRESENT 0x00000002 -#define CST4336_OTP_PRESENT 0x00000004 -#define CST4336_ARMREMAP_0 0x00000008 -#define CST4336_ILPDIV_EN_MASK 0x00000010 -#define CST4336_ILPDIV_EN_SHIFT 4 -#define CST4336_XTAL_PD_POL_MASK 0x00000020 -#define CST4336_XTAL_PD_POL_SHIFT 5 -#define CST4336_LPO_SEL_MASK 0x00000040 -#define CST4336_LPO_SEL_SHIFT 6 -#define CST4336_RES_INIT_MODE_MASK 0x00000180 -#define CST4336_RES_INIT_MODE_SHIFT 7 -#define CST4336_CBUCK_MODE_MASK 0x00000600 -#define CST4336_CBUCK_MODE_SHIFT 9 - -/* 4330 resources */ -#define RES4330_CBUCK_LPOM 0 -#define RES4330_CBUCK_BURST 1 -#define RES4330_CBUCK_LP_PWM 2 -#define RES4330_CBUCK_PWM 3 -#define RES4330_CLDO_PU 4 -#define RES4330_DIS_INT_RESET_PD 5 -#define RES4330_ILP_REQUEST 6 -#define RES4330_LNLDO_PU 7 -#define RES4330_LDO3P3_PU 8 -#define RES4330_OTP_PU 9 -#define RES4330_XTAL_PU 10 -#define RES4330_ALP_AVAIL 11 -#define RES4330_RADIO_PU 12 -#define RES4330_BG_PU 13 -#define RES4330_VREG1p4_PU_PU 14 -#define RES4330_AFE_PWRSW_PU 15 -#define RES4330_RX_PWRSW_PU 16 -#define RES4330_TX_PWRSW_PU 17 -#define RES4330_BB_PWRSW_PU 18 -#define RES4330_SYNTH_PWRSW_PU 19 -#define RES4330_MISC_PWRSW_PU 20 -#define RES4330_LOGEN_PWRSW_PU 21 -#define RES4330_BBPLL_PWRSW_PU 22 -#define RES4330_MACPHY_CLKAVAIL 23 -#define RES4330_HT_AVAIL 24 -#define RES4330_5gRX_PWRSW_PU 25 -#define RES4330_5gTX_PWRSW_PU 26 -#define RES4330_5g_LOGEN_PWRSW_PU 27 - -/* 4330 chip-specific ChipStatus register bits */ -#define CST4330_CHIPMODE_SDIOD(cs) (((cs) & 0x7) < 6) /* SDIO || gSPI */ -#define CST4330_CHIPMODE_USB20D(cs) (((cs) & 0x7) >= 6) /* USB || USBDA */ -#define CST4330_CHIPMODE_SDIO(cs) (((cs) & 0x4) == 0) /* SDIO */ -#define CST4330_CHIPMODE_GSPI(cs) (((cs) & 0x6) == 4) /* gSPI */ -#define CST4330_CHIPMODE_USB(cs) (((cs) & 0x7) == 6) /* USB packet-oriented */ -#define CST4330_CHIPMODE_USBDA(cs) (((cs) & 0x7) == 7) /* USB Direct Access */ -#define CST4330_OTP_PRESENT 0x00000010 -#define CST4330_LPO_AUTODET_EN 0x00000020 -#define CST4330_ARMREMAP_0 0x00000040 -#define CST4330_SPROM_PRESENT 0x00000080 /* takes priority over OTP if both set */ -#define CST4330_ILPDIV_EN 0x00000100 -#define CST4330_LPO_SEL 0x00000200 -#define CST4330_RES_INIT_MODE_SHIFT 10 -#define CST4330_RES_INIT_MODE_MASK 0x00000c00 -#define CST4330_CBUCK_MODE_SHIFT 12 -#define CST4330_CBUCK_MODE_MASK 0x00003000 -#define CST4330_CBUCK_POWER_OK 0x00004000 -#define CST4330_BB_PLL_LOCKED 0x00008000 -#define SOCDEVRAM_4330_BP_ADDR 0x1E000000 -#define SOCDEVRAM_4330_ARM_ADDR 0x00800000 - -/* 4313 resources */ -#define RES4313_BB_PU_RSRC 0 -#define RES4313_ILP_REQ_RSRC 1 -#define RES4313_XTAL_PU_RSRC 2 -#define RES4313_ALP_AVAIL_RSRC 3 -#define RES4313_RADIO_PU_RSRC 4 -#define RES4313_BG_PU_RSRC 5 -#define RES4313_VREG1P4_PU_RSRC 6 -#define RES4313_AFE_PWRSW_RSRC 7 -#define RES4313_RX_PWRSW_RSRC 8 -#define RES4313_TX_PWRSW_RSRC 9 -#define RES4313_BB_PWRSW_RSRC 10 -#define RES4313_SYNTH_PWRSW_RSRC 11 -#define RES4313_MISC_PWRSW_RSRC 12 -#define RES4313_BB_PLL_PWRSW_RSRC 13 -#define RES4313_HT_AVAIL_RSRC 14 -#define RES4313_MACPHY_CLK_AVAIL_RSRC 15 - -/* 4313 chip-specific ChipStatus register bits */ -#define CST4313_SPROM_PRESENT 1 -#define CST4313_OTP_PRESENT 2 -#define CST4313_SPROM_OTP_SEL_MASK 0x00000002 -#define CST4313_SPROM_OTP_SEL_SHIFT 0 - -/* 4313 Chip specific ChipControl register bits */ -#define CCTRL_4313_12MA_LED_DRIVE 0x00000007 /* 12 mA drive strengh for later 4313 */ - -/* 43228 resources */ -#define RES43228_NOT_USED 0 -#define RES43228_ILP_REQUEST 1 -#define RES43228_XTAL_PU 2 -#define RES43228_ALP_AVAIL 3 -#define RES43228_PLL_EN 4 -#define RES43228_HT_PHY_AVAIL 5 - -/* 43228 chipstatus reg bits */ -#define CST43228_ILP_DIV_EN 0x1 -#define CST43228_OTP_PRESENT 0x2 -#define CST43228_SERDES_REFCLK_PADSEL 0x4 -#define CST43228_SDIO_MODE 0x8 - -#define CST43228_SDIO_OTP_PRESENT 0x10 -#define CST43228_SDIO_RESET 0x20 - -/* -* Maximum delay for the PMU state transition in us. -* This is an upper bound intended for spinwaits etc. -*/ -#define PMU_MAX_TRANSITION_DLY 15000 - -/* PMU resource up transition time in ILP cycles */ -#define PMURES_UP_TRANSITION 2 - -/* -* Register eci_inputlo bitfield values. -* - BT packet type information bits [7:0] -*/ -/* [3:0] - Task (link) type */ -#define BT_ACL 0x00 -#define BT_SCO 0x01 -#define BT_eSCO 0x02 -#define BT_A2DP 0x03 -#define BT_SNIFF 0x04 -#define BT_PAGE_SCAN 0x05 -#define BT_INQUIRY_SCAN 0x06 -#define BT_PAGE 0x07 -#define BT_INQUIRY 0x08 -#define BT_MSS 0x09 -#define BT_PARK 0x0a -#define BT_RSSISCAN 0x0b -#define BT_MD_ACL 0x0c -#define BT_MD_eSCO 0x0d -#define BT_SCAN_WITH_SCO_LINK 0x0e -#define BT_SCAN_WITHOUT_SCO_LINK 0x0f -/* [7:4] = packet duration code */ -/* [8] - Master / Slave */ -#define BT_MASTER 0 -#define BT_SLAVE 1 -/* [11:9] - multi-level priority */ -#define BT_LOWEST_PRIO 0x0 -#define BT_HIGHEST_PRIO 0x3 - -/* WLAN - number of antenna */ -#define WLAN_NUM_ANT1 TXANT_0 -#define WLAN_NUM_ANT2 TXANT_1 - -#endif /* _SBCHIPC_H */ diff --git a/drivers/staging/brcm80211/include/sbconfig.h b/drivers/staging/brcm80211/include/sbconfig.h deleted file mode 100644 index 5247f01ec36..00000000000 --- a/drivers/staging/brcm80211/include/sbconfig.h +++ /dev/null @@ -1,272 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SBCONFIG_H -#define _SBCONFIG_H - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif - -/* enumeration in SB is based on the premise that cores are contiguos in the - * enumeration space. - */ -#define SB_BUS_SIZE 0x10000 /* Each bus gets 64Kbytes for cores */ -#define SB_BUS_BASE(b) (SI_ENUM_BASE + (b) * SB_BUS_SIZE) -#define SB_BUS_MAXCORES (SB_BUS_SIZE / SI_CORE_SIZE) /* Max cores per bus */ - -/* - * Sonics Configuration Space Registers. - */ -#define SBCONFIGOFF 0xf00 /* core sbconfig regs are top 256bytes of regs */ -#define SBCONFIGSIZE 256 /* sizeof (sbconfig_t) */ - -#define SBIPSFLAG 0x08 -#define SBTPSFLAG 0x18 -#define SBTMERRLOGA 0x48 /* sonics >= 2.3 */ -#define SBTMERRLOG 0x50 /* sonics >= 2.3 */ -#define SBADMATCH3 0x60 -#define SBADMATCH2 0x68 -#define SBADMATCH1 0x70 -#define SBIMSTATE 0x90 -#define SBINTVEC 0x94 -#define SBTMSTATELOW 0x98 -#define SBTMSTATEHIGH 0x9c -#define SBBWA0 0xa0 -#define SBIMCONFIGLOW 0xa8 -#define SBIMCONFIGHIGH 0xac -#define SBADMATCH0 0xb0 -#define SBTMCONFIGLOW 0xb8 -#define SBTMCONFIGHIGH 0xbc -#define SBBCONFIG 0xc0 -#define SBBSTATE 0xc8 -#define SBACTCNFG 0xd8 -#define SBFLAGST 0xe8 -#define SBIDLOW 0xf8 -#define SBIDHIGH 0xfc - -/* All the previous registers are above SBCONFIGOFF, but with Sonics 2.3, we have - * a few registers *below* that line. I think it would be very confusing to try - * and change the value of SBCONFIGOFF, so I'm definig them as absolute offsets here, - */ - -#define SBIMERRLOGA 0xea8 -#define SBIMERRLOG 0xeb0 -#define SBTMPORTCONNID0 0xed8 -#define SBTMPORTLOCK0 0xef8 - -#ifndef _LANGUAGE_ASSEMBLY - -typedef volatile struct _sbconfig { - u32 PAD[2]; - u32 sbipsflag; /* initiator port ocp slave flag */ - u32 PAD[3]; - u32 sbtpsflag; /* target port ocp slave flag */ - u32 PAD[11]; - u32 sbtmerrloga; /* (sonics >= 2.3) */ - u32 PAD; - u32 sbtmerrlog; /* (sonics >= 2.3) */ - u32 PAD[3]; - u32 sbadmatch3; /* address match3 */ - u32 PAD; - u32 sbadmatch2; /* address match2 */ - u32 PAD; - u32 sbadmatch1; /* address match1 */ - u32 PAD[7]; - u32 sbimstate; /* initiator agent state */ - u32 sbintvec; /* interrupt mask */ - u32 sbtmstatelow; /* target state */ - u32 sbtmstatehigh; /* target state */ - u32 sbbwa0; /* bandwidth allocation table0 */ - u32 PAD; - u32 sbimconfiglow; /* initiator configuration */ - u32 sbimconfighigh; /* initiator configuration */ - u32 sbadmatch0; /* address match0 */ - u32 PAD; - u32 sbtmconfiglow; /* target configuration */ - u32 sbtmconfighigh; /* target configuration */ - u32 sbbconfig; /* broadcast configuration */ - u32 PAD; - u32 sbbstate; /* broadcast state */ - u32 PAD[3]; - u32 sbactcnfg; /* activate configuration */ - u32 PAD[3]; - u32 sbflagst; /* current sbflags */ - u32 PAD[3]; - u32 sbidlow; /* identification */ - u32 sbidhigh; /* identification */ -} sbconfig_t; - -#endif /* _LANGUAGE_ASSEMBLY */ - -/* sbipsflag */ -#define SBIPS_INT1_MASK 0x3f /* which sbflags get routed to mips interrupt 1 */ -#define SBIPS_INT1_SHIFT 0 -#define SBIPS_INT2_MASK 0x3f00 /* which sbflags get routed to mips interrupt 2 */ -#define SBIPS_INT2_SHIFT 8 -#define SBIPS_INT3_MASK 0x3f0000 /* which sbflags get routed to mips interrupt 3 */ -#define SBIPS_INT3_SHIFT 16 -#define SBIPS_INT4_MASK 0x3f000000 /* which sbflags get routed to mips interrupt 4 */ -#define SBIPS_INT4_SHIFT 24 - -/* sbtpsflag */ -#define SBTPS_NUM0_MASK 0x3f /* interrupt sbFlag # generated by this core */ -#define SBTPS_F0EN0 0x40 /* interrupt is always sent on the backplane */ - -/* sbtmerrlog */ -#define SBTMEL_CM 0x00000007 /* command */ -#define SBTMEL_CI 0x0000ff00 /* connection id */ -#define SBTMEL_EC 0x0f000000 /* error code */ -#define SBTMEL_ME 0x80000000 /* multiple error */ - -/* sbimstate */ -#define SBIM_PC 0xf /* pipecount */ -#define SBIM_AP_MASK 0x30 /* arbitration policy */ -#define SBIM_AP_BOTH 0x00 /* use both timeslaces and token */ -#define SBIM_AP_TS 0x10 /* use timesliaces only */ -#define SBIM_AP_TK 0x20 /* use token only */ -#define SBIM_AP_RSV 0x30 /* reserved */ -#define SBIM_IBE 0x20000 /* inbanderror */ -#define SBIM_TO 0x40000 /* timeout */ -#define SBIM_BY 0x01800000 /* busy (sonics >= 2.3) */ -#define SBIM_RJ 0x02000000 /* reject (sonics >= 2.3) */ - -/* sbtmstatelow */ -#define SBTML_RESET 0x0001 /* reset */ -#define SBTML_REJ_MASK 0x0006 /* reject field */ -#define SBTML_REJ 0x0002 /* reject */ -#define SBTML_TMPREJ 0x0004 /* temporary reject, for error recovery */ - -#define SBTML_SICF_SHIFT 16 /* Shift to locate the SI control flags in sbtml */ - -/* sbtmstatehigh */ -#define SBTMH_SERR 0x0001 /* serror */ -#define SBTMH_INT 0x0002 /* interrupt */ -#define SBTMH_BUSY 0x0004 /* busy */ -#define SBTMH_TO 0x0020 /* timeout (sonics >= 2.3) */ - -#define SBTMH_SISF_SHIFT 16 /* Shift to locate the SI status flags in sbtmh */ - -/* sbbwa0 */ -#define SBBWA_TAB0_MASK 0xffff /* lookup table 0 */ -#define SBBWA_TAB1_MASK 0xffff /* lookup table 1 */ -#define SBBWA_TAB1_SHIFT 16 - -/* sbimconfiglow */ -#define SBIMCL_STO_MASK 0x7 /* service timeout */ -#define SBIMCL_RTO_MASK 0x70 /* request timeout */ -#define SBIMCL_RTO_SHIFT 4 -#define SBIMCL_CID_MASK 0xff0000 /* connection id */ -#define SBIMCL_CID_SHIFT 16 - -/* sbimconfighigh */ -#define SBIMCH_IEM_MASK 0xc /* inband error mode */ -#define SBIMCH_TEM_MASK 0x30 /* timeout error mode */ -#define SBIMCH_TEM_SHIFT 4 -#define SBIMCH_BEM_MASK 0xc0 /* bus error mode */ -#define SBIMCH_BEM_SHIFT 6 - -/* sbadmatch0 */ -#define SBAM_TYPE_MASK 0x3 /* address type */ -#define SBAM_AD64 0x4 /* reserved */ -#define SBAM_ADINT0_MASK 0xf8 /* type0 size */ -#define SBAM_ADINT0_SHIFT 3 -#define SBAM_ADINT1_MASK 0x1f8 /* type1 size */ -#define SBAM_ADINT1_SHIFT 3 -#define SBAM_ADINT2_MASK 0x1f8 /* type2 size */ -#define SBAM_ADINT2_SHIFT 3 -#define SBAM_ADEN 0x400 /* enable */ -#define SBAM_ADNEG 0x800 /* negative decode */ -#define SBAM_BASE0_MASK 0xffffff00 /* type0 base address */ -#define SBAM_BASE0_SHIFT 8 -#define SBAM_BASE1_MASK 0xfffff000 /* type1 base address for the core */ -#define SBAM_BASE1_SHIFT 12 -#define SBAM_BASE2_MASK 0xffff0000 /* type2 base address for the core */ -#define SBAM_BASE2_SHIFT 16 - -/* sbtmconfiglow */ -#define SBTMCL_CD_MASK 0xff /* clock divide */ -#define SBTMCL_CO_MASK 0xf800 /* clock offset */ -#define SBTMCL_CO_SHIFT 11 -#define SBTMCL_IF_MASK 0xfc0000 /* interrupt flags */ -#define SBTMCL_IF_SHIFT 18 -#define SBTMCL_IM_MASK 0x3000000 /* interrupt mode */ -#define SBTMCL_IM_SHIFT 24 - -/* sbtmconfighigh */ -#define SBTMCH_BM_MASK 0x3 /* busy mode */ -#define SBTMCH_RM_MASK 0x3 /* retry mode */ -#define SBTMCH_RM_SHIFT 2 -#define SBTMCH_SM_MASK 0x30 /* stop mode */ -#define SBTMCH_SM_SHIFT 4 -#define SBTMCH_EM_MASK 0x300 /* sb error mode */ -#define SBTMCH_EM_SHIFT 8 -#define SBTMCH_IM_MASK 0xc00 /* int mode */ -#define SBTMCH_IM_SHIFT 10 - -/* sbbconfig */ -#define SBBC_LAT_MASK 0x3 /* sb latency */ -#define SBBC_MAX0_MASK 0xf0000 /* maxccntr0 */ -#define SBBC_MAX0_SHIFT 16 -#define SBBC_MAX1_MASK 0xf00000 /* maxccntr1 */ -#define SBBC_MAX1_SHIFT 20 - -/* sbbstate */ -#define SBBS_SRD 0x1 /* st reg disable */ -#define SBBS_HRD 0x2 /* hold reg disable */ - -/* sbidlow */ -#define SBIDL_CS_MASK 0x3 /* config space */ -#define SBIDL_AR_MASK 0x38 /* # address ranges supported */ -#define SBIDL_AR_SHIFT 3 -#define SBIDL_SYNCH 0x40 /* sync */ -#define SBIDL_INIT 0x80 /* initiator */ -#define SBIDL_MINLAT_MASK 0xf00 /* minimum backplane latency */ -#define SBIDL_MINLAT_SHIFT 8 -#define SBIDL_MAXLAT 0xf000 /* maximum backplane latency */ -#define SBIDL_MAXLAT_SHIFT 12 -#define SBIDL_FIRST 0x10000 /* this initiator is first */ -#define SBIDL_CW_MASK 0xc0000 /* cycle counter width */ -#define SBIDL_CW_SHIFT 18 -#define SBIDL_TP_MASK 0xf00000 /* target ports */ -#define SBIDL_TP_SHIFT 20 -#define SBIDL_IP_MASK 0xf000000 /* initiator ports */ -#define SBIDL_IP_SHIFT 24 -#define SBIDL_RV_MASK 0xf0000000 /* sonics backplane revision code */ -#define SBIDL_RV_SHIFT 28 -#define SBIDL_RV_2_2 0x00000000 /* version 2.2 or earlier */ -#define SBIDL_RV_2_3 0x10000000 /* version 2.3 */ - -/* sbidhigh */ -#define SBIDH_RC_MASK 0x000f /* revision code */ -#define SBIDH_RCE_MASK 0x7000 /* revision code extension field */ -#define SBIDH_RCE_SHIFT 8 -#define SBCOREREV(sbidh) \ - ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK)) -#define SBIDH_CC_MASK 0x8ff0 /* core code */ -#define SBIDH_CC_SHIFT 4 -#define SBIDH_VC_MASK 0xffff0000 /* vendor code */ -#define SBIDH_VC_SHIFT 16 - -#define SB_COMMIT 0xfd8 /* update buffered registers value */ - -/* vendor codes */ -#define SB_VEND_BCM 0x4243 /* Broadcom's SB vendor code */ - -#endif /* _SBCONFIG_H */ diff --git a/drivers/staging/brcm80211/include/sbhnddma.h b/drivers/staging/brcm80211/include/sbhnddma.h deleted file mode 100644 index 08cb7f6e0d8..00000000000 --- a/drivers/staging/brcm80211/include/sbhnddma.h +++ /dev/null @@ -1,315 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _sbhnddma_h_ -#define _sbhnddma_h_ - -/* DMA structure: - * support two DMA engines: 32 bits address or 64 bit addressing - * basic DMA register set is per channel(transmit or receive) - * a pair of channels is defined for convenience - */ - -/* 32 bits addressing */ - -/* dma registers per channel(xmt or rcv) */ -typedef volatile struct { - u32 control; /* enable, et al */ - u32 addr; /* descriptor ring base address (4K aligned) */ - u32 ptr; /* last descriptor posted to chip */ - u32 status; /* current active descriptor, et al */ -} dma32regs_t; - -typedef volatile struct { - dma32regs_t xmt; /* dma tx channel */ - dma32regs_t rcv; /* dma rx channel */ -} dma32regp_t; - -typedef volatile struct { /* diag access */ - u32 fifoaddr; /* diag address */ - u32 fifodatalow; /* low 32bits of data */ - u32 fifodatahigh; /* high 32bits of data */ - u32 pad; /* reserved */ -} dma32diag_t; - -/* - * DMA Descriptor - * Descriptors are only read by the hardware, never written back. - */ -typedef volatile struct { - u32 ctrl; /* misc control bits & bufcount */ - u32 addr; /* data buffer address */ -} dma32dd_t; - -/* - * Each descriptor ring must be 4096byte aligned, and fit within a single 4096byte page. - */ -#define D32RINGALIGN_BITS 12 -#define D32MAXRINGSZ (1 << D32RINGALIGN_BITS) -#define D32RINGALIGN (1 << D32RINGALIGN_BITS) - -#define D32MAXDD (D32MAXRINGSZ / sizeof (dma32dd_t)) - -/* transmit channel control */ -#define XC_XE ((u32)1 << 0) /* transmit enable */ -#define XC_SE ((u32)1 << 1) /* transmit suspend request */ -#define XC_LE ((u32)1 << 2) /* loopback enable */ -#define XC_FL ((u32)1 << 4) /* flush request */ -#define XC_PD ((u32)1 << 11) /* parity check disable */ -#define XC_AE ((u32)3 << 16) /* address extension bits */ -#define XC_AE_SHIFT 16 - -/* transmit descriptor table pointer */ -#define XP_LD_MASK 0xfff /* last valid descriptor */ - -/* transmit channel status */ -#define XS_CD_MASK 0x0fff /* current descriptor pointer */ -#define XS_XS_MASK 0xf000 /* transmit state */ -#define XS_XS_SHIFT 12 -#define XS_XS_DISABLED 0x0000 /* disabled */ -#define XS_XS_ACTIVE 0x1000 /* active */ -#define XS_XS_IDLE 0x2000 /* idle wait */ -#define XS_XS_STOPPED 0x3000 /* stopped */ -#define XS_XS_SUSP 0x4000 /* suspend pending */ -#define XS_XE_MASK 0xf0000 /* transmit errors */ -#define XS_XE_SHIFT 16 -#define XS_XE_NOERR 0x00000 /* no error */ -#define XS_XE_DPE 0x10000 /* descriptor protocol error */ -#define XS_XE_DFU 0x20000 /* data fifo underrun */ -#define XS_XE_BEBR 0x30000 /* bus error on buffer read */ -#define XS_XE_BEDA 0x40000 /* bus error on descriptor access */ -#define XS_AD_MASK 0xfff00000 /* active descriptor */ -#define XS_AD_SHIFT 20 - -/* receive channel control */ -#define RC_RE ((u32)1 << 0) /* receive enable */ -#define RC_RO_MASK 0xfe /* receive frame offset */ -#define RC_RO_SHIFT 1 -#define RC_FM ((u32)1 << 8) /* direct fifo receive (pio) mode */ -#define RC_SH ((u32)1 << 9) /* separate rx header descriptor enable */ -#define RC_OC ((u32)1 << 10) /* overflow continue */ -#define RC_PD ((u32)1 << 11) /* parity check disable */ -#define RC_AE ((u32)3 << 16) /* address extension bits */ -#define RC_AE_SHIFT 16 - -/* receive descriptor table pointer */ -#define RP_LD_MASK 0xfff /* last valid descriptor */ - -/* receive channel status */ -#define RS_CD_MASK 0x0fff /* current descriptor pointer */ -#define RS_RS_MASK 0xf000 /* receive state */ -#define RS_RS_SHIFT 12 -#define RS_RS_DISABLED 0x0000 /* disabled */ -#define RS_RS_ACTIVE 0x1000 /* active */ -#define RS_RS_IDLE 0x2000 /* idle wait */ -#define RS_RS_STOPPED 0x3000 /* reserved */ -#define RS_RE_MASK 0xf0000 /* receive errors */ -#define RS_RE_SHIFT 16 -#define RS_RE_NOERR 0x00000 /* no error */ -#define RS_RE_DPE 0x10000 /* descriptor protocol error */ -#define RS_RE_DFO 0x20000 /* data fifo overflow */ -#define RS_RE_BEBW 0x30000 /* bus error on buffer write */ -#define RS_RE_BEDA 0x40000 /* bus error on descriptor access */ -#define RS_AD_MASK 0xfff00000 /* active descriptor */ -#define RS_AD_SHIFT 20 - -/* fifoaddr */ -#define FA_OFF_MASK 0xffff /* offset */ -#define FA_SEL_MASK 0xf0000 /* select */ -#define FA_SEL_SHIFT 16 -#define FA_SEL_XDD 0x00000 /* transmit dma data */ -#define FA_SEL_XDP 0x10000 /* transmit dma pointers */ -#define FA_SEL_RDD 0x40000 /* receive dma data */ -#define FA_SEL_RDP 0x50000 /* receive dma pointers */ -#define FA_SEL_XFD 0x80000 /* transmit fifo data */ -#define FA_SEL_XFP 0x90000 /* transmit fifo pointers */ -#define FA_SEL_RFD 0xc0000 /* receive fifo data */ -#define FA_SEL_RFP 0xd0000 /* receive fifo pointers */ -#define FA_SEL_RSD 0xe0000 /* receive frame status data */ -#define FA_SEL_RSP 0xf0000 /* receive frame status pointers */ - -/* descriptor control flags */ -#define CTRL_BC_MASK 0x00001fff /* buffer byte count, real data len must <= 4KB */ -#define CTRL_AE ((u32)3 << 16) /* address extension bits */ -#define CTRL_AE_SHIFT 16 -#define CTRL_PARITY ((u32)3 << 18) /* parity bit */ -#define CTRL_EOT ((u32)1 << 28) /* end of descriptor table */ -#define CTRL_IOC ((u32)1 << 29) /* interrupt on completion */ -#define CTRL_EOF ((u32)1 << 30) /* end of frame */ -#define CTRL_SOF ((u32)1 << 31) /* start of frame */ - -/* control flags in the range [27:20] are core-specific and not defined here */ -#define CTRL_CORE_MASK 0x0ff00000 - -/* 64 bits addressing */ - -/* dma registers per channel(xmt or rcv) */ -typedef volatile struct { - u32 control; /* enable, et al */ - u32 ptr; /* last descriptor posted to chip */ - u32 addrlow; /* descriptor ring base address low 32-bits (8K aligned) */ - u32 addrhigh; /* descriptor ring base address bits 63:32 (8K aligned) */ - u32 status0; /* current descriptor, xmt state */ - u32 status1; /* active descriptor, xmt error */ -} dma64regs_t; - -typedef volatile struct { - dma64regs_t tx; /* dma64 tx channel */ - dma64regs_t rx; /* dma64 rx channel */ -} dma64regp_t; - -typedef volatile struct { /* diag access */ - u32 fifoaddr; /* diag address */ - u32 fifodatalow; /* low 32bits of data */ - u32 fifodatahigh; /* high 32bits of data */ - u32 pad; /* reserved */ -} dma64diag_t; - -/* - * DMA Descriptor - * Descriptors are only read by the hardware, never written back. - */ -typedef volatile struct { - u32 ctrl1; /* misc control bits & bufcount */ - u32 ctrl2; /* buffer count and address extension */ - u32 addrlow; /* memory address of the date buffer, bits 31:0 */ - u32 addrhigh; /* memory address of the date buffer, bits 63:32 */ -} dma64dd_t; - -/* - * Each descriptor ring must be 8kB aligned, and fit within a contiguous 8kB physical address. - */ -#define D64RINGALIGN_BITS 13 -#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS) -#define D64RINGALIGN (1 << D64RINGALIGN_BITS) - -#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t)) - -/* transmit channel control */ -#define D64_XC_XE 0x00000001 /* transmit enable */ -#define D64_XC_SE 0x00000002 /* transmit suspend request */ -#define D64_XC_LE 0x00000004 /* loopback enable */ -#define D64_XC_FL 0x00000010 /* flush request */ -#define D64_XC_PD 0x00000800 /* parity check disable */ -#define D64_XC_AE 0x00030000 /* address extension bits */ -#define D64_XC_AE_SHIFT 16 - -/* transmit descriptor table pointer */ -#define D64_XP_LD_MASK 0x00000fff /* last valid descriptor */ - -/* transmit channel status */ -#define D64_XS0_CD_MASK 0x00001fff /* current descriptor pointer */ -#define D64_XS0_XS_MASK 0xf0000000 /* transmit state */ -#define D64_XS0_XS_SHIFT 28 -#define D64_XS0_XS_DISABLED 0x00000000 /* disabled */ -#define D64_XS0_XS_ACTIVE 0x10000000 /* active */ -#define D64_XS0_XS_IDLE 0x20000000 /* idle wait */ -#define D64_XS0_XS_STOPPED 0x30000000 /* stopped */ -#define D64_XS0_XS_SUSP 0x40000000 /* suspend pending */ - -#define D64_XS1_AD_MASK 0x00001fff /* active descriptor */ -#define D64_XS1_XE_MASK 0xf0000000 /* transmit errors */ -#define D64_XS1_XE_SHIFT 28 -#define D64_XS1_XE_NOERR 0x00000000 /* no error */ -#define D64_XS1_XE_DPE 0x10000000 /* descriptor protocol error */ -#define D64_XS1_XE_DFU 0x20000000 /* data fifo underrun */ -#define D64_XS1_XE_DTE 0x30000000 /* data transfer error */ -#define D64_XS1_XE_DESRE 0x40000000 /* descriptor read error */ -#define D64_XS1_XE_COREE 0x50000000 /* core error */ - -/* receive channel control */ -#define D64_RC_RE 0x00000001 /* receive enable */ -#define D64_RC_RO_MASK 0x000000fe /* receive frame offset */ -#define D64_RC_RO_SHIFT 1 -#define D64_RC_FM 0x00000100 /* direct fifo receive (pio) mode */ -#define D64_RC_SH 0x00000200 /* separate rx header descriptor enable */ -#define D64_RC_OC 0x00000400 /* overflow continue */ -#define D64_RC_PD 0x00000800 /* parity check disable */ -#define D64_RC_AE 0x00030000 /* address extension bits */ -#define D64_RC_AE_SHIFT 16 - -/* flags for dma controller */ -#define DMA_CTRL_PEN (1 << 0) /* partity enable */ -#define DMA_CTRL_ROC (1 << 1) /* rx overflow continue */ -#define DMA_CTRL_RXMULTI (1 << 2) /* allow rx scatter to multiple descriptors */ -#define DMA_CTRL_UNFRAMED (1 << 3) /* Unframed Rx/Tx data */ - -/* receive descriptor table pointer */ -#define D64_RP_LD_MASK 0x00000fff /* last valid descriptor */ - -/* receive channel status */ -#define D64_RS0_CD_MASK 0x00001fff /* current descriptor pointer */ -#define D64_RS0_RS_MASK 0xf0000000 /* receive state */ -#define D64_RS0_RS_SHIFT 28 -#define D64_RS0_RS_DISABLED 0x00000000 /* disabled */ -#define D64_RS0_RS_ACTIVE 0x10000000 /* active */ -#define D64_RS0_RS_IDLE 0x20000000 /* idle wait */ -#define D64_RS0_RS_STOPPED 0x30000000 /* stopped */ -#define D64_RS0_RS_SUSP 0x40000000 /* suspend pending */ - -#define D64_RS1_AD_MASK 0x0001ffff /* active descriptor */ -#define D64_RS1_RE_MASK 0xf0000000 /* receive errors */ -#define D64_RS1_RE_SHIFT 28 -#define D64_RS1_RE_NOERR 0x00000000 /* no error */ -#define D64_RS1_RE_DPO 0x10000000 /* descriptor protocol error */ -#define D64_RS1_RE_DFU 0x20000000 /* data fifo overflow */ -#define D64_RS1_RE_DTE 0x30000000 /* data transfer error */ -#define D64_RS1_RE_DESRE 0x40000000 /* descriptor read error */ -#define D64_RS1_RE_COREE 0x50000000 /* core error */ - -/* fifoaddr */ -#define D64_FA_OFF_MASK 0xffff /* offset */ -#define D64_FA_SEL_MASK 0xf0000 /* select */ -#define D64_FA_SEL_SHIFT 16 -#define D64_FA_SEL_XDD 0x00000 /* transmit dma data */ -#define D64_FA_SEL_XDP 0x10000 /* transmit dma pointers */ -#define D64_FA_SEL_RDD 0x40000 /* receive dma data */ -#define D64_FA_SEL_RDP 0x50000 /* receive dma pointers */ -#define D64_FA_SEL_XFD 0x80000 /* transmit fifo data */ -#define D64_FA_SEL_XFP 0x90000 /* transmit fifo pointers */ -#define D64_FA_SEL_RFD 0xc0000 /* receive fifo data */ -#define D64_FA_SEL_RFP 0xd0000 /* receive fifo pointers */ -#define D64_FA_SEL_RSD 0xe0000 /* receive frame status data */ -#define D64_FA_SEL_RSP 0xf0000 /* receive frame status pointers */ - -/* descriptor control flags 1 */ -#define D64_CTRL_COREFLAGS 0x0ff00000 /* core specific flags */ -#define D64_CTRL1_EOT ((u32)1 << 28) /* end of descriptor table */ -#define D64_CTRL1_IOC ((u32)1 << 29) /* interrupt on completion */ -#define D64_CTRL1_EOF ((u32)1 << 30) /* end of frame */ -#define D64_CTRL1_SOF ((u32)1 << 31) /* start of frame */ - -/* descriptor control flags 2 */ -#define D64_CTRL2_BC_MASK 0x00007fff /* buffer byte count. real data len must <= 16KB */ -#define D64_CTRL2_AE 0x00030000 /* address extension bits */ -#define D64_CTRL2_AE_SHIFT 16 -#define D64_CTRL2_PARITY 0x00040000 /* parity bit */ - -/* control flags in the range [27:20] are core-specific and not defined here */ -#define D64_CTRL_CORE_MASK 0x0ff00000 - -#define D64_RX_FRM_STS_LEN 0x0000ffff /* frame length mask */ -#define D64_RX_FRM_STS_OVFL 0x00800000 /* RxOverFlow */ -#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 /* no. of descriptors used - 1 */ -#define D64_RX_FRM_STS_DATATYPE 0xf0000000 /* core-dependent data type */ - -/* receive frame status */ -typedef volatile struct { - u16 len; - u16 flags; -} dma_rxh_t; - -#endif /* _sbhnddma_h_ */ diff --git a/drivers/staging/brcm80211/include/sbsdio.h b/drivers/staging/brcm80211/include/sbsdio.h deleted file mode 100644 index c7facd3795a..00000000000 --- a/drivers/staging/brcm80211/include/sbsdio.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SBSDIO_H -#define _SBSDIO_H - -#define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */ - -/* function 1 miscellaneous registers */ -#define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */ -#define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */ -#define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */ -#define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */ -#define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */ -#define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */ -#define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */ -#define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */ -#define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */ -#define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */ - -/* registers introduced in rev 8, some content (mask/bits) defs in sbsdpcmdev.h */ -#define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */ -#define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */ -#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */ -#define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */ -#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */ -#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */ -#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */ -#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */ -#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */ -#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */ - -#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */ -#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */ - -/* SBSDIO_SPROM_CS */ -#define SBSDIO_SPROM_IDLE 0 -#define SBSDIO_SPROM_WRITE 1 -#define SBSDIO_SPROM_READ 2 -#define SBSDIO_SPROM_WEN 4 -#define SBSDIO_SPROM_WDS 7 -#define SBSDIO_SPROM_DONE 8 - -/* SBSDIO_SPROM_INFO */ -#define SROM_SZ_MASK 0x03 /* SROM size, 1: 4k, 2: 16k */ -#define SROM_BLANK 0x04 /* depreciated in corerev 6 */ -#define SROM_OTP 0x80 /* OTP present */ - -/* SBSDIO_CHIP_CTRL */ -#define SBSDIO_CHIP_CTRL_XTAL 0x01 /* or'd with onchip xtal_pu, - * 1: power on oscillator - * (for 4318 only) - */ -/* SBSDIO_WATERMARK */ -#define SBSDIO_WATERMARK_MASK 0x7f /* number of words - 1 for sd device - * to wait before sending data to host - */ - -/* SBSDIO_DEVICE_CTL */ -#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when - * receiving CMD53 - */ -#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is - * synchronous to the sdio clock - */ -#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host - * except the chipActive (rev 8) - */ -#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put - * external pads in tri-state; requires - * sdio bus power cycle to clear (rev 9) - */ -#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */ -#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */ -#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */ -#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */ - -/* SBSDIO_FUNC1_CHIPCLKCSR */ -#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */ -#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */ -#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */ -#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */ -#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */ -#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */ -#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */ -#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */ -/* In rev8, actual avail bits followed original docs */ -#define SBSDIO_Rev8_HT_AVAIL 0x40 -#define SBSDIO_Rev8_ALP_AVAIL 0x80 - -#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL) -#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS) -#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS) -#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval)) -#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \ - (alponly ? 1 : SBSDIO_HTAV(regval))) - -/* SBSDIO_FUNC1_SDIOPULLUP */ -#define SBSDIO_PULLUP_D0 0x01 /* Enable D0/MISO pullup */ -#define SBSDIO_PULLUP_D1 0x02 /* Enable D1/INT# pullup */ -#define SBSDIO_PULLUP_D2 0x04 /* Enable D2 pullup */ -#define SBSDIO_PULLUP_CMD 0x08 /* Enable CMD/MOSI pullup */ -#define SBSDIO_PULLUP_ALL 0x0f /* All valid bits */ - -/* function 1 OCP space */ -#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */ -#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000 -#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */ - -/* some duplication with sbsdpcmdev.h here */ -/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */ -#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */ -#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */ -#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */ -#define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */ - -/* direct(mapped) cis space */ -#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */ -#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */ -#define SBSDIO_OTP_CIS_SIZE_LIMIT 0x078 /* maximum bytes OTP CIS */ - -#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */ - -#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple, - * link bytes - */ - -/* indirect cis access (in sprom) */ -#define SBSDIO_SPROM_CIS_OFFSET 0x8 /* 8 control bytes first, CIS starts from - * 8th byte - */ - -#define SBSDIO_BYTEMODE_DATALEN_MAX 64 /* sdio byte mode: maximum length of one - * data command - */ - -#define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */ - -#endif /* _SBSDIO_H */ diff --git a/drivers/staging/brcm80211/include/sbsdpcmdev.h b/drivers/staging/brcm80211/include/sbsdpcmdev.h deleted file mode 100644 index afd35811d4a..00000000000 --- a/drivers/staging/brcm80211/include/sbsdpcmdev.h +++ /dev/null @@ -1,281 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _sbsdpcmdev_h_ -#define _sbsdpcmdev_h_ - -/* cpp contortions to concatenate w/arg prescan */ -#ifndef PAD -#define _PADLINE(line) pad ## line -#define _XSTR(line) _PADLINE(line) -#define PAD _XSTR(__LINE__) -#endif /* PAD */ - -typedef volatile struct { - dma64regs_t xmt; /* dma tx */ - u32 PAD[2]; - dma64regs_t rcv; /* dma rx */ - u32 PAD[2]; -} dma64p_t; - -/* dma64 sdiod corerev >= 1 */ -typedef volatile struct { - dma64p_t dma64regs[2]; - dma64diag_t dmafifo; /* DMA Diagnostic Regs, 0x280-0x28c */ - u32 PAD[92]; -} sdiodma64_t; - -/* dma32 sdiod corerev == 0 */ -typedef volatile struct { - dma32regp_t dma32regs[2]; /* dma tx & rx, 0x200-0x23c */ - dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x240-0x24c */ - u32 PAD[108]; -} sdiodma32_t; - -/* dma32 regs for pcmcia core */ -typedef volatile struct { - dma32regp_t dmaregs; /* DMA Regs, 0x200-0x21c, rev8 */ - dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x220-0x22c */ - u32 PAD[116]; -} pcmdma32_t; - -/* core registers */ -typedef volatile struct { - u32 corecontrol; /* CoreControl, 0x000, rev8 */ - u32 corestatus; /* CoreStatus, 0x004, rev8 */ - u32 PAD[1]; - u32 biststatus; /* BistStatus, 0x00c, rev8 */ - - /* PCMCIA access */ - u16 pcmciamesportaladdr; /* PcmciaMesPortalAddr, 0x010, rev8 */ - u16 PAD[1]; - u16 pcmciamesportalmask; /* PcmciaMesPortalMask, 0x014, rev8 */ - u16 PAD[1]; - u16 pcmciawrframebc; /* PcmciaWrFrameBC, 0x018, rev8 */ - u16 PAD[1]; - u16 pcmciaunderflowtimer; /* PcmciaUnderflowTimer, 0x01c, rev8 */ - u16 PAD[1]; - - /* interrupt */ - u32 intstatus; /* IntStatus, 0x020, rev8 */ - u32 hostintmask; /* IntHostMask, 0x024, rev8 */ - u32 intmask; /* IntSbMask, 0x028, rev8 */ - u32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */ - u32 sbintmask; /* SBIntMask, 0x030, rev8 */ - u32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */ - u32 PAD[2]; - u32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */ - u32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */ - u32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */ - u32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */ - - /* synchronized access to registers in SDIO clock domain */ - u32 sdioaccess; /* SdioAccess, 0x050, rev8 */ - u32 PAD[3]; - - /* PCMCIA frame control */ - u8 pcmciaframectrl; /* pcmciaFrameCtrl, 0x060, rev8 */ - u8 PAD[3]; - u8 pcmciawatermark; /* pcmciaWaterMark, 0x064, rev8 */ - u8 PAD[155]; - - /* interrupt batching control */ - u32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */ - u32 PAD[3]; - - /* counters */ - u32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */ - u32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */ - u32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */ - u32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */ - u32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */ - u32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */ - u32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */ - u32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */ - u32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */ - u32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */ - u32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */ - u32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */ - u32 PAD[40]; - u32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */ - u32 PAD[7]; - - /* DMA engines */ - volatile union { - pcmdma32_t pcm32; - sdiodma32_t sdiod32; - sdiodma64_t sdiod64; - } dma; - - /* SDIO/PCMCIA CIS region */ - char cis[512]; /* 512 byte CIS, 0x400-0x5ff, rev6 */ - - /* PCMCIA function control registers */ - char pcmciafcr[256]; /* PCMCIA FCR, 0x600-6ff, rev6 */ - u16 PAD[55]; - - /* PCMCIA backplane access */ - u16 backplanecsr; /* BackplaneCSR, 0x76E, rev6 */ - u16 backplaneaddr0; /* BackplaneAddr0, 0x770, rev6 */ - u16 backplaneaddr1; /* BackplaneAddr1, 0x772, rev6 */ - u16 backplaneaddr2; /* BackplaneAddr2, 0x774, rev6 */ - u16 backplaneaddr3; /* BackplaneAddr3, 0x776, rev6 */ - u16 backplanedata0; /* BackplaneData0, 0x778, rev6 */ - u16 backplanedata1; /* BackplaneData1, 0x77a, rev6 */ - u16 backplanedata2; /* BackplaneData2, 0x77c, rev6 */ - u16 backplanedata3; /* BackplaneData3, 0x77e, rev6 */ - u16 PAD[31]; - - /* sprom "size" & "blank" info */ - u16 spromstatus; /* SPROMStatus, 0x7BE, rev2 */ - u32 PAD[464]; - - /* Sonics SiliconBackplane registers */ - sbconfig_t sbconfig; /* SbConfig Regs, 0xf00-0xfff, rev8 */ -} sdpcmd_regs_t; - -/* corecontrol */ -#define CC_CISRDY (1 << 0) /* CIS Ready */ -#define CC_BPRESEN (1 << 1) /* CCCR RES signal causes backplane reset */ -#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ -#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation bit (rev 11) */ -#define CC_XMTDATAAVAIL_MODE (1 << 4) /* data avail generates an interrupt */ -#define CC_XMTDATAAVAIL_CTRL (1 << 5) /* data avail interrupt ctrl */ - -/* corestatus */ -#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */ -#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */ -#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */ - -#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */ -#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */ -#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */ -#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */ - -/* intstatus */ -#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ -#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ -#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ -#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ -#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ -#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ -#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ -#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ -#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ -#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ -#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ -#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ -#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ -#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ -#define I_PC (1 << 10) /* descriptor error */ -#define I_PD (1 << 11) /* data error */ -#define I_DE (1 << 12) /* Descriptor protocol Error */ -#define I_RU (1 << 13) /* Receive descriptor Underflow */ -#define I_RO (1 << 14) /* Receive fifo Overflow */ -#define I_XU (1 << 15) /* Transmit fifo Underflow */ -#define I_RI (1 << 16) /* Receive Interrupt */ -#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ -#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ -#define I_XI (1 << 24) /* Transmit Interrupt */ -#define I_RF_TERM (1 << 25) /* Read Frame Terminate */ -#define I_WF_TERM (1 << 26) /* Write Frame Terminate */ -#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ -#define I_SBINT (1 << 28) /* sbintstatus Interrupt */ -#define I_CHIPACTIVE (1 << 29) /* chip transitioned from doze to active state */ -#define I_SRESET (1 << 30) /* CCCR RES interrupt */ -#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ -#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) /* DMA Errors */ -#define I_DMA (I_RI | I_XI | I_ERRORS) - -/* sbintstatus */ -#define I_SB_SERR (1 << 8) /* Backplane SError (write) */ -#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */ -#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */ - -/* sdioaccess */ -#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */ -#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */ -#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */ -#define SDA_WRITE 0x01000000 /* Write bit */ -#define SDA_READ 0x00000000 /* Write bit cleared for Read */ -#define SDA_BUSY 0x80000000 /* Busy bit */ - -/* sdioaccess-accessible register address spaces */ -#define SDA_CCCR_SPACE 0x000 /* sdioAccess CCCR register space */ -#define SDA_F1_FBR_SPACE 0x100 /* sdioAccess F1 FBR register space */ -#define SDA_F2_FBR_SPACE 0x200 /* sdioAccess F2 FBR register space */ -#define SDA_F1_REG_SPACE 0x300 /* sdioAccess F1 core-specific register space */ - -/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */ -#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */ -#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */ -#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */ -#define SDA_DEVICECONTROL 0x009 /* DeviceControl */ -#define SDA_SBADDRLOW 0x00a /* SbAddrLow */ -#define SDA_SBADDRMID 0x00b /* SbAddrMid */ -#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */ -#define SDA_FRAMECTRL 0x00d /* FrameCtrl */ -#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */ -#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */ -#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */ -#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */ -#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */ -#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */ - -/* SDA_F2WATERMARK */ -#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */ - -/* SDA_SBADDRLOW */ -#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */ - -/* SDA_SBADDRMID */ -#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */ - -/* SDA_SBADDRHIGH */ -#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */ - -/* SDA_FRAMECTRL */ -#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ -#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ -#define SFC_CRC4WOOS (1 << 2) /* HW reports CRC error for write out of sync */ -#define SFC_ABORTALL (1 << 3) /* Abort cancels all in-progress frames */ - -/* pcmciaframectrl */ -#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */ -#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */ - -/* intrcvlazy */ -#define IRL_TO_MASK 0x00ffffff /* timeout */ -#define IRL_FC_MASK 0xff000000 /* frame count */ -#define IRL_FC_SHIFT 24 /* frame count */ - -/* rx header */ -typedef volatile struct { - u16 len; - u16 flags; -} sdpcmd_rxh_t; - -/* rx header flags */ -#define RXF_CRC 0x0001 /* CRC error detected */ -#define RXF_WOOS 0x0002 /* write frame out of sync */ -#define RXF_WF_TERM 0x0004 /* write frame terminated */ -#define RXF_ABORT 0x0008 /* write frame aborted */ -#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT) /* bad frame */ - -/* HW frame tag */ -#define SDPCM_FRAMETAG_LEN 4 /* HW frametag: 2 bytes len, 2 bytes check val */ - -#endif /* _sbsdpcmdev_h_ */ diff --git a/drivers/staging/brcm80211/include/sdio.h b/drivers/staging/brcm80211/include/sdio.h deleted file mode 100644 index 670e379b9aa..00000000000 --- a/drivers/staging/brcm80211/include/sdio.h +++ /dev/null @@ -1,552 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _SDIO_H -#define _SDIO_H - -#ifdef BCMSDIO - -/* CCCR structure for function 0 */ -typedef volatile struct { - u8 cccr_sdio_rev; /* RO, cccr and sdio revision */ - u8 sd_rev; /* RO, sd spec revision */ - u8 io_en; /* I/O enable */ - u8 io_rdy; /* I/O ready reg */ - u8 intr_ctl; /* Master and per function interrupt enable control */ - u8 intr_status; /* RO, interrupt pending status */ - u8 io_abort; /* read/write abort or reset all functions */ - u8 bus_inter; /* bus interface control */ - u8 capability; /* RO, card capability */ - - u8 cis_base_low; /* 0x9 RO, common CIS base address, LSB */ - u8 cis_base_mid; - u8 cis_base_high; /* 0xB RO, common CIS base address, MSB */ - - /* suspend/resume registers */ - u8 bus_suspend; /* 0xC */ - u8 func_select; /* 0xD */ - u8 exec_flag; /* 0xE */ - u8 ready_flag; /* 0xF */ - - u8 fn0_blk_size[2]; /* 0x10(LSB), 0x11(MSB) */ - - u8 power_control; /* 0x12 (SDIO version 1.10) */ - - u8 speed_control; /* 0x13 */ -} sdio_regs_t; - -/* SDIO Device CCCR offsets */ -#define SDIOD_CCCR_REV 0x00 -#define SDIOD_CCCR_SDREV 0x01 -#define SDIOD_CCCR_IOEN 0x02 -#define SDIOD_CCCR_IORDY 0x03 -#define SDIOD_CCCR_INTEN 0x04 -#define SDIOD_CCCR_INTPEND 0x05 -#define SDIOD_CCCR_IOABORT 0x06 -#define SDIOD_CCCR_BICTRL 0x07 -#define SDIOD_CCCR_CAPABLITIES 0x08 -#define SDIOD_CCCR_CISPTR_0 0x09 -#define SDIOD_CCCR_CISPTR_1 0x0A -#define SDIOD_CCCR_CISPTR_2 0x0B -#define SDIOD_CCCR_BUSSUSP 0x0C -#define SDIOD_CCCR_FUNCSEL 0x0D -#define SDIOD_CCCR_EXECFLAGS 0x0E -#define SDIOD_CCCR_RDYFLAGS 0x0F -#define SDIOD_CCCR_BLKSIZE_0 0x10 -#define SDIOD_CCCR_BLKSIZE_1 0x11 -#define SDIOD_CCCR_POWER_CONTROL 0x12 -#define SDIOD_CCCR_SPEED_CONTROL 0x13 - -/* Broadcom extensions (corerev >= 1) */ -#define SDIOD_CCCR_BRCM_SEPINT 0xf2 - -/* cccr_sdio_rev */ -#define SDIO_REV_SDIOID_MASK 0xf0 /* SDIO spec revision number */ -#define SDIO_REV_CCCRID_MASK 0x0f /* CCCR format version number */ - -/* sd_rev */ -#define SD_REV_PHY_MASK 0x0f /* SD format version number */ - -/* io_en */ -#define SDIO_FUNC_ENABLE_1 0x02 /* function 1 I/O enable */ -#define SDIO_FUNC_ENABLE_2 0x04 /* function 2 I/O enable */ - -/* io_rdys */ -#define SDIO_FUNC_READY_1 0x02 /* function 1 I/O ready */ -#define SDIO_FUNC_READY_2 0x04 /* function 2 I/O ready */ - -/* intr_ctl */ -#define INTR_CTL_MASTER_EN 0x1 /* interrupt enable master */ -#define INTR_CTL_FUNC1_EN 0x2 /* interrupt enable for function 1 */ -#define INTR_CTL_FUNC2_EN 0x4 /* interrupt enable for function 2 */ - -/* intr_status */ -#define INTR_STATUS_FUNC1 0x2 /* interrupt pending for function 1 */ -#define INTR_STATUS_FUNC2 0x4 /* interrupt pending for function 2 */ - -/* io_abort */ -#define IO_ABORT_RESET_ALL 0x08 /* I/O card reset */ -#define IO_ABORT_FUNC_MASK 0x07 /* abort selction: function x */ - -/* bus_inter */ -#define BUS_CARD_DETECT_DIS 0x80 /* Card Detect disable */ -#define BUS_SPI_CONT_INTR_CAP 0x40 /* support continuous SPI interrupt */ -#define BUS_SPI_CONT_INTR_EN 0x20 /* continuous SPI interrupt enable */ -#define BUS_SD_DATA_WIDTH_MASK 0x03 /* bus width mask */ -#define BUS_SD_DATA_WIDTH_4BIT 0x02 /* bus width 4-bit mode */ -#define BUS_SD_DATA_WIDTH_1BIT 0x00 /* bus width 1-bit mode */ - -/* capability */ -#define SDIO_CAP_4BLS 0x80 /* 4-bit support for low speed card */ -#define SDIO_CAP_LSC 0x40 /* low speed card */ -#define SDIO_CAP_E4MI 0x20 /* enable interrupt between block of data in 4-bit mode */ -#define SDIO_CAP_S4MI 0x10 /* support interrupt between block of data in 4-bit mode */ -#define SDIO_CAP_SBS 0x08 /* support suspend/resume */ -#define SDIO_CAP_SRW 0x04 /* support read wait */ -#define SDIO_CAP_SMB 0x02 /* support multi-block transfer */ -#define SDIO_CAP_SDC 0x01 /* Support Direct commands during multi-byte transfer */ - -/* power_control */ -#define SDIO_POWER_SMPC 0x01 /* supports master power control (RO) */ -#define SDIO_POWER_EMPC 0x02 /* enable master power control (allow > 200mA) (RW) */ - -/* speed_control (control device entry into high-speed clocking mode) */ -#define SDIO_SPEED_SHS 0x01 /* supports high-speed [clocking] mode (RO) */ -#define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */ - -/* brcm sepint */ -#define SDIO_SEPINT_MASK 0x01 /* route sdpcmdev intr onto separate pad (chip-specific) */ -#define SDIO_SEPINT_OE 0x02 /* 1 asserts output enable for above pad */ -#define SDIO_SEPINT_ACT_HI 0x04 /* use active high interrupt level instead of active low */ - -/* FBR structure for function 1-7, FBR addresses and register offsets */ -typedef volatile struct { - u8 devctr; /* device interface, CSA control */ - u8 ext_dev; /* extended standard I/O device type code */ - u8 pwr_sel; /* power selection support */ - u8 PAD[6]; /* reserved */ - - u8 cis_low; /* CIS LSB */ - u8 cis_mid; - u8 cis_high; /* CIS MSB */ - u8 csa_low; /* code storage area, LSB */ - u8 csa_mid; - u8 csa_high; /* code storage area, MSB */ - u8 csa_dat_win; /* data access window to function */ - - u8 fnx_blk_size[2]; /* block size, little endian */ -} sdio_fbr_t; - -/* Maximum number of I/O funcs */ -#define SDIOD_MAX_IOFUNCS 7 - -/* SDIO Device FBR Start Address */ -#define SDIOD_FBR_STARTADDR 0x100 - -/* SDIO Device FBR Size */ -#define SDIOD_FBR_SIZE 0x100 - -/* Macro to calculate FBR register base */ -#define SDIOD_FBR_BASE(n) ((n) * 0x100) - -/* Function register offsets */ -#define SDIOD_FBR_DEVCTR 0x00 /* basic info for function */ -#define SDIOD_FBR_EXT_DEV 0x01 /* extended I/O device code */ -#define SDIOD_FBR_PWR_SEL 0x02 /* power selection bits */ - -/* SDIO Function CIS ptr offset */ -#define SDIOD_FBR_CISPTR_0 0x09 -#define SDIOD_FBR_CISPTR_1 0x0A -#define SDIOD_FBR_CISPTR_2 0x0B - -/* Code Storage Area pointer */ -#define SDIOD_FBR_CSA_ADDR_0 0x0C -#define SDIOD_FBR_CSA_ADDR_1 0x0D -#define SDIOD_FBR_CSA_ADDR_2 0x0E -#define SDIOD_FBR_CSA_DATA 0x0F - -/* SDIO Function I/O Block Size */ -#define SDIOD_FBR_BLKSIZE_0 0x10 -#define SDIOD_FBR_BLKSIZE_1 0x11 - -/* devctr */ -#define SDIOD_FBR_DEVCTR_DIC 0x0f /* device interface code */ -#define SDIOD_FBR_DECVTR_CSA 0x40 /* CSA support flag */ -#define SDIOD_FBR_DEVCTR_CSA_EN 0x80 /* CSA enabled */ -/* interface codes */ -#define SDIOD_DIC_NONE 0 /* SDIO standard interface is not supported */ -#define SDIOD_DIC_UART 1 -#define SDIOD_DIC_BLUETOOTH_A 2 -#define SDIOD_DIC_BLUETOOTH_B 3 -#define SDIOD_DIC_GPS 4 -#define SDIOD_DIC_CAMERA 5 -#define SDIOD_DIC_PHS 6 -#define SDIOD_DIC_WLAN 7 -#define SDIOD_DIC_EXT 0xf /* extended device interface, read ext_dev register */ - -/* pwr_sel */ -#define SDIOD_PWR_SEL_SPS 0x01 /* supports power selection */ -#define SDIOD_PWR_SEL_EPS 0x02 /* enable power selection (low-current mode) */ - -/* misc defines */ -#define SDIO_FUNC_0 0 -#define SDIO_FUNC_1 1 -#define SDIO_FUNC_2 2 -#define SDIO_FUNC_3 3 -#define SDIO_FUNC_4 4 -#define SDIO_FUNC_5 5 -#define SDIO_FUNC_6 6 -#define SDIO_FUNC_7 7 - -#define SD_CARD_TYPE_UNKNOWN 0 /* bad type or unrecognized */ -#define SD_CARD_TYPE_IO 1 /* IO only card */ -#define SD_CARD_TYPE_MEMORY 2 /* memory only card */ -#define SD_CARD_TYPE_COMBO 3 /* IO and memory combo card */ - -#define SDIO_MAX_BLOCK_SIZE 2048 /* maximum block size for block mode operation */ -#define SDIO_MIN_BLOCK_SIZE 1 /* minimum block size for block mode operation */ - -/* Card registers: status bit position */ -#define CARDREG_STATUS_BIT_OUTOFRANGE 31 -#define CARDREG_STATUS_BIT_COMCRCERROR 23 -#define CARDREG_STATUS_BIT_ILLEGALCOMMAND 22 -#define CARDREG_STATUS_BIT_ERROR 19 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE3 12 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE2 11 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE1 10 -#define CARDREG_STATUS_BIT_IOCURRENTSTATE0 9 -#define CARDREG_STATUS_BIT_FUN_NUM_ERROR 4 - -#define SD_CMD_GO_IDLE_STATE 0 /* mandatory for SDIO */ -#define SD_CMD_SEND_OPCOND 1 -#define SD_CMD_MMC_SET_RCA 3 -#define SD_CMD_IO_SEND_OP_COND 5 /* mandatory for SDIO */ -#define SD_CMD_SELECT_DESELECT_CARD 7 -#define SD_CMD_SEND_CSD 9 -#define SD_CMD_SEND_CID 10 -#define SD_CMD_STOP_TRANSMISSION 12 -#define SD_CMD_SEND_STATUS 13 -#define SD_CMD_GO_INACTIVE_STATE 15 -#define SD_CMD_SET_BLOCKLEN 16 -#define SD_CMD_READ_SINGLE_BLOCK 17 -#define SD_CMD_READ_MULTIPLE_BLOCK 18 -#define SD_CMD_WRITE_BLOCK 24 -#define SD_CMD_WRITE_MULTIPLE_BLOCK 25 -#define SD_CMD_PROGRAM_CSD 27 -#define SD_CMD_SET_WRITE_PROT 28 -#define SD_CMD_CLR_WRITE_PROT 29 -#define SD_CMD_SEND_WRITE_PROT 30 -#define SD_CMD_ERASE_WR_BLK_START 32 -#define SD_CMD_ERASE_WR_BLK_END 33 -#define SD_CMD_ERASE 38 -#define SD_CMD_LOCK_UNLOCK 42 -#define SD_CMD_IO_RW_DIRECT 52 /* mandatory for SDIO */ -#define SD_CMD_IO_RW_EXTENDED 53 /* mandatory for SDIO */ -#define SD_CMD_APP_CMD 55 -#define SD_CMD_GEN_CMD 56 -#define SD_CMD_READ_OCR 58 -#define SD_CMD_CRC_ON_OFF 59 /* mandatory for SDIO */ -#define SD_ACMD_SD_STATUS 13 -#define SD_ACMD_SEND_NUM_WR_BLOCKS 22 -#define SD_ACMD_SET_WR_BLOCK_ERASE_CNT 23 -#define SD_ACMD_SD_SEND_OP_COND 41 -#define SD_ACMD_SET_CLR_CARD_DETECT 42 -#define SD_ACMD_SEND_SCR 51 - -/* argument for SD_CMD_IO_RW_DIRECT and SD_CMD_IO_RW_EXTENDED */ -#define SD_IO_OP_READ 0 /* Read_Write: Read */ -#define SD_IO_OP_WRITE 1 /* Read_Write: Write */ -#define SD_IO_RW_NORMAL 0 /* no RAW */ -#define SD_IO_RW_RAW 1 /* RAW */ -#define SD_IO_BYTE_MODE 0 /* Byte Mode */ -#define SD_IO_BLOCK_MODE 1 /* BlockMode */ -#define SD_IO_FIXED_ADDRESS 0 /* fix Address */ -#define SD_IO_INCREMENT_ADDRESS 1 /* IncrementAddress */ - -/* build SD_CMD_IO_RW_DIRECT Argument */ -#define SDIO_IO_RW_DIRECT_ARG(rw, raw, func, addr, data) \ - ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((raw) & 1) << 27) | \ - (((addr) & 0x1FFFF) << 9) | ((data) & 0xFF)) - -/* build SD_CMD_IO_RW_EXTENDED Argument */ -#define SDIO_IO_RW_EXTENDED_ARG(rw, blk, func, addr, inc_addr, count) \ - ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((blk) & 1) << 27) | \ - (((inc_addr) & 1) << 26) | (((addr) & 0x1FFFF) << 9) | ((count) & 0x1FF)) - -/* SDIO response parameters */ -#define SD_RSP_NO_NONE 0 -#define SD_RSP_NO_1 1 -#define SD_RSP_NO_2 2 -#define SD_RSP_NO_3 3 -#define SD_RSP_NO_4 4 -#define SD_RSP_NO_5 5 -#define SD_RSP_NO_6 6 - - /* Modified R6 response (to CMD3) */ -#define SD_RSP_MR6_COM_CRC_ERROR 0x8000 -#define SD_RSP_MR6_ILLEGAL_COMMAND 0x4000 -#define SD_RSP_MR6_ERROR 0x2000 - - /* Modified R1 in R4 Response (to CMD5) */ -#define SD_RSP_MR1_SBIT 0x80 -#define SD_RSP_MR1_PARAMETER_ERROR 0x40 -#define SD_RSP_MR1_RFU5 0x20 -#define SD_RSP_MR1_FUNC_NUM_ERROR 0x10 -#define SD_RSP_MR1_COM_CRC_ERROR 0x08 -#define SD_RSP_MR1_ILLEGAL_COMMAND 0x04 -#define SD_RSP_MR1_RFU1 0x02 -#define SD_RSP_MR1_IDLE_STATE 0x01 - - /* R5 response (to CMD52 and CMD53) */ -#define SD_RSP_R5_COM_CRC_ERROR 0x80 -#define SD_RSP_R5_ILLEGAL_COMMAND 0x40 -#define SD_RSP_R5_IO_CURRENTSTATE1 0x20 -#define SD_RSP_R5_IO_CURRENTSTATE0 0x10 -#define SD_RSP_R5_ERROR 0x08 -#define SD_RSP_R5_RFU 0x04 -#define SD_RSP_R5_FUNC_NUM_ERROR 0x02 -#define SD_RSP_R5_OUT_OF_RANGE 0x01 - -#define SD_RSP_R5_ERRBITS 0xCB - -/* ------------------------------------------------ - * SDIO Commands and responses - * - * I/O only commands are: - * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 - * ------------------------------------------------ - */ - -/* SDIO Commands */ -#define SDIOH_CMD_0 0 -#define SDIOH_CMD_3 3 -#define SDIOH_CMD_5 5 -#define SDIOH_CMD_7 7 -#define SDIOH_CMD_15 15 -#define SDIOH_CMD_52 52 -#define SDIOH_CMD_53 53 -#define SDIOH_CMD_59 59 - -/* SDIO Command Responses */ -#define SDIOH_RSP_NONE 0 -#define SDIOH_RSP_R1 1 -#define SDIOH_RSP_R2 2 -#define SDIOH_RSP_R3 3 -#define SDIOH_RSP_R4 4 -#define SDIOH_RSP_R5 5 -#define SDIOH_RSP_R6 6 - -/* - * SDIO Response Error flags - */ -#define SDIOH_RSP5_ERROR_FLAGS 0xCB - -/* ------------------------------------------------ - * SDIO Command structures. I/O only commands are: - * - * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 - * ------------------------------------------------ - */ - -#define CMD5_OCR_M BITFIELD_MASK(24) -#define CMD5_OCR_S 0 - -#define CMD7_RCA_M BITFIELD_MASK(16) -#define CMD7_RCA_S 16 - -#define CMD_15_RCA_M BITFIELD_MASK(16) -#define CMD_15_RCA_S 16 - -#define CMD52_DATA_M BITFIELD_MASK(8) /* Bits [7:0] - Write Data/Stuff bits of CMD52 - */ -#define CMD52_DATA_S 0 -#define CMD52_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ -#define CMD52_REG_ADDR_S 9 -#define CMD52_RAW_M BITFIELD_MASK(1) /* Bit 27 - Read after Write flag */ -#define CMD52_RAW_S 27 -#define CMD52_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ -#define CMD52_FUNCTION_S 28 -#define CMD52_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ -#define CMD52_RW_FLAG_S 31 - -#define CMD53_BYTE_BLK_CNT_M BITFIELD_MASK(9) /* Bits [8:0] - Byte/Block Count of CMD53 */ -#define CMD53_BYTE_BLK_CNT_S 0 -#define CMD53_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ -#define CMD53_REG_ADDR_S 9 -#define CMD53_OP_CODE_M BITFIELD_MASK(1) /* Bit 26 - R/W Operation Code */ -#define CMD53_OP_CODE_S 26 -#define CMD53_BLK_MODE_M BITFIELD_MASK(1) /* Bit 27 - Block Mode */ -#define CMD53_BLK_MODE_S 27 -#define CMD53_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ -#define CMD53_FUNCTION_S 28 -#define CMD53_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ -#define CMD53_RW_FLAG_S 31 - -/* ------------------------------------------------------ - * SDIO Command Response structures for SD1 and SD4 modes - * ----------------------------------------------------- - */ -#define RSP4_IO_OCR_M BITFIELD_MASK(24) /* Bits [23:0] - Card's OCR Bits [23:0] */ -#define RSP4_IO_OCR_S 0 -#define RSP4_STUFF_M BITFIELD_MASK(3) /* Bits [26:24] - Stuff bits */ -#define RSP4_STUFF_S 24 -#define RSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 27 - Memory present */ -#define RSP4_MEM_PRESENT_S 27 -#define RSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [30:28] - Number of I/O funcs */ -#define RSP4_NUM_FUNCS_S 28 -#define RSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 31 - SDIO card ready */ -#define RSP4_CARD_READY_S 31 - -#define RSP6_STATUS_M BITFIELD_MASK(16) /* Bits [15:0] - Card status bits [19,22,23,12:0] - */ -#define RSP6_STATUS_S 0 -#define RSP6_IO_RCA_M BITFIELD_MASK(16) /* Bits [31:16] - RCA bits[31-16] */ -#define RSP6_IO_RCA_S 16 - -#define RSP1_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error */ -#define RSP1_AKE_SEQ_ERROR_S 3 -#define RSP1_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ -#define RSP1_APP_CMD_S 5 -#define RSP1_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data (buff empty) */ -#define RSP1_READY_FOR_DATA_S 8 -#define RSP1_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - State of card - * when Cmd was received - */ -#define RSP1_CURR_STATE_S 9 -#define RSP1_EARSE_RESET_M BITFIELD_MASK(1) /* Bit 13 - Erase seq cleared */ -#define RSP1_EARSE_RESET_S 13 -#define RSP1_CARD_ECC_DISABLE_M BITFIELD_MASK(1) /* Bit 14 - Card ECC disabled */ -#define RSP1_CARD_ECC_DISABLE_S 14 -#define RSP1_WP_ERASE_SKIP_M BITFIELD_MASK(1) /* Bit 15 - Partial blocks erased due to W/P */ -#define RSP1_WP_ERASE_SKIP_S 15 -#define RSP1_CID_CSD_OVERW_M BITFIELD_MASK(1) /* Bit 16 - Illegal write to CID or R/O bits - * of CSD - */ -#define RSP1_CID_CSD_OVERW_S 16 -#define RSP1_ERROR_M BITFIELD_MASK(1) /* Bit 19 - General/Unknown error */ -#define RSP1_ERROR_S 19 -#define RSP1_CC_ERROR_M BITFIELD_MASK(1) /* Bit 20 - Internal Card Control error */ -#define RSP1_CC_ERROR_S 20 -#define RSP1_CARD_ECC_FAILED_M BITFIELD_MASK(1) /* Bit 21 - Card internal ECC failed - * to correct data - */ -#define RSP1_CARD_ECC_FAILED_S 21 -#define RSP1_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 22 - Cmd not legal for the card state */ -#define RSP1_ILLEGAL_CMD_S 22 -#define RSP1_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 23 - CRC check of previous command failed - */ -#define RSP1_COM_CRC_ERROR_S 23 -#define RSP1_LOCK_UNLOCK_FAIL_M BITFIELD_MASK(1) /* Bit 24 - Card lock-unlock Cmd Seq error */ -#define RSP1_LOCK_UNLOCK_FAIL_S 24 -#define RSP1_CARD_LOCKED_M BITFIELD_MASK(1) /* Bit 25 - Card locked by the host */ -#define RSP1_CARD_LOCKED_S 25 -#define RSP1_WP_VIOLATION_M BITFIELD_MASK(1) /* Bit 26 - Attempt to program - * write-protected blocks - */ -#define RSP1_WP_VIOLATION_S 26 -#define RSP1_ERASE_PARAM_M BITFIELD_MASK(1) /* Bit 27 - Invalid erase blocks */ -#define RSP1_ERASE_PARAM_S 27 -#define RSP1_ERASE_SEQ_ERR_M BITFIELD_MASK(1) /* Bit 28 - Erase Cmd seq error */ -#define RSP1_ERASE_SEQ_ERR_S 28 -#define RSP1_BLK_LEN_ERR_M BITFIELD_MASK(1) /* Bit 29 - Block length error */ -#define RSP1_BLK_LEN_ERR_S 29 -#define RSP1_ADDR_ERR_M BITFIELD_MASK(1) /* Bit 30 - Misaligned address */ -#define RSP1_ADDR_ERR_S 30 -#define RSP1_OUT_OF_RANGE_M BITFIELD_MASK(1) /* Bit 31 - Cmd arg was out of range */ -#define RSP1_OUT_OF_RANGE_S 31 - -#define RSP5_DATA_M BITFIELD_MASK(8) /* Bits [0:7] - data */ -#define RSP5_DATA_S 0 -#define RSP5_FLAGS_M BITFIELD_MASK(8) /* Bit [15:8] - Rsp flags */ -#define RSP5_FLAGS_S 8 -#define RSP5_STUFF_M BITFIELD_MASK(16) /* Bits [31:16] - Stuff bits */ -#define RSP5_STUFF_S 16 - -/* ---------------------------------------------- - * SDIO Command Response structures for SPI mode - * ---------------------------------------------- - */ -#define SPIRSP4_IO_OCR_M BITFIELD_MASK(16) /* Bits [15:0] - Card's OCR Bits [23:8] */ -#define SPIRSP4_IO_OCR_S 0 -#define SPIRSP4_STUFF_M BITFIELD_MASK(3) /* Bits [18:16] - Stuff bits */ -#define SPIRSP4_STUFF_S 16 -#define SPIRSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 19 - Memory present */ -#define SPIRSP4_MEM_PRESENT_S 19 -#define SPIRSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [22:20] - Number of I/O funcs */ -#define SPIRSP4_NUM_FUNCS_S 20 -#define SPIRSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 23 - SDIO card ready */ -#define SPIRSP4_CARD_READY_S 23 -#define SPIRSP4_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - idle state */ -#define SPIRSP4_IDLE_STATE_S 24 -#define SPIRSP4_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ -#define SPIRSP4_ILLEGAL_CMD_S 26 -#define SPIRSP4_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ -#define SPIRSP4_COM_CRC_ERROR_S 27 -#define SPIRSP4_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error - */ -#define SPIRSP4_FUNC_NUM_ERROR_S 28 -#define SPIRSP4_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ -#define SPIRSP4_PARAM_ERROR_S 30 -#define SPIRSP4_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ -#define SPIRSP4_START_BIT_S 31 - -#define SPIRSP5_DATA_M BITFIELD_MASK(8) /* Bits [23:16] - R/W Data */ -#define SPIRSP5_DATA_S 16 -#define SPIRSP5_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - Idle state */ -#define SPIRSP5_IDLE_STATE_S 24 -#define SPIRSP5_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ -#define SPIRSP5_ILLEGAL_CMD_S 26 -#define SPIRSP5_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ -#define SPIRSP5_COM_CRC_ERROR_S 27 -#define SPIRSP5_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error - */ -#define SPIRSP5_FUNC_NUM_ERROR_S 28 -#define SPIRSP5_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ -#define SPIRSP5_PARAM_ERROR_S 30 -#define SPIRSP5_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ -#define SPIRSP5_START_BIT_S 31 - -/* RSP6 card status format; Pg 68 Physical Layer spec v 1.10 */ -#define RSP6STAT_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error - */ -#define RSP6STAT_AKE_SEQ_ERROR_S 3 -#define RSP6STAT_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ -#define RSP6STAT_APP_CMD_S 5 -#define RSP6STAT_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data - * (buff empty) - */ -#define RSP6STAT_READY_FOR_DATA_S 8 -#define RSP6STAT_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - Card state at - * Cmd reception - */ -#define RSP6STAT_CURR_STATE_S 9 -#define RSP6STAT_ERROR_M BITFIELD_MASK(1) /* Bit 13 - General/Unknown error Bit 19 - */ -#define RSP6STAT_ERROR_S 13 -#define RSP6STAT_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 14 - Illegal cmd for - * card state Bit 22 - */ -#define RSP6STAT_ILLEGAL_CMD_S 14 -#define RSP6STAT_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 15 - CRC previous command - * failed Bit 23 - */ -#define RSP6STAT_COM_CRC_ERROR_S 15 - -#define SDIOH_XFER_TYPE_READ SD_IO_OP_READ -#define SDIOH_XFER_TYPE_WRITE SD_IO_OP_WRITE - -#endif /* def BCMSDIO */ -#endif /* _SDIO_H */ diff --git a/drivers/staging/brcm80211/include/soc.h b/drivers/staging/brcm80211/include/soc.h new file mode 100644 index 00000000000..6e5a705c493 --- /dev/null +++ b/drivers/staging/brcm80211/include/soc.h @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2010 Broadcom Corporation + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + +#ifndef _BRCM_SOC_H +#define _BRCM_SOC_H + +#ifdef SI_ENUM_BASE_VARIABLE +#define SI_ENUM_BASE (sii->pub.si_enum_base) +#else +#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ +#endif /* SI_ENUM_BASE_VARIABLE */ + +/* core codes */ +#define NODEV_CORE_ID 0x700 /* Invalid coreid */ +#define CC_CORE_ID 0x800 /* chipcommon core */ +#define ILINE20_CORE_ID 0x801 /* iline20 core */ +#define SRAM_CORE_ID 0x802 /* sram core */ +#define SDRAM_CORE_ID 0x803 /* sdram core */ +#define PCI_CORE_ID 0x804 /* pci core */ +#define MIPS_CORE_ID 0x805 /* mips core */ +#define ENET_CORE_ID 0x806 /* enet mac core */ +#define CODEC_CORE_ID 0x807 /* v90 codec core */ +#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */ +#define ADSL_CORE_ID 0x809 /* ADSL core */ +#define ILINE100_CORE_ID 0x80a /* iline100 core */ +#define IPSEC_CORE_ID 0x80b /* ipsec core */ +#define UTOPIA_CORE_ID 0x80c /* utopia core */ +#define PCMCIA_CORE_ID 0x80d /* pcmcia core */ +#define SOCRAM_CORE_ID 0x80e /* internal memory core */ +#define MEMC_CORE_ID 0x80f /* memc sdram core */ +#define OFDM_CORE_ID 0x810 /* OFDM phy core */ +#define EXTIF_CORE_ID 0x811 /* external interface core */ +#define D11_CORE_ID 0x812 /* 802.11 MAC core */ +#define APHY_CORE_ID 0x813 /* 802.11a phy core */ +#define BPHY_CORE_ID 0x814 /* 802.11b phy core */ +#define GPHY_CORE_ID 0x815 /* 802.11g phy core */ +#define MIPS33_CORE_ID 0x816 /* mips3302 core */ +#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */ +#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */ +#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */ +#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */ +#define SDIOH_CORE_ID 0x81b /* sdio host core */ +#define ROBO_CORE_ID 0x81c /* roboswitch core */ +#define ATA100_CORE_ID 0x81d /* parallel ATA core */ +#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */ +#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */ +#define PCIE_CORE_ID 0x820 /* pci express core */ +#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */ +#define SRAMC_CORE_ID 0x822 /* SRAM controller core */ +#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */ +#define ARM11_CORE_ID 0x824 /* ARM 1176 core */ +#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */ +#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */ +#define PMU_CORE_ID 0x827 /* PMU core */ +#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */ +#define SDIOD_CORE_ID 0x829 /* SDIO device core */ +#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */ +#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */ +#define MIPS74K_CORE_ID 0x82c /* mips 74k core */ +#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */ +#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */ +#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */ +#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */ +#define SC_CORE_ID 0x831 /* shared common core */ +#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */ +#define SPIH_CORE_ID 0x833 /* SPI host core */ +#define I2S_CORE_ID 0x834 /* I2S core */ +#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */ +#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */ +#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */ +#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all + * unused address ranges + */ + +/* Common core control flags */ +#define SICF_BIST_EN 0x8000 +#define SICF_PME_EN 0x4000 +#define SICF_CORE_BITS 0x3ffc +#define SICF_FGC 0x0002 +#define SICF_CLOCK_EN 0x0001 + +#endif /* _BRCM_SOC_H */ diff --git a/drivers/staging/brcm80211/include/wlioctl.h b/drivers/staging/brcm80211/include/wlioctl.h deleted file mode 100644 index 2876bd9eff8..00000000000 --- a/drivers/staging/brcm80211/include/wlioctl.h +++ /dev/null @@ -1,1365 +0,0 @@ -/* - * Copyright (c) 2010 Broadcom Corporation - * - * Permission to use, copy, modify, and/or distribute this software for any - * purpose with or without fee is hereby granted, provided that the above - * copyright notice and this permission notice appear in all copies. - * - * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES - * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF - * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES - * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION - * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN - * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. - */ - -#ifndef _wlioctl_h_ -#define _wlioctl_h_ - -#include <linux/ieee80211.h> -#ifdef BRCM_FULLMAC -#include <proto/bcmeth.h> -#endif -#include <proto/bcmevent.h> -#include <proto/802.11.h> -#include <bcmwifi.h> - -#ifndef INTF_NAME_SIZ -#define INTF_NAME_SIZ 16 -#endif - -#ifdef BRCM_FULLMAC - -#define WL_BSS_INFO_VERSION 108 /* current ver of wl_bss_info struct */ - -/* BSS info structure - * Applications MUST CHECK ie_offset field and length field to access IEs and - * next bss_info structure in a vector (in wl_scan_results_t) - */ -typedef struct wl_bss_info { - u32 version; /* version field */ - u32 length; /* byte length of data in this record, - * starting at version and including IEs - */ - u8 BSSID[ETH_ALEN]; - u16 beacon_period; /* units are Kusec */ - u16 capability; /* Capability information */ - u8 SSID_len; - u8 SSID[32]; - struct { - uint count; /* # rates in this set */ - u8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ - } rateset; /* supported rates */ - chanspec_t chanspec; /* chanspec for bss */ - u16 atim_window; /* units are Kusec */ - u8 dtim_period; /* DTIM period */ - s16 RSSI; /* receive signal strength (in dBm) */ - s8 phy_noise; /* noise (in dBm) */ - - u8 n_cap; /* BSS is 802.11N Capable */ - u32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */ - u8 ctl_ch; /* 802.11N BSS control channel number */ - u32 reserved32[1]; /* Reserved for expansion of BSS properties */ - u8 flags; /* flags */ - u8 reserved[3]; /* Reserved for expansion of BSS properties */ - u8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */ - - u16 ie_offset; /* offset at which IEs start, from beginning */ - u32 ie_length; /* byte length of Information Elements */ - s16 SNR; /* average SNR of during frame reception */ - /* Add new fields here */ - /* variable length Information Elements */ -} wl_bss_info_t; -#endif /* BRCM_FULLMAC */ - -typedef struct wlc_ssid { - u32 SSID_len; - unsigned char SSID[32]; -} wlc_ssid_t; - -#ifdef BRCM_FULLMAC -typedef struct chan_scandata { - u8 txpower; - u8 pad; - chanspec_t channel; /* Channel num, bw, ctrl_sb and band */ - u32 channel_mintime; - u32 channel_maxtime; -} chan_scandata_t; - -typedef enum wl_scan_type { - EXTDSCAN_FOREGROUND_SCAN, - EXTDSCAN_BACKGROUND_SCAN, - EXTDSCAN_FORCEDBACKGROUND_SCAN -} wl_scan_type_t; - -#define WLC_EXTDSCAN_MAX_SSID 5 - -#define WL_BSS_FLAGS_FROM_BEACON 0x01 /* bss_info derived from beacon */ -#define WL_BSS_FLAGS_FROM_CACHE 0x02 /* bss_info collected from cache */ -#define WL_BSS_FLAGS_RSSI_ONCHANNEL 0x04 /* rssi info was received on channel (vs offchannel) */ - -typedef struct wl_extdscan_params { - s8 nprobes; /* 0, passive, otherwise active */ - s8 split_scan; /* split scan */ - s8 band; /* band */ - s8 pad; - wlc_ssid_t ssid[WLC_EXTDSCAN_MAX_SSID]; /* ssid list */ - u32 tx_rate; /* in 500ksec units */ - wl_scan_type_t scan_type; /* enum */ - s32 channel_num; - chan_scandata_t channel_list[1]; /* list of chandata structs */ -} wl_extdscan_params_t; - -#define WL_EXTDSCAN_PARAMS_FIXED_SIZE (sizeof(wl_extdscan_params_t) - sizeof(chan_scandata_t)) - -#define WL_BSSTYPE_INFRA 1 -#define WL_BSSTYPE_INDEP 0 -#define WL_BSSTYPE_ANY 2 - -/* Bitmask for scan_type */ -#define WL_SCANFLAGS_PASSIVE 0x01 /* force passive scan */ -#define WL_SCANFLAGS_RESERVED 0x02 /* Reserved */ -#define WL_SCANFLAGS_PROHIBITED 0x04 /* allow scanning prohibited channels */ - -typedef struct wl_scan_params { - wlc_ssid_t ssid; /* default: {0, ""} */ - u8 bssid[ETH_ALEN]; /* default: bcast */ - s8 bss_type; /* default: any, - * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT - */ - u8 scan_type; /* flags, 0 use default */ - s32 nprobes; /* -1 use default, number of probes per channel */ - s32 active_time; /* -1 use default, dwell time per channel for - * active scanning - */ - s32 passive_time; /* -1 use default, dwell time per channel - * for passive scanning - */ - s32 home_time; /* -1 use default, dwell time for the home channel - * between channel scans - */ - s32 channel_num; /* count of channels and ssids that follow - * - * low half is count of channels in channel_list, 0 - * means default (use all available channels) - * - * high half is entries in wlc_ssid_t array that - * follows channel_list, aligned for s32 (4 bytes) - * meaning an odd channel count implies a 2-byte pad - * between end of channel_list and first ssid - * - * if ssid count is zero, single ssid in the fixed - * parameter portion is assumed, otherwise ssid in - * the fixed portion is ignored - */ - u16 channel_list[1]; /* list of chanspecs */ -} wl_scan_params_t; - -/* size of wl_scan_params not including variable length array */ -#define WL_SCAN_PARAMS_FIXED_SIZE 64 - -/* masks for channel and ssid count */ -#define WL_SCAN_PARAMS_COUNT_MASK 0x0000ffff -#define WL_SCAN_PARAMS_NSSID_SHIFT 16 - -#define WL_SCAN_ACTION_START 1 -#define WL_SCAN_ACTION_CONTINUE 2 -#define WL_SCAN_ACTION_ABORT 3 - -#define ISCAN_REQ_VERSION 1 - -/* incremental scan struct */ -typedef struct wl_iscan_params { - u32 version; - u16 action; - u16 scan_duration; - wl_scan_params_t params; -} wl_iscan_params_t; - -/* 3 fields + size of wl_scan_params, not including variable length array */ -#define WL_ISCAN_PARAMS_FIXED_SIZE (offsetof(wl_iscan_params_t, params) + sizeof(wlc_ssid_t)) - -typedef struct wl_scan_results { - u32 buflen; - u32 version; - u32 count; - wl_bss_info_t bss_info[1]; -} wl_scan_results_t; - -/* size of wl_scan_results not including variable length array */ -#define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t)) - -/* wl_iscan_results status values */ -#define WL_SCAN_RESULTS_SUCCESS 0 -#define WL_SCAN_RESULTS_PARTIAL 1 -#define WL_SCAN_RESULTS_PENDING 2 -#define WL_SCAN_RESULTS_ABORTED 3 -#define WL_SCAN_RESULTS_NO_MEM 4 - -#define ESCAN_REQ_VERSION 1 - -typedef struct wl_escan_params { - u32 version; - u16 action; - u16 sync_id; - wl_scan_params_t params; -} wl_escan_params_t; - -#define WL_ESCAN_PARAMS_FIXED_SIZE (offsetof(wl_escan_params_t, params) + sizeof(wlc_ssid_t)) - -typedef struct wl_escan_result { - u32 buflen; - u32 version; - u16 sync_id; - u16 bss_count; - wl_bss_info_t bss_info[1]; -} wl_escan_result_t; - -#define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t)) - -/* incremental scan results struct */ -typedef struct wl_iscan_results { - u32 status; - wl_scan_results_t results; -} wl_iscan_results_t; - -/* size of wl_iscan_results not including variable length array */ -#define WL_ISCAN_RESULTS_FIXED_SIZE \ - (WL_SCAN_RESULTS_FIXED_SIZE + offsetof(wl_iscan_results_t, results)) - -typedef struct wl_probe_params { - wlc_ssid_t ssid; - u8 bssid[ETH_ALEN]; - u8 mac[ETH_ALEN]; -} wl_probe_params_t; -#endif /* BRCM_FULLMAC */ - -#define WL_NUMRATES 16 /* max # of rates in a rateset */ -typedef struct wl_rateset { - u32 count; /* # rates in this set */ - u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ -} wl_rateset_t; - -#ifdef BRCM_FULLMAC -typedef struct wl_rateset_args { - u32 count; /* # rates in this set */ - u8 rates[WL_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ - u8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ -} wl_rateset_args_t; - -/* u32 list */ -typedef struct wl_u32_list { - /* in - # of elements, out - # of entries */ - u32 count; - /* variable length u32 list */ - u32 element[1]; -} wl_u32_list_t; - -/* used for association with a specific BSSID and chanspec list */ -typedef struct wl_assoc_params { - u8 bssid[ETH_ALEN]; /* 00:00:00:00:00:00: broadcast scan */ - u16 bssid_cnt; - s32 chanspec_num; /* 0: all available channels, - * otherwise count of chanspecs in chanspec_list - */ - chanspec_t chanspec_list[1]; /* list of chanspecs */ -} wl_assoc_params_t; -#define WL_ASSOC_PARAMS_FIXED_SIZE (sizeof(wl_assoc_params_t) - sizeof(chanspec_t)) - -/* used for reassociation/roam to a specific BSSID and channel */ -typedef wl_assoc_params_t wl_reassoc_params_t; -#define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE - -/* used for join with or without a specific bssid and channel list */ -typedef struct wl_join_params { - wlc_ssid_t ssid; - wl_assoc_params_t params; /* optional field, but it must include the fixed portion - * of the wl_assoc_params_t struct when it does present. - */ -} wl_join_params_t; -#define WL_JOIN_PARAMS_FIXED_SIZE (sizeof(wl_join_params_t) - sizeof(chanspec_t)) - -#endif /* BRCM_FULLMAC */ - -/* defines used by the nrate iovar */ -#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ -#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ -#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ -#define NRATE_STF_SHIFT 8 /* stf mode shift */ -#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ -#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ -#define NRATE_SGI_MASK 0x00800000 /* sgi mode */ -#define NRATE_SGI_SHIFT 23 /* sgi mode */ -#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ -#define NRATE_LDPC_SHIFT 22 /* ldpc shift */ - -#define NRATE_STF_SISO 0 /* stf mode SISO */ -#define NRATE_STF_CDD 1 /* stf mode CDD */ -#define NRATE_STF_STBC 2 /* stf mode STBC */ -#define NRATE_STF_SDM 3 /* stf mode SDM */ - -#define ANTENNA_NUM_1 1 /* total number of antennas to be used */ -#define ANTENNA_NUM_2 2 -#define ANTENNA_NUM_3 3 -#define ANTENNA_NUM_4 4 - -#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ -#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */ -#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */ -#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */ -#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */ -#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */ -#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */ - -#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ - -typedef struct { - u8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ - u8 num_antcfg; /* number of available antenna configurations */ -} wlc_antselcfg_t; - -#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */ - -#ifdef BRCM_FULLMAC -#define MAX_CCA_CHANNELS 38 /* Max number of 20 Mhz wide channels */ -#define MAX_CCA_SECS 60 /* CCA keeps this many seconds history */ - -#define IBSS_MED 15 /* Mediom in-bss congestion percentage */ -#define IBSS_HI 25 /* Hi in-bss congestion percentage */ -#define OBSS_MED 12 -#define OBSS_HI 25 -#define INTERFER_MED 5 -#define INTERFER_HI 10 - -#define CCA_FLAG_2G_ONLY 0x01 /* Return a channel from 2.4 Ghz band */ -#define CCA_FLAG_5G_ONLY 0x02 /* Return a channel from 2.4 Ghz band */ -#define CCA_FLAG_IGNORE_DURATION 0x04 /* Ignore dwell time for each channel */ -#define CCA_FLAGS_PREFER_1_6_11 0x10 -#define CCA_FLAG_IGNORE_INTERFER 0x20 /* do not exlude channel based on interfer level */ - -#define CCA_ERRNO_BAND 1 /* After filtering for band pref, no choices left */ -#define CCA_ERRNO_DURATION 2 /* After filtering for duration, no choices left */ -#define CCA_ERRNO_PREF_CHAN 3 /* After filtering for chan pref, no choices left */ -#define CCA_ERRNO_INTERFER 4 /* After filtering for interference, no choices left */ -#define CCA_ERRNO_TOO_FEW 5 /* Only 1 channel was input */ - -typedef struct { - u32 duration; /* millisecs spent sampling this channel */ - u32 congest_ibss; /* millisecs in our bss (presumably this traffic will */ - /* move if cur bss moves channels) */ - u32 congest_obss; /* traffic not in our bss */ - u32 interference; /* millisecs detecting a non 802.11 interferer. */ - u32 timestamp; /* second timestamp */ -} cca_congest_t; - -typedef struct { - chanspec_t chanspec; /* Which channel? */ - u8 num_secs; /* How many secs worth of data */ - cca_congest_t secs[1]; /* Data */ -} cca_congest_channel_req_t; - -#endif /* BRCM_FULLMAC */ - -#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ - -#ifdef BRCM_FULLMAC -typedef struct wl_country { - char country_abbrev[WLC_CNTRY_BUF_SZ]; /* nul-terminated country code used in - * the Country IE - */ - s32 rev; /* revision specifier for ccode - * on set, -1 indicates unspecified. - * on get, rev >= 0 - */ - char ccode[WLC_CNTRY_BUF_SZ]; /* nul-terminated built-in country code. - * variable length, but fixed size in - * struct allows simple allocation for - * expected country strings <= 3 chars. - */ -} wl_country_t; - -typedef struct wl_channels_in_country { - u32 buflen; - u32 band; - char country_abbrev[WLC_CNTRY_BUF_SZ]; - u32 count; - u32 channel[1]; -} wl_channels_in_country_t; - -typedef struct wl_country_list { - u32 buflen; - u32 band_set; - u32 band; - u32 count; - char country_abbrev[1]; -} wl_country_list_t; - -#define WL_NUM_RPI_BINS 8 -#define WL_RM_TYPE_BASIC 1 -#define WL_RM_TYPE_CCA 2 -#define WL_RM_TYPE_RPI 3 - -#define WL_RM_FLAG_PARALLEL (1<<0) - -#define WL_RM_FLAG_LATE (1<<1) -#define WL_RM_FLAG_INCAPABLE (1<<2) -#define WL_RM_FLAG_REFUSED (1<<3) - -typedef struct wl_rm_req_elt { - s8 type; - s8 flags; - chanspec_t chanspec; - u32 token; /* token for this measurement */ - u32 tsf_h; /* TSF high 32-bits of Measurement start time */ - u32 tsf_l; /* TSF low 32-bits */ - u32 dur; /* TUs */ -} wl_rm_req_elt_t; - -typedef struct wl_rm_req { - u32 token; /* overall measurement set token */ - u32 count; /* number of measurement requests */ - void *cb; /* completion callback function: may be NULL */ - void *cb_arg; /* arg to completion callback function */ - wl_rm_req_elt_t req[1]; /* variable length block of requests */ -} wl_rm_req_t; -#define WL_RM_REQ_FIXED_LEN offsetof(wl_rm_req_t, req) - -typedef struct wl_rm_rep_elt { - s8 type; - s8 flags; - chanspec_t chanspec; - u32 token; /* token for this measurement */ - u32 tsf_h; /* TSF high 32-bits of Measurement start time */ - u32 tsf_l; /* TSF low 32-bits */ - u32 dur; /* TUs */ - u32 len; /* byte length of data block */ - u8 data[1]; /* variable length data block */ -} wl_rm_rep_elt_t; -#define WL_RM_REP_ELT_FIXED_LEN 24 /* length excluding data block */ - -#define WL_RPI_REP_BIN_NUM 8 -typedef struct wl_rm_rpi_rep { - u8 rpi[WL_RPI_REP_BIN_NUM]; - s8 rpi_max[WL_RPI_REP_BIN_NUM]; -} wl_rm_rpi_rep_t; - -typedef struct wl_rm_rep { - u32 token; /* overall measurement set token */ - u32 len; /* length of measurement report block */ - wl_rm_rep_elt_t rep[1]; /* variable length block of reports */ -} wl_rm_rep_t; -#define WL_RM_REP_FIXED_LEN 8 -#endif /* BRCM_FULLMAC */ - -/* Enumerate crypto algorithms */ -#define CRYPTO_ALGO_OFF 0 -#define CRYPTO_ALGO_WEP1 1 -#define CRYPTO_ALGO_TKIP 2 -#define CRYPTO_ALGO_WEP128 3 -#define CRYPTO_ALGO_AES_CCM 4 -#define CRYPTO_ALGO_AES_RESERVED1 5 -#define CRYPTO_ALGO_AES_RESERVED2 6 -#define CRYPTO_ALGO_NALG 7 - -#define WSEC_GEN_MIC_ERROR 0x0001 -#define WSEC_GEN_REPLAY 0x0002 -#define WSEC_GEN_ICV_ERROR 0x0004 - -#define WL_SOFT_KEY (1 << 0) /* Indicates this key is using soft encrypt */ -#define WL_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ -#define WL_KF_RES_4 (1 << 4) /* Reserved for backward compat */ -#define WL_KF_RES_5 (1 << 5) /* Reserved for backward compat */ -#define WL_IBSS_PEER_GROUP_KEY (1 << 6) /* Indicates a group key for a IBSS PEER */ - -typedef struct wl_wsec_key { - u32 index; /* key index */ - u32 len; /* key length */ - u8 data[WLAN_MAX_KEY_LEN]; /* key data */ - u32 pad_1[18]; - u32 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ - u32 flags; /* misc flags */ - u32 pad_2[2]; - int pad_3; - int iv_initialized; /* has IV been initialized already? */ - int pad_4; - /* Rx IV */ - struct { - u32 hi; /* upper 32 bits of IV */ - u16 lo; /* lower 16 bits of IV */ - } rxiv; - u32 pad_5[2]; - u8 ea[ETH_ALEN]; /* per station */ -} wl_wsec_key_t; - -#define WSEC_MIN_PSK_LEN 8 -#define WSEC_MAX_PSK_LEN 64 - -/* Flag for key material needing passhash'ing */ -#define WSEC_PASSPHRASE (1<<0) - -/* receptacle for WLC_SET_WSEC_PMK parameter */ -typedef struct { - unsigned short key_len; /* octets in key material */ - unsigned short flags; /* key handling qualification */ - u8 key[WSEC_MAX_PSK_LEN]; /* PMK material */ -} wsec_pmk_t; - -/* wireless security bitvec */ -#define WEP_ENABLED 0x0001 -#define TKIP_ENABLED 0x0002 -#define AES_ENABLED 0x0004 -#define WSEC_SWFLAG 0x0008 -#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */ - -/* WPA authentication mode bitvec */ -#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */ -#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */ -#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */ -#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */ -#define WPA_AUTH_RESERVED1 0x0008 -#define WPA_AUTH_RESERVED2 0x0010 - /* #define WPA_AUTH_8021X 0x0020 *//* 802.1x, reserved */ -#define WPA2_AUTH_RESERVED1 0x0020 -#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */ -#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */ -#define WPA2_AUTH_RESERVED3 0x0200 -#define WPA2_AUTH_RESERVED4 0x0400 -#define WPA2_AUTH_RESERVED5 0x0800 - -/* pmkid */ -#define MAXPMKID 16 - -typedef struct _pmkid { - u8 BSSID[ETH_ALEN]; - u8 PMKID[WLAN_PMKID_LEN]; -} pmkid_t; - -typedef struct _pmkid_list { - u32 npmkid; - pmkid_t pmkid[1]; -} pmkid_list_t; - -typedef struct _pmkid_cand { - u8 BSSID[ETH_ALEN]; - u8 preauth; -} pmkid_cand_t; - -typedef struct _pmkid_cand_list { - u32 npmkid_cand; - pmkid_cand_t pmkid_cand[1]; -} pmkid_cand_list_t; - -typedef struct wl_led_info { - u32 index; /* led index */ - u32 behavior; - u8 activehi; -} wl_led_info_t; - -/* R_REG and W_REG struct passed through ioctl */ -typedef struct { - u32 byteoff; /* byte offset of the field in d11regs_t */ - u32 val; /* read/write value of the field */ - u32 size; /* sizeof the field */ - uint band; /* band (optional) */ -} rw_reg_t; - - -#ifdef BRCM_FULLMAC -/* Used to get specific STA parameters */ -typedef struct { - u32 val; - u8 ea[ETH_ALEN]; -} scb_val_t; -#endif /* BRCM_FULLMAC */ - -/* channel encoding */ -typedef struct channel_info { - int hw_channel; - int target_channel; - int scan_channel; -} channel_info_t; - -/* For ioctls that take a list of MAC addresses */ -struct maclist { - uint count; /* number of MAC addresses */ - u8 ea[1][ETH_ALEN]; /* variable length array of MAC addresses */ -}; - -#ifdef BRCM_FULLMAC -/* Linux network driver ioctl encoding */ -typedef struct wl_ioctl { - uint cmd; /* common ioctl definition */ - void *buf; /* pointer to user buffer */ - uint len; /* length of user buffer */ - u8 set; /* get or set request (optional) */ - uint used; /* bytes read or written (optional) */ - uint needed; /* bytes needed (optional) */ -} wl_ioctl_t; -#endif /* BRCM_FULLMAC */ - - -/* - * Structure for passing hardware and software - * revision info up from the driver. - */ -typedef struct wlc_rev_info { - uint vendorid; /* PCI vendor id */ - uint deviceid; /* device id of chip */ - uint radiorev; /* radio revision */ - uint chiprev; /* chip revision */ - uint corerev; /* core revision */ - uint boardid; /* board identifier (usu. PCI sub-device id) */ - uint boardvendor; /* board vendor (usu. PCI sub-vendor id) */ - uint boardrev; /* board revision */ - uint driverrev; /* driver version */ - uint ucoderev; /* microcode version */ - uint bus; /* bus type */ - uint chipnum; /* chip number */ - uint phytype; /* phy type */ - uint phyrev; /* phy revision */ - uint anarev; /* anacore rev */ - uint chippkg; /* chip package info */ -} wlc_rev_info_t; - -#define WL_REV_INFO_LEGACY_LENGTH 48 - -#ifdef BRCM_FULLMAC -#define WLC_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ -#define WLC_IOCTL_MEDLEN 1536 /* "med" length ioctl buffer required */ -#define WLC_IOCTL_MAXLEN 8192 -#endif - -/* common ioctl definitions */ -#define WLC_GET_MAGIC 0 -#define WLC_GET_VERSION 1 -#define WLC_UP 2 -#define WLC_DOWN 3 -#define WLC_GET_LOOP 4 -#define WLC_SET_LOOP 5 -#define WLC_DUMP 6 -#define WLC_GET_MSGLEVEL 7 -#define WLC_SET_MSGLEVEL 8 -#define WLC_GET_PROMISC 9 -#define WLC_SET_PROMISC 10 -#define WLC_OVERLAY_IOCTL 11 -#define WLC_GET_RATE 12 - /* #define WLC_SET_RATE 13 *//* no longer supported */ -#define WLC_GET_INSTANCE 14 - /* #define WLC_GET_FRAG 15 *//* no longer supported */ - /* #define WLC_SET_FRAG 16 *//* no longer supported */ - /* #define WLC_GET_RTS 17 *//* no longer supported */ - /* #define WLC_SET_RTS 18 *//* no longer supported */ -#define WLC_GET_INFRA 19 -#define WLC_SET_INFRA 20 -#define WLC_GET_AUTH 21 -#define WLC_SET_AUTH 22 -#define WLC_GET_BSSID 23 -#define WLC_SET_BSSID 24 -#define WLC_GET_SSID 25 -#define WLC_SET_SSID 26 -#define WLC_RESTART 27 - /* #define WLC_DUMP_SCB 28 *//* no longer supported */ -#define WLC_GET_CHANNEL 29 -#define WLC_SET_CHANNEL 30 -#define WLC_GET_SRL 31 -#define WLC_SET_SRL 32 -#define WLC_GET_LRL 33 -#define WLC_SET_LRL 34 -#define WLC_GET_PLCPHDR 35 -#define WLC_SET_PLCPHDR 36 -#define WLC_GET_RADIO 37 -#define WLC_SET_RADIO 38 -#define WLC_GET_PHYTYPE 39 -#define WLC_DUMP_RATE 40 -#define WLC_SET_RATE_PARAMS 41 -#define WLC_GET_FIXRATE 42 -#define WLC_SET_FIXRATE 43 - /* #define WLC_GET_WEP 42 *//* no longer supported */ - /* #define WLC_SET_WEP 43 *//* no longer supported */ -#define WLC_GET_KEY 44 -#define WLC_SET_KEY 45 -#define WLC_GET_REGULATORY 46 -#define WLC_SET_REGULATORY 47 -#define WLC_GET_PASSIVE_SCAN 48 -#define WLC_SET_PASSIVE_SCAN 49 -#define WLC_SCAN 50 -#define WLC_SCAN_RESULTS 51 -#define WLC_DISASSOC 52 -#define WLC_REASSOC 53 -#define WLC_GET_ROAM_TRIGGER 54 -#define WLC_SET_ROAM_TRIGGER 55 -#define WLC_GET_ROAM_DELTA 56 -#define WLC_SET_ROAM_DELTA 57 -#define WLC_GET_ROAM_SCAN_PERIOD 58 -#define WLC_SET_ROAM_SCAN_PERIOD 59 -#define WLC_EVM 60 /* diag */ -#define WLC_GET_TXANT 61 -#define WLC_SET_TXANT 62 -#define WLC_GET_ANTDIV 63 -#define WLC_SET_ANTDIV 64 - /* #define WLC_GET_TXPWR 65 *//* no longer supported */ - /* #define WLC_SET_TXPWR 66 *//* no longer supported */ -#define WLC_GET_CLOSED 67 -#define WLC_SET_CLOSED 68 -#define WLC_GET_MACLIST 69 -#define WLC_SET_MACLIST 70 -#define WLC_GET_RATESET 71 -#define WLC_SET_RATESET 72 - /* #define WLC_GET_LOCALE 73 *//* no longer supported */ -#define WLC_LONGTRAIN 74 -#define WLC_GET_BCNPRD 75 -#define WLC_SET_BCNPRD 76 -#define WLC_GET_DTIMPRD 77 -#define WLC_SET_DTIMPRD 78 -#define WLC_GET_SROM 79 -#define WLC_SET_SROM 80 -#define WLC_GET_WEP_RESTRICT 81 -#define WLC_SET_WEP_RESTRICT 82 -#define WLC_GET_COUNTRY 83 -#define WLC_SET_COUNTRY 84 -#define WLC_GET_PM 85 -#define WLC_SET_PM 86 -#define WLC_GET_WAKE 87 -#define WLC_SET_WAKE 88 - /* #define WLC_GET_D11CNTS 89 *//* -> "counters" iovar */ -#define WLC_GET_FORCELINK 90 /* ndis only */ -#define WLC_SET_FORCELINK 91 /* ndis only */ -#define WLC_FREQ_ACCURACY 92 /* diag */ -#define WLC_CARRIER_SUPPRESS 93 /* diag */ -#define WLC_GET_PHYREG 94 -#define WLC_SET_PHYREG 95 -#define WLC_GET_RADIOREG 96 -#define WLC_SET_RADIOREG 97 -#define WLC_GET_REVINFO 98 -#define WLC_GET_UCANTDIV 99 -#define WLC_SET_UCANTDIV 100 -#define WLC_R_REG 101 -#define WLC_W_REG 102 -/* #define WLC_DIAG_LOOPBACK 103 old tray diag */ - /* #define WLC_RESET_D11CNTS 104 *//* -> "reset_d11cnts" iovar */ -#define WLC_GET_MACMODE 105 -#define WLC_SET_MACMODE 106 -#define WLC_GET_MONITOR 107 -#define WLC_SET_MONITOR 108 -#define WLC_GET_GMODE 109 -#define WLC_SET_GMODE 110 -#define WLC_GET_LEGACY_ERP 111 -#define WLC_SET_LEGACY_ERP 112 -#define WLC_GET_RX_ANT 113 -#define WLC_GET_CURR_RATESET 114 /* current rateset */ -#define WLC_GET_SCANSUPPRESS 115 -#define WLC_SET_SCANSUPPRESS 116 -#define WLC_GET_AP 117 -#define WLC_SET_AP 118 -#define WLC_GET_EAP_RESTRICT 119 -#define WLC_SET_EAP_RESTRICT 120 -#define WLC_SCB_AUTHORIZE 121 -#define WLC_SCB_DEAUTHORIZE 122 -#define WLC_GET_WDSLIST 123 -#define WLC_SET_WDSLIST 124 -#define WLC_GET_ATIM 125 -#define WLC_SET_ATIM 126 -#define WLC_GET_RSSI 127 -#define WLC_GET_PHYANTDIV 128 -#define WLC_SET_PHYANTDIV 129 -#define WLC_AP_RX_ONLY 130 -#define WLC_GET_TX_PATH_PWR 131 -#define WLC_SET_TX_PATH_PWR 132 -#define WLC_GET_WSEC 133 -#define WLC_SET_WSEC 134 -#define WLC_GET_PHY_NOISE 135 -#define WLC_GET_BSS_INFO 136 -#define WLC_GET_PKTCNTS 137 -#define WLC_GET_LAZYWDS 138 -#define WLC_SET_LAZYWDS 139 -#define WLC_GET_BANDLIST 140 -#define WLC_GET_BAND 141 -#define WLC_SET_BAND 142 -#define WLC_SCB_DEAUTHENTICATE 143 -#define WLC_GET_SHORTSLOT 144 -#define WLC_GET_SHORTSLOT_OVERRIDE 145 -#define WLC_SET_SHORTSLOT_OVERRIDE 146 -#define WLC_GET_SHORTSLOT_RESTRICT 147 -#define WLC_SET_SHORTSLOT_RESTRICT 148 -#define WLC_GET_GMODE_PROTECTION 149 -#define WLC_GET_GMODE_PROTECTION_OVERRIDE 150 -#define WLC_SET_GMODE_PROTECTION_OVERRIDE 151 -#define WLC_UPGRADE 152 - /* #define WLC_GET_MRATE 153 *//* no longer supported */ - /* #define WLC_SET_MRATE 154 *//* no longer supported */ -#define WLC_GET_IGNORE_BCNS 155 -#define WLC_SET_IGNORE_BCNS 156 -#define WLC_GET_SCB_TIMEOUT 157 -#define WLC_SET_SCB_TIMEOUT 158 -#define WLC_GET_ASSOCLIST 159 -#define WLC_GET_CLK 160 -#define WLC_SET_CLK 161 -#define WLC_GET_UP 162 -#define WLC_OUT 163 -#define WLC_GET_WPA_AUTH 164 -#define WLC_SET_WPA_AUTH 165 -#define WLC_GET_UCFLAGS 166 -#define WLC_SET_UCFLAGS 167 -#define WLC_GET_PWRIDX 168 -#define WLC_SET_PWRIDX 169 -#define WLC_GET_TSSI 170 -#define WLC_GET_SUP_RATESET_OVERRIDE 171 -#define WLC_SET_SUP_RATESET_OVERRIDE 172 - /* #define WLC_SET_FAST_TIMER 173 *//* no longer supported */ - /* #define WLC_GET_FAST_TIMER 174 *//* no longer supported */ - /* #define WLC_SET_SLOW_TIMER 175 *//* no longer supported */ - /* #define WLC_GET_SLOW_TIMER 176 *//* no longer supported */ - /* #define WLC_DUMP_PHYREGS 177 *//* no longer supported */ -#define WLC_GET_PROTECTION_CONTROL 178 -#define WLC_SET_PROTECTION_CONTROL 179 -#define WLC_GET_PHYLIST 180 -#define WLC_ENCRYPT_STRENGTH 181 /* ndis only */ -#define WLC_DECRYPT_STATUS 182 /* ndis only */ -#define WLC_GET_KEY_SEQ 183 -#define WLC_GET_SCAN_CHANNEL_TIME 184 -#define WLC_SET_SCAN_CHANNEL_TIME 185 -#define WLC_GET_SCAN_UNASSOC_TIME 186 -#define WLC_SET_SCAN_UNASSOC_TIME 187 -#define WLC_GET_SCAN_HOME_TIME 188 -#define WLC_SET_SCAN_HOME_TIME 189 -#define WLC_GET_SCAN_NPROBES 190 -#define WLC_SET_SCAN_NPROBES 191 -#define WLC_GET_PRB_RESP_TIMEOUT 192 -#define WLC_SET_PRB_RESP_TIMEOUT 193 -#define WLC_GET_ATTEN 194 -#define WLC_SET_ATTEN 195 -#define WLC_GET_SHMEM 196 /* diag */ -#define WLC_SET_SHMEM 197 /* diag */ - /* #define WLC_GET_GMODE_PROTECTION_CTS 198 *//* no longer supported */ - /* #define WLC_SET_GMODE_PROTECTION_CTS 199 *//* no longer supported */ -#define WLC_SET_WSEC_TEST 200 -#define WLC_SCB_DEAUTHENTICATE_FOR_REASON 201 -#define WLC_TKIP_COUNTERMEASURES 202 -#define WLC_GET_PIOMODE 203 -#define WLC_SET_PIOMODE 204 -#define WLC_SET_ASSOC_PREFER 205 -#define WLC_GET_ASSOC_PREFER 206 -#define WLC_SET_ROAM_PREFER 207 -#define WLC_GET_ROAM_PREFER 208 -#define WLC_SET_LED 209 -#define WLC_GET_LED 210 -#define WLC_RESERVED6 211 -#define WLC_RESERVED7 212 -#define WLC_GET_CHANNEL_QA 213 -#define WLC_START_CHANNEL_QA 214 -#define WLC_GET_CHANNEL_SEL 215 -#define WLC_START_CHANNEL_SEL 216 -#define WLC_GET_VALID_CHANNELS 217 -#define WLC_GET_FAKEFRAG 218 -#define WLC_SET_FAKEFRAG 219 -#define WLC_GET_PWROUT_PERCENTAGE 220 -#define WLC_SET_PWROUT_PERCENTAGE 221 -#define WLC_SET_BAD_FRAME_PREEMPT 222 -#define WLC_GET_BAD_FRAME_PREEMPT 223 -#define WLC_SET_LEAP_LIST 224 -#define WLC_GET_LEAP_LIST 225 -#define WLC_GET_CWMIN 226 -#define WLC_SET_CWMIN 227 -#define WLC_GET_CWMAX 228 -#define WLC_SET_CWMAX 229 -#define WLC_GET_WET 230 -#define WLC_SET_WET 231 -#define WLC_GET_PUB 232 - /* #define WLC_SET_GLACIAL_TIMER 233 *//* no longer supported */ - /* #define WLC_GET_GLACIAL_TIMER 234 *//* no longer supported */ -#define WLC_GET_KEY_PRIMARY 235 -#define WLC_SET_KEY_PRIMARY 236 - /* #define WLC_DUMP_RADIOREGS 237 *//* no longer supported */ -#define WLC_RESERVED4 238 -#define WLC_RESERVED5 239 -#define WLC_UNSET_CALLBACK 240 -#define WLC_SET_CALLBACK 241 -#define WLC_GET_RADAR 242 -#define WLC_SET_RADAR 243 -#define WLC_SET_SPECT_MANAGMENT 244 -#define WLC_GET_SPECT_MANAGMENT 245 -#define WLC_WDS_GET_REMOTE_HWADDR 246 /* handled in wl_linux.c/wl_vx.c */ -#define WLC_WDS_GET_WPA_SUP 247 -#define WLC_SET_CS_SCAN_TIMER 248 -#define WLC_GET_CS_SCAN_TIMER 249 -#define WLC_MEASURE_REQUEST 250 -#define WLC_INIT 251 -#define WLC_SEND_QUIET 252 -#define WLC_KEEPALIVE 253 -#define WLC_SEND_PWR_CONSTRAINT 254 -#define WLC_UPGRADE_STATUS 255 -#define WLC_CURRENT_PWR 256 -#define WLC_GET_SCAN_PASSIVE_TIME 257 -#define WLC_SET_SCAN_PASSIVE_TIME 258 -#define WLC_LEGACY_LINK_BEHAVIOR 259 -#define WLC_GET_CHANNELS_IN_COUNTRY 260 -#define WLC_GET_COUNTRY_LIST 261 -#define WLC_GET_VAR 262 /* get value of named variable */ -#define WLC_SET_VAR 263 /* set named variable to value */ -#define WLC_NVRAM_GET 264 /* deprecated */ -#define WLC_NVRAM_SET 265 -#define WLC_NVRAM_DUMP 266 -#define WLC_REBOOT 267 -#define WLC_SET_WSEC_PMK 268 -#define WLC_GET_AUTH_MODE 269 -#define WLC_SET_AUTH_MODE 270 -#define WLC_GET_WAKEENTRY 271 -#define WLC_SET_WAKEENTRY 272 -#define WLC_NDCONFIG_ITEM 273 /* currently handled in wl_oid.c */ -#define WLC_NVOTPW 274 -#define WLC_OTPW 275 -#define WLC_IOV_BLOCK_GET 276 -#define WLC_IOV_MODULES_GET 277 -#define WLC_SOFT_RESET 278 -#define WLC_GET_ALLOW_MODE 279 -#define WLC_SET_ALLOW_MODE 280 -#define WLC_GET_DESIRED_BSSID 281 -#define WLC_SET_DESIRED_BSSID 282 -#define WLC_DISASSOC_MYAP 283 -#define WLC_GET_RESERVED10 284 -#define WLC_GET_RESERVED11 285 -#define WLC_GET_RESERVED12 286 -#define WLC_GET_RESERVED13 287 -#define WLC_GET_RESERVED14 288 -#define WLC_SET_RESERVED15 289 -#define WLC_SET_RESERVED16 290 -#define WLC_GET_RESERVED17 291 -#define WLC_GET_RESERVED18 292 -#define WLC_GET_RESERVED19 293 -#define WLC_SET_RESERVED1A 294 -#define WLC_GET_RESERVED1B 295 -#define WLC_GET_RESERVED1C 296 -#define WLC_GET_RESERVED1D 297 -#define WLC_SET_RESERVED1E 298 -#define WLC_GET_RESERVED1F 299 -#define WLC_GET_RESERVED20 300 -#define WLC_GET_RESERVED21 301 -#define WLC_GET_RESERVED22 302 -#define WLC_GET_RESERVED23 303 -#define WLC_GET_RESERVED24 304 -#define WLC_SET_RESERVED25 305 -#define WLC_GET_RESERVED26 306 -#define WLC_NPHY_SAMPLE_COLLECT 307 /* Nphy sample collect mode */ -#define WLC_UM_PRIV 308 /* for usermode driver private ioctl */ -#define WLC_GET_CMD 309 - /* #define WLC_LAST 310 *//* Never used - can be reused */ -#define WLC_RESERVED8 311 -#define WLC_RESERVED9 312 -#define WLC_RESERVED1 313 -#define WLC_RESERVED2 314 -#define WLC_RESERVED3 315 -#define WLC_LAST 316 - -#ifndef EPICTRL_COOKIE -#define EPICTRL_COOKIE 0xABADCEDE -#endif - -#define WL_DECRYPT_STATUS_SUCCESS 1 -#define WL_DECRYPT_STATUS_FAILURE 2 -#define WL_DECRYPT_STATUS_UNKNOWN 3 - -/* allows user-mode app to poll the status of USB image upgrade */ -#define WLC_UPGRADE_SUCCESS 0 -#define WLC_UPGRADE_PENDING 1 - -/* WLC_GET_AUTH, WLC_SET_AUTH values */ -#define WL_AUTH_OPEN_SYSTEM 0 /* d11 open authentication */ -#define WL_AUTH_SHARED_KEY 1 /* d11 shared authentication */ -#define WL_AUTH_OPEN_SHARED 2 /* try open, then shared if open failed w/rc 13 */ - -/* Bit masks for radio disabled status - returned by WL_GET_RADIO */ -#define WL_RADIO_SW_DISABLE (1<<0) -#define WL_RADIO_HW_DISABLE (1<<1) -#define WL_RADIO_MPC_DISABLE (1<<2) -#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */ - -#define WL_SPURAVOID_OFF 0 -#define WL_SPURAVOID_ON1 1 -#define WL_SPURAVOID_ON2 2 - -/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */ -#define WL_TXPWR_OVERRIDE (1U<<31) - -#define WL_PHY_PAVARS_LEN 6 /* Phy type, Band range, chain, a1, b0, b1 */ - -typedef struct wl_po { - u16 phy_type; /* Phy type */ - u16 band; - u16 cckpo; - u32 ofdmpo; - u16 mcspo[8]; -} wl_po_t; - -/* a large TX Power as an init value to factor out of min() calculations, - * keep low enough to fit in an s8, units are .25 dBm - */ -#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ - -/* "diag" iovar argument and error code */ -#define WL_DIAG_INTERRUPT 1 /* d11 loopback interrupt test */ -#define WL_DIAG_LOOPBACK 2 /* d11 loopback data test */ -#define WL_DIAG_MEMORY 3 /* d11 memory test */ -#define WL_DIAG_LED 4 /* LED test */ -#define WL_DIAG_REG 5 /* d11/phy register test */ -#define WL_DIAG_SROM 6 /* srom read/crc test */ -#define WL_DIAG_DMA 7 /* DMA test */ - -#define WL_DIAGERR_SUCCESS 0 -#define WL_DIAGERR_FAIL_TO_RUN 1 /* unable to run requested diag */ -#define WL_DIAGERR_NOT_SUPPORTED 2 /* diag requested is not supported */ -#define WL_DIAGERR_INTERRUPT_FAIL 3 /* loopback interrupt test failed */ -#define WL_DIAGERR_LOOPBACK_FAIL 4 /* loopback data test failed */ -#define WL_DIAGERR_SROM_FAIL 5 /* srom read failed */ -#define WL_DIAGERR_SROM_BADCRC 6 /* srom crc failed */ -#define WL_DIAGERR_REG_FAIL 7 /* d11/phy register test failed */ -#define WL_DIAGERR_MEMORY_FAIL 8 /* d11 memory test failed */ -#define WL_DIAGERR_NOMEM 9 /* diag test failed due to no memory */ -#define WL_DIAGERR_DMA_FAIL 10 /* DMA test failed */ - -#define WL_DIAGERR_MEMORY_TIMEOUT 11 /* d11 memory test didn't finish in time */ -#define WL_DIAGERR_MEMORY_BADPATTERN 12 /* d11 memory test result in bad pattern */ - -/* band types */ -#define WLC_BAND_AUTO 0 /* auto-select */ -#define WLC_BAND_5G 1 /* 5 Ghz */ -#define WLC_BAND_2G 2 /* 2.4 Ghz */ -#define WLC_BAND_ALL 3 /* all bands */ - -/* band range returned by band_range iovar */ -#define WL_CHAN_FREQ_RANGE_2G 0 -#define WL_CHAN_FREQ_RANGE_5GL 1 -#define WL_CHAN_FREQ_RANGE_5GM 2 -#define WL_CHAN_FREQ_RANGE_5GH 3 - -/* phy types (returned by WLC_GET_PHYTPE) */ -#define WLC_PHY_TYPE_A 0 -#define WLC_PHY_TYPE_B 1 -#define WLC_PHY_TYPE_G 2 -#define WLC_PHY_TYPE_N 4 -#define WLC_PHY_TYPE_LP 5 -#define WLC_PHY_TYPE_SSN 6 -#define WLC_PHY_TYPE_HT 7 -#define WLC_PHY_TYPE_LCN 8 -#define WLC_PHY_TYPE_NULL 0xf - -/* MAC list modes */ -#define WLC_MACMODE_DISABLED 0 /* MAC list disabled */ -#define WLC_MACMODE_DENY 1 /* Deny specified (i.e. allow unspecified) */ -#define WLC_MACMODE_ALLOW 2 /* Allow specified (i.e. deny unspecified) */ - -/* - * 54g modes (basic bits may still be overridden) - * - * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11 - * Preamble: Long - * Shortslot: Off - * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 - * Extended Rateset: 6, 9, 12, 48 - * Preamble: Long - * Shortslot: Auto - * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 - * Extended Rateset: 6b, 9, 12b, 48 - * Preamble: Short required - * Shortslot: Auto - * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 - * Extended Rateset: 6, 9, 12, 48 - * Preamble: Long - * Shortslot: On - * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 - * Preamble: Short required - * Shortslot: On and required - * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b - * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 - * Preamble: Long - * Shortslot: Auto - */ -#define GMODE_LEGACY_B 0 -#define GMODE_AUTO 1 -#define GMODE_ONLY 2 -#define GMODE_B_DEFERRED 3 -#define GMODE_PERFORMANCE 4 -#define GMODE_LRS 5 -#define GMODE_MAX 6 - -/* values for PLCPHdr_override */ -#define WLC_PLCP_AUTO -1 -#define WLC_PLCP_SHORT 0 -#define WLC_PLCP_LONG 1 - -/* values for g_protection_override and n_protection_override */ -#define WLC_PROTECTION_AUTO -1 -#define WLC_PROTECTION_OFF 0 -#define WLC_PROTECTION_ON 1 -#define WLC_PROTECTION_MMHDR_ONLY 2 -#define WLC_PROTECTION_CTS_ONLY 3 - -/* values for g_protection_control and n_protection_control */ -#define WLC_PROTECTION_CTL_OFF 0 -#define WLC_PROTECTION_CTL_LOCAL 1 -#define WLC_PROTECTION_CTL_OVERLAP 2 - -/* values for n_protection */ -#define WLC_N_PROTECTION_OFF 0 -#define WLC_N_PROTECTION_OPTIONAL 1 -#define WLC_N_PROTECTION_20IN40 2 -#define WLC_N_PROTECTION_MIXEDMODE 3 - -/* values for n_preamble_type */ -#define WLC_N_PREAMBLE_MIXEDMODE 0 -#define WLC_N_PREAMBLE_GF 1 -#define WLC_N_PREAMBLE_GF_BRCM 2 - -/* values for band specific 40MHz capabilities */ -#define WLC_N_BW_20ALL 0 -#define WLC_N_BW_40ALL 1 -#define WLC_N_BW_20IN2G_40IN5G 2 - -/* values to force tx/rx chain */ -#define WLC_N_TXRX_CHAIN0 0 -#define WLC_N_TXRX_CHAIN1 1 - -/* bitflags for SGI support (sgi_rx iovar) */ -#define WLC_N_SGI_20 0x01 -#define WLC_N_SGI_40 0x02 - -/* Values for PM */ -#define PM_OFF 0 -#define PM_MAX 1 - -/* interference mitigation options */ -#define INTERFERE_OVRRIDE_OFF -1 /* interference override off */ -#define INTERFERE_NONE 0 /* off */ -#define NON_WLAN 1 /* foreign/non 802.11 interference, no auto detect */ -#define WLAN_MANUAL 2 /* ACI: no auto detection */ -#define WLAN_AUTO 3 /* ACI: auto detect */ -#define WLAN_AUTO_W_NOISE 4 /* ACI: auto - detect and non 802.11 interference */ -#define AUTO_ACTIVE (1 << 7) /* Auto is currently active */ - -#define WL_RSSI_ANT_VERSION 1 /* current version of wl_rssi_ant_t */ -#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */ -#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */ -#define WL_ANT_IDX_1 0 /* antenna index 1 */ -#define WL_ANT_IDX_2 1 /* antenna index 2 */ - -#ifndef WL_RSSI_ANT_MAX -#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */ -#elif WL_RSSI_ANT_MAX != 4 -#error "WL_RSSI_ANT_MAX does not match" -#endif - -/* RSSI per antenna */ -typedef struct { - u32 version; /* version field */ - u32 count; /* number of valid antenna rssi */ - s8 rssi_ant[WL_RSSI_ANT_MAX]; /* rssi per antenna */ -} wl_rssi_ant_t; - -#define NUM_PWRCTRL_RATES 12 - -typedef struct { - u8 txpwr_band_max[NUM_PWRCTRL_RATES]; /* User set target */ - u8 txpwr_limit[NUM_PWRCTRL_RATES]; /* reg and local power limit */ - u8 txpwr_local_max; /* local max according to the AP */ - u8 txpwr_local_constraint; /* local constraint according to the AP */ - u8 txpwr_chan_reg_max; /* Regulatory max for this channel */ - u8 txpwr_target[2][NUM_PWRCTRL_RATES]; /* Latest target for 2.4 and 5 Ghz */ - u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ - u8 txpwr_opo[NUM_PWRCTRL_RATES]; /* On G phy, OFDM power offset */ - u8 txpwr_bphy_cck_max[NUM_PWRCTRL_RATES]; /* Max CCK power for this band (SROM) */ - u8 txpwr_bphy_ofdm_max; /* Max OFDM power for this band (SROM) */ - u8 txpwr_aphy_max[NUM_PWRCTRL_RATES]; /* Max power for A band (SROM) */ - s8 txpwr_antgain[2]; /* Ant gain for each band - from SROM */ - u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ -} tx_power_legacy_t; - -#define WL_TX_POWER_RATES_LEGACY 45 -#define WL_TX_POWER_MCS20_FIRST 12 -#define WL_TX_POWER_MCS20_NUM 16 -#define WL_TX_POWER_MCS40_FIRST 28 -#define WL_TX_POWER_MCS40_NUM 17 - - -#define WL_TX_POWER_RATES 101 -#define WL_TX_POWER_CCK_FIRST 0 -#define WL_TX_POWER_CCK_NUM 4 -#define WL_TX_POWER_OFDM_FIRST 4 /* Index for first 20MHz OFDM SISO rate */ -#define WL_TX_POWER_OFDM20_CDD_FIRST 12 /* Index for first 20MHz OFDM CDD rate */ -#define WL_TX_POWER_OFDM40_SISO_FIRST 52 /* Index for first 40MHz OFDM SISO rate */ -#define WL_TX_POWER_OFDM40_CDD_FIRST 60 /* Index for first 40MHz OFDM CDD rate */ -#define WL_TX_POWER_OFDM_NUM 8 -#define WL_TX_POWER_MCS20_SISO_FIRST 20 /* Index for first 20MHz MCS SISO rate */ -#define WL_TX_POWER_MCS20_CDD_FIRST 28 /* Index for first 20MHz MCS CDD rate */ -#define WL_TX_POWER_MCS20_STBC_FIRST 36 /* Index for first 20MHz MCS STBC rate */ -#define WL_TX_POWER_MCS20_SDM_FIRST 44 /* Index for first 20MHz MCS SDM rate */ -#define WL_TX_POWER_MCS40_SISO_FIRST 68 /* Index for first 40MHz MCS SISO rate */ -#define WL_TX_POWER_MCS40_CDD_FIRST 76 /* Index for first 40MHz MCS CDD rate */ -#define WL_TX_POWER_MCS40_STBC_FIRST 84 /* Index for first 40MHz MCS STBC rate */ -#define WL_TX_POWER_MCS40_SDM_FIRST 92 /* Index for first 40MHz MCS SDM rate */ -#define WL_TX_POWER_MCS_1_STREAM_NUM 8 -#define WL_TX_POWER_MCS_2_STREAM_NUM 8 -#define WL_TX_POWER_MCS_32 100 /* Index for 40MHz rate MCS 32 */ -#define WL_TX_POWER_MCS_32_NUM 1 - -/* sslpnphy specifics */ -#define WL_TX_POWER_MCS20_SISO_FIRST_SSN 12 /* Index for first 20MHz MCS SISO rate */ - -/* tx_power_t.flags bits */ -#define WL_TX_POWER_F_ENABLED 1 -#define WL_TX_POWER_F_HW 2 -#define WL_TX_POWER_F_MIMO 4 -#define WL_TX_POWER_F_SISO 8 - -typedef struct { - u32 flags; - chanspec_t chanspec; /* txpwr report for this channel */ - chanspec_t local_chanspec; /* channel on which we are associated */ - u8 local_max; /* local max according to the AP */ - u8 local_constraint; /* local constraint according to the AP */ - s8 antgain[2]; /* Ant gain for each band - from SROM */ - u8 rf_cores; /* count of RF Cores being reported */ - u8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ - u8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain - * without adjustment - */ - u8 est_Pout_cck; /* Latest CCK tx power out estimate */ - u8 tx_power_max[4]; /* Maximum target power among all rates */ - u8 tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ - u8 user_limit[WL_TX_POWER_RATES]; /* User limit */ - u8 reg_limit[WL_TX_POWER_RATES]; /* Regulatory power limit */ - u8 board_limit[WL_TX_POWER_RATES]; /* Max power board can support (SROM) */ - u8 target[WL_TX_POWER_RATES]; /* Latest target power */ -} tx_power_t; - -typedef struct tx_inst_power { - u8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ - u8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ -} tx_inst_power_t; - -/* Message levels */ -#define WL_ERROR_VAL 0x00000001 -#define WL_TRACE_VAL 0x00000002 - -/* maximum channels returned by the get valid channels iovar */ -#define WL_NUMCHANNELS 64 -#define WL_NUMCHANSPECS 100 - -struct tsinfo_arg { - u8 octets[3]; -}; - -#define NFIFO 6 /* # tx/rx fifopairs */ - -struct wl_msglevel2 { - u32 low; - u32 high; -}; - -/* structure for per-tid ampdu control */ -struct ampdu_tid_control { - u8 tid; /* tid */ - u8 enable; /* enable/disable */ -}; - -/* structure for identifying ea/tid for sending addba/delba */ -struct ampdu_ea_tid { - u8 ea[ETH_ALEN]; /* Station address */ - u8 tid; /* tid */ -}; -/* structure for identifying retry/tid for retry_limit_tid/rr_retry_limit_tid */ -struct ampdu_retry_tid { - u8 tid; /* tid */ - u8 retry; /* retry value */ -}; - - -/* Software feature flag defines used by wlfeatureflag */ -#define WL_SWFL_NOHWRADIO 0x0004 -#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */ -#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */ - -#define WL_LIFETIME_MAX 0xFFFF /* Max value in ms */ - - -/* Pattern matching filter. Specifies an offset within received packets to - * start matching, the pattern to match, the size of the pattern, and a bitmask - * that indicates which bits within the pattern should be matched. - */ -typedef struct wl_pkt_filter_pattern { - u32 offset; /* Offset within received packet to start pattern matching. - * Offset '0' is the first byte of the ethernet header. - */ - u32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ - u8 mask_and_pattern[1]; /* Variable length mask and pattern data. mask starts - * at offset 0. Pattern immediately follows mask. - */ -} wl_pkt_filter_pattern_t; - -/* IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ -typedef struct wl_pkt_filter { - u32 id; /* Unique filter id, specified by app. */ - u32 type; /* Filter type (WL_PKT_FILTER_TYPE_xxx). */ - u32 negate_match; /* Negate the result of filter matches */ - union { /* Filter definitions */ - wl_pkt_filter_pattern_t pattern; /* Pattern matching filter */ - } u; -} wl_pkt_filter_t; - -#define WL_PKT_FILTER_FIXED_LEN offsetof(wl_pkt_filter_t, u) -#define WL_PKT_FILTER_PATTERN_FIXED_LEN offsetof(wl_pkt_filter_pattern_t, mask_and_pattern) - -/* IOVAR "pkt_filter_enable" parameter. */ -typedef struct wl_pkt_filter_enable { - u32 id; /* Unique filter id */ - u32 enable; /* Enable/disable bool */ -} wl_pkt_filter_enable_t; - - -#define WLC_RSSI_INVALID 0 /* invalid RSSI value */ - -/* n-mode support capability */ -/* 2x2 includes both 1x1 & 2x2 devices - * reserved #define 2 for future when we want to separate 1x1 & 2x2 and - * control it independently - */ -#define WL_11N_2x2 1 -#define WL_11N_3x3 3 -#define WL_11N_4x4 4 - -/* define 11n feature disable flags */ -#define WLFEATURE_DISABLE_11N 0x00000001 -#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 -#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 -#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 -#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 -#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 -#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 -#define WLFEATURE_DISABLE_11N_GF 0x00000080 - -#define WL_EVENTING_MASK_LEN 16 - -#define TOE_TX_CSUM_OL 0x00000001 -#define TOE_RX_CSUM_OL 0x00000002 - -#define PM_OFF 0 -#define PM_MAX 1 -#define PM_FAST 2 - -typedef enum sup_auth_status { - WLC_SUP_DISCONNECTED = 0, - WLC_SUP_CONNECTING, - WLC_SUP_IDREQUIRED, - WLC_SUP_AUTHENTICATING, - WLC_SUP_AUTHENTICATED, - WLC_SUP_KEYXCHANGE, - WLC_SUP_KEYED, - WLC_SUP_TIMEOUT, - WLC_SUP_LAST_BASIC_STATE, - WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED, - WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE, - WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE, - WLC_SUP_KEYXCHANGE_PREP_M4, - WLC_SUP_KEYXCHANGE_WAIT_G1, - WLC_SUP_KEYXCHANGE_PREP_G2 -} sup_auth_status_t; -#endif /* _wlioctl_h_ */ |