diff options
Diffstat (limited to 'drivers/usb/host/r8a66597.h')
| -rw-r--r-- | drivers/usb/host/r8a66597.h | 51 |
1 files changed, 50 insertions, 1 deletions
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index 57388252b69..84ee0141731 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h @@ -187,7 +187,11 @@ #define REW 0x4000 /* b14: Buffer rewind */ #define DCLRM 0x2000 /* b13: DMA buffer clear mode */ #define DREQE 0x1000 /* b12: DREQ output enable */ +#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) +#define MBW 0x0800 +#else #define MBW 0x0400 /* b10: Maximum bit width for FIFO access */ +#endif #define MBW_8 0x0000 /* 8bit */ #define MBW_16 0x0400 /* 16bit */ #define BIGEND 0x0100 /* b8: Big endian mode */ @@ -395,8 +399,13 @@ #define R8A66597_MAX_NUM_PIPE 10 #define R8A66597_BUF_BSIZE 8 #define R8A66597_MAX_DEVICE 10 +#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) +#define R8A66597_MAX_ROOT_HUB 1 +#else #define R8A66597_MAX_ROOT_HUB 2 -#define R8A66597_MAX_SAMPLING 10 +#endif +#define R8A66597_MAX_SAMPLING 5 +#define R8A66597_RH_POLL_TIME 10 #define R8A66597_MAX_DMA_CHANNEL 2 #define R8A66597_PIPE_NO_DMA R8A66597_MAX_DMA_CHANNEL #define check_bulk_or_isoc(pipenum) ((pipenum >= 1 && pipenum <= 5)) @@ -404,6 +413,7 @@ #define make_devsel(addr) (addr << 12) struct r8a66597_pipe_info { + unsigned long timer_interval; u16 pipenum; u16 address; /* R8A66597 HCD usb address */ u16 epnum; @@ -478,9 +488,11 @@ struct r8a66597 { struct timer_list rh_timer; struct timer_list td_timer[R8A66597_MAX_NUM_PIPE]; + struct timer_list interval_timer[R8A66597_MAX_NUM_PIPE]; unsigned short address_map; unsigned short timeout_map; + unsigned short interval_map; unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; unsigned char dma_map; @@ -526,8 +538,21 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, unsigned long offset, u16 *buf, int len) { +#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) + unsigned long fifoaddr = r8a66597->reg + offset; + unsigned long count; + + count = len / 4; + insl(fifoaddr, buf, count); + + if (len & 0x00000003) { + unsigned long tmp = inl(fifoaddr); + memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03); + } +#else len = (len + 1) / 2; insw(r8a66597->reg + offset, buf, len); +#endif } static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, @@ -541,6 +566,24 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, int len) { unsigned long fifoaddr = r8a66597->reg + offset; +#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) + unsigned long count; + unsigned char *pb; + int i; + + count = len / 4; + outsl(fifoaddr, buf, count); + + if (len & 0x00000003) { + pb = (unsigned char *)buf + count * 4; + for (i = 0; i < (len & 0x00000003); i++) { + if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) + outb(pb[i], fifoaddr + i); + else + outb(pb[i], fifoaddr + 3 - i); + } + } +#else int odd = len & 0x0001; len = len / 2; @@ -549,6 +592,7 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, buf = &buf[len]; outb((unsigned char)*buf, fifoaddr); } +#endif } static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, @@ -581,6 +625,11 @@ static inline unsigned long get_dvstctr_reg(int port) return port == 0 ? DVSTCTR0 : DVSTCTR1; } +static inline unsigned long get_dmacfg_reg(int port) +{ + return port == 0 ? DMA0CFG : DMA1CFG; +} + static inline unsigned long get_intenb_reg(int port) { return port == 0 ? INTENB1 : INTENB2; |