diff options
Diffstat (limited to 'drivers/video/matrox/matroxfb_Ti3026.c')
| -rw-r--r-- | drivers/video/matrox/matroxfb_Ti3026.c | 258 |
1 files changed, 133 insertions, 125 deletions
diff --git a/drivers/video/matrox/matroxfb_Ti3026.c b/drivers/video/matrox/matroxfb_Ti3026.c index 4e825112a60..835aaaae6b9 100644 --- a/drivers/video/matrox/matroxfb_Ti3026.c +++ b/drivers/video/matrox/matroxfb_Ti3026.c @@ -279,27 +279,31 @@ static const unsigned char MGADACbpp32[] = TVP3026_XCOLKEYCTRL_ZOOM1, 0x00, 0x00, TVP3026_XCURCTRL_DIS }; -static int Ti3026_calcclock(CPMINFO unsigned int freq, unsigned int fmax, int* in, int* feed, int* post) { +static int Ti3026_calcclock(const struct matrox_fb_info *minfo, + unsigned int freq, unsigned int fmax, int *in, + int *feed, int *post) +{ unsigned int fvco; unsigned int lin, lfeed, lpost; DBG(__func__) - fvco = PLL_calcclock(PMINFO freq, fmax, &lin, &lfeed, &lpost); + fvco = PLL_calcclock(minfo, freq, fmax, &lin, &lfeed, &lpost); fvco >>= (*post = lpost); *in = 64 - lin; *feed = 64 - lfeed; return fvco; } -static int Ti3026_setpclk(WPMINFO int clk) { +static int Ti3026_setpclk(struct matrox_fb_info *minfo, int clk) +{ unsigned int f_pll; unsigned int pixfeed, pixin, pixpost; - struct matrox_hw_state* hw = &ACCESS_FBINFO(hw); + struct matrox_hw_state *hw = &minfo->hw; DBG(__func__) - f_pll = Ti3026_calcclock(PMINFO clk, ACCESS_FBINFO(max_pixel_clock), &pixin, &pixfeed, &pixpost); + f_pll = Ti3026_calcclock(minfo, clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost); hw->DACclk[0] = pixin | 0xC0; hw->DACclk[1] = pixfeed; @@ -309,9 +313,9 @@ static int Ti3026_setpclk(WPMINFO int clk) { unsigned int loopfeed, loopin, looppost, loopdiv, z; unsigned int Bpp; - Bpp = ACCESS_FBINFO(curr.final_bppShift); + Bpp = minfo->curr.final_bppShift; - if (ACCESS_FBINFO(fbcon).var.bits_per_pixel == 24) { + if (minfo->fbcon.var.bits_per_pixel == 24) { loopfeed = 3; /* set lm to any possible value */ loopin = 3 * 32 / Bpp; } else { @@ -330,18 +334,18 @@ static int Ti3026_setpclk(WPMINFO int clk) { looppost = 3; loopdiv = z/16; } - if (ACCESS_FBINFO(fbcon).var.bits_per_pixel == 24) { + if (minfo->fbcon.var.bits_per_pixel == 24) { hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0; hw->DACclk[4] = (65 - loopfeed) | 0x80; - if (ACCESS_FBINFO(accel.ramdac_rev) > 0x20) { - if (isInterleave(MINFO)) + if (minfo->accel.ramdac_rev > 0x20) { + if (isInterleave(minfo)) hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_8_3; else { hw->DACclk[4] &= ~0xC0; hw->DACreg[POS3026_XLATCHCTRL] = TVP3026B_XLATCHCTRL_4_3; } } else { - if (isInterleave(MINFO)) + if (isInterleave(minfo)) ; /* default... */ else { hw->DACclk[4] ^= 0xC0; /* change from 0x80 to 0x40 */ @@ -349,7 +353,7 @@ static int Ti3026_setpclk(WPMINFO int clk) { } } hw->DACclk[5] = looppost | 0xF8; - if (ACCESS_FBINFO(devflags.mga_24bpp_fix)) + if (minfo->devflags.mga_24bpp_fix) hw->DACclk[5] ^= 0x40; } else { hw->DACclk[3] = ((65 - loopin) & 0x3F) | 0xC0; @@ -361,14 +365,15 @@ static int Ti3026_setpclk(WPMINFO int clk) { return 0; } -static int Ti3026_init(WPMINFO struct my_timming* m) { - u_int8_t muxctrl = isInterleave(MINFO) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT; - struct matrox_hw_state* hw = &ACCESS_FBINFO(hw); +static int Ti3026_init(struct matrox_fb_info *minfo, struct my_timming *m) +{ + u_int8_t muxctrl = isInterleave(minfo) ? TVP3026_XMUXCTRL_MEMORY_64BIT : TVP3026_XMUXCTRL_MEMORY_32BIT; + struct matrox_hw_state *hw = &minfo->hw; DBG(__func__) memcpy(hw->DACreg, MGADACbpp32, sizeof(hw->DACreg)); - switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) { + switch (minfo->fbcon.var.bits_per_pixel) { case 4: hw->DACreg[POS3026_XLATCHCTRL] = TVP3026_XLATCHCTRL_16_1; /* or _8_1, they are same */ hw->DACreg[POS3026_XTRUECOLORCTRL] = TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR; hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_4BIT; @@ -383,7 +388,7 @@ static int Ti3026_init(WPMINFO struct my_timming* m) { break; case 16: /* XLATCHCTRL should be _4_1 / _2_1... Why is not? (_2_1 is used everytime) */ - hw->DACreg[POS3026_XTRUECOLORCTRL] = (ACCESS_FBINFO(fbcon).var.green.length == 5)? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555 ) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565); + hw->DACreg[POS3026_XTRUECOLORCTRL] = (minfo->fbcon.var.green.length == 5) ? (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_1555) : (TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_RGB_565); hw->DACreg[POS3026_XMUXCTRL] = muxctrl | TVP3026_XMUXCTRL_PIXEL_16BIT; hw->DACreg[POS3026_XCLKCTRL] = TVP3026_XCLKCTRL_SRC_PLL | TVP3026_XCLKCTRL_DIV2; break; @@ -400,7 +405,7 @@ static int Ti3026_init(WPMINFO struct my_timming* m) { default: return 1; /* TODO: failed */ } - if (matroxfb_vgaHWinit(PMINFO m)) return 1; + if (matroxfb_vgaHWinit(minfo, m)) return 1; /* set SYNC */ hw->MiscOutReg = 0xCB; @@ -412,9 +417,9 @@ static int Ti3026_init(WPMINFO struct my_timming* m) { hw->DACreg[POS3026_XGENCTRL] |= TVP3026_XGENCTRL_SYNC_ON_GREEN; /* set DELAY */ - if (ACCESS_FBINFO(video.len) < 0x400000) + if (minfo->video.len < 0x400000) hw->CRTCEXT[3] |= 0x08; - else if (ACCESS_FBINFO(video.len) > 0x400000) + else if (minfo->video.len > 0x400000) hw->CRTCEXT[3] |= 0x10; /* set HWCURSOR */ @@ -426,14 +431,15 @@ static int Ti3026_init(WPMINFO struct my_timming* m) { /* set interleaving */ hw->MXoptionReg &= ~0x00001000; - if (isInterleave(MINFO)) hw->MXoptionReg |= 0x00001000; + if (isInterleave(minfo)) hw->MXoptionReg |= 0x00001000; /* set DAC */ - Ti3026_setpclk(PMINFO m->pixclock); + Ti3026_setpclk(minfo, m->pixclock); return 0; } -static void ti3026_setMCLK(WPMINFO int fout){ +static void ti3026_setMCLK(struct matrox_fb_info *minfo, int fout) +{ unsigned int f_pll; unsigned int pclk_m, pclk_n, pclk_p; unsigned int mclk_m, mclk_n, mclk_p; @@ -442,29 +448,29 @@ static void ti3026_setMCLK(WPMINFO int fout){ DBG(__func__) - f_pll = Ti3026_calcclock(PMINFO fout, ACCESS_FBINFO(max_pixel_clock), &mclk_n, &mclk_m, &mclk_p); + f_pll = Ti3026_calcclock(minfo, fout, minfo->max_pixel_clock, &mclk_n, &mclk_m, &mclk_p); /* save pclk */ - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC); - pclk_n = inTi3026(PMINFO TVP3026_XPIXPLLDATA); - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFD); - pclk_m = inTi3026(PMINFO TVP3026_XPIXPLLDATA); - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE); - pclk_p = inTi3026(PMINFO TVP3026_XPIXPLLDATA); + outTi3026(minfo, TVP3026_XPLLADDR, 0xFC); + pclk_n = inTi3026(minfo, TVP3026_XPIXPLLDATA); + outTi3026(minfo, TVP3026_XPLLADDR, 0xFD); + pclk_m = inTi3026(minfo, TVP3026_XPIXPLLDATA); + outTi3026(minfo, TVP3026_XPLLADDR, 0xFE); + pclk_p = inTi3026(minfo, TVP3026_XPIXPLLDATA); /* stop pclk */ - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00); + outTi3026(minfo, TVP3026_XPLLADDR, 0xFE); + outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00); /* set pclk to new mclk */ - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_n | 0xC0); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_m); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, mclk_p | 0xB0); + outTi3026(minfo, TVP3026_XPLLADDR, 0xFC); + outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_n | 0xC0); + outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_m); + outTi3026(minfo, TVP3026_XPIXPLLDATA, mclk_p | 0xB0); /* wait for PLL to lock */ for (tmout = 500000; tmout; tmout--) { - if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40) + if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40) break; udelay(10); }; @@ -472,23 +478,23 @@ static void ti3026_setMCLK(WPMINFO int fout){ printk(KERN_ERR "matroxfb: Temporary pixel PLL not locked after 5 secs\n"); /* output pclk on mclk pin */ - mclk_ctl = inTi3026(PMINFO TVP3026_XMEMPLLCTRL); - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7); - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4); + mclk_ctl = inTi3026(minfo, TVP3026_XMEMPLLCTRL); + outTi3026(minfo, TVP3026_XMEMPLLCTRL, mclk_ctl & 0xE7); + outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_STROBEMKC4); /* stop MCLK */ - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFB); - outTi3026(PMINFO TVP3026_XMEMPLLDATA, 0x00); + outTi3026(minfo, TVP3026_XPLLADDR, 0xFB); + outTi3026(minfo, TVP3026_XMEMPLLDATA, 0x00); /* set mclk to new freq */ - outTi3026(PMINFO TVP3026_XPLLADDR, 0xF3); - outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_n | 0xC0); - outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_m); - outTi3026(PMINFO TVP3026_XMEMPLLDATA, mclk_p | 0xB0); + outTi3026(minfo, TVP3026_XPLLADDR, 0xF3); + outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_n | 0xC0); + outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_m); + outTi3026(minfo, TVP3026_XMEMPLLDATA, mclk_p | 0xB0); /* wait for PLL to lock */ for (tmout = 500000; tmout; tmout--) { - if (inTi3026(PMINFO TVP3026_XMEMPLLDATA) & 0x40) + if (inTi3026(minfo, TVP3026_XMEMPLLDATA) & 0x40) break; udelay(10); } @@ -496,7 +502,7 @@ static void ti3026_setMCLK(WPMINFO int fout){ printk(KERN_ERR "matroxfb: Memory PLL not locked after 5 secs\n"); f_pll = f_pll * 333 / (10000 << mclk_p); - if (isMilleniumII(MINFO)) { + if (isMilleniumII(minfo)) { rfhcnt = (f_pll - 128) / 256; if (rfhcnt > 15) rfhcnt = 15; @@ -505,26 +511,26 @@ static void ti3026_setMCLK(WPMINFO int fout){ if (rfhcnt > 15) rfhcnt = 0; } - ACCESS_FBINFO(hw).MXoptionReg = (ACCESS_FBINFO(hw).MXoptionReg & ~0x000F0000) | (rfhcnt << 16); - pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, ACCESS_FBINFO(hw).MXoptionReg); + minfo->hw.MXoptionReg = (minfo->hw.MXoptionReg & ~0x000F0000) | (rfhcnt << 16); + pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, minfo->hw.MXoptionReg); /* output MCLK to MCLK pin */ - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, (mclk_ctl ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4); + outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl & 0xE7) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); + outTi3026(minfo, TVP3026_XMEMPLLCTRL, (mclk_ctl ) | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL | TVP3026_XMEMPLLCTRL_STROBEMKC4); /* stop PCLK */ - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFE); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00); + outTi3026(minfo, TVP3026_XPLLADDR, 0xFE); + outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00); /* restore pclk */ - outTi3026(PMINFO TVP3026_XPLLADDR, 0xFC); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_n); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_m); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, pclk_p); + outTi3026(minfo, TVP3026_XPLLADDR, 0xFC); + outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_n); + outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_m); + outTi3026(minfo, TVP3026_XPIXPLLDATA, pclk_p); /* wait for PLL to lock */ for (tmout = 500000; tmout; tmout--) { - if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40) + if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40) break; udelay(10); } @@ -532,26 +538,27 @@ static void ti3026_setMCLK(WPMINFO int fout){ printk(KERN_ERR "matroxfb: Pixel PLL not locked after 5 secs\n"); } -static void ti3026_ramdac_init(WPMINFO2) { - +static void ti3026_ramdac_init(struct matrox_fb_info *minfo) +{ DBG(__func__) - ACCESS_FBINFO(features.pll.vco_freq_min) = 110000; - ACCESS_FBINFO(features.pll.ref_freq) = 114545; - ACCESS_FBINFO(features.pll.feed_div_min) = 2; - ACCESS_FBINFO(features.pll.feed_div_max) = 24; - ACCESS_FBINFO(features.pll.in_div_min) = 2; - ACCESS_FBINFO(features.pll.in_div_max) = 63; - ACCESS_FBINFO(features.pll.post_shift_max) = 3; - if (ACCESS_FBINFO(devflags.noinit)) + minfo->features.pll.vco_freq_min = 110000; + minfo->features.pll.ref_freq = 114545; + minfo->features.pll.feed_div_min = 2; + minfo->features.pll.feed_div_max = 24; + minfo->features.pll.in_div_min = 2; + minfo->features.pll.in_div_max = 63; + minfo->features.pll.post_shift_max = 3; + if (minfo->devflags.noinit) return; - ti3026_setMCLK(PMINFO 60000); + ti3026_setMCLK(minfo, 60000); } -static void Ti3026_restore(WPMINFO2) { +static void Ti3026_restore(struct matrox_fb_info *minfo) +{ int i; unsigned char progdac[6]; - struct matrox_hw_state* hw = &ACCESS_FBINFO(hw); + struct matrox_hw_state *hw = &minfo->hw; CRITFLAGS DBG(__func__) @@ -565,31 +572,31 @@ static void Ti3026_restore(WPMINFO2) { CRITBEGIN - pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg); + pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); CRITEND - matroxfb_vgaHWrestore(PMINFO2); + matroxfb_vgaHWrestore(minfo); CRITBEGIN - ACCESS_FBINFO(crtc1.panpos) = -1; + minfo->crtc1.panpos = -1; for (i = 0; i < 6; i++) mga_setr(M_EXTVGA_INDEX, i, hw->CRTCEXT[i]); for (i = 0; i < 21; i++) { - outTi3026(PMINFO DACseq[i], hw->DACreg[i]); + outTi3026(minfo, DACseq[i], hw->DACreg[i]); } - outTi3026(PMINFO TVP3026_XPLLADDR, 0x00); - progdac[0] = inTi3026(PMINFO TVP3026_XPIXPLLDATA); - progdac[3] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA); - outTi3026(PMINFO TVP3026_XPLLADDR, 0x15); - progdac[1] = inTi3026(PMINFO TVP3026_XPIXPLLDATA); - progdac[4] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA); - outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A); - progdac[2] = inTi3026(PMINFO TVP3026_XPIXPLLDATA); - progdac[5] = inTi3026(PMINFO TVP3026_XLOOPPLLDATA); + outTi3026(minfo, TVP3026_XPLLADDR, 0x00); + progdac[0] = inTi3026(minfo, TVP3026_XPIXPLLDATA); + progdac[3] = inTi3026(minfo, TVP3026_XLOOPPLLDATA); + outTi3026(minfo, TVP3026_XPLLADDR, 0x15); + progdac[1] = inTi3026(minfo, TVP3026_XPIXPLLDATA); + progdac[4] = inTi3026(minfo, TVP3026_XLOOPPLLDATA); + outTi3026(minfo, TVP3026_XPLLADDR, 0x2A); + progdac[2] = inTi3026(minfo, TVP3026_XPIXPLLDATA); + progdac[5] = inTi3026(minfo, TVP3026_XLOOPPLLDATA); CRITEND if (memcmp(hw->DACclk, progdac, 6)) { @@ -598,20 +605,20 @@ static void Ti3026_restore(WPMINFO2) { /* Maybe even we should call schedule() ? */ CRITBEGIN - outTi3026(PMINFO TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]); - outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A); - outTi3026(PMINFO TVP3026_XLOOPPLLDATA, 0); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0); + outTi3026(minfo, TVP3026_XCLKCTRL, hw->DACreg[POS3026_XCLKCTRL]); + outTi3026(minfo, TVP3026_XPLLADDR, 0x2A); + outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0); + outTi3026(minfo, TVP3026_XPIXPLLDATA, 0); - outTi3026(PMINFO TVP3026_XPLLADDR, 0x00); + outTi3026(minfo, TVP3026_XPLLADDR, 0x00); for (i = 0; i < 3; i++) - outTi3026(PMINFO TVP3026_XPIXPLLDATA, hw->DACclk[i]); + outTi3026(minfo, TVP3026_XPIXPLLDATA, hw->DACclk[i]); /* wait for PLL only if PLL clock requested (always for PowerMode, never for VGA) */ if (hw->MiscOutReg & 0x08) { int tmout; - outTi3026(PMINFO TVP3026_XPLLADDR, 0x3F); + outTi3026(minfo, TVP3026_XPLLADDR, 0x3F); for (tmout = 500000; tmout; --tmout) { - if (inTi3026(PMINFO TVP3026_XPIXPLLDATA) & 0x40) + if (inTi3026(minfo, TVP3026_XPIXPLLDATA) & 0x40) break; udelay(10); } @@ -624,18 +631,18 @@ static void Ti3026_restore(WPMINFO2) { dprintk(KERN_INFO "PixelPLL: %d\n", 500000-tmout); CRITBEGIN } - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]); - outTi3026(PMINFO TVP3026_XPLLADDR, 0x00); + outTi3026(minfo, TVP3026_XMEMPLLCTRL, hw->DACreg[POS3026_XMEMPLLCTRL]); + outTi3026(minfo, TVP3026_XPLLADDR, 0x00); for (i = 3; i < 6; i++) - outTi3026(PMINFO TVP3026_XLOOPPLLDATA, hw->DACclk[i]); + outTi3026(minfo, TVP3026_XLOOPPLLDATA, hw->DACclk[i]); CRITEND if ((hw->MiscOutReg & 0x08) && ((hw->DACclk[5] & 0x80) == 0x80)) { int tmout; CRITBEGIN - outTi3026(PMINFO TVP3026_XPLLADDR, 0x3F); + outTi3026(minfo, TVP3026_XPLLADDR, 0x3F); for (tmout = 500000; tmout; --tmout) { - if (inTi3026(PMINFO TVP3026_XLOOPPLLDATA) & 0x40) + if (inTi3026(minfo, TVP3026_XLOOPPLLDATA) & 0x40) break; udelay(10); } @@ -660,65 +667,66 @@ static void Ti3026_restore(WPMINFO2) { #endif } -static void Ti3026_reset(WPMINFO2) { - +static void Ti3026_reset(struct matrox_fb_info *minfo) +{ DBG(__func__) - ti3026_ramdac_init(PMINFO2); + ti3026_ramdac_init(minfo); } static struct matrox_altout ti3026_output = { .name = "Primary output", }; -static int Ti3026_preinit(WPMINFO2) { +static int Ti3026_preinit(struct matrox_fb_info *minfo) +{ static const int vxres_mill2[] = { 512, 640, 768, 800, 832, 960, 1024, 1152, 1280, 1600, 1664, 1920, 2048, 0}; static const int vxres_mill1[] = { 640, 768, 800, 960, 1024, 1152, 1280, 1600, 1920, 2048, 0}; - struct matrox_hw_state* hw = &ACCESS_FBINFO(hw); + struct matrox_hw_state *hw = &minfo->hw; DBG(__func__) - ACCESS_FBINFO(millenium) = 1; - ACCESS_FBINFO(milleniumII) = (ACCESS_FBINFO(pcidev)->device != PCI_DEVICE_ID_MATROX_MIL); - ACCESS_FBINFO(capable.cfb4) = 1; - ACCESS_FBINFO(capable.text) = 1; /* isMilleniumII(MINFO); */ - ACCESS_FBINFO(capable.vxres) = isMilleniumII(MINFO)?vxres_mill2:vxres_mill1; + minfo->millenium = 1; + minfo->milleniumII = (minfo->pcidev->device != PCI_DEVICE_ID_MATROX_MIL); + minfo->capable.cfb4 = 1; + minfo->capable.text = 1; /* isMilleniumII(minfo); */ + minfo->capable.vxres = isMilleniumII(minfo) ? vxres_mill2 : vxres_mill1; - ACCESS_FBINFO(outputs[0]).data = MINFO; - ACCESS_FBINFO(outputs[0]).output = &ti3026_output; - ACCESS_FBINFO(outputs[0]).src = ACCESS_FBINFO(outputs[0]).default_src; - ACCESS_FBINFO(outputs[0]).mode = MATROXFB_OUTPUT_MODE_MONITOR; + minfo->outputs[0].data = minfo; + minfo->outputs[0].output = &ti3026_output; + minfo->outputs[0].src = minfo->outputs[0].default_src; + minfo->outputs[0].mode = MATROXFB_OUTPUT_MODE_MONITOR; - if (ACCESS_FBINFO(devflags.noinit)) + if (minfo->devflags.noinit) return 0; /* preserve VGA I/O, BIOS and PPC */ hw->MXoptionReg &= 0xC0000100; hw->MXoptionReg |= 0x002C0000; - if (ACCESS_FBINFO(devflags.novga)) + if (minfo->devflags.novga) hw->MXoptionReg &= ~0x00000100; - if (ACCESS_FBINFO(devflags.nobios)) + if (minfo->devflags.nobios) hw->MXoptionReg &= ~0x40000000; - if (ACCESS_FBINFO(devflags.nopciretry)) + if (minfo->devflags.nopciretry) hw->MXoptionReg |= 0x20000000; - pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, hw->MXoptionReg); + pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, hw->MXoptionReg); - ACCESS_FBINFO(accel.ramdac_rev) = inTi3026(PMINFO TVP3026_XSILICONREV); + minfo->accel.ramdac_rev = inTi3026(minfo, TVP3026_XSILICONREV); - outTi3026(PMINFO TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED); - outTi3026(PMINFO TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR); - outTi3026(PMINFO TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA); + outTi3026(minfo, TVP3026_XCLKCTRL, TVP3026_XCLKCTRL_SRC_CLK0VGA | TVP3026_XCLKCTRL_CLKSTOPPED); + outTi3026(minfo, TVP3026_XTRUECOLORCTRL, TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR); + outTi3026(minfo, TVP3026_XMUXCTRL, TVP3026_XMUXCTRL_VGA); - outTi3026(PMINFO TVP3026_XPLLADDR, 0x2A); - outTi3026(PMINFO TVP3026_XLOOPPLLDATA, 0x00); - outTi3026(PMINFO TVP3026_XPIXPLLDATA, 0x00); + outTi3026(minfo, TVP3026_XPLLADDR, 0x2A); + outTi3026(minfo, TVP3026_XLOOPPLLDATA, 0x00); + outTi3026(minfo, TVP3026_XPIXPLLDATA, 0x00); mga_outb(M_MISC_REG, 0x67); - outTi3026(PMINFO TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); + outTi3026(minfo, TVP3026_XMEMPLLCTRL, TVP3026_XMEMPLLCTRL_STROBEMKC4 | TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL); mga_outl(M_RESET, 1); udelay(250); |