diff options
Diffstat (limited to 'drivers/video/omap2/displays')
| -rw-r--r-- | drivers/video/omap2/displays/Kconfig | 28 | ||||
| -rw-r--r-- | drivers/video/omap2/displays/Makefile | 3 | ||||
| -rw-r--r-- | drivers/video/omap2/displays/panel-dvi.c | 363 | ||||
| -rw-r--r-- | drivers/video/omap2/displays/panel-generic-dpi.c | 113 | ||||
| -rw-r--r-- | drivers/video/omap2/displays/panel-n8x0.c | 747 | ||||
| -rw-r--r-- | drivers/video/omap2/displays/panel-picodlp.c | 594 | ||||
| -rw-r--r-- | drivers/video/omap2/displays/panel-picodlp.h | 288 | ||||
| -rw-r--r-- | drivers/video/omap2/displays/panel-taal.c | 125 |
8 files changed, 2158 insertions, 103 deletions
diff --git a/drivers/video/omap2/displays/Kconfig b/drivers/video/omap2/displays/Kconfig index 609a2807317..8d8e1fe1901 100644 --- a/drivers/video/omap2/displays/Kconfig +++ b/drivers/video/omap2/displays/Kconfig @@ -10,6 +10,13 @@ config PANEL_GENERIC_DPI Supports LCD Panel used in TI SDP3430 and EVM boards, OMAP3517 EVM boards and CM-T35. +config PANEL_DVI + tristate "DVI output" + depends on OMAP2_DSS_DPI + help + Driver for external monitors, connected via DVI. The driver uses i2c + to read EDID information from the monitor. + config PANEL_LGPHILIPS_LB035Q02 tristate "LG.Philips LB035Q02 LCD Panel" depends on OMAP2_DSS_DPI && SPI @@ -19,20 +26,30 @@ config PANEL_LGPHILIPS_LB035Q02 config PANEL_SHARP_LS037V7DW01 tristate "Sharp LS037V7DW01 LCD Panel" depends on OMAP2_DSS_DPI - select BACKLIGHT_CLASS_DEVICE + depends on BACKLIGHT_CLASS_DEVICE help LCD Panel used in TI's SDP3430 and EVM boards config PANEL_NEC_NL8048HL11_01B tristate "NEC NL8048HL11-01B Panel" depends on OMAP2_DSS_DPI + depends on SPI + depends on BACKLIGHT_CLASS_DEVICE help This NEC NL8048HL11-01B panel is TFT LCD used in the Zoom2/3/3630 sdp boards. +config PANEL_PICODLP + tristate "TI PICO DLP mini-projector" + depends on OMAP2_DSS && I2C + help + A mini-projector used in TI's SDP4430 and EVM boards + For more info please visit http://www.dlp.com/projector/ + config PANEL_TAAL tristate "Taal DSI Panel" depends on OMAP2_DSS_DSI + depends on BACKLIGHT_CLASS_DEVICE help Taal DSI command mode panel from TPO. @@ -45,7 +62,14 @@ config PANEL_TPO_TD043MTEA1 config PANEL_ACX565AKM tristate "ACX565AKM Panel" depends on OMAP2_DSS_SDI && SPI - select BACKLIGHT_CLASS_DEVICE + depends on BACKLIGHT_CLASS_DEVICE help This is the LCD panel used on Nokia N900 + +config PANEL_N8X0 + tristate "N8X0 Panel" + depends on OMAP2_DSS_RFBI && SPI + depends on BACKLIGHT_CLASS_DEVICE + help + This is the LCD panel used on Nokia N8x0 endmenu diff --git a/drivers/video/omap2/displays/Makefile b/drivers/video/omap2/displays/Makefile index 0f601ab3abf..fbfafc6eebb 100644 --- a/drivers/video/omap2/displays/Makefile +++ b/drivers/video/omap2/displays/Makefile @@ -1,8 +1,11 @@ obj-$(CONFIG_PANEL_GENERIC_DPI) += panel-generic-dpi.o +obj-$(CONFIG_PANEL_DVI) += panel-dvi.o obj-$(CONFIG_PANEL_LGPHILIPS_LB035Q02) += panel-lgphilips-lb035q02.o obj-$(CONFIG_PANEL_SHARP_LS037V7DW01) += panel-sharp-ls037v7dw01.o obj-$(CONFIG_PANEL_NEC_NL8048HL11_01B) += panel-nec-nl8048hl11-01b.o obj-$(CONFIG_PANEL_TAAL) += panel-taal.o +obj-$(CONFIG_PANEL_PICODLP) += panel-picodlp.o obj-$(CONFIG_PANEL_TPO_TD043MTEA1) += panel-tpo-td043mtea1.o obj-$(CONFIG_PANEL_ACX565AKM) += panel-acx565akm.o +obj-$(CONFIG_PANEL_N8X0) += panel-n8x0.o diff --git a/drivers/video/omap2/displays/panel-dvi.c b/drivers/video/omap2/displays/panel-dvi.c new file mode 100644 index 00000000000..03eb14af33e --- /dev/null +++ b/drivers/video/omap2/displays/panel-dvi.c @@ -0,0 +1,363 @@ +/* + * DVI output support + * + * Copyright (C) 2011 Texas Instruments Inc + * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/module.h> +#include <linux/slab.h> +#include <video/omapdss.h> +#include <linux/i2c.h> +#include <drm/drm_edid.h> + +#include <video/omap-panel-dvi.h> + +static const struct omap_video_timings panel_dvi_default_timings = { + .x_res = 640, + .y_res = 480, + + .pixel_clock = 23500, + + .hfp = 48, + .hsw = 32, + .hbp = 80, + + .vfp = 3, + .vsw = 4, + .vbp = 7, +}; + +struct panel_drv_data { + struct omap_dss_device *dssdev; + + struct mutex lock; +}; + +static inline struct panel_dvi_platform_data +*get_pdata(const struct omap_dss_device *dssdev) +{ + return dssdev->data; +} + +static int panel_dvi_power_on(struct omap_dss_device *dssdev) +{ + struct panel_dvi_platform_data *pdata = get_pdata(dssdev); + int r; + + if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) + return 0; + + r = omapdss_dpi_display_enable(dssdev); + if (r) + goto err0; + + if (pdata->platform_enable) { + r = pdata->platform_enable(dssdev); + if (r) + goto err1; + } + + return 0; +err1: + omapdss_dpi_display_disable(dssdev); +err0: + return r; +} + +static void panel_dvi_power_off(struct omap_dss_device *dssdev) +{ + struct panel_dvi_platform_data *pdata = get_pdata(dssdev); + + if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) + return; + + if (pdata->platform_disable) + pdata->platform_disable(dssdev); + + omapdss_dpi_display_disable(dssdev); +} + +static int panel_dvi_probe(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata; + + ddata = kzalloc(sizeof(*ddata), GFP_KERNEL); + if (!ddata) + return -ENOMEM; + + dssdev->panel.timings = panel_dvi_default_timings; + dssdev->panel.config = OMAP_DSS_LCD_TFT; + + ddata->dssdev = dssdev; + mutex_init(&ddata->lock); + + dev_set_drvdata(&dssdev->dev, ddata); + + return 0; +} + +static void __exit panel_dvi_remove(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + + mutex_lock(&ddata->lock); + + dev_set_drvdata(&dssdev->dev, NULL); + + mutex_unlock(&ddata->lock); + + kfree(ddata); +} + +static int panel_dvi_enable(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + int r; + + mutex_lock(&ddata->lock); + + r = panel_dvi_power_on(dssdev); + if (r == 0) + dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; + + mutex_unlock(&ddata->lock); + + return r; +} + +static void panel_dvi_disable(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + + mutex_lock(&ddata->lock); + + panel_dvi_power_off(dssdev); + + dssdev->state = OMAP_DSS_DISPLAY_DISABLED; + + mutex_unlock(&ddata->lock); +} + +static int panel_dvi_suspend(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + + mutex_lock(&ddata->lock); + + panel_dvi_power_off(dssdev); + + dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; + + mutex_unlock(&ddata->lock); + + return 0; +} + +static int panel_dvi_resume(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + int r; + + mutex_lock(&ddata->lock); + + r = panel_dvi_power_on(dssdev); + if (r == 0) + dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; + + mutex_unlock(&ddata->lock); + + return r; +} + +static void panel_dvi_set_timings(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + + mutex_lock(&ddata->lock); + dpi_set_timings(dssdev, timings); + mutex_unlock(&ddata->lock); +} + +static void panel_dvi_get_timings(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + + mutex_lock(&ddata->lock); + *timings = dssdev->panel.timings; + mutex_unlock(&ddata->lock); +} + +static int panel_dvi_check_timings(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + int r; + + mutex_lock(&ddata->lock); + r = dpi_check_timings(dssdev, timings); + mutex_unlock(&ddata->lock); + + return r; +} + + +static int panel_dvi_ddc_read(struct i2c_adapter *adapter, + unsigned char *buf, u16 count, u8 offset) +{ + int r, retries; + + for (retries = 3; retries > 0; retries--) { + struct i2c_msg msgs[] = { + { + .addr = DDC_ADDR, + .flags = 0, + .len = 1, + .buf = &offset, + }, { + .addr = DDC_ADDR, + .flags = I2C_M_RD, + .len = count, + .buf = buf, + } + }; + + r = i2c_transfer(adapter, msgs, 2); + if (r == 2) + return 0; + + if (r != -EAGAIN) + break; + } + + return r < 0 ? r : -EIO; +} + +static int panel_dvi_read_edid(struct omap_dss_device *dssdev, + u8 *edid, int len) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + struct panel_dvi_platform_data *pdata = get_pdata(dssdev); + struct i2c_adapter *adapter; + int r, l, bytes_read; + + mutex_lock(&ddata->lock); + + if (pdata->i2c_bus_num == 0) { + r = -ENODEV; + goto err; + } + + adapter = i2c_get_adapter(pdata->i2c_bus_num); + if (!adapter) { + dev_err(&dssdev->dev, "Failed to get I2C adapter, bus %d\n", + pdata->i2c_bus_num); + r = -EINVAL; + goto err; + } + + l = min(EDID_LENGTH, len); + r = panel_dvi_ddc_read(adapter, edid, l, 0); + if (r) + goto err; + + bytes_read = l; + + /* if there are extensions, read second block */ + if (len > EDID_LENGTH && edid[0x7e] > 0) { + l = min(EDID_LENGTH, len - EDID_LENGTH); + + r = panel_dvi_ddc_read(adapter, edid + EDID_LENGTH, + l, EDID_LENGTH); + if (r) + goto err; + + bytes_read += l; + } + + mutex_unlock(&ddata->lock); + + return bytes_read; + +err: + mutex_unlock(&ddata->lock); + return r; +} + +static bool panel_dvi_detect(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = dev_get_drvdata(&dssdev->dev); + struct panel_dvi_platform_data *pdata = get_pdata(dssdev); + struct i2c_adapter *adapter; + unsigned char out; + int r; + + mutex_lock(&ddata->lock); + + if (pdata->i2c_bus_num == 0) + goto out; + + adapter = i2c_get_adapter(pdata->i2c_bus_num); + if (!adapter) + goto out; + + r = panel_dvi_ddc_read(adapter, &out, 1, 0); + + mutex_unlock(&ddata->lock); + + return r == 0; + +out: + mutex_unlock(&ddata->lock); + return true; +} + +static struct omap_dss_driver panel_dvi_driver = { + .probe = panel_dvi_probe, + .remove = __exit_p(panel_dvi_remove), + + .enable = panel_dvi_enable, + .disable = panel_dvi_disable, + .suspend = panel_dvi_suspend, + .resume = panel_dvi_resume, + + .set_timings = panel_dvi_set_timings, + .get_timings = panel_dvi_get_timings, + .check_timings = panel_dvi_check_timings, + + .read_edid = panel_dvi_read_edid, + .detect = panel_dvi_detect, + + .driver = { + .name = "dvi", + .owner = THIS_MODULE, + }, +}; + +static int __init panel_dvi_init(void) +{ + return omap_dss_register_driver(&panel_dvi_driver); +} + +static void __exit panel_dvi_exit(void) +{ + omap_dss_unregister_driver(&panel_dvi_driver); +} + +module_init(panel_dvi_init); +module_exit(panel_dvi_exit); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c b/drivers/video/omap2/displays/panel-generic-dpi.c index 9c90f75653f..519c47d2057 100644 --- a/drivers/video/omap2/displays/panel-generic-dpi.c +++ b/drivers/video/omap2/displays/panel-generic-dpi.c @@ -58,30 +58,6 @@ struct panel_config { /* Panel configurations */ static struct panel_config generic_dpi_panels[] = { - /* Generic Panel */ - { - { - .x_res = 640, - .y_res = 480, - - .pixel_clock = 23500, - - .hfp = 48, - .hsw = 32, - .hbp = 80, - - .vfp = 3, - .vsw = 4, - .vbp = 7, - }, - .acbi = 0x0, - .acb = 0x0, - .config = OMAP_DSS_LCD_TFT, - .power_on_delay = 0, - .power_off_delay = 0, - .name = "generic", - }, - /* Sharp LQ043T1DG01 */ { { @@ -232,6 +208,95 @@ static struct panel_config generic_dpi_panels[] = { .power_off_delay = 0, .name = "powertip_ph480272t", }, + + /* Innolux AT070TN83 */ + { + { + .x_res = 800, + .y_res = 480, + + .pixel_clock = 40000, + + .hsw = 48, + .hfp = 1, + .hbp = 1, + + .vsw = 3, + .vfp = 12, + .vbp = 25, + }, + .acbi = 0x0, + .acb = 0x28, + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | + OMAP_DSS_LCD_IHS, + .power_on_delay = 0, + .power_off_delay = 0, + .name = "innolux_at070tn83", + }, + + /* NEC NL2432DR22-11B */ + { + { + .x_res = 240, + .y_res = 320, + + .pixel_clock = 5400, + + .hsw = 3, + .hfp = 3, + .hbp = 39, + + .vsw = 1, + .vfp = 2, + .vbp = 7, + }, + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | + OMAP_DSS_LCD_IHS, + .name = "nec_nl2432dr22-11b", + }, + + /* Unknown panel used in OMAP H4 */ + { + { + .x_res = 240, + .y_res = 320, + + .pixel_clock = 6250, + + .hsw = 15, + .hfp = 15, + .hbp = 60, + + .vsw = 1, + .vfp = 1, + .vbp = 1, + }, + .config = OMAP_DSS_LCD_TFT, + + .name = "h4", + }, + + /* Unknown panel used in Samsung OMAP2 Apollon */ + { + { + .x_res = 480, + .y_res = 272, + + .pixel_clock = 6250, + + .hsw = 41, + .hfp = 2, + .hbp = 2, + + .vsw = 10, + .vfp = 2, + .vbp = 2, + }, + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | + OMAP_DSS_LCD_IHS, + + .name = "apollon", + }, }; struct panel_drv_data { diff --git a/drivers/video/omap2/displays/panel-n8x0.c b/drivers/video/omap2/displays/panel-n8x0.c new file mode 100644 index 00000000000..150e8bae35a --- /dev/null +++ b/drivers/video/omap2/displays/panel-n8x0.c @@ -0,0 +1,747 @@ +/* #define DEBUG */ + +#include <linux/module.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/gpio.h> +#include <linux/spi/spi.h> +#include <linux/backlight.h> +#include <linux/fb.h> + +#include <video/omapdss.h> +#include <video/omap-panel-n8x0.h> + +#define BLIZZARD_REV_CODE 0x00 +#define BLIZZARD_CONFIG 0x02 +#define BLIZZARD_PLL_DIV 0x04 +#define BLIZZARD_PLL_LOCK_RANGE 0x06 +#define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08 +#define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a +#define BLIZZARD_PLL_MODE 0x0c +#define BLIZZARD_CLK_SRC 0x0e +#define BLIZZARD_MEM_BANK0_ACTIVATE 0x10 +#define BLIZZARD_MEM_BANK0_STATUS 0x14 +#define BLIZZARD_PANEL_CONFIGURATION 0x28 +#define BLIZZARD_HDISP 0x2a +#define BLIZZARD_HNDP 0x2c +#define BLIZZARD_VDISP0 0x2e +#define BLIZZARD_VDISP1 0x30 +#define BLIZZARD_VNDP 0x32 +#define BLIZZARD_HSW 0x34 +#define BLIZZARD_VSW 0x38 +#define BLIZZARD_DISPLAY_MODE 0x68 +#define BLIZZARD_INPUT_WIN_X_START_0 0x6c +#define BLIZZARD_DATA_SOURCE_SELECT 0x8e +#define BLIZZARD_DISP_MEM_DATA_PORT 0x90 +#define BLIZZARD_DISP_MEM_READ_ADDR0 0x92 +#define BLIZZARD_POWER_SAVE 0xE6 +#define BLIZZARD_NDISP_CTRL_STATUS 0xE8 + +/* Data source select */ +/* For S1D13745 */ +#define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00 +#define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01 +#define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04 +#define BLIZZARD_SRC_DISABLE_OVERLAY 0x05 +/* For S1D13744 */ +#define BLIZZARD_SRC_WRITE_LCD 0x00 +#define BLIZZARD_SRC_BLT_LCD 0x06 + +#define BLIZZARD_COLOR_RGB565 0x01 +#define BLIZZARD_COLOR_YUV420 0x09 + +#define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */ +#define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */ + +#define MIPID_CMD_READ_DISP_ID 0x04 +#define MIPID_CMD_READ_RED 0x06 +#define MIPID_CMD_READ_GREEN 0x07 +#define MIPID_CMD_READ_BLUE 0x08 +#define MIPID_CMD_READ_DISP_STATUS 0x09 +#define MIPID_CMD_RDDSDR 0x0F +#define MIPID_CMD_SLEEP_IN 0x10 +#define MIPID_CMD_SLEEP_OUT 0x11 +#define MIPID_CMD_DISP_OFF 0x28 +#define MIPID_CMD_DISP_ON 0x29 + +static struct panel_drv_data { + struct mutex lock; + + struct omap_dss_device *dssdev; + struct spi_device *spidev; + struct backlight_device *bldev; + + int blizzard_ver; +} s_drv_data; + + +static inline +struct panel_n8x0_data *get_board_data(const struct omap_dss_device *dssdev) +{ + return dssdev->data; +} + +static inline +struct panel_drv_data *get_drv_data(const struct omap_dss_device *dssdev) +{ + return &s_drv_data; +} + + +static inline void blizzard_cmd(u8 cmd) +{ + omap_rfbi_write_command(&cmd, 1); +} + +static inline void blizzard_write(u8 cmd, const u8 *buf, int len) +{ + omap_rfbi_write_command(&cmd, 1); + omap_rfbi_write_data(buf, len); +} + +static inline void blizzard_read(u8 cmd, u8 *buf, int len) +{ + omap_rfbi_write_command(&cmd, 1); + omap_rfbi_read_data(buf, len); +} + +static u8 blizzard_read_reg(u8 cmd) +{ + u8 data; + blizzard_read(cmd, &data, 1); + return data; +} + +static void blizzard_ctrl_setup_update(struct omap_dss_device *dssdev, + int x, int y, int w, int h) +{ + struct panel_drv_data *ddata = get_drv_data(dssdev); + u8 tmp[18]; + int x_end, y_end; + + x_end = x + w - 1; + y_end = y + h - 1; + + tmp[0] = x; + tmp[1] = x >> 8; + tmp[2] = y; + tmp[3] = y >> 8; + tmp[4] = x_end; + tmp[5] = x_end >> 8; + tmp[6] = y_end; + tmp[7] = y_end >> 8; + + /* scaling? */ + tmp[8] = x; + tmp[9] = x >> 8; + tmp[10] = y; + tmp[11] = y >> 8; + tmp[12] = x_end; + tmp[13] = x_end >> 8; + tmp[14] = y_end; + tmp[15] = y_end >> 8; + + tmp[16] = BLIZZARD_COLOR_RGB565; + + if (ddata->blizzard_ver == BLIZZARD_VERSION_S1D13745) + tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND; + else + tmp[17] = ddata->blizzard_ver == BLIZZARD_VERSION_S1D13744 ? + BLIZZARD_SRC_WRITE_LCD : + BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE; + + omap_rfbi_configure(dssdev, 16, 8); + + blizzard_write(BLIZZARD_INPUT_WIN_X_START_0, tmp, 18); + + omap_rfbi_configure(dssdev, 16, 16); +} + +static void mipid_transfer(struct spi_device *spi, int cmd, const u8 *wbuf, + int wlen, u8 *rbuf, int rlen) +{ + struct spi_message m; + struct spi_transfer *x, xfer[4]; + u16 w; + int r; + + spi_message_init(&m); + + memset(xfer, 0, sizeof(xfer)); + x = &xfer[0]; + + cmd &= 0xff; + x->tx_buf = &cmd; + x->bits_per_word = 9; + x->len = 2; + spi_message_add_tail(x, &m); + + if (wlen) { + x++; + x->tx_buf = wbuf; + x->len = wlen; + x->bits_per_word = 9; + spi_message_add_tail(x, &m); + } + + if (rlen) { + x++; + x->rx_buf = &w; + x->len = 1; + spi_message_add_tail(x, &m); + + if (rlen > 1) { + /* Arrange for the extra clock before the first + * data bit. + */ + x->bits_per_word = 9; + x->len = 2; + + x++; + x->rx_buf = &rbuf[1]; + x->len = rlen - 1; + spi_message_add_tail(x, &m); + } + } + + r = spi_sync(spi, &m); + if (r < 0) + dev_dbg(&spi->dev, "spi_sync %d\n", r); + + if (rlen) + rbuf[0] = w & 0xff; +} + +static inline void mipid_cmd(struct spi_device *spi, int cmd) +{ + mipid_transfer(spi, cmd, NULL, 0, NULL, 0); +} + +static inline void mipid_write(struct spi_device *spi, + int reg, const u8 *buf, int len) +{ + mipid_transfer(spi, reg, buf, len, NULL, 0); +} + +static inline void mipid_read(struct spi_device *spi, + int reg, u8 *buf, int len) +{ + mipid_transfer(spi, reg, NULL, 0, buf, len); +} + +static void set_data_lines(struct spi_device *spi, int data_lines) +{ + u16 par; + + switch (data_lines) { + case 16: + par = 0x150; + break; + case 18: + par = 0x160; + break; + case 24: + par = 0x170; + break; + } + + mipid_write(spi, 0x3a, (u8 *)&par, 2); +} + +static void send_init_string(struct spi_device *spi) +{ + u16 initpar[] = { 0x0102, 0x0100, 0x0100 }; + mipid_write(spi, 0xc2, (u8 *)initpar, sizeof(initpar)); +} + +static void send_display_on(struct spi_device *spi) +{ + mipid_cmd(spi, MIPID_CMD_DISP_ON); +} + +static void send_display_off(struct spi_device *spi) +{ + mipid_cmd(spi, MIPID_CMD_DISP_OFF); +} + +static void send_sleep_out(struct spi_device *spi) +{ + mipid_cmd(spi, MIPID_CMD_SLEEP_OUT); + msleep(120); +} + +static void send_sleep_in(struct spi_device *spi) +{ + mipid_cmd(spi, MIPID_CMD_SLEEP_IN); + msleep(50); +} + +static int n8x0_panel_power_on(struct omap_dss_device *dssdev) +{ + int r; + struct panel_n8x0_data *bdata = get_board_data(dssdev); + struct panel_drv_data *ddata = get_drv_data(dssdev); + struct spi_device *spi = ddata->spidev; + u8 rev, conf; + u8 display_id[3]; + const char *panel_name; + + if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) + return 0; + + gpio_direction_output(bdata->ctrl_pwrdown, 1); + + if (bdata->platform_enable) { + r = bdata->platform_enable(dssdev); + if (r) + goto err_plat_en; + } + + r = omapdss_rfbi_display_enable(dssdev); + if (r) + goto err_rfbi_en; + + rev = blizzard_read_reg(BLIZZARD_REV_CODE); + conf = blizzard_read_reg(BLIZZARD_CONFIG); + + switch (rev & 0xfc) { + case 0x9c: + ddata->blizzard_ver = BLIZZARD_VERSION_S1D13744; + dev_info(&dssdev->dev, "s1d13744 LCD controller rev %d " + "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07); + break; + case 0xa4: + ddata->blizzard_ver = BLIZZARD_VERSION_S1D13745; + dev_info(&dssdev->dev, "s1d13745 LCD controller rev %d " + "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07); + break; + default: + dev_err(&dssdev->dev, "invalid s1d1374x revision %02x\n", rev); + r = -ENODEV; + goto err_inv_chip; + } + + /* panel */ + + gpio_direction_output(bdata->panel_reset, 1); + + mipid_read(spi, MIPID_CMD_READ_DISP_ID, display_id, 3); + dev_dbg(&spi->dev, "MIPI display ID: %02x%02x%02x\n", + display_id[0], display_id[1], display_id[2]); + + switch (display_id[0]) { + case 0x45: + panel_name = "lph8923"; + break; + case 0x83: + panel_name = "ls041y3"; + break; + default: + dev_err(&dssdev->dev, "invalid display ID 0x%x\n", + display_id[0]); + r = -ENODEV; + goto err_inv_panel; + } + + dev_info(&dssdev->dev, "%s rev %02x LCD detected\n", + panel_name, display_id[1]); + + send_sleep_out(spi); + send_init_string(spi); + set_data_lines(spi, 24); + send_display_on(spi); + + return 0; + +err_inv_panel: + /* + * HACK: we should turn off the panel here, but there is some problem + * with the initialization sequence, and we fail to init the panel if we + * have turned it off + */ + /* gpio_direction_output(bdata->panel_reset, 0); */ +err_inv_chip: + omapdss_rfbi_display_disable(dssdev); +err_rfbi_en: + if (bdata->platform_disable) + bdata->platform_disable(dssdev); +err_plat_en: + gpio_direction_output(bdata->ctrl_pwrdown, 0); + return r; +} + +static void n8x0_panel_power_off(struct omap_dss_device *dssdev) +{ + struct panel_n8x0_data *bdata = get_board_data(dssdev); + struct panel_drv_data *ddata = get_drv_data(dssdev); + struct spi_device *spi = ddata->spidev; + + if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) + return; + + send_display_off(spi); + send_sleep_in(spi); + + if (bdata->platform_disable) + bdata->platform_disable(dssdev); + + /* + * HACK: we should turn off the panel here, but there is some problem + * with the initialization sequence, and we fail to init the panel if we + * have turned it off + */ + /* gpio_direction_output(bdata->panel_reset, 0); */ + gpio_direction_output(bdata->ctrl_pwrdown, 0); + omapdss_rfbi_display_disable(dssdev); +} + +static const struct rfbi_timings n8x0_panel_timings = { + .cs_on_time = 0, + + .we_on_time = 9000, + .we_off_time = 18000, + .we_cycle_time = 36000, + + .re_on_time = 9000, + .re_off_time = 27000, + .re_cycle_time = 36000, + + .access_time = 27000, + .cs_off_time = 36000, + + .cs_pulse_width = 0, +}; + +static int n8x0_bl_update_status(struct backlight_device *dev) +{ + struct omap_dss_device *dssdev = dev_get_drvdata(&dev->dev); + struct panel_n8x0_data *bdata = get_board_data(dssdev); + struct panel_drv_data *ddata = get_drv_data(dssdev); + int r; + int level; + + mutex_lock(&ddata->lock); + + if (dev->props.fb_blank == FB_BLANK_UNBLANK && + dev->props.power == FB_BLANK_UNBLANK) + level = dev->props.brightness; + else + level = 0; + + dev_dbg(&dssdev->dev, "update brightness to %d\n", level); + + if (!bdata->set_backlight) + r = -EINVAL; + else + r = bdata->set_backlight(dssdev, level); + + mutex_unlock(&ddata->lock); + + return r; +} + +static int n8x0_bl_get_intensity(struct backlight_device *dev) +{ + if (dev->props.fb_blank == FB_BLANK_UNBLANK && + dev->props.power == FB_BLANK_UNBLANK) + return dev->props.brightness; + + return 0; +} + +static const struct backlight_ops n8x0_bl_ops = { + .get_brightness = n8x0_bl_get_intensity, + .update_status = n8x0_bl_update_status, +}; + +static int n8x0_panel_probe(struct omap_dss_device *dssdev) +{ + struct panel_n8x0_data *bdata = get_board_data(dssdev); + struct panel_drv_data *ddata; + struct backlight_device *bldev; + struct backlight_properties props; + int r; + + dev_dbg(&dssdev->dev, "probe\n"); + + if (!bdata) + return -EINVAL; + + s_drv_data.dssdev = dssdev; + + ddata = &s_drv_data; + + mutex_init(&ddata->lock); + + dssdev->panel.config = OMAP_DSS_LCD_TFT; + dssdev->panel.timings.x_res = 800; + dssdev->panel.timings.y_res = 480; + dssdev->ctrl.pixel_size = 16; + dssdev->ctrl.rfbi_timings = n8x0_panel_timings; + + memset(&props, 0, sizeof(props)); + props.max_brightness = 127; + props.type = BACKLIGHT_PLATFORM; + bldev = backlight_device_register(dev_name(&dssdev->dev), &dssdev->dev, + dssdev, &n8x0_bl_ops, &props); + if (IS_ERR(bldev)) { + r = PTR_ERR(bldev); + dev_err(&dssdev->dev, "register backlight failed\n"); + return r; + } + + ddata->bldev = bldev; + + bldev->props.fb_blank = FB_BLANK_UNBLANK; + bldev->props.power = FB_BLANK_UNBLANK; + bldev->props.brightness = 127; + + n8x0_bl_update_status(bldev); + + return 0; +} + +static void n8x0_panel_remove(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = get_drv_data(dssdev); + struct backlight_device *bldev; + + dev_dbg(&dssdev->dev, "remove\n"); + + bldev = ddata->bldev; + bldev->props.power = FB_BLANK_POWERDOWN; + n8x0_bl_update_status(bldev); + backlight_device_unregister(bldev); + + dev_set_drvdata(&dssdev->dev, NULL); +} + +static int n8x0_panel_enable(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = get_drv_data(dssdev); + int r; + + dev_dbg(&dssdev->dev, "enable\n"); + + mutex_lock(&ddata->lock); + + rfbi_bus_lock(); + + r = n8x0_panel_power_on(dssdev); + + rfbi_bus_unlock(); + + if (r) { + mutex_unlock(&ddata->lock); + return r; + } + + dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; + + mutex_unlock(&ddata->lock); + + return 0; +} + +static void n8x0_panel_disable(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = get_drv_data(dssdev); + + dev_dbg(&dssdev->dev, "disable\n"); + + mutex_lock(&ddata->lock); + + rfbi_bus_lock(); + + n8x0_panel_power_off(dssdev); + + rfbi_bus_unlock(); + + dssdev->state = OMAP_DSS_DISPLAY_DISABLED; + + mutex_unlock(&ddata->lock); +} + +static int n8x0_panel_suspend(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = get_drv_data(dssdev); + + dev_dbg(&dssdev->dev, "suspend\n"); + + mutex_lock(&ddata->lock); + + rfbi_bus_lock(); + + n8x0_panel_power_off(dssdev); + + rfbi_bus_unlock(); + + dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; + + mutex_unlock(&ddata->lock); + + return 0; +} + +static int n8x0_panel_resume(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = get_drv_data(dssdev); + int r; + + dev_dbg(&dssdev->dev, "resume\n"); + + mutex_lock(&ddata->lock); + + rfbi_bus_lock(); + + r = n8x0_panel_power_on(dssdev); + + rfbi_bus_unlock(); + + if (r) { + mutex_unlock(&ddata->lock); + return r; + } + + dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; + + mutex_unlock(&ddata->lock); + + return 0; +} + +static void n8x0_panel_get_timings(struct omap_dss_device *dssdev, + struct omap_video_timings *timings) +{ + *timings = dssdev->panel.timings; +} + +static void n8x0_panel_get_resolution(struct omap_dss_device *dssdev, + u16 *xres, u16 *yres) +{ + *xres = dssdev->panel.timings.x_res; + *yres = dssdev->panel.timings.y_res; +} + +static void update_done(void *data) +{ + rfbi_bus_unlock(); +} + +static int n8x0_panel_update(struct omap_dss_device *dssdev, + u16 x, u16 y, u16 w, u16 h) +{ + struct panel_drv_data *ddata = get_drv_data(dssdev); + + dev_dbg(&dssdev->dev, "update\n"); + + mutex_lock(&ddata->lock); + rfbi_bus_lock(); + + omap_rfbi_prepare_update(dssdev, &x, &y, &w, &h); + + blizzard_ctrl_setup_update(dssdev, x, y, w, h); + + omap_rfbi_update(dssdev, x, y, w, h, update_done, NULL); + + mutex_unlock(&ddata->lock); + + return 0; +} + +static int n8x0_panel_sync(struct omap_dss_device *dssdev) +{ + struct panel_drv_data *ddata = get_drv_data(dssdev); + + dev_dbg(&dssdev->dev, "sync\n"); + + mutex_lock(&ddata->lock); + rfbi_bus_lock(); + rfbi_bus_unlock(); + mutex_unlock(&ddata->lock); + + return 0; +} + +static struct omap_dss_driver n8x0_panel_driver = { + .probe = n8x0_panel_probe, + .remove = n8x0_panel_remove, + + .enable = n8x0_panel_enable, + .disable = n8x0_panel_disable, + .suspend = n8x0_panel_suspend, + .resume = n8x0_panel_resume, + + .update = n8x0_panel_update, + .sync = n8x0_panel_sync, + + .get_resolution = n8x0_panel_get_resolution, + .get_recommended_bpp = omapdss_default_get_recommended_bpp, + + .get_timings = n8x0_panel_get_timings, + + .driver = { + .name = "n8x0_panel", + .owner = THIS_MODULE, + }, +}; + +/* PANEL */ + +static int mipid_spi_probe(struct spi_device *spi) +{ + dev_dbg(&spi->dev, "mipid_spi_probe\n"); + + spi->mode = SPI_MODE_0; + + s_drv_data.spidev = spi; + + return 0; +} + +static int mipid_spi_remove(struct spi_device *spi) +{ + dev_dbg(&spi->dev, "mipid_spi_remove\n"); + return 0; +} + +static struct spi_driver mipid_spi_driver = { + .driver = { + .name = "lcd_mipid", + .bus = &spi_bus_type, + .owner = THIS_MODULE, + }, + .probe = mipid_spi_probe, + .remove = __devexit_p(mipid_spi_remove), +}; + +static int __init n8x0_panel_drv_init(void) +{ + int r; + + r = spi_register_driver(&mipid_spi_driver); + if (r) { + pr_err("n8x0_panel: spi driver registration failed\n"); + return r; + } + + r = omap_dss_register_driver(&n8x0_panel_driver); + if (r) { + pr_err("n8x0_panel: dss driver registration failed\n"); + spi_unregister_driver(&mipid_spi_driver); + return r; + } + + return 0; +} + +static void __exit n8x0_panel_drv_exit(void) +{ + spi_unregister_driver(&mipid_spi_driver); + + omap_dss_unregister_driver(&n8x0_panel_driver); +} + +module_init(n8x0_panel_drv_init); +module_exit(n8x0_panel_drv_exit); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-picodlp.c b/drivers/video/omap2/displays/panel-picodlp.c new file mode 100644 index 00000000000..98ebdaddab5 --- /dev/null +++ b/drivers/video/omap2/displays/panel-picodlp.c @@ -0,0 +1,594 @@ +/* + * picodlp panel driver + * picodlp_i2c_driver: i2c_client driver + * + * Copyright (C) 2009-2011 Texas Instruments + * Author: Mythri P K <mythripk@ti.com> + * Mayuresh Janorkar <mayur@ti.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <linux/module.h> +#include <linux/input.h> +#include <linux/platform_device.h> +#include <linux/interrupt.h> +#include <linux/firmware.h> +#include <linux/slab.h> +#include <linux/mutex.h> +#include <linux/i2c.h> +#include <linux/delay.h> +#include <linux/gpio.h> + +#include <video/omapdss.h> +#include <video/omap-panel-picodlp.h> + +#include "panel-picodlp.h" + +struct picodlp_data { + struct mutex lock; + struct i2c_client *picodlp_i2c_client; +}; + +static struct i2c_board_info picodlp_i2c_board_info = { + I2C_BOARD_INFO("picodlp_i2c_driver", 0x1b), +}; + +struct picodlp_i2c_data { + struct mutex xfer_lock; +}; + +static struct i2c_device_id picodlp_i2c_id[] = { + { "picodlp_i2c_driver", 0 }, +}; + +struct picodlp_i2c_command { + u8 reg; + u32 value; +}; + +static struct omap_video_timings pico_ls_timings = { + .x_res = 864, + .y_res = 480, + .hsw = 7, + .hfp = 11, + .hbp = 7, + + .pixel_clock = 19200, + + .vsw = 2, + .vfp = 3, + .vbp = 14, +}; + +static inline struct picodlp_panel_data + *get_panel_data(const struct omap_dss_device *dssdev) +{ + return (struct picodlp_panel_data *) dssdev->data; +} + +static u32 picodlp_i2c_read(struct i2c_client *client, u8 reg) +{ + u8 read_cmd[] = {READ_REG_SELECT, reg}, data[4]; + struct picodlp_i2c_data *picodlp_i2c_data = i2c_get_clientdata(client); + struct i2c_msg msg[2]; + + mutex_lock(&picodlp_i2c_data->xfer_lock); + + msg[0].addr = client->addr; + msg[0].flags = 0; + msg[0].len = 2; + msg[0].buf = read_cmd; + + msg[1].addr = client->addr; + msg[1].flags = I2C_M_RD; + msg[1].len = 4; + msg[1].buf = data; + + i2c_transfer(client->adapter, msg, 2); + mutex_unlock(&picodlp_i2c_data->xfer_lock); + return (data[3] | (data[2] << 8) | (data[1] << 16) | (data[0] << 24)); +} + +static int picodlp_i2c_write_block(struct i2c_client *client, + u8 *data, int len) +{ + struct i2c_msg msg; + int i, r, msg_count = 1; + + struct picodlp_i2c_data *picodlp_i2c_data = i2c_get_clientdata(client); + + if (len < 1 || len > 32) { + dev_err(&client->dev, + "too long syn_write_block len %d\n", len); + return -EIO; + } + mutex_lock(&picodlp_i2c_data->xfer_lock); + + msg.addr = client->addr; + msg.flags = 0; + msg.len = len; + msg.buf = data; + r = i2c_transfer(client->adapter, &msg, msg_count); + mutex_unlock(&picodlp_i2c_data->xfer_lock); + + /* + * i2c_transfer returns: + * number of messages sent in case of success + * a negative error number in case of failure + */ + if (r != msg_count) + goto err; + + /* In case of success */ + for (i = 0; i < len; i++) + dev_dbg(&client->dev, + "addr %x bw 0x%02x[%d]: 0x%02x\n", + client->addr, data[0] + i, i, data[i]); + + return 0; +err: + dev_err(&client->dev, "picodlp_i2c_write error\n"); + return r; +} + +static int picodlp_i2c_write(struct i2c_client *client, u8 reg, u32 value) +{ + u8 data[5]; + int i; + + data[0] = reg; + for (i = 1; i < 5; i++) + data[i] = (value >> (32 - (i) * 8)) & 0xFF; + + return picodlp_i2c_write_block(client, data, 5); +} + +static int picodlp_i2c_write_array(struct i2c_client *client, + const struct picodlp_i2c_command commands[], + int count) +{ + int i, r = 0; + for (i = 0; i < count; i++) { + r = picodlp_i2c_write(client, commands[i].reg, + commands[i].value); + if (r) + return r; + } + return r; +} + +static int picodlp_wait_for_dma_done(struct i2c_client *client) +{ + u8 trial = 100; + + do { + msleep(1); + if (!trial--) + return -ETIMEDOUT; + } while (picodlp_i2c_read(client, MAIN_STATUS) & DMA_STATUS); + + return 0; +} + +/** + * picodlp_i2c_init: i2c_initialization routine + * client: i2c_client for communication + * + * return + * 0 : Success, no error + * error code : Failure + */ +static int picodlp_i2c_init(struct i2c_client *client) +{ + int r; + static const struct picodlp_i2c_command init_cmd_set1[] = { + {SOFT_RESET, 1}, + {DMD_PARK_TRIGGER, 1}, + {MISC_REG, 5}, + {SEQ_CONTROL, 0}, + {SEQ_VECTOR, 0x100}, + {DMD_BLOCK_COUNT, 7}, + {DMD_VCC_CONTROL, 0x109}, + {DMD_PARK_PULSE_COUNT, 0xA}, + {DMD_PARK_PULSE_WIDTH, 0xB}, + {DMD_PARK_DELAY, 0x2ED}, + {DMD_SHADOW_ENABLE, 0}, + {FLASH_OPCODE, 0xB}, + {FLASH_DUMMY_BYTES, 1}, + {FLASH_ADDR_BYTES, 3}, + {PBC_CONTROL, 0}, + {FLASH_START_ADDR, CMT_LUT_0_START_ADDR}, + {FLASH_READ_BYTES, CMT_LUT_0_SIZE}, + {CMT_SPLASH_LUT_START_ADDR, 0}, + {CMT_SPLASH_LUT_DEST_SELECT, CMT_LUT_ALL}, + {PBC_CONTROL, 1}, + }; + + static const struct picodlp_i2c_command init_cmd_set2[] = { + {PBC_CONTROL, 0}, + {CMT_SPLASH_LUT_DEST_SELECT, 0}, + {PBC_CONTROL, 0}, + {FLASH_START_ADDR, SEQUENCE_0_START_ADDR}, + {FLASH_READ_BYTES, SEQUENCE_0_SIZE}, + {SEQ_RESET_LUT_START_ADDR, 0}, + {SEQ_RESET_LUT_DEST_SELECT, SEQ_SEQ_LUT}, + {PBC_CONTROL, 1}, + }; + + static const struct picodlp_i2c_command init_cmd_set3[] = { + {PBC_CONTROL, 0}, + {SEQ_RESET_LUT_DEST_SELECT, 0}, + {PBC_CONTROL, 0}, + {FLASH_START_ADDR, DRC_TABLE_0_START_ADDR}, + {FLASH_READ_BYTES, DRC_TABLE_0_SIZE}, + {SEQ_RESET_LUT_START_ADDR, 0}, + {SEQ_RESET_LUT_DEST_SELECT, SEQ_DRC_LUT_ALL}, + {PBC_CONTROL, 1}, + }; + + static const struct picodlp_i2c_command init_cmd_set4[] = { + {PBC_CONTROL, 0}, + {SEQ_RESET_LUT_DEST_SELECT, 0}, + {SDC_ENABLE, 1}, + {AGC_CTRL, 7}, + {CCA_C1A, 0x100}, + {CCA_C1B, 0x0}, + {CCA_C1C, 0x0}, + {CCA_C2A, 0x0}, + {CCA_C2B, 0x100}, + {CCA_C2C, 0x0}, + {CCA_C3A, 0x0}, + {CCA_C3B, 0x0}, + {CCA_C3C, 0x100}, + {CCA_C7A, 0x100}, + {CCA_C7B, 0x100}, + {CCA_C7C, 0x100}, + {CCA_ENABLE, 1}, + {CPU_IF_MODE, 1}, + {SHORT_FLIP, 1}, + {CURTAIN_CONTROL, 0}, + {DMD_PARK_TRIGGER, 0}, + {R_DRIVE_CURRENT, 0x298}, + {G_DRIVE_CURRENT, 0x298}, + {B_DRIVE_CURRENT, 0x298}, + {RGB_DRIVER_ENABLE, 7}, + {SEQ_CONTROL, 0}, + {ACTGEN_CONTROL, 0x10}, + {SEQUENCE_MODE, SEQ_LOCK}, + {DATA_FORMAT, RGB888}, + {INPUT_RESOLUTION, WVGA_864_LANDSCAPE}, + {INPUT_SOURCE, PARALLEL_RGB}, + {CPU_IF_SYNC_METHOD, 1}, + {SEQ_CONTROL, 1} + }; + + r = picodlp_i2c_write_array(client, init_cmd_set1, + ARRAY_SIZE(init_cmd_set1)); + if (r) + return r; + + r = picodlp_wait_for_dma_done(client); + if (r) + return r; + + r = picodlp_i2c_write_array(client, init_cmd_set2, + ARRAY_SIZE(init_cmd_set2)); + if (r) + return r; + + r = picodlp_wait_for_dma_done(client); + if (r) + return r; + + r = picodlp_i2c_write_array(client, init_cmd_set3, + ARRAY_SIZE(init_cmd_set3)); + if (r) + return r; + + r = picodlp_wait_for_dma_done(client); + if (r) + return r; + + r = picodlp_i2c_write_array(client, init_cmd_set4, + ARRAY_SIZE(init_cmd_set4)); + if (r) + return r; + + return 0; +} + +static int picodlp_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct picodlp_i2c_data *picodlp_i2c_data; + + picodlp_i2c_data = kzalloc(sizeof(struct picodlp_i2c_data), GFP_KERNEL); + + if (!picodlp_i2c_data) + return -ENOMEM; + + mutex_init(&picodlp_i2c_data->xfer_lock); + i2c_set_clientdata(client, picodlp_i2c_data); + + return 0; +} + +static int picodlp_i2c_remove(struct i2c_client *client) +{ + struct picodlp_i2c_data *picodlp_i2c_data = + i2c_get_clientdata(client); + kfree(picodlp_i2c_data); + return 0; +} + +static struct i2c_driver picodlp_i2c_driver = { + .driver = { + .name = "picodlp_i2c_driver", + }, + .probe = picodlp_i2c_probe, + .remove = picodlp_i2c_remove, + .id_table = picodlp_i2c_id, +}; + +static int picodlp_panel_power_on(struct omap_dss_device *dssdev) +{ + int r, trial = 100; + struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); + struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev); + + if (dssdev->platform_enable) { + r = dssdev->platform_enable(dssdev); + if (r) + return r; + } + + gpio_set_value(picodlp_pdata->pwrgood_gpio, 0); + msleep(1); + gpio_set_value(picodlp_pdata->pwrgood_gpio, 1); + + while (!gpio_get_value(picodlp_pdata->emu_done_gpio)) { + if (!trial--) { + dev_err(&dssdev->dev, "emu_done signal not" + " going high\n"); + return -ETIMEDOUT; + } + msleep(5); + } + /* + * As per dpp2600 programming guide, + * it is required to sleep for 1000ms after emu_done signal goes high + * then only i2c commands can be successfully sent to dpp2600 + */ + msleep(1000); + r = omapdss_dpi_display_enable(dssdev); + if (r) { + dev_err(&dssdev->dev, "failed to enable DPI\n"); + goto err1; + } + + r = picodlp_i2c_init(picod->picodlp_i2c_client); + if (r) + goto err; + + dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; + + return r; +err: + omapdss_dpi_display_disable(dssdev); +err1: + if (dssdev->platform_disable) + dssdev->platform_disable(dssdev); + + return r; +} + +static void picodlp_panel_power_off(struct omap_dss_device *dssdev) +{ + struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev); + + omapdss_dpi_display_disable(dssdev); + + gpio_set_value(picodlp_pdata->emu_done_gpio, 0); + gpio_set_value(picodlp_pdata->pwrgood_gpio, 0); + + if (dssdev->platform_disable) + dssdev->platform_disable(dssdev); +} + +static int picodlp_panel_probe(struct omap_dss_device *dssdev) +{ + struct picodlp_data *picod; + struct picodlp_panel_data *picodlp_pdata = get_panel_data(dssdev); + struct i2c_adapter *adapter; + struct i2c_client *picodlp_i2c_client; + int r = 0, picodlp_adapter_id; + + dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_ONOFF | + OMAP_DSS_LCD_IHS | OMAP_DSS_LCD_IVS; + dssdev->panel.acb = 0x0; + dssdev->panel.timings = pico_ls_timings; + + picod = kzalloc(sizeof(struct picodlp_data), GFP_KERNEL); + if (!picod) + return -ENOMEM; + + mutex_init(&picod->lock); + + picodlp_adapter_id = picodlp_pdata->picodlp_adapter_id; + + adapter = i2c_get_adapter(picodlp_adapter_id); + if (!adapter) { + dev_err(&dssdev->dev, "can't get i2c adapter\n"); + r = -ENODEV; + goto err; + } + + picodlp_i2c_client = i2c_new_device(adapter, &picodlp_i2c_board_info); + if (!picodlp_i2c_client) { + dev_err(&dssdev->dev, "can't add i2c device::" + " picodlp_i2c_client is NULL\n"); + r = -ENODEV; + goto err; + } + + picod->picodlp_i2c_client = picodlp_i2c_client; + + dev_set_drvdata(&dssdev->dev, picod); + return r; +err: + kfree(picod); + return r; +} + +static void picodlp_panel_remove(struct omap_dss_device *dssdev) +{ + struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); + + i2c_unregister_device(picod->picodlp_i2c_client); + dev_set_drvdata(&dssdev->dev, NULL); + dev_dbg(&dssdev->dev, "removing picodlp panel\n"); + + kfree(picod); +} + +static int picodlp_panel_enable(struct omap_dss_device *dssdev) +{ + struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); + int r; + + dev_dbg(&dssdev->dev, "enabling picodlp panel\n"); + + mutex_lock(&picod->lock); + if (dssdev->state != OMAP_DSS_DISPLAY_DISABLED) { + mutex_unlock(&picod->lock); + return -EINVAL; + } + + r = picodlp_panel_power_on(dssdev); + mutex_unlock(&picod->lock); + + return r; +} + +static void picodlp_panel_disable(struct omap_dss_device *dssdev) +{ + struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); + + mutex_lock(&picod->lock); + /* Turn off DLP Power */ + if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) + picodlp_panel_power_off(dssdev); + + dssdev->state = OMAP_DSS_DISPLAY_DISABLED; + mutex_unlock(&picod->lock); + + dev_dbg(&dssdev->dev, "disabling picodlp panel\n"); +} + +static int picodlp_panel_suspend(struct omap_dss_device *dssdev) +{ + struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); + + mutex_lock(&picod->lock); + /* Turn off DLP Power */ + if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE) { + mutex_unlock(&picod->lock); + dev_err(&dssdev->dev, "unable to suspend picodlp panel," + " panel is not ACTIVE\n"); + return -EINVAL; + } + + picodlp_panel_power_off(dssdev); + + dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED; + mutex_unlock(&picod->lock); + + dev_dbg(&dssdev->dev, "suspending picodlp panel\n"); + return 0; +} + +static int picodlp_panel_resume(struct omap_dss_device *dssdev) +{ + struct picodlp_data *picod = dev_get_drvdata(&dssdev->dev); + int r; + + mutex_lock(&picod->lock); + if (dssdev->state != OMAP_DSS_DISPLAY_SUSPENDED) { + mutex_unlock(&picod->lock); + dev_err(&dssdev->dev, "unable to resume picodlp panel," + " panel is not ACTIVE\n"); + return -EINVAL; + } + + r = picodlp_panel_power_on(dssdev); + mutex_unlock(&picod->lock); + dev_dbg(&dssdev->dev, "resuming picodlp panel\n"); + return r; +} + +static void picodlp_get_resolution(struct omap_dss_device *dssdev, + u16 *xres, u16 *yres) +{ + *xres = dssdev->panel.timings.x_res; + *yres = dssdev->panel.timings.y_res; +} + +static struct omap_dss_driver picodlp_driver = { + .probe = picodlp_panel_probe, + .remove = picodlp_panel_remove, + + .enable = picodlp_panel_enable, + .disable = picodlp_panel_disable, + + .get_resolution = picodlp_get_resolution, + + .suspend = picodlp_panel_suspend, + .resume = picodlp_panel_resume, + + .driver = { + .name = "picodlp_panel", + .owner = THIS_MODULE, + }, +}; + +static int __init picodlp_init(void) +{ + int r = 0; + + r = i2c_add_driver(&picodlp_i2c_driver); + if (r) { + printk(KERN_WARNING "picodlp_i2c_driver" \ + " registration failed\n"); + return r; + } + + r = omap_dss_register_driver(&picodlp_driver); + if (r) + i2c_del_driver(&picodlp_i2c_driver); + + return r; +} + +static void __exit picodlp_exit(void) +{ + i2c_del_driver(&picodlp_i2c_driver); + omap_dss_unregister_driver(&picodlp_driver); +} + +module_init(picodlp_init); +module_exit(picodlp_exit); + +MODULE_AUTHOR("Mythri P K <mythripk@ti.com>"); +MODULE_DESCRIPTION("picodlp driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/omap2/displays/panel-picodlp.h b/drivers/video/omap2/displays/panel-picodlp.h new file mode 100644 index 00000000000..a34b431a726 --- /dev/null +++ b/drivers/video/omap2/displays/panel-picodlp.h @@ -0,0 +1,288 @@ +/* + * Header file required by picodlp panel driver + * + * Copyright (C) 2009-2011 Texas Instruments + * Author: Mythri P K <mythripk@ti.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published by + * the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef __OMAP2_DISPLAY_PANEL_PICODLP_H +#define __OMAP2_DISPLAY_PANEL_PICODLP_H + +/* Commands used for configuring picodlp panel */ + +#define MAIN_STATUS 0x03 +#define PBC_CONTROL 0x08 +#define INPUT_SOURCE 0x0B +#define INPUT_RESOLUTION 0x0C +#define DATA_FORMAT 0x0D +#define IMG_ROTATION 0x0E +#define LONG_FLIP 0x0F +#define SHORT_FLIP 0x10 +#define TEST_PAT_SELECT 0x11 +#define R_DRIVE_CURRENT 0x12 +#define G_DRIVE_CURRENT 0x13 +#define B_DRIVE_CURRENT 0x14 +#define READ_REG_SELECT 0x15 +#define RGB_DRIVER_ENABLE 0x16 + +#define CPU_IF_MODE 0x18 +#define FRAME_RATE 0x19 +#define CPU_IF_SYNC_METHOD 0x1A +#define CPU_IF_SOF 0x1B +#define CPU_IF_EOF 0x1C +#define CPU_IF_SLEEP 0x1D + +#define SEQUENCE_MODE 0x1E +#define SOFT_RESET 0x1F +#define FRONT_END_RESET 0x21 +#define AUTO_PWR_ENABLE 0x22 + +#define VSYNC_LINE_DELAY 0x23 +#define CPU_PI_HORIZ_START 0x24 +#define CPU_PI_VERT_START 0x25 +#define CPU_PI_HORIZ_WIDTH 0x26 +#define CPU_PI_VERT_HEIGHT 0x27 + +#define PIXEL_MASK_CROP 0x28 +#define CROP_FIRST_LINE 0x29 +#define CROP_LAST_LINE 0x2A +#define CROP_FIRST_PIXEL 0x2B +#define CROP_LAST_PIXEL 0x2C +#define DMD_PARK_TRIGGER 0x2D + +#define MISC_REG 0x30 + +/* AGC registers */ +#define AGC_CTRL 0x50 +#define AGC_CLIPPED_PIXS 0x55 +#define AGC_BRIGHT_PIXS 0x56 +#define AGC_BG_PIXS 0x57 +#define AGC_SAFETY_MARGIN 0x17 + +/* Color Coordinate Adjustment registers */ +#define CCA_ENABLE 0x5E +#define CCA_C1A 0x5F +#define CCA_C1B 0x60 +#define CCA_C1C 0x61 +#define CCA_C2A 0x62 +#define CCA_C2B 0x63 +#define CCA_C2C 0x64 +#define CCA_C3A 0x65 +#define CCA_C3B 0x66 +#define CCA_C3C 0x67 +#define CCA_C7A 0x71 +#define CCA_C7B 0x72 +#define CCA_C7C 0x73 + +/** + * DLP Pico Processor 2600 comes with flash + * We can do DMA operations from flash for accessing Look Up Tables + */ +#define DMA_STATUS 0x100 +#define FLASH_ADDR_BYTES 0x74 +#define FLASH_DUMMY_BYTES 0x75 +#define FLASH_WRITE_BYTES 0x76 +#define FLASH_READ_BYTES 0x77 +#define FLASH_OPCODE 0x78 +#define FLASH_START_ADDR 0x79 +#define FLASH_DUMMY2 0x7A +#define FLASH_WRITE_DATA 0x7B + +#define TEMPORAL_DITH_DISABLE 0x7E +#define SEQ_CONTROL 0x82 +#define SEQ_VECTOR 0x83 + +/* DMD is Digital Micromirror Device */ +#define DMD_BLOCK_COUNT 0x84 +#define DMD_VCC_CONTROL 0x86 +#define DMD_PARK_PULSE_COUNT 0x87 +#define DMD_PARK_PULSE_WIDTH 0x88 +#define DMD_PARK_DELAY 0x89 +#define DMD_SHADOW_ENABLE 0x8E +#define SEQ_STATUS 0x8F +#define FLASH_CLOCK_CONTROL 0x98 +#define DMD_PARK 0x2D + +#define SDRAM_BIST_ENABLE 0x46 +#define DDR_DRIVER_STRENGTH 0x9A +#define SDC_ENABLE 0x9D +#define SDC_BUFF_SWAP_DISABLE 0xA3 +#define CURTAIN_CONTROL 0xA6 +#define DDR_BUS_SWAP_ENABLE 0xA7 +#define DMD_TRC_ENABLE 0xA8 +#define DMD_BUS_SWAP_ENABLE 0xA9 + +#define ACTGEN_ENABLE 0xAE +#define ACTGEN_CONTROL 0xAF +#define ACTGEN_HORIZ_BP 0xB0 +#define ACTGEN_VERT_BP 0xB1 + +/* Look Up Table access */ +#define CMT_SPLASH_LUT_START_ADDR 0xFA +#define CMT_SPLASH_LUT_DEST_SELECT 0xFB +#define CMT_SPLASH_LUT_DATA 0xFC +#define SEQ_RESET_LUT_START_ADDR 0xFD +#define SEQ_RESET_LUT_DEST_SELECT 0xFE +#define SEQ_RESET_LUT_DATA 0xFF + +/* Input source definitions */ +#define PARALLEL_RGB 0 +#define INT_TEST_PATTERN 1 +#define SPLASH_SCREEN 2 +#define CPU_INTF 3 +#define BT656 4 + +/* Standard input resolution definitions */ +#define QWVGA_LANDSCAPE 3 /* (427h*240v) */ +#define WVGA_864_LANDSCAPE 21 /* (864h*480v) */ +#define WVGA_DMD_OPTICAL_TEST 35 /* (608h*684v) */ + +/* Standard data format definitions */ +#define RGB565 0 +#define RGB666 1 +#define RGB888 2 + +/* Test Pattern definitions */ +#define TPG_CHECKERBOARD 0 +#define TPG_BLACK 1 +#define TPG_WHITE 2 +#define TPG_RED 3 +#define TPG_BLUE 4 +#define TPG_GREEN 5 +#define TPG_VLINES_BLACK 6 +#define TPG_HLINES_BLACK 7 +#define TPG_VLINES_ALT 8 +#define TPG_HLINES_ALT 9 +#define TPG_DIAG_LINES 10 +#define TPG_GREYRAMP_VERT 11 +#define TPG_GREYRAMP_HORIZ 12 +#define TPG_ANSI_CHECKERBOARD 13 + +/* sequence mode definitions */ +#define SEQ_FREE_RUN 0 +#define SEQ_LOCK 1 + +/* curtain color definitions */ +#define CURTAIN_BLACK 0 +#define CURTAIN_RED 1 +#define CURTAIN_GREEN 2 +#define CURTAIN_BLUE 3 +#define CURTAIN_YELLOW 4 +#define CURTAIN_MAGENTA 5 +#define CURTAIN_CYAN 6 +#define CURTAIN_WHITE 7 + +/* LUT definitions */ +#define CMT_LUT_NONE 0 +#define CMT_LUT_GREEN 1 +#define CMT_LUT_RED 2 +#define CMT_LUT_BLUE 3 +#define CMT_LUT_ALL 4 +#define SPLASH_LUT 5 + +#define SEQ_LUT_NONE 0 +#define SEQ_DRC_LUT_0 1 +#define SEQ_DRC_LUT_1 2 +#define SEQ_DRC_LUT_2 3 +#define SEQ_DRC_LUT_3 4 +#define SEQ_SEQ_LUT 5 +#define SEQ_DRC_LUT_ALL 6 +#define WPC_PROGRAM_LUT 7 + +#define BITSTREAM_START_ADDR 0x00000000 +#define BITSTREAM_SIZE 0x00040000 + +#define WPC_FW_0_START_ADDR 0x00040000 +#define WPC_FW_0_SIZE 0x00000ce8 + +#define SEQUENCE_0_START_ADDR 0x00044000 +#define SEQUENCE_0_SIZE 0x00001000 + +#define SEQUENCE_1_START_ADDR 0x00045000 +#define SEQUENCE_1_SIZE 0x00000d10 + +#define SEQUENCE_2_START_ADDR 0x00046000 +#define SEQUENCE_2_SIZE 0x00000d10 + +#define SEQUENCE_3_START_ADDR 0x00047000 +#define SEQUENCE_3_SIZE 0x00000d10 + +#define SEQUENCE_4_START_ADDR 0x00048000 +#define SEQUENCE_4_SIZE 0x00000d10 + +#define SEQUENCE_5_START_ADDR 0x00049000 +#define SEQUENCE_5_SIZE 0x00000d10 + +#define SEQUENCE_6_START_ADDR 0x0004a000 +#define SEQUENCE_6_SIZE 0x00000d10 + +#define CMT_LUT_0_START_ADDR 0x0004b200 +#define CMT_LUT_0_SIZE 0x00000600 + +#define CMT_LUT_1_START_ADDR 0x0004b800 +#define CMT_LUT_1_SIZE 0x00000600 + +#define CMT_LUT_2_START_ADDR 0x0004be00 +#define CMT_LUT_2_SIZE 0x00000600 + +#define CMT_LUT_3_START_ADDR 0x0004c400 +#define CMT_LUT_3_SIZE 0x00000600 + +#define CMT_LUT_4_START_ADDR 0x0004ca00 +#define CMT_LUT_4_SIZE 0x00000600 + +#define CMT_LUT_5_START_ADDR 0x0004d000 +#define CMT_LUT_5_SIZE 0x00000600 + +#define CMT_LUT_6_START_ADDR 0x0004d600 +#define CMT_LUT_6_SIZE 0x00000600 + +#define DRC_TABLE_0_START_ADDR 0x0004dc00 +#define DRC_TABLE_0_SIZE 0x00000100 + +#define SPLASH_0_START_ADDR 0x0004dd00 +#define SPLASH_0_SIZE 0x00032280 + +#define SEQUENCE_7_START_ADDR 0x00080000 +#define SEQUENCE_7_SIZE 0x00000d10 + +#define SEQUENCE_8_START_ADDR 0x00081800 +#define SEQUENCE_8_SIZE 0x00000d10 + +#define SEQUENCE_9_START_ADDR 0x00083000 +#define SEQUENCE_9_SIZE 0x00000d10 + +#define CMT_LUT_7_START_ADDR 0x0008e000 +#define CMT_LUT_7_SIZE 0x00000600 + +#define CMT_LUT_8_START_ADDR 0x0008e800 +#define CMT_LUT_8_SIZE 0x00000600 + +#define CMT_LUT_9_START_ADDR 0x0008f000 +#define CMT_LUT_9_SIZE 0x00000600 + +#define SPLASH_1_START_ADDR 0x0009a000 +#define SPLASH_1_SIZE 0x00032280 + +#define SPLASH_2_START_ADDR 0x000cd000 +#define SPLASH_2_SIZE 0x00032280 + +#define SPLASH_3_START_ADDR 0x00100000 +#define SPLASH_3_SIZE 0x00032280 + +#define OPT_SPLASH_0_START_ADDR 0x00134000 +#define OPT_SPLASH_0_SIZE 0x000cb100 + +#endif diff --git a/drivers/video/omap2/displays/panel-taal.c b/drivers/video/omap2/displays/panel-taal.c index 4e888ac09b3..80c3f6ab1a9 100644 --- a/drivers/video/omap2/displays/panel-taal.c +++ b/drivers/video/omap2/displays/panel-taal.c @@ -35,26 +35,12 @@ #include <video/omapdss.h> #include <video/omap-panel-nokia-dsi.h> +#include <video/mipi_display.h> /* DSI Virtual channel. Hardcoded for now. */ #define TCH 0 #define DCS_READ_NUM_ERRORS 0x05 -#define DCS_READ_POWER_MODE 0x0a -#define DCS_READ_MADCTL 0x0b -#define DCS_READ_PIXEL_FORMAT 0x0c -#define DCS_RDDSDR 0x0f -#define DCS_SLEEP_IN 0x10 -#define DCS_SLEEP_OUT 0x11 -#define DCS_DISPLAY_OFF 0x28 -#define DCS_DISPLAY_ON 0x29 -#define DCS_COLUMN_ADDR 0x2a -#define DCS_PAGE_ADDR 0x2b -#define DCS_MEMORY_WRITE 0x2c -#define DCS_TEAR_OFF 0x34 -#define DCS_TEAR_ON 0x35 -#define DCS_MEM_ACC_CTRL 0x36 -#define DCS_PIXEL_FORMAT 0x3a #define DCS_BRIGHTNESS 0x51 #define DCS_CTRL_DISPLAY 0x53 #define DCS_WRITE_CABC 0x55 @@ -222,8 +208,6 @@ struct taal_data { struct delayed_work te_timeout_work; - bool use_dsi_bl; - bool cabc_broken; unsigned cabc_mode; @@ -302,7 +286,7 @@ static int taal_sleep_in(struct taal_data *td) hw_guard_wait(td); - cmd = DCS_SLEEP_IN; + cmd = MIPI_DCS_ENTER_SLEEP_MODE; r = dsi_vc_dcs_write_nosync(td->dssdev, td->channel, &cmd, 1); if (r) return r; @@ -321,7 +305,7 @@ static int taal_sleep_out(struct taal_data *td) hw_guard_wait(td); - r = taal_dcs_write_0(td, DCS_SLEEP_OUT); + r = taal_dcs_write_0(td, MIPI_DCS_EXIT_SLEEP_MODE); if (r) return r; @@ -356,7 +340,7 @@ static int taal_set_addr_mode(struct taal_data *td, u8 rotate, bool mirror) u8 mode; int b5, b6, b7; - r = taal_dcs_read_1(td, DCS_READ_MADCTL, &mode); + r = taal_dcs_read_1(td, MIPI_DCS_GET_ADDRESS_MODE, &mode); if (r) return r; @@ -390,7 +374,7 @@ static int taal_set_addr_mode(struct taal_data *td, u8 rotate, bool mirror) mode &= ~((1<<7) | (1<<6) | (1<<5)); mode |= (b7 << 7) | (b6 << 6) | (b5 << 5); - return taal_dcs_write_1(td, DCS_MEM_ACC_CTRL, mode); + return taal_dcs_write_1(td, MIPI_DCS_SET_ADDRESS_MODE, mode); } static int taal_set_update_window(struct taal_data *td, @@ -403,7 +387,7 @@ static int taal_set_update_window(struct taal_data *td, u16 y2 = y + h - 1; u8 buf[5]; - buf[0] = DCS_COLUMN_ADDR; + buf[0] = MIPI_DCS_SET_COLUMN_ADDRESS; buf[1] = (x1 >> 8) & 0xff; buf[2] = (x1 >> 0) & 0xff; buf[3] = (x2 >> 8) & 0xff; @@ -413,7 +397,7 @@ static int taal_set_update_window(struct taal_data *td, if (r) return r; - buf[0] = DCS_PAGE_ADDR; + buf[0] = MIPI_DCS_SET_PAGE_ADDRESS; buf[1] = (y1 >> 8) & 0xff; buf[2] = (y1 >> 0) & 0xff; buf[3] = (y2 >> 8) & 0xff; @@ -555,7 +539,6 @@ static int taal_bl_update_status(struct backlight_device *dev) { struct omap_dss_device *dssdev = dev_get_drvdata(&dev->dev); struct taal_data *td = dev_get_drvdata(&dssdev->dev); - struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); int r; int level; @@ -569,23 +552,16 @@ static int taal_bl_update_status(struct backlight_device *dev) mutex_lock(&td->lock); - if (td->use_dsi_bl) { - if (td->enabled) { - dsi_bus_lock(dssdev); + if (td->enabled) { + dsi_bus_lock(dssdev); - r = taal_wake_up(dssdev); - if (!r) - r = taal_dcs_write_1(td, DCS_BRIGHTNESS, level); + r = taal_wake_up(dssdev); + if (!r) + r = taal_dcs_write_1(td, DCS_BRIGHTNESS, level); - dsi_bus_unlock(dssdev); - } else { - r = 0; - } + dsi_bus_unlock(dssdev); } else { - if (!panel_data->set_backlight) - r = -EINVAL; - else - r = panel_data->set_backlight(dssdev, level); + r = 0; } mutex_unlock(&td->lock); @@ -964,7 +940,7 @@ static int taal_probe(struct omap_dss_device *dssdev) { struct backlight_properties props; struct taal_data *td; - struct backlight_device *bldev; + struct backlight_device *bldev = NULL; struct nokia_dsi_panel_data *panel_data = get_panel_data(dssdev); struct panel_config *panel_config = NULL; int r, i; @@ -990,7 +966,7 @@ static int taal_probe(struct omap_dss_device *dssdev) dssdev->panel.config = OMAP_DSS_LCD_TFT; dssdev->panel.timings = panel_config->timings; - dssdev->ctrl.pixel_size = 24; + dssdev->panel.dsi_pix_fmt = OMAP_DSS_DSI_FMT_RGB888; td = kzalloc(sizeof(*td), GFP_KERNEL); if (!td) { @@ -1025,35 +1001,26 @@ static int taal_probe(struct omap_dss_device *dssdev) taal_hw_reset(dssdev); - /* if no platform set_backlight() defined, presume DSI backlight - * control */ - memset(&props, 0, sizeof(struct backlight_properties)); - if (!panel_data->set_backlight) - td->use_dsi_bl = true; - - if (td->use_dsi_bl) + if (panel_data->use_dsi_backlight) { + memset(&props, 0, sizeof(struct backlight_properties)); props.max_brightness = 255; - else - props.max_brightness = 127; - - props.type = BACKLIGHT_RAW; - bldev = backlight_device_register(dev_name(&dssdev->dev), &dssdev->dev, - dssdev, &taal_bl_ops, &props); - if (IS_ERR(bldev)) { - r = PTR_ERR(bldev); - goto err_bl; - } - td->bldev = bldev; + props.type = BACKLIGHT_RAW; + bldev = backlight_device_register(dev_name(&dssdev->dev), + &dssdev->dev, dssdev, &taal_bl_ops, &props); + if (IS_ERR(bldev)) { + r = PTR_ERR(bldev); + goto err_bl; + } + + td->bldev = bldev; - bldev->props.fb_blank = FB_BLANK_UNBLANK; - bldev->props.power = FB_BLANK_UNBLANK; - if (td->use_dsi_bl) + bldev->props.fb_blank = FB_BLANK_UNBLANK; + bldev->props.power = FB_BLANK_UNBLANK; bldev->props.brightness = 255; - else - bldev->props.brightness = 127; - taal_bl_update_status(bldev); + taal_bl_update_status(bldev); + } if (panel_data->use_ext_te) { int gpio = panel_data->ext_te_gpio; @@ -1067,7 +1034,7 @@ static int taal_probe(struct omap_dss_device *dssdev) gpio_direction_input(gpio); r = request_irq(gpio_to_irq(gpio), taal_te_isr, - IRQF_DISABLED | IRQF_TRIGGER_RISING, + IRQF_TRIGGER_RISING, "taal vsync", dssdev); if (r) { @@ -1111,7 +1078,8 @@ err_irq: if (panel_data->use_ext_te) gpio_free(panel_data->ext_te_gpio); err_gpio: - backlight_device_unregister(bldev); + if (bldev != NULL) + backlight_device_unregister(bldev); err_bl: destroy_workqueue(td->workqueue); err_wq: @@ -1140,9 +1108,11 @@ static void __exit taal_remove(struct omap_dss_device *dssdev) } bldev = td->bldev; - bldev->props.power = FB_BLANK_POWERDOWN; - taal_bl_update_status(bldev); - backlight_device_unregister(bldev); + if (bldev != NULL) { + bldev->props.power = FB_BLANK_POWERDOWN; + taal_bl_update_status(bldev); + backlight_device_unregister(bldev); + } taal_cancel_ulps_work(dssdev); taal_cancel_esd_work(dssdev); @@ -1195,7 +1165,8 @@ static int taal_power_on(struct omap_dss_device *dssdev) if (r) goto err; - r = taal_dcs_write_1(td, DCS_PIXEL_FORMAT, 0x7); /* 24bit/pixel */ + r = taal_dcs_write_1(td, MIPI_DCS_SET_PIXEL_FORMAT, + MIPI_DCS_PIXEL_FMT_24BIT); if (r) goto err; @@ -1209,7 +1180,7 @@ static int taal_power_on(struct omap_dss_device *dssdev) goto err; } - r = taal_dcs_write_0(td, DCS_DISPLAY_ON); + r = taal_dcs_write_0(td, MIPI_DCS_SET_DISPLAY_ON); if (r) goto err; @@ -1246,7 +1217,7 @@ static void taal_power_off(struct omap_dss_device *dssdev) struct taal_data *td = dev_get_drvdata(&dssdev->dev); int r; - r = taal_dcs_write_0(td, DCS_DISPLAY_OFF); + r = taal_dcs_write_0(td, MIPI_DCS_SET_DISPLAY_OFF); if (!r) r = taal_sleep_in(td); @@ -1529,9 +1500,9 @@ static int _taal_enable_te(struct omap_dss_device *dssdev, bool enable) int r; if (enable) - r = taal_dcs_write_1(td, DCS_TEAR_ON, 0); + r = taal_dcs_write_1(td, MIPI_DCS_SET_TEAR_ON, 0); else - r = taal_dcs_write_0(td, DCS_TEAR_OFF); + r = taal_dcs_write_0(td, MIPI_DCS_SET_TEAR_OFF); if (!panel_data->use_ext_te) omapdss_dsi_enable_te(dssdev, enable); @@ -1851,7 +1822,7 @@ static void taal_esd_work(struct work_struct *work) goto err; } - r = taal_dcs_read_1(td, DCS_RDDSDR, &state1); + r = taal_dcs_read_1(td, MIPI_DCS_GET_DIAGNOSTIC_RESULT, &state1); if (r) { dev_err(&dssdev->dev, "failed to read Taal status\n"); goto err; @@ -1864,7 +1835,7 @@ static void taal_esd_work(struct work_struct *work) goto err; } - r = taal_dcs_read_1(td, DCS_RDDSDR, &state2); + r = taal_dcs_read_1(td, MIPI_DCS_GET_DIAGNOSTIC_RESULT, &state2); if (r) { dev_err(&dssdev->dev, "failed to read Taal status\n"); goto err; @@ -1880,7 +1851,7 @@ static void taal_esd_work(struct work_struct *work) /* Self-diagnostics result is also shown on TE GPIO line. We need * to re-enable TE after self diagnostics */ if (td->te_enabled && panel_data->use_ext_te) { - r = taal_dcs_write_1(td, DCS_TEAR_ON, 0); + r = taal_dcs_write_1(td, MIPI_DCS_SET_TEAR_ON, 0); if (r) goto err; } |